* [PATCH V5 05/10] remoteproc: qcom: Update regmap offsets for halt register
From: Gokul Sriram Palanisamy @ 2020-05-13 9:31 UTC (permalink / raw)
To: gokulsri, sboyd, agross, bjorn.andersson, david.brown, devicetree,
jassisinghbrar, linux-arm-msm, linux-clk, linux-kernel,
linux-remoteproc, mark.rutland, mturquette, ohad, robh+dt,
sricharan, nprakash
In-Reply-To: <1589362265-22702-1-git-send-email-gokulsri@codeaurora.org>
Fixed issue in reading halt-regs parameter from device-tree.
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
---
drivers/remoteproc/qcom_q6v5_wcss.c | 22 ++++++++++++++--------
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5_wcss.c b/drivers/remoteproc/qcom_q6v5_wcss.c
index 0a23aca..49f2d31 100644
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
@@ -86,7 +86,7 @@
#define TCSR_WCSS_CLK_MASK 0x1F
#define TCSR_WCSS_CLK_ENABLE 0x14
-#define MAX_HALT_REG 3
+#define MAX_HALT_REG 4
#define WCNSS_PAS_ID 6
@@ -154,6 +154,7 @@ struct wcss_data {
u32 version;
bool aon_reset_required;
bool wcss_q6_reset_required;
+ bool bcr_reset_required;
const char *ssr_name;
const char *sysmon_name;
int ssctl_id;
@@ -868,10 +869,13 @@ static int q6v5_wcss_init_reset(struct q6v5_wcss *wcss,
}
}
- wcss->wcss_q6_bcr_reset = devm_reset_control_get_exclusive(dev, "wcss_q6_bcr_reset");
- if (IS_ERR(wcss->wcss_q6_bcr_reset)) {
- dev_err(wcss->dev, "unable to acquire wcss_q6_bcr_reset\n");
- return PTR_ERR(wcss->wcss_q6_bcr_reset);
+ if (desc->bcr_reset_required) {
+ wcss->wcss_q6_bcr_reset = devm_reset_control_get_exclusive(dev,
+ "wcss_q6_bcr_reset");
+ if (IS_ERR(wcss->wcss_q6_bcr_reset)) {
+ dev_err(wcss->dev, "unable to acquire wcss_q6_bcr_reset\n");
+ return PTR_ERR(wcss->wcss_q6_bcr_reset);
+ }
}
return 0;
@@ -919,9 +923,9 @@ static int q6v5_wcss_init_mmio(struct q6v5_wcss *wcss,
return -EINVAL;
}
- wcss->halt_q6 = halt_reg[0];
- wcss->halt_wcss = halt_reg[1];
- wcss->halt_nc = halt_reg[2];
+ wcss->halt_q6 = halt_reg[1];
+ wcss->halt_wcss = halt_reg[2];
+ wcss->halt_nc = halt_reg[3];
return 0;
}
@@ -1166,6 +1170,7 @@ static const struct wcss_data wcss_ipq8074_res_init = {
.crash_reason_smem = WCSS_CRASH_REASON,
.aon_reset_required = true,
.wcss_q6_reset_required = true,
+ .bcr_reset_required = false,
.ssr_name = "q6wcss",
.ops = &q6v5_wcss_ipq8074_ops,
.requires_force_stop = true,
@@ -1180,6 +1185,7 @@ static const struct wcss_data wcss_qcs404_res_init = {
.version = WCSS_QCS404,
.aon_reset_required = false,
.wcss_q6_reset_required = false,
+ .bcr_reset_required = true,
.ssr_name = "mpss",
.sysmon_name = "wcnss",
.ssctl_id = 0x12,
--
2.7.4
^ permalink raw reply related
* [PATCH V5 04/10] remoteproc: qcom: Add ssr subdevice identifier
From: Gokul Sriram Palanisamy @ 2020-05-13 9:30 UTC (permalink / raw)
To: gokulsri, sboyd, agross, bjorn.andersson, david.brown, devicetree,
jassisinghbrar, linux-arm-msm, linux-clk, linux-kernel,
linux-remoteproc, mark.rutland, mturquette, ohad, robh+dt,
sricharan, nprakash
In-Reply-To: <1589362265-22702-1-git-send-email-gokulsri@codeaurora.org>
Add name for ssr subdevice on IPQ8074 SoC.
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
---
drivers/remoteproc/qcom_q6v5_wcss.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/remoteproc/qcom_q6v5_wcss.c b/drivers/remoteproc/qcom_q6v5_wcss.c
index 31239c0..0a23aca 100644
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
@@ -1166,6 +1166,7 @@ static const struct wcss_data wcss_ipq8074_res_init = {
.crash_reason_smem = WCSS_CRASH_REASON,
.aon_reset_required = true,
.wcss_q6_reset_required = true,
+ .ssr_name = "q6wcss",
.ops = &q6v5_wcss_ipq8074_ops,
.requires_force_stop = true,
.need_mem_protection = true,
--
2.7.4
^ permalink raw reply related
* [PATCH V5 00/10] remoteproc: qcom: q6v5-wcss: Add support for secure pil
From: Gokul Sriram Palanisamy @ 2020-05-13 9:30 UTC (permalink / raw)
To: gokulsri, sboyd, agross, bjorn.andersson, david.brown, devicetree,
jassisinghbrar, linux-arm-msm, linux-clk, linux-kernel,
linux-remoteproc, mark.rutland, mturquette, ohad, robh+dt,
sricharan, nprakash
IPQ8074 needs support for secure pil as well.
Also, currently only unified firmware is supported.
IPQ8074 supports split firmware for q6 and m3, so
adding support for that.
This series is based on Govind's
"[v5] Add non PAS wcss Q6 support for QCS404"
changes since v4:
- Rebased patch 8
changes since v3:
- In patch 10, Added release_firmware to free up
memory requested for m3 firmware.
changes since v2:
- In patch 5, Added a driver data 'bcr_reset_required'
to select if bcr reset is required
- In patch 10, Removed syscon implementation and moved
to mailbox framework to access APCS IPC
changes since v1:
- In patch 10, Addressed minor review comments.
Gokul Sriram Palanisamy (10):
remoteproc: qcom: Add PRNG proxy clock
remoteproc: qcom: Add secure PIL support
remoteproc: qcom: Add support for split q6 + m3 wlan firmware
remoteproc: qcom: Add ssr subdevice identifier
remoteproc: qcom: Update regmap offsets for halt register
dt-bindings: clock: qcom: Add reset for WCSSAON
clk: qcom: Add WCSSAON reset
dt-bindings: firmware: qcom: Add compatible for IPQ8074 SoC
arm64: dts: Add support for scm on IPQ8074 SoCs
arm64: dts: qcom: Enable Q6v5 WCSS for ipq8074 SoC
.../devicetree/bindings/firmware/qcom,scm.txt | 1 +
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 127 +++++++++++++++++
drivers/clk/qcom/gcc-ipq8074.c | 1 +
drivers/remoteproc/qcom_q6v5_wcss.c | 157 +++++++++++++++++----
include/dt-bindings/clock/qcom,gcc-ipq8074.h | 1 +
5 files changed, 258 insertions(+), 29 deletions(-)
--
2.7.4
^ permalink raw reply
* [PATCH V5 09/10] arm64: dts: Add support for scm on IPQ8074 SoCs
From: Gokul Sriram Palanisamy @ 2020-05-13 9:31 UTC (permalink / raw)
To: gokulsri, sboyd, agross, bjorn.andersson, david.brown, devicetree,
jassisinghbrar, linux-arm-msm, linux-clk, linux-kernel,
linux-remoteproc, mark.rutland, mturquette, ohad, robh+dt,
sricharan, nprakash
In-Reply-To: <1589362265-22702-1-git-send-email-gokulsri@codeaurora.org>
Enables scm support, clock is not needed for enabling scm interface.
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 2b31823..4107614 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -10,6 +10,12 @@
model = "Qualcomm Technologies, Inc. IPQ8074";
compatible = "qcom,ipq8074";
+ firmware {
+ scm {
+ compatible = "qcom,scm-ipq8074", "qcom,scm";
+ };
+ };
+
soc: soc {
#address-cells = <0x1>;
#size-cells = <0x1>;
--
2.7.4
^ permalink raw reply related
* [PATCH V5 10/10] arm64: dts: qcom: Enable Q6v5 WCSS for ipq8074 SoC
From: Gokul Sriram Palanisamy @ 2020-05-13 9:31 UTC (permalink / raw)
To: gokulsri, sboyd, agross, bjorn.andersson, david.brown, devicetree,
jassisinghbrar, linux-arm-msm, linux-clk, linux-kernel,
linux-remoteproc, mark.rutland, mturquette, ohad, robh+dt,
sricharan, nprakash
In-Reply-To: <1589362265-22702-1-git-send-email-gokulsri@codeaurora.org>
Enable remoteproc WCSS PIL driver with glink
and ssr subdevices. Also configures shared memory
and enables smp2p and mailboxes required for IPC.
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 121 ++++++++++++++++++++++++++++++++++
1 file changed, 121 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 4107614..7d7bafe 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -10,12 +10,66 @@
model = "Qualcomm Technologies, Inc. IPQ8074";
compatible = "qcom,ipq8074";
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ smem_region: memory@4ab00000 {
+ no-map;
+ reg = <0x0 0x4ab00000 0x0 0x00100000>;
+ };
+
+ q6_region: memory@4b000000 {
+ no-map;
+ reg = <0x0 0x4b000000 0x0 0x05f00000>;
+ };
+ };
+
firmware {
scm {
compatible = "qcom,scm-ipq8074", "qcom,scm";
};
};
+ tcsr_mutex: hwlock@193d000 {
+ compatible = "qcom,tcsr-mutex";
+ syscon = <&tcsr_mutex_regs 0 0x80>;
+ #hwlock-cells = <1>;
+ };
+
+ smem {
+ compatible = "qcom,smem";
+ memory-region = <&smem_region>;
+ hwlocks = <&tcsr_mutex 0>;
+ };
+
+ wcss: smp2p-wcss {
+ compatible = "qcom,smp2p";
+ qcom,smem = <435>, <428>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <0 322 1>;
+
+ mboxes = <&apcs_glb 9>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <1>;
+
+ wcss_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ qcom,smp2p-feature-ssr-ack;
+ #qcom,smem-state-cells = <1>;
+ };
+
+ wcss_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
soc: soc {
#address-cells = <0x1>;
#size-cells = <0x1>;
@@ -432,6 +486,73 @@
"axi_m_sticky";
status = "disabled";
};
+
+ tcsr_q6: syscon@1945000 {
+ compatible = "syscon";
+ reg = <0x01945000 0xe000>;
+ };
+
+ tcsr_mutex_regs: syscon@193d000 {
+ compatible = "syscon";
+ reg = <0x01905000 0x8000>;
+ };
+
+ apcs_glb: mailbox@b111000 {
+ compatible = "qcom,ipq8074-apcs-apps-global";
+ reg = <0x0b111000 0x1000>;
+
+ #mbox-cells = <1>;
+ };
+
+ q6v5_wcss: q6v5_wcss@cd00000 {
+ compatible = "qcom,ipq8074-wcss-pil";
+ reg = <0x0cd00000 0x4040>,
+ <0x004ab000 0x20>;
+ reg-names = "qdsp6",
+ "rmb";
+ qca,auto-restart;
+ qca,extended-intc;
+ interrupts-extended = <&intc 0 325 1>,
+ <&wcss_smp2p_in 0 0>,
+ <&wcss_smp2p_in 1 0>,
+ <&wcss_smp2p_in 2 0>,
+ <&wcss_smp2p_in 3 0>;
+ interrupt-names = "wdog",
+ "fatal",
+ "ready",
+ "handover",
+ "stop-ack";
+
+ resets = <&gcc GCC_WCSSAON_RESET>,
+ <&gcc GCC_WCSS_BCR>,
+ <&gcc GCC_WCSS_Q6_BCR>;
+
+ reset-names = "wcss_aon_reset",
+ "wcss_reset",
+ "wcss_q6_reset";
+
+ clocks = <&gcc GCC_PRNG_AHB_CLK>;
+ clock-names = "prng";
+
+ qcom,halt-regs = <&tcsr_q6 0xa000 0xd000 0x0>;
+
+ qcom,smem-states = <&wcss_smp2p_out 0>,
+ <&wcss_smp2p_out 1>;
+ qcom,smem-state-names = "shutdown",
+ "stop";
+
+ memory-region = <&q6_region>;
+
+ glink-edge {
+ interrupts = <GIC_SPI 321 IRQ_TYPE_EDGE_RISING>;
+ qcom,remote-pid = <1>;
+ mboxes = <&apcs_glb 8>;
+
+ rpm_requests {
+ qcom,glink-channels = "IPCRTR";
+ };
+ };
+ };
};
cpus {
--
2.7.4
^ permalink raw reply related
* [PATCH] i2c: pxa: implement generic i2c bus recovery
From: Russell King @ 2020-05-13 9:33 UTC (permalink / raw)
To: linux-i2c
Cc: Andrew Lunn, devicetree, Gregory Clement, Jason Cooper,
linux-arm-kernel, Rob Herring, Sebastian Hesselbarth,
Vladimir Vid
Implement generic GPIO-based I2C bus recovery for the PXA I2C driver.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
drivers/i2c/busses/i2c-pxa.c | 176 +++++++++++++++++++++++++++++++----
1 file changed, 159 insertions(+), 17 deletions(-)
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index 0e194d6cd1b5..a7885b8b5031 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -20,6 +20,7 @@
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/errno.h>
+#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/interrupt.h>
@@ -28,6 +29,7 @@
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
+#include <linux/pinctrl/consumer.h>
#include <linux/platform_device.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/slab.h>
@@ -260,6 +262,11 @@ struct pxa_i2c {
bool highmode_enter;
u32 fm_mask;
u32 hs_mask;
+
+ struct i2c_bus_recovery_info recovery;
+ struct pinctrl *pinctrl;
+ struct pinctrl_state *pinctrl_default;
+ struct pinctrl_state *pinctrl_recovery;
};
#define _IBMR(i2c) ((i2c)->reg_ibmr)
@@ -559,13 +566,8 @@ static void i2c_pxa_set_slave(struct pxa_i2c *i2c, int errcode)
#define i2c_pxa_set_slave(i2c, err) do { } while (0)
#endif
-static void i2c_pxa_reset(struct pxa_i2c *i2c)
+static void i2c_pxa_do_reset(struct pxa_i2c *i2c)
{
- pr_debug("Resetting I2C Controller Unit\n");
-
- /* abort any transfer currently under way */
- i2c_pxa_abort(i2c);
-
/* reset according to 9.8 */
writel(ICR_UR, _ICR(i2c));
writel(I2C_ISR_INIT, _ISR(i2c));
@@ -584,12 +586,25 @@ static void i2c_pxa_reset(struct pxa_i2c *i2c)
#endif
i2c_pxa_set_slave(i2c, 0);
+}
+static void i2c_pxa_enable(struct pxa_i2c *i2c)
+{
/* enable unit */
writel(readl(_ICR(i2c)) | ICR_IUE, _ICR(i2c));
udelay(100);
}
+static void i2c_pxa_reset(struct pxa_i2c *i2c)
+{
+ pr_debug("Resetting I2C Controller Unit\n");
+
+ /* abort any transfer currently under way */
+ i2c_pxa_abort(i2c);
+ i2c_pxa_do_reset(i2c);
+ i2c_pxa_enable(i2c);
+}
+
#ifdef CONFIG_I2C_PXA_SLAVE
/*
@@ -1043,6 +1058,7 @@ static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
ret = i2c_pxa_wait_bus_not_busy(i2c);
if (ret) {
dev_err(&i2c->adap.dev, "i2c_pxa: timeout waiting for bus free\n");
+ i2c_recover_bus(&i2c->adap);
goto out;
}
@@ -1088,6 +1104,7 @@ static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
if (!timeout && i2c->msg_num) {
i2c_pxa_scream_blue_murder(i2c, "timeout with active message");
+ i2c_recover_bus(&i2c->adap);
ret = I2C_RETRY;
}
@@ -1277,6 +1294,129 @@ static int i2c_pxa_probe_pdata(struct platform_device *pdev,
return 0;
}
+static void i2c_pxa_prepare_recovery(struct i2c_adapter *adap)
+{
+ struct pxa_i2c *i2c = adap->algo_data;
+ u32 ibmr = readl(_IBMR(i2c));
+
+ /*
+ * Program the GPIOs to reflect the current I2C bus state while
+ * we transition to recovery; this avoids glitching the bus.
+ */
+ gpiod_set_value(i2c->recovery.scl_gpiod, ibmr & IBMR_SCLS);
+ gpiod_set_value(i2c->recovery.sda_gpiod, ibmr & IBMR_SDAS);
+
+ WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery));
+}
+
+static void i2c_pxa_unprepare_recovery(struct i2c_adapter *adap)
+{
+ struct pxa_i2c *i2c = adap->algo_data;
+ u32 isr;
+
+ /*
+ * The bus should now be free. Clear up the I2C controller before
+ * handing control of the bus back to avoid the bus changing state.
+ */
+ isr = readl(_ISR(i2c));
+ if (isr & (ISR_UB | ISR_IBB)) {
+ dev_dbg(&i2c->adap.dev,
+ "recovery: resetting controller, ISR=0x%08x\n", isr);
+ i2c_pxa_do_reset(i2c);
+ }
+
+ WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default));
+
+ dev_dbg(&i2c->adap.dev, "recovery: IBMR 0x%08x ISR 0x%08x\n",
+ readl(_IBMR(i2c)), readl(_ISR(i2c)));
+
+ i2c_pxa_enable(i2c);
+}
+
+static int i2c_pxa_init_recovery(struct pxa_i2c *i2c)
+{
+ struct i2c_bus_recovery_info *bri = &i2c->recovery;
+ struct device *dev = i2c->adap.dev.parent;
+
+ /*
+ * When slave mode is enabled, we are not the only master on the bus.
+ * Bus recovery can only be performed when we are the master, which
+ * we can't be certain of. Therefore, when slave mode is enabled, do
+ * not configure bus recovery.
+ */
+ if (IS_ENABLED(CONFIG_I2C_PXA_SLAVE))
+ return 0;
+
+ i2c->pinctrl = devm_pinctrl_get(dev);
+ if (IS_ERR(i2c->pinctrl))
+ return PTR_ERR(i2c->pinctrl);
+
+ if (!i2c->pinctrl)
+ return 0;
+
+ i2c->pinctrl_default = pinctrl_lookup_state(i2c->pinctrl,
+ PINCTRL_STATE_DEFAULT);
+ i2c->pinctrl_recovery = pinctrl_lookup_state(i2c->pinctrl, "recovery");
+
+ if (IS_ERR(i2c->pinctrl_default) || IS_ERR(i2c->pinctrl_recovery)) {
+ dev_info(dev, "missing pinmux recovery information: %ld %ld\n",
+ PTR_ERR(i2c->pinctrl_default),
+ PTR_ERR(i2c->pinctrl_recovery));
+ return 0;
+ }
+
+ /*
+ * Claiming GPIOs can influence the pinmux state, and may glitch the
+ * I2C bus. Do this carefully.
+ */
+ bri->scl_gpiod = devm_gpiod_get(dev, "scl", GPIOD_OUT_HIGH_OPEN_DRAIN);
+ if (bri->scl_gpiod == ERR_PTR(-EPROBE_DEFER))
+ return -EPROBE_DEFER;
+ if (IS_ERR(bri->scl_gpiod)) {
+ dev_info(dev, "missing scl gpio recovery information: %pe\n",
+ bri->scl_gpiod);
+ return 0;
+ }
+
+ /*
+ * We have SCL. Pull SCL low and wait a bit so that SDA glitches
+ * have no effect.
+ */
+ gpiod_direction_output(bri->scl_gpiod, 0);
+ udelay(10);
+ bri->sda_gpiod = devm_gpiod_get(dev, "sda", GPIOD_OUT_HIGH_OPEN_DRAIN);
+
+ /* Wait a bit in case of a SDA glitch, and then release SCL. */
+ udelay(10);
+ gpiod_direction_output(bri->scl_gpiod, 1);
+
+ if (bri->sda_gpiod == ERR_PTR(-EPROBE_DEFER))
+ return -EPROBE_DEFER;
+
+ if (IS_ERR(bri->sda_gpiod)) {
+ dev_info(dev, "missing sda gpio recovery information: %pe\n",
+ bri->sda_gpiod);
+ return 0;
+ }
+
+ bri->prepare_recovery = i2c_pxa_prepare_recovery;
+ bri->unprepare_recovery = i2c_pxa_unprepare_recovery;
+ bri->recover_bus = i2c_generic_scl_recovery;
+
+ i2c->adap.bus_recovery_info = bri;
+
+ /*
+ * Claiming GPIOs can change the pinmux state, which confuses the
+ * pinctrl since pinctrl's idea of the current setting is unaffected
+ * by the pinmux change caused by claiming the GPIO. Work around that
+ * by switching pinctrl to the GPIO state here. We do it this way to
+ * avoid glitching the I2C bus.
+ */
+ pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery);
+
+ return pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default);
+}
+
static int i2c_pxa_probe(struct platform_device *dev)
{
struct i2c_pxa_platform_data *plat = dev_get_platdata(&dev->dev);
@@ -1289,6 +1429,16 @@ static int i2c_pxa_probe(struct platform_device *dev)
if (!i2c)
return -ENOMEM;
+ /* Default adapter num to device id; i2c_pxa_probe_dt can override. */
+ i2c->adap.nr = dev->id;
+ i2c->adap.owner = THIS_MODULE;
+ i2c->adap.retries = 5;
+ i2c->adap.algo_data = i2c;
+ i2c->adap.dev.parent = &dev->dev;
+#ifdef CONFIG_OF
+ i2c->adap.dev.of_node = dev->dev.of_node;
+#endif
+
res = platform_get_resource(dev, IORESOURCE_MEM, 0);
i2c->reg_base = devm_ioremap_resource(&dev->dev, res);
if (IS_ERR(i2c->reg_base))
@@ -1298,8 +1448,9 @@ static int i2c_pxa_probe(struct platform_device *dev)
if (irq < 0)
return irq;
- /* Default adapter num to device id; i2c_pxa_probe_dt can override. */
- i2c->adap.nr = dev->id;
+ ret = i2c_pxa_init_recovery(i2c);
+ if (ret)
+ return ret;
ret = i2c_pxa_probe_dt(dev, i2c, &i2c_type);
if (ret > 0)
@@ -1307,9 +1458,6 @@ static int i2c_pxa_probe(struct platform_device *dev)
if (ret < 0)
return ret;
- i2c->adap.owner = THIS_MODULE;
- i2c->adap.retries = 5;
-
spin_lock_init(&i2c->lock);
init_waitqueue_head(&i2c->wait);
@@ -1375,12 +1523,6 @@ static int i2c_pxa_probe(struct platform_device *dev)
i2c_pxa_reset(i2c);
- i2c->adap.algo_data = i2c;
- i2c->adap.dev.parent = &dev->dev;
-#ifdef CONFIG_OF
- i2c->adap.dev.of_node = dev->dev.of_node;
-#endif
-
ret = i2c_add_numbered_adapter(&i2c->adap);
if (ret < 0)
goto ereqirq;
--
2.20.1
^ permalink raw reply related
* [PATCH] arm64: dts: add uDPU i2c bus recovery
From: Russell King @ 2020-05-13 9:33 UTC (permalink / raw)
To: linux-i2c
Cc: Andrew Lunn, devicetree, Gregory Clement, Jason Cooper,
linux-arm-kernel, Rob Herring, Sebastian Hesselbarth,
Vladimir Vid
Add support for bus recovery for the Armada 3720 based uDPU.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
.../boot/dts/marvell/armada-3720-uDPU.dts | 22 +++++++++++++++++--
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts
index 7eb6c1796cef..95d46e8d081c 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts
@@ -117,18 +117,36 @@
};
};
+&pinctrl_nb {
+ i2c1_recovery_pins: i2c1-recovery-pins {
+ groups = "i2c1";
+ function = "gpio";
+ };
+
+ i2c2_recovery_pins: i2c2-recovery-pins {
+ groups = "i2c2";
+ function = "gpio";
+ };
+};
+
&i2c0 {
status = "okay";
- pinctrl-names = "default";
+ pinctrl-names = "default", "recovery";
pinctrl-0 = <&i2c1_pins>;
+ pinctrl-1 = <&i2c1_recovery_pins>;
/delete-property/mrvl,i2c-fast-mode;
+ scl-gpios = <&gpionb 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpionb 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
};
&i2c1 {
status = "okay";
- pinctrl-names = "default";
+ pinctrl-names = "default", "recovery";
pinctrl-0 = <&i2c2_pins>;
+ pinctrl-1 = <&i2c2_recovery_pins>;
/delete-property/mrvl,i2c-fast-mode;
+ scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
lm75@48 {
status = "okay";
--
2.20.1
^ permalink raw reply related
* RE: [PATCH v7 RESEND 07/13] spi: imx: fix ERR009165
From: Robin Gong @ 2020-05-13 9:36 UTC (permalink / raw)
To: Sascha Hauer
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
catalin.marinas@arm.com, kernel@pengutronix.de,
shawnguo@kernel.org, will.deacon@arm.com,
linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
vkoul@kernel.org, robh+dt@kernel.org, dl-linux-imx,
martin.fuzzey@flowbird.group, u.kleine-koenig@pengutronix.de,
dmaengine@vger.kernel.org, dan.j.williams@intel.com,
festevam@gmail.com, linux-arm-kernel@lists.infradead.org,
l.stach@pengutronix.de
In-Reply-To: <20200513092017.GQ5877@pengutronix.de>
On 2020/05/13 Sascha Hauer <s.hauer@pengutronix.de> wrote:
> On Wed, May 13, 2020 at 09:05:33AM +0000, Robin Gong wrote:
> > On 2020/05/13 Sascha Hauer <s.hauer@pengutronix.de> wrote:d
> > > > drivers/spi/spi-imx.c | 16 ++++++++--------
> > > > 1 file changed, 8 insertions(+), 8 deletions(-)
> > > >
> > > > diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index
> > > > f4f28a4..70df8e6 100644
> > > > --- a/drivers/spi/spi-imx.c
> > > > +++ b/drivers/spi/spi-imx.c
> > > > @@ -585,8 +585,8 @@ static int mx51_ecspi_prepare_transfer(struct
> > > spi_imx_data *spi_imx,
> > > > ctrl |= mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk);
> > > > spi_imx->spi_bus_clk = clk;
> > > >
> > > > - if (spi_imx->usedma)
> > > > - ctrl |= MX51_ECSPI_CTRL_SMC;
> > > > + /* ERR009165: work in XHC mode as PIO */
> > > > + ctrl &= ~MX51_ECSPI_CTRL_SMC;
> > > >
> > > > writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
> > > >
> > > > @@ -617,7 +617,7 @@ static void mx51_setup_wml(struct spi_imx_data
> > > *spi_imx)
> > > > * and enable DMA request.
> > > > */
> > > > writel(MX51_ECSPI_DMA_RX_WML(spi_imx->wml - 1) |
> > > > - MX51_ECSPI_DMA_TX_WML(spi_imx->wml) |
> > > > + MX51_ECSPI_DMA_TX_WML(0) |
> > > > MX51_ECSPI_DMA_RXT_WML(spi_imx->wml) |
> > > > MX51_ECSPI_DMA_TEDEN | MX51_ECSPI_DMA_RXDEN |
> > > > MX51_ECSPI_DMA_RXTDEN, spi_imx->base +
> MX51_ECSPI_DMA);
> > > @@ -1171,7
> > > > +1171,11 @@ static int spi_imx_dma_configure(struct spi_master
> > > > +*master)
> > > > tx.direction = DMA_MEM_TO_DEV;
> > > > tx.dst_addr = spi_imx->base_phys + MXC_CSPITXDATA;
> > > > tx.dst_addr_width = buswidth;
> > > > - tx.dst_maxburst = spi_imx->wml;
> > > > + /*
> > > > + * For ERR009165 with tx_wml = 0 could enlarge burst size to fifo size
> > > > + * to speed up fifo filling as possible.
> > > > + */
> > > > + tx.dst_maxburst = spi_imx->devtype_data->fifo_size;
> > >
> > > In the next patch this is changed again to:
> > >
> > > + if (spi_imx->devtype_data->tx_glitch_fixed)
> > > + tx.dst_maxburst = spi_imx->wml;
> > > + else
> > > + tx.dst_maxburst = spi_imx->devtype_data->fifo_size;
> > >
> > > So with tx_glitch_fixed we end up with tx.dst_maxburst being the
> > > same as two patches before which is rather confusing. Better
> > > introduce tx_glitch_fixed in this patch, or maybe even merge this patch and
> the next one.
> > Sorry confused you, I should repleace 'tx_wml=0' in the above comments
> > with ' TX_THRESHOLD=0', which means tx transfer dma have to wait all
> > the tx data in tx fifo transferred with ERR009165 rather than
> > generically 'tx_wml' (for example --half fifo size used as
> > TX_THRESHOLD). Obviously TX_THRESHOLD=0 would down performance, so
> > enlarge dst_maxburst to fifo size as PIO with ERR009165. After
> > ERR009165 fixed at HW level. TX_THRESHOLD could be used as common
> > 'spi_imx->wml' so change it back. Will add more detail information in
> > v8.
>
> I am not confused, I meant the patches are confusing. What you are doing
> is:
>
> No patch:
> tx.dst_maxburst = a;
>
> 1st patch
> tx.dst_maxburst = b;
>
> 2nd patch:
>
> if (foo)
> tx.dst_maxburst = a;
> else
> tx.dst_maxburst = b;
>
> It would be better readable and understandable if you did that in one patch,
> because that would directly say "Under certain conditions we have to choose a,
> otherwise b". That's much better than changing "a" to "b" and then to "a or b"
>
Okay, I'll merge those 2 changes into the next 08/13.
^ permalink raw reply
* Re: [PATCH V4 3/5] iio: adc: Add support for PMIC7 ADC
From: Andy Shevchenko @ 2020-05-13 9:48 UTC (permalink / raw)
To: Jishnu Prakash
Cc: agross, Bjorn Andersson, devicetree, Linux Kernel Mailing List,
Matthias Kaehlcke, Linus Walleij, Jonathan Cameron, Amit Kucheria,
smohanad, kgunda, aghayal, Jonathan Cameron, Hartmut Knaack,
Lars-Peter Clausen, Peter Meerwald-Stadler, linux-arm-msm,
linux-iio, linux-arm-msm-owner
In-Reply-To: <1589361736-816-4-git-send-email-jprakash@codeaurora.org>
On Wed, May 13, 2020 at 12:23 PM Jishnu Prakash <jprakash@codeaurora.org> wrote:
>
> The ADC architecture on PMIC7 is changed as compared to PMIC5. The
> major change from PMIC5 is that all SW communication to ADC goes through
> PMK8350, which communicates with other PMICs through PBS when the ADC
> on PMK8350 works in master mode. The SID register is used to identify the
> PMICs with which the PBS needs to communicate. Add support for the same.
> +#define ADC7_CONV_TIMEOUT msecs_to_jiffies(10)
...
> + ret = adc5_read(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf));
> + if (ret < 0)
Is ' < 0' part necessary?
Ditto for same cases in other places in the code.
> + return ret;
...
> + switch (mask) {
> + case IIO_CHAN_INFO_PROCESSED:
> + ret = adc7_do_conversion(adc, prop, chan,
> + &adc_code_volt, &adc_code_cur);
> + if (ret)
> + return ret;
> +
> + ret = qcom_adc5_hw_scale(prop->scale_fn_type,
> + &adc5_prescale_ratios[prop->prescale],
> + adc->data,
> + adc_code_volt, val);
> +
> + if (ret)
> + return ret;
> +
> + return IIO_VAL_INT;
> + default:
> + return -EINVAL;
> + }
> +
> + return 0;
Dead code?
...
> +static int qcom_vadc7_scale_hw_calib_die_temp(
> + const struct vadc_prescale_ratio *prescale,
> + const struct adc5_data *data,
> + u16 adc_code, int *result_mdec)
> +{
> +
> + int voltage, vtemp0, temp, i = ARRAY_SIZE(adcmap7_die_temp) - 1;
How assignment to i is useful?
> + voltage = qcom_vadc_scale_code_voltage_factor(adc_code,
> + prescale, data, 1);
> +
> + if (adcmap7_die_temp[0].x > voltage) {
> + *result_mdec = DIE_TEMP_ADC7_SCALE_1;
> + return 0;
> + } else if (adcmap7_die_temp[i].x <= voltage) {
Redundant 'else'.
> + *result_mdec = DIE_TEMP_ADC7_MAX;
> + return 0;
> + }
> +
> + for (i = 0; i < ARRAY_SIZE(adcmap7_die_temp); i++)
> + if (adcmap7_die_temp[i].x > voltage)
> + break;
> +
> + vtemp0 = adcmap7_die_temp[i - 1].x;
> + voltage = voltage - vtemp0;
> + temp = div64_s64(voltage * DIE_TEMP_ADC7_SCALE_FACTOR,
> + adcmap7_die_temp[i - 1].y);
> + temp += DIE_TEMP_ADC7_SCALE_1 + (DIE_TEMP_ADC7_SCALE_2 * (i - 1));
> + *result_mdec = temp;
> +
> + return 0;
> +}
...
> +#define RATIO_MAX_ADC7 0x4000
Hmm... Why the last is in hex? Is it related to amount of bits in the
hardware? Then probably better to use BIT().
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* [PATCH v3 2/7] extcon: arizona: Move binding over to dtschema
From: Charles Keepax @ 2020-05-13 9:57 UTC (permalink / raw)
To: cw00.choi, robh+dt, lee.jones, linus.walleij, broonie
Cc: myungjoo.ham, lgirdwood, linux-kernel, devicetree, patches
In-Reply-To: <20200513095720.8867-1-ckeepax@opensource.cirrus.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
---
No changes since v2.
Thanks,
Charles
.../devicetree/bindings/extcon/extcon-arizona.txt | 76 -------------
.../devicetree/bindings/extcon/wlf,arizona.yaml | 125 +++++++++++++++++++++
2 files changed, 125 insertions(+), 76 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/extcon/extcon-arizona.txt
create mode 100644 Documentation/devicetree/bindings/extcon/wlf,arizona.yaml
diff --git a/Documentation/devicetree/bindings/extcon/extcon-arizona.txt b/Documentation/devicetree/bindings/extcon/extcon-arizona.txt
deleted file mode 100644
index 208daaff0be4f..0000000000000
--- a/Documentation/devicetree/bindings/extcon/extcon-arizona.txt
+++ /dev/null
@@ -1,76 +0,0 @@
-Cirrus Logic Arizona class audio SoCs
-
-These devices are audio SoCs with extensive digital capabilities and a range
-of analogue I/O.
-
-This document lists Extcon specific bindings, see the primary binding document:
- ../mfd/arizona.txt
-
-Optional properties:
-
- - wlf,hpdet-channel : Headphone detection channel.
- ARIZONA_ACCDET_MODE_HPL or 1 - Headphone detect mode is set to HPDETL
- ARIZONA_ACCDET_MODE_HPR or 2 - Headphone detect mode is set to HPDETR
- If this node is not mentioned or if the value is unknown, then
- headphone detection mode is set to HPDETL.
-
- - wlf,use-jd2 : Use the additional JD input along with JD1 for dual pin jack
- detection.
- - wlf,use-jd2-nopull : Internal pull on JD2 is disabled when used for
- jack detection.
- - wlf,jd-invert : Invert the polarity of the jack detection switch
-
- - wlf,micd-software-compare : Use a software comparison to determine mic
- presence
- - wlf,micd-detect-debounce : Additional software microphone detection
- debounce specified in milliseconds.
- - wlf,micd-pol-gpio : GPIO specifier for the GPIO controlling the headset
- polarity if one exists.
- - wlf,micd-bias-start-time : Time allowed for MICBIAS to startup prior to
- performing microphone detection, specified as per the ARIZONA_MICD_TIME_XXX
- defines.
- - wlf,micd-rate : Delay between successive microphone detection measurements,
- specified as per the ARIZONA_MICD_TIME_XXX defines.
- - wlf,micd-dbtime : Microphone detection hardware debounces specified as the
- number of measurements to take, valid values being 2 and 4.
- - wlf,micd-timeout-ms : Timeout for microphone detection, specified in
- milliseconds.
- - wlf,micd-force-micbias : Force MICBIAS continuously on during microphone
- detection.
- - wlf,micd-configs : Headset polarity configurations (generally used for
- detection of CTIA / OMTP headsets), the field can be of variable length
- but should always be a multiple of 3 cells long, each three cell group
- represents one polarity configuration.
- The first cell defines the accessory detection pin, zero will use MICDET1
- and all other values will use MICDET2.
- The second cell represents the MICBIAS to be used.
- The third cell represents the value of the micd-pol-gpio pin.
-
- - wlf,gpsw : Settings for the general purpose switch, set as one of the
- ARIZONA_GPSW_XXX defines.
-
-Example:
-
-codec: wm8280@0 {
- compatible = "wlf,wm8280";
- reg = <0>;
- ...
-
- wlf,use-jd2;
- wlf,use-jd2-nopull;
- wlf,jd-invert;
-
- wlf,micd-software-compare;
- wlf,micd-detect-debounce = <0>;
- wlf,micd-pol-gpio = <&codec 2 0>;
- wlf,micd-rate = <ARIZONA_MICD_TIME_8MS>;
- wlf,micd-dbtime = <4>;
- wlf,micd-timeout-ms = <100>;
- wlf,micd-force-micbias;
- wlf,micd-configs = <
- 0 1 0 /* MICDET1 MICBIAS1 GPIO=low */
- 1 2 1 /* MICDET2 MICBIAS2 GPIO=high */
- >;
-
- wlf,gpsw = <ARIZONA_GPSW_OPEN>;
-};
diff --git a/Documentation/devicetree/bindings/extcon/wlf,arizona.yaml b/Documentation/devicetree/bindings/extcon/wlf,arizona.yaml
new file mode 100644
index 0000000000000..f9845dc2f5ae5
--- /dev/null
+++ b/Documentation/devicetree/bindings/extcon/wlf,arizona.yaml
@@ -0,0 +1,125 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/extcon/wlf,arizona.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logic/Wolfson Microelectronics Arizona class audio SoCs
+
+maintainers:
+ - patches@opensource.cirrus.com
+
+description: |
+ These devices are audio SoCs with extensive digital capabilities and a
+ range of analogue I/O.
+
+ This document lists Extcon specific bindings, see the primary binding
+ document ../mfd/arizona.yaml
+
+properties:
+ wlf,hpdet-channel:
+ description:
+ Headphone detection channel. ARIZONA_ACCDET_MODE_HPL/1 sets the
+ headphone detect mode to HPDETL, ARIZONA_ACCDET_MODE_HPR/2 sets it
+ to HPDETR. If this node is not included or if the value is unknown,
+ then headphone detection mode is set to HPDETL.
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ minimum: 1
+ maximum: 2
+
+ wlf,use-jd2:
+ description:
+ Use the additional JD input along with JD1 for dual pin jack detection.
+ type: boolean
+
+ wlf,use-jd2-nopull:
+ description:
+ Internal pull on JD2 is disabled when used for jack detection.
+ type: boolean
+
+ wlf,jd-invert:
+ description:
+ Invert the polarity of the jack detection switch.
+ type: boolean
+
+ wlf,micd-software-compare:
+ description:
+ Use a software comparison to determine mic presence.
+ type: boolean
+
+ wlf,micd-detect-debounce:
+ description:
+ Additional software microphone detection debounce specified in
+ milliseconds.
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+
+ wlf,micd-pol-gpio:
+ description:
+ GPIO specifier for the GPIO controlling the headset polarity if one
+ exists.
+ maxItems: 1
+
+ wlf,micd-bias-start-time:
+ description:
+ Time allowed for MICBIAS to startup prior to performing microphone
+ detection, specified as per the ARIZONA_MICD_TIME_XXX defines.
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ minimum: 0
+ maximum: 12
+
+ wlf,micd-rate:
+ description:
+ Delay between successive microphone detection measurements, specified
+ as per the ARIZONA_MICD_TIME_XXX defines.
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ minimum: 0
+ maximum: 12
+
+ wlf,micd-dbtime:
+ description:
+ Microphone detection hardware debounces specified as the number of
+ measurements to take.
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ enum: [2, 4]
+
+ wlf,micd-timeout-ms:
+ description:
+ Timeout for microphone detection, specified in milliseconds.
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+
+ wlf,micd-force-micbias:
+ description:
+ Force MICBIAS continuously on during microphone detection.
+ type: boolean
+
+ wlf,micd-configs:
+ description:
+ Headset polarity configurations (generally used for detection of
+ CTIA / OMTP headsets), the field can be of variable length but
+ should always be a multiple of 3 cells long, each three cell group
+ represents one polarity configuration.
+ $ref: "/schemas/types.yaml#/definitions/uint32-matrix"
+ items:
+ items:
+ - description:
+ The first cell defines the accessory detection pin, zero
+ will use MICDET1 and 0x2000 will use MICDET2.
+ enum: [ 0, 0x2000 ]
+ - description:
+ The second cell represents the MICBIAS to be used. Zero
+ will use MICVDD, 1-3 will use MICBIASx.
+ minimum: 0
+ maximum: 3
+ - description:
+ The third cell represents the value of the micd-pol-gpio
+ pin.
+ minimum: 0
+ maximum: 1
+
+ wlf,gpsw:
+ description:
+ Settings for the general purpose switch, set as one of the
+ ARIZONA_GPSW_XXX defines.
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ minimum: 0
+ maximum: 3
--
2.11.0
^ permalink raw reply related
* [PATCH v3 6/7] pinctrl: madera: Move binding over to dtschema
From: Charles Keepax @ 2020-05-13 9:57 UTC (permalink / raw)
To: cw00.choi, robh+dt, lee.jones, linus.walleij, broonie
Cc: myungjoo.ham, lgirdwood, linux-kernel, devicetree, patches
In-Reply-To: <20200513095720.8867-1-ckeepax@opensource.cirrus.com>
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
---
Changes since v2:
- Remove some more redundant descriptions
- Force pinctrl node to be called "pin-settings"
- Force suffix on individual config nodes to -pins
Thanks,
Charles
.../bindings/pinctrl/cirrus,madera-pinctrl.txt | 99 -----------------
.../devicetree/bindings/pinctrl/cirrus,madera.yaml | 122 +++++++++++++++++++++
2 files changed, 122 insertions(+), 99 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/pinctrl/cirrus,madera-pinctrl.txt
create mode 100644 Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml
diff --git a/Documentation/devicetree/bindings/pinctrl/cirrus,madera-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/cirrus,madera-pinctrl.txt
deleted file mode 100644
index b0e36cf0d289e..0000000000000
--- a/Documentation/devicetree/bindings/pinctrl/cirrus,madera-pinctrl.txt
+++ /dev/null
@@ -1,99 +0,0 @@
-Cirrus Logic Madera class audio codecs pinctrl driver
-
-The Cirrus Logic Madera codecs provide a number of GPIO functions for
-interfacing to external hardware and to provide logic outputs to other devices.
-Certain groups of GPIO pins also have an alternate function, normally as an
-audio interface.
-
-The set of available GPIOs, functions and alternate function groups differs
-between codecs so refer to the datasheet for the codec for further information
-on what is supported on that device.
-
-The properties for this driver exist within the parent MFD driver node.
-
-See also
- the core bindings for the parent MFD driver:
- Documentation/devicetree/bindings/mfd/madera.txt
-
- the generic pinmix bindings:
- Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
-
-Required properties of parent mfd node:
- - pinctrl-names : must be "default"
- - pinctrl-0 : a phandle to the node containing the subnodes containing default
- configurations
-
-Required subnodes:
- One subnode is required to contain the default settings. It contains an
- arbitrary number of configuration subnodes, one for each group or pin
- configuration you want to apply as a default.
-
-Required properties of configuration subnodes:
- - groups : name of one pin group to configure. One of:
- aif1, aif2, aif3, aif4, mif1, mif2, mif3, pdmspk1, pdmspk2,
- dmic4, dmic5, dmic6,
- gpio1, gpio2, ..., gpio40
- The gpioN groups select the single pin of this name for configuration
-
-Optional properties of configuration subnodes:
- Any configuration option not explicitly listed in the dts will be left at
- chip default setting.
-
- - function : name of function to assign to this group. One of:
- aif1, aif2, aif3, aif4, mif1, mif2, mif3, pdmspk1, pdmspk2,
- dmic3, dmic4, dmic5, dmic6,
- io, dsp-gpio, irq1, irq2,
- fll1-clk, fll1-lock, fll2-clk, fll2-lock, fll3-clk, fll3-lock,
- fllao-clk, fllao-lock,
- opclk, opclk-async, pwm1, pwm2, spdif,
- asrc1-in1-lock, asrc1-in2-lock, asrc2-in1-lock, asrc2-in2-lock,
- spkl-short-circuit, spkr-short-circuit, spk-shutdown,
- spk-overheat-shutdown, spk-overheat-warn,
- timer1-sts, timer2-sts, timer3-sts, timer4-sts, timer5-sts, timer6-sts,
- timer7-sts, timer8-sts,
- log1-fifo-ne, log2-fifo-ne, log3-fifo-ne, log4-fifo-ne, log5-fifo-ne,
- log6-fifo-ne, log7-fifo-ne, log8-fifo-ne,
-
- - bias-disable : disable pull-up and pull-down
- - bias-bus-hold : enable buskeeper
- - bias-pull-up : output is pulled-up
- - bias-pull-down : output is pulled-down
- - drive-push-pull : CMOS output
- - drive-open-drain : open-drain output
- - drive-strength : drive strength in mA. Valid values are 4 or 8
- - input-schmitt-enable : enable schmitt-trigger mode
- - input-schmitt-disable : disable schmitt-trigger mode
- - input-debounce : A value of 0 disables debounce, a value !=0 enables
- debounce
- - output-low : set the pin to output mode with low level
- - output-high : set the pin to output mode with high level
-
-Example:
-
-cs47l85@0 {
- compatible = "cirrus,cs47l85";
-
- pinctrl-names = "default";
- pinctrl-0 = <&cs47l85_defaults>;
-
- cs47l85_defaults: cs47l85-gpio-defaults {
- aif1 {
- groups = "aif1";
- function = "aif1";
- bias-bus-hold;
- };
-
- aif2 {
- groups = "aif2";
- function = "aif2";
- bias-bus-hold;
- };
-
- opclk {
- groups = "gpio1";
- function = "opclk";
- bias-pull-up;
- drive-strength = <8>;
- };
- };
-};
diff --git a/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml b/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml
new file mode 100644
index 0000000000000..6bfc25d0e1b33
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml
@@ -0,0 +1,122 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/cirrus,madera.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logic Madera class audio CODECs pinctrl driver
+
+maintainers:
+ - patches@opensource.cirrus.com
+
+description: |
+ The Cirrus Logic Madera codecs provide a number of GPIO functions for
+ interfacing to external hardware and to provide logic outputs to other devices.
+ Certain groups of GPIO pins also have an alternate function, normally as an
+ audio interface.
+
+ The set of available GPIOs, functions and alternate function groups differs
+ between CODECs so refer to the datasheet for the CODEC for further information
+ on what is supported on that device.
+
+ The properties for this driver exist within the parent MFD driver node.
+
+ See also the core bindings for the parent MFD driver:
+
+ Documentation/devicetree/bindings/mfd/cirrus,madera.yaml
+
+ And the generic pinmix bindings:
+
+ Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
+
+properties:
+ pinctrl-0:
+ description:
+ A phandle to the node containing the subnodes containing default
+ configurations.
+
+ pinctrl-names:
+ description:
+ A pinctrl state named "default" must be defined.
+ const: default
+
+ pin-settings:
+ description:
+ One subnode is required to contain the default settings. It
+ contains an arbitrary number of configuration subnodes, one for
+ each group or pin configuration you want to apply as a default.
+ type: object
+ patternProperties:
+ '-pins$':
+ type: object
+ allOf:
+ - $ref: "pincfg-node.yaml#"
+ - $ref: "pinmux-node.yaml#"
+ properties:
+ groups:
+ description:
+ Name of one pin group to configure.
+ enum: [ aif1, aif2, aif3, aif4, mif1, mif2, mif3, pdmspk1,
+ pdmspk2, dmic4, dmic5, dmic6, gpio1, gpio2, gpio3,
+ gpio4, gpio5, gpio6, gpio7, gpio7, gpio8, gpio9,
+ gpio10, gpio11, gpio12, gpio13, gpio14, gpio15,
+ gpio16, gpio17, gpio17, gpio18, gpio19, gpio20,
+ gpio21, gpio22, gpio23, gpio24, gpio25, gpio26,
+ gpio27, gpio27, gpio28, gpio29, gpio30, gpio31,
+ gpio32, gpio33, gpio34, gpio35, gpio36, gpio37,
+ gpio37, gpio38, gpio39 ]
+
+ function:
+ description:
+ Name of function to assign to this group.
+ enum: [ aif1, aif2, aif3, aif4, mif1, mif2, mif3,
+ pdmspk1, pdmspk2, dmic3, dmic4, dmic5,
+ dmic6, io, dsp-gpio, irq1, irq2, fll1-clk,
+ fll1-lock, fll2-clk, fll2-lock, fll3-clk,
+ fll3-lock, fllao-clk, fllao-lock, opclk,
+ opclk-async, pwm1, pwm2, spdif, asrc1-in1-lock,
+ asrc1-in2-lock, asrc2-in1-lock, asrc2-in2-lock,
+ spkl-short-circuit, spkr-short-circuit,
+ spk-shutdown, spk-overheat-shutdown,
+ spk-overheat-warn, timer1-sts, timer2-sts,
+ timer3-sts, timer4-sts, timer5-sts, timer6-sts,
+ timer7-sts, timer8-sts, log1-fifo-ne,
+ log2-fifo-ne, log3-fifo-ne, log4-fifo-ne,
+ log5-fifo-ne, log6-fifo-ne, log7-fifo-ne,
+ log8-fifo-ne ]
+
+ bias-disable: true
+
+ bias-bus-hold: true
+
+ bias-pull-up: true
+
+ bias-pull-down: true
+
+ drive-push-pull: true
+
+ drive-open-drain: true
+
+ drive-strength:
+ enum: [ 4, 8 ]
+
+ input-schmitt-enable: true
+
+ input-schmitt-disable: true
+
+ input-debounce: true
+
+ output-low: true
+
+ output-high: true
+
+ additionalProperties: false
+
+ required:
+ - groups
+
+ additionalProperties: false
+
+required:
+ - pinctrl-0
+ - pinctrl-names
--
2.11.0
^ permalink raw reply related
* [PATCH v3 3/7] ASoC: arizona: Move binding over to dtschema
From: Charles Keepax @ 2020-05-13 9:57 UTC (permalink / raw)
To: cw00.choi, robh+dt, lee.jones, linus.walleij, broonie
Cc: myungjoo.ham, lgirdwood, linux-kernel, devicetree, patches
In-Reply-To: <20200513095720.8867-1-ckeepax@opensource.cirrus.com>
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
---
No changes since v2.
Thanks,
Charles
.../devicetree/bindings/sound/wlf,arizona.txt | 53 ----------
.../devicetree/bindings/sound/wlf,arizona.yaml | 114 +++++++++++++++++++++
2 files changed, 114 insertions(+), 53 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/sound/wlf,arizona.txt
create mode 100644 Documentation/devicetree/bindings/sound/wlf,arizona.yaml
diff --git a/Documentation/devicetree/bindings/sound/wlf,arizona.txt b/Documentation/devicetree/bindings/sound/wlf,arizona.txt
deleted file mode 100644
index e172c62dc2dff..0000000000000
--- a/Documentation/devicetree/bindings/sound/wlf,arizona.txt
+++ /dev/null
@@ -1,53 +0,0 @@
-Cirrus Logic Arizona class audio SoCs
-
-These devices are audio SoCs with extensive digital capabilities and a range
-of analogue I/O.
-
-This document lists sound specific bindings, see the primary binding
-document:
- ../mfd/arizona.txt
-
-Optional properties:
-
- - wlf,inmode : A list of INn_MODE register values, where n is the number
- of input signals. Valid values are 0 (Differential), 1 (Single-ended) and
- 2 (Digital Microphone). If absent, INn_MODE registers set to 0 by default.
- If present, values must be specified less than or equal to the number of
- input signals. If values less than the number of input signals, elements
- that have not been specified are set to 0 by default. Entries are:
- <IN1, IN2, IN3, IN4> (wm5102, wm5110, wm8280, wm8997)
- <IN1A, IN2A, IN1B, IN2B> (wm8998, wm1814)
- - wlf,out-mono : A list of boolean values indicating whether each output is
- mono or stereo. Position within the list indicates the output affected
- (eg. First entry in the list corresponds to output 1). A non-zero value
- indicates a mono output. If present, the number of values should be less
- than or equal to the number of outputs, if less values are supplied the
- additional outputs will be treated as stereo.
-
- - wlf,dmic-ref : DMIC reference voltage source for each input, can be
- selected from either MICVDD or one of the MICBIAS's, defines
- (ARIZONA_DMIC_xxxx) are provided in <dt-bindings/mfd/arizona.txt>. If
- present, the number of values should be less than or equal to the
- number of inputs, unspecified inputs will use the chip default.
-
- - wlf,max-channels-clocked : The maximum number of channels to be clocked on
- each AIF, useful for I2S systems with multiple data lines being mastered.
- Specify one cell for each AIF to be configured, specify zero for AIFs that
- should be handled normally.
- If present, number of cells must be less than or equal to the number of
- AIFs. If less than the number of AIFs, for cells that have not been
- specified the corresponding AIFs will be treated as default setting.
-
- - wlf,spk-fmt : PDM speaker data format, must contain 2 cells (OUT5 and OUT6).
- See the datasheet for values.
- The second cell is ignored for codecs that do not have OUT6 (wm5102, wm8997,
- wm8998, wm1814)
-
- - wlf,spk-mute : PDM speaker mute setting, must contain 2 cells (OUT5 and OUT6).
- See the datasheet for values.
- The second cell is ignored for codecs that do not have OUT6 (wm5102, wm8997,
- wm8998, wm1814)
-
- - wlf,out-volume-limit : The volume limit value that should be applied to each
- output channel. See the datasheet for exact values. Channels are specified
- in the order OUT1L, OUT1R, OUT2L, OUT2R, etc.
diff --git a/Documentation/devicetree/bindings/sound/wlf,arizona.yaml b/Documentation/devicetree/bindings/sound/wlf,arizona.yaml
new file mode 100644
index 0000000000000..22d54be7900a7
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/wlf,arizona.yaml
@@ -0,0 +1,114 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/wlf,arizona.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logic/Wolfson Microelectronics Arizona class audio SoCs
+
+maintainers:
+ - patches@opensource.cirrus.com
+
+description: |
+ These devices are audio SoCs with extensive digital capabilities and a range
+ of analogue I/O.
+
+ This document lists sound specific bindings, see the primary binding
+ document ../mfd/arizona.yaml
+
+properties:
+ '#sound-dai-cells':
+ description:
+ The first cell indicating the audio interface.
+ const: 1
+
+ wlf,inmode:
+ description:
+ A list of INn_MODE register values, where n is the number of input
+ signals. Valid values are 0 (Differential), 1 (Single-ended) and
+ 2 (Digital Microphone). If absent, INn_MODE registers set to 0 by
+ default. If present, values must be specified less than or equal
+ to the number of input signals. If values less than the number of
+ input signals, elements that have not been specified are set to 0 by
+ default. Entries are <IN1, IN2, IN3, IN4> (wm5102, wm5110, wm8280,
+ wm8997) and <IN1A, IN2A, IN1B, IN2B> (wm8998, wm1814)
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 1
+ maxItems: 4
+ items:
+ minimum: 0
+ maximum: 2
+ default: 0
+
+ wlf,out-mono:
+ description:
+ A list of boolean values indicating whether each output is mono
+ or stereo. Position within the list indicates the output affected
+ (eg. First entry in the list corresponds to output 1). A non-zero
+ value indicates a mono output. If present, the number of values
+ should be less than or equal to the number of outputs, if less values
+ are supplied the additional outputs will be treated as stereo.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 1
+ maxItems: 6
+ items:
+ minimum: 0
+ maximum: 1
+ default: 0
+
+ wlf,dmic-ref:
+ description:
+ DMIC reference voltage source for each input, can be selected from
+ either MICVDD or one of the MICBIAS's, defines (ARIZONA_DMIC_xxxx)
+ are provided in dt-bindings/mfd/arizona.h. If present, the number
+ of values should be less than or equal to the number of inputs,
+ unspecified inputs will use the chip default.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 1
+ maxItems: 4
+ items:
+ minimum: 0
+ maximum: 3
+ default: 0
+
+ wlf,max-channels-clocked:
+ description:
+ The maximum number of channels to be clocked on each AIF, useful for
+ I2S systems with multiple data lines being mastered. Specify one
+ cell for each AIF to be configured, specify zero for AIFs that should
+ be handled normally. If present, number of cells must be less than
+ or equal to the number of AIFs. If less than the number of AIFs, for
+ cells that have not been specified the corresponding AIFs will be
+ treated as default setting.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 1
+ maxItems: 3
+ items:
+ default: 0
+
+ wlf,spk-fmt:
+ description:
+ PDM speaker data format, must contain 2 cells (OUT5 and OUT6). See
+ the datasheet for values. The second cell is ignored for codecs that
+ do not have OUT6 (wm5102, wm8997, wm8998, wm1814)
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 2
+ maxItems: 2
+
+ wlf,spk-mute:
+ description:
+ PDM speaker mute setting, must contain 2 cells (OUT5 and OUT6). See
+ the datasheet for values. The second cell is ignored for codecs that
+ do not have OUT6 (wm5102, wm8997, wm8998, wm1814)
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 2
+ maxItems: 2
+
+ wlf,out-volume-limit:
+ description:
+ The volume limit value that should be applied to each output
+ channel. See the datasheet for exact values. Channels are specified
+ in the order OUT1L, OUT1R, OUT2L, OUT2R, etc.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 1
+ maxItems: 12
--
2.11.0
^ permalink raw reply related
* [PATCH v3 4/7] mfd: arizona: Move binding over to dtschema
From: Charles Keepax @ 2020-05-13 9:57 UTC (permalink / raw)
To: cw00.choi, robh+dt, lee.jones, linus.walleij, broonie
Cc: myungjoo.ham, lgirdwood, linux-kernel, devicetree, patches
In-Reply-To: <20200513095720.8867-1-ckeepax@opensource.cirrus.com>
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
---
Changes since v2:
- Removed a couple more redundant descriptions
Thanks,
Charles
Documentation/devicetree/bindings/mfd/arizona.txt | 101 -------
.../devicetree/bindings/mfd/wlf,arizona.yaml | 289 +++++++++++++++++++++
MAINTAINERS | 8 +-
3 files changed, 293 insertions(+), 105 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mfd/arizona.txt
create mode 100644 Documentation/devicetree/bindings/mfd/wlf,arizona.yaml
diff --git a/Documentation/devicetree/bindings/mfd/arizona.txt b/Documentation/devicetree/bindings/mfd/arizona.txt
deleted file mode 100644
index 148ef621a5e5d..0000000000000
--- a/Documentation/devicetree/bindings/mfd/arizona.txt
+++ /dev/null
@@ -1,101 +0,0 @@
-Cirrus Logic/Wolfson Microelectronics Arizona class audio SoCs
-
-These devices are audio SoCs with extensive digital capabilities and a range
-of analogue I/O.
-
-Required properties:
-
- - compatible : One of the following chip-specific strings:
- "cirrus,cs47l24"
- "wlf,wm5102"
- "wlf,wm5110"
- "wlf,wm8280"
- "wlf,wm8997"
- "wlf,wm8998"
- "wlf,wm1814"
- "wlf,wm1831"
-
- - reg : I2C slave address when connected using I2C, chip select number when
- using SPI.
-
- - interrupts : The interrupt line the /IRQ signal for the device is
- connected to.
- - interrupt-controller : Arizona class devices contain interrupt controllers
- and may provide interrupt services to other devices.
- - #interrupt-cells: the number of cells to describe an IRQ, this should be 2.
- The first cell is the IRQ number.
- The second cell is the flags, encoded as the trigger masks from
- Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
-
- - gpio-controller : Indicates this device is a GPIO controller.
- - #gpio-cells : Must be 2. The first cell is the pin number and the
- second cell is used to specify optional parameters, see ../gpio/gpio.txt
- for details.
-
- - AVDD-supply, DBVDD1-supply, CPVDD-supply : Power supplies for the device,
- as covered in Documentation/devicetree/bindings/regulator/regulator.txt
-
- - DBVDD2-supply, DBVDD3-supply : Additional databus power supplies (wm5102,
- wm5110, wm8280, wm8998, wm1814)
-
- - SPKVDDL-supply, SPKVDDR-supply : Speaker driver power supplies (wm5102,
- wm5110, wm8280, wm8998, wm1814)
-
- - SPKVDD-supply : Speaker driver power supply (wm8997)
-
- - DCVDD-supply : Main power supply (cs47l24, wm1831)
-
- - MICVDD-supply : Microphone power supply (cs47l24, wm1831)
-
-Optional properties:
-
- - reset-gpios : GPIO specifier for the GPIO controlling /RESET
-
- - clocks: Should reference the clocks supplied on MCLK1 and MCLK2
- - clock-names: Should contains two strings:
- "mclk1" for the clock supplied on MCLK1, recommended to be a high
- quality audio reference clock
- "mclk2" for the clock supplied on MCLK2, recommended to be an always on
- 32k clock
-
- - wlf,gpio-defaults : A list of GPIO configuration register values. Defines
- for the appropriate values can found in <dt-bindings/mfd/arizona.txt>. If
- absent, no configuration of these registers is performed. If any entry has
- a value that is out of range for a 16 bit register then the chip default
- will be used. If present exactly five values must be specified.
-
- - DCVDD-supply, MICVDD-supply : Power supplies, only need to be specified if
- they are being externally supplied. As covered in
- Documentation/devicetree/bindings/regulator/regulator.txt
- (wm5102, wm5110, wm8280, wm8997, wm8998, wm1814)
-
-Deprecated properties:
-
- - wlf,reset : GPIO specifier for the GPIO controlling /RESET
-
-Also see child specific device properties:
- Regulator - ../regulator/arizona-regulator.txt
- Extcon - ../extcon/extcon-arizona.txt
- Sound - ../sound/wlf,arizona.txt
-
-Example:
-
-codec: wm5102@1a {
- compatible = "wlf,wm5102";
- reg = <0x1a>;
- interrupts = <347>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupt-parent = <&gic>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- wlf,gpio-defaults = <
- ARIZONA_GP_FN_TXLRCLK
- ARIZONA_GP_DEFAULT
- ARIZONA_GP_DEFAULT
- ARIZONA_GP_DEFAULT
- ARIZONA_GP_DEFAULT
- >;
-};
diff --git a/Documentation/devicetree/bindings/mfd/wlf,arizona.yaml b/Documentation/devicetree/bindings/mfd/wlf,arizona.yaml
new file mode 100644
index 0000000000000..14b6aac64a7e0
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/wlf,arizona.yaml
@@ -0,0 +1,289 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/wlf,arizona.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logic/Wolfson Microelectronics Arizona class audio SoCs
+
+maintainers:
+ - patches@opensource.cirrus.com
+
+description: |
+ These devices are audio SoCs with extensive digital capabilities and a
+ range of analogue I/O.
+
+allOf:
+ - $ref: /schemas/sound/wlf,arizona.yaml#
+ - $ref: /schemas/regulator/wlf,arizona.yaml#
+ - $ref: /schemas/extcon/wlf,arizona.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - cirrus,cs47l24
+ - wlf,wm1831
+ then:
+ required:
+ - DCVDD-supply
+ - MICVDD-supply
+ else:
+ properties:
+ LDOVDD-supply:
+ description:
+ Digital power supply, used internally to generate DCVDD when
+ internally supplied.
+ $ref: /schemas/types.yaml#/definitions/phandle
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - wlf,wm1814
+ - wlf,wm5102
+ - wlf,wm5110
+ - wlf,wm8280
+ - wlf,wm8997
+ - wlf,wm8998
+ then:
+ properties:
+ DBVDD2-supply:
+ description:
+ Databus power supply.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ required:
+ - DBVDD2-supply
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - wlf,wm1814
+ - wlf,wm5102
+ - wlf,wm5110
+ - wlf,wm8280
+ - wlf,wm8998
+ then:
+ properties:
+ DBVDD3-supply:
+ description:
+ Databus power supply.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ required:
+ - DBVDD3-supply
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - cirrus,cs47l24
+ - wlf,wm1831
+ - wlf,wm8997
+ then:
+ properties:
+ SPKVDD-supply:
+ description:
+ Mono speaker driver power supply.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ required:
+ - SPKVDD-supply
+ else:
+ properties:
+ SPKVDDL-supply:
+ description:
+ Left speaker driver power supply.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ SPKVDDR-supply:
+ description:
+ Right speaker driver power supply.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ required:
+ - SPKVDDL-supply
+ - SPKVDDR-supply
+
+properties:
+ compatible:
+ enum:
+ - cirrus,cs47l24
+ - wlf,wm1814
+ - wlf,wm1831
+ - wlf,wm5102
+ - wlf,wm5110
+ - wlf,wm8280
+ - wlf,wm8997
+ - wlf,wm8998
+
+ reg:
+ maxItems: 1
+
+ AVDD-supply:
+ description:
+ Analogue power supply.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ CPVDD-supply:
+ description:
+ Charge pump power supply.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ DBVDD1-supply:
+ description:
+ Databus power supply.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ DCVDD-supply:
+ description:
+ Digital power supply, normally supplied internally except on cs47l24,
+ wm1831 where it is mandatory.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ MICVDD-supply:
+ description:
+ Microphone power supply, normally supplied internally except on
+ cs47l24, wm1831 where it is mandatory.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ gpio-controller: true
+
+ '#gpio-cells':
+ description:
+ The first cell is the pin number and the second cell is used to
+ specify optional parameters.
+ const: 2
+
+ wlf,gpio-defaults:
+ description:
+ A list of GPIO configuration register values. Defines for the
+ appropriate values can found in dt-bindings/mfd/arizona.h. If
+ absent, no configuration of these registers is performed. If any
+ entry has a value that is out of range for a 16 bit register then the
+ chip default will be used. If present exactly five values must be
+ specified.
+ $ref: "/schemas/types.yaml#/definitions/uint32-array"
+ minItems: 1
+ maxItems: 5
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ description:
+ The first cell is the IRQ number. The second cell is the flags,
+ encoded as trigger masks.
+ const: 2
+
+ interrupts: true
+
+ clocks:
+ description:
+ Should reference the clocks supplied on MCLK1 and MCLK2.
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ description:
+ Should contains two strings mclk1 for the clock supplied on MCLK1,
+ recommended to be a high quality audio reference clock mclk2 for the
+ clock supplied on MCLK2, recommended to be an always on 32k clock.
+ oneOf:
+ - items:
+ - const: mclk1
+ - items:
+ - const: mclk2
+ - items:
+ - const: mclk1
+ - const: mclk2
+
+ reset-gpios:
+ maxItems: 1
+
+ wlf,reset:
+ description:
+ GPIO specifier for the GPIO controlling RESET
+ deprecated: true
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ maxItems: 1
+
+required:
+ - compatible
+ - AVDD-supply
+ - CPVDD-supply
+ - DBVDD1-supply
+ - gpio-controller
+ - '#gpio-cells'
+ - interrupt-controller
+ - '#interrupt-cells'
+ - interrupts
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/mfd/arizona.h>
+ i2c@e0004000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xe0004000 0x1000>;
+
+ wm5102: codec@1a {
+ compatible = "wlf,wm5102";
+ reg = <0x1a>;
+
+ reset-gpios = <&gpio 0>;
+ wlf,ldoena = <&gpio 1>;
+
+ AVDD-supply = <&vdd1v8>;
+ DBVDD1-supply = <&vdd1v8>;
+ DBVDD2-supply = <&vdd1v8>;
+ DBVDD3-supply = <&vdd1v8>;
+ CPVDD-supply = <&vdd1v8>;
+ LDOVDD-supply = <&vdd1v8>;
+ SPKVDDL-supply = <&vdd5v>;
+ SPKVDDR-supply = <&vdd5v>;
+
+ interrupts = <347>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&gic>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ #sound-dai-cells = <1>;
+
+ wlf,gpio-defaults = <
+ ARIZONA_GP_FN_TXLRCLK
+ ARIZONA_GP_DEFAULT
+ ARIZONA_GP_DEFAULT
+ ARIZONA_GP_DEFAULT
+ ARIZONA_GP_DEFAULT
+ >;
+
+ clocks = <&clks 0>, <&clks 1>;
+ clock-names = "mclk1", "mclk2";
+
+ wlf,inmode = <ARIZONA_INMODE_DIFF ARIZONA_INMODE_DMIC>;
+ wlf,dmic-ref = <ARIZONA_DMIC_MICBIAS1 ARIZONA_DMIC_MICBIAS3>;
+
+ wlf,use-jd2;
+ wlf,use-jd2-nopull;
+ wlf,jd-invert;
+
+ wlf,micd-software-compare;
+ wlf,micd-detect-debounce = <0>;
+ wlf,micd-pol-gpio = <&codec 2 0>;
+ wlf,micd-rate = <ARIZONA_MICD_TIME_8MS>;
+ wlf,micd-dbtime = <4>;
+ wlf,micd-timeout-ms = <100>;
+ wlf,micd-force-micbias;
+ wlf,micd-configs = <0 ARIZONA_DMIC_MICBIAS1 0>,
+ <0x2000 ARIZONA_DMIC_MICBIAS2 1>;
+
+ wlf,gpsw = <ARIZONA_GPSW_OPEN>;
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 91bf1fbe98c8e..92a96cc0ea734 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -18257,11 +18257,11 @@ L: patches@opensource.cirrus.com
S: Supported
W: https://github.com/CirrusLogic/linux-drivers/wiki
T: git https://github.com/CirrusLogic/linux-drivers.git
-F: Documentation/devicetree/bindings/extcon/extcon-arizona.txt
-F: Documentation/devicetree/bindings/mfd/arizona.txt
+F: Documentation/devicetree/bindings/extcon/wlf,arizona.yaml
+F: Documentation/devicetree/bindings/mfd/wlf,arizona.yaml
F: Documentation/devicetree/bindings/mfd/wm831x.txt
-F: Documentation/devicetree/bindings/regulator/arizona-regulator.txt
-F: Documentation/devicetree/bindings/sound/wlf,arizona.txt
+F: Documentation/devicetree/bindings/regulator/wlf,arizona.yaml
+F: Documentation/devicetree/bindings/sound/wlf,arizona.yaml
F: Documentation/hwmon/wm83??.rst
F: arch/arm/mach-s3c64xx/mach-crag6410*
F: drivers/clk/clk-wm83*.c
--
2.11.0
^ permalink raw reply related
* [PATCH v3 1/7] regulator: arizona-regulator: Move binding over to dtschema
From: Charles Keepax @ 2020-05-13 9:57 UTC (permalink / raw)
To: cw00.choi, robh+dt, lee.jones, linus.walleij, broonie
Cc: myungjoo.ham, lgirdwood, linux-kernel, devicetree, patches
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
---
No changes since v2.
Thanks,
Charles
.../bindings/regulator/arizona-regulator.txt | 18 -----------
.../devicetree/bindings/regulator/wlf,arizona.yaml | 37 ++++++++++++++++++++++
2 files changed, 37 insertions(+), 18 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/regulator/arizona-regulator.txt
create mode 100644 Documentation/devicetree/bindings/regulator/wlf,arizona.yaml
diff --git a/Documentation/devicetree/bindings/regulator/arizona-regulator.txt b/Documentation/devicetree/bindings/regulator/arizona-regulator.txt
deleted file mode 100644
index 69bf41949b01f..0000000000000
--- a/Documentation/devicetree/bindings/regulator/arizona-regulator.txt
+++ /dev/null
@@ -1,18 +0,0 @@
-Cirrus Logic Arizona class audio SoCs
-
-These devices are audio SoCs with extensive digital capabilities and a range
-of analogue I/O.
-
-This document lists regulator specific bindings, see the primary binding
-document:
- For Wolfson Microelectronic Arizona codecs: ../mfd/arizona.txt
- For Cirrus Logic Madera codecs: ../mfd/madera.txt
-
-Optional properties:
- - wlf,ldoena : GPIO specifier for the GPIO controlling LDOENA
-
-Optional subnodes:
- - ldo1 : Initial data for the LDO1 regulator, as covered in
- Documentation/devicetree/bindings/regulator/regulator.txt
- - micvdd : Initial data for the MICVDD regulator, as covered in
- Documentation/devicetree/bindings/regulator/regulator.txt
diff --git a/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml b/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml
new file mode 100644
index 0000000000000..a0aea73bf4122
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/regulator/wlf,arizona.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logic/Wolfson Microelectronics Arizona/Madera class audio SoCs
+
+maintainers:
+ - patches@opensource.cirrus.com
+
+description: |
+ These devices are audio SoCs with extensive digital capabilities and a
+ range of analogue I/O.
+
+ This document lists regulator specific bindings, see the primary binding
+ document. For Wolfson Microelectronic Arizona codecs ../mfd/wlf,arizona.yaml
+ and for Cirrus Logic Madera codecs ../mfd/madera.txt
+
+properties:
+ wlf,ldoena:
+ description:
+ GPIO specifier for the GPIO controlling LDOENA.
+ $ref: "/schemas/types.yaml#/definitions/phandle-array"
+ maxItems: 1
+
+ ldo1:
+ description:
+ Initial data for the LDO1 regulator.
+ $ref: "regulator.yaml#"
+ type: object
+
+ micvdd:
+ description:
+ Initial data for the MICVDD regulator.
+ $ref: "regulator.yaml#"
+ type: object
--
2.11.0
^ permalink raw reply related
* [PATCH v3 7/7] mfd: madera: Move binding over to dtschema
From: Charles Keepax @ 2020-05-13 9:57 UTC (permalink / raw)
To: cw00.choi, robh+dt, lee.jones, linus.walleij, broonie
Cc: myungjoo.ham, lgirdwood, linux-kernel, devicetree, patches
In-Reply-To: <20200513095720.8867-1-ckeepax@opensource.cirrus.com>
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
---
Changes since v2:
- Removed some more redundant descriptions
- Updated pinctrl node naming in the example
Thanks,
Charles
.../devicetree/bindings/mfd/cirrus,madera.yaml | 311 +++++++++++++++++++++
Documentation/devicetree/bindings/mfd/madera.txt | 114 --------
MAINTAINERS | 6 +-
3 files changed, 314 insertions(+), 117 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mfd/cirrus,madera.yaml
delete mode 100644 Documentation/devicetree/bindings/mfd/madera.txt
diff --git a/Documentation/devicetree/bindings/mfd/cirrus,madera.yaml b/Documentation/devicetree/bindings/mfd/cirrus,madera.yaml
new file mode 100644
index 0000000000000..a013c14cbee17
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/cirrus,madera.yaml
@@ -0,0 +1,311 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/cirrus,madera.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logic Madera class audio CODECs Multi-Functional Device
+
+maintainers:
+ - patches@opensource.cirrus.com
+
+description: |
+ These devices are audio SoCs with extensive digital capabilities and a range
+ of analogue I/O.
+
+ See also the child driver bindings in:
+
+ bindings/pinctrl/cirrus,madera.yaml
+ bindings/regulator/wlf,arizona.yaml
+ bindings/sound/cirrus,madera.yaml
+
+allOf:
+ - $ref: /schemas/pinctrl/cirrus,madera.yaml#
+ - $ref: /schemas/regulator/wlf,arizona.yaml#
+ - $ref: /schemas/sound/cirrus,madera.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - cirrus,cs47l85
+ - wlf,wm1840
+ then:
+ properties:
+ SPKVDDL-supply:
+ description:
+ Left speaker driver power supply.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ SPKVDDR-supply:
+ description:
+ Right speaker driver power supply.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ required:
+ - SPKVDDL-supply
+ - SPKVDDR-supply
+ else:
+ required:
+ - DCVDD-supply
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - cirrus,cs47l15
+ - cirrus,cs47l35
+ then:
+ properties:
+ SPKVDD-supply:
+ description:
+ Mono speaker driver power supply.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ required:
+ - SPKVDD-supply
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - cirrus,cs47l35
+ - cirrus,cs47l85
+ - cirrus,cs47l90
+ - cirrus,cs47l91
+ - wlf,wm1840
+ then:
+ properties:
+ DBVDD2-supply:
+ description:
+ Databus power supply.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ required:
+ - DBVDD2-supply
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - cirrus,cs47l85
+ - cirrus,cs47l90
+ - cirrus,cs47l91
+ - wlf,wm1840
+ then:
+ properties:
+ DBVDD3-supply:
+ description:
+ Databus power supply.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ DBVDD4-supply:
+ description:
+ Databus power supply.
+ $ref: /schemas/types.yaml#/definitions/phandle
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - cirrus,cs47l15
+ then:
+ required:
+ - MICVDD-supply
+ else:
+ properties:
+ CPVDD2-supply:
+ description:
+ Secondary charge pump power supply.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ required:
+ - CPVDD2-supply
+
+properties:
+ compatible:
+ contains:
+ enum:
+ - cirrus,cs47l15
+ - cirrus,cs47l35
+ - cirrus,cs47l85
+ - cirrus,cs47l90
+ - cirrus,cs47l91
+ - cirrus,cs42l92
+ - cirrus,cs47l92
+ - cirrus,cs47l93
+ - cirrus,wm1840
+
+ reg:
+ maxItems: 1
+
+ gpio-controller: true
+
+ '#gpio-cells':
+ description:
+ The first cell is the pin number. The second cell is reserved for
+ future use and must be zero
+ const: 2
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ description:
+ The first cell is the IRQ number.
+ The second cell is the flags, encoded as the trigger masks from
+ bindings/interrupt-controller/interrupts.txt
+ const: 2
+
+ interrupts: true
+
+ reset-gpios:
+ description:
+ One entry specifying the GPIO controlling /RESET. As defined in
+ bindings/gpio.txt. Although optional, it is strongly recommended
+ to use a hardware reset.
+ maxItems: 1
+
+ clocks:
+ description:
+ Should reference the clocks supplied on MCLK1, MCLK2 and MCLK3.
+ minItems: 1
+ maxItems: 3
+
+ clock-names:
+ description: |
+ May contain up to three strings:
+ "mclk1" For the clock supplied on MCLK1, recommended to be a
+ high quality audio reference clock.
+ "mclk2" For the clock supplied on MCLK2, required to be an
+ always on 32k clock.
+ "mclk3" For the clock supplied on MCLK3.
+ oneOf:
+ - items:
+ - const: mclk1
+ - items:
+ - const: mclk2
+ - items:
+ - const: mclk3
+ - items:
+ - const: mclk1
+ - const: mclk2
+ - items:
+ - const: mclk1
+ - const: mclk3
+ - items:
+ - const: mclk2
+ - const: mclk3
+ - items:
+ - const: mclk1
+ - const: mclk2
+ - const: mclk3
+
+ AVDD-supply:
+ description:
+ Analogue power supply.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ DBVDD1-supply:
+ description:
+ Databus power supply.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ CPVDD1-supply:
+ description:
+ Charge pump power supply.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ DCVDD-supply:
+ description:
+ Digital power supply, optional on CS47L85, WM1840 where it can
+ be supplied internally.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ MICVDD-supply:
+ description:
+ Microphone power supply, normally supplied internally except on
+ cs47l24, wm1831 where it is mandatory.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+required:
+ - compatible
+ - gpio-controller
+ - '#gpio-cells'
+ - interrupt-controller
+ - '#interrupt-cells'
+ - interrupt-parent
+ - interrupts
+ - AVDD-supply
+ - DBVDD1-supply
+ - CPVDD1-supply
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/sound/madera.h>
+ i2c@e0004000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xe0004000 0x1000>;
+
+ cs47l85: codec@1a {
+ compatible = "cirrus,cs47l85";
+ reg = <0x1a>;
+
+ reset-gpios = <&gpio 0>;
+ wlf,ldoena = <&gpio 1>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <&host_irq1>;
+ interrupt-parent = <&gic>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ AVDD-supply = <&vdd1v8>;
+ DBVDD1-supply = <&vdd1v8>;
+ DBVDD2-supply = <&vdd1v8>;
+ DBVDD3-supply = <&vdd1v8>;
+ DBVDD4-supply = <&vdd1v8>;
+ CPVDD1-supply = <&vdd1v8>;
+ CPVDD2-supply = <&vdd1v2>;
+ SPKVDDL-supply = <&vdd5v>;
+ SPKVDDR-supply = <&vdd5v>;
+
+ clocks = <&clks 0>, <&clks 1>, <&clks 2>;
+ clock-names = "mclk1", "mclk2", "mclk3";
+
+ cirrus,dmic-ref = <0 0 MADERA_DMIC_REF_MICBIAS1>;
+ cirrus,inmode = <
+ MADERA_INMODE_SE MADERA_INMODE_SE
+ MADERA_INMODE_SE MADERA_INMODE_SE
+ MADERA_INMODE_DIFF MADERA_INMODE_DIFF
+ >;
+ cirrus,max-channels-clocked = <2 0 0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinsettings>;
+
+ pinsettings: pin-settings {
+ aif1-pins {
+ groups = "aif1";
+ function = "aif1";
+ bias-bus-hold;
+ };
+
+ aif2-pins {
+ groups = "aif2";
+ function = "aif2";
+ bias-bus-hold;
+ };
+
+ aif3-pins {
+ groups = "aif3";
+ function = "aif3";
+ bias-bus-hold;
+ };
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/mfd/madera.txt b/Documentation/devicetree/bindings/mfd/madera.txt
deleted file mode 100644
index 47e2b8bc60519..0000000000000
--- a/Documentation/devicetree/bindings/mfd/madera.txt
+++ /dev/null
@@ -1,114 +0,0 @@
-Cirrus Logic Madera class audio codecs Multi-Functional Device
-
-These devices are audio SoCs with extensive digital capabilities and a range
-of analogue I/O.
-
-See also the child driver bindings in:
-bindings/pinctrl/cirrus,madera-pinctrl.txt
-bindings/regulator/arizona-regulator.txt
-bindings/sound/madera.txt
-
-Required properties:
-
- - compatible : One of the following chip-specific strings:
- "cirrus,cs47l15"
- "cirrus,cs47l35"
- "cirrus,cs47l85"
- "cirrus,cs47l90"
- "cirrus,cs47l91"
- "cirrus,cs42l92"
- "cirrus,cs47l92"
- "cirrus,cs47l93"
- "cirrus,wm1840"
-
- - reg : I2C slave address when connected using I2C, chip select number when
- using SPI.
-
- - DCVDD-supply : Power supply for the device as defined in
- bindings/regulator/regulator.txt
- Mandatory on CS47L15, CS47L35, CS47L90, CS47L91, CS42L92, CS47L92, CS47L93
- Optional on CS47L85, WM1840
-
- - AVDD-supply, DBVDD1-supply, DBVDD2-supply, CPVDD1-supply, CPVDD2-supply :
- Power supplies for the device
-
- - DBVDD3-supply, DBVDD4-supply : Power supplies for the device
- (CS47L85, CS47L90, CS47L91, WM1840)
-
- - SPKVDDL-supply, SPKVDDR-supply : Power supplies for the device
- (CS47L85, WM1840)
-
- - SPKVDD-supply : Power supply for the device
- (CS47L15, CS47L35)
-
- - interrupt-controller : Indicates that this device is an interrupt controller
-
- - #interrupt-cells: the number of cells to describe an IRQ, must be 2.
- The first cell is the IRQ number.
- The second cell is the flags, encoded as the trigger masks from
- bindings/interrupt-controller/interrupts.txt
-
- - gpio-controller : Indicates this device is a GPIO controller.
-
- - #gpio-cells : Must be 2. The first cell is the pin number. The second cell
- is reserved for future use and must be zero
-
- - interrupt-parent : The parent interrupt controller.
-
- - interrupts : The interrupt line the /IRQ signal for the device is
- connected to.
-
-Optional properties:
-
- - MICVDD-supply : Power supply, only need to be specified if
- powered externally
-
- - reset-gpios : One entry specifying the GPIO controlling /RESET.
- As defined in bindings/gpio.txt.
- Although optional, it is strongly recommended to use a hardware reset
-
- - clocks: Should reference the clocks supplied on MCLK1, MCLK2 and MCLK3
- - clock-names: May contain up to three strings:
- "mclk1" for the clock supplied on MCLK1, recommended to be a high
- quality audio reference clock
- "mclk2" for the clock supplied on MCLK2, required to be an always on
- 32k clock
- "mclk3" for the clock supplied on MCLK3
-
- - MICBIASx : Initial data for the MICBIAS regulators, as covered in
- Documentation/devicetree/bindings/regulator/regulator.txt.
- One for each MICBIAS generator (MICBIAS1, MICBIAS2, ...)
- (all codecs)
-
- One for each output pin (MICBIAS1A, MIBCIAS1B, MICBIAS2A, ...)
- (all except CS47L85, WM1840)
-
- The following following additional property is supported for the generator
- nodes:
- - cirrus,ext-cap : Set to 1 if the MICBIAS has external decoupling
- capacitors attached.
-
-Optional child nodes:
- micvdd : Node containing initialization data for the micvdd regulator
- See bindings/regulator/arizona-regulator.txt
-
- ldo1 : Node containing initialization data for the LDO1 regulator
- See bindings/regulator/arizona-regulator.txt
- (cs47l85, wm1840)
-
-Example:
-
-cs47l85@0 {
- compatible = "cirrus,cs47l85";
- reg = <0>;
-
- reset-gpios = <&gpio 0>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <&host_irq1>;
- interrupt-parent = <&gic>;
-
- gpio-controller;
- #gpio-cells = <2>;
-};
diff --git a/MAINTAINERS b/MAINTAINERS
index 92a96cc0ea734..82fb3a4cd81bd 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4086,9 +4086,9 @@ L: patches@opensource.cirrus.com
S: Supported
W: https://github.com/CirrusLogic/linux-drivers/wiki
T: git https://github.com/CirrusLogic/linux-drivers.git
-F: Documentation/devicetree/bindings/mfd/madera.txt
-F: Documentation/devicetree/bindings/pinctrl/cirrus,madera-pinctrl.txt
-F: Documentation/devicetree/bindings/sound/madera.txt
+F: Documentation/devicetree/bindings/mfd/cirrus,madera.yaml
+F: Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml
+F: Documentation/devicetree/bindings/sound/cirrus,madera.yaml
F: drivers/gpio/gpio-madera*
F: drivers/irqchip/irq-madera*
F: drivers/mfd/cs47l*
--
2.11.0
^ permalink raw reply related
* [PATCH v3 5/7] ASoC: madera: Move binding over to dtschema
From: Charles Keepax @ 2020-05-13 9:57 UTC (permalink / raw)
To: cw00.choi, robh+dt, lee.jones, linus.walleij, broonie
Cc: myungjoo.ham, lgirdwood, linux-kernel, devicetree, patches
In-Reply-To: <20200513095720.8867-1-ckeepax@opensource.cirrus.com>
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
---
No changes since v2.
Thanks,
Charles
.../devicetree/bindings/sound/cirrus,madera.yaml | 113 +++++++++++++++++++++
Documentation/devicetree/bindings/sound/madera.txt | 67 ------------
2 files changed, 113 insertions(+), 67 deletions(-)
create mode 100644 Documentation/devicetree/bindings/sound/cirrus,madera.yaml
delete mode 100644 Documentation/devicetree/bindings/sound/madera.txt
diff --git a/Documentation/devicetree/bindings/sound/cirrus,madera.yaml b/Documentation/devicetree/bindings/sound/cirrus,madera.yaml
new file mode 100644
index 0000000000000..c4cd58b5acd46
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/cirrus,madera.yaml
@@ -0,0 +1,113 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/cirrus,madera.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logic Madera class audio CODECs
+
+maintainers:
+ - patches@opensource.cirrus.com
+
+description: |
+ This describes audio configuration bindings for these codecs.
+
+ See also the core bindings for the parent MFD driver:
+
+ Documentation/devicetree/bindings/mfd/cirrus,madera.yaml
+
+ and defines for values used in these bindings:
+
+ include/dt-bindings/sound/madera.h
+
+ The properties are all contained in the parent MFD node.
+
+properties:
+ '#sound-dai-cells':
+ description:
+ The first cell indicating the audio interface.
+ const: 1
+
+ cirrus,inmode:
+ description:
+ A list of input mode settings for each input. A maximum
+ of 24 cells, with four cells per input in the order INnAL,
+ INnAR INnBL INnBR. For non-muxed inputs the first two cells
+ for that input set the mode for the left and right channel
+ and the second two cells must be 0. For muxed inputs the
+ first two cells for that input set the mode of the left and
+ right A inputs and the second two cells set the mode of the
+ left and right B inputs. Valid mode values are one of the
+ MADERA_INMODE_xxx. If the array is shorter than the number
+ of inputs the unspecified inputs default to MADERA_INMODE_DIFF.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 1
+ maxItems: 24
+ items:
+ minimum: 0
+ maximum: 1
+ default: 0
+
+ cirrus,out-mono:
+ description:
+ Mono bit for each output, maximum of six cells if the array
+ is shorter outputs will be set to stereo.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 1
+ maxItems: 6
+ items:
+ minimum: 0
+ maximum: 1
+ default: 0
+
+ cirrus,dmic-ref:
+ description: |
+ Indicates how the MICBIAS pins have been externally connected
+ to DMICs on each input, one cell per input.
+
+ <IN1 IN2 IN3 ...>
+
+ A value of 0 indicates MICVDD and is the default,
+ other values depend on the codec: For CS47L35 one of the
+ CS47L35_DMIC_REF_xxx values For all other codecs one of
+ the MADERA_DMIC_REF_xxx values Also see the datasheet for a
+ description of the INn_DMIC_SUP field.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 1
+ maxItems: 6
+ items:
+ minimum: 0
+ maximum: 3
+ default: 0
+
+ cirrus,max-channels-clocked:
+ description:
+ Maximum number of channels that I2S clocks will be generated
+ for. Useful when clock master for systems where the I2S bus
+ has multiple data lines. One cell for each AIF, use a value
+ of zero for AIFs that should be handled normally.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 1
+ maxItems: 4
+ items:
+ default: 0
+
+ cirrus,pdm-fmt:
+ description:
+ PDM speaker data format, must contain 2 cells (OUT5 and
+ OUT6). See the PDM_SPKn_FMT field in the datasheet for a
+ description of this value. The second cell is ignored for
+ codecs that do not have OUT6.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 2
+ maxItems: 2
+
+ cirrus,pdm-mute:
+ description: |
+ PDM mute format, must contain 2 cells (OUT5 and OUT6). See the
+ PDM_SPKn_CTRL_1 register in the datasheet for a description
+ of this value. The second cell is ignored for codecs that
+ do not have OUT6.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 2
+ maxItems: 2
diff --git a/Documentation/devicetree/bindings/sound/madera.txt b/Documentation/devicetree/bindings/sound/madera.txt
deleted file mode 100644
index 5e669ce552f47..0000000000000
--- a/Documentation/devicetree/bindings/sound/madera.txt
+++ /dev/null
@@ -1,67 +0,0 @@
-Cirrus Logic Madera class audio codecs
-
-This describes audio configuration bindings for these codecs.
-
-See also the core bindings for the parent MFD driver:
-See Documentation/devicetree/bindings/mfd/madera.txt
-
-and defines for values used in these bindings:
-include/dt-bindings/sound/madera.h
-
-These properties are all contained in the parent MFD node.
-
-Optional properties:
- - cirrus,dmic-ref : Indicates how the MICBIAS pins have been externally
- connected to DMICs on each input, one cell per input.
- <IN1 IN2 IN3 ...>
- A value of 0 indicates MICVDD and is the default, other values depend on the
- codec:
- For CS47L35 one of the CS47L35_DMIC_REF_xxx values
- For all other codecs one of the MADERA_DMIC_REF_xxx values
- Also see the datasheet for a description of the INn_DMIC_SUP field.
-
- - cirrus,inmode : A list of input mode settings for each input. A maximum of
- 16 cells, with four cells per input in the order INnAL, INnAR INnBL INnBR.
- For non-muxed inputs the first two cells for that input set the mode for
- the left and right channel and the second two cells must be 0.
- For muxed inputs the first two cells for that input set the mode of the
- left and right A inputs and the second two cells set the mode of the left
- and right B inputs.
- Valid mode values are one of the MADERA_INMODE_xxx. If the array is shorter
- than the number of inputs the unspecified inputs default to
- MADERA_INMODE_DIFF.
-
- - cirrus,out-mono : Mono bit for each output, maximum of six cells if the
- array is shorter outputs will be set to stereo.
-
- - cirrus,max-channels-clocked : Maximum number of channels that I2S clocks
- will be generated for. Useful when clock master for systems where the I2S
- bus has multiple data lines.
- One cell for each AIF, use a value of zero for AIFs that should be handled
- normally.
-
- - cirrus,pdm-fmt : PDM speaker data format, must contain 2 cells
- (OUT5 and OUT6). See the PDM_SPKn_FMT field in the datasheet for a
- description of this value.
- The second cell is ignored for codecs that do not have OUT6.
-
- - cirrus,pdm-mute : PDM mute format, must contain 2 cells
- (OUT5 and OUT6). See the PDM_SPKn_CTRL_1 register in the datasheet for a
- description of this value.
- The second cell is ignored for codecs that do not have OUT6.
-
-Example:
-
-cs47l35@0 {
- compatible = "cirrus,cs47l35";
-
- cirrus,dmic-ref = <0 0 CS47L35_DMIC_REF_MICBIAS1B 0>;
- cirrus,inmode = <
- MADERA_INMODE_DMIC MADERA_INMODE_DMIC /* IN1A digital */
- MADERA_INMODE_SE MADERA_INMODE_SE /* IN1B single-ended */
- MADERA_INMODE_DIFF MADERA_INMODE_DIFF /* IN2 differential */
- 0 0 /* not used on this codec */
- >;
- cirrus,out-mono = <0 0 0 0 0 0>;
- cirrus,max-channels-clocked = <2 0 0>;
-};
--
2.11.0
^ permalink raw reply related
* Re: [PATCH v3 3/5] iommu: Add Allwinner H6 IOMMU driver
From: Joerg Roedel @ 2020-05-13 9:53 UTC (permalink / raw)
To: Maxime Ripard
Cc: Chen-Yu Tsai, Maxime Ripard, Mark Rutland, Rob Herring,
Frank Rowand, devicetree, linux-arm-kernel, iommu
In-Reply-To: <dcccd40c46982b6ab2fc1c5bc199d045798fbe8e.1588673353.git-series.maxime@cerno.tech>
On Tue, May 05, 2020 at 12:09:32PM +0200, Maxime Ripard wrote:
> +static u32 *sun50i_dte_get_page_table(struct sun50i_iommu_domain *sun50i_domain,
> + dma_addr_t iova, gfp_t gfp)
> +{
> + struct sun50i_iommu *iommu = sun50i_domain->iommu;
> + unsigned long flags;
> + u32 *page_table;
> + u32 *dte_addr;
> + u32 old_dte;
> + u32 dte;
> +
> + dte_addr = &sun50i_domain->dt[sun50i_iova_get_dte_index(iova)];
> + dte = *dte_addr;
> + if (sun50i_dte_is_pt_valid(dte)) {
> + phys_addr_t pt_phys = sun50i_dte_get_pt_address(dte);
> + return (u32 *)phys_to_virt(pt_phys);
> + }
> +
> + page_table = sun50i_iommu_alloc_page_table(iommu, gfp);
> + if (IS_ERR(page_table))
> + return page_table;
> +
> + dte = sun50i_mk_dte(virt_to_phys(page_table));
> + old_dte = cmpxchg(dte_addr, 0, dte);
> + if (old_dte) {
> + phys_addr_t installed_pt_phys =
> + sun50i_dte_get_pt_address(old_dte);
> + u32 *installed_pt = phys_to_virt(installed_pt_phys);
> + u32 *drop_pt = page_table;
> +
> + page_table = installed_pt;
> + dte = old_dte;
> + sun50i_iommu_free_page_table(iommu, drop_pt);
> + }
> +
> + sun50i_table_flush(sun50i_domain, page_table, PT_SIZE);
> + sun50i_table_flush(sun50i_domain, dte_addr, 1);
> +
> + spin_lock_irqsave(&iommu->iommu_lock, flags);
> + sun50i_iommu_ptw_invalidate(iommu, iova);
> + spin_unlock_irqrestore(&iommu->iommu_lock, flags);
Why is that needed, does the PTW also cache non-present entries?
> +static size_t sun50i_iommu_unmap(struct iommu_domain *domain, unsigned long iova,
> + size_t size, struct iommu_iotlb_gather *gather)
> +{
> + struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain);
> + struct sun50i_iommu *iommu = sun50i_domain->iommu;
> + phys_addr_t pt_phys;
> + dma_addr_t pte_dma;
> + u32 *pte_addr;
> + u32 dte;
> +
> + dte = sun50i_domain->dt[sun50i_iova_get_dte_index(iova)];
> + if (!sun50i_dte_is_pt_valid(dte))
> + return 0;
> +
> + pt_phys = sun50i_dte_get_pt_address(dte);
> + pte_addr = (u32 *)phys_to_virt(pt_phys) + sun50i_iova_get_pte_index(iova);
> + pte_dma = pt_phys + sun50i_iova_get_pte_index(iova) * PT_ENTRY_SIZE;
> +
> + if (!sun50i_pte_is_page_valid(*pte_addr))
> + return 0;
> +
> + memset(pte_addr, 0, sizeof(*pte_addr));
> + sun50i_table_flush(sun50i_domain, pte_addr, 1);
> +
> + spin_lock(&iommu->iommu_lock);
> + sun50i_iommu_ptw_invalidate(iommu, iova);
> + spin_unlock(&iommu->iommu_lock);
And is that also needed? You clear a PTE here and not a top-level DT
entry. All these spinlocks in the map/unmap paths will truly hurt
performance.
And if it is really needed you can defer it into the iotlb_sync()
call-back.
> +static int sun50i_iommu_add_device(struct device *dev)
> +{
> + struct sun50i_iommu *iommu;
> + struct iommu_group *group;
> +
> + iommu = sun50i_iommu_from_dev(dev);
> + if (!iommu)
> + return -ENODEV;
> +
> + group = iommu_group_get_for_dev(dev);
> + if (IS_ERR(group))
> + return PTR_ERR(group);
> +
> + iommu_group_put(group);
> +
> + return 0;
> +}
> +
> +static void sun50i_iommu_remove_device(struct device *dev)
> +{
> + iommu_group_remove_device(dev);
> +}
These two call-backs have been renamed in the iommu-tree to
probe_device() and release_device() with slightly different semantics
and function signatures. I think for this driver they should look like
this:
static struct iommu_device *sun50i_iommu_probe_device(struct device *dev)
{
struct sun50i_iommu *iommu;
iommu = sun50i_iommu_from_dev(dev);
if (!iommu)
return ERR_PTR(-ENODEV);
return &iommu->iommu;
}
static void sun50i_iommu_release_device(struct device *dev)
{
}
Can you pleas rebase these patches to the 'core' branch of the
iommu-tree and use these new call-backs?
The rest of your driver looks good to me. Good work!
Thanks,
Joerg
^ permalink raw reply
* Re: [PATCH V4 5/5] iio: adc: Clean up ADC code common to PMIC5 and PMIC7
From: Andy Shevchenko @ 2020-05-13 9:51 UTC (permalink / raw)
To: Jishnu Prakash
Cc: agross, Bjorn Andersson, devicetree, Linux Kernel Mailing List,
Matthias Kaehlcke, Linus Walleij, Jonathan Cameron, Amit Kucheria,
smohanad, kgunda, aghayal, Jonathan Cameron, Hartmut Knaack,
Lars-Peter Clausen, Peter Meerwald-Stadler, linux-arm-msm,
linux-iio, linux-arm-msm-owner
In-Reply-To: <1589361736-816-6-git-send-email-jprakash@codeaurora.org>
On Wed, May 13, 2020 at 12:24 PM Jishnu Prakash <jprakash@codeaurora.org> wrote:
>
> This commit includes the following changes:
> Add a common function used for read_raw callback for
> both PMIC5 and PMIC7 ADCs.
> Add exit function for ADC.
> Add info_property under adc_data to more efficiently
> distinguish PMIC5 and PMIC7 ADCs.
Something happened to the editor settings. We have lines up to 72
(recommended) characters.
...
> @@ -512,6 +518,7 @@ static int adc5_read_raw(struct iio_dev *indio_dev,
> &adc5_prescale_ratios[prop->prescale],
> adc->data,
> adc_code_volt, val);
> +
> if (ret)
> return ret;
>
Unrelated.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH V4 4/5] iio: adc: Update error checks and debug prints
From: Andy Shevchenko @ 2020-05-13 9:49 UTC (permalink / raw)
To: Jishnu Prakash
Cc: agross, Bjorn Andersson, devicetree, Linux Kernel Mailing List,
Matthias Kaehlcke, Linus Walleij, Jonathan Cameron, Amit Kucheria,
smohanad, kgunda, aghayal, Jonathan Cameron, Hartmut Knaack,
Lars-Peter Clausen, Peter Meerwald-Stadler, linux-arm-msm,
linux-iio, linux-arm-msm-owner
In-Reply-To: <1589361736-816-5-git-send-email-jprakash@codeaurora.org>
On Wed, May 13, 2020 at 12:23 PM Jishnu Prakash <jprakash@codeaurora.org> wrote:
>
> Change pr_err/pr_debug statements to dev_err/dev_dbg for
> increased clarity. Also clean up some return value checks.
'Also' on the commit message == 'split this to two'.
But here is a ping pong style of patches (you introduce a problem in
one patch and fix it in the following).
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* [PATCH 0/3] Add LT9611 DSI to HDMI bridge
From: Vinod Koul @ 2020-05-13 10:05 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Rob Clark
Cc: linux-arm-msm, Bjorn Andersson, Vinod Koul, Andrzej Hajda,
Neil Armstrong, Laurent Pinchart, Jonas Karlman, Jernej Skrabec,
Rob Herring, devicetree, linux-kernel, dri-devel
Hi,
This series adds driver and bindings for Lontium LT9611 bridge chip which
takes MIPI DSI as input and HDMI as output.
This chip can be found in 96boards RB3 platform [1] commonly called DB845c.
[1]: https://www.96boards.org/product/rb3-platform/
Vinod Koul (3):
dt-bindings: vendor-prefixes: Add Lontium vendor prefix
dt-bindings: display: bridge: Add documentation for LT9611
drm/bridge: Introduce LT9611 DSI to HDMI bridge
.../display/bridge/lontium,lt9611.yaml | 178 +++
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
drivers/gpu/drm/bridge/Kconfig | 13 +
drivers/gpu/drm/bridge/Makefile | 1 +
drivers/gpu/drm/bridge/lt9611.c | 1113 +++++++++++++++++
5 files changed, 1307 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml
create mode 100644 drivers/gpu/drm/bridge/lt9611.c
--
2.25.4
^ permalink raw reply
* [PATCH 1/3] dt-bindings: vendor-prefixes: Add Lontium vendor prefix
From: Vinod Koul @ 2020-05-13 10:05 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Rob Clark
Cc: linux-arm-msm, Bjorn Andersson, Vinod Koul, Andrzej Hajda,
Neil Armstrong, Laurent Pinchart, Jonas Karlman, Jernej Skrabec,
Rob Herring, devicetree, linux-kernel, dri-devel
In-Reply-To: <20200513100533.42996-1-vkoul@kernel.org>
Add prefix for Lontium Semiconductor Corporation
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index d3891386d671..7294852bc47b 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -579,6 +579,8 @@ patternProperties:
description: Logic Technologies Limited
"^longcheer,.*":
description: Longcheer Technology (Shanghai) Co., Ltd.
+ "^lontium,.*":
+ description: Lontium Semiconductor Corporation
"^loongson,.*":
description: Loongson Technology Corporation Limited
"^lsi,.*":
--
2.25.4
^ permalink raw reply related
* [PATCH 2/3] dt-bindings: display: bridge: Add documentation for LT9611
From: Vinod Koul @ 2020-05-13 10:05 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Rob Clark
Cc: linux-arm-msm, Bjorn Andersson, Vinod Koul, Andrzej Hajda,
Neil Armstrong, Laurent Pinchart, Jonas Karlman, Jernej Skrabec,
Rob Herring, devicetree, linux-kernel, dri-devel
In-Reply-To: <20200513100533.42996-1-vkoul@kernel.org>
Lontium LT9611 is a DSI to HDMI bridge which supports 2 DSI ports
and I2S port as input and one HDMI port as output
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
.../display/bridge/lontium,lt9611.yaml | 178 ++++++++++++++++++
1 file changed, 178 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml
diff --git a/Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml b/Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml
new file mode 100644
index 000000000000..77ee8cc35cd8
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml
@@ -0,0 +1,178 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/bridge/lontium,lt9611.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Lontium LT9611 2 Port MIPI to HDMI Bridge
+
+maintainers:
+ - Vinod Koul <vkoul@kernel.org>
+
+description: |
+ The LT9611 is a bridge device which converts DSI to HDMI
+
+properties:
+ compatible:
+ enum:
+ - lontium,lt9611
+
+ reg:
+ maxItems: 1
+ description: base I2C address of the device.
+
+ "#sound-dai-cells":
+ const: 1
+
+ interrupts:
+ maxItems: 1
+ description: interrupt line for the chip
+
+ reset-gpios:
+ maxItems: 1
+ description: GPIO connected to active high RESET pin.
+
+ vdd-supply:
+ description: Regulator for 1.8V MIPI phy power.
+
+ vcc-supply:
+ description: Regulator for 3.3V IO power.
+
+ ports:
+ type: object
+
+ properties:
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ port@0:
+ type: object
+ additionalProperties: false
+
+ description: |
+ HDMI port for HDMI output
+
+ properties:
+ reg:
+ const: 0
+
+ patternProperties:
+ endpoint:
+ type: object
+ additionalProperties: false
+
+ properties:
+ remote-endpoint: true
+
+ required:
+ - reg
+
+ port@1:
+ type: object
+ additionalProperties: false
+
+ description: |
+ MIPI port-1 for MIPI input
+
+ properties:
+ reg:
+ const: 1
+
+ patternProperties:
+ endpoint:
+ type: object
+ additionalProperties: false
+
+ properties:
+ remote-endpoint: true
+
+ required:
+ - reg
+
+ port@2:
+ type: object
+ additionalProperties: false
+
+ description: |
+ MIPI port-2 for MIPI input
+
+ properties:
+ reg:
+ const: 2
+
+ patternProperties:
+ endpoint:
+ type: object
+ additionalProperties: false
+
+ properties:
+ remote-endpoint: true
+
+ required:
+ - reg
+
+ required:
+ - "#address-cells"
+ - "#size-cells"
+ - port@0
+ - port@1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - vdd-supply
+ - vcc-supply
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ i2c10 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ lt9611_codec: hdmi-bridge@3b {
+ compatible = "lontium,lt9611";
+ reg = <0x3b>;
+
+ reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
+ interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
+
+ vdd-supply = <<9611_1v8>;
+ vcc-supply = <<9611_3v3>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ lt9611_out: endpoint {
+ remote-endpoint = <&hdmi_con>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ lt9611_a: endpoint {
+ remote-endpoint = <&dsi0_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ lt9611_b: endpoint {
+ remote-endpoint = <&dsi1_out>;
+ };
+ };
+ };
+ };
+ };
--
2.25.4
^ permalink raw reply related
* [PATCH 3/3] drm/bridge: Introduce LT9611 DSI to HDMI bridge
From: Vinod Koul @ 2020-05-13 10:05 UTC (permalink / raw)
To: Daniel Vetter, David Airlie, Rob Clark
Cc: linux-arm-msm, Bjorn Andersson, Vinod Koul, Andrzej Hajda,
Neil Armstrong, Laurent Pinchart, Jonas Karlman, Jernej Skrabec,
Rob Herring, devicetree, linux-kernel, dri-devel
In-Reply-To: <20200513100533.42996-1-vkoul@kernel.org>
Lontium Lt9611 is a DSI to HDMI bridge which supports two DSI ports and
I2S port as an input and HDMI port as output
Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/gpu/drm/bridge/Kconfig | 13 +
drivers/gpu/drm/bridge/Makefile | 1 +
drivers/gpu/drm/bridge/lt9611.c | 1113 +++++++++++++++++++++++++++++++
3 files changed, 1127 insertions(+)
create mode 100644 drivers/gpu/drm/bridge/lt9611.c
diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index aaed2347ace9..5cac15ce2027 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -38,6 +38,19 @@ config DRM_DISPLAY_CONNECTOR
on ARM-based platforms. Saying Y here when this driver is not needed
will not cause any issue.
+config DRM_LONTIUM_LT9611
+ tristate "Lontium LT9611 DSI/HDMI bridge"
+ select SND_SOC_HDMI_CODEC if SND_SOC
+ depends on OF
+ select DRM_PANEL_BRIDGE
+ select DRM_KMS_HELPER
+ select REGMAP_I2C
+ help
+ Driver for Lontium LT9611 DSI to HDMI bridge
+ chip driver that converts dual DSI and I2S to
+ HDMI signals
+ Please say Y if you have such hardware.
+
config DRM_LVDS_CODEC
tristate "Transparent LVDS encoders and decoders support"
depends on OF
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index 6fb062b5b0f0..d2a696e8ca5d 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o
obj-$(CONFIG_DRM_DISPLAY_CONNECTOR) += display-connector.o
+obj-$(CONFIG_DRM_LONTIUM_LT9611) += lt9611.o
obj-$(CONFIG_DRM_LVDS_CODEC) += lvds-codec.o
obj-$(CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW) += megachips-stdpxxxx-ge-b850v3-fw.o
obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
diff --git a/drivers/gpu/drm/bridge/lt9611.c b/drivers/gpu/drm/bridge/lt9611.c
new file mode 100644
index 000000000000..e6e7ce43980d
--- /dev/null
+++ b/drivers/gpu/drm/bridge/lt9611.c
@@ -0,0 +1,1113 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2019-2020. Linaro Limited.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/interrupt.h>
+#include <linux/of_graph.h>
+#include <linux/regulator/consumer.h>
+#include <drm/drm_probe_helper.h>
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_bridge.h>
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_print.h>
+
+#define EDID_SEG_SIZE 256
+
+#define LT9611_4LANES 0
+
+struct lt9611 {
+ struct device *dev;
+ struct drm_bridge bridge;
+ struct drm_connector connector;
+
+ struct regmap *regmap;
+
+ struct device_node *dsi0_node;
+ struct device_node *dsi1_node;
+ struct mipi_dsi_device *dsi0;
+ struct mipi_dsi_device *dsi1;
+
+ bool ac_mode;
+
+ struct gpio_desc *reset_gpio;
+ struct gpio_desc *enable_gpio;
+
+ bool power_on;
+ bool sleep;
+
+ struct regulator_bulk_data supplies[2];
+
+ struct i2c_client *client;
+
+ enum drm_connector_status status;
+
+ u8 edid_buf[EDID_SEG_SIZE];
+ u32 vic;
+};
+
+#define LT9611_PAGE_CONTROL 0xff
+
+static const struct regmap_range_cfg lt9611_ranges[] = {
+ {
+ .name = "register_range",
+ .range_min = 0,
+ .range_max = 0x85ff,
+ .selector_reg = LT9611_PAGE_CONTROL,
+ .selector_mask = 0xff,
+ .selector_shift = 0,
+ .window_start = 0,
+ .window_len = 0x100,
+ },
+};
+
+static const struct regmap_config lt9611_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .max_register = 0xffff,
+ .ranges = lt9611_ranges,
+ .num_ranges = ARRAY_SIZE(lt9611_ranges),
+};
+
+struct lt9611_mode {
+ u16 hdisplay;
+ u16 vdisplay;
+ u8 fps;
+ u8 lanes;
+ u8 intfs;
+};
+
+static struct lt9611_mode lt9611_modes[] = {
+ { 3840, 2160, 30, 4, 2 }, /* 3840x2160 24bit 30Hz 4Lane 2ports */
+ { 1920, 1080, 60, 4, 1 }, /* 1080P 24bit 60Hz 4lane 1port */
+ { 1920, 1080, 30, 3, 1 }, /* 1080P 24bit 30Hz 3lane 1port */
+ { 1920, 1080, 24, 3, 1 },
+ { 720, 480, 60, 4, 1 },
+ { 720, 576, 50, 2, 1 },
+ { 640, 480, 60, 2, 1 },
+};
+
+static struct lt9611 *bridge_to_lt9611(struct drm_bridge *bridge)
+{
+ return container_of(bridge, struct lt9611, bridge);
+}
+
+static struct lt9611 *connector_to_lt9611(struct drm_connector *connector)
+{
+ return container_of(connector, struct lt9611, connector);
+}
+
+static int lt9611_mipi_input_analog(struct lt9611 *lt9611)
+{
+ struct reg_sequence reg_cfg[] = {
+ { 0x8106, 0x40 }, /*port A rx current*/
+ { 0x810a, 0xfe }, /*port A ldo voltage set*/
+ { 0x810b, 0xbf }, /*enable port A lprx*/
+ { 0x8111, 0x40 }, /*port B rx current*/
+ { 0x8115, 0xfe }, /*port B ldo voltage set*/
+ { 0x8116, 0xbf }, /*enable port B lprx*/
+
+ { 0x811c, 0x03 }, /*PortA clk lane no-LP mode*/
+ { 0x8120, 0x03 }, /*PortB clk lane with-LP mode*/
+ };
+
+ regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg));
+
+ return 0;
+}
+
+static int lt9611_mipi_input_digital(struct lt9611 *lt9611,
+ const struct drm_display_mode *mode)
+{
+ regmap_write(lt9611->regmap, 0x8300, LT9611_4LANES);
+
+ if (mode->hdisplay == 3840)
+ regmap_write(lt9611->regmap, 0x830a, 0x03);
+ else
+ regmap_write(lt9611->regmap, 0x830a, 0x00);
+
+ regmap_write(lt9611->regmap, 0x824f, 0x80);
+ regmap_write(lt9611->regmap, 0x8250, 0x10);
+ regmap_write(lt9611->regmap, 0x8302, 0x0a);
+ regmap_write(lt9611->regmap, 0x8306, 0x0a);
+
+ return 0;
+}
+
+static void lt9611_mipi_video_setup(struct lt9611 *lt9611,
+ const struct drm_display_mode *mode)
+{
+ u32 h_total, h_act, hpw, hfp, hss;
+ u32 v_total, v_act, vpw, vfp, vss;
+
+ h_total = mode->htotal;
+ v_total = mode->vtotal;
+
+ h_act = mode->hdisplay;
+ hpw = mode->hsync_end - mode->hsync_start;
+ hfp = mode->hsync_start - mode->hdisplay;
+ hss = (mode->hsync_end - mode->hsync_start) +
+ (mode->htotal - mode->hsync_end);
+
+ v_act = mode->vdisplay;
+ vpw = mode->vsync_end - mode->vsync_start;
+ vfp = mode->vsync_start - mode->vdisplay;
+ vss = (mode->vsync_end - mode->vsync_start) +
+ (mode->vtotal - mode->vsync_end);
+
+ regmap_write(lt9611->regmap, 0x830d, (u8)(v_total / 256));
+ regmap_write(lt9611->regmap, 0x830e, (u8)(v_total % 256));
+
+ regmap_write(lt9611->regmap, 0x830f, (u8)(v_act / 256));
+ regmap_write(lt9611->regmap, 0x8310, (u8)(v_act % 256));
+
+ regmap_write(lt9611->regmap, 0x8311, (u8)(h_total / 256));
+ regmap_write(lt9611->regmap, 0x8312, (u8)(h_total % 256));
+
+ regmap_write(lt9611->regmap, 0x8313, (u8)(h_act / 256));
+ regmap_write(lt9611->regmap, 0x8314, (u8)(h_act % 256));
+
+ regmap_write(lt9611->regmap, 0x8315, (u8)(vpw % 256));
+ regmap_write(lt9611->regmap, 0x8316, (u8)(hpw % 256));
+
+ regmap_write(lt9611->regmap, 0x8317, (u8)(vfp % 256));
+
+ regmap_write(lt9611->regmap, 0x8318, (u8)(vss % 256));
+
+ regmap_write(lt9611->regmap, 0x8319, (u8)(hfp % 256));
+
+ regmap_write(lt9611->regmap, 0x831a, (u8)(hss / 256));
+ regmap_write(lt9611->regmap, 0x831b, (u8)(hss % 256));
+}
+
+static int lt9611_pcr_setup(struct lt9611 *lt9611,
+ const struct drm_display_mode *mode)
+{
+ struct reg_sequence reg_cfg[] = {
+ { 0x830b, 0x01 },
+ { 0x830c, 0x10 },
+ { 0x8348, 0x00 },
+ { 0x8349, 0x81 },
+
+ /* stage 1 */
+ { 0x8321, 0x4a },
+ { 0x8324, 0x71 },
+ { 0x8325, 0x30 },
+ { 0x832a, 0x01 },
+
+ /* stage 2 */
+ { 0x834a, 0x40 },
+ { 0x831d, 0x10 },
+
+ /* MK limit */
+ { 0x832d, 0x38 },
+ { 0x8331, 0x08 },
+ };
+
+ regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg));
+
+ switch (mode->hdisplay) {
+ case 640:
+ regmap_write(lt9611->regmap, 0x8326, 0x14);
+ break;
+ case 1920:
+ regmap_write(lt9611->regmap, 0x8326, 0x37);
+ break;
+ case 3840:
+ regmap_write(lt9611->regmap, 0x830b, 0x03);
+ regmap_write(lt9611->regmap, 0x830c, 0xd0);
+ regmap_write(lt9611->regmap, 0x8348, 0x03);
+ regmap_write(lt9611->regmap, 0x8349, 0xe0);
+ regmap_write(lt9611->regmap, 0x8324, 0x72);
+ regmap_write(lt9611->regmap, 0x8325, 0x00);
+ regmap_write(lt9611->regmap, 0x832a, 0x01);
+ regmap_write(lt9611->regmap, 0x834a, 0x10);
+ regmap_write(lt9611->regmap, 0x831d, 0x10);
+ regmap_write(lt9611->regmap, 0x8326, 0x37);
+ break;
+ }
+
+ /* pcr rst */
+ regmap_write(lt9611->regmap, 0x8011, 0x5a);
+ regmap_write(lt9611->regmap, 0x8011, 0xfa);
+
+ return 0;
+}
+
+static int lt9611_pll_setup(struct lt9611 *lt9611,
+ const struct drm_display_mode *mode)
+{
+ unsigned int pclk = mode->clock;
+ struct reg_sequence reg_cfg[] = {
+ /* txpll init */
+ { 0x8123, 0x40 },
+ { 0x8124, 0x64 },
+ { 0x8125, 0x80 },
+ { 0x8126, 0x55 },
+ { 0x812c, 0x37 },
+ { 0x812f, 0x01 },
+ { 0x8126, 0x55 },
+ { 0x8127, 0x66 },
+ { 0x8128, 0x88 },
+ };
+
+ regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg));
+
+ if (pclk > 150000)
+ regmap_write(lt9611->regmap, 0x812d, 0x88);
+ else if (pclk > 70000)
+ regmap_write(lt9611->regmap, 0x812d, 0x99);
+ else
+ regmap_write(lt9611->regmap, 0x812d, 0xaa);
+
+ regmap_write(lt9611->regmap, 0x82e3, pclk >> 17); /* pclk[19:16] */
+ regmap_write(lt9611->regmap, 0x82e4, pclk >> 9); /* pclk[15:8] */
+ regmap_write(lt9611->regmap, 0x82e5, pclk >> 1); /* pclk[7:0] */
+
+ regmap_write(lt9611->regmap, 0x82de, 0x20);
+ regmap_write(lt9611->regmap, 0x82de, 0xe0);
+
+ regmap_write(lt9611->regmap, 0x8016, 0xf1);
+ regmap_write(lt9611->regmap, 0x8016, 0xf3);
+
+ return 0;
+}
+
+static int lt9611_video_check(struct lt9611 *lt9611)
+{
+ u32 v_total, v_act, h_act_a, h_act_b, h_total_sysclk;
+ unsigned int temp;
+ int ret;
+
+ /* top module video check */
+
+ /* v_act */
+ ret = regmap_read(lt9611->regmap, 0x8282, &temp);
+ if (ret)
+ goto end;
+
+ v_act = temp << 8;
+ ret = regmap_read(lt9611->regmap, 0x8283, &temp);
+ if (ret)
+ goto end;
+ v_act = v_act + temp;
+
+ /* v_total */
+ ret = regmap_read(lt9611->regmap, 0x826c, &temp);
+ if (ret)
+ goto end;
+ v_total = temp << 8;
+ ret = regmap_read(lt9611->regmap, 0x826d, &temp);
+ if (ret)
+ goto end;
+ v_total = v_total + temp;
+
+ /* h_total_sysclk */
+ ret = regmap_read(lt9611->regmap, 0x8286, &temp);
+ if (ret)
+ goto end;
+ h_total_sysclk = temp << 8;
+ ret = regmap_read(lt9611->regmap, 0x8287, &temp);
+ if (ret)
+ goto end;
+ h_total_sysclk = h_total_sysclk + temp;
+
+ /* h_act_a */
+ ret = regmap_read(lt9611->regmap, 0x8382, &temp);
+ if (ret)
+ goto end;
+ h_act_a = temp << 8;
+ ret = regmap_read(lt9611->regmap, 0x8383, &temp);
+ if (ret)
+ goto end;
+ h_act_a = (h_act_a + temp) / 3;
+
+ /* h_act_b */
+ ret = regmap_read(lt9611->regmap, 0x8386, &temp);
+ if (ret)
+ goto end;
+ h_act_b = temp << 8;
+ ret = regmap_read(lt9611->regmap, 0x8387, &temp);
+ if (ret)
+ goto end;
+ h_act_b = (h_act_b + temp) / 3;
+
+ dev_info(lt9611->dev,
+ "video check: h_act_a=%d, h_act_b=%d, v_act=%d, v_total=%d, h_total_sysclk=%d\n",
+ h_act_a, h_act_b, v_act, v_total, h_total_sysclk);
+
+ return 0;
+
+end:
+ dev_err(lt9611->dev, "read video check error\n");
+ return ret;
+}
+
+static void lt9611_hdmi_tx_digital(struct lt9611 *lt9611)
+{
+ regmap_write(lt9611->regmap, 0x8443, 0x46 - lt9611->vic);
+ regmap_write(lt9611->regmap, 0x8447, lt9611->vic);
+ regmap_write(lt9611->regmap, 0x843d, 0x0a); /* UD1 infoframe */
+
+ regmap_write(lt9611->regmap, 0x82d6, 0x8c);
+ regmap_write(lt9611->regmap, 0x82d7, 0x04);
+}
+
+static void lt9611_hdmi_tx_phy(struct lt9611 *lt9611)
+{
+ struct reg_sequence reg_cfg[] = {
+ { 0x8130, 0x6a },
+ { 0x8131, 0x44 }, /* HDMI DC mode */
+ { 0x8132, 0x4a },
+ { 0x8133, 0x0b },
+ { 0x8134, 0x00 },
+ { 0x8135, 0x00 },
+ { 0x8136, 0x00 },
+ { 0x8137, 0x44 },
+ { 0x813f, 0x0f },
+ { 0x8140, 0xa0 },
+ { 0x8141, 0xa0 },
+ { 0x8142, 0xa0 },
+ { 0x8143, 0xa0 },
+ { 0x8144, 0x0a },
+ };
+
+ /* HDMI AC mode */
+ if (lt9611->ac_mode)
+ reg_cfg[2].def = 0x73;
+
+ regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg));
+}
+
+static irqreturn_t lt9611_irq_thread_handler(int irq, void *dev_id)
+{
+ struct lt9611 *lt9611 = dev_id;
+ unsigned int irq_flag0 = 0;
+ unsigned int irq_flag3 = 0;
+
+ regmap_read(lt9611->regmap, 0x820f, &irq_flag3);
+ regmap_read(lt9611->regmap, 0x820c, &irq_flag0);
+
+ pr_debug("%s() irq_flag0: %#x irq_flag3: %#x\n",
+ __func__, irq_flag0, irq_flag3);
+
+ /* hpd changed low */
+ if (irq_flag3 & 0x80) {
+ dev_info(lt9611->dev, "hdmi cable disconnected\n");
+
+ regmap_write(lt9611->regmap, 0x8207, 0xbf);
+ regmap_write(lt9611->regmap, 0x8207, 0x3f);
+ }
+ /* hpd changed high */
+ if (irq_flag3 & 0x40) {
+ dev_info(lt9611->dev, "hdmi cable connected\n");
+
+ regmap_write(lt9611->regmap, 0x8207, 0x7f);
+ regmap_write(lt9611->regmap, 0x8207, 0x3f);
+ }
+
+ if (irq_flag3 & 0xc0)
+ drm_kms_helper_hotplug_event(lt9611->bridge.dev);
+
+ /* video input changed */
+ if (irq_flag0 & 0x01) {
+ dev_info(lt9611->dev, "video input changed\n");
+ regmap_write(lt9611->regmap, 0x829e, 0xff);
+ regmap_write(lt9611->regmap, 0x829e, 0xf7);
+ regmap_write(lt9611->regmap, 0x8204, 0xff);
+ regmap_write(lt9611->regmap, 0x8204, 0xfe);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void lt9611_enable_hpd_interrupts(struct lt9611 *lt9611)
+{
+ unsigned int val;
+
+ dev_dbg(lt9611->dev, "enabling hpd interrupts\n");
+
+ regmap_read(lt9611->regmap, 0x8203, &val);
+
+ val &= ~0xc0;
+ regmap_write(lt9611->regmap, 0x8203, val);
+ regmap_write(lt9611->regmap, 0x8207, 0xff); //clear
+ regmap_write(lt9611->regmap, 0x8207, 0x3f);
+}
+
+static void lt9611_sleep_setup(struct lt9611 *lt9611)
+{
+ struct reg_sequence sleep_setup[] = {
+ { 0x8024, 0x76 },
+ { 0x8023, 0x01 },
+ { 0x8157, 0x03 }, //set addr pin as output
+ { 0x8149, 0x0b },
+ { 0x8151, 0x30 }, //disable IRQ
+ { 0x8102, 0x48 }, //MIPI Rx power down
+ { 0x8123, 0x80 },
+ { 0x8130, 0x00 },
+ { 0x8100, 0x01 }, //bandgap power down
+ { 0x8101, 0x00 }, //system clk power down
+ };
+
+ dev_dbg(lt9611->dev, "sleep\n");
+
+ regmap_multi_reg_write(lt9611->regmap,
+ sleep_setup, ARRAY_SIZE(sleep_setup));
+ lt9611->sleep = true;
+}
+
+static int lt9611_power_on(struct lt9611 *lt9611)
+{
+ int ret;
+ const struct reg_sequence seq[] = {
+ /* LT9611_System_Init */
+ { 0x8101, 0x18 }, /* sel xtal clock */
+
+ /* timer for frequency meter */
+ { 0x821b, 0x69 }, /*timer 2*/
+ { 0x821c, 0x78 },
+ { 0x82cb, 0x69 }, /*timer 1 */
+ { 0x82cc, 0x78 },
+
+ /* irq init */
+ { 0x8251, 0x01 },
+ { 0x8258, 0x0a }, /* hpd irq */
+ { 0x8259, 0x80 }, /* hpd debounce width */
+ { 0x829e, 0xf7 }, /* video check irq */
+
+ /* power consumption for work */
+ { 0x8004, 0xf0 },
+ { 0x8006, 0xf0 },
+ { 0x800a, 0x80 },
+ { 0x800b, 0x40 },
+ { 0x800d, 0xef },
+ { 0x8011, 0xfa },
+ };
+
+ if (lt9611->power_on)
+ return 0;
+
+ dev_dbg(lt9611->dev, "power on\n");
+
+ ret = regmap_multi_reg_write(lt9611->regmap, seq, ARRAY_SIZE(seq));
+ if (!ret)
+ lt9611->power_on = true;
+
+ return ret;
+}
+
+static int lt9611_power_off(struct lt9611 *lt9611)
+{
+ int ret;
+
+ dev_dbg(lt9611->dev, "power off\n");
+
+ ret = regmap_write(lt9611->regmap, 0x8130, 0x6a);
+ if (!ret)
+ lt9611->power_on = false;
+
+ return ret;
+}
+
+static void lt9611_reset(struct lt9611 *lt9611)
+{
+ gpiod_set_value_cansleep(lt9611->reset_gpio, 1);
+ msleep(20);
+ gpiod_set_value_cansleep(lt9611->reset_gpio, 0);
+ msleep(20);
+ gpiod_set_value_cansleep(lt9611->reset_gpio, 1);
+ msleep(100);
+}
+
+static void lt9611_assert_5v(struct lt9611 *lt9611)
+{
+ if (!lt9611->enable_gpio)
+ return;
+
+ gpiod_set_value_cansleep(lt9611->enable_gpio, 1);
+ msleep(20);
+}
+
+static int lt9611_regulator_init(struct lt9611 *lt9611)
+{
+ int ret;
+
+ lt9611->supplies[0].supply = "vdd";
+ lt9611->supplies[1].supply = "vcc";
+ ret = devm_regulator_bulk_get(lt9611->dev, 2, lt9611->supplies);
+ if (ret < 0)
+ return ret;
+
+ return regulator_set_load(lt9611->supplies[0].consumer, 300000);
+}
+
+static int lt9611_regulator_enable(struct lt9611 *lt9611)
+{
+ int ret;
+
+ ret = regulator_enable(lt9611->supplies[0].consumer);
+ if (ret < 0)
+ return ret;
+
+ usleep_range(1000, 10000);
+
+ ret = regulator_enable(lt9611->supplies[1].consumer);
+ if (ret < 0) {
+ regulator_disable(lt9611->supplies[0].consumer);
+ return ret;
+ }
+
+ return 0;
+}
+
+static struct lt9611_mode *lt9611_find_mode(const struct drm_display_mode *mode)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(lt9611_modes); i++) {
+ if (lt9611_modes[i].hdisplay == mode->hdisplay &&
+ lt9611_modes[i].vdisplay == mode->vdisplay &&
+ lt9611_modes[i].fps == drm_mode_vrefresh(mode)) {
+ return <9611_modes[i];
+ }
+ }
+
+ return NULL;
+}
+
+/* connector funcs */
+static enum drm_connector_status
+lt9611_connector_detect(struct drm_connector *connector, bool force)
+{
+ struct lt9611 *lt9611 = connector_to_lt9611(connector);
+ unsigned int reg_val = 0;
+ int connected = 0;
+
+ regmap_read(lt9611->regmap, 0x825e, ®_val);
+ connected = (reg_val & BIT(2));
+ dev_dbg(lt9611->dev, "connected = %x\n", connected);
+
+ lt9611->status = connected ? connector_status_connected :
+ connector_status_disconnected;
+
+ return lt9611->status;
+}
+
+static int lt9611_read_edid(struct lt9611 *lt9611)
+{
+ unsigned int temp;
+ int ret = 0;
+ int i, j;
+
+ memset(lt9611->edid_buf, 0, EDID_SEG_SIZE);
+
+ regmap_write(lt9611->regmap, 0x8503, 0xc9);
+
+ /* 0xA0 is EDID device address */
+ regmap_write(lt9611->regmap, 0x8504, 0xa0);
+ /* 0x00 is EDID offset address */
+ regmap_write(lt9611->regmap, 0x8505, 0x00);
+ /* length for read */
+ regmap_write(lt9611->regmap, 0x8506, 0x20);
+ regmap_write(lt9611->regmap, 0x8514, 0x7f);
+
+ for (i = 0 ; i < 8 ; i++) {
+ /* offset address */
+ regmap_write(lt9611->regmap, 0x8505, i * 32);
+ regmap_write(lt9611->regmap, 0x8507, 0x36);
+ regmap_write(lt9611->regmap, 0x8507, 0x31);
+ regmap_write(lt9611->regmap, 0x8507, 0x37);
+ usleep_range(5000, 10000);
+
+ regmap_read(lt9611->regmap, 0x8540, &temp);
+
+ if (temp & 0x02) { /*KEY_DDC_ACCS_DONE=1*/
+ for (j = 0; j < 32; j++) {
+ regmap_read(lt9611->regmap, 0x8583, &temp);
+ lt9611->edid_buf[i * 32 + j] = temp;
+ }
+ } else if (temp & 0x50) { /* DDC No Ack or Abitration lost */
+ dev_err(lt9611->dev, "read edid failed: no ack\n");
+ ret = -EIO;
+ goto end;
+ } else {
+ dev_err(lt9611->dev,
+ "read edid failed: access not done\n");
+ ret = -EIO;
+ goto end;
+ }
+ }
+
+ dev_dbg(lt9611->dev, "read edid succeeded, checksum = 0x%x\n",
+ lt9611->edid_buf[255]);
+
+end:
+ regmap_write(lt9611->regmap, 0x8507, 0x1f);
+ return ret;
+}
+
+/* TODO: add support for more extension blocks */
+static int
+lt9611_get_edid_block(void *data, u8 *buf, unsigned int block, size_t len)
+{
+ struct lt9611 *lt9611 = data;
+ int ret;
+
+ dev_dbg(lt9611->dev, "get edid block: block=%d, len=%d\n",
+ block, (int)len);
+
+ if (len > 128)
+ return -EINVAL;
+
+ /* support up to 1 extension block */
+ if (block > 1)
+ return -EINVAL;
+
+ if (block == 0) {
+ /* always read 2 edid blocks once */
+ ret = lt9611_read_edid(lt9611);
+ if (ret) {
+ dev_err(lt9611->dev, "edid read failed\n");
+ return ret;
+ }
+ }
+
+ if (block % 2 == 0)
+ memcpy(buf, lt9611->edid_buf, len);
+ else
+ memcpy(buf, lt9611->edid_buf + 128, len);
+
+ return 0;
+}
+
+static int lt9611_connector_get_modes(struct drm_connector *connector)
+{
+ struct lt9611 *lt9611 = connector_to_lt9611(connector);
+ unsigned int count;
+ struct edid *edid;
+
+ dev_dbg(lt9611->dev, "get modes\n");
+
+ lt9611_power_on(lt9611);
+ edid = drm_do_get_edid(connector, lt9611_get_edid_block, lt9611);
+ drm_connector_update_edid_property(connector, edid);
+ count = drm_add_edid_modes(connector, edid);
+ kfree(edid);
+
+ return count;
+}
+
+static enum drm_mode_status
+lt9611_connector_mode_valid(struct drm_connector *connector,
+ struct drm_display_mode *mode)
+{
+ struct lt9611_mode *lt9611_mode = lt9611_find_mode(mode);
+
+ return lt9611_mode ? MODE_OK : MODE_BAD;
+}
+
+/* bridge funcs */
+static void lt9611_bridge_enable(struct drm_bridge *bridge)
+{
+ struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
+
+ dev_dbg(lt9611->dev, "bridge enable\n");
+
+ if (lt9611_power_on(lt9611)) {
+ dev_err(lt9611->dev, "power on failed\n");
+ return;
+ }
+
+ dev_dbg(lt9611->dev, "video on\n");
+
+ lt9611_mipi_input_analog(lt9611);
+ lt9611_hdmi_tx_digital(lt9611);
+ lt9611_hdmi_tx_phy(lt9611);
+
+ msleep(500);
+
+ lt9611_video_check(lt9611);
+
+ /* Enable HDMI output */
+ regmap_write(lt9611->regmap, 0x8130, 0xea);
+}
+
+static void lt9611_bridge_disable(struct drm_bridge *bridge)
+{
+ struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
+ int ret;
+
+ dev_dbg(lt9611->dev, "bridge disable\n");
+
+ /* Disable HDMI output */
+ ret = regmap_write(lt9611->regmap, 0x8130, 0x6a);
+ if (ret) {
+ dev_err(lt9611->dev, "video on failed\n");
+ return;
+ }
+
+ if (lt9611_power_off(lt9611)) {
+ dev_err(lt9611->dev, "power on failed\n");
+ return;
+ }
+}
+
+static struct
+drm_connector_helper_funcs lt9611_bridge_connector_helper_funcs = {
+ .get_modes = lt9611_connector_get_modes,
+ .mode_valid = lt9611_connector_mode_valid,
+};
+
+static const struct drm_connector_funcs lt9611_bridge_connector_funcs = {
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .detect = lt9611_connector_detect,
+ .destroy = drm_connector_cleanup,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
+};
+
+static struct mipi_dsi_device *lt9611_attach_dsi(struct lt9611 *lt9611,
+ struct device_node *dsi_node)
+{
+ const struct mipi_dsi_device_info info = { "lt9611", 0, NULL };
+ struct mipi_dsi_device *dsi;
+ struct mipi_dsi_host *host;
+ int ret;
+
+ host = of_find_mipi_dsi_host_by_node(dsi_node);
+ if (!host) {
+ dev_err(lt9611->dev, "failed to find dsi host\n");
+ return ERR_PTR(-EPROBE_DEFER);
+ }
+
+ dsi = mipi_dsi_device_register_full(host, &info);
+ if (IS_ERR(dsi)) {
+ dev_err(lt9611->dev, "failed to create dsi device\n");
+ return dsi;
+ }
+
+ dsi->lanes = 4;
+ dsi->format = MIPI_DSI_FMT_RGB888;
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
+ MIPI_DSI_MODE_VIDEO_HSE;
+
+ ret = mipi_dsi_attach(dsi);
+ if (ret < 0) {
+ dev_err(lt9611->dev, "failed to attach dsi to host\n");
+ mipi_dsi_device_unregister(dsi);
+ return ERR_PTR(ret);
+ }
+
+ return dsi;
+}
+
+static int lt9611_bridge_attach(struct drm_bridge *bridge,
+ enum drm_bridge_attach_flags flags)
+{
+ struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
+ int ret;
+
+ dev_dbg(lt9611->dev, "bridge attach\n");
+
+ ret = drm_connector_init(bridge->dev, <9611->connector,
+ <9611_bridge_connector_funcs,
+ DRM_MODE_CONNECTOR_HDMIA);
+ if (ret) {
+ DRM_ERROR("Failed to initialize connector with drm\n");
+ return ret;
+ }
+
+ drm_connector_helper_add(<9611->connector,
+ <9611_bridge_connector_helper_funcs);
+ drm_connector_attach_encoder(<9611->connector, bridge->encoder);
+
+ if (!bridge->encoder) {
+ DRM_ERROR("Parent encoder object not found");
+ return -ENODEV;
+ }
+
+ /* Attach primary DSI */
+ lt9611->dsi0 = lt9611_attach_dsi(lt9611, lt9611->dsi0_node);
+ if (IS_ERR(lt9611->dsi0))
+ return PTR_ERR(lt9611->dsi0);
+
+ /* Attach secondary DSI, if specified */
+ if (lt9611->dsi1_node) {
+ lt9611->dsi1 = lt9611_attach_dsi(lt9611, lt9611->dsi1_node);
+ if (IS_ERR(lt9611->dsi1)) {
+ ret = PTR_ERR(lt9611->dsi1);
+ goto err_unregister_dsi0;
+ }
+ }
+
+ return 0;
+
+err_unregister_dsi0:
+ mipi_dsi_device_unregister(lt9611->dsi0);
+
+ return ret;
+}
+
+static void lt9611_bridge_detach(struct drm_bridge *bridge)
+{
+ struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
+
+ if (lt9611->dsi1) {
+ mipi_dsi_detach(lt9611->dsi1);
+ mipi_dsi_device_unregister(lt9611->dsi1);
+ }
+
+ mipi_dsi_detach(lt9611->dsi0);
+ mipi_dsi_device_unregister(lt9611->dsi0);
+}
+
+static enum drm_mode_status
+lt9611_bridge_mode_valid(struct drm_bridge *bridge,
+ const struct drm_display_mode *mode)
+{
+ struct lt9611_mode *lt9611_mode = lt9611_find_mode(mode);
+ struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
+
+ if (lt9611_mode->intfs > 1 && !lt9611->dsi1)
+ return MODE_PANEL;
+ else
+ return MODE_OK;
+}
+
+static void lt9611_bridge_pre_enable(struct drm_bridge *bridge)
+{
+ struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
+
+ dev_dbg(lt9611->dev, "bridge pre_enable\n");
+
+ if (!lt9611->sleep)
+ return;
+
+ lt9611_reset(lt9611);
+ regmap_write(lt9611->regmap, 0x80ee, 0x01);
+
+ lt9611->sleep = false;
+}
+
+static void lt9611_bridge_post_disable(struct drm_bridge *bridge)
+{
+ struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
+
+ dev_dbg(lt9611->dev, "bridge post_disable\n");
+
+ lt9611_sleep_setup(lt9611);
+}
+
+static void lt9611_bridge_mode_set(struct drm_bridge *bridge,
+ const struct drm_display_mode *mode,
+ const struct drm_display_mode *adj_mode)
+{
+ struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
+ struct hdmi_avi_infoframe avi_frame;
+ int ret;
+
+ dev_dbg(lt9611->dev, "bridge mode_set: hdisplay=%d, vdisplay=%d, vrefresh=%d, clock=%d\n",
+ adj_mode->hdisplay, adj_mode->vdisplay,
+ adj_mode->vrefresh, adj_mode->clock);
+
+ lt9611_bridge_pre_enable(bridge);
+
+ lt9611_mipi_input_digital(lt9611, mode);
+ lt9611_pll_setup(lt9611, mode);
+ lt9611_mipi_video_setup(lt9611, mode);
+ lt9611_pcr_setup(lt9611, mode);
+
+ ret = drm_hdmi_avi_infoframe_from_display_mode(&avi_frame,
+ <9611->connector,
+ mode);
+ if (!ret)
+ lt9611->vic = avi_frame.video_code;
+}
+
+static const struct drm_bridge_funcs lt9611_bridge_funcs = {
+ .attach = lt9611_bridge_attach,
+ .detach = lt9611_bridge_detach,
+ .mode_valid = lt9611_bridge_mode_valid,
+ .enable = lt9611_bridge_enable,
+ .disable = lt9611_bridge_disable,
+ .post_disable = lt9611_bridge_post_disable,
+ .mode_set = lt9611_bridge_mode_set,
+};
+
+static int lt9611_parse_dt(struct device *dev,
+ struct lt9611 *lt9611)
+{
+ lt9611->dsi0_node = of_graph_get_remote_node(dev->of_node, 1, -1);
+ if (!lt9611->dsi0_node) {
+ DRM_DEV_ERROR(dev, "failed to get remote node for primary dsi\n");
+ return -ENODEV;
+ }
+
+ lt9611->dsi1_node = of_graph_get_remote_node(dev->of_node, 2, -1);
+
+ lt9611->ac_mode = of_property_read_bool(dev->of_node, "lt,ac-mode");
+ dev_dbg(lt9611->dev, "ac_mode=%d\n", lt9611->ac_mode);
+
+ return 0;
+}
+
+static int lt9611_gpio_init(struct lt9611 *lt9611)
+{
+ struct device *dev = lt9611->dev;
+
+ lt9611->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+ if (IS_ERR(lt9611->reset_gpio)) {
+ dev_err(dev, "failed to acquire reset gpio\n");
+ return PTR_ERR(lt9611->reset_gpio);
+ }
+
+ lt9611->enable_gpio = devm_gpiod_get_optional(dev, "enable",
+ GPIOD_OUT_LOW);
+ if (IS_ERR(lt9611->enable_gpio)) {
+ dev_err(dev, "failed to acquire enable gpio\n");
+ return PTR_ERR(lt9611->enable_gpio);
+ }
+
+ return 0;
+}
+
+static int lt9611_read_device_rev(struct lt9611 *lt9611)
+{
+ unsigned int rev;
+ int ret;
+
+ regmap_write(lt9611->regmap, 0x80ee, 0x01);
+ ret = regmap_read(lt9611->regmap, 0x8002, &rev);
+ if (ret)
+ dev_err(lt9611->dev, "failed to read revision: %d\n", ret);
+
+ dev_info(lt9611->dev, "LT9611 revision: 0x%x\n", rev);
+
+ return ret;
+}
+
+static int lt9611_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct lt9611 *lt9611;
+ struct device *dev = &client->dev;
+ int ret;
+
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+ dev_err(dev, "device doesn't support I2C\n");
+ return -ENODEV;
+ }
+
+ lt9611 = devm_kzalloc(dev, sizeof(*lt9611), GFP_KERNEL);
+ if (!lt9611)
+ return -ENOMEM;
+
+ lt9611->dev = &client->dev;
+ lt9611->client = client;
+ lt9611->sleep = false;
+
+ lt9611->regmap = devm_regmap_init_i2c(client, <9611_regmap_config);
+ if (IS_ERR(lt9611->regmap)) {
+ DRM_ERROR("regmap i2c init failed\n");
+ return PTR_ERR(lt9611->regmap);
+ }
+
+ ret = lt9611_parse_dt(&client->dev, lt9611);
+ if (ret) {
+ dev_err(dev, "failed to parse device tree\n");
+ return ret;
+ }
+
+ ret = lt9611_gpio_init(lt9611);
+ if (ret < 0)
+ return ret;
+
+ ret = lt9611_regulator_init(lt9611);
+ if (ret < 0)
+ return ret;
+
+ lt9611_assert_5v(lt9611);
+
+ ret = lt9611_regulator_enable(lt9611);
+ if (ret)
+ return ret;
+
+ lt9611_reset(lt9611);
+
+ ret = lt9611_read_device_rev(lt9611);
+ if (ret) {
+ dev_err(dev, "failed to read chip rev\n");
+ goto err_disable_regulators;
+ }
+
+ ret = devm_request_threaded_irq(dev, client->irq, NULL,
+ lt9611_irq_thread_handler,
+ IRQF_ONESHOT, "lt9611", lt9611);
+ if (ret) {
+ dev_err(dev, "failed to request irq\n");
+ goto err_disable_regulators;
+ }
+
+ i2c_set_clientdata(client, lt9611);
+
+ lt9611->bridge.funcs = <9611_bridge_funcs;
+ lt9611->bridge.of_node = client->dev.of_node;
+
+ drm_bridge_add(<9611->bridge);
+
+ lt9611_enable_hpd_interrupts(lt9611);
+
+ return 0;
+
+err_disable_regulators:
+ regulator_bulk_disable(ARRAY_SIZE(lt9611->supplies), lt9611->supplies);
+
+ of_node_put(lt9611->dsi0_node);
+ of_node_put(lt9611->dsi1_node);
+
+ return ret;
+}
+
+static int lt9611_remove(struct i2c_client *client)
+{
+ struct lt9611 *lt9611 = i2c_get_clientdata(client);
+
+ disable_irq(client->irq);
+ drm_bridge_remove(<9611->bridge);
+
+ regulator_bulk_disable(ARRAY_SIZE(lt9611->supplies), lt9611->supplies);
+
+ of_node_put(lt9611->dsi0_node);
+ of_node_put(lt9611->dsi1_node);
+
+ return 0;
+}
+
+static struct i2c_device_id lt9611_id[] = {
+ { "lontium,lt9611", 0},
+ {}
+};
+
+static const struct of_device_id lt9611_match_table[] = {
+ {.compatible = "lontium,lt9611"},
+ {}
+};
+MODULE_DEVICE_TABLE(of, lt9611_match_table);
+
+static struct i2c_driver lt9611_driver = {
+ .driver = {
+ .name = "lt9611",
+ .of_match_table = lt9611_match_table,
+ },
+ .probe = lt9611_probe,
+ .remove = lt9611_remove,
+ .id_table = lt9611_id,
+};
+module_i2c_driver(lt9611_driver);
+
+MODULE_LICENSE("GPL v2");
--
2.25.4
^ permalink raw reply related
* Re: [PATCH v8 00/10] Introduce OPP bandwidth bindings
From: Georgi Djakov @ 2020-05-13 10:10 UTC (permalink / raw)
To: Viresh Kumar
Cc: vireshk, nm, sboyd, rjw, saravanak, sibis, mka, robh+dt, rnayak,
bjorn.andersson, vincent.guittot, jcrouse, evgreen, linux-pm,
devicetree, linux-kernel
In-Reply-To: <20200513065559.wznvqc7tzvmv3ghy@vireshk-i7>
Hi Viresh,
On 5/13/20 09:55, Viresh Kumar wrote:
> On 12-05-20, 15:53, Georgi Djakov wrote:
>> Here is a proposal to extend the OPP bindings with bandwidth based on
>> a few previous discussions [1] and patchsets from me [2][3] and Saravana
>> [4][5][6][7][8][9].
>>
>> Changes in v8:
>> * Addressed review comments from Matthias, Sibi and Viresh.
>> * Picked reviewed-by tags.
>> * Picked Sibi's interconnect-tag patches into this patchset.
>
> I have applied the series with the modifications I replied with
> separately.
Thanks a lot!
> Please lemme know if any more tags (reviewed/acked) etc need to be
> applied or any more changes are required before I send the pull
> request to Rafael.
>
> Please give my branch a try as soon as you can.
On top of your branch i tested with scaling 3 different test paths (also
tagged with different tags) and it looks good:
node tag avg peak
--------------------------------------------------------------------
slv_ebi_ch0 458824 1525000
cpu0 3 922 911
cpu0 2 902 901
cpu0 1 457000 1525000
Apart from that, i ran memory throughput tests and they also confirm
that it's working as expected.
There will be a minor conflict with my branch when this is merged upstream,
so maybe we will need to report it or use an immutable tag/branch.
Thanks,
Georgi
^ permalink raw reply
* Re: [PATCH v8 00/10] Introduce OPP bandwidth bindings
From: Viresh Kumar @ 2020-05-13 10:18 UTC (permalink / raw)
To: Georgi Djakov
Cc: vireshk, nm, sboyd, rjw, saravanak, sibis, mka, robh+dt, rnayak,
bjorn.andersson, vincent.guittot, jcrouse, evgreen, linux-pm,
devicetree, linux-kernel
In-Reply-To: <ea73d0e7-7428-c3cf-b44b-59427c4d6109@linaro.org>
On 13-05-20, 13:10, Georgi Djakov wrote:
> There will be a minor conflict with my branch when this is merged upstream,
> so maybe we will need to report it or use an immutable tag/branch.
Okay, give me your branch and I will rebase over it then. Or if you
can do that over my branch, that will be better as mine is just based
of rc2.
--
viresh
^ permalink raw reply
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