* Re: [PATCH 3/3] hwrng: ba431-rng: add support for BA431 hwrng
From: Olivier Sobrie @ 2020-05-29 20:33 UTC (permalink / raw)
To: Rob Herring
Cc: Arnd Bergmann, Matt Mackall, Herbert Xu, Greg Kroah-Hartman,
open list:HARDWARE RANDOM NUMBER GENERATOR CORE, DTML,
linux-kernel@vger.kernel.org, Waleed Ziad, sebastien.rabou
In-Reply-To: <20200529171231.GA2581035@bogus>
On Fri, May 29, 2020 at 11:12:31AM -0600, Rob Herring wrote:
> On Mon, May 25, 2020 at 10:28:46PM +0200, Arnd Bergmann wrote:
> > On Mon, May 25, 2020 at 10:07 PM Olivier Sobrie
> > <olivier.sobrie@silexinsight.com> wrote:
> > >
> > > Silex insight BA431 is an IP designed to generate random numbers that
> > > can be integrated in various FPGA.
> > > This driver adds support for it through the hwrng interface.
> > >
> > > This driver is used in Silex Insight Viper OEM boards.
> > >
> > > Signed-off-by: Olivier Sobrie <olivier.sobrie@silexinsight.com>
> > > Signed-off-by: Waleed Ziad <waleed94ziad@gmail.com>
> >
> > The driver looks good to me.
> >
> > Acked-by: Arnd Bergmann <arnd@arndb.de>
> >
> > > drivers/char/hw_random/Kconfig | 10 ++
> > > drivers/char/hw_random/Makefile | 1 +
> > > drivers/char/hw_random/ba431-rng.c | 240 +++++++++++++++++++++++++++++
> >
> > I wonder if we should move drivers/char/hw_random to its own top-level drivers
> > subsystem outside of drivers/char. It seems to be growing steadily and is larger
> > than a lot of other subsystems with currently 34 drivers in there.
> >
> > Not your problem though.
> >
> > > + /* Wait until the state changed */
> > > + for (i = 0; i < BA431_RESET_READ_STATUS_RETRIES; ++i) {
> > > + state = ba431_trng_get_state(ba431);
> > > + if (state >= BA431_STATE_STARTUP)
> > > + break;
> > > +
> > > + udelay(BA431_RESET_READ_STATUS_INTERVAL);
> > > + }
> >
> > Looking for something to improve, I noticed that this loop can take over
> > a millisecond to time out, and it always runs in non-atomic context.
> > It may be better to use usleep_range() than udelay().
>
> Or better yet, use the register polling helpers.
Indeed, thanks for the suggestion.
I'll replace this loop by the readx_poll_timeout() macro.
Olivier
^ permalink raw reply
* Re: [PATCH 3/3] power: supply: max17040: Set rcomp value
From: Jonathan Bakker @ 2020-05-29 20:09 UTC (permalink / raw)
To: Sebastian Reichel; +Cc: linux-pm, linux-kernel, robh+dt, devicetree
In-Reply-To: <20200528170230.62c7jvmyjkhpoykj@earth.universe>
Hi Sebastian,
I'm sorry, I messed up my rebase on top of the low battery alert and it somehow
slipped through my pre-submit checklist.
Before resubmitting, do you want the rcomp changed in any manner (where the
datasheet doesn't specify if its the full 16 bits or only 8 bites for max17040
but does for the later max17043/max77836 where its only 8 bits)?
Thanks and sorry for the issues,
Jonathan
On 2020-05-28 10:02 a.m., Sebastian Reichel wrote:
> Hi,
>
> This patch does not even compile, how did you test it?
>
> -- Sebastian
>
> On Mon, May 04, 2020 at 03:13:00PM -0700, Jonathan Bakker wrote:
>> According to the datasheet (1), the rcomp parameter can
>> vary based on the typical operating temperature and the
>> battery chemistry. If provided, make sure we set it after
>> we reset the chip on boot.
>>
>> 1) https://datasheets.maximintegrated.com/en/ds/MAX17040-MAX17041.pdf
>>
>> Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
>> ---
>> drivers/power/supply/max17040_battery.c | 33 +++++++++++++++++++++----
>> 1 file changed, 28 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/power/supply/max17040_battery.c b/drivers/power/supply/max17040_battery.c
>> index 48aa44665e2f..f66e2fdc0a8a 100644
>> --- a/drivers/power/supply/max17040_battery.c
>> +++ b/drivers/power/supply/max17040_battery.c
>> @@ -10,6 +10,7 @@
>> #include <linux/init.h>
>> #include <linux/platform_device.h>
>> #include <linux/mutex.h>
>> +#include <linux/property.h>
>> #include <linux/err.h>
>> #include <linux/i2c.h>
>> #include <linux/delay.h>
>> @@ -31,6 +32,8 @@
>>
>> #define MAX17040_ATHD_MASK 0xFFC0
>> #define MAX17040_ATHD_DEFAULT_POWER_UP 4
>> +#define MAX17040_RCOMP_MASK 0xFF
>> +#define MAX17040_RCOMP_DEFAULT_POWER_UP 0x97
>>
>> struct max17040_chip {
>> struct i2c_client *client;
>> @@ -48,6 +51,8 @@ struct max17040_chip {
>> int status;
>> /* Low alert threshold from 32% to 1% of the State of Charge */
>> u32 low_soc_alert;
>> + /* Optimization for specific chemistries */
>> + u8 rcomp_value;
>> };
>>
>> static int max17040_get_property(struct power_supply *psy,
>> @@ -119,6 +124,20 @@ static int max17040_set_low_soc_alert(struct i2c_client *client, u32 level)
>> return ret;
>> }
>>
>> +static int max17040_set_rcomp(struct i2c_client *client, u32 val)
>> +{
>> + int ret;
>> + u16 data;
>> +
>> + data = max17040_read_reg(client, MAX17040_RCOMP);
>> + /* clear the rcomp val and set MSb 8 bits */
>> + data &= MAX17040_RCOMP_MASK;
>> + data |= val << 8;
>> + ret = max17040_write_reg(client, MAX17040_RCOMP, data);
>> +
>> + return ret;
>> +}
>> +
>> static void max17040_get_vcell(struct i2c_client *client)
>> {
>> struct max17040_chip *chip = i2c_get_clientdata(client);
>> @@ -190,8 +209,14 @@ static int max17040_get_of_data(struct max17040_chip *chip)
>> "maxim,alert-low-soc-level",
>> &chip->low_soc_alert);
>>
>> - if (chip->low_soc_alert <= 0 || chip->low_soc_alert >= 33)
>> + if (chip->low_soc_alert <= 0 || chip->low_soc_alert >= 33) {
>> + dev_err(&client->dev,
>> + "failed: low SOC alert OF data out of bounds\n");
>> return -EINVAL;
>> + }
>> +
>> + chip->rcomp_value = MAX17040_RCOMP_DEFAULT_POWER_UP;
>> + device_property_read_u8(dev, "maxim,rcomp-value", &chip->rcomp_value);
>>
>> return 0;
>> }
>> @@ -289,11 +314,8 @@ static int max17040_probe(struct i2c_client *client,
>> chip->client = client;
>> chip->pdata = client->dev.platform_data;
>> ret = max17040_get_of_data(chip);
>> - if (ret) {
>> - dev_err(&client->dev,
>> - "failed: low SOC alert OF data out of bounds\n");
>> + if (ret)
>> return ret;
>> - }
>>
>> i2c_set_clientdata(client, chip);
>> psy_cfg.drv_data = chip;
>> @@ -307,6 +329,7 @@ static int max17040_probe(struct i2c_client *client,
>>
>> max17040_reset(client);
>> max17040_get_version(client);
>> + max17040_set_rcomp(client, chip->rcomp_value);
>>
>> /* check interrupt */
>> if (client->irq && of_device_is_compatible(client->dev.of_node,
>> --
>> 2.20.1
^ permalink raw reply
* Re: [PATCH 3/4] dt-bindings: timer: renesas,cmt: Document r8a7742 CMT support
From: Geert Uytterhoeven @ 2020-05-29 19:48 UTC (permalink / raw)
To: Rob Herring
Cc: Lad Prabhakar, Magnus Damm, Linux-Renesas,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux Kernel Mailing List, Prabhakar
In-Reply-To: <20200529191402.GA2771130@bogus>
Hi Rob,
On Fri, May 29, 2020 at 9:14 PM Rob Herring <robh@kernel.org> wrote:
> On Fri, May 29, 2020 at 02:53:02PM +0200, Geert Uytterhoeven wrote:
> > On Wed, May 27, 2020 at 11:19 PM Lad Prabhakar
> > <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> > > Document SoC specific compatible strings for r8a7742. No driver change
> > > is needed as the fallback strings will activate the right code.
> > >
> > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
> >
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >
> > Please note this DT binding is under yamlization, cfr.
> > "[PATCH v2] dt-bindings: timer: renesas: cmt: Convert to json-schema"
> > (20200505155127.4836-1-geert+renesas@glider.be).
>
> Do I need to pick that one up? Doesn't look like it's been applied
> AFAICT.
Would be nice. Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* Re: [PATCH v4 0/2] soc: ti: add k3 platforms chipid module driver
From: Grygorii Strashko @ 2020-05-29 19:39 UTC (permalink / raw)
To: santosh.shilimkar, Arnd Bergmann
Cc: Santosh Shilimkar, Tero Kristo, Rob Herring, Lokesh Vutla, DTML,
Dave Gerlach, Sekhar Nori, Linux ARM,
linux-kernel@vger.kernel.org, Nishanth Menon
In-Reply-To: <cb980673-d3ad-53b8-9351-196ff3f47c45@oracle.com>
On 29/05/2020 22:19, santosh.shilimkar@oracle.com wrote:
> On 5/29/20 11:34 AM, Arnd Bergmann wrote:
>> On Fri, May 29, 2020 at 8:22 PM Grygorii Strashko
>> <grygorii.strashko@ti.com> wrote:
>>> On 12/05/2020 15:34, Grygorii Strashko wrote:
>>
>>>> .../bindings/soc/ti/k3-socinfo.yaml | 40 +++++
>>>> drivers/soc/ti/Kconfig | 10 ++
>>>> drivers/soc/ti/Makefile | 1 +
>>>> drivers/soc/ti/k3-socinfo.c | 152 ++++++++++++++++++
>>>> 4 files changed, 203 insertions(+)
>>>> create mode 100644 Documentation/devicetree/bindings/soc/ti/k3-socinfo.yaml
>>>> create mode 100644 drivers/soc/ti/k3-socinfo.c
>>>>
>>>
>>> Any chances you can pick this up?
>>
>> I merged a version of this driver from Santosh's pull request into the
>> arm/drviers tree yesterday.
>>
>> Is there something missing?
>>
> Nope. I was going to reply on the thread but missed it.
Oh. Thanks. I've missed that it was already picked up.
Thanks again.
--
Best regards,
grygorii
^ permalink raw reply
* Re: [PATCH V3] dt-bindings: timer: Convert i.MX GPT to json-schema
From: Rob Herring @ 2020-05-29 19:36 UTC (permalink / raw)
To: Anson Huang
Cc: linux-arm-kernel, s.hauer, robh+dt, daniel.lezcano, shawnguo,
Linux-imx, festevam, kernel, devicetree, linux-kernel, tglx
In-Reply-To: <1590717882-20922-1-git-send-email-Anson.Huang@nxp.com>
On Fri, 29 May 2020 10:04:42 +0800, Anson Huang wrote:
> Convert the i.MX GPT binding to DT schema format using json-schema.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> Changes since V2:
> - in compatible properties, group all the ones with the same
> fallback to a single 'items' list using enum for the first entry.
> ---
> .../devicetree/bindings/timer/fsl,imxgpt.txt | 45 --------------
> .../devicetree/bindings/timer/fsl,imxgpt.yaml | 72 ++++++++++++++++++++++
> 2 files changed, 72 insertions(+), 45 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/timer/fsl,imxgpt.txt
> create mode 100644 Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
>
Applied, thanks!
^ permalink raw reply
* Re: [PATCH 2/4] dt-bindings: pinctrl: Document optional BCM7211 wake-up interrupts
From: Florian Fainelli @ 2020-05-29 19:36 UTC (permalink / raw)
To: Rob Herring, Florian Fainelli
Cc: linux-kernel, Linus Walleij, Ray Jui, Scott Branden,
maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...,
Nicolas Saenz Julienne, Stefan Wahren, Geert Uytterhoeven,
Matti Vaittinen, open list:PIN CONTROL SUBSYSTEM,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
In-Reply-To: <20200529193315.GA2807797@bogus>
On 5/29/20 12:33 PM, Rob Herring wrote:
> On Thu, May 28, 2020 at 12:21:10PM -0700, Florian Fainelli wrote:
>> BCM7211 supports wake-up interrupts in the form of optional interrupt
>> lines, one per bank, plus the "all banks" interrupt line.
>>
>> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
>> ---
>> .../devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt | 4 +++-
>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
>> index dfc67b90591c..5682b2010e50 100644
>> --- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
>> +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
>> @@ -16,7 +16,9 @@ Required properties:
>> second cell is used to specify optional parameters:
>> - bit 0 specifies polarity (0 for normal, 1 for inverted)
>> - interrupts : The interrupt outputs from the controller. One interrupt per
>> - individual bank followed by the "all banks" interrupt.
>> + individual bank followed by the "all banks" interrupt. For BCM7211, an
>> + additional set of per-bank interrupt line and an "all banks" wake-up
>> + interrupt may be specified.
>
> Is 'all banks' the name? Generally 'wakeup' is used for a wake up irq.
The firmware provided DTB on 7211 names the interrupts "gpio_%d" for the
standard interrupts, including the "all banks" which is then "gpio_3"
and the wake-up interrupts are named "gpio_%d_wake", and the all banks
wake-up is "gpio_3_wake".
--
Florian
^ permalink raw reply
* Re: [PATCH V2] dt-bindings: regulator: Convert anatop regulator to json-schema
From: Rob Herring @ 2020-05-29 19:35 UTC (permalink / raw)
To: Anson Huang
Cc: paul.liu, devicetree, linux-kernel, robh+dt, Linux-imx, broonie,
lgirdwood
In-Reply-To: <1590717551-20772-1-git-send-email-Anson.Huang@nxp.com>
On Fri, 29 May 2020 09:59:11 +0800, Anson Huang wrote:
> Convert the anatop regulator binding to DT schema format using json-schema.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> Changes since V1:
> - remove definition of "regulator-name" which is a standrad property;
> - add "unevaluatedProperties: false".
> ---
> .../bindings/regulator/anatop-regulator.txt | 40 ---------
> .../bindings/regulator/anatop-regulator.yaml | 94 ++++++++++++++++++++++
> 2 files changed, 94 insertions(+), 40 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/regulator/anatop-regulator.txt
> create mode 100644 Documentation/devicetree/bindings/regulator/anatop-regulator.yaml
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH 2/4] dt-bindings: pinctrl: Document optional BCM7211 wake-up interrupts
From: Rob Herring @ 2020-05-29 19:33 UTC (permalink / raw)
To: Florian Fainelli
Cc: linux-kernel, Linus Walleij, Ray Jui, Scott Branden,
maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...,
Nicolas Saenz Julienne, Stefan Wahren, Geert Uytterhoeven,
Matti Vaittinen, open list:PIN CONTROL SUBSYSTEM,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
In-Reply-To: <20200528192112.26123-3-f.fainelli@gmail.com>
On Thu, May 28, 2020 at 12:21:10PM -0700, Florian Fainelli wrote:
> BCM7211 supports wake-up interrupts in the form of optional interrupt
> lines, one per bank, plus the "all banks" interrupt line.
>
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
> ---
> .../devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
> index dfc67b90591c..5682b2010e50 100644
> --- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
> @@ -16,7 +16,9 @@ Required properties:
> second cell is used to specify optional parameters:
> - bit 0 specifies polarity (0 for normal, 1 for inverted)
> - interrupts : The interrupt outputs from the controller. One interrupt per
> - individual bank followed by the "all banks" interrupt.
> + individual bank followed by the "all banks" interrupt. For BCM7211, an
> + additional set of per-bank interrupt line and an "all banks" wake-up
> + interrupt may be specified.
Is 'all banks' the name? Generally 'wakeup' is used for a wake up irq.
Rob
^ permalink raw reply
* Re: [PATCH 1/4] dt-bindings: pinctrl: Document 7211 compatible for brcm, bcm2835-gpio.txt
From: Rob Herring @ 2020-05-29 19:32 UTC (permalink / raw)
To: Florian Fainelli
Cc: Nicolas Saenz Julienne, linux-kernel,
open list:PIN CONTROL SUBSYSTEM,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE,
Stefan Wahren,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE,
Rob Herring,
maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Matti Vaittinen, Geert Uytterhoeven, Linus Walleij, Scott Branden,
Ray Jui
In-Reply-To: <20200528192112.26123-2-f.fainelli@gmail.com>
On Thu, 28 May 2020 12:21:09 -0700, Florian Fainelli wrote:
> Document the brcm,bcm7211-gpio compatible string in the
> brcm,bcm2835-gpio.txt document.
>
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
> ---
> Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v10 1/2] dt-bindings: mtd: Add Nand Flash Controller support for Intel LGM SoC
From: Rob Herring @ 2020-05-29 19:31 UTC (permalink / raw)
To: Ramuthevar,Vadivel MuruganX
Cc: linux-kernel, linux-mtd, devicetree, miquel.raynal, richard,
vigneshr, arnd, brendanhiggins, tglx, boris.brezillon,
anders.roxell, masonccyang, linux-mips, hauke.mehrtens,
andriy.shevchenko, qi-ming.wu, cheol.yong.kim
In-Reply-To: <20200528153929.46859-2-vadivel.muruganx.ramuthevar@linux.intel.com>
On Thu, May 28, 2020 at 11:39:28PM +0800, Ramuthevar,Vadivel MuruganX wrote:
> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
>
> Add YAML file for dt-bindings to support NAND Flash Controller
> on Intel's Lightning Mountain SoC.
>
> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
> ---
> .../devicetree/bindings/mtd/intel,lgm-nand.yaml | 93 ++++++++++++++++++++++
> 1 file changed, 93 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml
>
> diff --git a/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml
> new file mode 100644
> index 000000000000..afecc9920e04
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml
> @@ -0,0 +1,93 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mtd/intel,lgm-nand.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Intel LGM SoC NAND Controller Device Tree Bindings
> +
> +allOf:
> + - $ref: "nand-controller.yaml"
> +
> +maintainers:
> + - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
> +
> +properties:
> + compatible:
> + const: intel,lgm-nand-controller
Doesn't match the example.
> +
> + reg:
> + maxItems: 6
> +
> + reg-names:
> + items:
> + - const: ebunand
> + - const: hsnand
> + - const: nand_cs0
> + - const: nand_cs1
> + - const: addr_sel0
> + - const: addr_sel1
> +
> + clocks:
> + maxItems: 1
> +
> + dmas:
> + maxItems: 2
> +
> + dma-names:
> + items:
> + - const: tx
> + - const: rx
> +
> +patternProperties:
> + "^nand@[a-f0-9]+$":
> + type: object
> + properties:
> + reg:
> + minimum: 0
> + maximum: 7
> +
> + nand-ecc-mode: true
> +
> + nand-ecc-algo:
> + const: hw
> +
> + additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - clocks
> + - dmas
> + - dma-names
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + nand-controller@e0f00000 {
> + compatible = "intel,lgm-nand";
> + reg = <0xe0f00000 0x100>,
> + <0xe1000000 0x300>,
> + <0xe1400000 0x8000>,
> + <0xe1c00000 0x1000>,
> + <0x17400000 0x4>,
> + <0x17c00000 0x4>;
> + reg-names = "ebunand", "hsnand", "nand_cs0", "nand_cs1",
> + "addr_sel0", "addr_sel1";
> + clocks = <&cgu0 125>;
> + dmas = <&dma0 8>, <&dma0 9>;
> + dma-names = "tx", "rx";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + nand@0 {
> + reg = <0>;
> + nand-on-flash-bbt;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + };
> + };
> +
> +...
> --
> 2.11.0
>
^ permalink raw reply
* Re: [PATCH v7 2/5] dt-bindings: iio: magnetometer: ak8975: convert format to yaml, add maintainer
From: Rob Herring @ 2020-05-29 19:30 UTC (permalink / raw)
To: Jonathan Albrieux
Cc: linux-kernel, ~postmarketos/upstreaming, Jonathan Cameron,
Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
open list:IIO SUBSYSTEM AND DRIVERS,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
In-Reply-To: <20200528145851.11791-1-jonathan.albrieux@gmail.com>
On Thu, May 28, 2020 at 04:58:47PM +0200, Jonathan Albrieux wrote:
> Converts documentation from txt format to yaml.
>
> Signed-off-by: Jonathan Albrieux <jonathan.albrieux@gmail.com>
> ---
> .../bindings/iio/magnetometer/ak8975.txt | 37 ---------
> .../iio/magnetometer/asahi-kasei,ak8975.yaml | 77 +++++++++++++++++++
> 2 files changed, 77 insertions(+), 37 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/iio/magnetometer/ak8975.txt
> create mode 100644 Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml
>
> diff --git a/Documentation/devicetree/bindings/iio/magnetometer/ak8975.txt b/Documentation/devicetree/bindings/iio/magnetometer/ak8975.txt
> deleted file mode 100644
> index 0576b9df0bf2..000000000000
> --- a/Documentation/devicetree/bindings/iio/magnetometer/ak8975.txt
> +++ /dev/null
> @@ -1,37 +0,0 @@
> -* AsahiKASEI AK8975 magnetometer sensor
> -
> -Required properties:
> -
> - - compatible : should be "asahi-kasei,ak8975".
> - - reg : the I2C address of the magnetometer.
> -
> -Optional properties:
> -
> - - gpios : AK8975 has a "Data ready" pin (DRDY) which informs that data
> - is ready to be read and is possible to listen on it. If used,
> - this should be active high. Prefer interrupt over this.
> -
> - - interrupts : interrupt for DRDY pin. Triggered on rising edge.
> -
> - - vdd-supply: an optional regulator that needs to be on to provide VDD.
> -
> - - mount-matrix: an optional 3x3 mounting rotation matrix.
> -
> -Example:
> -
> -ak8975@c {
> - compatible = "asahi-kasei,ak8975";
> - reg = <0x0c>;
> - interrupt-parent = <&gpio6>;
> - interrupts = <15 IRQ_TYPE_EDGE_RISING>;
> - vdd-supply = <&ldo_3v3_gnss>;
> - mount-matrix = "-0.984807753012208", /* x0 */
> - "0", /* y0 */
> - "-0.173648177666930", /* z0 */
> - "0", /* x1 */
> - "-1", /* y1 */
> - "0", /* z1 */
> - "-0.173648177666930", /* x2 */
> - "0", /* y2 */
> - "0.984807753012208"; /* z2 */
> -};
> diff --git a/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml b/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml
> new file mode 100644
> index 000000000000..55b18784e503
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml
> @@ -0,0 +1,77 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/magnetometer/asahi-kasei,ak8975.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: AsahiKASEI AK8975 magnetometer sensor
> +
> +maintainers:
> + - Jonathan Albrieux <jonathan.albrieux@gmail.com>
> +
> +properties:
> + compatible:
> + oneOf:
> + - enum:
> + - asahi-kasei,ak8975
> + - asahi-kasei,ak8963
> + - asahi-kasei,ak09911
> + - asahi-kasei,ak09912
> + - enum:
> + - ak8975
> + - ak8963
> + - ak09911
> + - ak09912
> + deprecated: true
> +
> + reg:
> + maxItems: 1
> +
> + gpios:
> + maxItems: 1
> + description: |
> + AK8975 has a "Data ready" pin (DRDY) which informs that data
> + is ready to be read and is possible to listen on it. If used,
> + this should be active high. Prefer interrupt over this.
> +
> + interrupts:
> + maxItems: 1
> + description: interrupt for DRDY pin. Triggered on rising edge.
> +
> + vdd-supply:
> + maxItems: 1
Drop this. -supply is always 1.
With that,
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v3 1/2] dt-bindings: chrome: Add cros-ec-typec mux props
From: Prashant Malani @ 2020-05-29 19:28 UTC (permalink / raw)
To: Linux Kernel Mailing List, Rob Herring
Cc: Heikki Krogerus, Benson Leung,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Enric Balletbo i Serra, Guenter Roeck
In-Reply-To: <20200519214604.180036-1-pmalani@chromium.org>
Hi Rob,
Would you prefer these switches to be defined in the
usb-connector.yaml bindings file?
If there are no other concerns, I can push a fresh version of the
patch with the properties defined in usb-connector.yaml.
Thanks,
On Tue, May 19, 2020 at 2:46 PM Prashant Malani <pmalani@chromium.org> wrote:
>
> Add properties for mode, orientation and USB data role switches for
> Type C connectors. When available, these will allow the Type C connector
> class port driver to configure the various switches according to USB PD
> information (like orientation, alt mode etc.) provided by the Chrome OS
> EC controller.
>
> Signed-off-by: Prashant Malani <pmalani@chromium.org>
> Acked-by: Benson Leung <bleung@chromium.org>
> ---
>
> Changes in v3:
> - Fixed Acked-by tag typo.
>
> Changes in v2:
> - Added more text to the switch descriptions, explaining their purpose,
> and relation to the Type C connector class framework.
>
> .../bindings/chrome/google,cros-ec-typec.yaml | 40 ++++++++++++++++++-
> 1 file changed, 39 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml
> index 6d7396ab8bee..800c005a0e44 100644
> --- a/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml
> +++ b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml
> @@ -21,7 +21,34 @@ properties:
> const: google,cros-ec-typec
>
> connector:
> - $ref: /schemas/connector/usb-connector.yaml#
> + allOf:
> + - $ref: /schemas/connector/usb-connector.yaml#
> + - type: object
> + properties:
> + mode-switch:
> + description: Reference to a DT node for the USB Type C Multiplexer
> + for this connector. This switch controls the data lines routing
> + for this connector for various operation modes, including
> + Alternate Modes. This switch is assumed registered with the Type C
> + connector class framework by its driver. The Type C connector
> + class framework assumes that the mode switch property uses this
> + name.
> +
> + orientation-switch:
> + description: Reference to a DT node for the USB Type C orientation
> + switch for this connector. This switch controls routing the
> + correct data pairs depending on the cable plug orientation from
> + this connector to the USB / Alternate Mode controllers. This
> + switch is assumed registered with the Type C connector class
> + framework by its driver. The Type C connector class framework
> + assumes that the orientation switch property uses this name.
> +
> + usb-role-switch:
> + description: Reference to a DT node for the USB Data role switch
> + for this connector. This switch is assumed registered with the
> + Type C connector class framework by its driver. The Type C
> + connector class framework assumes that the USB role switch
> + property uses this name.
>
> required:
> - compatible
> @@ -49,6 +76,17 @@ examples:
> data-role = "dual";
> try-power-role = "source";
> };
> +
> + connector@1 {
> + compatible = "usb-c-connector";
> + reg = <1>;
> + power-role = "dual";
> + data-role = "host";
> + try-power-role = "source";
> + mode-switch = <&typec_mux>;
> + orientation-switch = <&typec_orientation_switch>;
> + usb-role-switch = <&typec_mux>;
> + };
> };
> };
> };
> --
> 2.26.2.761.g0e0b3e54be-goog
>
^ permalink raw reply
* Re: [PATCH net-next v2] dt-bindings: net: rename the bindings document for MediaTek STAR EMAC
From: Rob Herring @ 2020-05-29 19:27 UTC (permalink / raw)
To: Bartosz Golaszewski
Cc: Pedro Tsai, Matthias Brugger, linux-arm-kernel,
Bartosz Golaszewski, linux-kernel, linux-mediatek, Fabien Parent,
David S . Miller, netdev, Stephane Le Provost, Jakub Kicinski,
Andrew Perepech, Rob Herring, devicetree
In-Reply-To: <20200528135902.14041-1-brgl@bgdev.pl>
On Thu, 28 May 2020 15:59:02 +0200, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> The driver itself was renamed before getting merged into mainline, but
> the binding document kept the old name. This makes both names consistent.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> v1 -> v2:
> - update the id field as well
>
> .../net/{mediatek,eth-mac.yaml => mediatek,star-emac.yaml} | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
> rename Documentation/devicetree/bindings/net/{mediatek,eth-mac.yaml => mediatek,star-emac.yaml} (96%)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v2 3/4] dt-bindings: power: Add BQ28z610 compatible
From: Rob Herring @ 2020-05-29 19:26 UTC (permalink / raw)
To: Dan Murphy; +Cc: linux-kernel, sre, devicetree, afd, linux-pm, pali
In-Reply-To: <20200528122147.6171-3-dmurphy@ti.com>
On Thu, 28 May 2020 07:21:46 -0500, Dan Murphy wrote:
> Add the Texas Instruments bq28z610 battery monitor to the bq27xxx
> binding.
>
> Signed-off-by: Dan Murphy <dmurphy@ti.com>
> ---
> Documentation/devicetree/bindings/power/supply/bq27xxx.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v2 1/4] dt-bindings: power: Add BQ27561 compatible
From: Rob Herring @ 2020-05-29 19:25 UTC (permalink / raw)
To: Dan Murphy; +Cc: afd, linux-pm, sre, linux-kernel, pali, devicetree
In-Reply-To: <20200528122147.6171-1-dmurphy@ti.com>
On Thu, 28 May 2020 07:21:44 -0500, Dan Murphy wrote:
> Add the Texas Instruments bq27561 battery monitor to the bq27xxx
> binding.
>
> Signed-off-by: Dan Murphy <dmurphy@ti.com>
> ---
> Documentation/devicetree/bindings/power/supply/bq27xxx.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH net-next v4 1/4] dt-bindings: net: Add tx and rx internal delays
From: Dan Murphy @ 2020-05-29 19:24 UTC (permalink / raw)
To: Rob Herring
Cc: andrew, f.fainelli, hkallweit1, davem, netdev, linux-kernel,
devicetree
In-Reply-To: <20200529182544.GA2691697@bogus>
Rob
On 5/29/20 1:25 PM, Rob Herring wrote:
> On Wed, May 27, 2020 at 11:49:31AM -0500, Dan Murphy wrote:
>> tx-internal-delays and rx-internal-delays are a common setting for RGMII
>> capable devices.
>>
>> These properties are used when the phy-mode or phy-controller is set to
>> rgmii-id, rgmii-rxid or rgmii-txid. These modes indicate to the
>> controller that the PHY will add the internal delay for the connection.
>>
>> Signed-off-by: Dan Murphy <dmurphy@ti.com>
>> ---
>> .../bindings/net/ethernet-controller.yaml | 14 ++++++++++++++
>> 1 file changed, 14 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
>> index ac471b60ed6a..70702a4ef5e8 100644
>> --- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml
>> +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
>> @@ -143,6 +143,20 @@ properties:
>> Specifies the PHY management type. If auto is set and fixed-link
>> is not specified, it uses MDIO for management.
>>
>> + rx-internal-delay-ps:
>> + $ref: /schemas/types.yaml#definitions/uint32
>> + description: |
>> + RGMII Receive PHY Clock Delay defined in pico seconds. This is used for
>> + PHY's that have configurable RX internal delays. This property is only
>> + used when the phy-mode or phy-connection-type is rgmii-id or rgmii-rxid.
> Isn't this a property of the phy (this is the controller schema)? Looks
> like we have similar properties already and they go in phy nodes. Would
> be good to have a standard property, but let's be clear where it goes.
>
> We need to add '-ps' as a standard unit suffix (in dt-schema) and then a
> type is not needed here.
This is a PHY specific property.
I will move them.
Dumb question but you can just point me to the manual about how and
where to add the '-ps' to the dt-schema
Dan
> Rob
^ permalink raw reply
* Re: [PATCH v4 1/4] dt-bindings: dmaengine: Add MediaTek Command-Queue DMA controller bindings
From: Rob Herring @ 2020-05-29 19:24 UTC (permalink / raw)
To: EastL
Cc: Sean Wang, vkoul, mark.rutland, matthias.bgg, dmaengine,
linux-kernel, linux-arm-kernel, linux-mediatek, devicetree,
wsd_upstream
In-Reply-To: <1590659832-31476-2-git-send-email-EastL.Lee@mediatek.com>
On Thu, May 28, 2020 at 05:57:09PM +0800, EastL wrote:
> Document the devicetree bindings for MediaTek Command-Queue DMA controller
> which could be found on MT6779 SoC or other similar Mediatek SoCs.
>
> Signed-off-by: EastL <EastL.Lee@mediatek.com>
Need a full name.
> ---
> .../devicetree/bindings/dma/mtk-cqdma.yaml | 100 +++++++++++++++++++++
> 1 file changed, 100 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dma/mtk-cqdma.yaml
>
> diff --git a/Documentation/devicetree/bindings/dma/mtk-cqdma.yaml b/Documentation/devicetree/bindings/dma/mtk-cqdma.yaml
> new file mode 100644
> index 0000000..045aa0c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/mtk-cqdma.yaml
> @@ -0,0 +1,100 @@
> +# SPDX-License-Identifier: GPL-2.0
Dual license new bindings:
(GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/mtk-cqdma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek Command-Queue DMA controller Device Tree Binding
> +
> +maintainers:
> + - EastL <EastL.Lee@mediatek.com>
> +
> +description:
> + MediaTek Command-Queue DMA controller (CQDMA) on Mediatek SoC
> + is dedicated to memory-to-memory transfer through queue based
> + descriptor management.
> +
Need a $ref to dma-controller.yaml
> +properties:
> + "#dma-cells":
> + minimum: 1
> + # Should be enough
> + maximum: 255
> + description:
> + Used to provide DMA controller specific information.
> +
> + compatible:
> + const: mediatek,cqdma
Needs SoC specific compatible string(s).
> +
> + reg:
> + minItems: 1
> + maxItems: 255
You can have 255 register regions?
You need to define what each region is if more than 1.
> +
> + interrupts:
> + minItems: 1
> + maxItems: 255
255 interrupts?
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + const: cqdma
> +
> + dma-channel-mask:
> + description:
> + Bitmask of available DMA channels in ascending order that are
> + not reserved by firmware and are available to the
> + kernel. i.e. first channel corresponds to LSB.
> + The first item in the array is for channels 0-31, the second is for
> + channels 32-63, etc.
> + allOf:
> + - $ref: /schemas/types.yaml#/definitions/uint32-array
> + items:
> + minItems: 1
> + # Should be enough
> + maxItems: 255
This already has a definition in dma-common.yaml. Don't copy-n-paste
it. Just add any constraints you have. Like what is the max number of
channels?
> +
> + dma-channels:
> + $ref: /schemas/types.yaml#definitions/uint32
> + description:
> + Number of DMA channels supported by the controller.
> +
> + dma-requests:
> + $ref: /schemas/types.yaml#definitions/uint32
> + description:
> + Number of DMA request signals supported by the controller.
Same comment on these 2.
> +
> +required:
> + - "#dma-cells"
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - dma-channel-mask
> + - dma-channels
> + - dma-requests
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/clock/mt6779-clk.h>
> + cqdma: dma-controller@10212000 {
> + compatible = "mediatek,cqdma";
> + reg = <0 0x10212000 0 0x80>,
> + <0 0x10212080 0 0x80>,
> + <0 0x10212100 0 0x80>;
Examples default to 1 cell each for address and size.
> + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 140 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 141 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&infracfg_ao CLK_INFRA_CQ_DMA>;
> + clock-names = "cqdma";
> + dma-channel-mask = <63>;
> + dma-channels = <3>;
> + dma-requests = <32>;
> + #dma-cells = <1>;
> + };
> +
> +...
> --
> 1.9.1
^ permalink raw reply
* Re: [PATCH net-next v4 3/4] dt-bindings: net: Add RGMII internal delay for DP83869
From: Dan Murphy @ 2020-05-29 19:20 UTC (permalink / raw)
To: Rob Herring
Cc: andrew, f.fainelli, hkallweit1, davem, netdev, linux-kernel,
devicetree
In-Reply-To: <20200529190356.GA2758033@bogus>
Rob
On 5/29/20 2:03 PM, Rob Herring wrote:
> On Wed, May 27, 2020 at 11:49:33AM -0500, Dan Murphy wrote:
>> Add the internal delay values into the header and update the binding
>> with the internal delay properties.
>>
>> Signed-off-by: Dan Murphy <dmurphy@ti.com>
>> ---
>> .../devicetree/bindings/net/ti,dp83869.yaml | 16 ++++++++++++++++
>> 1 file changed, 16 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/net/ti,dp83869.yaml b/Documentation/devicetree/bindings/net/ti,dp83869.yaml
>> index 5b69ef03bbf7..2971dd3fc039 100644
>> --- a/Documentation/devicetree/bindings/net/ti,dp83869.yaml
>> +++ b/Documentation/devicetree/bindings/net/ti,dp83869.yaml
>> @@ -64,6 +64,20 @@ properties:
>> Operational mode for the PHY. If this is not set then the operational
>> mode is set by the straps. see dt-bindings/net/ti-dp83869.h for values
>>
>> + rx-internal-delay-ps:
>> + $ref: "#/properties/rx-internal-delay-ps"
> This just creates a circular reference which probably blows up.
dt_binding_check did not have an issue with this.
But I will remove it
Dan
^ permalink raw reply
* Re: [PATCH v4 0/2] soc: ti: add k3 platforms chipid module driver
From: santosh.shilimkar @ 2020-05-29 19:19 UTC (permalink / raw)
To: Arnd Bergmann, Grygorii Strashko
Cc: Santosh Shilimkar, Tero Kristo, Rob Herring, Lokesh Vutla, DTML,
Dave Gerlach, Sekhar Nori, Linux ARM,
linux-kernel@vger.kernel.org, Nishanth Menon
In-Reply-To: <CAK8P3a31DYOn1TyjxCYM7ebc9nL5EFKsNpSHkq55bG54Bns+MA@mail.gmail.com>
On 5/29/20 11:34 AM, Arnd Bergmann wrote:
> On Fri, May 29, 2020 at 8:22 PM Grygorii Strashko
> <grygorii.strashko@ti.com> wrote:
>> On 12/05/2020 15:34, Grygorii Strashko wrote:
>
>>> .../bindings/soc/ti/k3-socinfo.yaml | 40 +++++
>>> drivers/soc/ti/Kconfig | 10 ++
>>> drivers/soc/ti/Makefile | 1 +
>>> drivers/soc/ti/k3-socinfo.c | 152 ++++++++++++++++++
>>> 4 files changed, 203 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/soc/ti/k3-socinfo.yaml
>>> create mode 100644 drivers/soc/ti/k3-socinfo.c
>>>
>>
>> Any chances you can pick this up?
>
> I merged a version of this driver from Santosh's pull request into the
> arm/drviers tree yesterday.
>
> Is there something missing?
>
Nope. I was going to reply on the thread but missed it.
Regards,
Santosh
^ permalink raw reply
* Re: [PATCH v6 03/11] dt-bindings: i2c: dw: Add Baikal-T1 SoC I2C controller
From: Rob Herring @ 2020-05-29 19:18 UTC (permalink / raw)
To: Serge Semin
Cc: Rob Herring, Serge Semin, Andy Shevchenko, Thomas Bogendoerfer,
linux-mips, linux-i2c, Jarkko Nikula, linux-kernel, devicetree,
Wolfram Sang, Alexey Malahov, Mika Westerberg
In-Reply-To: <20200528093322.23553-4-Sergey.Semin@baikalelectronics.ru>
On Thu, 28 May 2020 12:33:13 +0300, Serge Semin wrote:
> Add the "baikal,bt1-sys-i2c" compatible string to the DW I2C binding. Even
> though the corresponding node is supposed to be a child of the Baikal-T1
> System Controller, its reg property is left required for compatibility.
>
> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
> Cc: linux-mips@vger.kernel.org
>
> ---
>
> Changelog v2:
> - Make the reg property being optional if it's Baikal-T1 System I2C DT
> node.
>
> Changelog v3:
> - Get back the reg property being mandatory even if it's Baikal-T1 System
> I2C DT node. Rob says it has to be in the DT node if there is a
> dedicated registers range in the System Controller registers space.
> ---
> Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v6 02/11] dt-bindings: i2c: Convert DW I2C slave to the DW I2C master example
From: Rob Herring @ 2020-05-29 19:17 UTC (permalink / raw)
To: Serge Semin
Cc: Serge Semin, linux-i2c, Rob Herring, Mika Westerberg,
Alexey Malahov, devicetree, Jarkko Nikula, Thomas Bogendoerfer,
Wolfram Sang, linux-kernel, linux-mips, Andy Shevchenko
In-Reply-To: <20200528093322.23553-3-Sergey.Semin@baikalelectronics.ru>
On Thu, 28 May 2020 12:33:12 +0300, Serge Semin wrote:
> dtc currently doesn't support I2C_OWN_SLAVE_ADDRESS flag set in the
> i2c "reg" property. If dtc finds an i2c-slave sub-node having an address
> higher than ten-bits wide it'll print an ugly warning:
>
> Warning (i2c_bus_reg): /example-2/i2c@1120000/eeprom@64: I2C bus unit address format error, expected "40000064"
> Warning (i2c_bus_reg): /example-2/i2c@1120000/eeprom@64:reg: I2C address must be less than 10-bits, got "0x40000064"
>
> In order to silence dtc up let's replace the corresponding DT binding
> example with a normal DW I2C master mode-based one. It's done by clearing
> the I2C_OWN_SLAVE_ADDRESS bit in the reg property and converting the
> sub-node to be compatible with normal EEPROM like "atmel,24c02".
>
> Just revert this commit when dtc is fixed.
>
> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
> Cc: linux-mips@vger.kernel.org
>
> ---
>
> Rob, even though you asked for such modification, it might be a better to
> just ignore the warning until dtc is properly fixed. Andy and me agree
> with that. If you are also on the same side with us, just explicitly nack
> this patch so Jarkko or Wolfram would ignore it when merging in the series.
>
> Changelog v3:
> - This is a new patch created as a result of the Rob request to remove
> the EEPROM-slave bit setting in the DT binndings example until the dtc
> is fixed.
>
> Changelog v6:
> - Replace the "linux,slave-24c02" compatible string with "atmel,24c02" one
> so the example would be perceived as a normal DW I2C master mode.
> ---
> .../devicetree/bindings/i2c/snps,designware-i2c.yaml | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH v2 1/4] dt-bindings: pinctrl: Document 7211 compatible for brcm,bcm2835-gpio.txt
From: Florian Fainelli @ 2020-05-29 19:15 UTC (permalink / raw)
To: linux-kernel
Cc: Florian Fainelli, Linus Walleij, Rob Herring, Ray Jui,
Scott Branden,
maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...,
Nicolas Saenz Julienne, Stefan Wahren, Geert Uytterhoeven,
Matti Vaittinen, open list:PIN CONTROL SUBSYSTEM,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
In-Reply-To: <20200529191522.27938-1-f.fainelli@gmail.com>
Document the brcm,bcm7211-gpio compatible string in the
brcm,bcm2835-gpio.txt document.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
index 3cab7336a326..dfc67b90591c 100644
--- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
@@ -9,6 +9,7 @@ Required properties:
"brcm,bcm2835-gpio" - BCM2835 compatible pinctrl
"brcm,bcm7211-gpio" - BCM7211 compatible pinctrl
"brcm,bcm2711-gpio" - BCM2711 compatible pinctrl
+ "brcm,bcm7211-gpio" - BCM7211 compatible pinctrl
- reg: Should contain the physical address of the GPIO module's registers.
- gpio-controller: Marks the device node as a GPIO controller.
- #gpio-cells : Should be two. The first cell is the pin number and the
--
2.17.1
^ permalink raw reply related
* [PATCH v2 2/4] dt-bindings: pinctrl: Document optional BCM7211 wake-up interrupts
From: Florian Fainelli @ 2020-05-29 19:15 UTC (permalink / raw)
To: linux-kernel
Cc: Florian Fainelli, Linus Walleij, Rob Herring, Ray Jui,
Scott Branden,
maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...,
Nicolas Saenz Julienne, Stefan Wahren, Geert Uytterhoeven,
Matti Vaittinen, open list:PIN CONTROL SUBSYSTEM,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
In-Reply-To: <20200529191522.27938-1-f.fainelli@gmail.com>
BCM7211 supports wake-up interrupts in the form of optional interrupt
lines, one per bank, plus the "all banks" interrupt line.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
index dfc67b90591c..5682b2010e50 100644
--- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
@@ -16,7 +16,9 @@ Required properties:
second cell is used to specify optional parameters:
- bit 0 specifies polarity (0 for normal, 1 for inverted)
- interrupts : The interrupt outputs from the controller. One interrupt per
- individual bank followed by the "all banks" interrupt.
+ individual bank followed by the "all banks" interrupt. For BCM7211, an
+ additional set of per-bank interrupt line and an "all banks" wake-up
+ interrupt may be specified.
- interrupt-controller: Marks the device node as an interrupt controller.
- #interrupt-cells : Should be 2.
The first cell is the GPIO number.
--
2.17.1
^ permalink raw reply related
* [PATCH v2 4/4] pinctrl: bcm2835: Add support for wake-up interrupts
From: Florian Fainelli @ 2020-05-29 19:15 UTC (permalink / raw)
To: linux-kernel
Cc: Florian Fainelli, Linus Walleij, Rob Herring, Ray Jui,
Scott Branden,
maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...,
Nicolas Saenz Julienne, Stefan Wahren, Geert Uytterhoeven,
Matti Vaittinen, open list:PIN CONTROL SUBSYSTEM,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
In-Reply-To: <20200529191522.27938-1-f.fainelli@gmail.com>
Leverage the IRQCHIP_MASK_ON_SUSPEND flag in order to avoid having to
specifically treat the GPIO interrupts during suspend and resume, and
simply implement an irq_set_wake() callback that is responsible for
enabling the parent wake-up interrupt as a wake-up interrupt.
To avoid allocating unnecessary resources for other chips, the wake-up
interrupts are only initialized if we have a brcm,bcm7211-gpio
compatibility string.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/pinctrl/bcm/pinctrl-bcm2835.c | 76 ++++++++++++++++++++++++++-
1 file changed, 75 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
index 1b00d93aa66e..1fbf067a3eed 100644
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
@@ -19,6 +19,7 @@
#include <linux/irq.h>
#include <linux/irqdesc.h>
#include <linux/init.h>
+#include <linux/interrupt.h>
#include <linux/of_address.h>
#include <linux/of.h>
#include <linux/of_irq.h>
@@ -76,6 +77,7 @@
struct bcm2835_pinctrl {
struct device *dev;
void __iomem *base;
+ int *wake_irq;
/* note: locking assumes each bank will have its own unsigned long */
unsigned long enabled_irq_map[BCM2835_NUM_BANKS];
@@ -435,6 +437,11 @@ static void bcm2835_gpio_irq_handler(struct irq_desc *desc)
chained_irq_exit(host_chip, desc);
}
+static irqreturn_t bcm2835_gpio_wake_irq_handler(int irq, void *dev_id)
+{
+ return IRQ_HANDLED;
+}
+
static inline void __bcm2835_gpio_irq_config(struct bcm2835_pinctrl *pc,
unsigned reg, unsigned offset, bool enable)
{
@@ -634,6 +641,34 @@ static void bcm2835_gpio_irq_ack(struct irq_data *data)
bcm2835_gpio_set_bit(pc, GPEDS0, gpio);
}
+static int bcm2835_gpio_irq_set_wake(struct irq_data *data, unsigned int on)
+{
+ struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
+ struct bcm2835_pinctrl *pc = gpiochip_get_data(chip);
+ unsigned gpio = irqd_to_hwirq(data);
+ unsigned int irqgroup;
+ int ret = -EINVAL;
+
+ if (!pc->wake_irq)
+ return ret;
+
+ if (gpio <= 27)
+ irqgroup = 0;
+ else if (gpio >= 28 && gpio <= 45)
+ irqgroup = 1;
+ else if (gpio >= 46 && gpio <= 53)
+ irqgroup = 2;
+ else
+ return ret;
+
+ if (on)
+ ret = enable_irq_wake(pc->wake_irq[irqgroup]);
+ else
+ ret = disable_irq_wake(pc->wake_irq[irqgroup]);
+
+ return ret;
+}
+
static struct irq_chip bcm2835_gpio_irq_chip = {
.name = MODULE_NAME,
.irq_enable = bcm2835_gpio_irq_enable,
@@ -642,6 +677,8 @@ static struct irq_chip bcm2835_gpio_irq_chip = {
.irq_ack = bcm2835_gpio_irq_ack,
.irq_mask = bcm2835_gpio_irq_disable,
.irq_unmask = bcm2835_gpio_irq_enable,
+ .irq_set_wake = bcm2835_gpio_irq_set_wake,
+ .flags = IRQCHIP_MASK_ON_SUSPEND,
};
static int bcm2835_pctl_get_groups_count(struct pinctrl_dev *pctldev)
@@ -1154,6 +1191,7 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev)
struct resource iomem;
int err, i;
const struct of_device_id *match;
+ int is_7211 = 0;
BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_pins) != BCM2711_NUM_GPIOS);
BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_groups) != BCM2711_NUM_GPIOS);
@@ -1180,6 +1218,7 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev)
return -EINVAL;
pdata = match->data;
+ is_7211 = of_device_is_compatible(np, "brcm,bcm7211-gpio");
pc->gpio_chip = *pdata->gpio_chip;
pc->gpio_chip.parent = dev;
@@ -1214,6 +1253,15 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev)
GFP_KERNEL);
if (!girq->parents)
return -ENOMEM;
+
+ if (is_7211) {
+ pc->wake_irq = devm_kcalloc(dev, BCM2835_NUM_IRQS,
+ sizeof(*pc->wake_irq),
+ GFP_KERNEL);
+ if (!pc->wake_irq)
+ return -ENOMEM;
+ }
+
/*
* Use the same handler for all groups: this is necessary
* since we use one gpiochip to cover all lines - the
@@ -1221,8 +1269,34 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev)
* bank that was firing the IRQ and look up the per-group
* and bank data.
*/
- for (i = 0; i < BCM2835_NUM_IRQS; i++)
+ for (i = 0; i < BCM2835_NUM_IRQS; i++) {
+ int len;
+ char *name;
+
girq->parents[i] = irq_of_parse_and_map(np, i);
+ if (!is_7211)
+ continue;
+
+ /* Skip over the all banks interrupts */
+ pc->wake_irq[i] = irq_of_parse_and_map(np, i +
+ BCM2835_NUM_IRQS + 1);
+
+ len = strlen(dev_name(pc->dev)) + 16;
+ name = devm_kzalloc(pc->dev, len, GFP_KERNEL);
+ if (!name)
+ return -ENOMEM;
+
+ snprintf(name, len, "%s:bank%d", dev_name(pc->dev), i);
+
+ /* These are optional interrupts */
+ err = devm_request_irq(dev, pc->wake_irq[i],
+ bcm2835_gpio_wake_irq_handler,
+ IRQF_SHARED, name, pc);
+ if (err)
+ dev_warn(dev, "unable to request wake IRQ %d\n",
+ pc->wake_irq[i]);
+ }
+
girq->default_type = IRQ_TYPE_NONE;
girq->handler = handle_level_irq;
--
2.17.1
^ permalink raw reply related
* [PATCH v2 3/4] pinctrl: bcm2835: Match BCM7211 compatible string
From: Florian Fainelli @ 2020-05-29 19:15 UTC (permalink / raw)
To: linux-kernel
Cc: Florian Fainelli, Linus Walleij, Rob Herring, Ray Jui,
Scott Branden,
maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...,
Nicolas Saenz Julienne, Stefan Wahren, Geert Uytterhoeven,
Matti Vaittinen, open list:PIN CONTROL SUBSYSTEM,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
In-Reply-To: <20200529191522.27938-1-f.fainelli@gmail.com>
The BCM7211 SoC uses the same pinconf_ops as the ones defined for the
BCM2711 SoC, match the compatible string and use the correct set of
options.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/pinctrl/bcm/pinctrl-bcm2835.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
index 06bd2b70af3c..1b00d93aa66e 100644
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
@@ -1137,6 +1137,10 @@ static const struct of_device_id bcm2835_pinctrl_match[] = {
.compatible = "brcm,bcm2711-gpio",
.data = &bcm2711_plat_data,
},
+ {
+ .compatible = "brcm,bcm7211-gpio",
+ .data = &bcm2711_plat_data,
+ },
{}
};
--
2.17.1
^ permalink raw reply related
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