* [RFC 0/4] regulator: lp87565: ignore ENx pins and add LP87524-Q1
From: Luca Ceresoli @ 2020-06-03 20:03 UTC (permalink / raw)
To: Liam Girdwood, Mark Brown
Cc: Luca Ceresoli, devicetree, linux-kernel, Lee Jones, Rob Herring,
Keerthy, Axel Lin
Hi,
the first patch in this series is a small but significant variation in how
the lp87565 driver enables the output rails, allow the kernel to always
know when it is enabling an output. However it can change existing
behaviour (depending on the hardware setup) and thus it should be carefully
evaluated.
The following patches are a fairly straightforward addition of a new chip
variant along with some DT bindings cleanup.
Luca
Luca Ceresoli (4):
regulator: lp87565: enable voltage regardless of ENx pin
regulator: lp87565: dt: remove duplicated section
regulator: lp87565: dt: add LP87524-Q1 variant
regulator: lp87565: add LP87524-Q1 variant
.../devicetree/bindings/mfd/lp87565.txt | 66 ++++++++++++++-----
drivers/mfd/lp87565.c | 4 ++
drivers/regulator/lp87565-regulator.c | 21 +++++-
include/linux/mfd/lp87565.h | 1 +
4 files changed, 73 insertions(+), 19 deletions(-)
--
2.27.0
^ permalink raw reply
* [RFC 3/4] regulator: lp87565: dt: add LP87524-Q1 variant
From: Luca Ceresoli @ 2020-06-03 20:03 UTC (permalink / raw)
To: Liam Girdwood, Mark Brown
Cc: Luca Ceresoli, devicetree, linux-kernel, Lee Jones, Rob Herring,
Keerthy, Axel Lin
In-Reply-To: <20200603200319.16184-1-luca@lucaceresoli.net>
Add the LP87524-Q1 to the lp87565 bindings document along with an example.
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
---
.../devicetree/bindings/mfd/lp87565.txt | 47 ++++++++++++++++++-
1 file changed, 46 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mfd/lp87565.txt b/Documentation/devicetree/bindings/mfd/lp87565.txt
index b75ae23a1ef3..839eac6b75c2 100644
--- a/Documentation/devicetree/bindings/mfd/lp87565.txt
+++ b/Documentation/devicetree/bindings/mfd/lp87565.txt
@@ -1,7 +1,8 @@
TI LP87565 PMIC MFD driver
Required properties:
- - compatible: one of "ti,lp87565", "ti,lp87565-q1", "ti,lp87561-q1"
+ - compatible: one of "ti,lp87565", "ti,lp87565-q1", "ti,lp87561-q1",
+ "ti,lp87524-q1"
- reg: I2C slave address.
- gpio-controller: Marks the device node as a GPIO Controller.
- #gpio-cells: Should be two. The first cell is the pin number and
@@ -64,3 +65,47 @@ lp87561_pmic: pmic@62 {
};
};
};
+
+Example for the TI LP87524-Q1 PMIC (four 1-phase output configuration):
+
+lp87524_pmic: pmic@60 {
+ compatible = "ti,lp87524-q1";
+ reg = <0x60>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ buck0-in-supply = <&vdd_5v0>;
+ buck1-in-supply = <&vdd_5v0>;
+ buck2-in-supply = <&vdd_5v0>;
+ buck3-in-supply = <&vdd_5v0>;
+
+ regulators {
+ buck0_reg: buck0 {
+ regulator-name = "buck0";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ buck1_reg: buck1 {
+ regulator-name = "buck1";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ };
+
+ buck2_reg: buck2 {
+ regulator-name = "buck2";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <950000>;
+ regulator-always-on;
+ };
+
+ buck3_reg: buck3 {
+ regulator-name = "buck3";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+ };
+};
--
2.27.0
^ permalink raw reply related
* [RFC 1/4] regulator: lp87565: enable voltage regardless of ENx pin
From: Luca Ceresoli @ 2020-06-03 20:03 UTC (permalink / raw)
To: Liam Girdwood, Mark Brown
Cc: Luca Ceresoli, devicetree, linux-kernel, Lee Jones, Rob Herring,
Keerthy, Axel Lin
In-Reply-To: <20200603200319.16184-1-luca@lucaceresoli.net>
This driver enables outputs by setting bit EN_BUCKn in the BUCKn_CTRL1
register. However, if bit EN_PIN_CTRLn in the same register is set, the
output is actually enabled only if EN_BUCKn is set AND an enable pin is
active. Since the driver does not touch EN_PIN_CTRLn, the choice is left to
the hardware, which in turn gets this bit from OTP memory, and in absence
of OTP data it uses a default value that is documented in the datasheet for
LP8752x, but not for LP8756x.
Thus the driver doesn't really "know" whether it is actually enabling the
output or not.
In order to make sure activation is always driver-controlled, just clear
the EN_PIN_CTRLn bit. Now all activation solely depend on the EN_BUCKn bit.
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
---
This is an RFC because there is a potential regression on existing
hardware. If there are boards where the enable pins _are_ used to toggle
power on/off in addition to I2C control, then this patch would make these
board ignore the enable pin as if it were always active.
Whether setups with ENx pins are used or not is hard to say. A Linux system
that needs to set a register _and_ to move a GPIO in order to enable a
regulatore output seems to me a bit weird, but there might be sound use
cases that I ignore.
I suspect the only solution that allows to configure the EN_PIN_CTRLn bits
correctly in all the possible hardware setups would be to tell in device
tree / board info whether each enable pin is connected or not (which is a
hardware _fact_) and which ENx pin should control which regulator output
(which is a policy). But it would make this simple driver considerably more
complex.
Any suggestion about the correct way to handle this situation would be
greatly appreciated.
---
drivers/regulator/lp87565-regulator.c | 21 +++++++++++++++++++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/regulator/lp87565-regulator.c b/drivers/regulator/lp87565-regulator.c
index 5d525dacf959..fbed6bc80c1a 100644
--- a/drivers/regulator/lp87565-regulator.c
+++ b/drivers/regulator/lp87565-regulator.c
@@ -11,8 +11,8 @@
#include <linux/mfd/lp87565.h>
-#define LP87565_REGULATOR(_name, _id, _of, _ops, _n, _vr, _vm, _er, _em, \
- _delay, _lr, _cr) \
+#define LP87565_REGULATOR(_name, _id, _of, _ops, _n, _vr, _vm, \
+ _er, _em, _ev, _delay, _lr, _cr) \
[_id] = { \
.desc = { \
.name = _name, \
@@ -28,6 +28,7 @@
.vsel_mask = _vm, \
.enable_reg = _er, \
.enable_mask = _em, \
+ .enable_val = _ev, \
.ramp_delay = _delay, \
.linear_ranges = _lr, \
.n_linear_ranges = ARRAY_SIZE(_lr), \
@@ -121,38 +122,54 @@ static const struct lp87565_regulator regulators[] = {
LP87565_REGULATOR("BUCK0", LP87565_BUCK_0, "buck0", lp87565_buck_ops,
256, LP87565_REG_BUCK0_VOUT, LP87565_BUCK_VSET,
LP87565_REG_BUCK0_CTRL_1,
+ LP87565_BUCK_CTRL_1_EN |
+ LP87565_BUCK_CTRL_1_EN_PIN_CTRL,
LP87565_BUCK_CTRL_1_EN, 3230,
buck0_1_2_3_ranges, LP87565_REG_BUCK0_CTRL_2),
LP87565_REGULATOR("BUCK1", LP87565_BUCK_1, "buck1", lp87565_buck_ops,
256, LP87565_REG_BUCK1_VOUT, LP87565_BUCK_VSET,
LP87565_REG_BUCK1_CTRL_1,
+ LP87565_BUCK_CTRL_1_EN |
+ LP87565_BUCK_CTRL_1_EN_PIN_CTRL,
LP87565_BUCK_CTRL_1_EN, 3230,
buck0_1_2_3_ranges, LP87565_REG_BUCK1_CTRL_2),
LP87565_REGULATOR("BUCK2", LP87565_BUCK_2, "buck2", lp87565_buck_ops,
256, LP87565_REG_BUCK2_VOUT, LP87565_BUCK_VSET,
LP87565_REG_BUCK2_CTRL_1,
+ LP87565_BUCK_CTRL_1_EN |
+ LP87565_BUCK_CTRL_1_EN_PIN_CTRL,
LP87565_BUCK_CTRL_1_EN, 3230,
buck0_1_2_3_ranges, LP87565_REG_BUCK2_CTRL_2),
LP87565_REGULATOR("BUCK3", LP87565_BUCK_3, "buck3", lp87565_buck_ops,
256, LP87565_REG_BUCK3_VOUT, LP87565_BUCK_VSET,
LP87565_REG_BUCK3_CTRL_1,
+ LP87565_BUCK_CTRL_1_EN |
+ LP87565_BUCK_CTRL_1_EN_PIN_CTRL,
LP87565_BUCK_CTRL_1_EN, 3230,
buck0_1_2_3_ranges, LP87565_REG_BUCK3_CTRL_2),
LP87565_REGULATOR("BUCK10", LP87565_BUCK_10, "buck10", lp87565_buck_ops,
256, LP87565_REG_BUCK0_VOUT, LP87565_BUCK_VSET,
LP87565_REG_BUCK0_CTRL_1,
LP87565_BUCK_CTRL_1_EN |
+ LP87565_BUCK_CTRL_1_EN_PIN_CTRL |
+ LP87565_BUCK_CTRL_1_FPWM_MP_0_2,
+ LP87565_BUCK_CTRL_1_EN |
LP87565_BUCK_CTRL_1_FPWM_MP_0_2, 3230,
buck0_1_2_3_ranges, LP87565_REG_BUCK0_CTRL_2),
LP87565_REGULATOR("BUCK23", LP87565_BUCK_23, "buck23", lp87565_buck_ops,
256, LP87565_REG_BUCK2_VOUT, LP87565_BUCK_VSET,
LP87565_REG_BUCK2_CTRL_1,
+ LP87565_BUCK_CTRL_1_EN |
+ LP87565_BUCK_CTRL_1_EN_PIN_CTRL,
LP87565_BUCK_CTRL_1_EN, 3230,
buck0_1_2_3_ranges, LP87565_REG_BUCK2_CTRL_2),
LP87565_REGULATOR("BUCK3210", LP87565_BUCK_3210, "buck3210",
lp87565_buck_ops, 256, LP87565_REG_BUCK0_VOUT,
LP87565_BUCK_VSET, LP87565_REG_BUCK0_CTRL_1,
LP87565_BUCK_CTRL_1_EN |
+ LP87565_BUCK_CTRL_1_EN_PIN_CTRL |
+ LP87565_BUCK_CTRL_1_FPWM_MP_0_2,
+ LP87565_BUCK_CTRL_1_EN |
LP87565_BUCK_CTRL_1_FPWM_MP_0_2, 3230,
buck0_1_2_3_ranges, LP87565_REG_BUCK0_CTRL_2),
};
--
2.27.0
^ permalink raw reply related
* [RFC 2/4] regulator: lp87565: dt: remove duplicated section
From: Luca Ceresoli @ 2020-06-03 20:03 UTC (permalink / raw)
To: Liam Girdwood, Mark Brown
Cc: Luca Ceresoli, devicetree, linux-kernel, Lee Jones, Rob Herring,
Keerthy, Axel Lin
In-Reply-To: <20200603200319.16184-1-luca@lucaceresoli.net>
The "Required properties:" section is copied verbatim for each of the two
supported chips. In preparation to add a new chip variant make it a common
section and keep the two examples to differentiate between the two chips.
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
---
.../devicetree/bindings/mfd/lp87565.txt | 21 ++++---------------
1 file changed, 4 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/mfd/lp87565.txt b/Documentation/devicetree/bindings/mfd/lp87565.txt
index 41671e0dc26b..b75ae23a1ef3 100644
--- a/Documentation/devicetree/bindings/mfd/lp87565.txt
+++ b/Documentation/devicetree/bindings/mfd/lp87565.txt
@@ -1,7 +1,7 @@
TI LP87565 PMIC MFD driver
Required properties:
- - compatible: "ti,lp87565", "ti,lp87565-q1"
+ - compatible: one of "ti,lp87565", "ti,lp87565-q1", "ti,lp87561-q1"
- reg: I2C slave address.
- gpio-controller: Marks the device node as a GPIO Controller.
- #gpio-cells: Should be two. The first cell is the pin number and
@@ -10,7 +10,8 @@ Required properties:
- xxx-in-supply: Phandle to parent supply node of each regulator
populated under regulators node. xxx should match
the supply_name populated in driver.
-Example:
+
+Example for the TI LP87565-Q1 PMIC (dual 2-phase output configuration):
lp87565_pmic: pmic@60 {
compatible = "ti,lp87565-q1";
@@ -42,21 +43,7 @@ lp87565_pmic: pmic@60 {
};
};
-TI LP87561 PMIC:
-
-This is a single output 4-phase regulator configuration
-
-Required properties:
- - compatible: "ti,lp87561-q1"
- - reg: I2C slave address.
- - gpio-controller: Marks the device node as a GPIO Controller.
- - #gpio-cells: Should be two. The first cell is the pin number and
- the second cell is used to specify flags.
- See ../gpio/gpio.txt for more information.
- - xxx-in-supply: Phandle to parent supply node of each regulator
- populated under regulators node. xxx should match
- the supply_name populated in driver.
-Example:
+Example for the TI LP87561 PMIC (single 4-phase output configuration):
lp87561_pmic: pmic@62 {
compatible = "ti,lp87561-q1";
--
2.27.0
^ permalink raw reply related
* Re: [PATCH 2/2] drm/panel: simple: Add support for KOE TX26D202VM0BWA panel
From: Sam Ravnborg @ 2020-06-03 19:54 UTC (permalink / raw)
To: Emil Velikov
Cc: Liu Ying, devicetree, Thierry Reding, NXP Linux Team,
ML dri-devel
In-Reply-To: <CACvgo52fdrjp_-Q-mB1AYtNuKcQ722mvTOFsjWaXc139rjD58Q@mail.gmail.com>
Hi Emil.
> >
> > I expect to have some hours for linux work friday or saturday, but no
> > promises...
> >
> Don't worry - once the DT maintainers ack 1/2, I'll merge the series.
If it is in alphabetical order then we are good to go.
For such simple patches we do not need DT maintainer ack.
You can add my: r-b then you are fully covered.
Sam
>
> -Emil
^ permalink raw reply
* Re: [PATCH v8 0/5] support reserving crashkernel above 4G on arm64 kdump
From: Bhupesh Sharma @ 2020-06-03 19:47 UTC (permalink / raw)
To: John Donnelly
Cc: chenzhou, Simon Horman, Devicetree List, Arnd Bergmann,
Baoquan He, Linux Doc Mailing List, Catalin Marinas, guohanjun,
kexec mailing list, Linux Kernel Mailing List, Will Deacon,
Rob Herring, James Morse, nsaenzjulienne, Prabhakar Kushwaha,
Thomas Gleixner, Prabhakar Kushwaha, RuiRui Yang, Ingo Molnar,
linux-arm-kernel
In-Reply-To: <8E0D45DC-12BF-437D-A342-03E974D9C6D4@oracle.com>
Hi All,
On Wed, Jun 3, 2020 at 9:03 PM John Donnelly <john.p.donnelly@oracle.com> wrote:
>
>
>
> > On Jun 3, 2020, at 8:20 AM, chenzhou <chenzhou10@huawei.com> wrote:
> >
> > Hi,
> >
> >
> > On 2020/6/3 19:47, Prabhakar Kushwaha wrote:
> >> Hi Chen,
> >>
> >> On Tue, Jun 2, 2020 at 8:12 PM John Donnelly <john.p.donnelly@oracle.com> wrote:
> >>>
> >>>
> >>>> On Jun 2, 2020, at 12:38 AM, Prabhakar Kushwaha <prabhakar.pkin@gmail.com> wrote:
> >>>>
> >>>> On Tue, Jun 2, 2020 at 3:29 AM John Donnelly <john.p.donnelly@oracle.com> wrote:
> >>>>> Hi . See below !
> >>>>>
> >>>>>> On Jun 1, 2020, at 4:02 PM, Bhupesh Sharma <bhsharma@redhat.com> wrote:
> >>>>>>
> >>>>>> Hi John,
> >>>>>>
> >>>>>> On Tue, Jun 2, 2020 at 1:01 AM John Donnelly <John.P.donnelly@oracle.com> wrote:
> >>>>>>> Hi,
> >>>>>>>
> >>>>>>>
> >>>>>>> On 6/1/20 7:02 AM, Prabhakar Kushwaha wrote:
> >>>>>>>> Hi Chen,
> >>>>>>>>
> >>>>>>>> On Thu, May 21, 2020 at 3:05 PM Chen Zhou <chenzhou10@huawei.com> wrote:
> >>>>>>>>> This patch series enable reserving crashkernel above 4G in arm64.
> >>>>>>>>>
> >>>>>>>>> There are following issues in arm64 kdump:
> >>>>>>>>> 1. We use crashkernel=X to reserve crashkernel below 4G, which will fail
> >>>>>>>>> when there is no enough low memory.
> >>>>>>>>> 2. Currently, crashkernel=Y@X can be used to reserve crashkernel above 4G,
> >>>>>>>>> in this case, if swiotlb or DMA buffers are required, crash dump kernel
> >>>>>>>>> will boot failure because there is no low memory available for allocation.
> >>>>>>>>>
> >>>>>>>> We are getting "warn_alloc" [1] warning during boot of kdump kernel
> >>>>>>>> with bootargs as [2] of primary kernel.
> >>>>>>>> This error observed on ThunderX2 ARM64 platform.
> >>>>>>>>
> >>>>>>>> It is observed with latest upstream tag (v5.7-rc3) with this patch set
> >>>>>>>> and https://urldefense.com/v3/__https://lists.infradead.org/pipermail/kexec/2020-May/025128.html__;!!GqivPVa7Brio!LnTSARkCt0V0FozR0KmqooaH5ADtdXvs3mPdP3KRVqALmvSK2VmCkIPIhsaxbiIAAlzu$
> >>>>>>>> Also **without** this patch-set
> >>>>>>>> "https://urldefense.com/v3/__https://www.spinics.net/lists/arm-kernel/msg806882.html__;!!GqivPVa7Brio!LnTSARkCt0V0FozR0KmqooaH5ADtdXvs3mPdP3KRVqALmvSK2VmCkIPIhsaxbjC6ujMA$"
> >>>>>>>>
> >>>>>>>> This issue comes whenever crashkernel memory is reserved after 0xc000_0000.
> >>>>>>>> More details discussed earlier in
> >>>>>>>> https://urldefense.com/v3/__https://www.spinics.net/lists/arm-kernel/msg806882.html__;!!GqivPVa7Brio!LnTSARkCt0V0FozR0KmqooaH5ADtdXvs3mPdP3KRVqALmvSK2VmCkIPIhsaxbjC6ujMA$ without any
> >>>>>>>> solution
> >>>>>>>>
> >>>>>>>> This patch-set is expected to solve similar kind of issue.
> >>>>>>>> i.e. low memory is only targeted for DMA, swiotlb; So above mentioned
> >>>>>>>> observation should be considered/fixed. .
> >>>>>>>>
> >>>>>>>> --pk
> >>>>>>>>
> >>>>>>>> [1]
> >>>>>>>> [ 30.366695] DMI: Cavium Inc. Saber/Saber, BIOS
> >>>>>>>> TX2-FW-Release-3.1-build_01-2803-g74253a541a mm/dd/yyyy
> >>>>>>>> [ 30.367696] NET: Registered protocol family 16
> >>>>>>>> [ 30.369973] swapper/0: page allocation failure: order:6,
> >>>>>>>> mode:0x1(GFP_DMA), nodemask=(null),cpuset=/,mems_allowed=0
> >>>>>>>> [ 30.369980] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.7.0-rc3+ #121
> >>>>>>>> [ 30.369981] Hardware name: Cavium Inc. Saber/Saber, BIOS
> >>>>>>>> TX2-FW-Release-3.1-build_01-2803-g74253a541a mm/dd/yyyy
> >>>>>>>> [ 30.369984] Call trace:
> >>>>>>>> [ 30.369989] dump_backtrace+0x0/0x1f8
> >>>>>>>> [ 30.369991] show_stack+0x20/0x30
> >>>>>>>> [ 30.369997] dump_stack+0xc0/0x10c
> >>>>>>>> [ 30.370001] warn_alloc+0x10c/0x178
> >>>>>>>> [ 30.370004] __alloc_pages_slowpath.constprop.111+0xb10/0xb50
> >>>>>>>> [ 30.370006] __alloc_pages_nodemask+0x2b4/0x300
> >>>>>>>> [ 30.370008] alloc_page_interleave+0x24/0x98
> >>>>>>>> [ 30.370011] alloc_pages_current+0xe4/0x108
> >>>>>>>> [ 30.370017] dma_atomic_pool_init+0x44/0x1a4
> >>>>>>>> [ 30.370020] do_one_initcall+0x54/0x228
> >>>>>>>> [ 30.370027] kernel_init_freeable+0x228/0x2cc
> >>>>>>>> [ 30.370031] kernel_init+0x1c/0x110
> >>>>>>>> [ 30.370034] ret_from_fork+0x10/0x18
> >>>>>>>> [ 30.370036] Mem-Info:
> >>>>>>>> [ 30.370064] active_anon:0 inactive_anon:0 isolated_anon:0
> >>>>>>>> [ 30.370064] active_file:0 inactive_file:0 isolated_file:0
> >>>>>>>> [ 30.370064] unevictable:0 dirty:0 writeback:0 unstable:0
> >>>>>>>> [ 30.370064] slab_reclaimable:34 slab_unreclaimable:4438
> >>>>>>>> [ 30.370064] mapped:0 shmem:0 pagetables:14 bounce:0
> >>>>>>>> [ 30.370064] free:1537719 free_pcp:219 free_cma:0
> >>>>>>>> [ 30.370070] Node 0 active_anon:0kB inactive_anon:0kB
> >>>>>>>> active_file:0kB inactive_file:0kB unevictable:0kB isolated(anon):0kB
> >>>>>>>> isolated(file):0kB mapped:0kB dirty:0kB writeback:0kB shmem:0kB
> >>>>>>>> shmem_thp: 0kB shmem_pmdmapped: 0kB anon_thp: 0kB writeback_tmp:0kB
> >>>>>>>> unstable:0kB all_unreclaimable? no
> >>>>>>>> [ 30.370073] Node 1 active_anon:0kB inactive_anon:0kB
> >>>>>>>> active_file:0kB inactive_file:0kB unevictable:0kB isolated(anon):0kB
> >>>>>>>> isolated(file):0kB mapped:0kB dirty:0kB writeback:0kB shmem:0kB
> >>>>>>>> shmem_thp: 0kB shmem_pmdmapped: 0kB anon_thp: 0kB writeback_tmp:0kB
> >>>>>>>> unstable:0kB all_unreclaimable? no
> >>>>>>>> [ 30.370079] Node 0 DMA free:0kB min:0kB low:0kB high:0kB
> >>>>>>>> reserved_highatomic:0KB active_anon:0kB inactive_anon:0kB
> >>>>>>>> active_file:0kB inactive_file:0kB unevictable:0kB writepending:0kB
> >>>>>>>> present:128kB managed:0kB mlocked:0kB kernel_stack:0kB pagetables:0kB
> >>>>>>>> bounce:0kB free_pcp:0kB local_pcp:0kB free_cma:0kB
> >>>>>>>> [ 30.370084] lowmem_reserve[]: 0 250 6063 6063
> >>>>>>>> [ 30.370090] Node 0 DMA32 free:256000kB min:408kB low:664kB
> >>>>>>>> high:920kB reserved_highatomic:0KB active_anon:0kB inactive_anon:0kB
> >>>>>>>> active_file:0kB inactive_file:0kB unevictable:0kB writepending:0kB
> >>>>>>>> present:269700kB managed:256000kB mlocked:0kB kernel_stack:0kB
> >>>>>>>> pagetables:0kB bounce:0kB free_pcp:0kB local_pcp:0kB free_cma:0kB
> >>>>>>>> [ 30.370094] lowmem_reserve[]: 0 0 5813 5813
> >>>>>>>> [ 30.370100] Node 0 Normal free:5894876kB min:9552kB low:15504kB
> >>>>>>>> high:21456kB reserved_highatomic:0KB active_anon:0kB inactive_anon:0kB
> >>>>>>>> active_file:0kB inactive_file:0kB unevictable:0kB writepending:0kB
> >>>>>>>> present:8388608kB managed:5953112kB mlocked:0kB kernel_stack:21672kB
> >>>>>>>> pagetables:56kB bounce:0kB free_pcp:876kB local_pcp:176kB free_cma:0kB
> >>>>>>>> [ 30.370104] lowmem_reserve[]: 0 0 0 0
> >>>>>>>> [ 30.370107] Node 0 DMA: 0*4kB 0*8kB 0*16kB 0*32kB 0*64kB 0*128kB
> >>>>>>>> 0*256kB 0*512kB 0*1024kB 0*2048kB 0*4096kB = 0kB
> >>>>>>>> [ 30.370113] Node 0 DMA32: 0*4kB 0*8kB 0*16kB 0*32kB 0*64kB 0*128kB
> >>>>>>>> 0*256kB 0*512kB 0*1024kB 1*2048kB (M) 62*4096kB (M) = 256000kB
> >>>>>>>> [ 30.370119] Node 0 Normal: 2*4kB (M) 3*8kB (ME) 2*16kB (UE) 3*32kB
> >>>>>>>> (UM) 1*64kB (U) 2*128kB (M) 2*256kB (ME) 3*512kB (ME) 3*1024kB (ME)
> >>>>>>>> 3*2048kB (UME) 1436*4096kB (M) = 5893600kB
> >>>>>>>> [ 30.370129] Node 0 hugepages_total=0 hugepages_free=0
> >>>>>>>> hugepages_surp=0 hugepages_size=1048576kB
> >>>>>>>> [ 30.370130] 0 total pagecache pages
> >>>>>>>> [ 30.370132] 0 pages in swap cache
> >>>>>>>> [ 30.370134] Swap cache stats: add 0, delete 0, find 0/0
> >>>>>>>> [ 30.370135] Free swap = 0kB
> >>>>>>>> [ 30.370136] Total swap = 0kB
> >>>>>>>> [ 30.370137] 2164609 pages RAM
> >>>>>>>> [ 30.370139] 0 pages HighMem/MovableOnly
> >>>>>>>> [ 30.370140] 612331 pages reserved
> >>>>>>>> [ 30.370141] 0 pages hwpoisoned
> >>>>>>>> [ 30.370143] DMA: failed to allocate 256 KiB pool for atomic
> >>>>>>>> coherent allocation
> >>>>>>>
> >>>>>>> During my testing I saw the same error and Chen's solution corrected it .
> >>>>>> Which combination you are using on your side? I am using Prabhakar's
> >>>>>> suggested environment and can reproduce the issue
> >>>>>> with or without Chen's crashkernel support above 4G patchset.
> >>>>>>
> >>>>>> I am also using a ThunderX2 platform with latest makedumpfile code and
> >>>>>> kexec-tools (with the suggested patch
> >>>>>> <https://urldefense.com/v3/__https://lists.infradead.org/pipermail/kexec/2020-May/025128.html__;!!GqivPVa7Brio!J6lUig58-Gw6TKZnEEYzEeSU36T-1SqlB1kImU00xtX_lss5Tx-JbUmLE9TJC3foXBLg$ >).
> >>>>>>
> >>>>>> Thanks,
> >>>>>> Bhupesh
> >>>>>
> >>>>> I did this activity 5 months ago and I have moved on to other activities. My DMA failures were related to PCI devices that could not be enumerated because low-DMA space was not available when crashkernel was moved above 4G; I don’t recall the exact platform.
> >>>>>
> >>>>>
> >>>>>
> >>>>> For this failure ,
> >>>>>
> >>>>>>>> DMA: failed to allocate 256 KiB pool for atomic
> >>>>>>>> coherent allocation
> >>>>>
> >>>>> Is due to :
> >>>>>
> >>>>>
> >>>>> 3618082c
> >>>>> ("arm64 use both ZONE_DMA and ZONE_DMA32")
> >>>>>
> >>>>> With the introduction of ZONE_DMA to support the Raspberry DMA
> >>>>> region below 1G, the crashkernel is placed in the upper 4G
> >>>>> ZONE_DMA_32 region. Since the crashkernel does not have access
> >>>>> to the ZONE_DMA region, it prints out call trace during bootup.
> >>>>>
> >>>>> It is due to having this CONFIG item ON :
> >>>>>
> >>>>>
> >>>>> CONFIG_ZONE_DMA=y
> >>>>>
> >>>>> Turning off ZONE_DMA fixes a issue and Raspberry PI 4 will
> >>>>> use the device tree to specify memory below 1G.
> >>>>>
> >>>>>
> >>>> Disabling ZONE_DMA is temporary solution. We may need proper solution
> >>>
> >>> Perhaps the Raspberry platform configuration dependencies need separated from “server class” Arm equipment ? Or auto-configured on boot ? Consult an expert ;-)
> >>>
> >>>
> >>>
> >>>>> I would like to see Chen’s feature added , perhaps as EXPERIMENTAL, so we can get some configuration testing done on it. It corrects having a DMA zone in low memory while crash-kernel is above 4GB. This has been going on for a year now.
> >>>> I will also like this patch to be added in Linux as early as possible.
> >>>>
> >>>> Issue mentioned by me happens with or without this patch.
> >>>>
> >>>> This patch-set can consider fixing because it uses low memory for DMA
> >>>> & swiotlb only.
> >>>> We can consider restricting crashkernel within the required range like below
> >>>>
> >>>> diff --git a/kernel/crash_core.c b/kernel/crash_core.c
> >>>> index 7f9e5a6dc48c..bd67b90d35bd 100644
> >>>> --- a/kernel/crash_core.c
> >>>> +++ b/kernel/crash_core.c
> >>>> @@ -354,7 +354,7 @@ int __init reserve_crashkernel_low(void)
> >>>> return 0;
> >>>> }
> >>>>
> >>>> - low_base = memblock_find_in_range(0, 1ULL << 32, low_size, CRASH_ALIGN);
> >>>> + low_base = memblock_find_in_range(0,0xc0000000, low_size, CRASH_ALIGN);
> >>>> if (!low_base) {
> >>>> pr_err("Cannot reserve %ldMB crashkernel low memory,
> >>>> please try smaller size.\n",
> >>>> (unsigned long)(low_size >> 20));
> >>>>
> >>>>
> >>> I suspect 0xc0000000 would need to be a CONFIG item and not hard-coded.
> >>>
> >> if you consider this as valid change, can you please incorporate as
> >> part of your patch-set.
> >
> > After commit 1a8e1cef7 ("arm64: use both ZONE_DMA and ZONE_DMA32")，the 0-4G memory is splited
> > to DMA [mem 0x0000000000000000-0x000000003fffffff] and DMA32 [mem 0x0000000040000000-0x00000000ffffffff] on arm64.
> >
> > From the above discussion, on your platform, the low crashkernel fall in DMA32 region, but your environment needs to access DMA
> > region, so there is the call trace.
> >
> > I have a question, why do you choose 0xc0000000 here?
> >
> > Besides, this is common code, we also need to consider about x86.
> >
>
> + nsaenzjulienne@suse.de
>
> Exactly . This is why it needs to be a CONFIG option for Raspberry .., or device tree option.
>
>
> We could revert 1a8e1cef7 since it broke Arm kdump too.
Well, unfortunately the patch for commit 1a8e1cef7603 ("arm64: use
both ZONE_DMA and ZONE_DMA32") was not Cc'ed to the kexec mailing
list, thus we couldn't get many eyes on it for a thorough review from
kexec/kdump p-o-v.
Also we historically never had distinction in common arch code on the
basis of the intended end use-case: embedded, server or automotive, so
I am not sure introducing a Raspberry specific CONFIG option would be
a good idea.
So, rather than reverting the patch, we can look at addressing the
same properly this time - especially from a kdump p-o-v.
This issue has been reported by some Red Hat arm64 partners with
upstream kernel also and as we have noticed in the past as well,
hardcoding the placement of the crashkernel base address (unless the
base address is specified by a crashkernel=X@Y like bootargs) is also
not a portable suggestion.
I am working on a possible fix and will have more updates on the same
in a day-or-two.
Thanks,
Bhupesh
^ permalink raw reply
* Re: [PATCH] arm: dts: vexpress: Move mcc node back into motherboard node
From: Guenter Roeck @ 2020-06-03 19:46 UTC (permalink / raw)
To: Andre Przywara
Cc: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi,
devicetree, linux-arm-kernel
On Wed, Jun 03, 2020 at 05:22:37PM +0100, Andre Przywara wrote:
> Commit d9258898ad49 ("arm64: dts: arm: vexpress: Move fixed devices
> out of bus node") moved the "mcc" DT node into the root node, because
> it does not have any children using "reg" properties, so does violate
> some dtc checks about "simple-bus" nodes.
> However this broke the vexpress config-bus code, which walks up the
> device tree to find the first node with an "arm,vexpress,site" property.
> This gave the wrong result (matching the root node instead of the
> motherboard node), so broke the clocks and some other devices for
> VExpress boards.
>
> Move the whole node back into its original position. This re-introduces
> the dtc warning, but is conceptually the right thing to do. The dtc
> warning seems to be overzealous here, there are discussions on fixing or
> relaxing this check instead.
>
> Fixes: d9258898ad49 ("arm64: dts: arm: vexpress: Move fixed devices out of bus node")
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
> ---
> P.S. The broken commit has not reached mainline yet, but is already in
> arm-soc/arm/dt.
>
> arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 146 ++++++++++++------------
> 1 file changed, 73 insertions(+), 73 deletions(-)
>
> diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
> index e6308fb76183..a88ee5294d35 100644
> --- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
> +++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
> @@ -100,79 +100,6 @@
> };
> };
>
> - mcc {
> - compatible = "arm,vexpress,config-bus";
> - arm,vexpress,config-bridge = <&v2m_sysreg>;
> -
> - oscclk0 {
> - /* MCC static memory clock */
> - compatible = "arm,vexpress-osc";
> - arm,vexpress-sysreg,func = <1 0>;
> - freq-range = <25000000 60000000>;
> - #clock-cells = <0>;
> - clock-output-names = "v2m:oscclk0";
> - };
> -
> - v2m_oscclk1: oscclk1 {
> - /* CLCD clock */
> - compatible = "arm,vexpress-osc";
> - arm,vexpress-sysreg,func = <1 1>;
> - freq-range = <23750000 65000000>;
> - #clock-cells = <0>;
> - clock-output-names = "v2m:oscclk1";
> - };
> -
> - v2m_oscclk2: oscclk2 {
> - /* IO FPGA peripheral clock */
> - compatible = "arm,vexpress-osc";
> - arm,vexpress-sysreg,func = <1 2>;
> - freq-range = <24000000 24000000>;
> - #clock-cells = <0>;
> - clock-output-names = "v2m:oscclk2";
> - };
> -
> - volt-vio {
> - /* Logic level voltage */
> - compatible = "arm,vexpress-volt";
> - arm,vexpress-sysreg,func = <2 0>;
> - regulator-name = "VIO";
> - regulator-always-on;
> - label = "VIO";
> - };
> -
> - temp-mcc {
> - /* MCC internal operating temperature */
> - compatible = "arm,vexpress-temp";
> - arm,vexpress-sysreg,func = <4 0>;
> - label = "MCC";
> - };
> -
> - reset {
> - compatible = "arm,vexpress-reset";
> - arm,vexpress-sysreg,func = <5 0>;
> - };
> -
> - muxfpga {
> - compatible = "arm,vexpress-muxfpga";
> - arm,vexpress-sysreg,func = <7 0>;
> - };
> -
> - shutdown {
> - compatible = "arm,vexpress-shutdown";
> - arm,vexpress-sysreg,func = <8 0>;
> - };
> -
> - reboot {
> - compatible = "arm,vexpress-reboot";
> - arm,vexpress-sysreg,func = <9 0>;
> - };
> -
> - dvimode {
> - compatible = "arm,vexpress-dvimode";
> - arm,vexpress-sysreg,func = <11 0>;
> - };
> - };
> -
> bus@8000000 {
> motherboard-bus {
> model = "V2M-P1";
> @@ -435,6 +362,79 @@
> };
> };
> };
> +
> + mcc {
> + compatible = "arm,vexpress,config-bus";
> + arm,vexpress,config-bridge = <&v2m_sysreg>;
> +
> + oscclk0 {
> + /* MCC static memory clock */
> + compatible = "arm,vexpress-osc";
> + arm,vexpress-sysreg,func = <1 0>;
> + freq-range = <25000000 60000000>;
> + #clock-cells = <0>;
> + clock-output-names = "v2m:oscclk0";
> + };
> +
> + v2m_oscclk1: oscclk1 {
> + /* CLCD clock */
> + compatible = "arm,vexpress-osc";
> + arm,vexpress-sysreg,func = <1 1>;
> + freq-range = <23750000 65000000>;
> + #clock-cells = <0>;
> + clock-output-names = "v2m:oscclk1";
> + };
> +
> + v2m_oscclk2: oscclk2 {
> + /* IO FPGA peripheral clock */
> + compatible = "arm,vexpress-osc";
> + arm,vexpress-sysreg,func = <1 2>;
> + freq-range = <24000000 24000000>;
> + #clock-cells = <0>;
> + clock-output-names = "v2m:oscclk2";
> + };
> +
> + volt-vio {
> + /* Logic level voltage */
> + compatible = "arm,vexpress-volt";
> + arm,vexpress-sysreg,func = <2 0>;
> + regulator-name = "VIO";
> + regulator-always-on;
> + label = "VIO";
> + };
> +
> + temp-mcc {
> + /* MCC internal operating temperature */
> + compatible = "arm,vexpress-temp";
> + arm,vexpress-sysreg,func = <4 0>;
> + label = "MCC";
> + };
> +
> + reset {
> + compatible = "arm,vexpress-reset";
> + arm,vexpress-sysreg,func = <5 0>;
> + };
> +
> + muxfpga {
> + compatible = "arm,vexpress-muxfpga";
> + arm,vexpress-sysreg,func = <7 0>;
> + };
> +
> + shutdown {
> + compatible = "arm,vexpress-shutdown";
> + arm,vexpress-sysreg,func = <8 0>;
> + };
> +
> + reboot {
> + compatible = "arm,vexpress-reboot";
> + arm,vexpress-sysreg,func = <9 0>;
> + };
> +
> + dvimode {
> + compatible = "arm,vexpress-dvimode";
> + arm,vexpress-sysreg,func = <11 0>;
> + };
> + };
> };
> };
> };
> --
> 2.17.1
>
^ permalink raw reply
* [PATCH v3 00/13] PCI: brcmstb: enable PCIe for STB chips
From: Jim Quinlan @ 2020-06-03 19:20 UTC (permalink / raw)
To: linux-pci, Christoph Hellwig, Nicolas Saenz Julienne,
bcm-kernel-feedback-list, james.quinlan
Cc: Alan Stern, Andy Shevchenko, Arnd Bergmann, Corey Minyard,
Dan Williams, open list:STAGING SUBSYSTEM,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE,
open list:DRM DRIVERS FOR ALLWINNER A10, Florian Fainelli,
Greg Kroah-Hartman, Hans de Goede, H. Peter Anvin,
open list:IOMMU DRIVERS, Jens Axboe, Joerg Roedel, Julien Grall,
open list:ACPI FOR ARM64 (ACPI/arm64), moderated list:ARM PORT,
open list:LIBATA SUBSYSTEM (Serial and Parallel ATA drivers),
open list, open list:ALLWINNER A10 CSI DRIVER,
open list:REMOTE PROCESSOR (REMOTEPROC) SUBSYSTEM,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE,
open list:SUPERH, open list:USB SUBSYSTEM, Mark Brown,
Oliver Neukum, Rafael J. Wysocki, Rob Herring, Robin Murphy,
Saravana Kannan, Srinivas Kandagatla, Stefano Stabellini,
Suzuki K Poulose, Ulf Hansson
v3:
Commit "device core: Introduce multiple dma pfn offsets"
Commit "arm: dma-mapping: Invoke dma offset func if needed"
-- The above two commits have been squashed. More importantly,
the code has been modified so that the functionality for
multiple pfn offsets subsumes the use of dev->dma_pfn_offset.
In fact, dma_pfn_offset is removed and supplanted by
dma_pfn_offset_map, which is a pointer to an array. The
more common case of a uniform offset is now handled as
a map with a single entry, while cases requiring multiple
pfn offsets use a map with multiple entries. Code paths
that used to do this:
dev->dma_pfn_offset = mydrivers_pfn_offset;
have been changed to do this:
attach_uniform_dma_pfn_offset(dev, pfn_offset);
Commit "dt-bindings: PCI: Add bindings for more Brcmstb chips"
-- Add if/then clause for required props: resets, reset-names (RobH)
-- Change compatible list from const to enum (RobH)
-- Change list of u32-tuples to u64 (RobH)
Commit "of: Include a dev param in of_dma_get_range()"
-- modify of/unittests.c to add NULL param in of_dma_get_range() call.
Commit "device core: Add ability to handle multiple dma offsets"
-- align comment in device.h (AndyS).
-- s/cpu_beg/cpu_start/ and s/dma_beg/dma_start/ in struct
dma_pfn_offset_region (AndyS).
v2:
Commit: "device core: Add ability to handle multiple dma offsets"
o Added helper func attach_dma_pfn_offset_map() in address.c (Chistoph)
o Helpers funcs added to __phys_to_dma() & __dma_to_phys() (Christoph)
o Added warning when multiple offsets are needed and !DMA_PFN_OFFSET_MAP
o dev->dma_pfn_map => dev->dma_pfn_offset_map
o s/frm/from/ for dma_pfn_offset_frm_{phys,dma}_addr() (Christoph)
o In device.h: s/const void */const struct dma_pfn_offset_region */
o removed 'unlikely' from unlikely(dev->dma_pfn_offset_map) since
guarded by CONFIG_DMA_PFN_OFFSET_MAP (Christoph)
o Since dev->dma_pfn_offset is copied in usb/core/{usb,message}.c, now
dev->dma_pfn_offset_map is copied as well.
o Merged two of the DMA commits into one (Christoph).
Commit "arm: dma-mapping: Invoke dma offset func if needed":
o Use helper functions instead of #if CONFIG_DMA_PFN_OFFSET
Other commits' changes:
o Removed need for carrying of_id var in priv (Nicolas)
o Commit message rewordings (Bjorn)
o Commit log messages filled to 75 chars (Bjorn)
o devm_reset_control_get_shared())
=> devm_reset_control_get_optional_shared (Philipp)
o Add call to reset_control_assert() in PCIe remove routines (Philipp)
v1:
This patchset expands the usefulness of the Broadcom Settop Box PCIe
controller by building upon the PCIe driver used currently by the
Raspbery Pi. Other forms of this patchset were submitted by me years
ago and not accepted; the major sticking point was the code required
for the DMA remapping needed for the PCIe driver to work [1].
There have been many changes to the DMA and OF subsystems since that
time, making a cleaner and less intrusive patchset possible. This
patchset implements a generalization of "dev->dma_pfn_offset", except
that instead of a single scalar offset it provides for multiple
offsets via a function which depends upon the "dma-ranges" property of
the PCIe host controller. This is required for proper functionality
of the BrcmSTB PCIe controller and possibly some other devices.
[1] https://lore.kernel.org/linux-arm-kernel/1516058925-46522-5-git-send-email-jim2101024@gmail.com/
Jim Quinlan (13):
PCI: brcmstb: PCIE_BRCMSTB depends on ARCH_BRCMSTB
ata: ahci_brcm: Fix use of BCM7216 reset controller
dt-bindings: PCI: Add bindings for more Brcmstb chips
PCI: brcmstb: Add bcm7278 reigister info
PCI: brcmstb: Add suspend and resume pm_ops
PCI: brcmstb: Add bcm7278 PERST support
PCI: brcmstb: Add control of rescal reset
of: Include a dev param in of_dma_get_range()
device core: Introduce multiple dma pfn offsets
PCI: brcmstb: Set internal memory viewport sizes
PCI: brcmstb: Accommodate MSI for older chips
PCI: brcmstb: Set bus max burst size by chip type
PCI: brcmstb: Add bcm7211, bcm7216, bcm7445, bcm7278 to match list
.../bindings/pci/brcm,stb-pcie.yaml | 58 ++-
arch/arm/include/asm/dma-mapping.h | 9 +-
arch/arm/mach-keystone/keystone.c | 9 +-
arch/sh/drivers/pci/pcie-sh7786.c | 3 +-
arch/sh/kernel/dma-coherent.c | 17 +-
arch/x86/pci/sta2x11-fixup.c | 7 +-
drivers/acpi/arm64/iort.c | 5 +-
drivers/ata/ahci_brcm.c | 14 +-
drivers/gpu/drm/sun4i/sun4i_backend.c | 7 +-
drivers/iommu/io-pgtable-arm.c | 2 +-
.../platform/sunxi/sun4i-csi/sun4i_csi.c | 5 +-
.../platform/sunxi/sun6i-csi/sun6i_csi.c | 5 +-
drivers/of/address.c | 97 ++++-
drivers/of/device.c | 10 +-
drivers/of/of_private.h | 8 +-
drivers/of/unittest.c | 2 +-
drivers/pci/controller/Kconfig | 3 +-
drivers/pci/controller/pcie-brcmstb.c | 408 +++++++++++++++---
drivers/remoteproc/remoteproc_core.c | 2 +-
.../staging/media/sunxi/cedrus/cedrus_hw.c | 7 +-
drivers/usb/core/message.c | 4 +-
drivers/usb/core/usb.c | 2 +-
include/linux/device.h | 4 +-
include/linux/dma-direct.h | 16 +-
include/linux/dma-mapping.h | 45 ++
kernel/dma/coherent.c | 11 +-
26 files changed, 631 insertions(+), 129 deletions(-)
--
2.17.1
^ permalink raw reply
* [PATCH v3 03/13] dt-bindings: PCI: Add bindings for more Brcmstb chips
From: Jim Quinlan @ 2020-06-03 19:20 UTC (permalink / raw)
To: linux-pci, Christoph Hellwig, Nicolas Saenz Julienne,
bcm-kernel-feedback-list, james.quinlan
Cc: Jim Quinlan, Florian Fainelli, Bjorn Helgaas, Rob Herring,
moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list
In-Reply-To: <20200603192058.35296-1-james.quinlan@broadcom.com>
From: Jim Quinlan <jquinlan@broadcom.com>
- Add compatible strings for three more Broadcom STB chips: 7278, 7216,
7211 (STB version of RPi4).
- add new property 'brcm,scb-sizes'
- add new property 'resets'
- add new property 'reset-names' for 7216 only
- allow 'ranges' and 'dma-ranges' to have more than one item and update
the example to show this.
Signed-off-by: Jim Quinlan <jquinlan@broadcom.com>
---
.../bindings/pci/brcm,stb-pcie.yaml | 58 ++++++++++++++++---
1 file changed, 51 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
index 8680a0f86c5a..4a012d77513f 100644
--- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
@@ -9,12 +9,15 @@ title: Brcmstb PCIe Host Controller Device Tree Bindings
maintainers:
- Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
-
properties:
compatible:
- const: brcm,bcm2711-pcie # The Raspberry Pi 4
+ items:
+ - enum:
+ - brcm,bcm2711-pcie # The Raspberry Pi 4
+ - brcm,bcm7211-pcie # Broadcom STB version of RPi4
+ - brcm,bcm7278-pcie # Broadcom 7278 Arm
+ - brcm,bcm7216-pcie # Broadcom 7216 Arm
+ - brcm,bcm7445-pcie # Broadcom 7445 Arm
reg:
maxItems: 1
@@ -34,10 +37,12 @@ properties:
- const: msi
ranges:
- maxItems: 1
+ minItems: 1
+ maxItems: 4
dma-ranges:
- maxItems: 1
+ minItems: 1
+ maxItems: 6
clocks:
maxItems: 1
@@ -58,8 +63,33 @@ properties:
aspm-no-l0s: true
+ resets:
+ description: for "brcm,bcm7216-pcie", must be a valid reset
+ phandle pointing to the RESCAL reset controller provider node.
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+
+ reset-names:
+ items:
+ - const: rescal
+
+ brcm,scb-sizes:
+ description: u64 giving the 64bit PCIe memory
+ viewport size of a memory controller. There may be up to
+ three controllers, and each size must be a power of two
+ with a size greater or equal to the amount of memory the
+ controller supports. Note that each memory controller
+ may have two component regions -- base and extended -- so
+ this information cannot be deduced from the dma-ranges.
+
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint64-array
+ - items:
+ minItems: 1
+ maxItems: 3
+
required:
- reg
+ - ranges
- dma-ranges
- "#interrupt-cells"
- interrupts
@@ -68,6 +98,18 @@ required:
- interrupt-map
- msi-controller
+allOf:
+ - $ref: /schemas/pci/pci-bus.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: brcm,bcm7216-pcie
+ then:
+ required:
+ - resets
+ - reset-names
+
unevaluatedProperties: false
examples:
@@ -93,7 +135,9 @@ examples:
msi-parent = <&pcie0>;
msi-controller;
ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>;
- dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>;
+ dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>,
+ <0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>;
brcm,enable-ssc;
+ brcm,scb-sizes = <0x0000000080000000 0x0000000080000000>;
};
};
--
2.17.1
^ permalink raw reply related
* [PATCH v3 08/13] of: Include a dev param in of_dma_get_range()
From: Jim Quinlan @ 2020-06-03 19:20 UTC (permalink / raw)
To: linux-pci, Christoph Hellwig, Nicolas Saenz Julienne,
bcm-kernel-feedback-list, james.quinlan
Cc: Rob Herring, Frank Rowand,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE, open list
In-Reply-To: <20200603192058.35296-1-james.quinlan@broadcom.com>
Currently there is only one caller of of_dma_get_range(). A struct device
*dev param is needed For implementing multiple dma offsets. This function
will still work if dev == NULL.
Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
---
drivers/of/address.c | 4 +++-
drivers/of/device.c | 2 +-
drivers/of/of_private.h | 8 ++++----
drivers/of/unittest.c | 2 +-
4 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/of/address.c b/drivers/of/address.c
index 8eea3f6e29a4..96d8cfb14a60 100644
--- a/drivers/of/address.c
+++ b/drivers/of/address.c
@@ -920,6 +920,7 @@ EXPORT_SYMBOL(of_io_request_and_map);
/**
* of_dma_get_range - Get DMA range info
+ * @dev: device pointer; only needed for a corner case.
* @np: device node to get DMA range info
* @dma_addr: pointer to store initial DMA address of DMA range
* @paddr: pointer to store initial CPU address of DMA range
@@ -935,7 +936,8 @@ EXPORT_SYMBOL(of_io_request_and_map);
* It returns -ENODEV if "dma-ranges" property was not found
* for this device in DT.
*/
-int of_dma_get_range(struct device_node *np, u64 *dma_addr, u64 *paddr, u64 *size)
+int of_dma_get_range(struct device *dev, struct device_node *np, u64 *dma_addr,
+ u64 *paddr, u64 *size)
{
struct device_node *node = of_node_get(np);
const __be32 *ranges = NULL;
diff --git a/drivers/of/device.c b/drivers/of/device.c
index 27203bfd0b22..ef6a741f9f0b 100644
--- a/drivers/of/device.c
+++ b/drivers/of/device.c
@@ -95,7 +95,7 @@ int of_dma_configure(struct device *dev, struct device_node *np, bool force_dma)
const struct iommu_ops *iommu;
u64 mask, end;
- ret = of_dma_get_range(np, &dma_addr, &paddr, &size);
+ ret = of_dma_get_range(dev, np, &dma_addr, &paddr, &size);
if (ret < 0) {
/*
* For legacy reasons, we have to assume some devices need
diff --git a/drivers/of/of_private.h b/drivers/of/of_private.h
index edc682249c00..7a83d3a81ab6 100644
--- a/drivers/of/of_private.h
+++ b/drivers/of/of_private.h
@@ -158,11 +158,11 @@ extern int of_bus_n_addr_cells(struct device_node *np);
extern int of_bus_n_size_cells(struct device_node *np);
#ifdef CONFIG_OF_ADDRESS
-extern int of_dma_get_range(struct device_node *np, u64 *dma_addr,
- u64 *paddr, u64 *size);
+extern int of_dma_get_range(struct device *dev, struct device_node *np,
+ u64 *dma_addr, u64 *paddr, u64 *size);
#else
-static inline int of_dma_get_range(struct device_node *np, u64 *dma_addr,
- u64 *paddr, u64 *size)
+static inline int of_dma_get_range(struct device *dev, struct device_node *np,
+ u64 *dma_addr, u64 *paddr, u64 *size)
{
return -ENODEV;
}
diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c
index 398de04fd19c..57a22517c428 100644
--- a/drivers/of/unittest.c
+++ b/drivers/of/unittest.c
@@ -881,7 +881,7 @@ static void __init of_unittest_dma_ranges_one(const char *path,
return;
}
- rc = of_dma_get_range(np, &dma_addr, &paddr, &size);
+ rc = of_dma_get_range(NULL, np, &dma_addr, &paddr, &size);
unittest(!rc, "of_dma_get_range failed on node %pOF rc=%i\n", np, rc);
if (!rc) {
--
2.17.1
^ permalink raw reply related
* Re: [PATCHv1 00/19] Improve SBS battery support
From: Marek Szyprowski @ 2020-06-03 18:49 UTC (permalink / raw)
To: Sebastian Reichel
Cc: Rob Herring, Greg Kroah-Hartman, Rafael J . Wysocki, linux-pm,
devicetree, linux-kernel, kernel, 'Linux Samsung SOC'
In-Reply-To: <20200602180119.52izs7kd72u3kmr4@earth.universe>
Hi Sebastian,
On 02.06.2020 20:01, Sebastian Reichel wrote:
> On Tue, Jun 02, 2020 at 09:17:09AM +0200, Marek Szyprowski wrote:
>> On 01.06.2020 19:05, Sebastian Reichel wrote:
>>> On Mon, Jun 01, 2020 at 12:40:27PM +0200, Marek Szyprowski wrote:
>>>> On 13.05.2020 20:55, Sebastian Reichel wrote:
>>>>> This patchset improves support for SBS compliant batteries. Due to
>>>>> the changes, the battery now exposes 32 power supply properties and
>>>>> (un)plugging it generates a backtrace containing the following message
>>>>> without the first patch in this series:
>>>>>
>>>>> ---------------------------
>>>>> WARNING: CPU: 0 PID: 20 at lib/kobject_uevent.c:659 add_uevent_var+0xd4/0x104
>>>>> add_uevent_var: too many keys
>>>>> ---------------------------
>>>>>
>>>>> For references this is what an SBS battery status looks like after
>>>>> the patch series has been applied:
>>>>>
>>>>> cat /sys/class/power_supply/sbs-0-000b/uevent
>>>>> POWER_SUPPLY_NAME=sbs-0-000b
>>>>> POWER_SUPPLY_TYPE=Battery
>>>>> POWER_SUPPLY_STATUS=Discharging
>>>>> POWER_SUPPLY_CAPACITY_LEVEL=Normal
>>>>> POWER_SUPPLY_HEALTH=Good
>>>>> POWER_SUPPLY_PRESENT=1
>>>>> POWER_SUPPLY_TECHNOLOGY=Li-ion
>>>>> POWER_SUPPLY_CYCLE_COUNT=12
>>>>> POWER_SUPPLY_VOLTAGE_NOW=11441000
>>>>> POWER_SUPPLY_CURRENT_NOW=-26000
>>>>> POWER_SUPPLY_CURRENT_AVG=-24000
>>>>> POWER_SUPPLY_CAPACITY=76
>>>>> POWER_SUPPLY_CAPACITY_ERROR_MARGIN=1
>>>>> POWER_SUPPLY_TEMP=198
>>>>> POWER_SUPPLY_TIME_TO_EMPTY_AVG=438600
>>>>> POWER_SUPPLY_TIME_TO_FULL_AVG=3932100
>>>>> POWER_SUPPLY_SERIAL_NUMBER=0000
>>>>> POWER_SUPPLY_VOLTAGE_MIN_DESIGN=10800000
>>>>> POWER_SUPPLY_VOLTAGE_MAX_DESIGN=10800000
>>>>> POWER_SUPPLY_ENERGY_NOW=31090000
>>>>> POWER_SUPPLY_ENERGY_FULL=42450000
>>>>> POWER_SUPPLY_ENERGY_FULL_DESIGN=41040000
>>>>> POWER_SUPPLY_CHARGE_NOW=2924000
>>>>> POWER_SUPPLY_CHARGE_FULL=3898000
>>>>> POWER_SUPPLY_CHARGE_FULL_DESIGN=3800000
>>>>> POWER_SUPPLY_CONSTANT_CHARGE_CURRENT_MAX=3000000
>>>>> POWER_SUPPLY_CONSTANT_CHARGE_VOLTAGE_MAX=12300000
>>>>> POWER_SUPPLY_MANUFACTURE_YEAR=2017
>>>>> POWER_SUPPLY_MANUFACTURE_MONTH=7
>>>>> POWER_SUPPLY_MANUFACTURE_DAY=3
>>>>> POWER_SUPPLY_MANUFACTURER=UR18650A
>>>>> POWER_SUPPLY_MODEL_NAME=GEHC
>>>> This patch landed in linux-next dated 20200529. Sadly it causes a
>>>> regression on Samsung Exynos-based Chromebooks (Exynos5250 Snow,
>>>> Exynos5420 Peach-Pi and Exynos5800 Peach-Pit). System boots to
>>>> userspace, but then, when udev populates /dev, booting hangs:
>>>>
>>>> [ 4.435167] VFS: Mounted root (ext4 filesystem) readonly on device
>>>> 179:51.
>>>> [ 4.457477] devtmpfs: mounted
>>>> [ 4.460235] Freeing unused kernel memory: 1024K
>>>> [ 4.464022] Run /sbin/init as init process
>>>> INIT: version 2.88 booting
>>>> [info] Using makefile-style concurrent boot in runlevel S.
>>>> [ 5.102096] random: crng init done
>>>> [....] Starting the hotplug events dispatcher: systemd-udevdstarting
>>>> version 236
>>>> [ ok .
>>>> [....] Synthesizing the initial hotplug events...[ ok done.
>>>> [....] Waiting for /dev to be fully populated...[ 34.409914]
>>>> TPS65090_RAILSDCDC1: disabling
>>>> [ 34.412977] TPS65090_RAILSDCDC2: disabling
>>>> [ 34.417021] TPS65090_RAILSDCDC3: disabling
>>>> [ 34.423848] TPS65090_RAILSLDO1: disabling
>>>> [ 34.429068] TPS65090_RAILSLDO2: disabling
>>> :(
>>>
>>> log does not look useful either.
>>>
>>>> Bisect between v5.7-rc1 and next-20200529 pointed me to the first bad
>>>> commit: [c4b12a2f3f3de670f6be5e96092a2cab0b877f1a] power: supply:
>>>> sbs-battery: simplify read_read_string_data.
>>> ok. I tested this on an to-be-upstreamed i.MX6 based system
>>> and arch/arm/boot/dts/imx53-ppd.dts. I think the difference
>>> is, that i2c-exynos5 does not expose I2C_FUNC_SMBUS_READ_BLOCK_DATA.
>>> I hoped all systems using SBS battery support this, but now
>>> I see I2C_FUNC_SMBUS_EMUL only supports writing block data.
>>> Looks like I need to add another patch implementing that
>>> using the old code with added PEC support.
>>>
>>> In any case that should only return -ENODEV for the property
>>> (and uevent), but not break boot. So something fishy is going
>>> on.
>>>
>>>> However reverting it in linux-next doesn't fix the issue, so the
>>>> next commits are also relevant to this issue.
>>> The next patch, which adds PEC support depends on the simplification
>>> of sbs_read_string_data. The old, open coded variant will result in
>>> PEC failure for string properties (which should not stop boot either
>>> of course). Can you try reverting both?
>> Indeed, reverting both (and fixing the conflict) restores proper boot.
> Ok, I pushed out a revert of those two patches. They should land in
> tomorrows linux-next release. Please test it.
Today's linux-next (20200603) boots fine on the Samsung Exynos-based
Chromebooks. Let me know how if you need any help debugging the issues
to resurrect those patches.
>>> If that helps I will revert those two instead of dropping the whole
>>> series for this merge window.
>>>
>>>> Let me know how can I help debugging it.
>>> I suspect, that this is userspace endlessly retrying reading the
>>> battery uevent when an error is returned. Could you check this?
>>> Should be easy to see by adding some printfs.
>> I've added some debug messages in sbs_get_property() and it read the
>> same properties many times. However I've noticed that if I wait long
>> enough booting finally continues.
> So basically userspace slows down itself massively by trying to
> re-read uevent over and over when an error occurs. Does not seem
> like a sensible thing to do. I will have a look at this when I find
> some time.
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
^ permalink raw reply
* Re: [RFC] dt-bindings: mailbox: add doorbell support to ARM MHU
From: Jassi Brar @ 2020-06-03 18:42 UTC (permalink / raw)
To: Sudeep Holla
Cc: Viresh Kumar, Bjorn Andersson, Arnd Bergmann, Rob Herring,
Frank Rowand, Vincent Guittot, linux-arm-kernel, Devicetree List,
Linux Kernel Mailing List
In-Reply-To: <20200603183120.GE23722@bogus>
On Wed, Jun 3, 2020 at 1:31 PM Sudeep Holla <sudeep.holla@arm.com> wrote:
>
> > >
> > H/W is actually fine :) Its just that the driver is written to
> > _also_ support a platform (my original) that doesn't have shmem and
> > need to pass data via 32bit registers.
> > Frankly, I am not against the doorbell mode, I am against implementing
> > two modes in a driver. If it really helped (note the past tense) the
> > SCMI, we could implement the driver only in doorbell mode but
> > unfortunately SCMI would still be _broken_ for non-doorbell
> > controllers.
>
> Should be fine as the specification is designed to work with only shmem
> for any data transfer and mailbox is just a signal mechanism. I won't
> be too worried about that.
>
Please clarify how it will work on, say again, rockchip platform with shmem.
thanks.
^ permalink raw reply
* Re: [RFC] dt-bindings: mailbox: add doorbell support to ARM MHU
From: Jassi Brar @ 2020-06-03 18:32 UTC (permalink / raw)
To: Sudeep Holla
Cc: Viresh Kumar, Rob Herring, Arnd Bergmann, Frank Rowand,
Bjorn Andersson, Vincent Guittot, linux-arm-kernel,
Devicetree List, Linux Kernel Mailing List
In-Reply-To: <20200603180435.GB23722@bogus>
On Wed, Jun 3, 2020 at 1:04 PM Sudeep Holla <sudeep.holla@arm.com> wrote:
>
> On Fri, May 29, 2020 at 09:37:58AM +0530, Viresh Kumar wrote:
> > On 28-05-20, 13:20, Rob Herring wrote:
> > > Whether Linux
> > > requires serializing mailbox accesses is a separate issue. On that side,
> > > it seems silly to not allow driving the h/w in the most efficient way
> > > possible.
> >
> > That's exactly what we are trying to say. The hardware allows us to
> > write all 32 bits in parallel, without any hardware issues, why
> > shouldn't we do that ? The delay (which Sudeep will find out, he is
> > facing issues with hardware access because of lockdown right now)
>
> OK, I was able to access the setup today. I couldn't reach a point
> where I can do measurements as the system just became unusable with
> one physical channel instead of 2 virtual channels as in my patches.
>
> My test was simple. Switch to schedutil and read sensors periodically
> via sysfs.
>
> arm-scmi firmware:scmi: message for 1 is not expected!
>
This sounds like you are not serialising requests on a shared channel.
Can you please also share the patch?
Thanks.
^ permalink raw reply
* Re: [RFC] dt-bindings: mailbox: add doorbell support to ARM MHU
From: Sudeep Holla @ 2020-06-03 18:31 UTC (permalink / raw)
To: Jassi Brar
Cc: Viresh Kumar, Bjorn Andersson, Arnd Bergmann, Rob Herring,
Frank Rowand, Vincent Guittot, linux-arm-kernel, Devicetree List,
Sudeep Holla, Linux Kernel Mailing List
In-Reply-To: <CABb+yY30nmbBUzYG62xGEbrr7107h_Edyq3jKPheZAQ0Cvr9Yg@mail.gmail.com>
On Mon, May 18, 2020 at 11:05:03PM -0500, Jassi Brar wrote:
> On Mon, May 18, 2020 at 10:40 PM Viresh Kumar <viresh.kumar@linaro.org> wrote:
> >
> > On 18-05-20, 18:29, Bjorn Andersson wrote:
> > > On Thu 14 May 22:17 PDT 2020, Viresh Kumar wrote:
> > > > This stuff has been doing rounds on the mailing list since several years
> > > > now with no agreed conclusion by all the parties. And here is another
> > > > attempt to get some feedback from everyone involved to close this once
> > > > and for ever. Your comments will very much be appreciated.
> > > >
> > > > The ARM MHU is defined here in the TRM [1] for your reference, which
> > > > states following:
> > > >
> > > > "The MHU drives the signal using a 32-bit register, with all 32
> > > > bits logically ORed together. The MHU provides a set of
> > > > registers to enable software to set, clear, and check the status
> > > > of each of the bits of this register independently. The use of
> > > > 32 bits for each interrupt line enables software to provide more
> > > > information about the source of the interrupt. For example, each
> > > > bit of the register can be associated with a type of event that
> > > > can contribute to raising the interrupt."
> > > >
> > >
> > > Does this mean that there are 32 different signals and they are all ORed
> > > into the same interrupt line to trigger software action when something
> > > happens?
> > >
> > > Or does it mean that this register is used to pass multi-bit information
> > > and when any such information is passed an interrupt will be triggered?
> > > If so, what does that information mean? How is it tied into other Linux
> > > drivers/subsystems?
> >
> > I have started to believe the hardware is written badly at this point
> > :)
> >
> H/W is actually fine :) Its just that the driver is written to
> _also_ support a platform (my original) that doesn't have shmem and
> need to pass data via 32bit registers.
> Frankly, I am not against the doorbell mode, I am against implementing
> two modes in a driver. If it really helped (note the past tense) the
> SCMI, we could implement the driver only in doorbell mode but
> unfortunately SCMI would still be _broken_ for non-doorbell
> controllers.
Should be fine as the specification is designed to work with only shmem
for any data transfer and mailbox is just a signal mechanism. I won't
be too worried about that.
--
Regards,
Sudeep
^ permalink raw reply
* Re: [RFC] dt-bindings: mailbox: add doorbell support to ARM MHU
From: Sudeep Holla @ 2020-06-03 18:28 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Viresh Kumar, Jassi Brar, Arnd Bergmann, Rob Herring,
Frank Rowand, Vincent Guittot, Sudeep Holla, linux-arm-kernel,
devicetree, linux-kernel
In-Reply-To: <20200519012927.GT2165@builder.lan>
Hi Bjorn,
Thanks for the details response.
On Mon, May 18, 2020 at 06:29:27PM -0700, Bjorn Andersson wrote:
> On Thu 14 May 22:17 PDT 2020, Viresh Kumar wrote:
>
[...]
I find this part nicely summarise your response.
> > - With serialization, if we use only one channel as today at every
> > priority, if there are 5 requests to send signal to the receiver and
> > the dvfs request is the last one in queue (which may be called from
> > scheduler's hot path with fast switching), it unnecessarily needs to
> > wait for the first four transfers to finish due to the software
> > locking imposed by the mailbox framework. This adds additional delay,
> > maybe of few ms only, which isn't required by the hardware but just by
> > the software and few ms can be important in scheduler's hotpath.
> >
>
> So these 5 requests, are they conveyed by the signals [1,2,3,4,5] or
> [BIT(0), BIT(1), BIT(2), BIT(3), BIT(4)]?
>
Latter in this case. IMO it is platform choice on how to use it. It is
equally possible to send 2^31 different signals. But the receiver must
also interpret it in the *exact* same way. In this case, the receiver
which is platform firmware interprets as individual bit signals.
> In the first case you have to serialize things given that e.g. signal 1
> immediately followed by 2 is indistinguishable from 3.
>
Agree and we are not proposing to break that use case. It exists in the
driver/binding today and will continue as is.
> If you signals are single-bit notifications then you don't need any
> serialization.
>
Indeed, we are making use of that.
--
Regards,
Sudeep
^ permalink raw reply
* Re: [RFC] dt-bindings: mailbox: add doorbell support to ARM MHU
From: Sudeep Holla @ 2020-06-03 18:17 UTC (permalink / raw)
To: Viresh Kumar
Cc: Rob Herring, Jassi Brar, Arnd Bergmann, Frank Rowand,
Bjorn Andersson, Vincent Guittot, Sudeep Holla, linux-arm-kernel,
devicetree, linux-kernel
In-Reply-To: <20200603180435.GB23722@bogus>
[-- Attachment #1: Type: text/plain, Size: 4870 bytes --]
On Wed, Jun 03, 2020 at 07:04:35PM +0100, Sudeep Holla wrote:
> On Fri, May 29, 2020 at 09:37:58AM +0530, Viresh Kumar wrote:
> > On 28-05-20, 13:20, Rob Herring wrote:
> > > Whether Linux
> > > requires serializing mailbox accesses is a separate issue. On that side,
> > > it seems silly to not allow driving the h/w in the most efficient way
> > > possible.
> >
> > That's exactly what we are trying to say. The hardware allows us to
> > write all 32 bits in parallel, without any hardware issues, why
> > shouldn't we do that ? The delay (which Sudeep will find out, he is
> > facing issues with hardware access because of lockdown right now)
>
> OK, I was able to access the setup today. I couldn't reach a point
> where I can do measurements as the system just became unusable with
> one physical channel instead of 2 virtual channels as in my patches.
>
> My test was simple. Switch to schedutil and read sensors periodically
> via sysfs.
>
> arm-scmi firmware:scmi: message for 1 is not expected!
> arm-scmi firmware:scmi: timed out in resp(caller: scmi_sensor_reading_get+0xf4/0x120)
> arm-scmi firmware:scmi: timed out in resp(caller: scmi_sensor_reading_get+0xf4/0x120)
> arm-scmi firmware:scmi: message for 1 is not expected!
> arm-scmi firmware:scmi: timed out in resp(caller: scmi_sensor_reading_get+0xf4/0x120)
> arm-scmi firmware:scmi: message for 1 is not expected!
>
> With trace enabled I can see even cpufreq_set timing out. Sample trace
> output:
>
> bash-1019 [005] 1149.452340: scmi_xfer_begin: transfer_id=1537 msg_id=7 protocol_id=19 seq=0 poll=1
> bash-1019 [005] 1149.452407: scmi_xfer_end: transfer_id=1537 msg_id=7 protocol_id=19 seq=0 status=0
> bash-1526 [000] 1149.472553: scmi_xfer_begin: transfer_id=1538 msg_id=6 protocol_id=21 seq=0 poll=0
> <idle>-0 [001] 1149.472733: scmi_xfer_begin: transfer_id=1539 msg_id=7 protocol_id=19 seq=1 poll=1
> <idle>-0 [001] 1149.472842: scmi_xfer_end: transfer_id=1539 msg_id=7 protocol_id=19 seq=1 status=-110
> <idle>-0 [001] 1149.483040: scmi_xfer_begin: transfer_id=1540 msg_id=7 protocol_id=19 seq=1 poll=1
> <idle>-0 [001] 1149.483043: scmi_xfer_end: transfer_id=1540 msg_id=7 protocol_id=19 seq=1 status=0
> rs:main-543 [003] 1149.493031: scmi_xfer_begin: transfer_id=1541 msg_id=7 protocol_id=19 seq=1 poll=1
> rs:main-543 [003] 1149.493047: scmi_xfer_end: transfer_id=1541 msg_id=7 protocol_id=19 seq=1 status=0
> <idle>-0 [000] 1149.507033: scmi_xfer_begin: transfer_id=1542 msg_id=7 protocol_id=19 seq=1 poll=1
> <idle>-0 [000] 1149.507044: scmi_xfer_end: transfer_id=1542 msg_id=7 protocol_id=19 seq=1 status=0
> bash-1526 [000] 1149.516068: scmi_xfer_end: transfer_id=1538 msg_id=6 protocol_id=21 seq=0 status=-110
> bash-1526 [000] 1149.516559: scmi_xfer_begin: transfer_id=1543 msg_id=6 protocol_id=21 seq=0 poll=0
> <idle>-0 [001] 1149.516729: scmi_xfer_begin: transfer_id=1544 msg_id=7 protocol_id=19 seq=1 poll=1
> <idle>-0 [001] 1149.516837: scmi_xfer_end: transfer_id=1544 msg_id=7 protocol_id=19 seq=1 status=-110
> ksoftirqd/0-9 [000] 1149.519065: scmi_xfer_begin: transfer_id=1545 msg_id=7 protocol_id=19 seq=1 poll=1
> ksoftirqd/0-9 [000] 1149.519072: scmi_xfer_end: transfer_id=1545 msg_id=7 protocol_id=19 seq=1 status=0
> <idle>-0 [001] 1149.526878: scmi_xfer_begin: transfer_id=1546 msg_id=7 protocol_id=19 seq=1 poll=1
> <idle>-0 [001] 1149.526882: scmi_xfer_end: transfer_id=1546 msg_id=7 protocol_id=19 seq=1 status=0
> <idle>-0 [000] 1149.551119: scmi_xfer_begin: transfer_id=1547 msg_id=7 protocol_id=19 seq=1 poll=1
> <idle>-0 [000] 1149.551138: scmi_xfer_end: transfer_id=1547 msg_id=7 protocol_id=19 seq=1 status=0
> bash-1526 [000] 1149.560191: scmi_xfer_end: transfer_id=1543 msg_id=6 protocol_id=21 seq=0 status=-110
> bash-1526 [000] 1149.560690: scmi_xfer_begin: transfer_id=1548 msg_id=6 protocol_id=21 seq=0 poll=0
> <idle>-0 [001] 1149.560859: scmi_xfer_begin: transfer_id=1549 msg_id=7 protocol_id=19 seq=1 poll=1
> <idle>-0 [001] 1149.560968: scmi_xfer_end: transfer_id=1549 msg_id=7 protocol_id=19 seq=1 status=-110
>
> protocol_id=19 is cpufreq and 21 is sensor. This is simplest test and
> I can easily generate more timeouts starting some stress test with DVFS.
>
I just realised that we have the timing info in the traces and you will
observe the sensor readings take something in order of 100us to 500-600us
or even more based on which sensor is being read. While we have 100us
timeout for cpufreq opp set. I am attaching full trace now.
--
Regards,
Sudeep
[-- Attachment #2: log --]
[-- Type: text/plain, Size: 72012 bytes --]
bash-1019 [005] 1149.452340: scmi_xfer_begin: transfer_id=1537 msg_id=7 protocol_id=19 seq=0 poll=1
bash-1019 [005] 1149.452407: scmi_xfer_end: transfer_id=1537 msg_id=7 protocol_id=19 seq=0 status=0
bash-1526 [000] 1149.472553: scmi_xfer_begin: transfer_id=1538 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1149.472733: scmi_xfer_begin: transfer_id=1539 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.472842: scmi_xfer_end: transfer_id=1539 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [001] 1149.483040: scmi_xfer_begin: transfer_id=1540 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.483043: scmi_xfer_end: transfer_id=1540 msg_id=7 protocol_id=19 seq=1 status=0
rs:main-543 [003] 1149.493031: scmi_xfer_begin: transfer_id=1541 msg_id=7 protocol_id=19 seq=1 poll=1
rs:main-543 [003] 1149.493047: scmi_xfer_end: transfer_id=1541 msg_id=7 protocol_id=19 seq=1 status=0
<idle>-0 [000] 1149.507033: scmi_xfer_begin: transfer_id=1542 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [000] 1149.507044: scmi_xfer_end: transfer_id=1542 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [000] 1149.516068: scmi_xfer_end: transfer_id=1538 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [000] 1149.516559: scmi_xfer_begin: transfer_id=1543 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1149.516729: scmi_xfer_begin: transfer_id=1544 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.516837: scmi_xfer_end: transfer_id=1544 msg_id=7 protocol_id=19 seq=1 status=-110
ksoftirqd/0-9 [000] 1149.519065: scmi_xfer_begin: transfer_id=1545 msg_id=7 protocol_id=19 seq=1 poll=1
ksoftirqd/0-9 [000] 1149.519072: scmi_xfer_end: transfer_id=1545 msg_id=7 protocol_id=19 seq=1 status=0
<idle>-0 [001] 1149.526878: scmi_xfer_begin: transfer_id=1546 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.526882: scmi_xfer_end: transfer_id=1546 msg_id=7 protocol_id=19 seq=1 status=0
<idle>-0 [000] 1149.551119: scmi_xfer_begin: transfer_id=1547 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [000] 1149.551138: scmi_xfer_end: transfer_id=1547 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [000] 1149.560191: scmi_xfer_end: transfer_id=1543 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [000] 1149.560690: scmi_xfer_begin: transfer_id=1548 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1149.560859: scmi_xfer_begin: transfer_id=1549 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.560968: scmi_xfer_end: transfer_id=1549 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [000] 1149.562882: scmi_xfer_begin: transfer_id=1550 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [000] 1149.562887: scmi_xfer_end: transfer_id=1550 msg_id=7 protocol_id=19 seq=1 status=0
<idle>-0 [001] 1149.570877: scmi_xfer_begin: transfer_id=1551 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.570881: scmi_xfer_end: transfer_id=1551 msg_id=7 protocol_id=19 seq=1 status=0
<idle>-0 [000] 1149.595116: scmi_xfer_begin: transfer_id=1552 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [000] 1149.595135: scmi_xfer_end: transfer_id=1552 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [000] 1149.604204: scmi_xfer_end: transfer_id=1548 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [000] 1149.604698: scmi_xfer_begin: transfer_id=1553 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1149.604867: scmi_xfer_begin: transfer_id=1554 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.604976: scmi_xfer_end: transfer_id=1554 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [000] 1149.606880: scmi_xfer_begin: transfer_id=1555 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [000] 1149.606886: scmi_xfer_end: transfer_id=1555 msg_id=7 protocol_id=19 seq=1 status=0
<idle>-0 [001] 1149.614877: scmi_xfer_begin: transfer_id=1556 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.614880: scmi_xfer_end: transfer_id=1556 msg_id=7 protocol_id=19 seq=1 status=0
<idle>-0 [000] 1149.639031: scmi_xfer_begin: transfer_id=1557 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [000] 1149.639050: scmi_xfer_end: transfer_id=1557 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [000] 1149.648098: scmi_xfer_end: transfer_id=1553 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [000] 1149.648620: scmi_xfer_begin: transfer_id=1558 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1149.649207: scmi_xfer_begin: transfer_id=1559 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.649315: scmi_xfer_end: transfer_id=1559 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [000] 1149.650878: scmi_xfer_begin: transfer_id=1560 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [000] 1149.650884: scmi_xfer_end: transfer_id=1560 msg_id=7 protocol_id=19 seq=1 status=0
rcu_preempt-10 [003] 1149.679208: scmi_xfer_begin: transfer_id=1561 msg_id=7 protocol_id=19 seq=1 poll=1
rcu_preempt-10 [003] 1149.679228: scmi_xfer_end: transfer_id=1561 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1149.692154: scmi_xfer_end: transfer_id=1558 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1149.692812: scmi_xfer_begin: transfer_id=1562 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1149.693420: scmi_xfer_begin: transfer_id=1563 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.693529: scmi_xfer_end: transfer_id=1563 msg_id=7 protocol_id=19 seq=1 status=-110
rcu_preempt-10 [003] 1149.711204: scmi_xfer_begin: transfer_id=1564 msg_id=7 protocol_id=19 seq=1 poll=1
rcu_preempt-10 [003] 1149.711223: scmi_xfer_end: transfer_id=1564 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1149.736236: scmi_xfer_end: transfer_id=1562 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1149.736909: scmi_xfer_begin: transfer_id=1565 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1149.737492: scmi_xfer_begin: transfer_id=1566 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.737602: scmi_xfer_end: transfer_id=1566 msg_id=7 protocol_id=19 seq=1 status=-110
rcu_preempt-10 [003] 1149.779073: scmi_xfer_begin: transfer_id=1567 msg_id=7 protocol_id=19 seq=1 poll=1
rcu_preempt-10 [003] 1149.779092: scmi_xfer_end: transfer_id=1567 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1149.780198: scmi_xfer_end: transfer_id=1565 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1149.780864: scmi_xfer_begin: transfer_id=1568 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1149.781495: scmi_xfer_end: transfer_id=1568 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1149.781883: scmi_xfer_begin: transfer_id=1569 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1149.782160: scmi_xfer_end: transfer_id=1569 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1149.782483: scmi_xfer_begin: transfer_id=1570 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1149.782749: scmi_xfer_end: transfer_id=1570 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1149.783211: scmi_xfer_begin: transfer_id=1571 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1149.783595: scmi_xfer_end: transfer_id=1571 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1149.783948: scmi_xfer_begin: transfer_id=1572 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1149.784193: scmi_xfer_end: transfer_id=1572 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1149.784574: scmi_xfer_begin: transfer_id=1573 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1149.784828: scmi_xfer_end: transfer_id=1573 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1149.785154: scmi_xfer_begin: transfer_id=1574 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1149.785419: scmi_xfer_end: transfer_id=1574 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1149.785740: scmi_xfer_begin: transfer_id=1575 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1149.785830: scmi_xfer_end: transfer_id=1575 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1149.786147: scmi_xfer_begin: transfer_id=1576 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1149.786240: scmi_xfer_end: transfer_id=1576 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1149.786610: scmi_xfer_begin: transfer_id=1577 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1149.787116: scmi_xfer_end: transfer_id=1577 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1149.787436: scmi_xfer_begin: transfer_id=1578 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1149.788026: scmi_xfer_end: transfer_id=1578 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1149.788365: scmi_xfer_begin: transfer_id=1579 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1149.788957: scmi_xfer_end: transfer_id=1579 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1149.789271: scmi_xfer_begin: transfer_id=1580 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1149.789473: scmi_xfer_begin: transfer_id=1581 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.789582: scmi_xfer_end: transfer_id=1581 msg_id=7 protocol_id=19 seq=1 status=-110
rcu_preempt-10 [003] 1149.815053: scmi_xfer_begin: transfer_id=1582 msg_id=7 protocol_id=19 seq=1 poll=1
rcu_preempt-10 [003] 1149.815065: scmi_xfer_end: transfer_id=1582 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1149.832118: scmi_xfer_end: transfer_id=1580 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1149.832542: scmi_xfer_begin: transfer_id=1583 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1149.832717: scmi_xfer_begin: transfer_id=1584 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.832825: scmi_xfer_end: transfer_id=1584 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [001] 1149.842867: scmi_xfer_begin: transfer_id=1585 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.842870: scmi_xfer_end: transfer_id=1585 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1149.876220: scmi_xfer_end: transfer_id=1583 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1149.876896: scmi_xfer_begin: transfer_id=1586 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1149.877073: scmi_xfer_begin: transfer_id=1587 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.877182: scmi_xfer_end: transfer_id=1587 msg_id=7 protocol_id=19 seq=1 status=-110
rcu_preempt-10 [003] 1149.915093: scmi_xfer_begin: transfer_id=1588 msg_id=7 protocol_id=19 seq=1 poll=1
rcu_preempt-10 [003] 1149.915112: scmi_xfer_end: transfer_id=1588 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1149.920198: scmi_xfer_end: transfer_id=1586 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1149.920867: scmi_xfer_begin: transfer_id=1589 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1149.921111: scmi_xfer_end: transfer_id=1589 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1149.922531: scmi_xfer_begin: transfer_id=1590 msg_id=7 protocol_id=19 seq=0 poll=1
bash-1526 [005] 1149.922589: scmi_xfer_end: transfer_id=1590 msg_id=7 protocol_id=19 seq=0 status=0
<idle>-0 [000] 1149.934887: scmi_xfer_begin: transfer_id=1591 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [000] 1149.934969: scmi_xfer_end: transfer_id=1591 msg_id=7 protocol_id=19 seq=0 status=0
kworker/u13:0-1497 [003] 1149.944998: scmi_xfer_begin: transfer_id=1592 msg_id=7 protocol_id=19 seq=0 poll=1
kworker/u13:0-1497 [003] 1149.945062: scmi_xfer_end: transfer_id=1592 msg_id=7 protocol_id=19 seq=0 status=0
<idle>-0 [000] 1149.962941: scmi_xfer_begin: transfer_id=1593 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [000] 1149.963050: scmi_xfer_end: transfer_id=1593 msg_id=7 protocol_id=19 seq=0 status=-110
<idle>-0 [000] 1150.947518: scmi_xfer_begin: transfer_id=1594 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [000] 1150.947586: scmi_xfer_end: transfer_id=1594 msg_id=7 protocol_id=19 seq=0 status=0
bash-1526 [005] 1150.950155: scmi_xfer_begin: transfer_id=1595 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1150.950327: scmi_xfer_begin: transfer_id=1596 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1150.950436: scmi_xfer_end: transfer_id=1596 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [000] 1150.958904: scmi_xfer_begin: transfer_id=1597 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [000] 1150.958911: scmi_xfer_end: transfer_id=1597 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1150.992119: scmi_xfer_end: transfer_id=1595 msg_id=6 protocol_id=21 seq=0 status=-110
<idle>-0 [001] 1150.992161: scmi_xfer_begin: transfer_id=1598 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [001] 1150.992216: scmi_xfer_end: transfer_id=1598 msg_id=7 protocol_id=19 seq=0 status=0
bash-1526 [005] 1150.992603: scmi_xfer_begin: transfer_id=1599 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1150.992908: scmi_xfer_end: transfer_id=1599 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1150.993241: scmi_xfer_begin: transfer_id=1600 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1150.993328: scmi_xfer_end: transfer_id=1600 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1150.993657: scmi_xfer_begin: transfer_id=1601 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1150.993742: scmi_xfer_end: transfer_id=1601 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1150.994129: scmi_xfer_begin: transfer_id=1602 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1150.994627: scmi_xfer_end: transfer_id=1602 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1150.995058: scmi_xfer_begin: transfer_id=1603 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1150.995792: scmi_xfer_end: transfer_id=1603 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1150.996110: scmi_xfer_begin: transfer_id=1604 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1150.996827: scmi_xfer_end: transfer_id=1604 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1150.997160: scmi_xfer_begin: transfer_id=1605 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1150.997803: scmi_xfer_end: transfer_id=1605 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1150.998198: scmi_xfer_begin: transfer_id=1606 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1150.998287: scmi_xfer_end: transfer_id=1606 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1150.998611: scmi_xfer_begin: transfer_id=1607 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1150.998698: scmi_xfer_end: transfer_id=1607 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1150.999089: scmi_xfer_begin: transfer_id=1608 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1150.999404: scmi_xfer_end: transfer_id=1608 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1150.999715: scmi_xfer_begin: transfer_id=1609 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1150.999979: scmi_xfer_end: transfer_id=1609 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1151.000368: scmi_xfer_begin: transfer_id=1610 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1151.000607: scmi_xfer_end: transfer_id=1610 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1151.000927: scmi_xfer_begin: transfer_id=1611 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1151.001114: scmi_xfer_end: transfer_id=1611 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1151.001432: scmi_xfer_begin: transfer_id=1612 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1151.001521: scmi_xfer_end: transfer_id=1612 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1151.001837: scmi_xfer_begin: transfer_id=1613 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1151.001930: scmi_xfer_end: transfer_id=1613 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1151.002302: scmi_xfer_begin: transfer_id=1614 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1151.002696: scmi_xfer_begin: transfer_id=1615 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1151.002803: scmi_xfer_end: transfer_id=1615 msg_id=7 protocol_id=19 seq=1 status=-110
bash-1526 [005] 1151.043973: scmi_xfer_end: transfer_id=1614 msg_id=6 protocol_id=21 seq=0 status=-110
rcu_preempt-10 [004] 1151.044107: scmi_xfer_begin: transfer_id=1616 msg_id=7 protocol_id=19 seq=0 poll=1
rcu_preempt-10 [004] 1151.044166: scmi_xfer_end: transfer_id=1616 msg_id=7 protocol_id=19 seq=0 status=0
bash-1526 [005] 1151.044384: scmi_xfer_begin: transfer_id=1617 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1151.045191: scmi_xfer_end: transfer_id=1617 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1151.045525: scmi_xfer_begin: transfer_id=1618 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1151.046144: scmi_xfer_end: transfer_id=1618 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1151.046456: scmi_xfer_begin: transfer_id=1619 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1151.046723: scmi_xfer_end: transfer_id=1619 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1151.047177: scmi_xfer_begin: transfer_id=1620 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1151.047472: scmi_xfer_end: transfer_id=1620 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1151.047810: scmi_xfer_begin: transfer_id=1621 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1151.048051: scmi_xfer_end: transfer_id=1621 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1151.048360: scmi_xfer_begin: transfer_id=1622 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1151.048715: scmi_xfer_end: transfer_id=1622 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1151.049880: scmi_xfer_begin: transfer_id=1623 msg_id=7 protocol_id=19 seq=0 poll=1
bash-1526 [005] 1151.049938: scmi_xfer_end: transfer_id=1623 msg_id=7 protocol_id=19 seq=0 status=0
<idle>-0 [000] 1151.074998: scmi_xfer_begin: transfer_id=1624 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [000] 1151.075060: scmi_xfer_end: transfer_id=1624 msg_id=7 protocol_id=19 seq=0 status=0
<idle>-0 [000] 1152.053922: scmi_xfer_begin: transfer_id=1625 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [000] 1152.053989: scmi_xfer_end: transfer_id=1625 msg_id=7 protocol_id=19 seq=0 status=0
bash-1526 [005] 1152.055670: scmi_xfer_begin: transfer_id=1626 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1152.055842: scmi_xfer_begin: transfer_id=1627 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1152.055951: scmi_xfer_end: transfer_id=1627 msg_id=7 protocol_id=19 seq=1 status=-110
in:imklog-541 [000] 1152.064028: scmi_xfer_begin: transfer_id=1628 msg_id=7 protocol_id=19 seq=1 poll=1
in:imklog-541 [000] 1152.064035: scmi_xfer_end: transfer_id=1628 msg_id=7 protocol_id=19 seq=1 status=0
kworker/0:0-1376 [000] 1152.075118: scmi_xfer_begin: transfer_id=1629 msg_id=7 protocol_id=19 seq=1 poll=1
kworker/0:0-1376 [000] 1152.075128: scmi_xfer_end: transfer_id=1629 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1152.100040: scmi_xfer_end: transfer_id=1626 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1152.100511: scmi_xfer_begin: transfer_id=1630 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1152.100687: scmi_xfer_begin: transfer_id=1631 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1152.100796: scmi_xfer_end: transfer_id=1631 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [001] 1152.110785: scmi_xfer_begin: transfer_id=1632 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1152.110788: scmi_xfer_end: transfer_id=1632 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1152.143925: scmi_xfer_end: transfer_id=1630 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1152.144397: scmi_xfer_begin: transfer_id=1633 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1152.144571: scmi_xfer_begin: transfer_id=1634 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1152.144680: scmi_xfer_end: transfer_id=1634 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [001] 1152.154784: scmi_xfer_begin: transfer_id=1635 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1152.154787: scmi_xfer_end: transfer_id=1635 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1152.188124: scmi_xfer_end: transfer_id=1633 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1152.188780: scmi_xfer_begin: transfer_id=1636 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1152.188956: scmi_xfer_begin: transfer_id=1637 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1152.189065: scmi_xfer_end: transfer_id=1637 msg_id=7 protocol_id=19 seq=1 status=-110
bash-1526 [005] 1152.232101: scmi_xfer_end: transfer_id=1636 msg_id=6 protocol_id=21 seq=0 status=-110
<idle>-0 [000] 1152.232193: scmi_xfer_begin: transfer_id=1638 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [000] 1152.232254: scmi_xfer_end: transfer_id=1638 msg_id=7 protocol_id=19 seq=0 status=0
bash-1526 [005] 1152.232799: scmi_xfer_begin: transfer_id=1639 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.233510: scmi_xfer_end: transfer_id=1639 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.233854: scmi_xfer_begin: transfer_id=1640 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.234574: scmi_xfer_end: transfer_id=1640 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.235024: scmi_xfer_begin: transfer_id=1641 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.235764: scmi_xfer_end: transfer_id=1641 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.236128: scmi_xfer_begin: transfer_id=1642 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.236757: scmi_xfer_end: transfer_id=1642 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.237155: scmi_xfer_begin: transfer_id=1643 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.237396: scmi_xfer_end: transfer_id=1643 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.237705: scmi_xfer_begin: transfer_id=1644 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.237976: scmi_xfer_end: transfer_id=1644 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.238288: scmi_xfer_begin: transfer_id=1645 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.238559: scmi_xfer_end: transfer_id=1645 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.238928: scmi_xfer_begin: transfer_id=1646 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.239226: scmi_xfer_end: transfer_id=1646 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.239622: scmi_xfer_begin: transfer_id=1647 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.239860: scmi_xfer_end: transfer_id=1647 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.240175: scmi_xfer_begin: transfer_id=1648 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.240448: scmi_xfer_end: transfer_id=1648 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.240762: scmi_xfer_begin: transfer_id=1649 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.240852: scmi_xfer_end: transfer_id=1649 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.241164: scmi_xfer_begin: transfer_id=1650 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.241256: scmi_xfer_end: transfer_id=1650 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.241634: scmi_xfer_begin: transfer_id=1651 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.242060: scmi_xfer_end: transfer_id=1651 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.242372: scmi_xfer_begin: transfer_id=1652 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1152.242767: scmi_xfer_begin: transfer_id=1653 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1152.242874: scmi_xfer_end: transfer_id=1653 msg_id=7 protocol_id=19 seq=1 status=-110
rcu_preempt-10 [004] 1152.282994: scmi_xfer_begin: transfer_id=1654 msg_id=7 protocol_id=19 seq=1 poll=1
rcu_preempt-10 [004] 1152.283014: scmi_xfer_end: transfer_id=1654 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1152.284310: scmi_xfer_end: transfer_id=1652 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1152.284867: scmi_xfer_begin: transfer_id=1655 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.285452: scmi_xfer_end: transfer_id=1655 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.285773: scmi_xfer_begin: transfer_id=1656 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.286058: scmi_xfer_end: transfer_id=1656 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.286361: scmi_xfer_begin: transfer_id=1657 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.286632: scmi_xfer_end: transfer_id=1657 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.287086: scmi_xfer_begin: transfer_id=1658 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.287477: scmi_xfer_end: transfer_id=1658 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.287800: scmi_xfer_begin: transfer_id=1659 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.288071: scmi_xfer_end: transfer_id=1659 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.289294: scmi_xfer_begin: transfer_id=1660 msg_id=7 protocol_id=19 seq=0 poll=1
bash-1526 [005] 1152.289352: scmi_xfer_end: transfer_id=1660 msg_id=7 protocol_id=19 seq=0 status=0
<idle>-0 [000] 1152.314930: scmi_xfer_begin: transfer_id=1661 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [000] 1152.315036: scmi_xfer_end: transfer_id=1661 msg_id=7 protocol_id=19 seq=0 status=0
<idle>-0 [000] 1153.293994: scmi_xfer_begin: transfer_id=1662 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [000] 1153.294062: scmi_xfer_end: transfer_id=1662 msg_id=7 protocol_id=19 seq=0 status=0
bash-1526 [005] 1153.295825: scmi_xfer_begin: transfer_id=1663 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1153.295999: scmi_xfer_begin: transfer_id=1664 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1153.296108: scmi_xfer_end: transfer_id=1664 msg_id=7 protocol_id=19 seq=1 status=-110
systemd-journal-262 [000] 1153.304319: scmi_xfer_begin: transfer_id=1665 msg_id=7 protocol_id=19 seq=1 poll=1
systemd-journal-262 [000] 1153.304334: scmi_xfer_end: transfer_id=1665 msg_id=7 protocol_id=19 seq=1 status=0
rcu_preempt-10 [004] 1153.334921: scmi_xfer_begin: transfer_id=1666 msg_id=7 protocol_id=19 seq=1 poll=1
rcu_preempt-10 [004] 1153.334932: scmi_xfer_end: transfer_id=1666 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1153.339954: scmi_xfer_end: transfer_id=1663 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1153.340511: scmi_xfer_begin: transfer_id=1667 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.340754: scmi_xfer_end: transfer_id=1667 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.341098: scmi_xfer_begin: transfer_id=1668 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.341338: scmi_xfer_end: transfer_id=1668 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.341649: scmi_xfer_begin: transfer_id=1669 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.341912: scmi_xfer_end: transfer_id=1669 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.342273: scmi_xfer_begin: transfer_id=1670 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.342949: scmi_xfer_end: transfer_id=1670 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.343292: scmi_xfer_begin: transfer_id=1671 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.344044: scmi_xfer_end: transfer_id=1671 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.344359: scmi_xfer_begin: transfer_id=1672 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1153.344965: scmi_xfer_begin: transfer_id=1673 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1153.345074: scmi_xfer_end: transfer_id=1673 msg_id=7 protocol_id=19 seq=1 status=-110
rcu_preempt-10 [004] 1153.386931: scmi_xfer_begin: transfer_id=1674 msg_id=7 protocol_id=19 seq=1 poll=1
rcu_preempt-10 [004] 1153.386951: scmi_xfer_end: transfer_id=1674 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1153.388087: scmi_xfer_end: transfer_id=1672 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1153.388729: scmi_xfer_begin: transfer_id=1675 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.389361: scmi_xfer_end: transfer_id=1675 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.389766: scmi_xfer_begin: transfer_id=1676 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.390008: scmi_xfer_end: transfer_id=1676 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.390324: scmi_xfer_begin: transfer_id=1677 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.390588: scmi_xfer_end: transfer_id=1677 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.391015: scmi_xfer_begin: transfer_id=1678 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.391253: scmi_xfer_end: transfer_id=1678 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.391570: scmi_xfer_begin: transfer_id=1679 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.391844: scmi_xfer_end: transfer_id=1679 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.392241: scmi_xfer_begin: transfer_id=1680 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.392478: scmi_xfer_end: transfer_id=1680 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.392803: scmi_xfer_begin: transfer_id=1681 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.393068: scmi_xfer_end: transfer_id=1681 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.393388: scmi_xfer_begin: transfer_id=1682 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.393478: scmi_xfer_end: transfer_id=1682 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.393793: scmi_xfer_begin: transfer_id=1683 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.393885: scmi_xfer_end: transfer_id=1683 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.394306: scmi_xfer_begin: transfer_id=1684 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.394765: scmi_xfer_end: transfer_id=1684 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.395077: scmi_xfer_begin: transfer_id=1685 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.395513: scmi_xfer_end: transfer_id=1685 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.395814: scmi_xfer_begin: transfer_id=1686 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.396427: scmi_xfer_end: transfer_id=1686 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.396737: scmi_xfer_begin: transfer_id=1687 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1153.396942: scmi_xfer_begin: transfer_id=1688 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1153.397051: scmi_xfer_end: transfer_id=1688 msg_id=7 protocol_id=19 seq=1 status=-110
rcu_preempt-10 [004] 1153.438939: scmi_xfer_begin: transfer_id=1689 msg_id=7 protocol_id=19 seq=1 poll=1
rcu_preempt-10 [004] 1153.438957: scmi_xfer_end: transfer_id=1689 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1153.440057: scmi_xfer_end: transfer_id=1687 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1153.440699: scmi_xfer_begin: transfer_id=1690 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.440941: scmi_xfer_end: transfer_id=1690 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.441271: scmi_xfer_begin: transfer_id=1691 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.441358: scmi_xfer_end: transfer_id=1691 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.441668: scmi_xfer_begin: transfer_id=1692 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.441777: scmi_xfer_end: transfer_id=1692 msg_id=6 protocol_id=21 seq=0 status=0
<idle>-0 [001] 1153.450939: scmi_xfer_begin: transfer_id=1693 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [001] 1153.451048: scmi_xfer_end: transfer_id=1693 msg_id=7 protocol_id=19 seq=0 status=-110
<idle>-0 [001] 1153.462865: scmi_xfer_begin: transfer_id=1694 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [001] 1153.462921: scmi_xfer_end: transfer_id=1694 msg_id=7 protocol_id=19 seq=0 status=0
<idle>-0 [001] 1154.447474: scmi_xfer_begin: transfer_id=1695 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [001] 1154.447534: scmi_xfer_end: transfer_id=1695 msg_id=7 protocol_id=19 seq=0 status=0
bash-1526 [005] 1154.449108: scmi_xfer_begin: transfer_id=1696 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.449211: scmi_xfer_end: transfer_id=1696 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.449591: scmi_xfer_begin: transfer_id=1697 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.449668: scmi_xfer_end: transfer_id=1697 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.449977: scmi_xfer_begin: transfer_id=1698 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.450059: scmi_xfer_end: transfer_id=1698 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.450373: scmi_xfer_begin: transfer_id=1699 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.450448: scmi_xfer_end: transfer_id=1699 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.450900: scmi_xfer_begin: transfer_id=1700 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.451492: scmi_xfer_end: transfer_id=1700 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.451807: scmi_xfer_begin: transfer_id=1701 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.452323: scmi_xfer_end: transfer_id=1701 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.452634: scmi_xfer_begin: transfer_id=1702 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.453116: scmi_xfer_end: transfer_id=1702 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.453433: scmi_xfer_begin: transfer_id=1703 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.453902: scmi_xfer_end: transfer_id=1703 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.454278: scmi_xfer_begin: transfer_id=1704 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.454360: scmi_xfer_end: transfer_id=1704 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.454673: scmi_xfer_begin: transfer_id=1705 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.454753: scmi_xfer_end: transfer_id=1705 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.455067: scmi_xfer_begin: transfer_id=1706 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.455144: scmi_xfer_end: transfer_id=1706 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.455455: scmi_xfer_begin: transfer_id=1707 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.455538: scmi_xfer_end: transfer_id=1707 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.455919: scmi_xfer_begin: transfer_id=1708 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.455997: scmi_xfer_end: transfer_id=1708 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.456312: scmi_xfer_begin: transfer_id=1709 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.456390: scmi_xfer_end: transfer_id=1709 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.456704: scmi_xfer_begin: transfer_id=1710 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.456782: scmi_xfer_end: transfer_id=1710 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.457095: scmi_xfer_begin: transfer_id=1711 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.457173: scmi_xfer_end: transfer_id=1711 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.457549: scmi_xfer_begin: transfer_id=1712 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1154.457937: scmi_xfer_begin: transfer_id=1713 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1154.458041: scmi_xfer_end: transfer_id=1713 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [001] 1154.470688: scmi_xfer_begin: transfer_id=1714 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1154.470691: scmi_xfer_end: transfer_id=1714 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1154.499934: scmi_xfer_end: transfer_id=1712 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1154.500367: scmi_xfer_begin: transfer_id=1715 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1154.500853: scmi_xfer_begin: transfer_id=1716 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1154.500960: scmi_xfer_end: transfer_id=1716 msg_id=7 protocol_id=19 seq=1 status=-110
bash-1526 [005] 1154.543907: scmi_xfer_end: transfer_id=1715 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1154.544319: scmi_xfer_begin: transfer_id=1717 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.544368: scmi_xfer_begin: transfer_id=1718 msg_id=7 protocol_id=19 seq=1 poll=1
bash-1526 [005] 1154.544704: scmi_xfer_end: transfer_id=1718 msg_id=7 protocol_id=19 seq=1 status=-110
bash-1526 [005] 1154.588006: scmi_xfer_end: transfer_id=1717 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1154.588654: scmi_xfer_begin: transfer_id=1719 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1154.588832: scmi_xfer_begin: transfer_id=1720 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1154.588941: scmi_xfer_end: transfer_id=1720 msg_id=7 protocol_id=19 seq=1 status=-110
bash-1526 [005] 1154.632058: scmi_xfer_end: transfer_id=1719 msg_id=6 protocol_id=21 seq=0 status=-110
<idle>-0 [000] 1154.632144: scmi_xfer_begin: transfer_id=1721 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [000] 1154.632205: scmi_xfer_end: transfer_id=1721 msg_id=7 protocol_id=19 seq=0 status=0
bash-1526 [005] 1154.632700: scmi_xfer_begin: transfer_id=1722 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.632942: scmi_xfer_end: transfer_id=1722 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.633275: scmi_xfer_begin: transfer_id=1723 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.633526: scmi_xfer_end: transfer_id=1723 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.633838: scmi_xfer_begin: transfer_id=1724 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.634105: scmi_xfer_end: transfer_id=1724 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.635444: scmi_xfer_begin: transfer_id=1725 msg_id=7 protocol_id=19 seq=0 poll=1
bash-1526 [005] 1154.635505: scmi_xfer_end: transfer_id=1725 msg_id=7 protocol_id=19 seq=0 status=0
<idle>-0 [003] 1154.662873: scmi_xfer_begin: transfer_id=1726 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [003] 1154.662937: scmi_xfer_end: transfer_id=1726 msg_id=7 protocol_id=19 seq=0 status=0
<idle>-0 [003] 1155.639503: scmi_xfer_begin: transfer_id=1727 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [003] 1155.639570: scmi_xfer_end: transfer_id=1727 msg_id=7 protocol_id=19 seq=0 status=0
bash-1526 [005] 1155.641223: scmi_xfer_begin: transfer_id=1728 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1155.641395: scmi_xfer_begin: transfer_id=1729 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1155.641503: scmi_xfer_end: transfer_id=1729 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [000] 1155.650787: scmi_xfer_begin: transfer_id=1730 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [000] 1155.650802: scmi_xfer_end: transfer_id=1730 msg_id=7 protocol_id=19 seq=1 status=0
rcu_preempt-10 [000] 1155.682908: scmi_xfer_begin: transfer_id=1731 msg_id=7 protocol_id=19 seq=1 poll=1
rcu_preempt-10 [000] 1155.682927: scmi_xfer_end: transfer_id=1731 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1155.683842: scmi_xfer_end: transfer_id=1728 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1155.684505: scmi_xfer_begin: transfer_id=1732 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1155.684749: scmi_xfer_end: transfer_id=1732 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1155.685089: scmi_xfer_begin: transfer_id=1733 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1155.685331: scmi_xfer_end: transfer_id=1733 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1155.685644: scmi_xfer_begin: transfer_id=1734 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1155.685909: scmi_xfer_end: transfer_id=1734 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1155.686273: scmi_xfer_begin: transfer_id=1735 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1155.687059: scmi_xfer_end: transfer_id=1735 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1155.687418: scmi_xfer_begin: transfer_id=1736 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1155.688093: scmi_xfer_end: transfer_id=1736 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1155.688413: scmi_xfer_begin: transfer_id=1737 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [005] 1155.689077: scmi_xfer_begin: transfer_id=1738 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [005] 1155.689185: scmi_xfer_end: transfer_id=1738 msg_id=7 protocol_id=19 seq=1 status=-110
bash-1526 [002] 1155.689518: scmi_xfer_end: transfer_id=1737 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [002] 1155.689813: scmi_xfer_begin: transfer_id=1739 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1155.690540: scmi_xfer_end: transfer_id=1739 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1155.690901: scmi_xfer_begin: transfer_id=1740 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1155.691236: scmi_xfer_end: transfer_id=1740 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1155.691426: scmi_xfer_begin: transfer_id=1741 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1155.691875: scmi_xfer_end: transfer_id=1741 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1155.692068: scmi_xfer_begin: transfer_id=1742 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1155.692368: scmi_xfer_end: transfer_id=1742 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1155.692546: scmi_xfer_begin: transfer_id=1743 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1155.692895: scmi_xfer_end: transfer_id=1743 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1155.693118: scmi_xfer_begin: transfer_id=1744 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1155.693380: scmi_xfer_begin: transfer_id=1745 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1155.693488: scmi_xfer_end: transfer_id=1745 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [000] 1155.702882: scmi_xfer_begin: transfer_id=1746 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [000] 1155.702890: scmi_xfer_end: transfer_id=1746 msg_id=7 protocol_id=19 seq=1 status=0
rcu_preempt-10 [000] 1155.734837: scmi_xfer_begin: transfer_id=1747 msg_id=7 protocol_id=19 seq=1 poll=1
rcu_preempt-10 [000] 1155.734856: scmi_xfer_end: transfer_id=1747 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [004] 1155.735861: scmi_xfer_end: transfer_id=1744 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [004] 1155.736506: scmi_xfer_begin: transfer_id=1748 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1155.736751: scmi_xfer_end: transfer_id=1748 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1155.737091: scmi_xfer_begin: transfer_id=1749 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1155.737330: scmi_xfer_end: transfer_id=1749 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1155.737640: scmi_xfer_begin: transfer_id=1750 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1155.737735: scmi_xfer_end: transfer_id=1750 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1155.738109: scmi_xfer_begin: transfer_id=1751 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1155.738778: scmi_xfer_end: transfer_id=1751 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1155.739094: scmi_xfer_begin: transfer_id=1752 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1155.739673: scmi_xfer_end: transfer_id=1752 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1155.739991: scmi_xfer_begin: transfer_id=1753 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1155.740603: scmi_xfer_end: transfer_id=1753 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1155.740917: scmi_xfer_begin: transfer_id=1754 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1155.741185: scmi_xfer_end: transfer_id=1754 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1155.741494: scmi_xfer_begin: transfer_id=1755 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1155.741761: scmi_xfer_end: transfer_id=1755 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1155.742078: scmi_xfer_begin: transfer_id=1756 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1155.742350: scmi_xfer_end: transfer_id=1756 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1155.742711: scmi_xfer_begin: transfer_id=1757 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1155.742965: scmi_xfer_end: transfer_id=1757 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1155.744099: scmi_xfer_begin: transfer_id=1758 msg_id=7 protocol_id=19 seq=0 poll=1
bash-1526 [004] 1155.744156: scmi_xfer_end: transfer_id=1758 msg_id=7 protocol_id=19 seq=0 status=0
ksoftirqd/0-9 [000] 1155.766839: scmi_xfer_begin: transfer_id=1759 msg_id=7 protocol_id=19 seq=0 poll=1
ksoftirqd/0-9 [000] 1155.766902: scmi_xfer_end: transfer_id=1759 msg_id=7 protocol_id=19 seq=0 status=0
<idle>-0 [005] 1156.747828: scmi_xfer_begin: transfer_id=1760 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [005] 1156.747895: scmi_xfer_end: transfer_id=1760 msg_id=7 protocol_id=19 seq=0 status=0
bash-1526 [004] 1156.749593: scmi_xfer_begin: transfer_id=1761 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1156.749772: scmi_xfer_begin: transfer_id=1762 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1156.749880: scmi_xfer_end: transfer_id=1762 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [000] 1156.758687: scmi_xfer_begin: transfer_id=1763 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [000] 1156.758694: scmi_xfer_end: transfer_id=1763 msg_id=7 protocol_id=19 seq=1 status=0
systemd-journal-262 [000] 1156.761548: scmi_xfer_begin: transfer_id=1764 msg_id=7 protocol_id=19 seq=1 poll=1
systemd-journal-262 [000] 1156.761558: scmi_xfer_end: transfer_id=1764 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [004] 1156.791787: scmi_xfer_end: transfer_id=1761 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [004] 1156.792273: scmi_xfer_begin: transfer_id=1765 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1156.792448: scmi_xfer_begin: transfer_id=1766 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1156.792557: scmi_xfer_end: transfer_id=1766 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [001] 1156.802616: scmi_xfer_begin: transfer_id=1767 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1156.802619: scmi_xfer_end: transfer_id=1767 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [004] 1156.835929: scmi_xfer_end: transfer_id=1765 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [004] 1156.836613: scmi_xfer_begin: transfer_id=1768 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1156.836789: scmi_xfer_begin: transfer_id=1769 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1156.836898: scmi_xfer_end: transfer_id=1769 msg_id=7 protocol_id=19 seq=1 status=-110
rcu_preempt-10 [000] 1156.878805: scmi_xfer_begin: transfer_id=1770 msg_id=7 protocol_id=19 seq=1 poll=1
rcu_preempt-10 [000] 1156.878824: scmi_xfer_end: transfer_id=1770 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [004] 1156.879938: scmi_xfer_end: transfer_id=1768 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [004] 1156.880585: scmi_xfer_begin: transfer_id=1771 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1156.880829: scmi_xfer_end: transfer_id=1771 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1156.881217: scmi_xfer_begin: transfer_id=1772 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1156.881864: scmi_xfer_end: transfer_id=1772 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1156.882193: scmi_xfer_begin: transfer_id=1773 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1156.882968: scmi_xfer_end: transfer_id=1773 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1156.883305: scmi_xfer_begin: transfer_id=1774 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1156.883998: scmi_xfer_end: transfer_id=1774 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1156.884319: scmi_xfer_begin: transfer_id=1775 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1156.884965: scmi_xfer_end: transfer_id=1775 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1156.885353: scmi_xfer_begin: transfer_id=1776 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1156.885595: scmi_xfer_end: transfer_id=1776 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1156.885911: scmi_xfer_begin: transfer_id=1777 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1156.886172: scmi_xfer_end: transfer_id=1777 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1156.886485: scmi_xfer_begin: transfer_id=1778 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1156.886764: scmi_xfer_end: transfer_id=1778 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1156.887070: scmi_xfer_begin: transfer_id=1779 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1156.887340: scmi_xfer_end: transfer_id=1779 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1156.887730: scmi_xfer_begin: transfer_id=1780 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1156.887973: scmi_xfer_end: transfer_id=1780 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1156.888289: scmi_xfer_begin: transfer_id=1781 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1156.888552: scmi_xfer_end: transfer_id=1781 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1156.888864: scmi_xfer_begin: transfer_id=1782 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1156.888918: scmi_xfer_begin: transfer_id=1783 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1156.889025: scmi_xfer_end: transfer_id=1783 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [001] 1156.902596: scmi_xfer_begin: transfer_id=1784 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1156.902599: scmi_xfer_end: transfer_id=1784 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [004] 1156.931852: scmi_xfer_end: transfer_id=1782 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [004] 1156.932504: scmi_xfer_begin: transfer_id=1785 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1156.932686: scmi_xfer_begin: transfer_id=1786 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1156.932795: scmi_xfer_end: transfer_id=1786 msg_id=7 protocol_id=19 seq=1 status=-110
rcu_preempt-10 [000] 1156.974803: scmi_xfer_begin: transfer_id=1787 msg_id=7 protocol_id=19 seq=1 poll=1
rcu_preempt-10 [000] 1156.974822: scmi_xfer_end: transfer_id=1787 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [004] 1156.975934: scmi_xfer_end: transfer_id=1785 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [004] 1156.976657: scmi_xfer_begin: transfer_id=1788 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1156.977245: scmi_xfer_end: transfer_id=1788 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1156.977563: scmi_xfer_begin: transfer_id=1789 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1156.978168: scmi_xfer_end: transfer_id=1789 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1156.978471: scmi_xfer_begin: transfer_id=1790 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1156.979200: scmi_xfer_end: transfer_id=1790 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1156.979541: scmi_xfer_begin: transfer_id=1791 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1156.979774: scmi_xfer_end: transfer_id=1791 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1156.980091: scmi_xfer_begin: transfer_id=1792 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1156.980359: scmi_xfer_end: transfer_id=1792 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1156.980676: scmi_xfer_begin: transfer_id=1793 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1156.980935: scmi_xfer_end: transfer_id=1793 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1156.981248: scmi_xfer_begin: transfer_id=1794 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1156.981519: scmi_xfer_end: transfer_id=1794 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1156.982681: scmi_xfer_begin: transfer_id=1795 msg_id=7 protocol_id=19 seq=0 poll=1
bash-1526 [004] 1156.982755: scmi_xfer_end: transfer_id=1795 msg_id=7 protocol_id=19 seq=0 status=0
<idle>-0 [005] 1157.006787: scmi_xfer_begin: transfer_id=1796 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [005] 1157.006850: scmi_xfer_end: transfer_id=1796 msg_id=7 protocol_id=19 seq=0 status=0
<idle>-0 [005] 1157.986340: scmi_xfer_begin: transfer_id=1797 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [005] 1157.986407: scmi_xfer_end: transfer_id=1797 msg_id=7 protocol_id=19 seq=0 status=0
bash-1526 [004] 1157.988153: scmi_xfer_begin: transfer_id=1798 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1157.988334: scmi_xfer_begin: transfer_id=1799 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1157.988443: scmi_xfer_end: transfer_id=1799 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [004] 1157.998657: scmi_xfer_begin: transfer_id=1800 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [004] 1157.998672: scmi_xfer_end: transfer_id=1800 msg_id=7 protocol_id=19 seq=1 status=0
<idle>-0 [001] 1157.998761: scmi_xfer_begin: transfer_id=1801 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1157.998887: scmi_xfer_end: transfer_id=1801 msg_id=7 protocol_id=19 seq=1 status=-110
bash-1526 [004] 1158.031749: scmi_xfer_end: transfer_id=1798 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [004] 1158.032301: scmi_xfer_begin: transfer_id=1802 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1158.032478: scmi_xfer_begin: transfer_id=1803 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1158.032587: scmi_xfer_end: transfer_id=1803 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [001] 1158.042571: scmi_xfer_begin: transfer_id=1804 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1158.042574: scmi_xfer_end: transfer_id=1804 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [004] 1158.075723: scmi_xfer_end: transfer_id=1802 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [004] 1158.076168: scmi_xfer_begin: transfer_id=1805 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1158.076343: scmi_xfer_begin: transfer_id=1806 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1158.076452: scmi_xfer_end: transfer_id=1806 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [001] 1158.086569: scmi_xfer_begin: transfer_id=1807 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1158.086572: scmi_xfer_end: transfer_id=1807 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [004] 1158.119894: scmi_xfer_end: transfer_id=1805 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [004] 1158.120541: scmi_xfer_begin: transfer_id=1808 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1158.120718: scmi_xfer_begin: transfer_id=1809 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1158.120828: scmi_xfer_end: transfer_id=1809 msg_id=7 protocol_id=19 seq=1 status=-110
bash-1526 [004] 1158.163900: scmi_xfer_end: transfer_id=1808 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [004] 1158.164606: scmi_xfer_begin: transfer_id=1810 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1158.164668: scmi_xfer_begin: transfer_id=1811 msg_id=7 protocol_id=19 seq=1 poll=1
bash-1526 [004] 1158.165059: scmi_xfer_end: transfer_id=1811 msg_id=7 protocol_id=19 seq=1 status=-110
bash-1526 [004] 1158.207881: scmi_xfer_end: transfer_id=1810 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [004] 1158.208551: scmi_xfer_begin: transfer_id=1812 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1158.209160: scmi_xfer_begin: transfer_id=1813 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1158.209269: scmi_xfer_end: transfer_id=1813 msg_id=7 protocol_id=19 seq=1 status=-110
bash-1526 [004] 1158.251885: scmi_xfer_end: transfer_id=1812 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [004] 1158.252538: scmi_xfer_begin: transfer_id=1814 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1158.252599: scmi_xfer_begin: transfer_id=1815 msg_id=7 protocol_id=19 seq=1 poll=1
bash-1526 [004] 1158.252987: scmi_xfer_end: transfer_id=1815 msg_id=7 protocol_id=19 seq=1 status=-110
bash-1526 [004] 1158.295885: scmi_xfer_end: transfer_id=1814 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [004] 1158.296535: scmi_xfer_begin: transfer_id=1816 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1158.297100: scmi_xfer_begin: transfer_id=1817 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1158.297209: scmi_xfer_end: transfer_id=1817 msg_id=7 protocol_id=19 seq=1 status=-110
bash-1526 [004] 1158.339884: scmi_xfer_end: transfer_id=1816 msg_id=6 protocol_id=21 seq=0 status=-110
<idle>-0 [000] 1158.339974: scmi_xfer_begin: transfer_id=1818 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [000] 1158.340035: scmi_xfer_end: transfer_id=1818 msg_id=7 protocol_id=19 seq=0 status=0
bash-1526 [004] 1158.340607: scmi_xfer_begin: transfer_id=1819 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1158.340852: scmi_xfer_end: transfer_id=1819 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1158.341180: scmi_xfer_begin: transfer_id=1820 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1158.341433: scmi_xfer_end: transfer_id=1820 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1158.341750: scmi_xfer_begin: transfer_id=1821 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1158.342012: scmi_xfer_end: transfer_id=1821 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1158.342325: scmi_xfer_begin: transfer_id=1822 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1158.342684: scmi_xfer_end: transfer_id=1822 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1158.343316: scmi_xfer_begin: transfer_id=1823 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1158.343561: scmi_xfer_end: transfer_id=1823 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1158.343897: scmi_xfer_begin: transfer_id=1824 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1158.344137: scmi_xfer_end: transfer_id=1824 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1158.344456: scmi_xfer_begin: transfer_id=1825 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1158.344725: scmi_xfer_end: transfer_id=1825 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1158.345037: scmi_xfer_begin: transfer_id=1826 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1158.345304: scmi_xfer_end: transfer_id=1826 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1158.345681: scmi_xfer_begin: transfer_id=1827 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1158.346116: scmi_xfer_end: transfer_id=1827 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1158.346426: scmi_xfer_begin: transfer_id=1828 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1158.347116: scmi_xfer_end: transfer_id=1828 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1158.347424: scmi_xfer_begin: transfer_id=1829 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1158.348039: scmi_xfer_end: transfer_id=1829 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1158.348350: scmi_xfer_begin: transfer_id=1830 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1158.348614: scmi_xfer_end: transfer_id=1830 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1158.348918: scmi_xfer_begin: transfer_id=1831 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1158.349200: scmi_xfer_end: transfer_id=1831 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1158.349514: scmi_xfer_begin: transfer_id=1832 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [004] 1158.349774: scmi_xfer_end: transfer_id=1832 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [004] 1158.350087: scmi_xfer_begin: transfer_id=1833 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1158.350297: scmi_xfer_begin: transfer_id=1834 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1158.350406: scmi_xfer_end: transfer_id=1834 msg_id=7 protocol_id=19 seq=1 status=-110
bash-1526 [004] 1158.391883: scmi_xfer_end: transfer_id=1833 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [004] 1158.393960: scmi_xfer_begin: transfer_id=1835 msg_id=7 protocol_id=19 seq=0 poll=1
bash-1526 [004] 1158.394020: scmi_xfer_end: transfer_id=1835 msg_id=7 protocol_id=19 seq=0 status=0
^ permalink raw reply
* Re: [RFC] dt-bindings: mailbox: add doorbell support to ARM MHU
From: Sudeep Holla @ 2020-06-03 18:04 UTC (permalink / raw)
To: Viresh Kumar
Cc: Rob Herring, Jassi Brar, Arnd Bergmann, Frank Rowand,
Bjorn Andersson, Vincent Guittot, linux-arm-kernel, devicetree,
Sudeep Holla, linux-kernel
In-Reply-To: <20200529040758.kneg2j4n3gxh2rfv@vireshk-i7>
On Fri, May 29, 2020 at 09:37:58AM +0530, Viresh Kumar wrote:
> On 28-05-20, 13:20, Rob Herring wrote:
> > Whether Linux
> > requires serializing mailbox accesses is a separate issue. On that side,
> > it seems silly to not allow driving the h/w in the most efficient way
> > possible.
>
> That's exactly what we are trying to say. The hardware allows us to
> write all 32 bits in parallel, without any hardware issues, why
> shouldn't we do that ? The delay (which Sudeep will find out, he is
> facing issues with hardware access because of lockdown right now)
OK, I was able to access the setup today. I couldn't reach a point
where I can do measurements as the system just became unusable with
one physical channel instead of 2 virtual channels as in my patches.
My test was simple. Switch to schedutil and read sensors periodically
via sysfs.
arm-scmi firmware:scmi: message for 1 is not expected!
arm-scmi firmware:scmi: timed out in resp(caller: scmi_sensor_reading_get+0xf4/0x120)
arm-scmi firmware:scmi: timed out in resp(caller: scmi_sensor_reading_get+0xf4/0x120)
arm-scmi firmware:scmi: message for 1 is not expected!
arm-scmi firmware:scmi: timed out in resp(caller: scmi_sensor_reading_get+0xf4/0x120)
arm-scmi firmware:scmi: message for 1 is not expected!
With trace enabled I can see even cpufreq_set timing out. Sample trace
output:
bash-1019 [005] 1149.452340: scmi_xfer_begin: transfer_id=1537 msg_id=7 protocol_id=19 seq=0 poll=1
bash-1019 [005] 1149.452407: scmi_xfer_end: transfer_id=1537 msg_id=7 protocol_id=19 seq=0 status=0
bash-1526 [000] 1149.472553: scmi_xfer_begin: transfer_id=1538 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1149.472733: scmi_xfer_begin: transfer_id=1539 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.472842: scmi_xfer_end: transfer_id=1539 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [001] 1149.483040: scmi_xfer_begin: transfer_id=1540 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.483043: scmi_xfer_end: transfer_id=1540 msg_id=7 protocol_id=19 seq=1 status=0
rs:main-543 [003] 1149.493031: scmi_xfer_begin: transfer_id=1541 msg_id=7 protocol_id=19 seq=1 poll=1
rs:main-543 [003] 1149.493047: scmi_xfer_end: transfer_id=1541 msg_id=7 protocol_id=19 seq=1 status=0
<idle>-0 [000] 1149.507033: scmi_xfer_begin: transfer_id=1542 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [000] 1149.507044: scmi_xfer_end: transfer_id=1542 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [000] 1149.516068: scmi_xfer_end: transfer_id=1538 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [000] 1149.516559: scmi_xfer_begin: transfer_id=1543 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1149.516729: scmi_xfer_begin: transfer_id=1544 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.516837: scmi_xfer_end: transfer_id=1544 msg_id=7 protocol_id=19 seq=1 status=-110
ksoftirqd/0-9 [000] 1149.519065: scmi_xfer_begin: transfer_id=1545 msg_id=7 protocol_id=19 seq=1 poll=1
ksoftirqd/0-9 [000] 1149.519072: scmi_xfer_end: transfer_id=1545 msg_id=7 protocol_id=19 seq=1 status=0
<idle>-0 [001] 1149.526878: scmi_xfer_begin: transfer_id=1546 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.526882: scmi_xfer_end: transfer_id=1546 msg_id=7 protocol_id=19 seq=1 status=0
<idle>-0 [000] 1149.551119: scmi_xfer_begin: transfer_id=1547 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [000] 1149.551138: scmi_xfer_end: transfer_id=1547 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [000] 1149.560191: scmi_xfer_end: transfer_id=1543 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [000] 1149.560690: scmi_xfer_begin: transfer_id=1548 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1149.560859: scmi_xfer_begin: transfer_id=1549 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1149.560968: scmi_xfer_end: transfer_id=1549 msg_id=7 protocol_id=19 seq=1 status=-110
protocol_id=19 is cpufreq and 21 is sensor. This is simplest test and
I can easily generate more timeouts starting some stress test with DVFS.
--
Regards,
Sudeep
^ permalink raw reply
* [PATCH v10 20/20] mtd: rawnand: Use the NAND framework user_conf object for ECC flags
From: Miquel Raynal @ 2020-06-03 17:57 UTC (permalink / raw)
To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus, linux-mtd
Cc: Boris Brezillon, Thomas Petazzoni, linux-arm-kernel, Mason Yang,
Julien Su, Rob Herring, Mark Rutland, devicetree, Miquel Raynal
In-Reply-To: <20200603175759.19948-1-miquel.raynal@bootlin.com>
Instead of storing the ECC flags in chip->ecc.options, use
nanddev->ecc.user_conf.flags.
There is currently only one to save: NAND_ECC_MAXIMIZE.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/atmel/nand-controller.c | 3 ++-
drivers/mtd/nand/raw/denali_pci.c | 2 +-
drivers/mtd/nand/raw/nand_base.c | 14 +++++++-------
drivers/mtd/nand/raw/sunxi_nand.c | 3 ++-
drivers/mtd/nand/raw/tegra_nand.c | 5 +++--
include/linux/mtd/rawnand.h | 1 -
6 files changed, 15 insertions(+), 13 deletions(-)
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 08df7f23b859..a594f5efb0a2 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1046,6 +1046,7 @@ static int atmel_nand_pmecc_init(struct nand_chip *chip)
const struct nand_ecc_props *requirements =
nanddev_get_ecc_requirements(&chip->base);
struct mtd_info *mtd = nand_to_mtd(chip);
+ struct nand_device *nanddev = mtd_to_nanddev(mtd);
struct atmel_nand *nand = to_atmel_nand(chip);
struct atmel_nand_controller *nc;
struct atmel_pmecc_user_req req;
@@ -1070,7 +1071,7 @@ static int atmel_nand_pmecc_init(struct nand_chip *chip)
chip->ecc.size = val;
}
- if (chip->ecc.options & NAND_ECC_MAXIMIZE)
+ if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH)
req.ecc.strength = ATMEL_PMECC_MAXIMIZE_ECC_STRENGTH;
else if (chip->ecc.strength)
req.ecc.strength = chip->ecc.strength;
diff --git a/drivers/mtd/nand/raw/denali_pci.c b/drivers/mtd/nand/raw/denali_pci.c
index 2f77ee55e1bf..20c085a30adc 100644
--- a/drivers/mtd/nand/raw/denali_pci.c
+++ b/drivers/mtd/nand/raw/denali_pci.c
@@ -100,7 +100,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
goto out_remove_denali;
}
- dchip->chip.ecc.options |= NAND_ECC_MAXIMIZE;
+ dchip->chip.base.ecc.user_conf.flags |= NAND_ECC_MAXIMIZE_STRENGTH;
dchip->nsels = nsels;
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 53e07f25ae65..c0d13f3b308a 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -4989,9 +4989,6 @@ static int rawnand_dt_init(struct nand_chip *chip)
if (of_get_nand_on_flash_bbt(dn))
chip->bbt_options |= NAND_BBT_USE_FLASH;
- if (of_property_read_bool(dn, "nand-ecc-maximize"))
- chip->ecc.options |= NAND_ECC_MAXIMIZE;
-
of_get_nand_ecc_user_config(nand);
of_get_nand_ecc_legacy_user_config(chip);
@@ -5122,6 +5119,7 @@ static void nand_scan_ident_cleanup(struct nand_chip *chip)
static int nand_set_ecc_soft_ops(struct nand_chip *chip)
{
struct mtd_info *mtd = nand_to_mtd(chip);
+ struct nand_device *nanddev = mtd_to_nanddev(mtd);
struct nand_ecc_ctrl *ecc = &chip->ecc;
if (WARN_ON(ecc->engine_type != NAND_ECC_ENGINE_TYPE_SOFT))
@@ -5197,7 +5195,7 @@ static int nand_set_ecc_soft_ops(struct nand_chip *chip)
* used.
*/
if (mtd->ooblayout == nand_get_large_page_ooblayout() &&
- ecc->options & NAND_ECC_MAXIMIZE) {
+ nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH) {
int steps, bytes;
/* Always prefer 1k blocks over 512bytes ones */
@@ -5437,11 +5435,12 @@ nand_maximize_ecc(struct nand_chip *chip,
* @caps: ECC engine caps info structure
* @oobavail: OOB size that the ECC engine can use
*
- * Choose the ECC configuration according to following logic
+ * Choose the ECC configuration according to following logic.
*
* 1. If both ECC step size and ECC strength are already set (usually by DT)
* then check if it is supported by this controller.
- * 2. If NAND_ECC_MAXIMIZE is set, then select maximum ECC strength.
+ * 2. If the user provided the nand-ecc-maximize property, then select maximum
+ * ECC strength.
* 3. Otherwise, try to match the ECC step size and ECC strength closest
* to the chip's requirement. If available OOB size can't fit the chip
* requirement then fallback to the maximum ECC step size and ECC strength.
@@ -5452,6 +5451,7 @@ int nand_ecc_choose_conf(struct nand_chip *chip,
const struct nand_ecc_caps *caps, int oobavail)
{
struct mtd_info *mtd = nand_to_mtd(chip);
+ struct nand_device *nanddev = mtd_to_nanddev(mtd);
if (WARN_ON(oobavail < 0 || oobavail > mtd->oobsize))
return -EINVAL;
@@ -5459,7 +5459,7 @@ int nand_ecc_choose_conf(struct nand_chip *chip,
if (chip->ecc.size && chip->ecc.strength)
return nand_check_ecc_caps(chip, caps, oobavail);
- if (chip->ecc.options & NAND_ECC_MAXIMIZE)
+ if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH)
return nand_maximize_ecc(chip, caps, oobavail);
if (!nand_match_ecc_req(chip, caps, oobavail))
diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index 490ba485e939..cbd05cea5bad 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -1609,12 +1609,13 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_chip *nand,
static const u8 strengths[] = { 16, 24, 28, 32, 40, 48, 56, 60, 64 };
struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller);
struct mtd_info *mtd = nand_to_mtd(nand);
+ struct nand_device *nanddev = mtd_to_nanddev(mtd);
struct sunxi_nand_hw_ecc *data;
int nsectors;
int ret;
int i;
- if (ecc->options & NAND_ECC_MAXIMIZE) {
+ if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH) {
int bytes;
ecc->size = 1024;
diff --git a/drivers/mtd/nand/raw/tegra_nand.c b/drivers/mtd/nand/raw/tegra_nand.c
index fecdb7e8f9e8..5c94ecbf496f 100644
--- a/drivers/mtd/nand/raw/tegra_nand.c
+++ b/drivers/mtd/nand/raw/tegra_nand.c
@@ -840,9 +840,10 @@ static int tegra_nand_get_strength(struct nand_chip *chip, const int *strength,
int strength_len, int bits_per_step,
int oobsize)
{
+ struct nand_device *base = mtd_to_nanddev(nand_to_mtd(chip));
const struct nand_ecc_props *requirements =
- nanddev_get_ecc_requirements(&chip->base);
- bool maximize = chip->ecc.options & NAND_ECC_MAXIMIZE;
+ nanddev_get_ecc_requirements(base);
+ bool maximize = base->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH;
int i;
/*
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 66f69a1d27a5..9d69fa6608ae 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -98,7 +98,6 @@ struct nand_chip;
* pages and you want to rely on the default implementation.
*/
#define NAND_ECC_GENERIC_ERASED_CHECK BIT(0)
-#define NAND_ECC_MAXIMIZE BIT(1)
/*
* Option constants for bizarre disfunctionality and real
--
2.20.1
^ permalink raw reply related
* [PATCH v10 19/20] mtd: rawnand: Use the ECC framework user input parsing bits
From: Miquel Raynal @ 2020-06-03 17:57 UTC (permalink / raw)
To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus, linux-mtd
Cc: Boris Brezillon, Thomas Petazzoni, linux-arm-kernel, Mason Yang,
Julien Su, Rob Herring, Mark Rutland, devicetree, Miquel Raynal
In-Reply-To: <20200603175759.19948-1-miquel.raynal@bootlin.com>
Many helpers are generic to all NAND chips, they should not be
raw-NAND specific, so use the generic ones.
To avoid moving all the raw NAND core "history" into the generic NAND
layer, we keep a part of this parsing in the raw NAND core to ensure
backward compatibility.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/nand_base.c | 144 +++++++++++++++----------------
include/linux/mtd/rawnand.h | 12 ---
2 files changed, 71 insertions(+), 85 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index c69d60f791d0..53e07f25ae65 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -4854,18 +4854,27 @@ static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type)
return ret;
}
-static const char * const nand_ecc_modes[] = {
- [NAND_ECC_NONE] = "none",
- [NAND_ECC_SOFT] = "soft",
- [NAND_ECC_HW] = "hw",
- [NAND_ECC_HW_SYNDROME] = "hw_syndrome",
- [NAND_ECC_ON_DIE] = "on-die",
-};
-
static enum nand_ecc_engine_type
-of_get_nand_ecc_engine_type(struct device_node *np)
+of_get_rawnand_ecc_engine_type_legacy(struct device_node *np)
{
- enum nand_ecc_mode eng_type;
+ enum nand_ecc_legacy_mode {
+ NAND_ECC_INVALID,
+ NAND_ECC_NONE,
+ NAND_ECC_SOFT,
+ NAND_ECC_SOFT_BCH,
+ NAND_ECC_HW,
+ NAND_ECC_HW_SYNDROME,
+ NAND_ECC_ON_DIE,
+ };
+ const char * const nand_ecc_legacy_modes[] = {
+ [NAND_ECC_NONE] = "none",
+ [NAND_ECC_SOFT] = "soft",
+ [NAND_ECC_SOFT_BCH] = "soft_bch",
+ [NAND_ECC_HW] = "hw",
+ [NAND_ECC_HW_SYNDROME] = "hw_syndrome",
+ [NAND_ECC_ON_DIE] = "on-die",
+ };
+ enum nand_ecc_legacy_mode eng_type;
const char *pm;
int err;
@@ -4874,12 +4883,13 @@ of_get_nand_ecc_engine_type(struct device_node *np)
return NAND_ECC_ENGINE_TYPE_INVALID;
for (eng_type = NAND_ECC_NONE;
- eng_type < ARRAY_SIZE(nand_ecc_modes); eng_type++) {
- if (!strcasecmp(pm, nand_ecc_modes[eng_type])) {
+ eng_type < ARRAY_SIZE(nand_ecc_legacy_modes); eng_type++) {
+ if (!strcasecmp(pm, nand_ecc_legacy_modes[eng_type])) {
switch (eng_type) {
case NAND_ECC_NONE:
return NAND_ECC_ENGINE_TYPE_NONE;
case NAND_ECC_SOFT:
+ case NAND_ECC_SOFT_BCH:
return NAND_ECC_ENGINE_TYPE_SOFT;
case NAND_ECC_HW:
case NAND_ECC_HW_SYNDROME:
@@ -4892,43 +4902,29 @@ of_get_nand_ecc_engine_type(struct device_node *np)
}
}
- /*
- * For backward compatibility we support few obsoleted values that don't
- * have their mappings into the nand_ecc_engine_providers enum anymore
- * (they were merged with other enums).
- */
- if (!strcasecmp(pm, "soft_bch"))
- return NAND_ECC_ENGINE_TYPE_SOFT;
-
return NAND_ECC_ENGINE_TYPE_INVALID;
}
-static const char * const nand_ecc_algos[] = {
- [NAND_ECC_ALGO_HAMMING] = "hamming",
- [NAND_ECC_ALGO_BCH] = "bch",
- [NAND_ECC_ALGO_RS] = "rs",
-};
-
-static enum nand_ecc_algo of_get_nand_ecc_algo(struct device_node *np)
+enum nand_ecc_placement
+of_get_rawnand_ecc_placement_legacy(struct device_node *np)
{
- enum nand_ecc_algo ecc_algo;
const char *pm;
int err;
- err = of_property_read_string(np, "nand-ecc-algo", &pm);
+ err = of_property_read_string(np, "nand-ecc-mode", &pm);
if (!err) {
- for (ecc_algo = NAND_ECC_ALGO_HAMMING;
- ecc_algo < ARRAY_SIZE(nand_ecc_algos);
- ecc_algo++) {
- if (!strcasecmp(pm, nand_ecc_algos[ecc_algo]))
- return ecc_algo;
- }
+ if (!strcasecmp(pm, "hw_syndrome"))
+ return NAND_ECC_PLACEMENT_INTERLEAVED;
}
- /*
- * For backward compatibility we also read "nand-ecc-mode" checking
- * for some obsoleted values that were specifying ECC algorithm.
- */
+ return NAND_ECC_PLACEMENT_UNKNOWN;
+}
+
+static enum nand_ecc_algo of_get_rawnand_ecc_algo_legacy(struct device_node *np)
+{
+ const char *pm;
+ int err;
+
err = of_property_read_string(np, "nand-ecc-mode", &pm);
if (!err) {
if (!strcasecmp(pm, "soft"))
@@ -4940,22 +4936,19 @@ static enum nand_ecc_algo of_get_nand_ecc_algo(struct device_node *np)
return NAND_ECC_ALGO_UNKNOWN;
}
-static int of_get_nand_ecc_step_size(struct device_node *np)
+static void of_get_nand_ecc_legacy_user_config(struct nand_chip *chip)
{
- int ret;
- u32 val;
+ struct device_node *dn = nand_get_flash_node(chip);
+ struct nand_ecc_props *user_conf = &chip->base.ecc.user_conf;
- ret = of_property_read_u32(np, "nand-ecc-step-size", &val);
- return ret ? ret : val;
-}
+ if (user_conf->engine_type != NAND_ECC_ENGINE_TYPE_INVALID)
+ user_conf->engine_type = of_get_rawnand_ecc_engine_type_legacy(dn);
-static int of_get_nand_ecc_strength(struct device_node *np)
-{
- int ret;
- u32 val;
+ if (user_conf->algo != NAND_ECC_ALGO_UNKNOWN)
+ user_conf->algo = of_get_rawnand_ecc_algo_legacy(dn);
- ret = of_property_read_u32(np, "nand-ecc-strength", &val);
- return ret ? ret : val;
+ if (user_conf->placement != NAND_ECC_PLACEMENT_UNKNOWN)
+ user_conf->placement = of_get_rawnand_ecc_placement_legacy(dn);
}
static int of_get_nand_bus_width(struct device_node *np)
@@ -4979,12 +4972,10 @@ static bool of_get_nand_on_flash_bbt(struct device_node *np)
return of_property_read_bool(np, "nand-on-flash-bbt");
}
-static int nand_dt_init(struct nand_chip *chip)
+static int rawnand_dt_init(struct nand_chip *chip)
{
+ struct nand_device *nand = mtd_to_nanddev(nand_to_mtd(chip));
struct device_node *dn = nand_get_flash_node(chip);
- enum nand_ecc_engine_type ecc_type;
- enum nand_ecc_algo ecc_algo;
- int ecc_strength, ecc_step;
if (!dn)
return 0;
@@ -4998,26 +4989,33 @@ static int nand_dt_init(struct nand_chip *chip)
if (of_get_nand_on_flash_bbt(dn))
chip->bbt_options |= NAND_BBT_USE_FLASH;
- ecc_type = of_get_nand_ecc_engine_type(dn);
- ecc_algo = of_get_nand_ecc_algo(dn);
- ecc_strength = of_get_nand_ecc_strength(dn);
- ecc_step = of_get_nand_ecc_step_size(dn);
-
- if (ecc_type != NAND_ECC_ENGINE_TYPE_INVALID)
- chip->ecc.engine_type = ecc_type;
-
- if (ecc_algo != NAND_ECC_ALGO_UNKNOWN)
- chip->ecc.algo = ecc_algo;
-
- if (ecc_strength >= 0)
- chip->ecc.strength = ecc_strength;
-
- if (ecc_step > 0)
- chip->ecc.size = ecc_step;
-
if (of_property_read_bool(dn, "nand-ecc-maximize"))
chip->ecc.options |= NAND_ECC_MAXIMIZE;
+ of_get_nand_ecc_user_config(nand);
+ of_get_nand_ecc_legacy_user_config(chip);
+
+ /*
+ * If neither the user nor the NAND controller have requested a specific
+ * ECC engine type, we will default to NAND_ECC_ENGINE_TYPE_ON_HOST.
+ */
+ nand->ecc.defaults.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
+
+ /*
+ * Use the user requested engine type, unless there is none, in this
+ * case default to the NAND controller choice, otherwise fallback to
+ * the raw NAND default one.
+ */
+ if (nand->ecc.user_conf.engine_type != NAND_ECC_ENGINE_TYPE_INVALID)
+ chip->ecc.engine_type = nand->ecc.user_conf.engine_type;
+ if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_INVALID)
+ chip->ecc.engine_type = nand->ecc.defaults.engine_type;
+
+ chip->ecc.placement = nand->ecc.user_conf.placement;
+ chip->ecc.algo = nand->ecc.user_conf.algo;
+ chip->ecc.strength = nand->ecc.user_conf.strength;
+ chip->ecc.size = nand->ecc.user_conf.step_size;
+
return 0;
}
@@ -5054,7 +5052,7 @@ static int nand_scan_ident(struct nand_chip *chip, unsigned int maxchips,
/* Enforce the right timings for reset/detection */
onfi_fill_data_interface(chip, NAND_SDR_IFACE, 0);
- ret = nand_dt_init(chip);
+ ret = rawnand_dt_init(chip);
if (ret)
return ret;
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index af02eb07207e..66f69a1d27a5 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -81,18 +81,6 @@ struct nand_chip;
#define NAND_DATA_IFACE_CHECK_ONLY -1
-/*
- * Constants for ECC_MODES
- */
-enum nand_ecc_mode {
- NAND_ECC_INVALID,
- NAND_ECC_NONE,
- NAND_ECC_SOFT,
- NAND_ECC_HW,
- NAND_ECC_HW_SYNDROME,
- NAND_ECC_ON_DIE,
-};
-
/*
* Constants for Hardware ECC
*/
--
2.20.1
^ permalink raw reply related
* [PATCH v10 18/20] mtd: rawnand: Use the ECC framework nand_ecc_is_strong_enough() helper
From: Miquel Raynal @ 2020-06-03 17:57 UTC (permalink / raw)
To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus, linux-mtd
Cc: Boris Brezillon, Thomas Petazzoni, linux-arm-kernel, Mason Yang,
Julien Su, Rob Herring, Mark Rutland, devicetree, Miquel Raynal
In-Reply-To: <20200603175759.19948-1-miquel.raynal@bootlin.com>
Plus, the new helper has a more "english" name.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/nand_base.c | 39 +-------------------------------
1 file changed, 1 insertion(+), 38 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index d3e1fc944179..c69d60f791d0 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -5471,43 +5471,6 @@ int nand_ecc_choose_conf(struct nand_chip *chip,
}
EXPORT_SYMBOL_GPL(nand_ecc_choose_conf);
-/*
- * Check if the chip configuration meet the datasheet requirements.
-
- * If our configuration corrects A bits per B bytes and the minimum
- * required correction level is X bits per Y bytes, then we must ensure
- * both of the following are true:
- *
- * (1) A / B >= X / Y
- * (2) A >= X
- *
- * Requirement (1) ensures we can correct for the required bitflip density.
- * Requirement (2) ensures we can correct even when all bitflips are clumped
- * in the same sector.
- */
-static bool nand_ecc_strength_good(struct nand_chip *chip)
-{
- struct mtd_info *mtd = nand_to_mtd(chip);
- struct nand_ecc_ctrl *ecc = &chip->ecc;
- const struct nand_ecc_props *requirements =
- nanddev_get_ecc_requirements(&chip->base);
- int corr, ds_corr;
-
- if (ecc->size == 0 || requirements->step_size == 0)
- /* Not enough information */
- return true;
-
- /*
- * We get the number of corrected bits per page to compare
- * the correction density.
- */
- corr = (mtd->writesize * ecc->strength) / ecc->size;
- ds_corr = (mtd->writesize * requirements->strength) /
- requirements->step_size;
-
- return corr >= ds_corr && ecc->strength >= requirements->strength;
-}
-
static int rawnand_erase(struct nand_device *nand, const struct nand_pos *pos)
{
struct nand_chip *chip = container_of(nand, struct nand_chip,
@@ -5790,7 +5753,7 @@ static int nand_scan_tail(struct nand_chip *chip)
mtd->oobavail = ret;
/* ECC sanity check: warn if it's too weak */
- if (!nand_ecc_strength_good(chip))
+ if (!nand_ecc_is_strong_enough(&chip->base))
pr_warn("WARNING: %s: the ECC used on your system (%db/%dB) is too weak compared to the one required by the NAND chip (%db/%dB)\n",
mtd->name, chip->ecc.strength, chip->ecc.size,
nanddev_get_ecc_requirements(&chip->base)->strength,
--
2.20.1
^ permalink raw reply related
* [PATCH v10 17/20] mtd: rawnand: Use the ECC framework OOB layouts
From: Miquel Raynal @ 2020-06-03 17:57 UTC (permalink / raw)
To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus, linux-mtd
Cc: Boris Brezillon, Thomas Petazzoni, linux-arm-kernel, Mason Yang,
Julien Su, Rob Herring, Mark Rutland, devicetree, Miquel Raynal
In-Reply-To: <20200603175759.19948-1-miquel.raynal@bootlin.com>
No need to have our own in the raw NAND core.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/arasan-nand-controller.c | 2 +-
drivers/mtd/nand/raw/atmel/nand-controller.c | 2 +-
drivers/mtd/nand/raw/davinci_nand.c | 3 +-
.../mtd/nand/raw/ingenic/ingenic_nand_drv.c | 6 +-
drivers/mtd/nand/raw/nand_base.c | 171 +-----------------
drivers/mtd/nand/raw/nand_toshiba.c | 2 +-
drivers/mtd/nand/raw/vf610_nfc.c | 2 +-
include/linux/mtd/rawnand.h | 4 +-
8 files changed, 16 insertions(+), 176 deletions(-)
diff --git a/drivers/mtd/nand/raw/arasan-nand-controller.c b/drivers/mtd/nand/raw/arasan-nand-controller.c
index a0b5c539ca73..6fe61393bd26 100644
--- a/drivers/mtd/nand/raw/arasan-nand-controller.c
+++ b/drivers/mtd/nand/raw/arasan-nand-controller.c
@@ -980,7 +980,7 @@ static int anfc_init_hw_ecc_controller(struct arasan_nfc *nfc,
return -EINVAL;
}
- mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
+ mtd_set_ooblayout(mtd, nand_get_large_page_ooblayout());
ecc->steps = mtd->writesize / ecc->size;
ecc->algo = NAND_ECC_ALGO_BCH;
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 3fba91d7991a..08df7f23b859 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1108,7 +1108,7 @@ static int atmel_nand_pmecc_init(struct nand_chip *chip)
chip->options |= NAND_NO_SUBPAGE_WRITE;
- mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
+ mtd_set_ooblayout(mtd, nand_get_large_page_ooblayout());
return 0;
}
diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c
index 58966a9706b1..427f320fb79b 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -645,7 +645,8 @@ static int davinci_nand_attach_chip(struct nand_chip *chip)
mtd_set_ooblayout(mtd,
&hwecc4_small_ooblayout_ops);
} else if (chunks == 4 || chunks == 8) {
- mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
+ mtd_set_ooblayout(mtd,
+ nand_get_large_page_ooblayout());
info->chip.ecc.read_page = nand_davinci_read_page_hwecc_oob_first;
} else {
return -EIO;
diff --git a/drivers/mtd/nand/raw/ingenic/ingenic_nand_drv.c b/drivers/mtd/nand/raw/ingenic/ingenic_nand_drv.c
index 70309f18124c..0e9d426fe4f2 100644
--- a/drivers/mtd/nand/raw/ingenic/ingenic_nand_drv.c
+++ b/drivers/mtd/nand/raw/ingenic/ingenic_nand_drv.c
@@ -243,8 +243,10 @@ static int ingenic_nand_attach_chip(struct nand_chip *chip)
/* For legacy reasons we use a different layout on the qi,lb60 board. */
if (of_machine_is_compatible("qi,lb60"))
mtd_set_ooblayout(mtd, &qi_lb60_ooblayout_ops);
- else
+ else if (nfc->soc_info->oob_layout)
mtd_set_ooblayout(mtd, nfc->soc_info->oob_layout);
+ else
+ mtd_set_ooblayout(mtd, nand_get_large_page_ooblayout());
return 0;
}
@@ -532,7 +534,6 @@ static const struct jz_soc_info jz4740_soc_info = {
.data_offset = 0x00000000,
.cmd_offset = 0x00008000,
.addr_offset = 0x00010000,
- .oob_layout = &nand_ooblayout_lp_ops,
};
static const struct jz_soc_info jz4725b_soc_info = {
@@ -546,7 +547,6 @@ static const struct jz_soc_info jz4780_soc_info = {
.data_offset = 0x00000000,
.cmd_offset = 0x00400000,
.addr_offset = 0x00800000,
- .oob_layout = &nand_ooblayout_lp_ops,
};
static const struct of_device_id ingenic_nand_dt_match[] = {
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index aea78642d722..d3e1fc944179 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -46,166 +46,6 @@
#include "internals.h"
-/* Define default oob placement schemes for large and small page devices */
-static int nand_ooblayout_ecc_sp(struct mtd_info *mtd, int section,
- struct mtd_oob_region *oobregion)
-{
- struct nand_chip *chip = mtd_to_nand(mtd);
- struct nand_ecc_ctrl *ecc = &chip->ecc;
-
- if (section > 1)
- return -ERANGE;
-
- if (!section) {
- oobregion->offset = 0;
- if (mtd->oobsize == 16)
- oobregion->length = 4;
- else
- oobregion->length = 3;
- } else {
- if (mtd->oobsize == 8)
- return -ERANGE;
-
- oobregion->offset = 6;
- oobregion->length = ecc->total - 4;
- }
-
- return 0;
-}
-
-static int nand_ooblayout_free_sp(struct mtd_info *mtd, int section,
- struct mtd_oob_region *oobregion)
-{
- if (section > 1)
- return -ERANGE;
-
- if (mtd->oobsize == 16) {
- if (section)
- return -ERANGE;
-
- oobregion->length = 8;
- oobregion->offset = 8;
- } else {
- oobregion->length = 2;
- if (!section)
- oobregion->offset = 3;
- else
- oobregion->offset = 6;
- }
-
- return 0;
-}
-
-const struct mtd_ooblayout_ops nand_ooblayout_sp_ops = {
- .ecc = nand_ooblayout_ecc_sp,
- .free = nand_ooblayout_free_sp,
-};
-EXPORT_SYMBOL_GPL(nand_ooblayout_sp_ops);
-
-static int nand_ooblayout_ecc_lp(struct mtd_info *mtd, int section,
- struct mtd_oob_region *oobregion)
-{
- struct nand_chip *chip = mtd_to_nand(mtd);
- struct nand_ecc_ctrl *ecc = &chip->ecc;
-
- if (section || !ecc->total)
- return -ERANGE;
-
- oobregion->length = ecc->total;
- oobregion->offset = mtd->oobsize - oobregion->length;
-
- return 0;
-}
-
-static int nand_ooblayout_free_lp(struct mtd_info *mtd, int section,
- struct mtd_oob_region *oobregion)
-{
- struct nand_chip *chip = mtd_to_nand(mtd);
- struct nand_ecc_ctrl *ecc = &chip->ecc;
-
- if (section)
- return -ERANGE;
-
- oobregion->length = mtd->oobsize - ecc->total - 2;
- oobregion->offset = 2;
-
- return 0;
-}
-
-const struct mtd_ooblayout_ops nand_ooblayout_lp_ops = {
- .ecc = nand_ooblayout_ecc_lp,
- .free = nand_ooblayout_free_lp,
-};
-EXPORT_SYMBOL_GPL(nand_ooblayout_lp_ops);
-
-/*
- * Support the old "large page" layout used for 1-bit Hamming ECC where ECC
- * are placed at a fixed offset.
- */
-static int nand_ooblayout_ecc_lp_hamming(struct mtd_info *mtd, int section,
- struct mtd_oob_region *oobregion)
-{
- struct nand_chip *chip = mtd_to_nand(mtd);
- struct nand_ecc_ctrl *ecc = &chip->ecc;
-
- if (section)
- return -ERANGE;
-
- switch (mtd->oobsize) {
- case 64:
- oobregion->offset = 40;
- break;
- case 128:
- oobregion->offset = 80;
- break;
- default:
- return -EINVAL;
- }
-
- oobregion->length = ecc->total;
- if (oobregion->offset + oobregion->length > mtd->oobsize)
- return -ERANGE;
-
- return 0;
-}
-
-static int nand_ooblayout_free_lp_hamming(struct mtd_info *mtd, int section,
- struct mtd_oob_region *oobregion)
-{
- struct nand_chip *chip = mtd_to_nand(mtd);
- struct nand_ecc_ctrl *ecc = &chip->ecc;
- int ecc_offset = 0;
-
- if (section < 0 || section > 1)
- return -ERANGE;
-
- switch (mtd->oobsize) {
- case 64:
- ecc_offset = 40;
- break;
- case 128:
- ecc_offset = 80;
- break;
- default:
- return -EINVAL;
- }
-
- if (section == 0) {
- oobregion->offset = 2;
- oobregion->length = ecc_offset - 2;
- } else {
- oobregion->offset = ecc_offset + ecc->total;
- oobregion->length = mtd->oobsize - oobregion->offset;
- }
-
- return 0;
-}
-
-static const struct mtd_ooblayout_ops nand_ooblayout_lp_hamming_ops = {
- .ecc = nand_ooblayout_ecc_lp_hamming,
- .free = nand_ooblayout_free_lp_hamming,
-};
-
static int nand_pairing_dist3_get_info(struct mtd_info *mtd, int page,
struct mtd_pairing_info *info)
{
@@ -5349,7 +5189,7 @@ static int nand_set_ecc_soft_ops(struct nand_chip *chip)
return -EINVAL;
}
- mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
+ mtd_set_ooblayout(mtd, nand_get_large_page_ooblayout());
}
@@ -5358,7 +5198,7 @@ static int nand_set_ecc_soft_ops(struct nand_chip *chip)
* used, otherwise we don't know how many bytes can really be
* used.
*/
- if (mtd->ooblayout == &nand_ooblayout_lp_ops &&
+ if (mtd->ooblayout == nand_get_large_page_ooblayout() &&
ecc->options & NAND_ECC_MAXIMIZE) {
int steps, bytes;
@@ -5760,11 +5600,12 @@ static int nand_scan_tail(struct nand_chip *chip)
switch (mtd->oobsize) {
case 8:
case 16:
- mtd_set_ooblayout(mtd, &nand_ooblayout_sp_ops);
+ mtd_set_ooblayout(mtd, nand_get_small_page_ooblayout());
break;
case 64:
case 128:
- mtd_set_ooblayout(mtd, &nand_ooblayout_lp_hamming_ops);
+ mtd_set_ooblayout(mtd,
+ nand_get_large_page_hamming_ooblayout());
break;
default:
/*
@@ -5776,7 +5617,7 @@ static int nand_scan_tail(struct nand_chip *chip)
*/
if (ecc->engine_type == NAND_ECC_ENGINE_TYPE_NONE) {
mtd_set_ooblayout(mtd,
- &nand_ooblayout_lp_ops);
+ nand_get_large_page_ooblayout());
break;
}
diff --git a/drivers/mtd/nand/raw/nand_toshiba.c b/drivers/mtd/nand/raw/nand_toshiba.c
index 5d3434587f25..7a3c2b16ff93 100644
--- a/drivers/mtd/nand/raw/nand_toshiba.c
+++ b/drivers/mtd/nand/raw/nand_toshiba.c
@@ -140,7 +140,7 @@ static void toshiba_nand_benand_init(struct nand_chip *chip)
chip->options |= NAND_SUBPAGE_READ;
- mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
+ mtd_set_ooblayout(mtd, nand_get_large_page_ooblayout());
}
static void toshiba_nand_decode_id(struct nand_chip *chip)
diff --git a/drivers/mtd/nand/raw/vf610_nfc.c b/drivers/mtd/nand/raw/vf610_nfc.c
index 8ee2c1f539c4..50dc0c93140c 100644
--- a/drivers/mtd/nand/raw/vf610_nfc.c
+++ b/drivers/mtd/nand/raw/vf610_nfc.c
@@ -779,7 +779,7 @@ static int vf610_nfc_attach_chip(struct nand_chip *chip)
mtd->oobsize = 64;
/* Use default large page ECC layout defined in NAND core */
- mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
+ mtd_set_ooblayout(mtd, nand_get_large_page_ooblayout());
if (chip->ecc.strength == 32) {
nfc->ecc_mode = ECC_60_BYTE;
chip->ecc.bytes = 60;
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 8f7f1cce3b4b..af02eb07207e 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -14,6 +14,7 @@
#define __LINUX_MTD_RAWNAND_H
#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
#include <linux/mtd/flashchip.h>
#include <linux/mtd/bbm.h>
#include <linux/mtd/jedec.h>
@@ -1159,9 +1160,6 @@ struct nand_chip {
int (*unlock_area)(struct nand_chip *chip, loff_t ofs, uint64_t len);
};
-extern const struct mtd_ooblayout_ops nand_ooblayout_sp_ops;
-extern const struct mtd_ooblayout_ops nand_ooblayout_lp_ops;
-
static inline struct nand_chip *mtd_to_nand(struct mtd_info *mtd)
{
return container_of(mtd, struct nand_chip, base.mtd);
--
2.20.1
^ permalink raw reply related
* [PATCH v10 16/20] mtd: rawnand: Make use of the ECC framework
From: Miquel Raynal @ 2020-06-03 17:57 UTC (permalink / raw)
To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus, linux-mtd
Cc: Boris Brezillon, Thomas Petazzoni, linux-arm-kernel, Mason Yang,
Julien Su, Rob Herring, Mark Rutland, devicetree, Miquel Raynal
In-Reply-To: <20200603175759.19948-1-miquel.raynal@bootlin.com>
Just enable the ECC framework with raw NAND so that we can drop, one
by one, all the unnecessary/redundant definitions.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/Kconfig | 1 +
drivers/mtd/nand/raw/nand_base.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 85280e327bfe..6ab3184ca8eb 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -13,6 +13,7 @@ config MTD_NAND_ECC_SW_HAMMING_SMC
menuconfig MTD_RAW_NAND
tristate "Raw/Parallel NAND Device Support"
select MTD_NAND_CORE
+ select MTD_NAND_ECC
select MTD_NAND_ECC_SW_HAMMING
help
This enables support for accessing all type of raw/parallel
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index d22f4243d715..aea78642d722 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -34,6 +34,7 @@
#include <linux/mm.h>
#include <linux/types.h>
#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/nand_bch.h>
#include <linux/interrupt.h>
--
2.20.1
^ permalink raw reply related
* [PATCH v10 10/20] mtd: rawnand: Use the new ECC engine type enumeration
From: Miquel Raynal @ 2020-06-03 17:57 UTC (permalink / raw)
To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus, linux-mtd
Cc: Boris Brezillon, Thomas Petazzoni, linux-arm-kernel, Mason Yang,
Julien Su, Rob Herring, Mark Rutland, devicetree, Miquel Raynal
In-Reply-To: <20200603175759.19948-1-miquel.raynal@bootlin.com>
Mechanical switch from the legacy "mode" enumeration to the new
"engine type" enumeration in drivers and board files.
The device tree parsing is also updated to return the new enumeration
from the old strings.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
---
arch/arm/mach-davinci/board-da830-evm.c | 2 +-
arch/arm/mach-davinci/board-da850-evm.c | 2 +-
arch/arm/mach-davinci/board-dm355-evm.c | 2 +-
arch/arm/mach-davinci/board-dm355-leopard.c | 2 +-
arch/arm/mach-davinci/board-dm365-evm.c | 2 +-
arch/arm/mach-davinci/board-dm644x-evm.c | 2 +-
arch/arm/mach-davinci/board-dm646x-evm.c | 2 +-
arch/arm/mach-davinci/board-mityomapl138.c | 2 +-
arch/arm/mach-davinci/board-neuros-osd2.c | 2 +-
arch/arm/mach-davinci/board-omapl138-hawk.c | 2 +-
arch/arm/mach-s3c24xx/common-smdk.c | 2 +-
arch/arm/mach-s3c24xx/mach-anubis.c | 2 +-
arch/arm/mach-s3c24xx/mach-at2440evb.c | 2 +-
arch/arm/mach-s3c24xx/mach-bast.c | 2 +-
arch/arm/mach-s3c24xx/mach-gta02.c | 2 +-
arch/arm/mach-s3c24xx/mach-jive.c | 2 +-
arch/arm/mach-s3c24xx/mach-mini2440.c | 2 +-
arch/arm/mach-s3c24xx/mach-osiris.c | 2 +-
arch/arm/mach-s3c24xx/mach-qt2410.c | 2 +-
arch/arm/mach-s3c24xx/mach-rx1950.c | 2 +-
arch/arm/mach-s3c24xx/mach-rx3715.c | 2 +-
arch/arm/mach-s3c24xx/mach-vstms.c | 2 +-
arch/arm/mach-s3c64xx/mach-hmt.c | 2 +-
arch/arm/mach-s3c64xx/mach-mini6410.c | 2 +-
arch/arm/mach-s3c64xx/mach-real6410.c | 2 +-
drivers/mtd/nand/raw/ams-delta.c | 2 +-
drivers/mtd/nand/raw/arasan-nand-controller.c | 12 +--
drivers/mtd/nand/raw/atmel/nand-controller.c | 14 ++--
drivers/mtd/nand/raw/au1550nd.c | 2 +-
.../mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c | 3 +-
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 8 +-
.../mtd/nand/raw/cadence-nand-controller.c | 4 +-
drivers/mtd/nand/raw/cafe_nand.c | 2 +-
drivers/mtd/nand/raw/cs553x_nand.c | 2 +-
drivers/mtd/nand/raw/davinci_nand.c | 24 +++---
drivers/mtd/nand/raw/denali.c | 2 +-
drivers/mtd/nand/raw/diskonchip.c | 2 +-
drivers/mtd/nand/raw/fsl_elbc_nand.c | 18 ++---
drivers/mtd/nand/raw/fsl_ifc_nand.c | 10 +--
drivers/mtd/nand/raw/fsl_upm.c | 2 +-
drivers/mtd/nand/raw/fsmc_nand.c | 12 +--
drivers/mtd/nand/raw/gpio.c | 2 +-
drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 2 +-
drivers/mtd/nand/raw/hisi504_nand.c | 6 +-
.../mtd/nand/raw/ingenic/ingenic_nand_drv.c | 14 ++--
drivers/mtd/nand/raw/lpc32xx_mlc.c | 2 +-
drivers/mtd/nand/raw/lpc32xx_slc.c | 2 +-
drivers/mtd/nand/raw/marvell_nand.c | 17 ++--
drivers/mtd/nand/raw/meson_nand.c | 2 +-
drivers/mtd/nand/raw/mpc5121_nfc.c | 2 +-
drivers/mtd/nand/raw/mtk_nand.c | 6 +-
drivers/mtd/nand/raw/mxc_nand.c | 23 +++---
drivers/mtd/nand/raw/nand_base.c | 78 ++++++++++++-------
drivers/mtd/nand/raw/nand_micron.c | 4 +-
drivers/mtd/nand/raw/nand_toshiba.c | 3 +-
drivers/mtd/nand/raw/nandsim.c | 4 +-
drivers/mtd/nand/raw/ndfc.c | 2 +-
drivers/mtd/nand/raw/omap2.c | 20 ++---
drivers/mtd/nand/raw/orion_nand.c | 2 +-
drivers/mtd/nand/raw/pasemi_nand.c | 2 +-
drivers/mtd/nand/raw/plat_nand.c | 2 +-
drivers/mtd/nand/raw/qcom_nandc.c | 2 +-
drivers/mtd/nand/raw/r852.c | 2 +-
drivers/mtd/nand/raw/s3c2410.c | 18 ++---
drivers/mtd/nand/raw/sh_flctl.c | 4 +-
drivers/mtd/nand/raw/sharpsl.c | 2 +-
drivers/mtd/nand/raw/socrates_nand.c | 3 +-
drivers/mtd/nand/raw/stm32_fmc2_nand.c | 9 ++-
drivers/mtd/nand/raw/sunxi_nand.c | 18 ++---
drivers/mtd/nand/raw/tango_nand.c | 2 +-
drivers/mtd/nand/raw/tegra_nand.c | 2 +-
drivers/mtd/nand/raw/tmio_nand.c | 2 +-
drivers/mtd/nand/raw/txx9ndfmc.c | 2 +-
drivers/mtd/nand/raw/vf610_nfc.c | 4 +-
drivers/mtd/nand/raw/xway_nand.c | 2 +-
include/linux/mtd/rawnand.h | 4 +-
include/linux/platform_data/mtd-davinci.h | 8 +-
.../linux/platform_data/mtd-nand-s3c2410.h | 2 +-
78 files changed, 238 insertions(+), 212 deletions(-)
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index a273ab25c668..3b16a31da8b7 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -306,7 +306,7 @@ static struct davinci_nand_pdata da830_evm_nand_pdata = {
.core_chipsel = 1,
.parts = da830_evm_nand_partitions,
.nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
- .ecc_mode = NAND_ECC_HW,
+ .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST,
.ecc_bits = 4,
.bbt_options = NAND_BBT_USE_FLASH,
.bbt_td = &da830_evm_nand_bbt_main_descr,
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 5b3549f1236c..6b96065c015a 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -239,7 +239,7 @@ static struct davinci_nand_pdata da850_evm_nandflash_data = {
.core_chipsel = 1,
.parts = da850_evm_nandflash_partition,
.nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
- .ecc_mode = NAND_ECC_HW,
+ .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST,
.ecc_bits = 4,
.bbt_options = NAND_BBT_USE_FLASH,
.timing = &da850_evm_nandflash_timing,
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index 5113273fda69..3c5a9e3c128a 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -82,7 +82,7 @@ static struct davinci_nand_pdata davinci_nand_data = {
.mask_chipsel = BIT(14),
.parts = davinci_nand_partitions,
.nr_parts = ARRAY_SIZE(davinci_nand_partitions),
- .ecc_mode = NAND_ECC_HW,
+ .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST,
.bbt_options = NAND_BBT_USE_FLASH,
.ecc_bits = 4,
};
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index 4c8a592754ac..e475b2113e70 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -76,7 +76,7 @@ static struct davinci_nand_pdata davinci_nand_data = {
.mask_chipsel = BIT(14),
.parts = davinci_nand_partitions,
.nr_parts = ARRAY_SIZE(davinci_nand_partitions),
- .ecc_mode = NAND_HW_ECC_ENGINE,
+ .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST,
.ecc_placement = NAND_ECC_PLACEMENT_INTERLEAVED,
.ecc_bits = 4,
.bbt_options = NAND_BBT_USE_FLASH,
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 2328b15ac067..bdf31eb77620 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -146,7 +146,7 @@ static struct davinci_nand_pdata davinci_nand_data = {
.mask_chipsel = BIT(14),
.parts = davinci_nand_partitions,
.nr_parts = ARRAY_SIZE(davinci_nand_partitions),
- .ecc_mode = NAND_ECC_HW,
+ .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST,
.bbt_options = NAND_BBT_USE_FLASH,
.ecc_bits = 4,
};
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 3461d12bbfc0..457ed8dd57d8 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -162,7 +162,7 @@ static struct davinci_nand_pdata davinci_evm_nandflash_data = {
.core_chipsel = 0,
.parts = davinci_evm_nandflash_partition,
.nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
- .ecc_mode = NAND_ECC_HW,
+ .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST,
.ecc_bits = 1,
.bbt_options = NAND_BBT_USE_FLASH,
.timing = &davinci_evm_nandflash_timing,
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 4600b617f9b4..0d55661e7a1f 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -91,7 +91,7 @@ static struct davinci_nand_pdata davinci_nand_data = {
.mask_ale = 0x40000,
.parts = davinci_nand_partitions,
.nr_parts = ARRAY_SIZE(davinci_nand_partitions),
- .ecc_mode = NAND_ECC_HW,
+ .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST,
.ecc_bits = 1,
.options = 0,
};
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index dfce421c0579..0c156fd18465 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -432,7 +432,7 @@ static struct davinci_nand_pdata mityomapl138_nandflash_data = {
.core_chipsel = 1,
.parts = mityomapl138_nandflash_partition,
.nr_parts = ARRAY_SIZE(mityomapl138_nandflash_partition),
- .ecc_mode = NAND_ECC_HW,
+ .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST,
.bbt_options = NAND_BBT_USE_FLASH,
.options = NAND_BUSWIDTH_16,
.ecc_bits = 1, /* 4 bit mode is not supported with 16 bit NAND */
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index ce99f782811a..cb1ff8edc73d 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -90,7 +90,7 @@ static struct davinci_nand_pdata davinci_ntosd2_nandflash_data = {
.core_chipsel = 0,
.parts = davinci_ntosd2_nandflash_partition,
.nr_parts = ARRAY_SIZE(davinci_ntosd2_nandflash_partition),
- .ecc_mode = NAND_ECC_HW,
+ .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST,
.ecc_bits = 1,
.bbt_options = NAND_BBT_USE_FLASH,
};
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 5390a8630cf0..2c45ae392485 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -206,7 +206,7 @@ static struct davinci_nand_pdata omapl138_hawk_nandflash_data = {
.core_chipsel = 1,
.parts = omapl138_hawk_nandflash_partition,
.nr_parts = ARRAY_SIZE(omapl138_hawk_nandflash_partition),
- .ecc_mode = NAND_ECC_HW,
+ .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST,
.ecc_bits = 4,
.bbt_options = NAND_BBT_USE_FLASH,
.options = NAND_BUSWIDTH_16,
diff --git a/arch/arm/mach-s3c24xx/common-smdk.c b/arch/arm/mach-s3c24xx/common-smdk.c
index 58e30cad386c..f845bd5ede54 100644
--- a/arch/arm/mach-s3c24xx/common-smdk.c
+++ b/arch/arm/mach-s3c24xx/common-smdk.c
@@ -166,7 +166,7 @@ static struct s3c2410_platform_nand smdk_nand_info = {
.twrph1 = 20,
.nr_sets = ARRAY_SIZE(smdk_nand_sets),
.sets = smdk_nand_sets,
- .ecc_mode = NAND_ECC_SOFT,
+ .engine_type = NAND_ECC_ENGINE_TYPE_SOFT,
};
/* devices we initialise */
diff --git a/arch/arm/mach-s3c24xx/mach-anubis.c b/arch/arm/mach-s3c24xx/mach-anubis.c
index 072966dcad78..28326241e360 100644
--- a/arch/arm/mach-s3c24xx/mach-anubis.c
+++ b/arch/arm/mach-s3c24xx/mach-anubis.c
@@ -218,7 +218,7 @@ static struct s3c2410_platform_nand __initdata anubis_nand_info = {
.nr_sets = ARRAY_SIZE(anubis_nand_sets),
.sets = anubis_nand_sets,
.select_chip = anubis_nand_select,
- .ecc_mode = NAND_ECC_SOFT,
+ .engine_type = NAND_ECC_ENGINE_TYPE_SOFT,
};
/* IDE channels */
diff --git a/arch/arm/mach-s3c24xx/mach-at2440evb.c b/arch/arm/mach-s3c24xx/mach-at2440evb.c
index 58c5ef3cf1d7..04dedebdb57c 100644
--- a/arch/arm/mach-s3c24xx/mach-at2440evb.c
+++ b/arch/arm/mach-s3c24xx/mach-at2440evb.c
@@ -109,7 +109,7 @@ static struct s3c2410_platform_nand __initdata at2440evb_nand_info = {
.twrph1 = 40,
.nr_sets = ARRAY_SIZE(at2440evb_nand_sets),
.sets = at2440evb_nand_sets,
- .ecc_mode = NAND_ECC_SOFT,
+ .engine_type = NAND_ECC_ENGINE_TYPE_SOFT,
};
/* DM9000AEP 10/100 ethernet controller */
diff --git a/arch/arm/mach-s3c24xx/mach-bast.c b/arch/arm/mach-s3c24xx/mach-bast.c
index a7c3955ae8f6..6465eab0ab3a 100644
--- a/arch/arm/mach-s3c24xx/mach-bast.c
+++ b/arch/arm/mach-s3c24xx/mach-bast.c
@@ -294,7 +294,7 @@ static struct s3c2410_platform_nand __initdata bast_nand_info = {
.nr_sets = ARRAY_SIZE(bast_nand_sets),
.sets = bast_nand_sets,
.select_chip = bast_nand_select,
- .ecc_mode = NAND_ECC_SOFT,
+ .engine_type = NAND_ECC_ENGINE_TYPE_SOFT,
};
/* DM9000 */
diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c
index 594901f3b8e5..db1b64f6e0a5 100644
--- a/arch/arm/mach-s3c24xx/mach-gta02.c
+++ b/arch/arm/mach-s3c24xx/mach-gta02.c
@@ -416,7 +416,7 @@ static struct s3c2410_platform_nand __initdata gta02_nand_info = {
.twrph1 = 15,
.nr_sets = ARRAY_SIZE(gta02_nand_sets),
.sets = gta02_nand_sets,
- .ecc_mode = NAND_ECC_SOFT,
+ .engine_type = NAND_ECC_ENGINE_TYPE_SOFT,
};
diff --git a/arch/arm/mach-s3c24xx/mach-jive.c b/arch/arm/mach-s3c24xx/mach-jive.c
index 885e8f12e4b9..8233dcff19e7 100644
--- a/arch/arm/mach-s3c24xx/mach-jive.c
+++ b/arch/arm/mach-s3c24xx/mach-jive.c
@@ -228,7 +228,7 @@ static struct s3c2410_platform_nand __initdata jive_nand_info = {
.twrph1 = 40,
.sets = jive_nand_sets,
.nr_sets = ARRAY_SIZE(jive_nand_sets),
- .ecc_mode = NAND_ECC_SOFT,
+ .engine_type = NAND_ECC_ENGINE_TYPE_SOFT,
};
static int __init jive_mtdset(char *options)
diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c b/arch/arm/mach-s3c24xx/mach-mini2440.c
index 9035f868fb34..bd7c3ff675e3 100644
--- a/arch/arm/mach-s3c24xx/mach-mini2440.c
+++ b/arch/arm/mach-s3c24xx/mach-mini2440.c
@@ -296,7 +296,7 @@ static struct s3c2410_platform_nand mini2440_nand_info __initdata = {
.nr_sets = ARRAY_SIZE(mini2440_nand_sets),
.sets = mini2440_nand_sets,
.ignore_unset_ecc = 1,
- .ecc_mode = NAND_ECC_HW,
+ .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST,
};
/* DM9000AEP 10/100 ethernet controller */
diff --git a/arch/arm/mach-s3c24xx/mach-osiris.c b/arch/arm/mach-s3c24xx/mach-osiris.c
index ee3630cb236a..157448827f61 100644
--- a/arch/arm/mach-s3c24xx/mach-osiris.c
+++ b/arch/arm/mach-s3c24xx/mach-osiris.c
@@ -234,7 +234,7 @@ static struct s3c2410_platform_nand __initdata osiris_nand_info = {
.nr_sets = ARRAY_SIZE(osiris_nand_sets),
.sets = osiris_nand_sets,
.select_chip = osiris_nand_select,
- .ecc_mode = NAND_ECC_SOFT,
+ .engine_type = NAND_ECC_ENGINE_TYPE_SOFT,
};
/* PCMCIA control and configuration */
diff --git a/arch/arm/mach-s3c24xx/mach-qt2410.c b/arch/arm/mach-s3c24xx/mach-qt2410.c
index 5d48e5b6e738..16a05bf7cccb 100644
--- a/arch/arm/mach-s3c24xx/mach-qt2410.c
+++ b/arch/arm/mach-s3c24xx/mach-qt2410.c
@@ -281,7 +281,7 @@ static struct s3c2410_platform_nand __initdata qt2410_nand_info = {
.twrph1 = 20,
.nr_sets = ARRAY_SIZE(qt2410_nand_sets),
.sets = qt2410_nand_sets,
- .ecc_mode = NAND_ECC_SOFT,
+ .engine_type = NAND_ECC_ENGINE_TYPE_SOFT,
};
/* UDC */
diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c
index fde98b175c75..5ecb42e8a028 100644
--- a/arch/arm/mach-s3c24xx/mach-rx1950.c
+++ b/arch/arm/mach-s3c24xx/mach-rx1950.c
@@ -620,7 +620,7 @@ static struct s3c2410_platform_nand rx1950_nand_info = {
.twrph1 = 15,
.nr_sets = ARRAY_SIZE(rx1950_nand_sets),
.sets = rx1950_nand_sets,
- .ecc_mode = NAND_ECC_SOFT,
+ .engine_type = NAND_ECC_ENGINE_TYPE_SOFT,
};
static struct s3c2410_udc_mach_info rx1950_udc_cfg __initdata = {
diff --git a/arch/arm/mach-s3c24xx/mach-rx3715.c b/arch/arm/mach-s3c24xx/mach-rx3715.c
index 529c6faf862f..a9408811dbdb 100644
--- a/arch/arm/mach-s3c24xx/mach-rx3715.c
+++ b/arch/arm/mach-s3c24xx/mach-rx3715.c
@@ -158,7 +158,7 @@ static struct s3c2410_platform_nand __initdata rx3715_nand_info = {
.twrph1 = 15,
.nr_sets = ARRAY_SIZE(rx3715_nand_sets),
.sets = rx3715_nand_sets,
- .ecc_mode = NAND_ECC_SOFT,
+ .engine_type = NAND_ECC_ENGINE_TYPE_SOFT,
};
static struct platform_device *rx3715_devices[] __initdata = {
diff --git a/arch/arm/mach-s3c24xx/mach-vstms.c b/arch/arm/mach-s3c24xx/mach-vstms.c
index d76b28b65e65..c5fa215a527e 100644
--- a/arch/arm/mach-s3c24xx/mach-vstms.c
+++ b/arch/arm/mach-s3c24xx/mach-vstms.c
@@ -112,7 +112,7 @@ static struct s3c2410_platform_nand __initdata vstms_nand_info = {
.twrph1 = 20,
.nr_sets = ARRAY_SIZE(vstms_nand_sets),
.sets = vstms_nand_sets,
- .ecc_mode = NAND_ECC_SOFT,
+ .engine_type = NAND_ECC_ENGINE_TYPE_SOFT,
};
static struct platform_device *vstms_devices[] __initdata = {
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index e7080215c624..0d9acaf91701 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -199,7 +199,7 @@ static struct s3c2410_platform_nand hmt_nand_info = {
.twrph1 = 40,
.nr_sets = ARRAY_SIZE(hmt_nand_sets),
.sets = hmt_nand_sets,
- .ecc_mode = NAND_ECC_SOFT,
+ .engine_type = NAND_ECC_ENGINE_TYPE_SOFT,
};
static struct gpio_led hmt_leds[] = {
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 0dd36ae49e6a..6fbb57878746 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -136,7 +136,7 @@ static struct s3c2410_platform_nand mini6410_nand_info = {
.twrph1 = 40,
.nr_sets = ARRAY_SIZE(mini6410_nand_sets),
.sets = mini6410_nand_sets,
- .ecc_mode = NAND_ECC_SOFT,
+ .engine_type = NAND_ECC_ENGINE_TYPE_SOFT,
};
static struct s3c_fb_pd_win mini6410_lcd_type0_fb_win = {
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 0ff88b6859c4..1e98e530a6aa 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -188,7 +188,7 @@ static struct s3c2410_platform_nand real6410_nand_info = {
.twrph1 = 40,
.nr_sets = ARRAY_SIZE(real6410_nand_sets),
.sets = real6410_nand_sets,
- .ecc_mode = NAND_ECC_SOFT,
+ .engine_type = NAND_ECC_ENGINE_TYPE_SOFT,
};
static struct platform_device *real6410_devices[] __initdata = {
diff --git a/drivers/mtd/nand/raw/ams-delta.c b/drivers/mtd/nand/raw/ams-delta.c
index 72a44b2411c1..bf7c73ede98f 100644
--- a/drivers/mtd/nand/raw/ams-delta.c
+++ b/drivers/mtd/nand/raw/ams-delta.c
@@ -260,7 +260,7 @@ static int gpio_nand_probe(struct platform_device *pdev)
return err;
}
- this->ecc.mode = NAND_ECC_SOFT;
+ this->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
this->ecc.algo = NAND_ECC_ALGO_HAMMING;
platform_set_drvdata(pdev, priv);
diff --git a/drivers/mtd/nand/raw/arasan-nand-controller.c b/drivers/mtd/nand/raw/arasan-nand-controller.c
index 076736351bc6..a0b5c539ca73 100644
--- a/drivers/mtd/nand/raw/arasan-nand-controller.c
+++ b/drivers/mtd/nand/raw/arasan-nand-controller.c
@@ -1056,17 +1056,17 @@ static int anfc_attach_chip(struct nand_chip *chip)
chip->ecc.read_page_raw = nand_monolithic_read_page_raw;
chip->ecc.write_page_raw = nand_monolithic_write_page_raw;
- switch (chip->ecc.mode) {
- case NAND_ECC_NONE:
- case NAND_ECC_SOFT:
- case NAND_ECC_ON_DIE:
+ switch (chip->ecc.engine_type) {
+ case NAND_ECC_ENGINE_TYPE_NONE:
+ case NAND_ECC_ENGINE_TYPE_SOFT:
+ case NAND_ECC_ENGINE_TYPE_ON_DIE:
break;
- case NAND_ECC_HW:
+ case NAND_ECC_ENGINE_TYPE_ON_HOST:
ret = anfc_init_hw_ecc_controller(nfc, chip);
break;
default:
dev_err(nfc->dev, "Unsupported ECC mode: %d\n",
- chip->ecc.mode);
+ chip->ecc.engine_type);
return -EINVAL;
}
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index d9839461e460..85cf396731ce 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1118,15 +1118,15 @@ static int atmel_nand_ecc_init(struct nand_chip *chip)
nc = to_nand_controller(chip->controller);
- switch (chip->ecc.mode) {
- case NAND_ECC_NONE:
- case NAND_ECC_SOFT:
+ switch (chip->ecc.engine_type) {
+ case NAND_ECC_ENGINE_TYPE_NONE:
+ case NAND_ECC_ENGINE_TYPE_SOFT:
/*
* Nothing to do, the core will initialize everything for us.
*/
break;
- case NAND_ECC_HW:
+ case NAND_ECC_ENGINE_TYPE_ON_HOST:
ret = atmel_nand_pmecc_init(chip);
if (ret)
return ret;
@@ -1140,7 +1140,7 @@ static int atmel_nand_ecc_init(struct nand_chip *chip)
default:
/* Other modes are not supported. */
dev_err(nc->dev, "Unsupported ECC mode: %d\n",
- chip->ecc.mode);
+ chip->ecc.engine_type);
return -ENOTSUPP;
}
@@ -1155,7 +1155,7 @@ static int atmel_hsmc_nand_ecc_init(struct nand_chip *chip)
if (ret)
return ret;
- if (chip->ecc.mode != NAND_ECC_HW)
+ if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
return 0;
/* Adjust the ECC operations for the HSMC IP. */
@@ -1498,7 +1498,7 @@ static void atmel_nand_init(struct atmel_nand_controller *nc,
/* Default to HW ECC if pmecc is available. */
if (nc->pmecc)
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
}
static void atmel_smc_nand_init(struct atmel_nand_controller *nc,
diff --git a/drivers/mtd/nand/raw/au1550nd.c b/drivers/mtd/nand/raw/au1550nd.c
index ec2d90ad87de..79b057400fe9 100644
--- a/drivers/mtd/nand/raw/au1550nd.c
+++ b/drivers/mtd/nand/raw/au1550nd.c
@@ -294,7 +294,7 @@ static int au1550nd_probe(struct platform_device *pdev)
nand_controller_init(&ctx->controller);
ctx->controller.ops = &au1550nd_ops;
this->controller = &ctx->controller;
- this->ecc.mode = NAND_ECC_SOFT;
+ this->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
this->ecc.algo = NAND_ECC_ALGO_HAMMING;
if (pd->devwidth)
diff --git a/drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c b/drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c
index 591775173034..8bb17c5a66c3 100644
--- a/drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c
+++ b/drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c
@@ -391,7 +391,8 @@ int bcm47xxnflash_ops_bcm4706_init(struct bcm47xxnflash *b47n)
nand_chip->legacy.chip_delay = 50;
b47n->nand_chip.bbt_options = NAND_BBT_USE_FLASH;
- b47n->nand_chip.ecc.mode = NAND_ECC_NONE; /* TODO: implement ECC */
+ /* TODO: implement ECC */
+ b47n->nand_chip.ecc.engine_type = NAND_ECC_ENGINE_TYPE_NONE;
/* Enable NAND flash access */
bcma_cc_set32(b47n->cc, BCMA_CC_4706_FLASHSCFG,
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 2a9f2ff89fe7..164617b33942 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -2539,9 +2539,9 @@ static int brcmnand_setup_dev(struct brcmnand_host *host)
cfg->col_adr_bytes = 2;
cfg->blk_adr_bytes = get_blk_adr_bytes(mtd->size, mtd->writesize);
- if (chip->ecc.mode != NAND_ECC_HW) {
+ if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST) {
dev_err(ctrl->dev, "only HW ECC supported; selected: %d\n",
- chip->ecc.mode);
+ chip->ecc.engine_type);
return -EINVAL;
}
@@ -2561,7 +2561,7 @@ static int brcmnand_setup_dev(struct brcmnand_host *host)
return -EINVAL;
}
- if (chip->ecc.mode != NAND_ECC_NONE &&
+ if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_NONE &&
(!chip->ecc.size || !chip->ecc.strength)) {
if (chip->base.eccreq.step_size && chip->base.eccreq.strength) {
/* use detected ECC parameters */
@@ -2702,7 +2702,7 @@ static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn)
chip->legacy.read_buf = brcmnand_read_buf;
chip->legacy.write_buf = brcmnand_write_buf;
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->ecc.read_page = brcmnand_read_page;
chip->ecc.write_page = brcmnand_write_page;
chip->ecc.read_page_raw = brcmnand_read_page_raw;
diff --git a/drivers/mtd/nand/raw/cadence-nand-controller.c b/drivers/mtd/nand/raw/cadence-nand-controller.c
index c405722adfe1..1bdec12f7893 100644
--- a/drivers/mtd/nand/raw/cadence-nand-controller.c
+++ b/drivers/mtd/nand/raw/cadence-nand-controller.c
@@ -2610,7 +2610,7 @@ static int cadence_nand_attach_chip(struct nand_chip *chip)
chip->bbt_options |= NAND_BBT_USE_FLASH;
chip->bbt_options |= NAND_BBT_NO_OOB;
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->options |= NAND_NO_SUBPAGE_WRITE;
@@ -2756,7 +2756,7 @@ static int cadence_nand_chip_init(struct cdns_nand_ctrl *cdns_ctrl,
* Default to HW ECC engine mode. If the nand-ecc-mode property is given
* in the DT node, this entry will be overwritten in nand_scan_ident().
*/
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
ret = nand_scan(chip, cdns_chip->nsels);
if (ret) {
diff --git a/drivers/mtd/nand/raw/cafe_nand.c b/drivers/mtd/nand/raw/cafe_nand.c
index 2bf8ab542e38..2b94f385a1a8 100644
--- a/drivers/mtd/nand/raw/cafe_nand.c
+++ b/drivers/mtd/nand/raw/cafe_nand.c
@@ -629,7 +629,7 @@ static int cafe_nand_attach_chip(struct nand_chip *chip)
goto out_free_dma;
}
- cafe->nand.ecc.mode = NAND_ECC_HW;
+ cafe->nand.ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
cafe->nand.ecc.placement = NAND_ECC_PLACEMENT_INTERLEAVED;
cafe->nand.ecc.size = mtd->writesize;
cafe->nand.ecc.bytes = 14;
diff --git a/drivers/mtd/nand/raw/cs553x_nand.c b/drivers/mtd/nand/raw/cs553x_nand.c
index 9472bf798ed5..b7f3f6347761 100644
--- a/drivers/mtd/nand/raw/cs553x_nand.c
+++ b/drivers/mtd/nand/raw/cs553x_nand.c
@@ -286,7 +286,7 @@ static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)
goto out_mtd;
}
- this->ecc.mode = NAND_ECC_HW;
+ this->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
this->ecc.size = 256;
this->ecc.bytes = 3;
this->ecc.hwctl = cs_enable_hwecc;
diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c
index 3640c7e45e15..58966a9706b1 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -530,11 +530,11 @@ static struct davinci_nand_pdata
if (!of_property_read_string(pdev->dev.of_node,
"ti,davinci-ecc-mode", &mode)) {
if (!strncmp("none", mode, 4))
- pdata->ecc_mode = NAND_ECC_NONE;
+ pdata->engine_type = NAND_ECC_ENGINE_TYPE_NONE;
if (!strncmp("soft", mode, 4))
- pdata->ecc_mode = NAND_ECC_SOFT;
+ pdata->engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
if (!strncmp("hw", mode, 2))
- pdata->ecc_mode = NAND_ECC_HW;
+ pdata->engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
}
if (!of_property_read_u32(pdev->dev.of_node,
"ti,davinci-ecc-bits", &prop))
@@ -585,21 +585,21 @@ static int davinci_nand_attach_chip(struct nand_chip *chip)
if (IS_ERR(pdata))
return PTR_ERR(pdata);
- switch (info->chip.ecc.mode) {
- case NAND_ECC_NONE:
+ switch (info->chip.ecc.engine_type) {
+ case NAND_ECC_ENGINE_TYPE_NONE:
pdata->ecc_bits = 0;
break;
- case NAND_ECC_SOFT:
+ case NAND_ECC_ENGINE_TYPE_SOFT:
pdata->ecc_bits = 0;
/*
- * This driver expects Hamming based ECC when ecc_mode is set
- * to NAND_ECC_SOFT. Force ecc.algo to NAND_ECC_ALGO_HAMMING to
- * avoid adding an extra ->ecc_algo field to
- * davinci_nand_pdata.
+ * This driver expects Hamming based ECC when engine_type is set
+ * to NAND_ECC_ENGINE_TYPE_SOFT. Force ecc.algo to
+ * NAND_ECC_ALGO_HAMMING to avoid adding an extra ->ecc_algo
+ * field to davinci_nand_pdata.
*/
info->chip.ecc.algo = NAND_ECC_ALGO_HAMMING;
break;
- case NAND_ECC_HW:
+ case NAND_ECC_ENGINE_TYPE_ON_HOST:
if (pdata->ecc_bits == 4) {
int chunks = mtd->writesize / 512;
@@ -850,7 +850,7 @@ static int nand_davinci_probe(struct platform_device *pdev)
info->mask_cle = pdata->mask_cle ? : MASK_CLE;
/* Use board-specific ECC config */
- info->chip.ecc.mode = pdata->ecc_mode;
+ info->chip.ecc.engine_type = pdata->engine_type;
info->chip.ecc.placement = pdata->ecc_placement;
spin_lock_irq(&davinci_nand_lock);
diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index 514a97ea4450..a6a6464974ec 100644
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -1237,7 +1237,7 @@ int denali_chip_init(struct denali_controller *denali,
chip->bbt_options |= NAND_BBT_USE_FLASH;
chip->bbt_options |= NAND_BBT_NO_OOB;
chip->options |= NAND_NO_SUBPAGE_WRITE;
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->ecc.placement = NAND_ECC_PLACEMENT_INTERLEAVED;
chip->ecc.read_page = denali_read_page;
chip->ecc.write_page = denali_write_page;
diff --git a/drivers/mtd/nand/raw/diskonchip.c b/drivers/mtd/nand/raw/diskonchip.c
index 40360352136b..94432a453e5e 100644
--- a/drivers/mtd/nand/raw/diskonchip.c
+++ b/drivers/mtd/nand/raw/diskonchip.c
@@ -1456,7 +1456,7 @@ static int __init doc_probe(unsigned long physadr)
nand->ecc.calculate = doc200x_calculate_ecc;
nand->ecc.correct = doc200x_correct_data;
- nand->ecc.mode = NAND_ECC_HW;
+ nand->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
nand->ecc.placement = NAND_ECC_PLACEMENT_INTERLEAVED;
nand->ecc.size = 512;
nand->ecc.bytes = 6;
diff --git a/drivers/mtd/nand/raw/fsl_elbc_nand.c b/drivers/mtd/nand/raw/fsl_elbc_nand.c
index da89389faaae..b2af7f81fdf8 100644
--- a/drivers/mtd/nand/raw/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/raw/fsl_elbc_nand.c
@@ -244,7 +244,7 @@ static int fsl_elbc_run_command(struct mtd_info *mtd)
return -EIO;
}
- if (chip->ecc.mode != NAND_ECC_HW)
+ if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
return 0;
elbc_fcm_ctrl->max_bitflips = 0;
@@ -727,12 +727,12 @@ static int fsl_elbc_attach_chip(struct nand_chip *chip)
struct fsl_lbc_regs __iomem *lbc = ctrl->regs;
unsigned int al;
- switch (chip->ecc.mode) {
+ switch (chip->ecc.engine_type) {
/*
* if ECC was not chosen in DT, decide whether to use HW or SW ECC from
* CS Base Register
*/
- case NAND_ECC_NONE:
+ case NAND_ECC_ENGINE_TYPE_NONE:
/* If CS Base Register selects full hardware ECC then use it */
if ((in_be32(&lbc->bank[priv->bank].br) & BR_DECC) ==
BR_DECC_CHK_GEN) {
@@ -740,23 +740,23 @@ static int fsl_elbc_attach_chip(struct nand_chip *chip)
chip->ecc.write_page = fsl_elbc_write_page;
chip->ecc.write_subpage = fsl_elbc_write_subpage;
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
mtd_set_ooblayout(mtd, &fsl_elbc_ooblayout_ops);
chip->ecc.size = 512;
chip->ecc.bytes = 3;
chip->ecc.strength = 1;
} else {
/* otherwise fall back to default software ECC */
- chip->ecc.mode = NAND_ECC_SOFT;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
}
break;
/* if SW ECC was chosen in DT, we do not need to set anything here */
- case NAND_ECC_SOFT:
+ case NAND_ECC_ENGINE_TYPE_SOFT:
break;
- /* should we also implement NAND_ECC_HW to do as the code above? */
+ /* should we also implement *_ECC_ENGINE_CONTROLLER to do as above? */
default:
return -EINVAL;
}
@@ -786,8 +786,8 @@ static int fsl_elbc_attach_chip(struct nand_chip *chip)
chip->page_shift);
dev_dbg(priv->dev, "fsl_elbc_init: nand->phys_erase_shift = %d\n",
chip->phys_erase_shift);
- dev_dbg(priv->dev, "fsl_elbc_init: nand->ecc.mode = %d\n",
- chip->ecc.mode);
+ dev_dbg(priv->dev, "fsl_elbc_init: nand->ecc.engine_type = %d\n",
+ chip->ecc.engine_type);
dev_dbg(priv->dev, "fsl_elbc_init: nand->ecc.steps = %d\n",
chip->ecc.steps);
dev_dbg(priv->dev, "fsl_elbc_init: nand->ecc.bytes = %d\n",
diff --git a/drivers/mtd/nand/raw/fsl_ifc_nand.c b/drivers/mtd/nand/raw/fsl_ifc_nand.c
index b2ae759dd14e..0e7a9b64301e 100644
--- a/drivers/mtd/nand/raw/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/raw/fsl_ifc_nand.c
@@ -309,7 +309,7 @@ static void fsl_ifc_cmdfunc(struct nand_chip *chip, unsigned int command,
ifc_nand_ctrl->read_bytes = mtd->writesize + mtd->oobsize;
ifc_nand_ctrl->index += column;
- if (chip->ecc.mode == NAND_ECC_HW)
+ if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST)
ifc_nand_ctrl->eccread = 1;
fsl_ifc_do_read(chip, 0, mtd);
@@ -724,8 +724,8 @@ static int fsl_ifc_attach_chip(struct nand_chip *chip)
chip->page_shift);
dev_dbg(priv->dev, "%s: nand->phys_erase_shift = %d\n", __func__,
chip->phys_erase_shift);
- dev_dbg(priv->dev, "%s: nand->ecc.mode = %d\n", __func__,
- chip->ecc.mode);
+ dev_dbg(priv->dev, "%s: nand->ecc.engine_type = %d\n", __func__,
+ chip->ecc.engine_type);
dev_dbg(priv->dev, "%s: nand->ecc.steps = %d\n", __func__,
chip->ecc.steps);
dev_dbg(priv->dev, "%s: nand->ecc.bytes = %d\n", __func__,
@@ -912,7 +912,7 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)
/* Must also set CSOR_NAND_ECC_ENC_EN if DEC_EN set */
if (csor & CSOR_NAND_ECC_DEC_EN) {
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
mtd_set_ooblayout(mtd, &fsl_ifc_ooblayout_ops);
/* Hardware generates ECC per 512 Bytes */
@@ -925,7 +925,7 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)
chip->ecc.strength = 8;
}
} else {
- chip->ecc.mode = NAND_ECC_SOFT;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
}
diff --git a/drivers/mtd/nand/raw/fsl_upm.c b/drivers/mtd/nand/raw/fsl_upm.c
index 49592b7e03a3..fc5a9df27cf1 100644
--- a/drivers/mtd/nand/raw/fsl_upm.c
+++ b/drivers/mtd/nand/raw/fsl_upm.c
@@ -163,7 +163,7 @@ static int fun_chip_init(struct fsl_upm_nand *fun,
fun->chip.legacy.read_byte = fun_read_byte;
fun->chip.legacy.read_buf = fun_read_buf;
fun->chip.legacy.write_buf = fun_write_buf;
- fun->chip.ecc.mode = NAND_ECC_SOFT;
+ fun->chip.ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
fun->chip.ecc.algo = NAND_ECC_ALGO_HAMMING;
if (fun->mchip_count > 1)
fun->chip.legacy.select_chip = fun_select_chip;
diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
index ced570987e85..fd2926d6f5b2 100644
--- a/drivers/mtd/nand/raw/fsmc_nand.c
+++ b/drivers/mtd/nand/raw/fsmc_nand.c
@@ -900,8 +900,8 @@ static int fsmc_nand_attach_chip(struct nand_chip *nand)
return 0;
}
- switch (nand->ecc.mode) {
- case NAND_ECC_HW:
+ switch (nand->ecc.engine_type) {
+ case NAND_ECC_ENGINE_TYPE_ON_HOST:
dev_info(host->dev, "Using 1-bit HW ECC scheme\n");
nand->ecc.calculate = fsmc_read_hwecc_ecc1;
nand->ecc.correct = nand_correct_data;
@@ -910,14 +910,14 @@ static int fsmc_nand_attach_chip(struct nand_chip *nand)
nand->ecc.options |= NAND_ECC_SOFT_HAMMING_SM_ORDER;
break;
- case NAND_ECC_SOFT:
+ case NAND_ECC_ENGINE_TYPE_SOFT:
if (nand->ecc.algo == NAND_ECC_ALGO_BCH) {
dev_info(host->dev,
"Using 4-bit SW BCH ECC scheme\n");
break;
}
- case NAND_ECC_ON_DIE:
+ case NAND_ECC_ENGINE_TYPE_ON_DIE:
break;
default:
@@ -929,7 +929,7 @@ static int fsmc_nand_attach_chip(struct nand_chip *nand)
* Don't set layout for BCH4 SW ECC. This will be
* generated later in nand_bch_init() later.
*/
- if (nand->ecc.mode == NAND_ECC_HW) {
+ if (nand->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST) {
switch (mtd->oobsize) {
case 16:
case 64:
@@ -1059,7 +1059,7 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
* Setup default ECC mode. nand_dt_init() called from nand_scan_ident()
* can overwrite this value if the DT provides a different value.
*/
- nand->ecc.mode = NAND_ECC_HW;
+ nand->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
nand->ecc.hwctl = fsmc_enable_hwecc;
nand->ecc.size = 512;
nand->badblockbits = 7;
diff --git a/drivers/mtd/nand/raw/gpio.c b/drivers/mtd/nand/raw/gpio.c
index 667807c7100b..13645a8157a8 100644
--- a/drivers/mtd/nand/raw/gpio.c
+++ b/drivers/mtd/nand/raw/gpio.c
@@ -275,7 +275,7 @@ static int gpio_nand_probe(struct platform_device *pdev)
nand_set_flash_node(chip, pdev->dev.of_node);
chip->legacy.IO_ADDR_W = chip->legacy.IO_ADDR_R;
- chip->ecc.mode = NAND_ECC_SOFT;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
chip->options = gpiomtd->plat.options;
chip->legacy.chip_delay = gpiomtd->plat.chip_delay;
diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
index 061a8ddda275..d1ea6df9fd64 100644
--- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
@@ -2032,7 +2032,7 @@ static int gpmi_init_last(struct gpmi_nand_data *this)
ecc->write_page_raw = gpmi_ecc_write_page_raw;
ecc->read_oob_raw = gpmi_ecc_read_oob_raw;
ecc->write_oob_raw = gpmi_ecc_write_oob_raw;
- ecc->mode = NAND_ECC_HW;
+ ecc->engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
ecc->size = bch_geo->ecc_chunk_size;
ecc->strength = bch_geo->ecc_strength;
mtd_set_ooblayout(mtd, &gpmi_ooblayout_ops);
diff --git a/drivers/mtd/nand/raw/hisi504_nand.c b/drivers/mtd/nand/raw/hisi504_nand.c
index b84238e2268a..8b2122ce6ec3 100644
--- a/drivers/mtd/nand/raw/hisi504_nand.c
+++ b/drivers/mtd/nand/raw/hisi504_nand.c
@@ -186,7 +186,7 @@ static void hisi_nfc_dma_transfer(struct hinfc_host *host, int todev)
hinfc_write(host, host->dma_buffer, HINFC504_DMA_ADDR_DATA);
hinfc_write(host, host->dma_oob, HINFC504_DMA_ADDR_OOB);
- if (chip->ecc.mode == NAND_ECC_NONE) {
+ if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_NONE) {
hinfc_write(host, ((mtd->oobsize & HINFC504_DMA_LEN_OOB_MASK)
<< HINFC504_DMA_LEN_OOB_SHIFT), HINFC504_DMA_LEN);
@@ -468,7 +468,7 @@ static void hisi_nfc_cmdfunc(struct nand_chip *chip, unsigned command,
case NAND_CMD_STATUS:
flag = hinfc_read(host, HINFC504_CON);
- if (chip->ecc.mode == NAND_ECC_HW)
+ if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST)
hinfc_write(host,
flag & ~(HINFC504_CON_ECCTYPE_MASK <<
HINFC504_CON_ECCTYPE_SHIFT), HINFC504_CON);
@@ -721,7 +721,7 @@ static int hisi_nfc_attach_chip(struct nand_chip *chip)
}
hinfc_write(host, flag, HINFC504_CON);
- if (chip->ecc.mode == NAND_ECC_HW)
+ if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST)
hisi_nfc_ecc_probe(host);
return 0;
diff --git a/drivers/mtd/nand/raw/ingenic/ingenic_nand_drv.c b/drivers/mtd/nand/raw/ingenic/ingenic_nand_drv.c
index 69423bb29adb..70309f18124c 100644
--- a/drivers/mtd/nand/raw/ingenic/ingenic_nand_drv.c
+++ b/drivers/mtd/nand/raw/ingenic/ingenic_nand_drv.c
@@ -194,8 +194,8 @@ static int ingenic_nand_attach_chip(struct nand_chip *chip)
(chip->ecc.strength / 8);
}
- switch (chip->ecc.mode) {
- case NAND_ECC_HW:
+ switch (chip->ecc.engine_type) {
+ case NAND_ECC_ENGINE_TYPE_ON_HOST:
if (!nfc->ecc) {
dev_err(nfc->dev, "HW ECC selected, but ECC controller not found\n");
return -ENODEV;
@@ -205,22 +205,22 @@ static int ingenic_nand_attach_chip(struct nand_chip *chip)
chip->ecc.calculate = ingenic_nand_ecc_calculate;
chip->ecc.correct = ingenic_nand_ecc_correct;
fallthrough;
- case NAND_ECC_SOFT:
+ case NAND_ECC_ENGINE_TYPE_SOFT:
dev_info(nfc->dev, "using %s (strength %d, size %d, bytes %d)\n",
(nfc->ecc) ? "hardware ECC" : "software ECC",
chip->ecc.strength, chip->ecc.size, chip->ecc.bytes);
break;
- case NAND_ECC_NONE:
+ case NAND_ECC_ENGINE_TYPE_NONE:
dev_info(nfc->dev, "not using ECC\n");
break;
default:
dev_err(nfc->dev, "ECC mode %d not supported\n",
- chip->ecc.mode);
+ chip->ecc.engine_type);
return -EINVAL;
}
/* The NAND core will generate the ECC layout for SW ECC */
- if (chip->ecc.mode != NAND_ECC_HW)
+ if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
return 0;
/* Generate ECC layout. ECC codes are right aligned in the OOB area. */
@@ -404,7 +404,7 @@ static int ingenic_nand_init_chip(struct platform_device *pdev,
mtd->dev.parent = dev;
chip->options = NAND_NO_SUBPAGE_WRITE;
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->controller = &nfc->controller;
nand_set_flash_node(chip, np);
diff --git a/drivers/mtd/nand/raw/lpc32xx_mlc.c b/drivers/mtd/nand/raw/lpc32xx_mlc.c
index 7521038af2ef..4940bb2e3c07 100644
--- a/drivers/mtd/nand/raw/lpc32xx_mlc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_mlc.c
@@ -656,7 +656,7 @@ static int lpc32xx_nand_attach_chip(struct nand_chip *chip)
if (!host->dummy_buf)
return -ENOMEM;
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->ecc.size = 512;
mtd_set_ooblayout(mtd, &lpc32xx_ooblayout_ops);
host->mlcsubpages = mtd->writesize / 512;
diff --git a/drivers/mtd/nand/raw/lpc32xx_slc.c b/drivers/mtd/nand/raw/lpc32xx_slc.c
index ccb189c8e343..6db9d2ed6881 100644
--- a/drivers/mtd/nand/raw/lpc32xx_slc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_slc.c
@@ -881,7 +881,7 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, host);
/* NAND callbacks for LPC32xx SLC hardware */
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->ecc.placement = NAND_ECC_PLACEMENT_INTERLEAVED;
chip->legacy.read_byte = lpc32xx_nand_read_byte;
chip->legacy.read_buf = lpc32xx_nand_read_buf;
diff --git a/drivers/mtd/nand/raw/marvell_nand.c b/drivers/mtd/nand/raw/marvell_nand.c
index 3969cca7d925..f9cc03c11deb 100644
--- a/drivers/mtd/nand/raw/marvell_nand.c
+++ b/drivers/mtd/nand/raw/marvell_nand.c
@@ -2247,7 +2247,8 @@ static int marvell_nand_ecc_init(struct mtd_info *mtd,
struct marvell_nfc *nfc = to_marvell_nfc(chip->controller);
int ret;
- if (ecc->mode != NAND_ECC_NONE && (!ecc->size || !ecc->strength)) {
+ if (ecc->engine_type != NAND_ECC_ENGINE_TYPE_NONE &&
+ (!ecc->size || !ecc->strength)) {
if (chip->base.eccreq.step_size && chip->base.eccreq.strength) {
ecc->size = chip->base.eccreq.step_size;
ecc->strength = chip->base.eccreq.strength;
@@ -2259,15 +2260,15 @@ static int marvell_nand_ecc_init(struct mtd_info *mtd,
}
}
- switch (ecc->mode) {
- case NAND_ECC_HW:
+ switch (ecc->engine_type) {
+ case NAND_ECC_ENGINE_TYPE_ON_HOST:
ret = marvell_nand_hw_ecc_controller_init(mtd, ecc);
if (ret)
return ret;
break;
- case NAND_ECC_NONE:
- case NAND_ECC_SOFT:
- case NAND_ECC_ON_DIE:
+ case NAND_ECC_ENGINE_TYPE_NONE:
+ case NAND_ECC_ENGINE_TYPE_SOFT:
+ case NAND_ECC_ENGINE_TYPE_ON_DIE:
if (!nfc->caps->is_nfcv2 && mtd->writesize != SZ_512 &&
mtd->writesize != SZ_2K) {
dev_err(nfc->dev, "NFCv1 cannot write %d bytes pages\n",
@@ -2465,7 +2466,7 @@ static int marvell_nand_attach_chip(struct nand_chip *chip)
return ret;
}
- if (chip->ecc.mode == NAND_ECC_HW) {
+ if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST) {
/*
* Subpage write not available with hardware ECC, prohibit also
* subpage read as in userspace subpage access would still be
@@ -2640,7 +2641,7 @@ static int marvell_nand_chip_init(struct device *dev, struct marvell_nfc *nfc,
* Default to HW ECC engine mode. If the nand-ecc-mode property is given
* in the DT node, this entry will be overwritten in nand_scan_ident().
*/
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
/*
* Save a reference value for timing registers before
diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
index 3f376471f3f7..4d1f5c8da270 100644
--- a/drivers/mtd/nand/raw/meson_nand.c
+++ b/drivers/mtd/nand/raw/meson_nand.c
@@ -1197,7 +1197,7 @@ static int meson_nand_attach_chip(struct nand_chip *nand)
if (ret)
return -EINVAL;
- nand->ecc.mode = NAND_ECC_HW;
+ nand->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
nand->ecc.write_page_raw = meson_nfc_write_page_raw;
nand->ecc.write_page = meson_nfc_write_page_hwecc;
nand->ecc.write_oob_raw = nand_write_oob_std;
diff --git a/drivers/mtd/nand/raw/mpc5121_nfc.c b/drivers/mtd/nand/raw/mpc5121_nfc.c
index a67eded226db..dfd0d3ed5ed0 100644
--- a/drivers/mtd/nand/raw/mpc5121_nfc.c
+++ b/drivers/mtd/nand/raw/mpc5121_nfc.c
@@ -688,7 +688,7 @@ static int mpc5121_nfc_probe(struct platform_device *op)
chip->legacy.set_features = nand_get_set_features_notsupp;
chip->legacy.get_features = nand_get_set_features_notsupp;
chip->bbt_options = NAND_BBT_USE_FLASH;
- chip->ecc.mode = NAND_ECC_SOFT;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
/* Support external chip-select logic on ADS5121 board */
diff --git a/drivers/mtd/nand/raw/mtk_nand.c b/drivers/mtd/nand/raw/mtk_nand.c
index c1a6e31aabb8..a0294c9161dd 100644
--- a/drivers/mtd/nand/raw/mtk_nand.c
+++ b/drivers/mtd/nand/raw/mtk_nand.c
@@ -1226,8 +1226,8 @@ static int mtk_nfc_ecc_init(struct device *dev, struct mtd_info *mtd)
int free, ret;
/* support only ecc hw mode */
- if (nand->ecc.mode != NAND_ECC_HW) {
- dev_err(dev, "ecc.mode not supported\n");
+ if (nand->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST) {
+ dev_err(dev, "ecc.engine_type not supported\n");
return -EINVAL;
}
@@ -1390,7 +1390,7 @@ static int mtk_nfc_nand_chip_init(struct device *dev, struct mtk_nfc *nfc,
nand->legacy.cmd_ctrl = mtk_nfc_cmd_ctrl;
/* set default mode in case dt entry is missing */
- nand->ecc.mode = NAND_ECC_HW;
+ nand->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
nand->ecc.write_subpage = mtk_nfc_write_subpage_hwecc;
nand->ecc.write_page_raw = mtk_nfc_write_page_raw;
diff --git a/drivers/mtd/nand/raw/mxc_nand.c b/drivers/mtd/nand/raw/mxc_nand.c
index c2e9759cfba8..de3bd36f99e9 100644
--- a/drivers/mtd/nand/raw/mxc_nand.c
+++ b/drivers/mtd/nand/raw/mxc_nand.c
@@ -669,7 +669,7 @@ static void mxc_nand_enable_hwecc_v1_v2(struct nand_chip *chip, bool enable)
struct mxc_nand_host *host = nand_get_controller_data(chip);
uint16_t config1;
- if (chip->ecc.mode != NAND_ECC_HW)
+ if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
return;
config1 = readw(NFC_V1_V2_CONFIG1);
@@ -687,7 +687,7 @@ static void mxc_nand_enable_hwecc_v3(struct nand_chip *chip, bool enable)
struct mxc_nand_host *host = nand_get_controller_data(chip);
uint32_t config2;
- if (chip->ecc.mode != NAND_ECC_HW)
+ if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
return;
config2 = readl(NFC_V3_CONFIG2);
@@ -1117,7 +1117,8 @@ static void preset_v1(struct mtd_info *mtd)
struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
uint16_t config1 = 0;
- if (nand_chip->ecc.mode == NAND_ECC_HW && mtd->writesize)
+ if (nand_chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST &&
+ mtd->writesize)
config1 |= NFC_V1_V2_CONFIG1_ECC_EN;
if (!host->devtype_data->irqpending_quirk)
@@ -1227,7 +1228,7 @@ static void preset_v2(struct mtd_info *mtd)
if (mtd->writesize) {
uint16_t pages_per_block = mtd->erasesize / mtd->writesize;
- if (nand_chip->ecc.mode == NAND_ECC_HW)
+ if (nand_chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST)
config1 |= NFC_V1_V2_CONFIG1_ECC_EN;
host->eccsize = get_eccsize(mtd);
@@ -1303,7 +1304,7 @@ static void preset_v3(struct mtd_info *mtd)
}
if (mtd->writesize) {
- if (chip->ecc.mode == NAND_ECC_HW)
+ if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST)
config2 |= NFC_V3_CONFIG2_ECC_EN;
config2 |= NFC_V3_CONFIG2_PPB(
@@ -1680,8 +1681,8 @@ static int mxcnd_attach_chip(struct nand_chip *chip)
struct mxc_nand_host *host = nand_get_controller_data(chip);
struct device *dev = mtd->dev.parent;
- switch (chip->ecc.mode) {
- case NAND_ECC_HW:
+ switch (chip->ecc.engine_type) {
+ case NAND_ECC_ENGINE_TYPE_ON_HOST:
chip->ecc.read_page = mxc_nand_read_page;
chip->ecc.read_page_raw = mxc_nand_read_page_raw;
chip->ecc.read_oob = mxc_nand_read_oob;
@@ -1690,7 +1691,7 @@ static int mxcnd_attach_chip(struct nand_chip *chip)
chip->ecc.write_oob = mxc_nand_write_oob;
break;
- case NAND_ECC_SOFT:
+ case NAND_ECC_ENGINE_TYPE_SOFT:
break;
default:
@@ -1728,7 +1729,7 @@ static int mxcnd_attach_chip(struct nand_chip *chip)
*/
host->used_oobsize = min(mtd->oobsize, 218U);
- if (chip->ecc.mode == NAND_ECC_HW) {
+ if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST) {
if (is_imx21_nfc(host) || is_imx27_nfc(host))
chip->ecc.strength = 1;
else
@@ -1843,9 +1844,9 @@ static int mxcnd_probe(struct platform_device *pdev)
mtd_set_ooblayout(mtd, host->devtype_data->ooblayout);
if (host->pdata.hw_ecc) {
- this->ecc.mode = NAND_ECC_HW;
+ this->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
} else {
- this->ecc.mode = NAND_ECC_SOFT;
+ this->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
this->ecc.algo = NAND_ECC_ALGO_HAMMING;
}
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 9de58c4c4443..2821c82b79ad 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -5018,28 +5018,45 @@ static const char * const nand_ecc_modes[] = {
[NAND_ECC_ON_DIE] = "on-die",
};
-static int of_get_nand_ecc_mode(struct device_node *np)
+static enum nand_ecc_engine_type
+of_get_nand_ecc_engine_type(struct device_node *np)
{
+ enum nand_ecc_mode eng_type;
const char *pm;
- int err, i;
+ int err;
err = of_property_read_string(np, "nand-ecc-mode", &pm);
- if (err < 0)
- return err;
+ if (err)
+ return NAND_ECC_ENGINE_TYPE_INVALID;
- for (i = NAND_ECC_NONE; i < ARRAY_SIZE(nand_ecc_modes); i++)
- if (!strcasecmp(pm, nand_ecc_modes[i]))
- return i;
+ for (eng_type = NAND_ECC_NONE;
+ eng_type < ARRAY_SIZE(nand_ecc_modes); eng_type++) {
+ if (!strcasecmp(pm, nand_ecc_modes[eng_type])) {
+ switch (eng_type) {
+ case NAND_ECC_NONE:
+ return NAND_ECC_ENGINE_TYPE_NONE;
+ case NAND_ECC_SOFT:
+ return NAND_ECC_ENGINE_TYPE_SOFT;
+ case NAND_ECC_HW:
+ case NAND_ECC_HW_SYNDROME:
+ return NAND_ECC_ENGINE_TYPE_ON_HOST;
+ case NAND_ECC_ON_DIE:
+ return NAND_ECC_ENGINE_TYPE_ON_DIE;
+ default:
+ break;
+ }
+ }
+ }
/*
* For backward compatibility we support few obsoleted values that don't
- * have their mappings into the nand_ecc_mode enum anymore (they were
- * merged with other enums).
+ * have their mappings into the nand_ecc_engine_providers enum anymore
+ * (they were merged with other enums).
*/
if (!strcasecmp(pm, "soft_bch"))
- return NAND_ECC_SOFT;
+ return NAND_ECC_ENGINE_TYPE_SOFT;
- return -ENODEV;
+ return NAND_ECC_ENGINE_TYPE_INVALID;
}
static const char * const nand_ecc_algos[] = {
@@ -5121,8 +5138,9 @@ static bool of_get_nand_on_flash_bbt(struct device_node *np)
static int nand_dt_init(struct nand_chip *chip)
{
struct device_node *dn = nand_get_flash_node(chip);
+ enum nand_ecc_engine_type ecc_type;
enum nand_ecc_algo ecc_algo;
- int ecc_mode, ecc_strength, ecc_step;
+ int ecc_strength, ecc_step;
if (!dn)
return 0;
@@ -5136,13 +5154,13 @@ static int nand_dt_init(struct nand_chip *chip)
if (of_get_nand_on_flash_bbt(dn))
chip->bbt_options |= NAND_BBT_USE_FLASH;
- ecc_mode = of_get_nand_ecc_mode(dn);
+ ecc_type = of_get_nand_ecc_engine_type(dn);
ecc_algo = of_get_nand_ecc_algo(dn);
ecc_strength = of_get_nand_ecc_strength(dn);
ecc_step = of_get_nand_ecc_step_size(dn);
- if (ecc_mode >= 0)
- chip->ecc.mode = ecc_mode;
+ if (ecc_type != NAND_ECC_ENGINE_TYPE_INVALID)
+ chip->ecc.engine_type = ecc_type;
if (ecc_algo != NAND_ECC_ALGO_UNKNOWN)
chip->ecc.algo = ecc_algo;
@@ -5264,7 +5282,7 @@ static int nand_set_ecc_soft_ops(struct nand_chip *chip)
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_ecc_ctrl *ecc = &chip->ecc;
- if (WARN_ON(ecc->mode != NAND_ECC_SOFT))
+ if (WARN_ON(ecc->engine_type != NAND_ECC_ENGINE_TYPE_SOFT))
return -EINVAL;
switch (ecc->algo) {
@@ -5729,7 +5747,8 @@ static int nand_scan_tail(struct nand_chip *chip)
* If no default placement scheme is given, select an appropriate one.
*/
if (!mtd->ooblayout &&
- !(ecc->mode == NAND_ECC_SOFT && ecc->algo == NAND_ECC_ALGO_BCH)) {
+ !(ecc->engine_type == NAND_ECC_ENGINE_TYPE_SOFT &&
+ ecc->algo == NAND_ECC_ALGO_BCH)) {
switch (mtd->oobsize) {
case 8:
case 16:
@@ -5747,7 +5766,7 @@ static int nand_scan_tail(struct nand_chip *chip)
* page with ECC layout when ->oobsize <= 128 for
* compatibility reasons.
*/
- if (ecc->mode == NAND_ECC_NONE) {
+ if (ecc->engine_type == NAND_ECC_ENGINE_TYPE_NONE) {
mtd_set_ooblayout(mtd,
&nand_ooblayout_lp_ops);
break;
@@ -5765,8 +5784,9 @@ static int nand_scan_tail(struct nand_chip *chip)
* selected and we have 256 byte pagesize fallback to software ECC
*/
- switch (ecc->mode) {
- case NAND_ECC_HW:
+ switch (ecc->engine_type) {
+ case NAND_ECC_ENGINE_TYPE_ON_HOST:
+
switch (ecc->placement) {
case NAND_ECC_PLACEMENT_UNKNOWN:
case NAND_ECC_PLACEMENT_OOB:
@@ -5823,7 +5843,7 @@ static int nand_scan_tail(struct nand_chip *chip)
}
pr_warn("%d byte HW ECC not possible on %d byte page size, fallback to SW ECC\n",
ecc->size, mtd->writesize);
- ecc->mode = NAND_ECC_SOFT;
+ ecc->engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
ecc->algo = NAND_ECC_ALGO_HAMMING;
break;
@@ -5835,7 +5855,7 @@ static int nand_scan_tail(struct nand_chip *chip)
}
fallthrough;
- case NAND_ECC_SOFT:
+ case NAND_ECC_ENGINE_TYPE_SOFT:
ret = nand_set_ecc_soft_ops(chip);
if (ret) {
ret = -EINVAL;
@@ -5843,7 +5863,7 @@ static int nand_scan_tail(struct nand_chip *chip)
}
break;
- case NAND_ECC_ON_DIE:
+ case NAND_ECC_ENGINE_TYPE_ON_DIE:
if (!ecc->read_page || !ecc->write_page) {
WARN(1, "No ECC functions supplied; on-die ECC not possible\n");
ret = -EINVAL;
@@ -5855,8 +5875,8 @@ static int nand_scan_tail(struct nand_chip *chip)
ecc->write_oob = nand_write_oob_std;
break;
- case NAND_ECC_NONE:
- pr_warn("NAND_ECC_NONE selected by board driver. This is not recommended!\n");
+ case NAND_ECC_ENGINE_TYPE_NONE:
+ pr_warn("NAND_ECC_ENGINE_TYPE_NONE selected by board driver. This is not recommended!\n");
ecc->read_page = nand_read_page_raw;
ecc->write_page = nand_write_page_raw;
ecc->read_oob = nand_read_oob_std;
@@ -5869,7 +5889,7 @@ static int nand_scan_tail(struct nand_chip *chip)
break;
default:
- WARN(1, "Invalid NAND_ECC_MODE %d\n", ecc->mode);
+ WARN(1, "Invalid NAND_ECC_MODE %d\n", ecc->engine_type);
ret = -EINVAL;
goto err_nand_manuf_cleanup;
}
@@ -5946,8 +5966,8 @@ static int nand_scan_tail(struct nand_chip *chip)
chip->pagecache.page = -1;
/* Large page NAND with SOFT_ECC should support subpage reads */
- switch (ecc->mode) {
- case NAND_ECC_SOFT:
+ switch (ecc->engine_type) {
+ case NAND_ECC_ENGINE_TYPE_SOFT:
if (chip->page_shift > 9)
chip->options |= NAND_SUBPAGE_READ;
break;
@@ -6089,7 +6109,7 @@ EXPORT_SYMBOL(nand_scan_with_ids);
*/
void nand_cleanup(struct nand_chip *chip)
{
- if (chip->ecc.mode == NAND_ECC_SOFT &&
+ if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT &&
chip->ecc.algo == NAND_ECC_ALGO_BCH)
nand_bch_free((struct nand_bch_control *)chip->ecc.priv);
diff --git a/drivers/mtd/nand/raw/nand_micron.c b/drivers/mtd/nand/raw/nand_micron.c
index a43b4d17bc69..c8ebfd8c77a1 100644
--- a/drivers/mtd/nand/raw/nand_micron.c
+++ b/drivers/mtd/nand/raw/nand_micron.c
@@ -497,13 +497,13 @@ static int micron_nand_init(struct nand_chip *chip)
ondie = micron_supports_on_die_ecc(chip);
if (ondie == MICRON_ON_DIE_MANDATORY &&
- chip->ecc.mode != NAND_ECC_ON_DIE) {
+ chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_DIE) {
pr_err("On-die ECC forcefully enabled, not supported\n");
ret = -EINVAL;
goto err_free_manuf_data;
}
- if (chip->ecc.mode == NAND_ECC_ON_DIE) {
+ if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_DIE) {
if (ondie == MICRON_ON_DIE_UNSUPPORTED) {
pr_err("On-die ECC selected but not supported\n");
ret = -EINVAL;
diff --git a/drivers/mtd/nand/raw/nand_toshiba.c b/drivers/mtd/nand/raw/nand_toshiba.c
index ae069905d7e4..436ed90a90ad 100644
--- a/drivers/mtd/nand/raw/nand_toshiba.c
+++ b/drivers/mtd/nand/raw/nand_toshiba.c
@@ -211,7 +211,8 @@ static int toshiba_nand_init(struct nand_chip *chip)
chip->options |= NAND_BBM_FIRSTPAGE | NAND_BBM_SECONDPAGE;
/* Check that chip is BENAND and ECC mode is on-die */
- if (nand_is_slc(chip) && chip->ecc.mode == NAND_ECC_ON_DIE &&
+ if (nand_is_slc(chip) &&
+ chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_DIE &&
chip->id.data[4] & TOSHIBA_NAND_ID4_IS_BENAND)
toshiba_nand_benand_init(chip);
diff --git a/drivers/mtd/nand/raw/nandsim.c b/drivers/mtd/nand/raw/nandsim.c
index 9bcf1b9d4987..9c2115fe2111 100644
--- a/drivers/mtd/nand/raw/nandsim.c
+++ b/drivers/mtd/nand/raw/nandsim.c
@@ -2234,7 +2234,7 @@ static int ns_attach_chip(struct nand_chip *chip)
return -EINVAL;
}
- chip->ecc.mode = NAND_ECC_SOFT;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
chip->ecc.algo = NAND_ECC_ALGO_BCH;
chip->ecc.size = 512;
chip->ecc.strength = bch;
@@ -2274,7 +2274,7 @@ static int __init ns_init_module(void)
nsmtd = nand_to_mtd(chip);
nand_set_controller_data(chip, (void *)ns);
- chip->ecc.mode = NAND_ECC_SOFT;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
/* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
/* and 'badblocks' parameters to work */
diff --git a/drivers/mtd/nand/raw/ndfc.c b/drivers/mtd/nand/raw/ndfc.c
index ed38338c1383..0fb4ba93c41e 100644
--- a/drivers/mtd/nand/raw/ndfc.c
+++ b/drivers/mtd/nand/raw/ndfc.c
@@ -149,7 +149,7 @@ static int ndfc_chip_init(struct ndfc_controller *ndfc,
chip->ecc.correct = nand_correct_data;
chip->ecc.hwctl = ndfc_enable_hwecc;
chip->ecc.calculate = ndfc_calculate_ecc;
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->ecc.size = 256;
chip->ecc.bytes = 3;
chip->ecc.strength = 1;
diff --git a/drivers/mtd/nand/raw/omap2.c b/drivers/mtd/nand/raw/omap2.c
index 967ddbda1c48..512f60780a50 100644
--- a/drivers/mtd/nand/raw/omap2.c
+++ b/drivers/mtd/nand/raw/omap2.c
@@ -884,8 +884,8 @@ static int omap_correct_data(struct nand_chip *chip, u_char *dat,
int stat = 0;
/* Ex NAND_ECC_HW12_2048 */
- if ((info->nand.ecc.mode == NAND_ECC_HW) &&
- (info->nand.ecc.size == 2048))
+ if (info->nand.ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST &&
+ info->nand.ecc.size == 2048)
blockCnt = 4;
else
blockCnt = 1;
@@ -2006,11 +2006,11 @@ static int omap_nand_attach_chip(struct nand_chip *chip)
return -EINVAL;
/*
- * Bail out earlier to let NAND_ECC_SOFT code create its own
+ * Bail out earlier to let NAND_ECC_ENGINE_TYPE_SOFT code create its own
* ooblayout instead of using ours.
*/
if (info->ecc_opt == OMAP_ECC_HAM1_CODE_SW) {
- chip->ecc.mode = NAND_ECC_SOFT;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
return 0;
}
@@ -2019,7 +2019,7 @@ static int omap_nand_attach_chip(struct nand_chip *chip)
switch (info->ecc_opt) {
case OMAP_ECC_HAM1_CODE_HW:
dev_info(dev, "nand: using OMAP_ECC_HAM1_CODE_HW\n");
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->ecc.bytes = 3;
chip->ecc.size = 512;
chip->ecc.strength = 1;
@@ -2036,7 +2036,7 @@ static int omap_nand_attach_chip(struct nand_chip *chip)
case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW:
pr_info("nand: using OMAP_ECC_BCH4_CODE_HW_DETECTION_SW\n");
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->ecc.size = 512;
chip->ecc.bytes = 7;
chip->ecc.strength = 4;
@@ -2056,7 +2056,7 @@ static int omap_nand_attach_chip(struct nand_chip *chip)
case OMAP_ECC_BCH4_CODE_HW:
pr_info("nand: using OMAP_ECC_BCH4_CODE_HW ECC scheme\n");
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->ecc.size = 512;
/* 14th bit is kept reserved for ROM-code compatibility */
chip->ecc.bytes = 7 + 1;
@@ -2078,7 +2078,7 @@ static int omap_nand_attach_chip(struct nand_chip *chip)
case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
pr_info("nand: using OMAP_ECC_BCH8_CODE_HW_DETECTION_SW\n");
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->ecc.size = 512;
chip->ecc.bytes = 13;
chip->ecc.strength = 8;
@@ -2098,7 +2098,7 @@ static int omap_nand_attach_chip(struct nand_chip *chip)
case OMAP_ECC_BCH8_CODE_HW:
pr_info("nand: using OMAP_ECC_BCH8_CODE_HW ECC scheme\n");
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->ecc.size = 512;
/* 14th bit is kept reserved for ROM-code compatibility */
chip->ecc.bytes = 13 + 1;
@@ -2121,7 +2121,7 @@ static int omap_nand_attach_chip(struct nand_chip *chip)
case OMAP_ECC_BCH16_CODE_HW:
pr_info("Using OMAP_ECC_BCH16_CODE_HW ECC scheme\n");
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->ecc.size = 512;
chip->ecc.bytes = 26;
chip->ecc.strength = 16;
diff --git a/drivers/mtd/nand/raw/orion_nand.c b/drivers/mtd/nand/raw/orion_nand.c
index 7a5cfa3d883f..df9c0f8e4b4e 100644
--- a/drivers/mtd/nand/raw/orion_nand.c
+++ b/drivers/mtd/nand/raw/orion_nand.c
@@ -139,7 +139,7 @@ static int __init orion_nand_probe(struct platform_device *pdev)
nc->legacy.IO_ADDR_R = nc->legacy.IO_ADDR_W = io_base;
nc->legacy.cmd_ctrl = orion_nand_cmd_ctrl;
nc->legacy.read_buf = orion_nand_read_buf;
- nc->ecc.mode = NAND_ECC_SOFT;
+ nc->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
nc->ecc.algo = NAND_ECC_ALGO_HAMMING;
if (board->chip_delay)
diff --git a/drivers/mtd/nand/raw/pasemi_nand.c b/drivers/mtd/nand/raw/pasemi_nand.c
index 3eddc284614d..155e8c8f61e2 100644
--- a/drivers/mtd/nand/raw/pasemi_nand.c
+++ b/drivers/mtd/nand/raw/pasemi_nand.c
@@ -132,7 +132,7 @@ static int pasemi_nand_probe(struct platform_device *ofdev)
chip->legacy.read_buf = pasemi_read_buf;
chip->legacy.write_buf = pasemi_write_buf;
chip->legacy.chip_delay = 0;
- chip->ecc.mode = NAND_ECC_SOFT;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
/* Enable the following for a flash based bad block table */
diff --git a/drivers/mtd/nand/raw/plat_nand.c b/drivers/mtd/nand/raw/plat_nand.c
index dbc089c8872f..b98c0d5c413f 100644
--- a/drivers/mtd/nand/raw/plat_nand.c
+++ b/drivers/mtd/nand/raw/plat_nand.c
@@ -66,7 +66,7 @@ static int plat_nand_probe(struct platform_device *pdev)
data->chip.options |= pdata->chip.options;
data->chip.bbt_options |= pdata->chip.bbt_options;
- data->chip.ecc.mode = NAND_ECC_SOFT;
+ data->chip.ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
data->chip.ecc.algo = NAND_ECC_ALGO_HAMMING;
platform_set_drvdata(pdev, data);
diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
index f1daf330951b..0a05674b3ab5 100644
--- a/drivers/mtd/nand/raw/qcom_nandc.c
+++ b/drivers/mtd/nand/raw/qcom_nandc.c
@@ -2548,7 +2548,7 @@ static int qcom_nand_attach_chip(struct nand_chip *chip)
ecc->write_page_raw = qcom_nandc_write_page_raw;
ecc->write_oob = qcom_nandc_write_oob;
- ecc->mode = NAND_ECC_HW;
+ ecc->engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
mtd_set_ooblayout(mtd, &qcom_nand_ooblayout_ops);
diff --git a/drivers/mtd/nand/raw/r852.c b/drivers/mtd/nand/raw/r852.c
index f0988cda4479..6b7addd2c420 100644
--- a/drivers/mtd/nand/raw/r852.c
+++ b/drivers/mtd/nand/raw/r852.c
@@ -859,7 +859,7 @@ static int r852_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
chip->legacy.write_buf = r852_write_buf;
/* ecc */
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->ecc.placement = NAND_ECC_PLACEMENT_INTERLEAVED;
chip->ecc.size = R852_DMA_LEN;
chip->ecc.bytes = SM_OOB_SIZE;
diff --git a/drivers/mtd/nand/raw/s3c2410.c b/drivers/mtd/nand/raw/s3c2410.c
index dfe5a0f07385..88301fd29729 100644
--- a/drivers/mtd/nand/raw/s3c2410.c
+++ b/drivers/mtd/nand/raw/s3c2410.c
@@ -904,7 +904,7 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
nmtd->info = info;
nmtd->set = set;
- chip->ecc.mode = info->platform->ecc_mode;
+ chip->ecc.engine_type = info->platform->engine_type;
/*
* If you use u-boot BBT creation code, specifying this flag will
@@ -929,24 +929,24 @@ static int s3c2410_nand_attach_chip(struct nand_chip *chip)
struct mtd_info *mtd = nand_to_mtd(chip);
struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
- switch (chip->ecc.mode) {
+ switch (chip->ecc.engine_type) {
- case NAND_ECC_NONE:
+ case NAND_ECC_ENGINE_TYPE_NONE:
dev_info(info->device, "ECC disabled\n");
break;
- case NAND_ECC_SOFT:
+ case NAND_ECC_ENGINE_TYPE_SOFT:
/*
- * This driver expects Hamming based ECC when ecc_mode is set
- * to NAND_ECC_SOFT. Force ecc.algo to NAND_ECC_ALGO_HAMMING to
- * avoid adding an extra ecc_algo field to
- * s3c2410_platform_nand.
+ * This driver expects Hamming based ECC when engine_type is set
+ * to NAND_ECC_ENGINE_TYPE_SOFT. Force ecc.algo to
+ * NAND_ECC_ALGO_HAMMING to avoid adding an extra ecc_algo field
+ * to s3c2410_platform_nand.
*/
chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
dev_info(info->device, "soft ECC\n");
break;
- case NAND_ECC_HW:
+ case NAND_ECC_ENGINE_TYPE_ON_HOST:
chip->ecc.calculate = s3c2410_nand_calculate_ecc;
chip->ecc.correct = s3c2410_nand_correct_data;
chip->ecc.strength = 1;
diff --git a/drivers/mtd/nand/raw/sh_flctl.c b/drivers/mtd/nand/raw/sh_flctl.c
index 9dbd6fdbe264..13df4bdf792a 100644
--- a/drivers/mtd/nand/raw/sh_flctl.c
+++ b/drivers/mtd/nand/raw/sh_flctl.c
@@ -1039,12 +1039,12 @@ static int flctl_chip_attach_chip(struct nand_chip *chip)
chip->ecc.strength = 4;
chip->ecc.read_page = flctl_read_page_hwecc;
chip->ecc.write_page = flctl_write_page_hwecc;
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
/* 4 symbols ECC enabled */
flctl->flcmncr_base |= _4ECCEN;
} else {
- chip->ecc.mode = NAND_ECC_SOFT;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
}
diff --git a/drivers/mtd/nand/raw/sharpsl.c b/drivers/mtd/nand/raw/sharpsl.c
index 51286f7acf54..1327bfb3d5d3 100644
--- a/drivers/mtd/nand/raw/sharpsl.c
+++ b/drivers/mtd/nand/raw/sharpsl.c
@@ -157,7 +157,7 @@ static int sharpsl_nand_probe(struct platform_device *pdev)
/* 15 us command delay time */
this->legacy.chip_delay = 15;
/* set eccmode using hardware ECC */
- this->ecc.mode = NAND_ECC_HW;
+ this->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
this->ecc.size = 256;
this->ecc.bytes = 3;
this->ecc.strength = 1;
diff --git a/drivers/mtd/nand/raw/socrates_nand.c b/drivers/mtd/nand/raw/socrates_nand.c
index 72a3a7f98282..0f63ff6f7fe7 100644
--- a/drivers/mtd/nand/raw/socrates_nand.c
+++ b/drivers/mtd/nand/raw/socrates_nand.c
@@ -153,7 +153,8 @@ static int socrates_nand_probe(struct platform_device *ofdev)
nand_chip->legacy.read_buf = socrates_nand_read_buf;
nand_chip->legacy.dev_ready = socrates_nand_device_ready;
- nand_chip->ecc.mode = NAND_ECC_SOFT; /* enable ECC */
+ /* enable ECC */
+ nand_chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
nand_chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
/* TODO: I have no idea what real delay is. */
diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
index 65c9d17b25a3..d4f016d9251f 100644
--- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
+++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
@@ -1725,14 +1725,15 @@ static int stm32_fmc2_nfc_attach_chip(struct nand_chip *chip)
int ret;
/*
- * Only NAND_ECC_HW mode is actually supported
+ * Only NAND_ECC_ENGINE_TYPE_ON_HOST mode is actually supported
* Hamming => ecc.strength = 1
* BCH4 => ecc.strength = 4
* BCH8 => ecc.strength = 8
* ECC sector size = 512
*/
- if (chip->ecc.mode != NAND_ECC_HW) {
- dev_err(nfc->dev, "nand_ecc_mode is not well defined in the DT\n");
+ if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST) {
+ dev_err(nfc->dev,
+ "nand_ecc_engine_type is not well defined in the DT\n");
return -EINVAL;
}
@@ -1942,7 +1943,7 @@ static int stm32_fmc2_nfc_probe(struct platform_device *pdev)
NAND_USES_DMA;
/* Default ECC settings */
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->ecc.size = FMC2_ECC_STEP_SIZE;
chip->ecc.strength = FMC2_ECC_BCH8;
diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index ffbc1651fadc..c6dd2e6d9ef8 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -1575,7 +1575,7 @@ static int sunxi_nand_ooblayout_free(struct mtd_info *mtd, int section,
* only have 2 bytes available in the first user data
* section.
*/
- if (!section && ecc->mode == NAND_ECC_HW) {
+ if (!section && ecc->engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST) {
oobregion->offset = 2;
oobregion->length = 2;
@@ -1720,11 +1720,11 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_chip *nand,
static void sunxi_nand_ecc_cleanup(struct nand_ecc_ctrl *ecc)
{
- switch (ecc->mode) {
- case NAND_ECC_HW:
+ switch (ecc->engine_type) {
+ case NAND_ECC_ENGINE_TYPE_ON_HOST:
sunxi_nand_hw_ecc_ctrl_cleanup(ecc);
break;
- case NAND_ECC_NONE:
+ case NAND_ECC_ENGINE_TYPE_NONE:
default:
break;
}
@@ -1752,14 +1752,14 @@ static int sunxi_nand_attach_chip(struct nand_chip *nand)
if (!ecc->size || !ecc->strength)
return -EINVAL;
- switch (ecc->mode) {
- case NAND_ECC_HW:
+ switch (ecc->engine_type) {
+ case NAND_ECC_ENGINE_TYPE_ON_HOST:
ret = sunxi_nand_hw_ecc_ctrl_init(nand, ecc, np);
if (ret)
return ret;
break;
- case NAND_ECC_NONE:
- case NAND_ECC_SOFT:
+ case NAND_ECC_ENGINE_TYPE_NONE:
+ case NAND_ECC_ENGINE_TYPE_SOFT:
break;
default:
return -EINVAL;
@@ -1991,7 +1991,7 @@ static int sunxi_nand_chip_init(struct device *dev, struct sunxi_nfc *nfc,
* Set the ECC mode to the default value in case nothing is specified
* in the DT.
*/
- nand->ecc.mode = NAND_ECC_HW;
+ nand->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
nand_set_flash_node(nand, np);
mtd = nand_to_mtd(nand);
diff --git a/drivers/mtd/nand/raw/tango_nand.c b/drivers/mtd/nand/raw/tango_nand.c
index 2154b6f860dd..b0872b9cd768 100644
--- a/drivers/mtd/nand/raw/tango_nand.c
+++ b/drivers/mtd/nand/raw/tango_nand.c
@@ -511,7 +511,7 @@ static int tango_attach_chip(struct nand_chip *chip)
{
struct nand_ecc_ctrl *ecc = &chip->ecc;
- ecc->mode = NAND_ECC_HW;
+ ecc->engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
ecc->algo = NAND_ECC_ALGO_BCH;
ecc->bytes = DIV_ROUND_UP(ecc->strength * FIELD_ORDER, BITS_PER_BYTE);
diff --git a/drivers/mtd/nand/raw/tegra_nand.c b/drivers/mtd/nand/raw/tegra_nand.c
index e2e13effc8a6..2325b06ccc9a 100644
--- a/drivers/mtd/nand/raw/tegra_nand.c
+++ b/drivers/mtd/nand/raw/tegra_nand.c
@@ -916,7 +916,7 @@ static int tegra_nand_attach_chip(struct nand_chip *chip)
if (chip->bbt_options & NAND_BBT_USE_FLASH)
chip->bbt_options |= NAND_BBT_NO_OOB;
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->ecc.size = 512;
chip->ecc.steps = mtd->writesize / chip->ecc.size;
if (chip->base.eccreq.step_size != 512) {
diff --git a/drivers/mtd/nand/raw/tmio_nand.c b/drivers/mtd/nand/raw/tmio_nand.c
index 843a8683b737..235a2f7b1bad 100644
--- a/drivers/mtd/nand/raw/tmio_nand.c
+++ b/drivers/mtd/nand/raw/tmio_nand.c
@@ -410,7 +410,7 @@ static int tmio_probe(struct platform_device *dev)
nand_chip->legacy.read_buf = tmio_nand_read_buf;
/* set eccmode using hardware ECC */
- nand_chip->ecc.mode = NAND_ECC_HW;
+ nand_chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
nand_chip->ecc.size = 512;
nand_chip->ecc.bytes = 6;
nand_chip->ecc.strength = 2;
diff --git a/drivers/mtd/nand/raw/txx9ndfmc.c b/drivers/mtd/nand/raw/txx9ndfmc.c
index 47d966871445..ef81dce6b5c4 100644
--- a/drivers/mtd/nand/raw/txx9ndfmc.c
+++ b/drivers/mtd/nand/raw/txx9ndfmc.c
@@ -329,7 +329,7 @@ static int __init txx9ndfmc_probe(struct platform_device *dev)
chip->ecc.calculate = txx9ndfmc_calculate_ecc;
chip->ecc.correct = txx9ndfmc_correct_data;
chip->ecc.hwctl = txx9ndfmc_enable_hwecc;
- chip->ecc.mode = NAND_ECC_HW;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->ecc.strength = 1;
chip->legacy.chip_delay = 100;
chip->controller = &drvdata->controller;
diff --git a/drivers/mtd/nand/raw/vf610_nfc.c b/drivers/mtd/nand/raw/vf610_nfc.c
index 7248c5901183..8ee2c1f539c4 100644
--- a/drivers/mtd/nand/raw/vf610_nfc.c
+++ b/drivers/mtd/nand/raw/vf610_nfc.c
@@ -732,7 +732,7 @@ static void vf610_nfc_init_controller(struct vf610_nfc *nfc)
else
vf610_nfc_clear(nfc, NFC_FLASH_CONFIG, CONFIG_16BIT);
- if (nfc->chip.ecc.mode == NAND_ECC_HW) {
+ if (nfc->chip.ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST) {
/* Set ECC status offset in SRAM */
vf610_nfc_set_field(nfc, NFC_FLASH_CONFIG,
CONFIG_ECC_SRAM_ADDR_MASK,
@@ -761,7 +761,7 @@ static int vf610_nfc_attach_chip(struct nand_chip *chip)
return -ENXIO;
}
- if (chip->ecc.mode != NAND_ECC_HW)
+ if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
return 0;
if (mtd->writesize != PAGE_2K && mtd->oobsize < 64) {
diff --git a/drivers/mtd/nand/raw/xway_nand.c b/drivers/mtd/nand/raw/xway_nand.c
index 909072e82a68..3332c9aa462a 100644
--- a/drivers/mtd/nand/raw/xway_nand.c
+++ b/drivers/mtd/nand/raw/xway_nand.c
@@ -180,7 +180,7 @@ static int xway_nand_probe(struct platform_device *pdev)
data->chip.legacy.read_byte = xway_read_byte;
data->chip.legacy.chip_delay = 30;
- data->chip.ecc.mode = NAND_ECC_SOFT;
+ data->chip.ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
data->chip.ecc.algo = NAND_ECC_ALGO_HAMMING;
platform_set_drvdata(pdev, data);
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 63aa061427bb..8f7f1cce3b4b 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -303,7 +303,7 @@ static const struct nand_ecc_caps __name = { \
/**
* struct nand_ecc_ctrl - Control structure for ECC
- * @mode: ECC mode
+ * @engine_type: ECC engine type
* @placement: OOB bytes placement
* @algo: ECC algorithm
* @steps: number of ECC steps per page
@@ -356,7 +356,7 @@ static const struct nand_ecc_caps __name = { \
* @write_oob: function to write chip OOB data
*/
struct nand_ecc_ctrl {
- enum nand_ecc_mode mode;
+ enum nand_ecc_engine_type engine_type;
enum nand_ecc_placement placement;
enum nand_ecc_algo algo;
int steps;
diff --git a/include/linux/platform_data/mtd-davinci.h b/include/linux/platform_data/mtd-davinci.h
index 6e2b252a4ce6..dd474dd44848 100644
--- a/include/linux/platform_data/mtd-davinci.h
+++ b/include/linux/platform_data/mtd-davinci.h
@@ -60,15 +60,15 @@ struct davinci_nand_pdata { /* platform_data */
struct mtd_partition *parts;
unsigned nr_parts;
- /* none == NAND_ECC_NONE (strongly *not* advised!!)
- * soft == NAND_ECC_SOFT
- * else == NAND_ECC_HW, according to ecc_bits
+ /* none == NAND_ECC_ENGINE_TYPE_NONE (strongly *not* advised!!)
+ * soft == NAND_ECC_ENGINE_TYPE_SOFT
+ * else == NAND_ECC_ENGINE_TYPE_ON_HOST, according to ecc_bits
*
* All DaVinci-family chips support 1-bit hardware ECC.
* Newer ones also support 4-bit ECC, but are awkward
* using it with large page chips.
*/
- enum nand_ecc_mode ecc_mode;
+ enum nand_ecc_engine_type engine_type;
enum nand_ecc_placement ecc_placement;
u8 ecc_bits;
diff --git a/include/linux/platform_data/mtd-nand-s3c2410.h b/include/linux/platform_data/mtd-nand-s3c2410.h
index 08675b16f9e1..25390fc3e795 100644
--- a/include/linux/platform_data/mtd-nand-s3c2410.h
+++ b/include/linux/platform_data/mtd-nand-s3c2410.h
@@ -49,7 +49,7 @@ struct s3c2410_platform_nand {
unsigned int ignore_unset_ecc:1;
- enum nand_ecc_mode ecc_mode;
+ enum nand_ecc_engine_type engine_type;
int nr_sets;
struct s3c2410_nand_set *sets;
--
2.20.1
^ permalink raw reply related
* [PATCH v10 14/20] mtd: rawnand: Use nanddev_get/set_ecc_requirements() when relevant
From: Miquel Raynal @ 2020-06-03 17:57 UTC (permalink / raw)
To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus, linux-mtd
Cc: Boris Brezillon, Thomas Petazzoni, linux-arm-kernel, Mason Yang,
Julien Su, Rob Herring, Mark Rutland, devicetree, Miquel Raynal
In-Reply-To: <20200603175759.19948-1-miquel.raynal@bootlin.com>
Instead of accessing ->strength/step_size directly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/atmel/nand-controller.c | 10 +++--
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 8 ++--
drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 13 +++---
drivers/mtd/nand/raw/marvell_nand.c | 8 ++--
drivers/mtd/nand/raw/mtk_nand.c | 6 ++-
drivers/mtd/nand/raw/nand_base.c | 27 +++++++-----
drivers/mtd/nand/raw/nand_esmt.c | 15 ++++---
drivers/mtd/nand/raw/nand_hynix.c | 44 +++++++++++---------
drivers/mtd/nand/raw/nand_jedec.c | 9 +++-
drivers/mtd/nand/raw/nand_micron.c | 17 +++++---
drivers/mtd/nand/raw/nand_onfi.c | 17 ++++++--
drivers/mtd/nand/raw/nand_samsung.c | 22 ++++++----
drivers/mtd/nand/raw/nand_toshiba.c | 14 ++++---
drivers/mtd/nand/raw/sunxi_nand.c | 6 ++-
drivers/mtd/nand/raw/tegra_nand.c | 12 ++++--
drivers/mtd/nand/spi/core.c | 2 +-
16 files changed, 144 insertions(+), 86 deletions(-)
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 85cf396731ce..3fba91d7991a 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1043,6 +1043,8 @@ static int atmel_hsmc_nand_pmecc_read_page_raw(struct nand_chip *chip,
static int atmel_nand_pmecc_init(struct nand_chip *chip)
{
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&chip->base);
struct mtd_info *mtd = nand_to_mtd(chip);
struct atmel_nand *nand = to_atmel_nand(chip);
struct atmel_nand_controller *nc;
@@ -1072,15 +1074,15 @@ static int atmel_nand_pmecc_init(struct nand_chip *chip)
req.ecc.strength = ATMEL_PMECC_MAXIMIZE_ECC_STRENGTH;
else if (chip->ecc.strength)
req.ecc.strength = chip->ecc.strength;
- else if (chip->base.eccreq.strength)
- req.ecc.strength = chip->base.eccreq.strength;
+ else if (requirements->strength)
+ req.ecc.strength = requirements->strength;
else
req.ecc.strength = ATMEL_PMECC_MAXIMIZE_ECC_STRENGTH;
if (chip->ecc.size)
req.ecc.sectorsize = chip->ecc.size;
- else if (chip->base.eccreq.step_size)
- req.ecc.sectorsize = chip->base.eccreq.step_size;
+ else if (requirements->step_size)
+ req.ecc.sectorsize = requirements->step_size;
else
req.ecc.sectorsize = ATMEL_PMECC_SECTOR_SIZE_AUTO;
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 164617b33942..a774247b0caa 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -2506,6 +2506,8 @@ static int brcmnand_setup_dev(struct brcmnand_host *host)
{
struct mtd_info *mtd = nand_to_mtd(&host->chip);
struct nand_chip *chip = &host->chip;
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&chip->base);
struct brcmnand_controller *ctrl = host->ctrl;
struct brcmnand_cfg *cfg = &host->hwcfg;
char msg[128];
@@ -2563,10 +2565,10 @@ static int brcmnand_setup_dev(struct brcmnand_host *host)
if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_NONE &&
(!chip->ecc.size || !chip->ecc.strength)) {
- if (chip->base.eccreq.step_size && chip->base.eccreq.strength) {
+ if (requirements->step_size && requirements->strength) {
/* use detected ECC parameters */
- chip->ecc.size = chip->base.eccreq.step_size;
- chip->ecc.strength = chip->base.eccreq.strength;
+ chip->ecc.size = requirements->step_size;
+ chip->ecc.strength = requirements->strength;
dev_info(ctrl->dev, "Using ECC step-size %d, strength %d\n",
chip->ecc.size, chip->ecc.strength);
}
diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
index d1ea6df9fd64..2bdcbc3197f7 100644
--- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
@@ -272,8 +272,8 @@ static int set_geometry_by_ecc_info(struct gpmi_nand_data *this,
default:
dev_err(this->dev,
"unsupported nand chip. ecc bits : %d, ecc size : %d\n",
- chip->base.eccreq.strength,
- chip->base.eccreq.step_size);
+ nanddev_get_ecc_requirements(&chip->base)->strength,
+ nanddev_get_ecc_requirements(&chip->base)->step_size);
return -EINVAL;
}
geo->ecc_chunk_size = ecc_step;
@@ -509,6 +509,8 @@ static int legacy_set_geometry(struct gpmi_nand_data *this)
static int common_nfc_set_geometry(struct gpmi_nand_data *this)
{
+ struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&chip->base);
struct nand_chip *chip = &this->nand;
if (chip->ecc.strength > 0 && chip->ecc.size > 0)
@@ -517,13 +519,12 @@ static int common_nfc_set_geometry(struct gpmi_nand_data *this)
if ((of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc"))
|| legacy_set_geometry(this)) {
- if (!(chip->base.eccreq.strength > 0 &&
- chip->base.eccreq.step_size > 0))
+ if (!(requirements->strength > 0 && requirements->step_size > 0))
return -EINVAL;
return set_geometry_by_ecc_info(this,
- chip->base.eccreq.strength,
- chip->base.eccreq.step_size);
+ requirements->strength,
+ requirements->step_size);
}
return 0;
diff --git a/drivers/mtd/nand/raw/marvell_nand.c b/drivers/mtd/nand/raw/marvell_nand.c
index f9cc03c11deb..3ed315dd7798 100644
--- a/drivers/mtd/nand/raw/marvell_nand.c
+++ b/drivers/mtd/nand/raw/marvell_nand.c
@@ -2244,14 +2244,16 @@ static int marvell_nand_ecc_init(struct mtd_info *mtd,
struct nand_ecc_ctrl *ecc)
{
struct nand_chip *chip = mtd_to_nand(mtd);
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&chip->base);
struct marvell_nfc *nfc = to_marvell_nfc(chip->controller);
int ret;
if (ecc->engine_type != NAND_ECC_ENGINE_TYPE_NONE &&
(!ecc->size || !ecc->strength)) {
- if (chip->base.eccreq.step_size && chip->base.eccreq.strength) {
- ecc->size = chip->base.eccreq.step_size;
- ecc->strength = chip->base.eccreq.strength;
+ if (requirements->step_size && requirements->strength) {
+ ecc->size = requirements->step_size;
+ ecc->strength = requirements->strength;
} else {
dev_info(nfc->dev,
"No minimum ECC strength, using 1b/512B\n");
diff --git a/drivers/mtd/nand/raw/mtk_nand.c b/drivers/mtd/nand/raw/mtk_nand.c
index a0294c9161dd..c7b1230110d8 100644
--- a/drivers/mtd/nand/raw/mtk_nand.c
+++ b/drivers/mtd/nand/raw/mtk_nand.c
@@ -1221,6 +1221,8 @@ static int mtk_nfc_set_spare_per_sector(u32 *sps, struct mtd_info *mtd)
static int mtk_nfc_ecc_init(struct device *dev, struct mtd_info *mtd)
{
struct nand_chip *nand = mtd_to_nand(mtd);
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&nand->base);
struct mtk_nfc *nfc = nand_get_controller_data(nand);
u32 spare;
int free, ret;
@@ -1234,8 +1236,8 @@ static int mtk_nfc_ecc_init(struct device *dev, struct mtd_info *mtd)
/* if optional dt settings not present */
if (!nand->ecc.size || !nand->ecc.strength) {
/* use datasheet requirements */
- nand->ecc.strength = nand->base.eccreq.strength;
- nand->ecc.size = nand->base.eccreq.step_size;
+ nand->ecc.strength = requirements->strength;
+ nand->ecc.size = requirements->step_size;
/*
* align eccstrength and eccsize
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 2821c82b79ad..d22f4243d715 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -4725,6 +4725,8 @@ static inline bool is_full_id_nand(struct nand_flash_dev *type)
static bool find_full_id_nand(struct nand_chip *chip,
struct nand_flash_dev *type)
{
+ struct nand_device *base = &chip->base;
+ struct nand_ecc_props requirements;
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_memory_organization *memorg;
u8 *id_data = chip->id.data;
@@ -4746,8 +4748,9 @@ static bool find_full_id_nand(struct nand_chip *chip,
memorg->pagesize *
memorg->pages_per_eraseblock);
chip->options |= type->options;
- chip->base.eccreq.strength = NAND_ECC_STRENGTH(type);
- chip->base.eccreq.step_size = NAND_ECC_STEP(type);
+ requirements.strength = NAND_ECC_STRENGTH(type);
+ requirements.step_size = NAND_ECC_STEP(type);
+ nanddev_set_ecc_requirements(base, &requirements);
chip->onfi_timing_mode_default =
type->onfi_timing_mode_default;
@@ -5449,10 +5452,12 @@ static int
nand_match_ecc_req(struct nand_chip *chip,
const struct nand_ecc_caps *caps, int oobavail)
{
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&chip->base);
struct mtd_info *mtd = nand_to_mtd(chip);
const struct nand_ecc_step_info *stepinfo;
- int req_step = chip->base.eccreq.step_size;
- int req_strength = chip->base.eccreq.strength;
+ int req_step = requirements->step_size;
+ int req_strength = requirements->strength;
int req_corr, step_size, strength, nsteps, ecc_bytes, ecc_bytes_total;
int best_step, best_strength, best_ecc_bytes;
int best_ecc_bytes_total = INT_MAX;
@@ -5643,9 +5648,11 @@ static bool nand_ecc_strength_good(struct nand_chip *chip)
{
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_ecc_ctrl *ecc = &chip->ecc;
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&chip->base);
int corr, ds_corr;
- if (ecc->size == 0 || chip->base.eccreq.step_size == 0)
+ if (ecc->size == 0 || requirements->step_size == 0)
/* Not enough information */
return true;
@@ -5654,10 +5661,10 @@ static bool nand_ecc_strength_good(struct nand_chip *chip)
* the correction density.
*/
corr = (mtd->writesize * ecc->strength) / ecc->size;
- ds_corr = (mtd->writesize * chip->base.eccreq.strength) /
- chip->base.eccreq.step_size;
+ ds_corr = (mtd->writesize * requirements->strength) /
+ requirements->step_size;
- return corr >= ds_corr && ecc->strength >= chip->base.eccreq.strength;
+ return corr >= ds_corr && ecc->strength >= requirements->strength;
}
static int rawnand_erase(struct nand_device *nand, const struct nand_pos *pos)
@@ -5944,8 +5951,8 @@ static int nand_scan_tail(struct nand_chip *chip)
if (!nand_ecc_strength_good(chip))
pr_warn("WARNING: %s: the ECC used on your system (%db/%dB) is too weak compared to the one required by the NAND chip (%db/%dB)\n",
mtd->name, chip->ecc.strength, chip->ecc.size,
- chip->base.eccreq.strength,
- chip->base.eccreq.step_size);
+ nanddev_get_ecc_requirements(&chip->base)->strength,
+ nanddev_get_ecc_requirements(&chip->base)->step_size);
/* Allow subpage writes up to ecc.steps. Not possible for MLC flash */
if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) {
diff --git a/drivers/mtd/nand/raw/nand_esmt.c b/drivers/mtd/nand/raw/nand_esmt.c
index 3338c68aaaf1..4412c407aef3 100644
--- a/drivers/mtd/nand/raw/nand_esmt.c
+++ b/drivers/mtd/nand/raw/nand_esmt.c
@@ -10,27 +10,32 @@
static void esmt_nand_decode_id(struct nand_chip *chip)
{
+ struct nand_device *base = &chip->base;
+ struct nand_ecc_props requirements = {};
+
nand_decode_ext_id(chip);
/* Extract ECC requirements from 5th id byte. */
if (chip->id.len >= 5 && nand_is_slc(chip)) {
- chip->base.eccreq.step_size = 512;
+ requirements.step_size = 512;
switch (chip->id.data[4] & 0x3) {
case 0x0:
- chip->base.eccreq.strength = 4;
+ requirements.strength = 4;
break;
case 0x1:
- chip->base.eccreq.strength = 2;
+ requirements.strength = 2;
break;
case 0x2:
- chip->base.eccreq.strength = 1;
+ requirements.strength = 1;
break;
default:
WARN(1, "Could not get ECC info");
- chip->base.eccreq.step_size = 0;
+ requirements.step_size = 0;
break;
}
}
+
+ nanddev_set_ecc_requirements(base, &requirements);
}
static int esmt_nand_init(struct nand_chip *chip)
diff --git a/drivers/mtd/nand/raw/nand_hynix.c b/drivers/mtd/nand/raw/nand_hynix.c
index 7caedaa5b9e5..697219f1006a 100644
--- a/drivers/mtd/nand/raw/nand_hynix.c
+++ b/drivers/mtd/nand/raw/nand_hynix.c
@@ -495,34 +495,36 @@ static void hynix_nand_extract_oobsize(struct nand_chip *chip,
static void hynix_nand_extract_ecc_requirements(struct nand_chip *chip,
bool valid_jedecid)
{
+ struct nand_device *base = &chip->base;
+ struct nand_ecc_props requirements = {};
u8 ecc_level = (chip->id.data[4] >> 4) & 0x7;
if (valid_jedecid) {
/* Reference: H27UCG8T2E datasheet */
- chip->base.eccreq.step_size = 1024;
+ requirements.step_size = 1024;
switch (ecc_level) {
case 0:
- chip->base.eccreq.step_size = 0;
- chip->base.eccreq.strength = 0;
+ requirements.step_size = 0;
+ requirements.strength = 0;
break;
case 1:
- chip->base.eccreq.strength = 4;
+ requirements.strength = 4;
break;
case 2:
- chip->base.eccreq.strength = 24;
+ requirements.strength = 24;
break;
case 3:
- chip->base.eccreq.strength = 32;
+ requirements.strength = 32;
break;
case 4:
- chip->base.eccreq.strength = 40;
+ requirements.strength = 40;
break;
case 5:
- chip->base.eccreq.strength = 50;
+ requirements.strength = 50;
break;
case 6:
- chip->base.eccreq.strength = 60;
+ requirements.strength = 60;
break;
default:
/*
@@ -543,14 +545,14 @@ static void hynix_nand_extract_ecc_requirements(struct nand_chip *chip,
if (nand_tech < 3) {
/* > 26nm, reference: H27UBG8T2A datasheet */
if (ecc_level < 5) {
- chip->base.eccreq.step_size = 512;
- chip->base.eccreq.strength = 1 << ecc_level;
+ requirements.step_size = 512;
+ requirements.strength = 1 << ecc_level;
} else if (ecc_level < 7) {
if (ecc_level == 5)
- chip->base.eccreq.step_size = 2048;
+ requirements.step_size = 2048;
else
- chip->base.eccreq.step_size = 1024;
- chip->base.eccreq.strength = 24;
+ requirements.step_size = 1024;
+ requirements.strength = 24;
} else {
/*
* We should never reach this case, but if that
@@ -563,18 +565,20 @@ static void hynix_nand_extract_ecc_requirements(struct nand_chip *chip,
} else {
/* <= 26nm, reference: H27UBG8T2B datasheet */
if (!ecc_level) {
- chip->base.eccreq.step_size = 0;
- chip->base.eccreq.strength = 0;
+ requirements.step_size = 0;
+ requirements.strength = 0;
} else if (ecc_level < 5) {
- chip->base.eccreq.step_size = 512;
- chip->base.eccreq.strength = 1 << (ecc_level - 1);
+ requirements.step_size = 512;
+ requirements.strength = 1 << (ecc_level - 1);
} else {
- chip->base.eccreq.step_size = 1024;
- chip->base.eccreq.strength = 24 +
+ requirements.step_size = 1024;
+ requirements.strength = 24 +
(8 * (ecc_level - 5));
}
}
}
+
+ nanddev_set_ecc_requirements(base, &requirements);
}
static void hynix_nand_extract_scrambling_requirements(struct nand_chip *chip,
diff --git a/drivers/mtd/nand/raw/nand_jedec.c b/drivers/mtd/nand/raw/nand_jedec.c
index b15c42f48755..85b6d9372d80 100644
--- a/drivers/mtd/nand/raw/nand_jedec.c
+++ b/drivers/mtd/nand/raw/nand_jedec.c
@@ -23,6 +23,7 @@
*/
int nand_jedec_detect(struct nand_chip *chip)
{
+ struct nand_device *base = &chip->base;
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_memory_organization *memorg;
struct nand_jedec_params *p;
@@ -120,8 +121,12 @@ int nand_jedec_detect(struct nand_chip *chip)
ecc = &p->ecc_info[0];
if (ecc->codeword_size >= 9) {
- chip->base.eccreq.strength = ecc->ecc_bits;
- chip->base.eccreq.step_size = 1 << ecc->codeword_size;
+ struct nand_ecc_props requirements = {
+ .strength = ecc->ecc_bits,
+ .step_size = 1 << ecc->codeword_size,
+ };
+
+ nanddev_set_ecc_requirements(base, &requirements);
} else {
pr_warn("Invalid codeword size\n");
}
diff --git a/drivers/mtd/nand/raw/nand_micron.c b/drivers/mtd/nand/raw/nand_micron.c
index c8ebfd8c77a1..e19f992138f3 100644
--- a/drivers/mtd/nand/raw/nand_micron.c
+++ b/drivers/mtd/nand/raw/nand_micron.c
@@ -413,6 +413,8 @@ enum {
*/
static int micron_supports_on_die_ecc(struct nand_chip *chip)
{
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&chip->base);
u8 id[5];
int ret;
@@ -425,7 +427,7 @@ static int micron_supports_on_die_ecc(struct nand_chip *chip)
/*
* We only support on-die ECC of 4/512 or 8/512
*/
- if (chip->base.eccreq.strength != 4 && chip->base.eccreq.strength != 8)
+ if (requirements->strength != 4 && requirements->strength != 8)
return MICRON_ON_DIE_UNSUPPORTED;
/* 0x2 means on-die ECC is available. */
@@ -466,7 +468,7 @@ static int micron_supports_on_die_ecc(struct nand_chip *chip)
/*
* We only support on-die ECC of 4/512 or 8/512
*/
- if (chip->base.eccreq.strength != 4 && chip->base.eccreq.strength != 8)
+ if (requirements->strength != 4 && requirements->strength != 8)
return MICRON_ON_DIE_UNSUPPORTED;
return MICRON_ON_DIE_SUPPORTED;
@@ -474,6 +476,9 @@ static int micron_supports_on_die_ecc(struct nand_chip *chip)
static int micron_nand_init(struct nand_chip *chip)
{
+ struct nand_device *base = &chip->base;
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(base);
struct mtd_info *mtd = nand_to_mtd(chip);
struct micron_nand *micron;
int ondie;
@@ -523,7 +528,7 @@ static int micron_nand_init(struct nand_chip *chip)
* That's not needed for 8-bit ECC, because the status expose
* a better approximation of the number of bitflips in a page.
*/
- if (chip->base.eccreq.strength == 4) {
+ if (requirements->strength == 4) {
micron->ecc.rawbuf = kmalloc(mtd->writesize +
mtd->oobsize,
GFP_KERNEL);
@@ -533,16 +538,16 @@ static int micron_nand_init(struct nand_chip *chip)
}
}
- if (chip->base.eccreq.strength == 4)
+ if (requirements->strength == 4)
mtd_set_ooblayout(mtd,
µn_nand_on_die_4_ooblayout_ops);
else
mtd_set_ooblayout(mtd,
µn_nand_on_die_8_ooblayout_ops);
- chip->ecc.bytes = chip->base.eccreq.strength * 2;
+ chip->ecc.bytes = requirements->strength * 2;
chip->ecc.size = 512;
- chip->ecc.strength = chip->base.eccreq.strength;
+ chip->ecc.strength = requirements->strength;
chip->ecc.algo = NAND_ECC_ALGO_BCH;
chip->ecc.read_page = micron_nand_read_page_on_die_ecc;
chip->ecc.write_page = micron_nand_write_page_on_die_ecc;
diff --git a/drivers/mtd/nand/raw/nand_onfi.c b/drivers/mtd/nand/raw/nand_onfi.c
index be3456627288..45649e03797d 100644
--- a/drivers/mtd/nand/raw/nand_onfi.c
+++ b/drivers/mtd/nand/raw/nand_onfi.c
@@ -34,6 +34,8 @@ u16 onfi_crc16(u16 crc, u8 const *p, size_t len)
static int nand_flash_detect_ext_param_page(struct nand_chip *chip,
struct nand_onfi_params *p)
{
+ struct nand_device *base = &chip->base;
+ struct nand_ecc_props requirements;
struct onfi_ext_param_page *ep;
struct onfi_ext_section *s;
struct onfi_ext_ecc_info *ecc;
@@ -94,8 +96,10 @@ static int nand_flash_detect_ext_param_page(struct nand_chip *chip,
goto ext_out;
}
- chip->base.eccreq.strength = ecc->ecc_bits;
- chip->base.eccreq.step_size = 1 << ecc->codeword_size;
+ requirements.strength = ecc->ecc_bits;
+ requirements.step_size = 1 << ecc->codeword_size;
+ nanddev_set_ecc_requirements(base, &requirements);
+
ret = 0;
ext_out:
@@ -139,6 +143,7 @@ static void nand_bit_wise_majority(const void **srcbufs,
*/
int nand_onfi_detect(struct nand_chip *chip)
{
+ struct nand_device *base = &chip->base;
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_memory_organization *memorg;
struct nand_onfi_params *p = NULL, *pbuf;
@@ -265,8 +270,12 @@ int nand_onfi_detect(struct nand_chip *chip)
chip->options |= NAND_BUSWIDTH_16;
if (p->ecc_bits != 0xff) {
- chip->base.eccreq.strength = p->ecc_bits;
- chip->base.eccreq.step_size = 512;
+ struct nand_ecc_props requirements = {
+ .strength = p->ecc_bits,
+ .step_size = 512,
+ };
+
+ nanddev_set_ecc_requirements(base, &requirements);
} else if (onfi_version >= 21 &&
(le16_to_cpu(p->features) & ONFI_FEATURE_EXT_PARAM_PAGE)) {
diff --git a/drivers/mtd/nand/raw/nand_samsung.c b/drivers/mtd/nand/raw/nand_samsung.c
index 3a4a19e808f6..0be6b7563805 100644
--- a/drivers/mtd/nand/raw/nand_samsung.c
+++ b/drivers/mtd/nand/raw/nand_samsung.c
@@ -10,6 +10,8 @@
static void samsung_nand_decode_id(struct nand_chip *chip)
{
+ struct nand_device *base = &chip->base;
+ struct nand_ecc_props requirements = {};
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_memory_organization *memorg;
@@ -71,23 +73,23 @@ static void samsung_nand_decode_id(struct nand_chip *chip)
/* Extract ECC requirements from 5th id byte*/
extid = (chip->id.data[4] >> 4) & 0x07;
if (extid < 5) {
- chip->base.eccreq.step_size = 512;
- chip->base.eccreq.strength = 1 << extid;
+ requirements.step_size = 512;
+ requirements.strength = 1 << extid;
} else {
- chip->base.eccreq.step_size = 1024;
+ requirements.step_size = 1024;
switch (extid) {
case 5:
- chip->base.eccreq.strength = 24;
+ requirements.strength = 24;
break;
case 6:
- chip->base.eccreq.strength = 40;
+ requirements.strength = 40;
break;
case 7:
- chip->base.eccreq.strength = 60;
+ requirements.strength = 60;
break;
default:
WARN(1, "Could not decode ECC info");
- chip->base.eccreq.step_size = 0;
+ requirements.step_size = 0;
}
}
} else {
@@ -97,8 +99,8 @@ static void samsung_nand_decode_id(struct nand_chip *chip)
switch (chip->id.data[1]) {
/* K9F4G08U0D-S[I|C]B0(T00) */
case 0xDC:
- chip->base.eccreq.step_size = 512;
- chip->base.eccreq.strength = 1;
+ requirements.step_size = 512;
+ requirements.strength = 1;
break;
/* K9F1G08U0E 21nm chips do not support subpage write */
@@ -112,6 +114,8 @@ static void samsung_nand_decode_id(struct nand_chip *chip)
}
}
}
+
+ nanddev_set_ecc_requirements(base, &requirements);
}
static int samsung_nand_init(struct nand_chip *chip)
diff --git a/drivers/mtd/nand/raw/nand_toshiba.c b/drivers/mtd/nand/raw/nand_toshiba.c
index 436ed90a90ad..5d3434587f25 100644
--- a/drivers/mtd/nand/raw/nand_toshiba.c
+++ b/drivers/mtd/nand/raw/nand_toshiba.c
@@ -145,6 +145,8 @@ static void toshiba_nand_benand_init(struct nand_chip *chip)
static void toshiba_nand_decode_id(struct nand_chip *chip)
{
+ struct nand_device *base = &chip->base;
+ struct nand_ecc_props requirements = {};
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_memory_organization *memorg;
@@ -175,23 +177,25 @@ static void toshiba_nand_decode_id(struct nand_chip *chip)
* - 24nm: 8 bit ECC for each 512Byte is required.
*/
if (chip->id.len >= 6 && nand_is_slc(chip)) {
- chip->base.eccreq.step_size = 512;
+ requirements.step_size = 512;
switch (chip->id.data[5] & 0x7) {
case 0x4:
- chip->base.eccreq.strength = 1;
+ requirements.strength = 1;
break;
case 0x5:
- chip->base.eccreq.strength = 4;
+ requirements.strength = 4;
break;
case 0x6:
- chip->base.eccreq.strength = 8;
+ requirements.strength = 8;
break;
default:
WARN(1, "Could not get ECC info");
- chip->base.eccreq.step_size = 0;
+ requirements.step_size = 0;
break;
}
}
+
+ nanddev_set_ecc_requirements(base, &requirements);
}
static int tc58teg5dclta00_init(struct nand_chip *chip)
diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index c6dd2e6d9ef8..490ba485e939 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -1732,6 +1732,8 @@ static void sunxi_nand_ecc_cleanup(struct nand_ecc_ctrl *ecc)
static int sunxi_nand_attach_chip(struct nand_chip *nand)
{
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&nand->base);
struct nand_ecc_ctrl *ecc = &nand->ecc;
struct device_node *np = nand_get_flash_node(nand);
int ret;
@@ -1745,8 +1747,8 @@ static int sunxi_nand_attach_chip(struct nand_chip *nand)
nand->options |= NAND_SUBPAGE_READ;
if (!ecc->size) {
- ecc->size = nand->base.eccreq.step_size;
- ecc->strength = nand->base.eccreq.strength;
+ ecc->size = requirements->step_size;
+ ecc->strength = requirements->strength;
}
if (!ecc->size || !ecc->strength)
diff --git a/drivers/mtd/nand/raw/tegra_nand.c b/drivers/mtd/nand/raw/tegra_nand.c
index 2325b06ccc9a..fecdb7e8f9e8 100644
--- a/drivers/mtd/nand/raw/tegra_nand.c
+++ b/drivers/mtd/nand/raw/tegra_nand.c
@@ -840,6 +840,8 @@ static int tegra_nand_get_strength(struct nand_chip *chip, const int *strength,
int strength_len, int bits_per_step,
int oobsize)
{
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&chip->base);
bool maximize = chip->ecc.options & NAND_ECC_MAXIMIZE;
int i;
@@ -855,7 +857,7 @@ static int tegra_nand_get_strength(struct nand_chip *chip, const int *strength,
} else {
strength_sel = strength[i];
- if (strength_sel < chip->base.eccreq.strength)
+ if (strength_sel < requirements->strength)
continue;
}
@@ -908,6 +910,8 @@ static int tegra_nand_select_strength(struct nand_chip *chip, int oobsize)
static int tegra_nand_attach_chip(struct nand_chip *chip)
{
struct tegra_nand_controller *ctrl = to_tegra_ctrl(chip->controller);
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&chip->base);
struct tegra_nand_chip *nand = to_tegra_chip(chip);
struct mtd_info *mtd = nand_to_mtd(chip);
int bits_per_step;
@@ -919,9 +923,9 @@ static int tegra_nand_attach_chip(struct nand_chip *chip)
chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->ecc.size = 512;
chip->ecc.steps = mtd->writesize / chip->ecc.size;
- if (chip->base.eccreq.step_size != 512) {
+ if (requirements->step_size != 512) {
dev_err(ctrl->dev, "Unsupported step size %d\n",
- chip->base.eccreq.step_size);
+ requirements->step_size);
return -EINVAL;
}
@@ -952,7 +956,7 @@ static int tegra_nand_attach_chip(struct nand_chip *chip)
if (ret < 0) {
dev_err(ctrl->dev,
"No valid strength found, minimum %d\n",
- chip->base.eccreq.strength);
+ requirements->strength);
return ret;
}
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 56019de28a90..0939e0f9c6a4 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -903,7 +903,7 @@ int spinand_match_and_init(struct spinand_device *spinand,
continue;
nand->memorg = table[i].memorg;
- nand->eccreq = table[i].eccreq;
+ nanddev_set_ecc_requirements(nand, &table[i].eccreq);
spinand->eccinfo = table[i].eccinfo;
spinand->flags = table[i].flags;
spinand->id.len = 1 + table[i].devid.len;
--
2.20.1
^ permalink raw reply related
* [PATCH v10 15/20] mtd: nand: Use the new generic ECC object
From: Miquel Raynal @ 2020-06-03 17:57 UTC (permalink / raw)
To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus, linux-mtd
Cc: Boris Brezillon, Thomas Petazzoni, linux-arm-kernel, Mason Yang,
Julien Su, Rob Herring, Mark Rutland, devicetree, Miquel Raynal
In-Reply-To: <20200603175759.19948-1-miquel.raynal@bootlin.com>
Embed a generic NAND ECC high-level object in the nand_device
structure to carry all the ECC engine configuration/data.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
include/linux/mtd/nand.h | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 348fb2ad4d90..697ea2474a7c 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -301,7 +301,7 @@ struct nand_ecc {
* struct nand_device - NAND device
* @mtd: MTD instance attached to the NAND device
* @memorg: memory layout
- * @eccreq: ECC requirements
+ * @ecc: NAND ECC object attached to the NAND device
* @rowconv: position to row address converter
* @bbt: bad block table info
* @ops: NAND operations attached to the NAND device
@@ -309,8 +309,8 @@ struct nand_ecc {
* Generic NAND object. Specialized NAND layers (raw NAND, SPI NAND, OneNAND)
* should declare their own NAND object embedding a nand_device struct (that's
* how inheritance is done).
- * struct_nand_device->memorg and struct_nand_device->eccreq should be filled
- * at device detection time to reflect the NAND device
+ * struct_nand_device->memorg and struct_nand_device->ecc.requirements should
+ * be filled at device detection time to reflect the NAND device
* capabilities/requirements. Once this is done nanddev_init() can be called.
* It will take care of converting NAND information into MTD ones, which means
* the specialized NAND layers should never manually tweak
@@ -319,7 +319,7 @@ struct nand_ecc {
struct nand_device {
struct mtd_info mtd;
struct nand_memory_organization memorg;
- struct nand_ecc_props eccreq;
+ struct nand_ecc ecc;
struct nand_row_converter rowconv;
struct nand_bbt bbt;
const struct nand_ops *ops;
@@ -530,7 +530,7 @@ nanddev_get_memorg(struct nand_device *nand)
static inline const struct nand_ecc_props *
nanddev_get_ecc_conf(struct nand_device *nand)
{
- return &nand->eccreq;
+ return &nand->ecc.ctx.conf;
}
/**
@@ -541,7 +541,7 @@ nanddev_get_ecc_conf(struct nand_device *nand)
static inline const struct nand_ecc_props *
nanddev_get_ecc_requirements(struct nand_device *nand)
{
- return &nand->eccreq;
+ return &nand->ecc.requirements;
}
/**
@@ -554,7 +554,7 @@ static inline void
nanddev_set_ecc_requirements(struct nand_device *nand,
const struct nand_ecc_props *reqs)
{
- nand->eccreq = *reqs;
+ nand->ecc.requirements = *reqs;
}
int nanddev_init(struct nand_device *nand, const struct nand_ops *ops,
--
2.20.1
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox