* Re: [PATCH v4 02/11] mfd: Add support for Kontron sl28cpld management controller
From: Michael Walle @ 2020-06-05 9:51 UTC (permalink / raw)
To: Lee Jones
Cc: broonie, linux-gpio, devicetree, linux-kernel, linux-hwmon,
linux-pwm, linux-watchdog, linux-arm-kernel, Linus Walleij,
Bartosz Golaszewski, Rob Herring, Jean Delvare, Guenter Roeck,
Thierry Reding, Uwe Kleine-König, Wim Van Sebroeck,
Shawn Guo, Li Yang, Thomas Gleixner, Jason Cooper, Marc Zyngier,
Greg Kroah-Hartman, Andy Shevchenko
In-Reply-To: <20200605065709.GD3714@dell>
Hi Lee,
thanks for the review.
Am 2020-06-05 08:57, schrieb Lee Jones:
> Mark, what do you think?
>
> On Thu, 04 Jun 2020, Michael Walle wrote:
>
>> Add the core support for the board management controller found on the
>> SMARC-sAL28 board. It consists of the following functions:
>> - watchdog
>> - GPIO controller
>> - PWM controller
>> - fan sensor
>> - interrupt controller
>>
>> At the moment, this controller is used on the Kontron SMARC-sAL28
>> board.
>>
>> Please note that the MFD driver is defined as bool in the Kconfig
>> because the next patch will add interrupt support.
>>
>> Signed-off-by: Michael Walle <michael@walle.cc>
>> ---
>> drivers/mfd/Kconfig | 19 ++++++++++
>> drivers/mfd/Makefile | 2 ++
>> drivers/mfd/sl28cpld.c | 79
>> ++++++++++++++++++++++++++++++++++++++++++
>> 3 files changed, 100 insertions(+)
>> create mode 100644 drivers/mfd/sl28cpld.c
>>
>> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
>> index 4f8b73d92df3..5c0cd514d197 100644
>> --- a/drivers/mfd/Kconfig
>> +++ b/drivers/mfd/Kconfig
>> @@ -2109,5 +2109,24 @@ config SGI_MFD_IOC3
>> If you have an SGI Origin, Octane, or a PCI IOC3 card,
>> then say Y. Otherwise say N.
>>
>> +config MFD_SL28CPLD
>> + bool "Kontron sl28 core driver"
>
> "Kontron SL28 Core Driver"
ok
>
>> + depends on I2C=y
>> + depends on OF
>> + select REGMAP_I2C
>> + select MFD_CORE
>> + help
>> + This option enables support for the board management controller
>> + found on the Kontron sl28 CPLD. You have to select individual
>
> I can't find any reference to the "Kontron sl28 CPLD" online.
>
> Is there a datasheet?
Unfortunately not.
>> + functions, such as watchdog, GPIO, etc, under the corresponding
>> menus
>> + in order to enable them.
>> +
>> + Currently supported boards are:
>> +
>> + Kontron SMARC-sAL28
>> +
>> + To compile this driver as a module, choose M here: the module will
>> be
>> + called sl28cpld.
>> +
>> endmenu
>> endif
>> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
>> index 9367a92f795a..be59fb40aa28 100644
>> --- a/drivers/mfd/Makefile
>> +++ b/drivers/mfd/Makefile
>> @@ -264,3 +264,5 @@ obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o
>> obj-$(CONFIG_MFD_STMFX) += stmfx.o
>>
>> obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o
>> +
>> +obj-$(CONFIG_MFD_SL28CPLD) += sl28cpld.o
>> diff --git a/drivers/mfd/sl28cpld.c b/drivers/mfd/sl28cpld.c
>> new file mode 100644
>> index 000000000000..a23194bb6efa
>> --- /dev/null
>> +++ b/drivers/mfd/sl28cpld.c
>> @@ -0,0 +1,79 @@
>> +// SPDX-License-Identifier: GPL-2.0-only
>> +/*
>> + * MFD core for the sl28cpld.
>
> Ideally this would match the Kconfig subject line.
ok
>
>> + * Copyright 2019 Kontron Europe GmbH
>
> This is out of date.
ok
>> + */
>> +
>> +#include <linux/i2c.h>
>> +#include <linux/interrupt.h>
>> +#include <linux/kernel.h>
>> +#include <linux/mfd/core.h>
>> +#include <linux/module.h>
>> +#include <linux/of_platform.h>
>> +#include <linux/regmap.h>
>> +
>> +#define SL28CPLD_VERSION 0x03
>> +#define SL28CPLD_MIN_REQ_VERSION 14
>> +
>> +struct sl28cpld {
>> + struct device *dev;
>> + struct regmap *regmap;
>> +};
>
> Why do you need this structure?
see below
>> +static const struct regmap_config sl28cpld_regmap_config = {
>> + .reg_bits = 8,
>> + .val_bits = 8,
>> + .reg_stride = 1,
>> +};
>> +
>> +static int sl28cpld_probe(struct i2c_client *i2c)
>> +{
>> + struct sl28cpld *sl28cpld;
>> + struct device *dev = &i2c->dev;
>> + unsigned int cpld_version;
>> + int ret;
>> +
>> + sl28cpld = devm_kzalloc(dev, sizeof(*sl28cpld), GFP_KERNEL);
>> + if (!sl28cpld)
>> + return -ENOMEM;
>> +
>> + sl28cpld->regmap = devm_regmap_init_i2c(i2c,
>> &sl28cpld_regmap_config);
>> + if (IS_ERR(sl28cpld->regmap))
>> + return PTR_ERR(sl28cpld->regmap);
>
> This is now a shared memory allocator and not an MFD at all.
>
> I'm clamping down on these type of drivers!
>
> Please find a better way to accomplish this.
>
> Potentially using "simple-mfd" and "simple-regmap".
>
> The former already exists and does what you want. The latter doesn't
> yet exist, but could solve your and lots of other contributor's
> issues.
Mh, the former doesn't provide a regmap, correct? Most MMIO drivers
won't
need it, but this is an I2C device. So yes, I could come up with a
"simple-regmap" proposal. I guess that should go into drivers/mfd/
because
it is more than just adding one line, i.e. you would have to configure
the
regmap and its different interfaces.
But how would you model that version check below for example? (Not that
I'm
very keen of it.)
>
> Heck maybe I'll implement it myself if this keeps happening.
>
>> + ret = regmap_read(sl28cpld->regmap, SL28CPLD_VERSION,
>> &cpld_version);
>> + if (ret)
>> + return ret;
>> +
>> + if (cpld_version < SL28CPLD_MIN_REQ_VERSION) {
>> + dev_err(dev, "unsupported CPLD version %d\n", cpld_version);
>> + return -ENODEV;
>> + }
>> +
>> + sl28cpld->dev = dev;
>> + i2c_set_clientdata(i2c, sl28cpld);
>
> If the struct definition is in here, how do you use it elsewhere?
I wanted to store the regmap somewhere, but because there are no users,
I'll
drop that.
>> + dev_info(dev, "successfully probed. CPLD version %d\n",
>> cpld_version);
>> +
>> + return devm_of_platform_populate(&i2c->dev);
>> +}
>> +
>> +static const struct of_device_id sl28cpld_of_match[] = {
>> + { .compatible = "kontron,sl28cpld-r1", },
>> + {}
>> +};
>> +MODULE_DEVICE_TABLE(of, sl28cpld_of_match);
>> +
>> +static struct i2c_driver sl28cpld_driver = {
>> + .probe_new = sl28cpld_probe,
>> + .driver = {
>> + .name = "sl28cpld",
>> + .of_match_table = of_match_ptr(sl28cpld_of_match),
>> + },
>> +};
>> +module_i2c_driver(sl28cpld_driver);
>> +
>> +MODULE_DESCRIPTION("sl28cpld MFD Core Driver");
>> +MODULE_AUTHOR("Michael Walle <michael@walle.cc>");
>> +MODULE_LICENSE("GPL");
--
-michael
^ permalink raw reply
* [PATCH v4 2/6] PCI: uniphier: Add misc interrupt handler to invoke PME and AER
From: Kunihiko Hayashi @ 2020-06-05 9:44 UTC (permalink / raw)
To: Bjorn Helgaas, Lorenzo Pieralisi, Jingoo Han, Gustavo Pimentel,
Rob Herring, Masahiro Yamada, Marc Zyngier
Cc: linux-pci, devicetree, linux-arm-kernel, linux-kernel,
Masami Hiramatsu, Jassi Brar, Kunihiko Hayashi
In-Reply-To: <1591350276-15816-1-git-send-email-hayashi.kunihiko@socionext.com>
The misc interrupts consisting of PME, AER, and Link event, is handled
by INTx handler, however, these interrupts should be also handled by
MSI handler.
This adds the function uniphier_pcie_misc_isr() that handles misc
interrupts, which is called from both INTx and MSI handlers.
This function detects PME and AER interrupts with the status register,
and invoke PME and AER drivers related to MSI.
And this sets the mask for misc interrupts from INTx if MSI is enabled
and sets the mask for misc interrupts from MSI if MSI is disabled.
Cc: Marc Zyngier <maz@kernel.org>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
drivers/pci/controller/dwc/pcie-uniphier.c | 57 ++++++++++++++++++++++++------
1 file changed, 46 insertions(+), 11 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-uniphier.c b/drivers/pci/controller/dwc/pcie-uniphier.c
index a5401a0..5ce2479 100644
--- a/drivers/pci/controller/dwc/pcie-uniphier.c
+++ b/drivers/pci/controller/dwc/pcie-uniphier.c
@@ -44,7 +44,9 @@
#define PCL_SYS_AUX_PWR_DET BIT(8)
#define PCL_RCV_INT 0x8108
+#define PCL_RCV_INT_ALL_INT_MASK GENMASK(28, 25)
#define PCL_RCV_INT_ALL_ENABLE GENMASK(20, 17)
+#define PCL_RCV_INT_ALL_MSI_MASK GENMASK(12, 9)
#define PCL_CFG_BW_MGT_STATUS BIT(4)
#define PCL_CFG_LINK_AUTO_BW_STATUS BIT(3)
#define PCL_CFG_AER_RC_ERR_MSI_STATUS BIT(2)
@@ -167,7 +169,15 @@ static void uniphier_pcie_stop_link(struct dw_pcie *pci)
static void uniphier_pcie_irq_enable(struct uniphier_pcie_priv *priv)
{
- writel(PCL_RCV_INT_ALL_ENABLE, priv->base + PCL_RCV_INT);
+ u32 val;
+
+ val = PCL_RCV_INT_ALL_ENABLE;
+ if (pci_msi_enabled())
+ val |= PCL_RCV_INT_ALL_INT_MASK;
+ else
+ val |= PCL_RCV_INT_ALL_MSI_MASK;
+
+ writel(val, priv->base + PCL_RCV_INT);
writel(PCL_RCV_INTX_ALL_ENABLE, priv->base + PCL_RCV_INTX);
}
@@ -231,32 +241,56 @@ static const struct irq_domain_ops uniphier_intx_domain_ops = {
.map = uniphier_pcie_intx_map,
};
-static void uniphier_pcie_irq_handler(struct irq_desc *desc)
+static void uniphier_pcie_misc_isr(struct pcie_port *pp, bool is_msi)
{
- struct pcie_port *pp = irq_desc_get_handler_data(desc);
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
struct uniphier_pcie_priv *priv = to_uniphier_pcie(pci);
- struct irq_chip *chip = irq_desc_get_chip(desc);
- unsigned long reg;
- u32 val, bit, virq;
+ u32 val, virq;
- /* INT for debug */
val = readl(priv->base + PCL_RCV_INT);
if (val & PCL_CFG_BW_MGT_STATUS)
dev_dbg(pci->dev, "Link Bandwidth Management Event\n");
+
if (val & PCL_CFG_LINK_AUTO_BW_STATUS)
dev_dbg(pci->dev, "Link Autonomous Bandwidth Event\n");
- if (val & PCL_CFG_AER_RC_ERR_MSI_STATUS)
- dev_dbg(pci->dev, "Root Error\n");
- if (val & PCL_CFG_PME_MSI_STATUS)
- dev_dbg(pci->dev, "PME Interrupt\n");
+
+ if (is_msi) {
+ if (val & PCL_CFG_AER_RC_ERR_MSI_STATUS)
+ dev_dbg(pci->dev, "Root Error Status\n");
+
+ if (val & PCL_CFG_PME_MSI_STATUS)
+ dev_dbg(pci->dev, "PME Interrupt\n");
+
+ if (val & (PCL_CFG_AER_RC_ERR_MSI_STATUS |
+ PCL_CFG_PME_MSI_STATUS)) {
+ virq = irq_linear_revmap(pp->irq_domain, 0);
+ generic_handle_irq(virq);
+ }
+ }
writel(val, priv->base + PCL_RCV_INT);
+}
+
+static void uniphier_pcie_msi_host_isr(struct pcie_port *pp)
+{
+ uniphier_pcie_misc_isr(pp, true);
+}
+
+static void uniphier_pcie_irq_handler(struct irq_desc *desc)
+{
+ struct pcie_port *pp = irq_desc_get_handler_data(desc);
+ struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+ struct uniphier_pcie_priv *priv = to_uniphier_pcie(pci);
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ unsigned long reg;
+ u32 val, bit, virq;
/* INTx */
chained_irq_enter(chip, desc);
+ uniphier_pcie_misc_isr(pp, false);
+
val = readl(priv->base + PCL_RCV_INTX);
reg = FIELD_GET(PCL_RCV_INTX_ALL_STATUS, val);
@@ -330,6 +364,7 @@ static int uniphier_pcie_host_init(struct pcie_port *pp)
static const struct dw_pcie_host_ops uniphier_pcie_host_ops = {
.host_init = uniphier_pcie_host_init,
+ .msi_host_isr = uniphier_pcie_msi_host_isr,
};
static int uniphier_add_pcie_port(struct uniphier_pcie_priv *priv,
--
2.7.4
^ permalink raw reply related
* [PATCH v4 5/6] PCI: uniphier: Add error message when failed to get phy
From: Kunihiko Hayashi @ 2020-06-05 9:44 UTC (permalink / raw)
To: Bjorn Helgaas, Lorenzo Pieralisi, Jingoo Han, Gustavo Pimentel,
Rob Herring, Masahiro Yamada, Marc Zyngier
Cc: linux-pci, devicetree, linux-arm-kernel, linux-kernel,
Masami Hiramatsu, Jassi Brar, Kunihiko Hayashi
In-Reply-To: <1591350276-15816-1-git-send-email-hayashi.kunihiko@socionext.com>
Even if phy driver doesn't probe, the error message can't be distinguished
from other errors. This displays error message caused by the phy driver
explicitly.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
drivers/pci/controller/dwc/pcie-uniphier.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-uniphier.c b/drivers/pci/controller/dwc/pcie-uniphier.c
index c37a968..8356dd3 100644
--- a/drivers/pci/controller/dwc/pcie-uniphier.c
+++ b/drivers/pci/controller/dwc/pcie-uniphier.c
@@ -470,8 +470,12 @@ static int uniphier_pcie_probe(struct platform_device *pdev)
return PTR_ERR(priv->rst);
priv->phy = devm_phy_optional_get(dev, "pcie-phy");
- if (IS_ERR(priv->phy))
- return PTR_ERR(priv->phy);
+ if (IS_ERR(priv->phy)) {
+ ret = PTR_ERR(priv->phy);
+ if (ret != -EPROBE_DEFER)
+ dev_err(dev, "Failed to get phy (%d)\n", ret);
+ return ret;
+ }
platform_set_drvdata(pdev, priv);
--
2.7.4
^ permalink raw reply related
* [PATCH v4 6/6] PCI: uniphier: Use devm_platform_ioremap_resource_byname()
From: Kunihiko Hayashi @ 2020-06-05 9:44 UTC (permalink / raw)
To: Bjorn Helgaas, Lorenzo Pieralisi, Jingoo Han, Gustavo Pimentel,
Rob Herring, Masahiro Yamada, Marc Zyngier
Cc: linux-pci, devicetree, linux-arm-kernel, linux-kernel,
Masami Hiramatsu, Jassi Brar, Kunihiko Hayashi
In-Reply-To: <1591350276-15816-1-git-send-email-hayashi.kunihiko@socionext.com>
Use devm_platform_ioremap_resource_byname() to simplify the code a bit.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
drivers/pci/controller/dwc/pcie-uniphier.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-uniphier.c b/drivers/pci/controller/dwc/pcie-uniphier.c
index 8356dd3..233d624 100644
--- a/drivers/pci/controller/dwc/pcie-uniphier.c
+++ b/drivers/pci/controller/dwc/pcie-uniphier.c
@@ -456,8 +456,7 @@ static int uniphier_pcie_probe(struct platform_device *pdev)
if (IS_ERR(priv->pci.atu_base))
priv->pci.atu_base = NULL;
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "link");
- priv->base = devm_ioremap_resource(dev, res);
+ priv->base = devm_platform_ioremap_resource_byname(pdev, "link");
if (IS_ERR(priv->base))
return PTR_ERR(priv->base);
--
2.7.4
^ permalink raw reply related
* [PATCH v4 3/6] dt-bindings: PCI: uniphier: Add iATU register description
From: Kunihiko Hayashi @ 2020-06-05 9:44 UTC (permalink / raw)
To: Bjorn Helgaas, Lorenzo Pieralisi, Jingoo Han, Gustavo Pimentel,
Rob Herring, Masahiro Yamada, Marc Zyngier
Cc: linux-pci, devicetree, linux-arm-kernel, linux-kernel,
Masami Hiramatsu, Jassi Brar, Kunihiko Hayashi
In-Reply-To: <1591350276-15816-1-git-send-email-hayashi.kunihiko@socionext.com>
In the dt-bindings, "atu" reg-names is required to get the register space
for iATU in Synopsys DWC version 4.80 or later.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/pci/uniphier-pcie.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pci/uniphier-pcie.txt b/Documentation/devicetree/bindings/pci/uniphier-pcie.txt
index 1fa2c59..c4b7381 100644
--- a/Documentation/devicetree/bindings/pci/uniphier-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/uniphier-pcie.txt
@@ -16,6 +16,7 @@ Required properties:
"dbi" - controller configuration registers
"link" - SoC-specific glue layer registers
"config" - PCIe configuration space
+ "atu" - iATU registers for DWC version 4.80 or later
- clocks: A phandle to the clock gate for PCIe glue layer including
the host controller.
- resets: A phandle to the reset line for PCIe glue layer including
--
2.7.4
^ permalink raw reply related
* [PATCH v4 4/6] PCI: uniphier: Add iATU register support
From: Kunihiko Hayashi @ 2020-06-05 9:44 UTC (permalink / raw)
To: Bjorn Helgaas, Lorenzo Pieralisi, Jingoo Han, Gustavo Pimentel,
Rob Herring, Masahiro Yamada, Marc Zyngier
Cc: linux-pci, devicetree, linux-arm-kernel, linux-kernel,
Masami Hiramatsu, Jassi Brar, Kunihiko Hayashi
In-Reply-To: <1591350276-15816-1-git-send-email-hayashi.kunihiko@socionext.com>
This gets iATU register area from reg property. In Synopsys DWC version
4.80 or later, since iATU register area is separated from core register
area, this area is necessary to get from DT independently.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
drivers/pci/controller/dwc/pcie-uniphier.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-uniphier.c b/drivers/pci/controller/dwc/pcie-uniphier.c
index 5ce2479..c37a968 100644
--- a/drivers/pci/controller/dwc/pcie-uniphier.c
+++ b/drivers/pci/controller/dwc/pcie-uniphier.c
@@ -451,6 +451,11 @@ static int uniphier_pcie_probe(struct platform_device *pdev)
if (IS_ERR(priv->pci.dbi_base))
return PTR_ERR(priv->pci.dbi_base);
+ priv->pci.atu_base =
+ devm_platform_ioremap_resource_byname(pdev, "atu");
+ if (IS_ERR(priv->pci.atu_base))
+ priv->pci.atu_base = NULL;
+
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "link");
priv->base = devm_ioremap_resource(dev, res);
if (IS_ERR(priv->base))
--
2.7.4
^ permalink raw reply related
* [PATCH v4 1/6] PCI: dwc: Add msi_host_isr() callback
From: Kunihiko Hayashi @ 2020-06-05 9:44 UTC (permalink / raw)
To: Bjorn Helgaas, Lorenzo Pieralisi, Jingoo Han, Gustavo Pimentel,
Rob Herring, Masahiro Yamada, Marc Zyngier
Cc: linux-pci, devicetree, linux-arm-kernel, linux-kernel,
Masami Hiramatsu, Jassi Brar, Kunihiko Hayashi
In-Reply-To: <1591350276-15816-1-git-send-email-hayashi.kunihiko@socionext.com>
This adds msi_host_isr() callback function support to describe
SoC-dependent service triggered by MSI.
For example, when AER interrupt is triggered by MSI, the callback function
reads SoC-dependent registers and detects that the interrupt is from AER,
and invoke AER interrupts related to MSI.
Cc: Marc Zyngier <maz@kernel.org>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
drivers/pci/controller/dwc/pcie-designware-host.c | 3 +++
drivers/pci/controller/dwc/pcie-designware.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 0a4a5aa..026edb1 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -83,6 +83,9 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port *pp)
u32 status, num_ctrls;
irqreturn_t ret = IRQ_NONE;
+ if (pp->ops->msi_host_isr)
+ pp->ops->msi_host_isr(pp);
+
num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL;
for (i = 0; i < num_ctrls; i++) {
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 656e00f..e741967 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -170,6 +170,7 @@ struct dw_pcie_host_ops {
void (*scan_bus)(struct pcie_port *pp);
void (*set_num_vectors)(struct pcie_port *pp);
int (*msi_host_init)(struct pcie_port *pp);
+ void (*msi_host_isr)(struct pcie_port *pp);
};
struct pcie_port {
--
2.7.4
^ permalink raw reply related
* [PATCH v4 0/6] PCI: uniphier: Add features for UniPhier PCIe host controller
From: Kunihiko Hayashi @ 2020-06-05 9:44 UTC (permalink / raw)
To: Bjorn Helgaas, Lorenzo Pieralisi, Jingoo Han, Gustavo Pimentel,
Rob Herring, Masahiro Yamada, Marc Zyngier
Cc: linux-pci, devicetree, linux-arm-kernel, linux-kernel,
Masami Hiramatsu, Jassi Brar, Kunihiko Hayashi
This series adds some features for UniPhier PCIe host controller.
- Add support for PME and AER invoked by MSI interrupt
- Add iATU register view support for PCIe version >= 4.80
- Add an error message when failing to get phy driver
This adds a new function called by MSI handler in DesignWare PCIe framework,
that invokes PME and AER funcions to detect the factor from SoC-dependent
registers.
Changes since v3:
- Move msi_host_isr() call into dw_handle_msi_irq()
- Move uniphier_pcie_misc_isr() call into the guard of chained_irq
- Use a bool argument is_msi instead of pci_msi_enabled()
- Consolidate handler calls for the same interrupt
- Fix typos in commit messages
Changes since v2:
- Avoid printing phy error message in case of EPROBE_DEFER
- Fix iATU register mapping method
- dt-bindings: Add Acked-by: line
- Fix typos in commit messages
- Use devm_platform_ioremap_resource_byname()
Changes since v1:
- Add check if struct resource is NULL
- Fix warning in the type of dev_err() argument
Kunihiko Hayashi (6):
PCI: dwc: Add msi_host_isr() callback
PCI: uniphier: Add misc interrupt handler to invoke PME and AER
dt-bindings: PCI: uniphier: Add iATU register description
PCI: uniphier: Add iATU register support
PCI: uniphier: Add error message when failed to get phy
PCI: uniphier: Use devm_platform_ioremap_resource_byname()
.../devicetree/bindings/pci/uniphier-pcie.txt | 1 +
drivers/pci/controller/dwc/pcie-designware-host.c | 3 +
drivers/pci/controller/dwc/pcie-designware.h | 1 +
drivers/pci/controller/dwc/pcie-uniphier.c | 73 +++++++++++++++++-----
4 files changed, 63 insertions(+), 15 deletions(-)
--
2.7.4
^ permalink raw reply
* Re: [PATCH v4 05/11] pwm: add support for sl28cpld PWM controller
From: Andy Shevchenko @ 2020-06-05 9:33 UTC (permalink / raw)
To: Lee Jones
Cc: Michael Walle, open list:GPIO SUBSYSTEM, devicetree,
Linux Kernel Mailing List, linux-hwmon, linux-pwm, linux-watchdog,
linux-arm Mailing List, Linus Walleij, Bartosz Golaszewski,
Rob Herring, Jean Delvare, Guenter Roeck, Thierry Reding,
Uwe Kleine-König, Wim Van Sebroeck, Shawn Guo, Li Yang,
Thomas Gleixner, Jason Cooper, Marc Zyngier, Mark Brown,
Greg Kroah-Hartman, Andy Shevchenko
In-Reply-To: <20200605084915.GE3714@dell>
On Fri, Jun 5, 2020 at 11:51 AM Lee Jones <lee.jones@linaro.org> wrote:
> On Thu, 04 Jun 2020, Michael Walle wrote:
...
> > + cycle = state->duty_cycle * config->max_duty_cycle;
> > + do_div(cycle, state->period);
>
> Forgive my ignorance (I'm new here!), but what are these 2 lines
> doing? Here we are multiplying the current duty_cycle with the
> maximum value, then dividing by the period.
>
> So in the case of PWM_MODE_1KHZ with a 50% duty cycle, you'd have:
>
> (500000 * 0x20[16]) / 1000000 = [0x10]16
>
> Thus, the above gives as a proportional representation of the maximum
> valid value for placement into the cycle control register(s), right?
>
> Either way (whether I'm correct or not), I think it would be nice to
> mention this in a comment. Maybe even clarify with a simple example.
IIRC PWM has a helper for that (to calc period based on PWM state and
new duty cycle %).
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* =?y?q?=5BPATCH=C2=A0V3=200/2=5D=20Add=20SDHC=20interconnect=20bandwidth=20scaling=20?=
From: Pradeep P V K @ 2020-06-05 9:30 UTC (permalink / raw)
To: bjorn.andersson, adrian.hunter, robh+dt, ulf.hansson, vbadigan,
sboyd, georgi.djakov, mka
Cc: linux-mmc, linux-kernel, linux-arm-msm, devicetree,
linux-mmc-owner, rnayak, sibis, matthias, Pradeep P V K
In-Reply-To: <1591269283-24084-1-git-send-email-ppvk@codeaurora.org>
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=y, Size: 1200 bytes --]
Add interconnect bandwidths for SDHC driver using OPP framework that
is required by SDHC driver based on the clock frequency and bus width
of the card. Otherwise, the system clocks may run at minimum clock
speed and thus affecting the performance.
This change is based on
[1] [Patch v8] Introduce OPP bandwidth bindings
(https://lkml.org/lkml/2020/5/12/493)
[2] [Patch v3 09/17] mmc: sdhci-msm: Fix error handling
for dev_pm_opp_of_add_table()
(https://lkml.org/lkml/2020/5/5/491)
[3] [RFC v6 2/2] dt-bindings: mmc: sdhci-msm: Add interconnect BW
scaling strings
(https://lkml.org/lkml/2020/3/23/409)
as there were no extra changes made on [3], retaining the Acked-by and
Reviewed-by sign-off from [3].
Changes since V2:
- Removed debug error prints on icc path ready check.
changes since V1:
- Added dev_pm_opp_find_icc_paths() to check for icc paths.
Pradeep P V K (2):
mmc: sdhci-msm: Add interconnect bandwidth scaling support
dt-bindings: mmc: sdhci-msm: Add interconnect BW scaling strings
Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 18 ++++++++++++++++++
drivers/mmc/host/sdhci-msm.c | 8 ++++++++
2 files changed, 26 insertions(+)
--
1.9.1
^ permalink raw reply
* =?y?q?=5BPATCH=C2=A0V3=201/2=5D=20mmc=3A=20sdhci-msm=3A=20Add=20interconnect=20bandwidth=20scaling=20support?=
From: Pradeep P V K @ 2020-06-05 9:30 UTC (permalink / raw)
To: bjorn.andersson, adrian.hunter, robh+dt, ulf.hansson, vbadigan,
sboyd, georgi.djakov, mka
Cc: linux-mmc, linux-kernel, linux-arm-msm, devicetree,
linux-mmc-owner, rnayak, sibis, matthias, Pradeep P V K
In-Reply-To: <1591349427-27004-1-git-send-email-ppvk@codeaurora.org>
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=y, Size: 1376 bytes --]
Interconnect bandwidth scaling support is now added as a
part of OPP [1]. So, make sure interconnect driver is ready
before handling interconnect scaling.
This change is based on
[1] [Patch v8] Introduce OPP bandwidth bindings
(https://lkml.org/lkml/2020/5/12/493)
[2] [Patch v3] mmc: sdhci-msm: Fix error handling
for dev_pm_opp_of_add_table()
(https://lkml.org/lkml/2020/5/5/491)
Signed-off-by: Pradeep P V K <ppvk@codeaurora.org>
---
drivers/mmc/host/sdhci-msm.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index b277dd7..a945e84 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -14,6 +14,7 @@
#include <linux/slab.h>
#include <linux/iopoll.h>
#include <linux/regulator/consumer.h>
+#include <linux/interconnect.h>
#include "sdhci-pltfm.h"
#include "cqhci.h"
@@ -2070,6 +2071,13 @@ static int sdhci_msm_probe(struct platform_device *pdev)
}
msm_host->bulk_clks[0].clk = clk;
+ /* Make sure that ICC driver is ready for interconnect bandwdith
+ * scaling before registering the device for OPP.
+ */
+ ret = dev_pm_opp_of_find_icc_paths(&pdev->dev, NULL);
+ if (ret)
+ goto bus_clk_disable;
+
msm_host->opp_table = dev_pm_opp_set_clkname(&pdev->dev, "core");
if (IS_ERR(msm_host->opp_table)) {
ret = PTR_ERR(msm_host->opp_table);
--
1.9.1
^ permalink raw reply related
* =?y?q?=5BPATCH=C2=A0V3=202/2=5D=20dt-bindings=3A=20mmc=3A=20sdhci-msm=3A=20Add=20interconnect=20BW=20scaling=20strings?=
From: Pradeep P V K @ 2020-06-05 9:30 UTC (permalink / raw)
To: bjorn.andersson, adrian.hunter, robh+dt, ulf.hansson, vbadigan,
sboyd, georgi.djakov, mka
Cc: linux-mmc, linux-kernel, linux-arm-msm, devicetree,
linux-mmc-owner, rnayak, sibis, matthias, Pradeep P V K
In-Reply-To: <1591349427-27004-1-git-send-email-ppvk@codeaurora.org>
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=y, Size: 1800 bytes --]
Add interconnect bandwidth scaling supported strings for qcom-sdhci
controller.
Signed-off-by: Pradeep P V K <ppvk@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
index b8e1d2b..3b602fd 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
@@ -54,6 +54,21 @@ Required properties:
- qcom,dll-config: Chipset and Platform specific value. Use this field to
specify the DLL_CONFIG register value as per Hardware Programming Guide.
+Optional Properties:
+* Following bus parameters are required for interconnect bandwidth scaling:
+- interconnects: Pairs of phandles and interconnect provider specifier
+ to denote the edge source and destination ports of
+ the interconnect path.
+
+- interconnect-names: For sdhc, we have two main paths.
+ 1. Data path : sdhc to ddr
+ 2. Config path : cpu to sdhc
+ For Data interconnect path the name supposed to be
+ is "sdhc-ddr" and for config interconnect path it is
+ "cpu-sdhc".
+ Please refer to Documentation/devicetree/bindings/
+ interconnect/ for more details.
+
Example:
sdhc_1: sdhci@f9824900 {
@@ -71,6 +86,9 @@ Example:
clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
clock-names = "core", "iface";
+ interconnects = <&qnoc MASTER_SDCC_ID &qnoc SLAVE_DDR_ID>,
+ <&qnoc MASTER_CPU_ID &qnoc SLAVE_SDCC_ID>;
+ interconnect-names = "sdhc-ddr","cpu-sdhc";
qcom,dll-config = <0x000f642c>;
qcom,ddr-config = <0x80040868>;
--
1.9.1
^ permalink raw reply related
* Re: Security Random Number Generator support
From: Russell King - ARM Linux admin @ 2020-06-05 9:27 UTC (permalink / raw)
To: Neal Liu
Cc: Marc Zyngier,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Julius Werner, Herbert Xu, Arnd Bergmann, Greg Kroah-Hartman,
Sean Wang, linux-mediatek@lists.infradead.org, lkml, wsd_upstream,
Rob Herring, Linux Crypto Mailing List, Matt Mackall,
Matthias Brugger, Crystal Guo (郭晶), Ard Biesheuvel,
Linux ARM
In-Reply-To: <1591347582.21704.9.camel@mtkswgap22>
On Fri, Jun 05, 2020 at 04:59:42PM +0800, Neal Liu wrote:
> On Fri, 2020-06-05 at 09:09 +0100, Russell King - ARM Linux admin wrote:
> > On Fri, Jun 05, 2020 at 03:19:03PM +0800, Neal Liu wrote:
> > > On Wed, 2020-06-03 at 17:34 +0800, Russell King - ARM Linux admin wrote:
> > > > This kind of thing is something that ARM have seems to shy away from
> > > > doing - it's a point I brought up many years ago when the whole
> > > > trustzone thing first appeared with its SMC call. Those around the
> > > > conference table were not interested - ARM seemed to prefer every
> > > > vendor to do off and do their own thing with the SMC interface.
> > >
> > > Does that mean it make sense to model a sec-rng driver, and get each
> > > vendor's SMC function id by DT node?
> >
> > _If_ vendors have already gone off and decided to use different SMC
> > function IDs for this, while keeping the rest of the SMC interface
> > the same, then the choice has already been made.
> >
> > I know on 32-bit that some of the secure world implementations can't
> > be changed; they're burnt into the ROM. I believe on 64-bit that isn't
> > the case, which makes it easier to standardise.
> >
> > Do you have visibility of how this SMC is implemented in the secure
> > side? Is it in ATF, and is it done as a vendor hack or is there an
> > element of generic implementation to it? Has it been submitted
> > upstream to the main ATF repository?
> >
>
> Take MediaTek as an example, some SoCs are implemented in ATF, some of
> them are implemented in TEE. We have no plan to make generic
> implementation in "secure world".
I think you have your answer right there - by _not_ making the API
generic and giving no motivation to use it, different vendors are
going to do different things (maybe even with a different API as well)
so there's no point the kernel driver pretending to be a generic
driver. If the driver isn't going to be generic, I see little point in
the SMC function number being in DT.
I think that as a _whole_ is a big mistake - there should be a generic
kernel driver for this, and there should be a standardised interface to
it through firmware. So, I would encourage you to try to get it
accepted one way or another amongst vendors as a standardised
interface.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC for 0.8m (est. 1762m) line in suburbia: sync at 13.1Mbps down 424kbps up
^ permalink raw reply
* Re: [PATCH v3 4/7] mfd: arizona: Move binding over to dtschema
From: Charles Keepax @ 2020-06-05 9:05 UTC (permalink / raw)
To: Rob Herring
Cc: cw00.choi, lee.jones, linus.walleij, broonie, myungjoo.ham,
lgirdwood, linux-kernel, devicetree, patches
In-Reply-To: <20200527194329.GA2608641@bogus>
On Wed, May 27, 2020 at 01:43:29PM -0600, Rob Herring wrote:
> On Wed, May 13, 2020 at 10:57:17AM +0100, Charles Keepax wrote:
> > Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
> > ---
> > + LDOVDD-supply:
> > + description:
> > + Digital power supply, used internally to generate DCVDD when
> > + internally supplied.
> > + $ref: /schemas/types.yaml#/definitions/phandle
>
> Don't need a type. *-supply has one already.
>
> I'll fix up when applying.
Just noticing as my kernel updated with the patches that for some
reason the type on -supply doesn't seem to get applied. I can set
the supplies to strings or integers and it still passes the
schema, without those extra $ref's I had in.
Thanks,
Charles
^ permalink raw reply
* Re: Security Random Number Generator support
From: Neal Liu @ 2020-06-05 8:59 UTC (permalink / raw)
To: Russell King - ARM Linux admin
Cc: Marc Zyngier,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Julius Werner, Herbert Xu, Arnd Bergmann, Greg Kroah-Hartman,
Sean Wang, linux-mediatek@lists.infradead.org, lkml, wsd_upstream,
Rob Herring, Linux Crypto Mailing List, Matt Mackall,
Matthias Brugger, Crystal Guo (郭晶), Ard Biesheuvel,
Linux ARM
In-Reply-To: <20200605080905.GF1551@shell.armlinux.org.uk>
On Fri, 2020-06-05 at 09:09 +0100, Russell King - ARM Linux admin wrote:
> On Fri, Jun 05, 2020 at 03:19:03PM +0800, Neal Liu wrote:
> > On Wed, 2020-06-03 at 17:34 +0800, Russell King - ARM Linux admin wrote:
> > > This kind of thing is something that ARM have seems to shy away from
> > > doing - it's a point I brought up many years ago when the whole
> > > trustzone thing first appeared with its SMC call. Those around the
> > > conference table were not interested - ARM seemed to prefer every
> > > vendor to do off and do their own thing with the SMC interface.
> >
> > Does that mean it make sense to model a sec-rng driver, and get each
> > vendor's SMC function id by DT node?
>
> _If_ vendors have already gone off and decided to use different SMC
> function IDs for this, while keeping the rest of the SMC interface
> the same, then the choice has already been made.
>
> I know on 32-bit that some of the secure world implementations can't
> be changed; they're burnt into the ROM. I believe on 64-bit that isn't
> the case, which makes it easier to standardise.
>
> Do you have visibility of how this SMC is implemented in the secure
> side? Is it in ATF, and is it done as a vendor hack or is there an
> element of generic implementation to it? Has it been submitted
> upstream to the main ATF repository?
>
Take MediaTek as an example, some SoCs are implemented in ATF, some of
them are implemented in TEE. We have no plan to make generic
implementation in "secure world".
Due to there must have different implementation in secure world for
vendors, we plan to provide a generic SMC interface in secure rng kernel
driver for more flexibility.
Vendors can decide which "secure world" they want (HYP/ATF/TEE) by
different smc/hvc and different SMC function IDs in DT node.
^ permalink raw reply
* Re: [RFC] dt-bindings: mailbox: add doorbell support to ARM MHU
From: Sudeep Holla @ 2020-06-05 8:58 UTC (permalink / raw)
To: Jassi Brar
Cc: Viresh Kumar, Rob Herring, Arnd Bergmann, Frank Rowand,
Bjorn Andersson, Vincent Guittot, Sudeep Holla, linux-arm-kernel,
Devicetree List, Linux Kernel Mailing List
In-Reply-To: <CABb+yY2YZ99NjHYNi0=KLGFDsVUeJmqiJD3E25Chwk-THJV4iw@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 2568 bytes --]
On Fri, Jun 05, 2020 at 01:30:54AM -0500, Jassi Brar wrote:
> On Thu, Jun 4, 2020 at 11:56 PM Sudeep Holla <sudeep.holla@arm.com> wrote:
>
> >
> > > >> bash-1526 [000] 1149.472553: scmi_xfer_begin: transfer_id=1538 msg_id=6 protocol_id=21 seq=0 poll=0
> > > >> <idle>-0 [001] 1149.472733: scmi_xfer_begin: transfer_id=1539 msg_id=7 protocol_id=19 seq=1 poll=1
> > > >
> > > Here another request is started before the first is finished.
> >
> > Ah, the prints are when the client requested. It is not when the mailbox
> > started it. So this just indicates the beginning of the transfer from the
> > client.
> >
> There maybe condition on a sensor read to finish within 1ms, but there
> is no condition for the read to _start_ at this very moment (usually
> there are sleeps in the path to sensor requests).
>
Again I wasn't clear. The trace logs are at the point just before calling
mbox_send_messages. So any delay in sensor drivers won't get include. It
is after the point sensor driver request to read the value and before we
send the request via mailbox.
> > > If you want this to work you have to serialise access to the single
> > > physical channel and/or run the remote firmware in asynchronous mode -
> > > that is, the firmware ack the bit as soon as it sees and starts
> > > working in the background, so that we return in ~3usec always, while
> > > the data returns whenever it is ready.
> >
> > Yes it does that for few requests like DVFS while it uses synchronous
> > mode for few others. While ideally I agree everything in asynchronous
> > most is better, I don't know there may be reasons for such design.
> >
> The reason is that, if the firmware works asynchronously, every call
> would return in ~3usec and you won't think you need virtual channels.
>
I really wish that was the case. Life would have been much simpler. I
did remember one reason after my earlier email. For DVFS, OSPM need
not rely on response. It operates in fire and forget mode. While sensors
we need the value back. And one main reason for not making the call
async in the specification is that it needs to support platforms without
Rx interrupts or even transport like SMC which may not have reverse path
without as real mailbox.
> You have shared only 'bad' log without serialising access. Please
> share log after serialising access to the channel and the 'good' log
> with virtual channels. That should put the topic to rest.
>
I didn't realise that, sorry for missing that earlier. Attached both
now, thanks for asking.
--
Regards,
Sudeep
[-- Attachment #2: good_trace.txt --]
[-- Type: text/plain, Size: 72000 bytes --]
bash-1062 [000] 103.333397: scmi_xfer_begin: transfer_id=1191 msg_id=7 protocol_id=19 seq=0 poll=1
bash-1062 [000] 103.333464: scmi_xfer_end: transfer_id=1191 msg_id=7 protocol_id=19 seq=0 status=0
bash-1391 [003] 103.353821: scmi_xfer_begin: transfer_id=1192 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [000] 103.354003: scmi_xfer_begin: transfer_id=1193 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [000] 103.354062: scmi_xfer_end: transfer_id=1193 msg_id=7 protocol_id=19 seq=1 status=0
migration/0-11 [000] 103.354119: scmi_xfer_begin: transfer_id=1194 msg_id=7 protocol_id=19 seq=1 poll=1
migration/0-11 [000] 103.354224: scmi_xfer_end: transfer_id=1194 msg_id=7 protocol_id=19 seq=1 status=0
bash-1391 [003] 103.354504: scmi_xfer_end: transfer_id=1192 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 103.354707: scmi_xfer_begin: transfer_id=1195 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 103.355037: scmi_xfer_end: transfer_id=1195 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 103.355215: scmi_xfer_begin: transfer_id=1196 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 103.355878: scmi_xfer_end: transfer_id=1196 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 103.356031: scmi_xfer_begin: transfer_id=1197 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 103.356408: scmi_xfer_end: transfer_id=1197 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 103.356581: scmi_xfer_begin: transfer_id=1198 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 103.357642: scmi_xfer_end: transfer_id=1198 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 103.357797: scmi_xfer_begin: transfer_id=1199 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 103.358476: scmi_xfer_end: transfer_id=1199 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 103.358626: scmi_xfer_begin: transfer_id=1200 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 103.359283: scmi_xfer_end: transfer_id=1200 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 103.359434: scmi_xfer_begin: transfer_id=1201 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 103.360073: scmi_xfer_end: transfer_id=1201 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 103.360246: scmi_xfer_begin: transfer_id=1202 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 103.360477: scmi_xfer_end: transfer_id=1202 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 103.360631: scmi_xfer_begin: transfer_id=1203 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 103.360694: scmi_xfer_end: transfer_id=1203 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 103.360846: scmi_xfer_begin: transfer_id=1204 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 103.360907: scmi_xfer_end: transfer_id=1204 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 103.361058: scmi_xfer_begin: transfer_id=1205 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 103.361119: scmi_xfer_end: transfer_id=1205 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 103.361294: scmi_xfer_begin: transfer_id=1206 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 103.361357: scmi_xfer_end: transfer_id=1206 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 103.361528: scmi_xfer_begin: transfer_id=1207 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 103.361885: scmi_xfer_end: transfer_id=1207 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 103.362040: scmi_xfer_begin: transfer_id=1208 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 103.362104: scmi_xfer_end: transfer_id=1208 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 103.362256: scmi_xfer_begin: transfer_id=1209 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 104.389005: scmi_xfer_begin: transfer_id=1221 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 104.389295: scmi_xfer_end: transfer_id=1221 msg_id=6 protocol_id=21 seq=0 status=0
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bash-1391 [003] 104.392288: scmi_xfer_begin: transfer_id=1227 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 104.393129: scmi_xfer_begin: transfer_id=1228 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 104.393968: scmi_xfer_begin: transfer_id=1229 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 104.395979: scmi_xfer_begin: transfer_id=1233 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 104.396509: scmi_xfer_begin: transfer_id=1235 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 104.396751: scmi_xfer_begin: transfer_id=1236 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 104.396992: scmi_xfer_begin: transfer_id=1237 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 104.398337: scmi_xfer_begin: transfer_id=1240 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 104.399056: scmi_xfer_begin: transfer_id=1241 msg_id=6 protocol_id=21 seq=0 poll=0
irq/14-mhu_link-190 [001] 104.399585: scmi_xfer_begin: transfer_id=1242 msg_id=7 protocol_id=19 seq=1 poll=1
bash-1391 [003] 104.399602: scmi_xfer_end: transfer_id=1241 msg_id=6 protocol_id=21 seq=0 status=0
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bash-1391 [003] 104.399909: scmi_xfer_begin: transfer_id=1243 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 104.400609: scmi_xfer_begin: transfer_id=1244 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 105.409919: scmi_xfer_begin: transfer_id=1254 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 106.439915: scmi_xfer_begin: transfer_id=1302 msg_id=6 protocol_id=21 seq=0 poll=0
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irq/14-mhu_link-190 [001] 106.441031: scmi_xfer_begin: transfer_id=1304 msg_id=7 protocol_id=19 seq=1 poll=1
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irq/14-mhu_link-190 [001] 106.441084: scmi_xfer_end: transfer_id=1304 msg_id=7 protocol_id=19 seq=1 status=0
bash-1391 [003] 106.441380: scmi_xfer_begin: transfer_id=1305 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 106.442092: scmi_xfer_begin: transfer_id=1306 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 106.442676: scmi_xfer_begin: transfer_id=1307 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 106.443253: scmi_xfer_begin: transfer_id=1308 msg_id=6 protocol_id=21 seq=0 poll=0
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<idle>-0 [004] 106.465340: scmi_xfer_begin: transfer_id=1310 msg_id=7 protocol_id=19 seq=0 poll=1
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<idle>-0 [004] 107.449657: scmi_xfer_begin: transfer_id=1311 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [004] 107.449725: scmi_xfer_end: transfer_id=1311 msg_id=7 protocol_id=19 seq=0 status=0
bash-1391 [003] 107.451392: scmi_xfer_begin: transfer_id=1312 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 107.451565: scmi_xfer_begin: transfer_id=1313 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 107.451624: scmi_xfer_end: transfer_id=1313 msg_id=7 protocol_id=19 seq=1 status=0
bash-1391 [003] 107.451682: scmi_xfer_end: transfer_id=1312 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 107.451878: scmi_xfer_begin: transfer_id=1314 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 107.452408: scmi_xfer_begin: transfer_id=1315 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 107.452925: scmi_xfer_begin: transfer_id=1316 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 107.453278: scmi_xfer_end: transfer_id=1316 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 107.453497: scmi_xfer_begin: transfer_id=1317 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 107.454271: scmi_xfer_begin: transfer_id=1318 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 107.455103: scmi_xfer_begin: transfer_id=1319 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 107.455915: scmi_xfer_begin: transfer_id=1320 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 107.456745: scmi_xfer_begin: transfer_id=1321 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 107.457134: scmi_xfer_begin: transfer_id=1322 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 107.457375: scmi_xfer_end: transfer_id=1322 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 107.457556: scmi_xfer_begin: transfer_id=1323 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 107.457782: scmi_xfer_end: transfer_id=1323 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 107.457960: scmi_xfer_begin: transfer_id=1324 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 107.458397: scmi_xfer_begin: transfer_id=1325 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 107.458768: scmi_xfer_begin: transfer_id=1326 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 107.459179: scmi_xfer_begin: transfer_id=1327 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 107.459422: scmi_xfer_begin: transfer_id=1328 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 107.459488: scmi_xfer_end: transfer_id=1328 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 107.459701: scmi_xfer_begin: transfer_id=1329 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [003] 107.460103: scmi_xfer_begin: transfer_id=1330 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [003] 107.460156: scmi_xfer_end: transfer_id=1330 msg_id=7 protocol_id=19 seq=1 status=0
bash-1391 [003] 107.460169: scmi_xfer_end: transfer_id=1329 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 107.460483: scmi_xfer_begin: transfer_id=1331 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1391 [003] 107.460939: scmi_xfer_end: transfer_id=1331 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 107.461281: scmi_xfer_begin: transfer_id=1332 msg_id=6 protocol_id=21 seq=0 poll=0
irq/14-mhu_link-190 [001] 107.461983: scmi_xfer_begin: transfer_id=1333 msg_id=7 protocol_id=19 seq=1 poll=1
bash-1391 [003] 107.462000: scmi_xfer_end: transfer_id=1332 msg_id=6 protocol_id=21 seq=0 status=0
irq/14-mhu_link-190 [001] 107.462036: scmi_xfer_end: transfer_id=1333 msg_id=7 protocol_id=19 seq=1 status=0
bash-1391 [003] 107.462300: scmi_xfer_begin: transfer_id=1334 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 107.463001: scmi_xfer_begin: transfer_id=1335 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 107.463590: scmi_xfer_begin: transfer_id=1336 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 107.464158: scmi_xfer_begin: transfer_id=1337 msg_id=6 protocol_id=21 seq=0 poll=0
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sleep-1402 [004] 107.470202: scmi_xfer_begin: transfer_id=1338 msg_id=7 protocol_id=19 seq=0 poll=1
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<idle>-0 [004] 107.489219: scmi_xfer_begin: transfer_id=1339 msg_id=7 protocol_id=19 seq=0 poll=1
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<idle>-0 [004] 108.470298: scmi_xfer_begin: transfer_id=1340 msg_id=7 protocol_id=19 seq=0 poll=1
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bash-1391 [003] 108.472032: scmi_xfer_begin: transfer_id=1341 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 108.472213: scmi_xfer_begin: transfer_id=1342 msg_id=7 protocol_id=19 seq=1 poll=1
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bash-1391 [003] 108.472331: scmi_xfer_end: transfer_id=1341 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 108.472529: scmi_xfer_begin: transfer_id=1343 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 108.473119: scmi_xfer_begin: transfer_id=1344 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 108.475013: scmi_xfer_begin: transfer_id=1347 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 108.475834: scmi_xfer_begin: transfer_id=1348 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 108.476647: scmi_xfer_begin: transfer_id=1349 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 108.478248: scmi_xfer_begin: transfer_id=1352 msg_id=6 protocol_id=21 seq=0 poll=0
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<idle>-0 [003] 108.480798: scmi_xfer_begin: transfer_id=1359 msg_id=7 protocol_id=19 seq=1 poll=1
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bash-1391 [003] 108.482133: scmi_xfer_begin: transfer_id=1361 msg_id=6 protocol_id=21 seq=0 poll=0
irq/14-mhu_link-190 [001] 108.482661: scmi_xfer_begin: transfer_id=1362 msg_id=7 protocol_id=19 seq=1 poll=1
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<idle>-0 [003] 110.522607: scmi_xfer_begin: transfer_id=1417 msg_id=7 protocol_id=19 seq=1 poll=1
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irq/14-mhu_link-190 [001] 110.524146: scmi_xfer_begin: transfer_id=1420 msg_id=7 protocol_id=19 seq=1 poll=1
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bash-1391 [003] 110.524464: scmi_xfer_begin: transfer_id=1421 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 111.534670: scmi_xfer_begin: transfer_id=1430 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1391 [003] 113.576843: scmi_xfer_begin: transfer_id=1488 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 113.577017: scmi_xfer_begin: transfer_id=1489 msg_id=7 protocol_id=19 seq=1 poll=1
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bash-1391 [003] 113.577136: scmi_xfer_end: transfer_id=1488 msg_id=6 protocol_id=21 seq=0 status=0
bash-1391 [003] 113.577333: scmi_xfer_begin: transfer_id=1490 msg_id=6 protocol_id=21 seq=0 poll=0
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[-- Attachment #3: bad_trace.txt --]
[-- Type: text/plain, Size: 72012 bytes --]
bash-1019 [005] 1149.452340: scmi_xfer_begin: transfer_id=1537 msg_id=7 protocol_id=19 seq=0 poll=1
bash-1019 [005] 1149.452407: scmi_xfer_end: transfer_id=1537 msg_id=7 protocol_id=19 seq=0 status=0
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bash-1526 [005] 1151.001432: scmi_xfer_begin: transfer_id=1612 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1526 [005] 1151.001837: scmi_xfer_begin: transfer_id=1613 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1526 [005] 1151.002302: scmi_xfer_begin: transfer_id=1614 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1151.002696: scmi_xfer_begin: transfer_id=1615 msg_id=7 protocol_id=19 seq=1 poll=1
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bash-1526 [005] 1151.043973: scmi_xfer_end: transfer_id=1614 msg_id=6 protocol_id=21 seq=0 status=-110
rcu_preempt-10 [004] 1151.044107: scmi_xfer_begin: transfer_id=1616 msg_id=7 protocol_id=19 seq=0 poll=1
rcu_preempt-10 [004] 1151.044166: scmi_xfer_end: transfer_id=1616 msg_id=7 protocol_id=19 seq=0 status=0
bash-1526 [005] 1151.044384: scmi_xfer_begin: transfer_id=1617 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1151.045191: scmi_xfer_end: transfer_id=1617 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1151.045525: scmi_xfer_begin: transfer_id=1618 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1526 [005] 1151.046456: scmi_xfer_begin: transfer_id=1619 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1151.046723: scmi_xfer_end: transfer_id=1619 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1151.047177: scmi_xfer_begin: transfer_id=1620 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1151.047472: scmi_xfer_end: transfer_id=1620 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1151.047810: scmi_xfer_begin: transfer_id=1621 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1151.048051: scmi_xfer_end: transfer_id=1621 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1151.048360: scmi_xfer_begin: transfer_id=1622 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1151.048715: scmi_xfer_end: transfer_id=1622 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1151.049880: scmi_xfer_begin: transfer_id=1623 msg_id=7 protocol_id=19 seq=0 poll=1
bash-1526 [005] 1151.049938: scmi_xfer_end: transfer_id=1623 msg_id=7 protocol_id=19 seq=0 status=0
<idle>-0 [000] 1151.074998: scmi_xfer_begin: transfer_id=1624 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [000] 1151.075060: scmi_xfer_end: transfer_id=1624 msg_id=7 protocol_id=19 seq=0 status=0
<idle>-0 [000] 1152.053922: scmi_xfer_begin: transfer_id=1625 msg_id=7 protocol_id=19 seq=0 poll=1
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bash-1526 [005] 1152.055670: scmi_xfer_begin: transfer_id=1626 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1152.055842: scmi_xfer_begin: transfer_id=1627 msg_id=7 protocol_id=19 seq=1 poll=1
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in:imklog-541 [000] 1152.064028: scmi_xfer_begin: transfer_id=1628 msg_id=7 protocol_id=19 seq=1 poll=1
in:imklog-541 [000] 1152.064035: scmi_xfer_end: transfer_id=1628 msg_id=7 protocol_id=19 seq=1 status=0
kworker/0:0-1376 [000] 1152.075118: scmi_xfer_begin: transfer_id=1629 msg_id=7 protocol_id=19 seq=1 poll=1
kworker/0:0-1376 [000] 1152.075128: scmi_xfer_end: transfer_id=1629 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1152.100040: scmi_xfer_end: transfer_id=1626 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1152.100511: scmi_xfer_begin: transfer_id=1630 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1152.100687: scmi_xfer_begin: transfer_id=1631 msg_id=7 protocol_id=19 seq=1 poll=1
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<idle>-0 [001] 1152.110785: scmi_xfer_begin: transfer_id=1632 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1152.110788: scmi_xfer_end: transfer_id=1632 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1152.143925: scmi_xfer_end: transfer_id=1630 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1152.144397: scmi_xfer_begin: transfer_id=1633 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1152.144571: scmi_xfer_begin: transfer_id=1634 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1152.144680: scmi_xfer_end: transfer_id=1634 msg_id=7 protocol_id=19 seq=1 status=-110
<idle>-0 [001] 1152.154784: scmi_xfer_begin: transfer_id=1635 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1152.154787: scmi_xfer_end: transfer_id=1635 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1152.188124: scmi_xfer_end: transfer_id=1633 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1152.188780: scmi_xfer_begin: transfer_id=1636 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1152.188956: scmi_xfer_begin: transfer_id=1637 msg_id=7 protocol_id=19 seq=1 poll=1
<idle>-0 [001] 1152.189065: scmi_xfer_end: transfer_id=1637 msg_id=7 protocol_id=19 seq=1 status=-110
bash-1526 [005] 1152.232101: scmi_xfer_end: transfer_id=1636 msg_id=6 protocol_id=21 seq=0 status=-110
<idle>-0 [000] 1152.232193: scmi_xfer_begin: transfer_id=1638 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [000] 1152.232254: scmi_xfer_end: transfer_id=1638 msg_id=7 protocol_id=19 seq=0 status=0
bash-1526 [005] 1152.232799: scmi_xfer_begin: transfer_id=1639 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.233510: scmi_xfer_end: transfer_id=1639 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.233854: scmi_xfer_begin: transfer_id=1640 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.234574: scmi_xfer_end: transfer_id=1640 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.235024: scmi_xfer_begin: transfer_id=1641 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.235764: scmi_xfer_end: transfer_id=1641 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.236128: scmi_xfer_begin: transfer_id=1642 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.236757: scmi_xfer_end: transfer_id=1642 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.237155: scmi_xfer_begin: transfer_id=1643 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.237396: scmi_xfer_end: transfer_id=1643 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.237705: scmi_xfer_begin: transfer_id=1644 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.237976: scmi_xfer_end: transfer_id=1644 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.238288: scmi_xfer_begin: transfer_id=1645 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.238559: scmi_xfer_end: transfer_id=1645 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.238928: scmi_xfer_begin: transfer_id=1646 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.239226: scmi_xfer_end: transfer_id=1646 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.239622: scmi_xfer_begin: transfer_id=1647 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.239860: scmi_xfer_end: transfer_id=1647 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.240175: scmi_xfer_begin: transfer_id=1648 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.240448: scmi_xfer_end: transfer_id=1648 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.240762: scmi_xfer_begin: transfer_id=1649 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.240852: scmi_xfer_end: transfer_id=1649 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.241164: scmi_xfer_begin: transfer_id=1650 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.241256: scmi_xfer_end: transfer_id=1650 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.241634: scmi_xfer_begin: transfer_id=1651 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.242060: scmi_xfer_end: transfer_id=1651 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.242372: scmi_xfer_begin: transfer_id=1652 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1152.242767: scmi_xfer_begin: transfer_id=1653 msg_id=7 protocol_id=19 seq=1 poll=1
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rcu_preempt-10 [004] 1152.282994: scmi_xfer_begin: transfer_id=1654 msg_id=7 protocol_id=19 seq=1 poll=1
rcu_preempt-10 [004] 1152.283014: scmi_xfer_end: transfer_id=1654 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1152.284310: scmi_xfer_end: transfer_id=1652 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1152.284867: scmi_xfer_begin: transfer_id=1655 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.285452: scmi_xfer_end: transfer_id=1655 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.285773: scmi_xfer_begin: transfer_id=1656 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.286058: scmi_xfer_end: transfer_id=1656 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.286361: scmi_xfer_begin: transfer_id=1657 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.286632: scmi_xfer_end: transfer_id=1657 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.287086: scmi_xfer_begin: transfer_id=1658 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1152.287477: scmi_xfer_end: transfer_id=1658 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1152.287800: scmi_xfer_begin: transfer_id=1659 msg_id=6 protocol_id=21 seq=0 poll=0
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bash-1526 [005] 1152.289294: scmi_xfer_begin: transfer_id=1660 msg_id=7 protocol_id=19 seq=0 poll=1
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bash-1526 [005] 1153.295825: scmi_xfer_begin: transfer_id=1663 msg_id=6 protocol_id=21 seq=0 poll=0
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rcu_preempt-10 [004] 1153.334921: scmi_xfer_begin: transfer_id=1666 msg_id=7 protocol_id=19 seq=1 poll=1
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bash-1526 [005] 1153.339954: scmi_xfer_end: transfer_id=1663 msg_id=6 protocol_id=21 seq=0 status=-110
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bash-1526 [005] 1153.341912: scmi_xfer_end: transfer_id=1669 msg_id=6 protocol_id=21 seq=0 status=0
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bash-1526 [005] 1153.343292: scmi_xfer_begin: transfer_id=1671 msg_id=6 protocol_id=21 seq=0 poll=0
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rcu_preempt-10 [004] 1153.386931: scmi_xfer_begin: transfer_id=1674 msg_id=7 protocol_id=19 seq=1 poll=1
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bash-1526 [005] 1153.390588: scmi_xfer_end: transfer_id=1677 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.391015: scmi_xfer_begin: transfer_id=1678 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.391253: scmi_xfer_end: transfer_id=1678 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.391570: scmi_xfer_begin: transfer_id=1679 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.391844: scmi_xfer_end: transfer_id=1679 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.392241: scmi_xfer_begin: transfer_id=1680 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.392478: scmi_xfer_end: transfer_id=1680 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.392803: scmi_xfer_begin: transfer_id=1681 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.393068: scmi_xfer_end: transfer_id=1681 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.393388: scmi_xfer_begin: transfer_id=1682 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.393478: scmi_xfer_end: transfer_id=1682 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.393793: scmi_xfer_begin: transfer_id=1683 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.393885: scmi_xfer_end: transfer_id=1683 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.394306: scmi_xfer_begin: transfer_id=1684 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.394765: scmi_xfer_end: transfer_id=1684 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.395077: scmi_xfer_begin: transfer_id=1685 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.395513: scmi_xfer_end: transfer_id=1685 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.395814: scmi_xfer_begin: transfer_id=1686 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.396427: scmi_xfer_end: transfer_id=1686 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.396737: scmi_xfer_begin: transfer_id=1687 msg_id=6 protocol_id=21 seq=0 poll=0
<idle>-0 [001] 1153.396942: scmi_xfer_begin: transfer_id=1688 msg_id=7 protocol_id=19 seq=1 poll=1
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rcu_preempt-10 [004] 1153.438939: scmi_xfer_begin: transfer_id=1689 msg_id=7 protocol_id=19 seq=1 poll=1
rcu_preempt-10 [004] 1153.438957: scmi_xfer_end: transfer_id=1689 msg_id=7 protocol_id=19 seq=1 status=0
bash-1526 [005] 1153.440057: scmi_xfer_end: transfer_id=1687 msg_id=6 protocol_id=21 seq=0 status=-110
bash-1526 [005] 1153.440699: scmi_xfer_begin: transfer_id=1690 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.440941: scmi_xfer_end: transfer_id=1690 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.441271: scmi_xfer_begin: transfer_id=1691 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.441358: scmi_xfer_end: transfer_id=1691 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1153.441668: scmi_xfer_begin: transfer_id=1692 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1153.441777: scmi_xfer_end: transfer_id=1692 msg_id=6 protocol_id=21 seq=0 status=0
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<idle>-0 [001] 1153.462865: scmi_xfer_begin: transfer_id=1694 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [001] 1153.462921: scmi_xfer_end: transfer_id=1694 msg_id=7 protocol_id=19 seq=0 status=0
<idle>-0 [001] 1154.447474: scmi_xfer_begin: transfer_id=1695 msg_id=7 protocol_id=19 seq=0 poll=1
<idle>-0 [001] 1154.447534: scmi_xfer_end: transfer_id=1695 msg_id=7 protocol_id=19 seq=0 status=0
bash-1526 [005] 1154.449108: scmi_xfer_begin: transfer_id=1696 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.449211: scmi_xfer_end: transfer_id=1696 msg_id=6 protocol_id=21 seq=0 status=0
bash-1526 [005] 1154.449591: scmi_xfer_begin: transfer_id=1697 msg_id=6 protocol_id=21 seq=0 poll=0
bash-1526 [005] 1154.449668: scmi_xfer_end: transfer_id=1697 msg_id=6 protocol_id=21 seq=0 status=0
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^ permalink raw reply
* Re: [PATCH v4 05/11] pwm: add support for sl28cpld PWM controller
From: Lee Jones @ 2020-06-05 8:49 UTC (permalink / raw)
To: Michael Walle
Cc: linux-gpio, devicetree, linux-kernel, linux-hwmon, linux-pwm,
linux-watchdog, linux-arm-kernel, Linus Walleij,
Bartosz Golaszewski, Rob Herring, Jean Delvare, Guenter Roeck,
Thierry Reding, Uwe Kleine-König, Wim Van Sebroeck,
Shawn Guo, Li Yang, Thomas Gleixner, Jason Cooper, Marc Zyngier,
Mark Brown, Greg Kroah-Hartman, Andy Shevchenko
In-Reply-To: <20200604211039.12689-6-michael@walle.cc>
On Thu, 04 Jun 2020, Michael Walle wrote:
> Add support for the PWM controller of the sl28cpld board management
> controller. This is part of a multi-function device driver.
>
> The controller has one PWM channel and can just generate four distinct
> frequencies.
>
> Signed-off-by: Michael Walle <michael@walle.cc>
> ---
> drivers/pwm/Kconfig | 10 ++
> drivers/pwm/Makefile | 1 +
> drivers/pwm/pwm-sl28cpld.c | 201 +++++++++++++++++++++++++++++++++++++
> 3 files changed, 212 insertions(+)
> create mode 100644 drivers/pwm/pwm-sl28cpld.c
>
> diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
> index cb8d739067d2..a39371c11ff6 100644
> --- a/drivers/pwm/Kconfig
> +++ b/drivers/pwm/Kconfig
> @@ -437,6 +437,16 @@ config PWM_SIFIVE
> To compile this driver as a module, choose M here: the module
> will be called pwm-sifive.
>
> +config PWM_SL28CPLD
> + tristate "Kontron sl28 PWM support"
> + depends on MFD_SL28CPLD
> + help
> + Generic PWM framework driver for board management controller
> + found on the Kontron sl28 CPLD.
> +
> + To compile this driver as a module, choose M here: the module
> + will be called pwm-sl28cpld.
> +
> config PWM_SPEAR
> tristate "STMicroelectronics SPEAr PWM support"
> depends on PLAT_SPEAR || COMPILE_TEST
> diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
> index a59c710e98c7..c479623724e8 100644
> --- a/drivers/pwm/Makefile
> +++ b/drivers/pwm/Makefile
> @@ -41,6 +41,7 @@ obj-$(CONFIG_PWM_RENESAS_TPU) += pwm-renesas-tpu.o
> obj-$(CONFIG_PWM_ROCKCHIP) += pwm-rockchip.o
> obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o
> obj-$(CONFIG_PWM_SIFIVE) += pwm-sifive.o
> +obj-$(CONFIG_PWM_SL28CPLD) += pwm-sl28cpld.o
> obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o
> obj-$(CONFIG_PWM_SPRD) += pwm-sprd.o
> obj-$(CONFIG_PWM_STI) += pwm-sti.o
> diff --git a/drivers/pwm/pwm-sl28cpld.c b/drivers/pwm/pwm-sl28cpld.c
> new file mode 100644
> index 000000000000..d82303f509f5
> --- /dev/null
> +++ b/drivers/pwm/pwm-sl28cpld.c
> @@ -0,0 +1,201 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * sl28cpld PWM driver.
> + *
> + * Copyright 2019 Kontron Europe GmbH
This is out of date.
> + */
> +
> +#include <linux/bitfield.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include <linux/pwm.h>
> +#include <linux/regmap.h>
> +
> +/*
> + * PWM timer block registers.
> + */
> +#define PWM_CTRL 0x00
> +#define PWM_ENABLE BIT(7)
> +#define PWM_MODE_250HZ 0
> +#define PWM_MODE_500HZ 1
> +#define PWM_MODE_1KHZ 2
> +#define PWM_MODE_2KHZ 3
> +#define PWM_MODE_MASK GENMASK(1, 0)
> +#define PWM_CYCLE 0x01
> +#define PWM_CYCLE_MAX 0x7f
> +
> +struct sl28cpld_pwm {
> + struct pwm_chip pwm_chip;
> + struct regmap *regmap;
> + u32 offset;
> +};
> +
> +struct sl28cpld_pwm_periods {
> + u8 ctrl;
> + unsigned long duty_cycle;
> +};
> +
> +struct sl28cpld_pwm_config {
> + unsigned long period_ns;
> + u8 max_duty_cycle;
> +};
Also, instead of hand rolling your own structure here, I think it
would be prudent to re-use something that already exists. Seeing as
this will be used to describe possible state, perhaps 'struct
pwm_state' would be suitable - leaving polarity and enabled
unpopulated of course.
Ah wait (sorry, thinking allowed and on-the-fly here), what is
max_duty_cycle here? I assume this does not have the same
meaning/value-type as the one in 'struct pwm_state'. What does
max_duty_cycle represent in your use-case?
> +static struct sl28cpld_pwm_config sl28cpld_pwm_config[] = {
> + [PWM_MODE_250HZ] = { .period_ns = 4000000, .max_duty_cycle = 0x80 },
> + [PWM_MODE_500HZ] = { .period_ns = 2000000, .max_duty_cycle = 0x40 },
> + [PWM_MODE_1KHZ] = { .period_ns = 1000000, .max_duty_cycle = 0x20 },
> + [PWM_MODE_2KHZ] = { .period_ns = 500000, .max_duty_cycle = 0x10 },
> +};
Tiny nit: If you lined these up from the '{'s it would be easier to
see/compare the period_ns values at first glance, rather than having
to count the ' 's and '0's.
> +static inline struct sl28cpld_pwm *to_sl28cpld_pwm(struct pwm_chip *chip)
> +{
> + return container_of(chip, struct sl28cpld_pwm, pwm_chip);
> +}
Why not save yourself the trouble and just:
struct sl28cpld_pwm *pwm = dev_get_drvdata(chip->dev);
> +static void sl28cpld_pwm_get_state(struct pwm_chip *chip,
> + struct pwm_device *pwm,
> + struct pwm_state *state)
> +{
> + struct sl28cpld_pwm *spc = to_sl28cpld_pwm(chip);
> + static struct sl28cpld_pwm_config *config;
> + unsigned int reg;
> + unsigned long cycle;
Why is this 'long' here and 'long long' in *_apply()?
> + unsigned int mode;
> +
> + regmap_read(spc->regmap, spc->offset + PWM_CTRL, ®);
> +
> + state->enabled = reg & PWM_ENABLE;
> +
> + mode = FIELD_GET(PWM_MODE_MASK, reg);
> + config = &sl28cpld_pwm_config[mode];
> + state->period = config->period_ns;
> +
> + regmap_read(spc->regmap, spc->offset + PWM_CYCLE, ®);
> + cycle = reg * config->period_ns;
> + state->duty_cycle = DIV_ROUND_CLOSEST_ULL(cycle,
> + config->max_duty_cycle);
> +}
> +
> +static int sl28cpld_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
> + const struct pwm_state *state)
> +{
> + struct sl28cpld_pwm *spc = to_sl28cpld_pwm(chip);
> + struct sl28cpld_pwm_config *config;
> + unsigned long long cycle;
> + int ret;
> + int mode;
> + u8 ctrl;
> +
> + /* update config, first search best matching period */
Please use correct grammar (less full stops) in comments.
> + for (mode = 0; mode < ARRAY_SIZE(sl28cpld_pwm_config); mode++) {
> + config = &sl28cpld_pwm_config[mode];
> + if (state->period == config->period_ns)
> + break;
> + }
> +
> + if (mode == ARRAY_SIZE(sl28cpld_pwm_config))
> + return -EINVAL;
> +
> + ctrl = FIELD_PREP(PWM_MODE_MASK, mode);
> + if (state->enabled)
> + ctrl |= PWM_ENABLE;
> +
> + cycle = state->duty_cycle * config->max_duty_cycle;
> + do_div(cycle, state->period);
Forgive my ignorance (I'm new here!), but what are these 2 lines
doing? Here we are multiplying the current duty_cycle with the
maximum value, then dividing by the period.
So in the case of PWM_MODE_1KHZ with a 50% duty cycle, you'd have:
(500000 * 0x20[16]) / 1000000 = [0x10]16
Thus, the above gives as a proportional representation of the maximum
valid value for placement into the cycle control register(s), right?
Either way (whether I'm correct or not), I think it would be nice to
mention this in a comment. Maybe even clarify with a simple example.
> + /*
> + * The hardware doesn't allow to set max_duty_cycle if the
> + * 250Hz mode is enabled. But since this is "all-high" output
> + * just use the 500Hz mode with the duty cycle to max value.
> + */
> + if (cycle == config->max_duty_cycle) {
> + ctrl &= ~PWM_MODE_MASK;
> + ctrl |= FIELD_PREP(PWM_MODE_MASK, PWM_MODE_500HZ);
> + cycle = PWM_CYCLE_MAX;
> + }
This is being executed even when 250Hz mode is not enabled.
Is that by design? If so, it doesn't match the comment.
> + ret = regmap_write(spc->regmap, spc->offset + PWM_CTRL, ctrl);
> + if (ret)
> + return ret;
> +
> + return regmap_write(spc->regmap, spc->offset + PWM_CYCLE, (u8)cycle);
> +}
> +
> +static const struct pwm_ops sl28cpld_pwm_ops = {
> + .apply = sl28cpld_pwm_apply,
> + .get_state = sl28cpld_pwm_get_state,
> + .owner = THIS_MODULE,
> +};
> +
> +static int sl28cpld_pwm_probe(struct platform_device *pdev)
> +{
> + struct sl28cpld_pwm *pwm;
This is super confusing. Here you call it 'pwm', but when you bring
the data to the fore for consumption, you call it something different
('spc') for some reason.
Is there logic behind this?
> + struct pwm_chip *chip;
> + int ret;
> +
> + if (!pdev->dev.parent)
> + return -ENODEV;
> +
> + pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
> + if (!pwm)
> + return -ENOMEM;
> +
> + pwm->regmap = dev_get_regmap(pdev->dev.parent, NULL);
> + if (!pwm->regmap)
> + return -ENODEV;
> +
> + ret = device_property_read_u32(&pdev->dev, "reg", &pwm->offset);
Really? Can you use the 'reg' property in this way?
Side question:
Do any of your child address spaces actually overlap/intersect?
> + if (ret)
> + return -EINVAL;
> +
> + /* initialize struct pwm_chip */
Proper grammar please.
> + chip = &pwm->pwm_chip;
> + chip->dev = &pdev->dev;
> + chip->ops = &sl28cpld_pwm_ops;
> + chip->base = -1;
> + chip->npwm = 1;
> +
> + ret = pwmchip_add(&pwm->pwm_chip);
> + if (ret < 0)
Is '> 0' even valid?
Suggest "!ret" here, as you have done above.
> + return ret;
> +
> + platform_set_drvdata(pdev, pwm);
> +
> + return 0;
> +}
> +
> +static int sl28cpld_pwm_remove(struct platform_device *pdev)
> +{
> + struct sl28cpld_pwm *pwm = platform_get_drvdata(pdev);
> +
> + return pwmchip_remove(&pwm->pwm_chip);
> +}
> +
> +static const struct of_device_id sl28cpld_pwm_of_match[] = {
> + { .compatible = "kontron,sl28cpld-pwm" },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, sl28cpld_pwm_of_match);
> +
> +static const struct platform_device_id sl28cpld_pwm_id_table[] = {
> + {"sl28cpld-pwm"},
Spaces either side of the "'s please.
> + {},
> +};
> +MODULE_DEVICE_TABLE(platform, sl28cpld_pwm_id_table);
What are you using this for?
> +static struct platform_driver sl28cpld_pwm_driver = {
> + .probe = sl28cpld_pwm_probe,
> + .remove = sl28cpld_pwm_remove,
> + .id_table = sl28cpld_pwm_id_table,
> + .driver = {
> + .name = KBUILD_MODNAME,
Please just use the quoted name in full.
> + .of_match_table = sl28cpld_pwm_of_match,
> + },
> +};
> +module_platform_driver(sl28cpld_pwm_driver);
> +
> +MODULE_DESCRIPTION("sl28cpld PWM Driver");
"SL28CPLD" ?
> +MODULE_AUTHOR("Michael Walle <michael@walle.cc>");
> +MODULE_LICENSE("GPL");
--
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply
* Re: [PATCH v2] spi: bcm2835: Enable shared interrupt support
From: Nicolas Saenz Julienne @ 2020-06-05 8:46 UTC (permalink / raw)
To: Florian Fainelli, linux-kernel
Cc: moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Scott Branden, lukas, Ray Jui, Rob Herring,
open list:SPI SUBSYSTEM, Mark Brown,
maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE,
Martin Sperl
In-Reply-To: <20200604212819.715-1-f.fainelli@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 5683 bytes --]
Hi Florian,
Thanks for taking over this!
On Thu, 2020-06-04 at 14:28 -0700, Florian Fainelli wrote:
> The 4 SPI controller instances added in BCM2711 and BCM7211 SoCs (SPI3,
> SPI4, SPI5 and SPI6) share the same interrupt line with SPI0.
I think this isn't 100% correct. SPI0 has its own interrupt, but SPI[3-6] share
the same interrupt.
> For the BCM2835 case which is deemed performance critical, we would like
> to continue using an interrupt handler which does not have the extra
> comparison on BCM2835_SPI_CS_INTR.
>
> To support that requirement the common interrupt handling code between
> the shared and non-shared interrupt paths is split into a
> bcm2835_spi_interrupt_common() and both bcm2835_spi_interrupt() as well
> as bcm2835_spi_shared_interrupt() make use of it.
>
> During probe, we determine if there is at least another instance of this
> SPI controller, and if there is, then we install a shared interrupt
> handler.
As there was pushback to use a different compatible string for an otherwise
identical IP, I think it's a good compromise.
>
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
> ---
> Changes in v2:
>
> - identify other available SPI nodes to determine if we need to set-up
> interrupt sharing. This needs to happen for the very first instance
> since we cannot know for the first instance whether interrupt sharing
> is needed or not.
>
> drivers/spi/spi-bcm2835.c | 61 ++++++++++++++++++++++++++++++++-------
> 1 file changed, 50 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c
> index 237bd306c268..0288b5b3de1e 100644
> --- a/drivers/spi/spi-bcm2835.c
> +++ b/drivers/spi/spi-bcm2835.c
> @@ -361,11 +361,10 @@ static void bcm2835_spi_reset_hw(struct spi_controller
> *ctlr)
> bcm2835_wr(bs, BCM2835_SPI_DLEN, 0);
> }
>
> -static irqreturn_t bcm2835_spi_interrupt(int irq, void *dev_id)
> +static inline irqreturn_t bcm2835_spi_interrupt_common(struct spi_controller
> *ctlr,
> + u32 cs)
Keep in mind the new 100 character limit.
> {
> - struct spi_controller *ctlr = dev_id;
> struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
> - u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS);
>
> /*
> * An interrupt is signaled either if DONE is set (TX FIFO empty)
> @@ -394,6 +393,27 @@ static irqreturn_t bcm2835_spi_interrupt(int irq, void
> *dev_id)
> return IRQ_HANDLED;
> }
>
> +static irqreturn_t bcm2835_spi_interrupt(int irq, void *dev_id)
> +{
> + struct spi_controller *ctlr = dev_id;
> + struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
> + u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS);
> +
> + return bcm2835_spi_interrupt_common(ctlr, cs);
> +}
> +
> +static irqreturn_t bcm2835_spi_shared_interrupt(int irq, void *dev_id)
> +{
> + struct spi_controller *ctlr = dev_id;
> + struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
> + u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS);
> +
> + if (!(cs & BCM2835_SPI_CS_INTR))
> + return IRQ_NONE;
> +
> + return bcm2835_spi_interrupt_common(ctlr, cs);
> +}
> +
> static int bcm2835_spi_transfer_one_irq(struct spi_controller *ctlr,
> struct spi_device *spi,
> struct spi_transfer *tfr,
> @@ -1287,12 +1307,37 @@ static int bcm2835_spi_setup(struct spi_device *spi)
> return 0;
> }
>
> +static const struct of_device_id bcm2835_spi_match[] = {
> + { .compatible = "brcm,bcm2835-spi", },
> + {}
> +};
> +MODULE_DEVICE_TABLE(of, bcm2835_spi_match);
> +
> static int bcm2835_spi_probe(struct platform_device *pdev)
> {
> + irq_handler_t bcm2835_spi_isr_func = bcm2835_spi_interrupt;
> struct spi_controller *ctlr;
> + unsigned long flags = 0;
> + struct device_node *dn;
> struct bcm2835_spi *bs;
> int err;
>
> + /* On BCM2711 there can be multiple SPI controllers enabled sharing the
> + * same interrupt line, but we also want to minimize the overhead if
> + * there is no need to support interrupt sharing. If we find at least
> + * another available instane (not counting the one we are probed from),
"instance"
> + * then we assume that interrupt sharing is necessary.
> + */
> + for_each_compatible_node(dn, NULL, bcm2835_spi_match[0].compatible) {
> + err = of_device_is_available(dn) && dn != pdev->dev.of_node;
nit: maybe err is not the ideal variable name here.
> + of_node_put(dn);
> + if (err) {
> + flags = IRQF_SHARED;
> + bcm2835_spi_isr_func = bcm2835_spi_shared_interrupt;
> + break;
> + }
> + }
> +
> ctlr = spi_alloc_master(&pdev->dev, ALIGN(sizeof(*bs),
> dma_get_cache_alignment()));
> if (!ctlr)
> @@ -1344,8 +1389,8 @@ static int bcm2835_spi_probe(struct platform_device
> *pdev)
> bcm2835_wr(bs, BCM2835_SPI_CS,
> BCM2835_SPI_CS_CLEAR_RX | BCM2835_SPI_CS_CLEAR_TX);
>
> - err = devm_request_irq(&pdev->dev, bs->irq, bcm2835_spi_interrupt, 0,
> - dev_name(&pdev->dev), ctlr);
> + err = devm_request_irq(&pdev->dev, bs->irq, bcm2835_spi_isr_func,
> + flags, dev_name(&pdev->dev), ctlr);
> if (err) {
> dev_err(&pdev->dev, "could not request IRQ: %d\n", err);
> goto out_dma_release;
> @@ -1400,12 +1445,6 @@ static void bcm2835_spi_shutdown(struct platform_device
> *pdev)
> dev_err(&pdev->dev, "failed to shutdown\n");
> }
>
> -static const struct of_device_id bcm2835_spi_match[] = {
> - { .compatible = "brcm,bcm2835-spi", },
> - {}
> -};
> -MODULE_DEVICE_TABLE(of, bcm2835_spi_match);
> -
> static struct platform_driver bcm2835_spi_driver = {
> .driver = {
> .name = DRV_NAME,
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply
* Re: [PATCH v2 00/91] drm/vc4: Support BCM2711 Display Pipelin
From: Jian-Hong Pan @ 2020-06-05 8:44 UTC (permalink / raw)
To: Maxime Ripard
Cc: Daniel Drake, Nicolas Saenz Julienne, Eric Anholt, dri-devel,
linux-rpi-kernel, bcm-kernel-feedback-list, linux-arm-kernel,
Linux Kernel, devicetree, linux-clk, linux-i2c,
Linux Upstreaming Team
In-Reply-To: <20200602110442.2ceuymhwuomvjj6i@gilmour>
Maxime Ripard <maxime@cerno.tech> 於 2020年6月2日 週二 下午7:04寫道：
>
> Hi,
>
> On Mon, Jun 01, 2020 at 03:58:26PM +0800, Jian-Hong Pan wrote:
> > Maxime Ripard <maxime@cerno.tech> 於 2020年5月28日 週四 下午3:30寫道：
> > >
> > > Hi Daniel,
> > >
> > > On Wed, May 27, 2020 at 05:15:12PM +0800, Daniel Drake wrote:
> > > > On Wed, May 27, 2020 at 5:13 PM Maxime Ripard <maxime@cerno.tech> wrote:
> > > > > I'm about to send a v3 today or tomorrow, I can Cc you (and Jian-Hong) if you
> > > > > want.
> > > >
> > > > That would be great, although given the potentially inconsistent
> > > > results we've been seeing so far it would be great if you could
> > > > additionally push a git branch somewhere.
> > > > That way we can have higher confidence that we are applying exactly
> > > > the same patches to the same base etc.
> > >
> > > So I sent a new iteration yesterday, and of course forgot to cc you... Sorry for
> > > that.
> > >
> > > I've pushed my current branch here:
> > > https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux.git/log/?h=rpi4-kms
> >
> > Thanks to Maxime!
> >
> > I have tried your repository on branch rpi4-kms. The DRM VC4 is used!
> > But got some issues:
> > 1. Some weird error message in dmesg. Not sure it is related, or not
> > [ 5.219321] [drm:vc5_hdmi_init_resources] *ERROR* Failed to get
> > HDMI state machine clock
> > https://gist.github.com/starnight/3f317dca121065a361cf08e91225e389
>
> That's a deferred probing. The first time the HDMI driver is being
> probed, the firmware clock driver has not been probed yet. It's making
> another attempt later on, which succeeds.
>
> > 2. The screen flashes suddenly sometimes.
I append drm.debug=0x3 to boot command. Whenever, the screen flashes,
I notice the logs like this:
Jun 01 15:22:40 endless kernel: [drm:drm_calc_timestamping_constants]
crtc 64: hwmode: htotal 2200, vtotal 1125, vdisplay 1080
Jun 01 15:22:40 endless kernel: [drm:drm_calc_timestamping_constants]
crtc 64: clock 148500 kHz framedur 16666666 linedur 14814
Jun 01 15:22:40 endless kernel: [drm:drm_vblank_enable] enabling
vblank on crtc 3, ret: 0
Jun 01 15:22:40 endless kernel: [drm:drm_mode_object_put.part.0] OBJ ID: 159 (2)
Jun 01 15:22:40 endless kernel: [drm:drm_mode_object_put.part.0] OBJ ID: 154 (1)
Jun 01 15:22:40 endless kernel: [drm:vblank_disable_fn] disabling
vblank on crtc 3
Jun 01 15:22:42 endless kernel: [drm:drm_ioctl] pid=584, dev=0xe200,
auth=1, DRM_IOCTL_MODE_CURSOR
Jun 01 15:22:42 endless kernel: [drm:drm_ioctl] pid=584, dev=0xe200,
auth=1, DRM_IOCTL_MODE_CURSOR2
Jun 01 15:22:42 endless kernel: [drm:drm_mode_object_get] OBJ ID: 159 (1)
Jun 01 15:22:42 endless kernel: [drm:drm_mode_object_get] OBJ ID: 154 (1)
Jun 01 15:22:42 endless kernel: [drm:drm_calc_timestamping_constants]
crtc 64: hwmode: htotal 2200, vtotal 1125, vdisplay 1080
Jun 01 15:22:42 endless kernel: [drm:drm_calc_timestamping_constants]
crtc 64: clock 148500 kHz framedur 16666666 linedur 14814
Jun 01 15:22:42 endless kernel: [drm:drm_vblank_enable] enabling
vblank on crtc 3, ret: 0
Jun 01 15:22:42 endless kernel: [drm:drm_mode_object_put.part.0] OBJ ID: 159 (2)
Jun 01 15:22:42 endless kernel: [drm:drm_mode_object_put.part.0] OBJ ID: 154 (2)
Here is the full log
https://gist.github.com/starnight/85d641819839eddc7a55ca7173990a56
> > 3. The higher resolutions, like 1920x1080 ... are lost after hot
> > re-plug HDMI cable (HDMI0)
I should explain this in more detail. Here are the steps to reproduce
this issue:
1. Before unplug the HDMI cable from HDMI0 port.
$ xrandr
Screen 0: minimum 320 x 200, current 1920 x 1080, maximum 2048 x 2048
HDMI-1 connected primary 1920x1080+0+0 (normal left inverted right x
axis y axis) 521mm x 293mm
1920x1080 60.00*+ 50.00 59.94
1920x1080i 60.00 50.00 59.94
1680x1050 59.88
1280x1024 75.02 60.02
1440x900 59.90
1280x960 60.00
1152x864 75.00
1280x720 60.00 50.00 59.94
1440x576 50.00
1024x768 75.03 70.07 60.00
1440x480 60.00 59.94
832x624 74.55
800x600 72.19 75.00 60.32 56.25
720x576 50.00
720x480 60.00 59.94
640x480 75.00 72.81 66.67 60.00 59.94
720x400 70.08
HDMI-2 disconnected (normal left inverted right x axis y axis)
2. Unplug the HDMI cable from HDMI0 port.
3. Plug the HDMI cable to **HDMI1** port.
$ xrandr
Screen 0: minimum 320 x 200, current 1920 x 1080, maximum 2048 x 2048
HDMI-1 disconnected (normal left inverted right x axis y axis)
HDMI-2 connected primary 1920x1080+0+0 (normal left inverted right x
axis y axis) 521mm x 293mm
1920x1080 60.00*+ 50.00 59.94
1920x1080i 60.00 50.00 59.94
1680x1050 59.88
1280x1024 75.02 60.02
1440x900 59.90
1280x960 60.00
1152x864 75.00
1280x720 60.00 50.00 59.94
1440x576 50.00
1024x768 75.03 70.07 60.00
1440x480 60.00 59.94
832x624 74.55
800x600 72.19 75.00 60.32 56.25
720x576 50.00
720x480 60.00 59.94
640x480 75.00 72.81 66.67 60.00 59.94
720x400 70.08
4. Unplug the HDMI cable from **HDMI1** port.
5. Plug the HDMI cable back to HDMI0 port.
$ xrandr
Screen 0: minimum 320 x 200, current 1368 x 768, maximum 2048 x 2048
HDMI-1 connected primary 1368x768+0+0 (normal left inverted right x
axis y axis) 0mm x 0mm
1368x768 59.88*
1360x768 59.80
1280x800 59.81
1152x864 60.00
1280x720 59.86
1024x768 60.00
1024x576 59.90
960x540 59.63
800x600 60.32
800x450 59.82
700x450 59.88
640x480 59.94
684x384 59.88 59.85
680x384 59.80 59.96
640x400 59.88 59.98
576x432 60.06
640x360 59.86 59.83
512x384 60.00
512x288 60.00 59.92
480x270 59.63 59.82
400x300 60.32
320x240 60.05
HDMI-2 disconnected (normal left inverted right x axis y axis)
Jian-Hong Pan
> I'm not sure on how to exactly reproduce those issues (or what they are)
> though, can you expand on this?
>
> Maxime
^ permalink raw reply
* Re: [PATCH v8 0/5] support reserving crashkernel above 4G on arm64 kdump
From: Nicolas Saenz Julienne @ 2020-06-05 8:21 UTC (permalink / raw)
To: John Donnelly, Bhupesh Sharma
Cc: chenzhou, Simon Horman, Devicetree List, Arnd Bergmann,
Baoquan He, Linux Doc Mailing List, Catalin Marinas, guohanjun,
kexec mailing list, Linux Kernel Mailing List, Will Deacon,
Rob Herring, James Morse, Prabhakar Kushwaha, Thomas Gleixner,
Prabhakar Kushwaha, RuiRui Yang, Ingo Molnar, linux-arm-kernel
In-Reply-To: <de6c7c59-89d2-5b2e-d7ba-50403c4bcaf2@oracle.com>
[-- Attachment #1: Type: text/plain, Size: 19044 bytes --]
On Thu, 2020-06-04 at 21:26 -0500, John Donnelly wrote:
> On 6/4/20 12:01 PM, Nicolas Saenz Julienne wrote:
> > On Thu, 2020-06-04 at 01:17 +0530, Bhupesh Sharma wrote:
> > > Hi All,
> > >
> > > On Wed, Jun 3, 2020 at 9:03 PM John Donnelly <john.p.donnelly@oracle.com>
> > > wrote:
> > > > > On Jun 3, 2020, at 8:20 AM, chenzhou <chenzhou10@huawei.com> wrote:
> > > > >
> > > > > Hi,
> > > > >
> > > > >
> > > > > On 2020/6/3 19:47, Prabhakar Kushwaha wrote:
> > > > > > Hi Chen,
> > > > > >
> > > > > > On Tue, Jun 2, 2020 at 8:12 PM John Donnelly <
> > > > > > john.p.donnelly@oracle.com
> > > > > > > wrote:
> > > > > > >
> > > > > > > > On Jun 2, 2020, at 12:38 AM, Prabhakar Kushwaha <
> > > > > > > > prabhakar.pkin@gmail.com> wrote:
> > > > > > > >
> > > > > > > > On Tue, Jun 2, 2020 at 3:29 AM John Donnelly <
> > > > > > > > john.p.donnelly@oracle.com> wrote:
> > > > > > > > > Hi . See below !
> > > > > > > > >
> > > > > > > > > > On Jun 1, 2020, at 4:02 PM, Bhupesh Sharma <
> > > > > > > > > > bhsharma@redhat.com>
> > > > > > > > > > wrote:
> > > > > > > > > >
> > > > > > > > > > Hi John,
> > > > > > > > > >
> > > > > > > > > > On Tue, Jun 2, 2020 at 1:01 AM John Donnelly <
> > > > > > > > > > John.P.donnelly@oracle.com> wrote:
> > > > > > > > > > > Hi,
> > > > > > > > > > >
> > > > > > > > > > >
> > > > > > > > > > > On 6/1/20 7:02 AM, Prabhakar Kushwaha wrote:
> > > > > > > > > > > > Hi Chen,
> > > > > > > > > > > >
> > > > > > > > > > > > On Thu, May 21, 2020 at 3:05 PM Chen Zhou <
> > > > > > > > > > > > chenzhou10@huawei.com> wrote:
> > > > > > > > > > > > > This patch series enable reserving crashkernel above
> > > > > > > > > > > > > 4G in
> > > > > > > > > > > > > arm64.
> > > > > > > > > > > > >
> > > > > > > > > > > > > There are following issues in arm64 kdump:
> > > > > > > > > > > > > 1. We use crashkernel=X to reserve crashkernel below
> > > > > > > > > > > > > 4G,
> > > > > > > > > > > > > which will fail
> > > > > > > > > > > > > when there is no enough low memory.
> > > > > > > > > > > > > 2. Currently, crashkernel=Y@X can be used to reserve
> > > > > > > > > > > > > crashkernel above 4G,
> > > > > > > > > > > > > in this case, if swiotlb or DMA buffers are required,
> > > > > > > > > > > > > crash dump kernel
> > > > > > > > > > > > > will boot failure because there is no low memory
> > > > > > > > > > > > > available
> > > > > > > > > > > > > for allocation.
> > > > > > > > > > > > >
> > > > > > > > > > > > We are getting "warn_alloc" [1] warning during boot of
> > > > > > > > > > > > kdump
> > > > > > > > > > > > kernel
> > > > > > > > > > > > with bootargs as [2] of primary kernel.
> > > > > > > > > > > > This error observed on ThunderX2 ARM64 platform.
> > > > > > > > > > > >
> > > > > > > > > > > > It is observed with latest upstream tag (v5.7-rc3) with
> > > > > > > > > > > > this
> > > > > > > > > > > > patch set
> > > > > > > > > > > > and
> > > > > > > > > > > >
> >
https://urldefense.com/v3/__https://lists.infradead.org/pipermail/kexec/2020-May/025128.html__;!!GqivPVa7Brio!LnTSARkCt0V0FozR0KmqooaH5ADtdXvs3mPdP3KRVqALmvSK2VmCkIPIhsaxbiIAAlzu$
> > > > > > > > > > > > Also **without** this patch-set
> > > > > > > > > > > > "
> > > > > > > > > > > >
> >
https://urldefense.com/v3/__https://www.spinics.net/lists/arm-kernel/msg806882.html__;!!GqivPVa7Brio!LnTSARkCt0V0FozR0KmqooaH5ADtdXvs3mPdP3KRVqALmvSK2VmCkIPIhsaxbjC6ujMA$
> > > > > > > > > > > > "
> > > > > > > > > > > >
> > > > > > > > > > > > This issue comes whenever crashkernel memory is reserved
> > > > > > > > > > > > after 0xc000_0000.
> > > > > > > > > > > > More details discussed earlier in
> > > > > > > > > > > >
> >
https://urldefense.com/v3/__https://www.spinics.net/lists/arm-kernel/msg806882.html__;!!GqivPVa7Brio!LnTSARkCt0V0FozR0KmqooaH5ADtdXvs3mPdP3KRVqALmvSK2VmCkIPIhsaxbjC6ujMA$
> > without
> > > > > > > > > > > > any
> > > > > > > > > > > > solution
> > > > > > > > > > > >
> > > > > > > > > > > > This patch-set is expected to solve similar kind of
> > > > > > > > > > > > issue.
> > > > > > > > > > > > i.e. low memory is only targeted for DMA, swiotlb; So
> > > > > > > > > > > > above
> > > > > > > > > > > > mentioned
> > > > > > > > > > > > observation should be considered/fixed. .
> > > > > > > > > > > >
> > > > > > > > > > > > --pk
> > > > > > > > > > > >
> > > > > > > > > > > > [1]
> > > > > > > > > > > > [ 30.366695] DMI: Cavium Inc. Saber/Saber, BIOS
> > > > > > > > > > > > TX2-FW-Release-3.1-build_01-2803-g74253a541a mm/dd/yyyy
> > > > > > > > > > > > [ 30.367696] NET: Registered protocol family 16
> > > > > > > > > > > > [ 30.369973] swapper/0: page allocation failure:
> > > > > > > > > > > > order:6,
> > > > > > > > > > > > mode:0x1(GFP_DMA),
> > > > > > > > > > > > nodemask=(null),cpuset=/,mems_allowed=0
> > > > > > > > > > > > [ 30.369980] CPU: 0 PID: 1 Comm: swapper/0 Not tainted
> > > > > > > > > > > > 5.7.0-rc3+ #121
> > > > > > > > > > > > [ 30.369981] Hardware name: Cavium Inc. Saber/Saber,
> > > > > > > > > > > > BIOS
> > > > > > > > > > > > TX2-FW-Release-3.1-build_01-2803-g74253a541a mm/dd/yyyy
> > > > > > > > > > > > [ 30.369984] Call trace:
> > > > > > > > > > > > [ 30.369989] dump_backtrace+0x0/0x1f8
> > > > > > > > > > > > [ 30.369991] show_stack+0x20/0x30
> > > > > > > > > > > > [ 30.369997] dump_stack+0xc0/0x10c
> > > > > > > > > > > > [ 30.370001] warn_alloc+0x10c/0x178
> > > > > > > > > > > > [ 30.370004] __alloc_pages_slowpath.constprop.111+0xb
> > > > > > > > > > > > 10/0
> > > > > > > > > > > > xb50
> > > > > > > > > > > > [ 30.370006] __alloc_pages_nodemask+0x2b4/0x300
> > > > > > > > > > > > [ 30.370008] alloc_page_interleave+0x24/0x98
> > > > > > > > > > > > [ 30.370011] alloc_pages_current+0xe4/0x108
> > > > > > > > > > > > [ 30.370017] dma_atomic_pool_init+0x44/0x1a4
> > > > > > > > > > > > [ 30.370020] do_one_initcall+0x54/0x228
> > > > > > > > > > > > [ 30.370027] kernel_init_freeable+0x228/0x2cc
> > > > > > > > > > > > [ 30.370031] kernel_init+0x1c/0x110
> > > > > > > > > > > > [ 30.370034] ret_from_fork+0x10/0x18
> > > > > > > > > > > > [ 30.370036] Mem-Info:
> > > > > > > > > > > > [ 30.370064] active_anon:0 inactive_anon:0
> > > > > > > > > > > > isolated_anon:0
> > > > > > > > > > > > [ 30.370064] active_file:0 inactive_file:0
> > > > > > > > > > > > isolated_file:0
> > > > > > > > > > > > [ 30.370064] unevictable:0 dirty:0 writeback:0
> > > > > > > > > > > > unstable:0
> > > > > > > > > > > > [ 30.370064] slab_reclaimable:34
> > > > > > > > > > > > slab_unreclaimable:4438
> > > > > > > > > > > > [ 30.370064] mapped:0 shmem:0 pagetables:14 bounce:0
> > > > > > > > > > > > [ 30.370064] free:1537719 free_pcp:219 free_cma:0
> > > > > > > > > > > > [ 30.370070] Node 0 active_anon:0kB inactive_anon:0kB
> > > > > > > > > > > > active_file:0kB inactive_file:0kB unevictable:0kB
> > > > > > > > > > > > isolated(anon):0kB
> > > > > > > > > > > > isolated(file):0kB mapped:0kB dirty:0kB writeback:0kB
> > > > > > > > > > > > shmem:0kB
> > > > > > > > > > > > shmem_thp: 0kB shmem_pmdmapped: 0kB anon_thp: 0kB
> > > > > > > > > > > > writeback_tmp:0kB
> > > > > > > > > > > > unstable:0kB all_unreclaimable? no
> > > > > > > > > > > > [ 30.370073] Node 1 active_anon:0kB inactive_anon:0kB
> > > > > > > > > > > > active_file:0kB inactive_file:0kB unevictable:0kB
> > > > > > > > > > > > isolated(anon):0kB
> > > > > > > > > > > > isolated(file):0kB mapped:0kB dirty:0kB writeback:0kB
> > > > > > > > > > > > shmem:0kB
> > > > > > > > > > > > shmem_thp: 0kB shmem_pmdmapped: 0kB anon_thp: 0kB
> > > > > > > > > > > > writeback_tmp:0kB
> > > > > > > > > > > > unstable:0kB all_unreclaimable? no
> > > > > > > > > > > > [ 30.370079] Node 0 DMA free:0kB min:0kB low:0kB
> > > > > > > > > > > > high:0kB
> > > > > > > > > > > > reserved_highatomic:0KB active_anon:0kB
> > > > > > > > > > > > inactive_anon:0kB
> > > > > > > > > > > > active_file:0kB inactive_file:0kB unevictable:0kB
> > > > > > > > > > > > writepending:0kB
> > > > > > > > > > > > present:128kB managed:0kB mlocked:0kB kernel_stack:0kB
> > > > > > > > > > > > pagetables:0kB
> > > > > > > > > > > > bounce:0kB free_pcp:0kB local_pcp:0kB free_cma:0kB
> > > > > > > > > > > > [ 30.370084] lowmem_reserve[]: 0 250 6063 6063
> > > > > > > > > > > > [ 30.370090] Node 0 DMA32 free:256000kB min:408kB
> > > > > > > > > > > > low:664kB
> > > > > > > > > > > > high:920kB reserved_highatomic:0KB active_anon:0kB
> > > > > > > > > > > > inactive_anon:0kB
> > > > > > > > > > > > active_file:0kB inactive_file:0kB unevictable:0kB
> > > > > > > > > > > > writepending:0kB
> > > > > > > > > > > > present:269700kB managed:256000kB mlocked:0kB
> > > > > > > > > > > > kernel_stack:0kB
> > > > > > > > > > > > pagetables:0kB bounce:0kB free_pcp:0kB local_pcp:0kB
> > > > > > > > > > > > free_cma:0kB
> > > > > > > > > > > > [ 30.370094] lowmem_reserve[]: 0 0 5813 5813
> > > > > > > > > > > > [ 30.370100] Node 0 Normal free:5894876kB min:9552kB
> > > > > > > > > > > > low:15504kB
> > > > > > > > > > > > high:21456kB reserved_highatomic:0KB active_anon:0kB
> > > > > > > > > > > > inactive_anon:0kB
> > > > > > > > > > > > active_file:0kB inactive_file:0kB unevictable:0kB
> > > > > > > > > > > > writepending:0kB
> > > > > > > > > > > > present:8388608kB managed:5953112kB mlocked:0kB
> > > > > > > > > > > > kernel_stack:21672kB
> > > > > > > > > > > > pagetables:56kB bounce:0kB free_pcp:876kB
> > > > > > > > > > > > local_pcp:176kB
> > > > > > > > > > > > free_cma:0kB
> > > > > > > > > > > > [ 30.370104] lowmem_reserve[]: 0 0 0 0
> > > > > > > > > > > > [ 30.370107] Node 0 DMA: 0*4kB 0*8kB 0*16kB 0*32kB
> > > > > > > > > > > > 0*64kB
> > > > > > > > > > > > 0*128kB
> > > > > > > > > > > > 0*256kB 0*512kB 0*1024kB 0*2048kB 0*4096kB = 0kB
> > > > > > > > > > > > [ 30.370113] Node 0 DMA32: 0*4kB 0*8kB 0*16kB 0*32kB
> > > > > > > > > > > > 0*64kB 0*128kB
> > > > > > > > > > > > 0*256kB 0*512kB 0*1024kB 1*2048kB (M) 62*4096kB (M) =
> > > > > > > > > > > > 256000kB
> > > > > > > > > > > > [ 30.370119] Node 0 Normal: 2*4kB (M) 3*8kB (ME)
> > > > > > > > > > > > 2*16kB
> > > > > > > > > > > > (UE) 3*32kB
> > > > > > > > > > > > (UM) 1*64kB (U) 2*128kB (M) 2*256kB (ME) 3*512kB (ME)
> > > > > > > > > > > > 3*1024kB (ME)
> > > > > > > > > > > > 3*2048kB (UME) 1436*4096kB (M) = 5893600kB
> > > > > > > > > > > > [ 30.370129] Node 0 hugepages_total=0 hugepages_free=0
> > > > > > > > > > > > hugepages_surp=0 hugepages_size=1048576kB
> > > > > > > > > > > > [ 30.370130] 0 total pagecache pages
> > > > > > > > > > > > [ 30.370132] 0 pages in swap cache
> > > > > > > > > > > > [ 30.370134] Swap cache stats: add 0, delete 0, find
> > > > > > > > > > > > 0/0
> > > > > > > > > > > > [ 30.370135] Free swap = 0kB
> > > > > > > > > > > > [ 30.370136] Total swap = 0kB
> > > > > > > > > > > > [ 30.370137] 2164609 pages RAM
> > > > > > > > > > > > [ 30.370139] 0 pages HighMem/MovableOnly
> > > > > > > > > > > > [ 30.370140] 612331 pages reserved
> > > > > > > > > > > > [ 30.370141] 0 pages hwpoisoned
> > > > > > > > > > > > [ 30.370143] DMA: failed to allocate 256 KiB pool for
> > > > > > > > > > > > atomic
> > > > > > > > > > > > coherent allocation
> > > > > > > > > > > During my testing I saw the same error and
> > > > > > > > > > > Chen's solution
> > > > > > > > > > > corrected it .
> > > > > > > > > > Which combination you are using on your side? I am using
> > > > > > > > > > Prabhakar's
> > > > > > > > > > suggested environment and can reproduce the issue
> > > > > > > > > > with or without Chen's crashkernel support above 4G
> > > > > > > > > > patchset.
> > > > > > > > > >
> > > > > > > > > > I am also using a ThunderX2 platform with latest
> > > > > > > > > > makedumpfile
> > > > > > > > > > code and
> > > > > > > > > > kexec-tools (with the suggested patch
> > > > > > > > > > <
> > > > > > > > > >
> >
https://urldefense.com/v3/__https://lists.infradead.org/pipermail/kexec/2020-May/025128.html__;!!GqivPVa7Brio!J6lUig58-Gw6TKZnEEYzEeSU36T-1SqlB1kImU00xtX_lss5Tx-JbUmLE9TJC3foXBLg$
> > > > > > > > > > > ).
> > > > > > > > > > Thanks,
> > > > > > > > > > Bhupesh
> > > > > > > > > I did this activity 5 months ago and I have moved on to other
> > > > > > > > > activities. My DMA failures were related to PCI devices that
> > > > > > > > > could
> > > > > > > > > not be enumerated because low-DMA space was not available
> > > > > > > > > when
> > > > > > > > > crashkernel was moved above 4G; I don’t recall the exact
> > > > > > > > > platform.
> > > > > > > > >
> > > > > > > > >
> > > > > > > > >
> > > > > > > > > For this failure ,
> > > > > > > > >
> > > > > > > > > > > > DMA: failed to allocate 256 KiB pool for atomic
> > > > > > > > > > > > coherent allocation
> > > > > > > > > Is due to :
> > > > > > > > >
> > > > > > > > >
> > > > > > > > > 3618082c
> > > > > > > > > ("arm64 use both ZONE_DMA and ZONE_DMA32")
> > > > > > > > >
> > > > > > > > > With the introduction of ZONE_DMA to support the Raspberry DMA
> > > > > > > > > region below 1G, the crashkernel is placed in the upper 4G
> > > > > > > > > ZONE_DMA_32 region. Since the crashkernel does not have access
> > > > > > > > > to the ZONE_DMA region, it prints out call trace during
> > > > > > > > > bootup.
> > > > > > > > >
> > > > > > > > > It is due to having this CONFIG item ON :
> > > > > > > > >
> > > > > > > > >
> > > > > > > > > CONFIG_ZONE_DMA=y
> > > > > > > > >
> > > > > > > > > Turning off ZONE_DMA fixes a issue and Raspberry PI 4 will
> > > > > > > > > use the device tree to specify memory below 1G.
> > > > > > > > >
> > > > > > > > >
> > > > > > > > Disabling ZONE_DMA is temporary solution. We may need proper
> > > > > > > > solution
> > > > > > > Perhaps the Raspberry platform configuration dependencies need
> > > > > > > separated from “server class” Arm equipment ? Or auto-
> > > > > > > configured on
> > > > > > > boot ? Consult an expert ;-)
> > > > > > >
> > > > > > >
> > > > > > >
> > > > > > > > > I would like to see Chen’s feature added , perhaps as
> > > > > > > > > EXPERIMENTAL, so we can get some configuration testing done
> > > > > > > > > on
> > > > > > > > > it. It corrects having a DMA zone in low memory while crash-
> > > > > > > > > kernel is above 4GB. This has been going on for a year now.
> > > > > > > > I will also like this patch to be added in Linux as early as
> > > > > > > > possible.
> > > > > > > >
> > > > > > > > Issue mentioned by me happens with or without this patch.
> > > > > > > >
> > > > > > > > This patch-set can consider fixing because it uses low memory
> > > > > > > > for
> > > > > > > > DMA
> > > > > > > > & swiotlb only.
> > > > > > > > We can consider restricting crashkernel within the required
> > > > > > > > range
> > > > > > > > like below
> > > > > > > >
> > > > > > > > diff --git a/kernel/crash_core.c b/kernel/crash_core.c
> > > > > > > > index 7f9e5a6dc48c..bd67b90d35bd 100644
> > > > > > > > --- a/kernel/crash_core.c
> > > > > > > > +++ b/kernel/crash_core.c
> > > > > > > > @@ -354,7 +354,7 @@ int __init reserve_crashkernel_low(void)
> > > > > > > > return 0;
> > > > > > > > }
> > > > > > > >
> > > > > > > > - low_base = memblock_find_in_range(0, 1ULL << 32,
> > > > > > > > low_size,
> > > > > > > > CRASH_ALIGN);
> > > > > > > > + low_base = memblock_find_in_range(0,0xc0000000,
> > > > > > > > low_size,
> > > > > > > > CRASH_ALIGN);
> > > > > > > > if (!low_base) {
> > > > > > > > pr_err("Cannot reserve %ldMB crashkernel low
> > > > > > > > memory,
> > > > > > > > please try smaller size.\n",
> > > > > > > > (unsigned long)(low_size >> 20));
> > > > > > > >
> > > > > > > >
> > > > > > > I suspect 0xc0000000 would need to be a CONFIG item and not
> > > > > > > hard-coded.
> > > > > > >
> > > > > > if you consider this as valid change, can you please incorporate as
> > > > > > part of your patch-set.
> > > > > After commit 1a8e1cef7 ("arm64: use both ZONE_DMA and ZONE_DMA32")，the
> > > > > 0-
> > > > > 4G memory is splited
> > > > > to DMA [mem 0x0000000000000000-0x000000003fffffff] and DMA32 [mem
> > > > > 0x0000000040000000-0x00000000ffffffff] on arm64.
> > > > >
> > > > > From the above discussion, on your platform, the low crashkernel fall
> > > > > in
> > > > > DMA32 region, but your environment needs to access DMA
> > > > > region, so there is the call trace.
> > > > >
> > > > > I have a question, why do you choose 0xc0000000 here?
> > > > >
> > > > > Besides, this is common code, we also need to consider about x86.
> > > > >
> > > > + nsaenzjulienne@suse.de
> > Thanks for adding me to the conversation, and sorry for the headaches.
> >
> > > > Exactly . This is why it needs to be a CONFIG option for Raspberry
> > > > .., or device tree option.
> > > >
> > > >
> > > > We could revert 1a8e1cef7 since it broke Arm kdump too.
> > > Well, unfortunately the patch for commit 1a8e1cef7603 ("arm64: use
> > > both ZONE_DMA and ZONE_DMA32") was not Cc'ed to the kexec mailing
> > > list, thus we couldn't get many eyes on it for a thorough review from
> > > kexec/kdump p-o-v.
> > >
> > > Also we historically never had distinction in common arch code on the
> > > basis of the intended end use-case: embedded, server or automotive, so
> > > I am not sure introducing a Raspberry specific CONFIG option would be
> > > a good idea.
> > +1
> >
> > From the distros perspective it's very important to keep a single kernel
> > image.
> >
> > > So, rather than reverting the patch, we can look at addressing the
> > > same properly this time - especially from a kdump p-o-v.
> > > This issue has been reported by some Red Hat arm64 partners with
> > > upstream kernel also and as we have noticed in the past as well,
> > > hardcoding the placement of the crashkernel base address (unless the
> > > base address is specified by a crashkernel=X@Y like bootargs) is also
> > > not a portable suggestion.
> > >
> > > I am working on a possible fix and will have more updates on the same
> > > in a day-or-two.
> > Please keep me in the loop, we've also had issues pointing to this reported
> > by
> > SUSE partners. I can do some testing both on the RPi4 and on big servers
> > that
> > need huge crashkernel sizes.
> >
> > Regards,
> > Nicolas
> >
> Hi Nicolas,
>
>
> You want want to review this topic with the various email threads . It
> has been a long journey.
Will do, thanks!
Regards,
Nicolas
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^ permalink raw reply
* Re: [PATCH v4 05/11] pwm: add support for sl28cpld PWM controller
From: Andy Shevchenko @ 2020-06-05 8:15 UTC (permalink / raw)
To: Michael Walle
Cc: open list:GPIO SUBSYSTEM, devicetree, Linux Kernel Mailing List,
linux-hwmon, linux-pwm, linux-watchdog, linux-arm Mailing List,
Linus Walleij, Bartosz Golaszewski, Rob Herring, Jean Delvare,
Guenter Roeck, Lee Jones, Thierry Reding, Uwe Kleine-König,
Wim Van Sebroeck, Shawn Guo, Li Yang, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Mark Brown, Greg Kroah-Hartman,
Andy Shevchenko
In-Reply-To: <20200604211039.12689-6-michael@walle.cc>
On Fri, Jun 5, 2020 at 12:16 AM Michael Walle <michael@walle.cc> wrote:
>
> Add support for the PWM controller of the sl28cpld board management
> controller. This is part of a multi-function device driver.
>
> The controller has one PWM channel and can just generate four distinct
> frequencies.
So same comments (extra comma, cargo cult headers, etc) are applied
here and perhaps to all other patches in the series.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH v4 04/11] watchdog: add support for sl28cpld watchdog
From: Andy Shevchenko @ 2020-06-05 8:14 UTC (permalink / raw)
To: Michael Walle
Cc: open list:GPIO SUBSYSTEM, devicetree, Linux Kernel Mailing List,
linux-hwmon, linux-pwm, linux-watchdog, linux-arm Mailing List,
Linus Walleij, Bartosz Golaszewski, Rob Herring, Jean Delvare,
Guenter Roeck, Lee Jones, Thierry Reding, Uwe Kleine-König,
Wim Van Sebroeck, Shawn Guo, Li Yang, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Mark Brown, Greg Kroah-Hartman,
Andy Shevchenko
In-Reply-To: <20200604211039.12689-5-michael@walle.cc>
On Fri, Jun 5, 2020 at 12:14 AM Michael Walle <michael@walle.cc> wrote:
>
> Add support for the watchdog of the sl28cpld board management
> controller. This is part of a multi-function device driver.
...
> +#include <linux/of_device.h>
Didn't find a user of this.
...
> +static bool nowayout = WATCHDOG_NOWAYOUT;
> +module_param(nowayout, bool, 0);
> +MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
> + __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
> +
> +static int timeout;
> +module_param(timeout, int, 0);
> +MODULE_PARM_DESC(timeout, "Initial watchdog timeout in seconds");
Guenter ACKed this, but I'm wondering why we still need module parameters...
...
> + int ret;
> +
> + ret = regmap_read(wdt->regmap, wdt->offset + WDT_COUNT, &val);
> +
> + return (ret < 0) ? 0 : val;
Besides extra parentheses and questionable ' < 0' part, the following
would look better I think
ret = ...
if (ret)
return 0;
return val;
...
> + int ret;
> +
> + ret = regmap_write(wdt->regmap, wdt->offset + WDT_TIMEOUT, timeout);
> + if (!ret)
> + wdd->timeout = timeout;
> +
> + return ret;
Similar story here:
ret = ...
if (ret)
return ret;
wdd->... = ...
return 0;
...
> + ret = regmap_read(wdt->regmap, wdt->offset + WDT_CTRL, &status);
> + if (ret < 0)
What ' < 0' means? Do we have some positive return values?
Ditto for all your code.
> + return ret;
...
> + if (status & WDT_CTRL_EN) {
> + sl28cpld_wdt_start(wdd);
> + set_bit(WDOG_HW_RUNNING, &wdd->status);
Do you need atomic op here? Why?
> + }
...
> +static const struct of_device_id sl28cpld_wdt_of_match[] = {
> + { .compatible = "kontron,sl28cpld-wdt" },
> + {},
No comma.
> +};
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH v8 14/14] media: platform: Add jpeg dec/enc feature
From: Xia Jiang @ 2020-06-05 8:07 UTC (permalink / raw)
To: Hans Verkuil
Cc: Mauro Carvalho Chehab, Rob Herring, Matthias Brugger, Rick Chang,
linux-media, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Marek Szyprowski, Tomasz Figa, srv_heupstream,
senozhatsky, mojahsu, drinkcat, maoguang.meng, sj.huang
In-Reply-To: <b62b303c-10cd-fdf6-52fa-90d63124487a@xs4all.nl>
On Mon, 2020-05-11 at 11:04 +0200, Hans Verkuil wrote:
> On 03/04/2020 11:40, Xia Jiang wrote:
> > Add mtk jpeg encode v4l2 driver based on jpeg decode, because that jpeg
> > decode and encode have great similarities with function operation.
> >
> > Signed-off-by: Xia Jiang <xia.jiang@mediatek.com>
> > ---
> > v8:jpeg encoder and decoder use separate callbacks instead of repeating
> > the if/else in every callback.
> > improve vidioc_try_fmt() implementation that can be shared by jpeg
> > encoder and decoder.
> > fix the bug of jpeg encoder s_selection implementation.
> > cancel the state of the jpeg encoder.
> > improve jpeg encoder and decoder set default params flow.
> > put the clock names and other datas in a match_data struct.
> > fix the bug of geting correctly quality value.
> > do the all the bits' settings of one register in one function.
> > move the code of mtk_jpeg_enc_reg.h to mtk_jpeg_enc_hw.h and delete
> > mtk_jpeg_enc_reg.h.
> >
> > v7: reverse spin lock and unlock operation in device run function for
> > multi-instance.
> >
> > v6: add space to arounding '+'.
> > alignment 'struct mtk_jpeg_fmt *fmt' match open parenthesis.
> > change 'mtk_jpeg_enc_set_encFormat' to 'mtk_jpeg_enc_set_enc_format'.
> > make 'mtk_jpeg_ctrls_setup' to static prototype.
> > delete unused variables 'jpeg'/'align_h'/'align_w'/'flags'.
> > initialize 'yuv_format'/'enc_quality' variables.
> >
> > v5: support crop for encoder and compose for decoder in s_selection and
> > g_selection function.
> > use clamp() to replace mtk_jpeg_bound_align_image() and round_up()
> > to replace mtk_jpeg_align().
> > delete jpeg_enc_param/mtk_jpeg_enc_param structure and
> > mtk_jpeg_set_param(), program the registers directly based on
> > the original V4L2 values.
> > move macro definition about hw to mtk_jpeg_enc_reg.h.
> > delete unnecessary V4L2 logs in driver.
> > cancel spin lock and unlock operation in deviec run function.
> > change jpeg enc register offset hex numberals from upercase to lowercase.
> >
> > v4: split mtk_jpeg_try_fmt_mplane() to two functions, one for encoder,
> > one for decoder.
> > split mtk_jpeg_set_default_params() to two functions, one for
> > encoder, one for decoder.
> > add cropping support for encoder in g/s_selection ioctls.
> > change exif mode support by using V4L2_JPEG_ACTIVE_MARKER_APP1.
> > change MTK_JPEG_MAX_WIDTH/MTK_JPEG_MAX_HEIGH from 8192 to 65535 by
> > specification.
> > move width shifting operation behind aligning operation in
> > mtk_jpeg_try_enc_fmt_mplane() for bug fix.
> > fix user abuseing data_offset issue for DMABUF in
> > mtk_jpeg_set_enc_src().
> > fix kbuild warings: change MTK_JPEG_MIN_HEIGHT/MTK_JPEG_MAX_HEIGHT
> > and MTK_JPEG_MIN_WIDTH/MTK_JPEG_MAX_WIDTH from
> > 'int' type to 'unsigned int' type.
> > fix msleadingly indented of 'else'.
> > v3: delete Change-Id.
> > only test once handler->error after the last v4l2_ctrl_new_std().
> > seperate changes of v4l2-ctrls.c and v4l2-controls.h to new patch.
> > v2: fix compliance test fail, check created buffer size in driver.
> > ---
> > drivers/media/platform/mtk-jpeg/Makefile | 5 +-
> > .../media/platform/mtk-jpeg/mtk_jpeg_core.c | 1038 +++++++++++++----
> > .../media/platform/mtk-jpeg/mtk_jpeg_core.h | 51 +-
> > .../media/platform/mtk-jpeg/mtk_jpeg_dec_hw.h | 7 +-
> > .../media/platform/mtk-jpeg/mtk_jpeg_enc_hw.c | 193 +++
> > .../media/platform/mtk-jpeg/mtk_jpeg_enc_hw.h | 123 ++
> > 6 files changed, 1188 insertions(+), 229 deletions(-)
> > create mode 100644 drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_hw.c
> > create mode 100644 drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_hw.h
> >
> > diff --git a/drivers/media/platform/mtk-jpeg/Makefile b/drivers/media/platform/mtk-jpeg/Makefile
> > index 48516dcf96e6..76c33aad0f3f 100644
> > --- a/drivers/media/platform/mtk-jpeg/Makefile
> > +++ b/drivers/media/platform/mtk-jpeg/Makefile
> > @@ -1,3 +1,6 @@
> > # SPDX-License-Identifier: GPL-2.0-only
> > -mtk_jpeg-objs := mtk_jpeg_core.o mtk_jpeg_dec_hw.o mtk_jpeg_dec_parse.o
> > +mtk_jpeg-objs := mtk_jpeg_core.o \
> > + mtk_jpeg_dec_hw.o \
> > + mtk_jpeg_dec_parse.o \
> > + mtk_jpeg_enc_hw.o
> > obj-$(CONFIG_VIDEO_MEDIATEK_JPEG) += mtk_jpeg.o
> > diff --git a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c b/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c
> > index 77a95185584c..18a759ce2c46 100644
> > --- a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c
> > +++ b/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c
> > @@ -3,6 +3,7 @@
> > * Copyright (c) 2016 MediaTek Inc.
> > * Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com>
> > * Rick Chang <rick.chang@mediatek.com>
> > + * Xia Jiang <xia.jiang@mediatek.com>
> > */
> >
> > #include <linux/clk.h>
> > @@ -23,11 +24,60 @@
> > #include <media/videobuf2-dma-contig.h>
> > #include <soc/mediatek/smi.h>
> >
> > +#include "mtk_jpeg_enc_hw.h"
> > #include "mtk_jpeg_dec_hw.h"
> > #include "mtk_jpeg_core.h"
> > #include "mtk_jpeg_dec_parse.h"
> >
> > -static struct mtk_jpeg_fmt mtk_jpeg_formats[] = {
> > +static struct mtk_jpeg_fmt mtk_jpeg_enc_formats[] = {
> > + {
> > + .fourcc = V4L2_PIX_FMT_JPEG,
> > + .colplanes = 1,
> > + .flags = MTK_JPEG_FMT_FLAG_ENC_CAPTURE,
> > + },
> > + {
> > + .fourcc = V4L2_PIX_FMT_NV12M,
> > + .hw_format = JPEG_ENC_YUV_FORMAT_NV12,
> > + .h_sample = {4, 4},
> > + .v_sample = {4, 2},
> > + .colplanes = 2,
> > + .h_align = 4,
> > + .v_align = 4,
> > + .flags = MTK_JPEG_FMT_FLAG_ENC_OUTPUT,
> > + },
> > + {
> > + .fourcc = V4L2_PIX_FMT_NV21M,
> > + .hw_format = JEPG_ENC_YUV_FORMAT_NV21,
> > + .h_sample = {4, 4},
> > + .v_sample = {4, 2},
> > + .colplanes = 2,
> > + .h_align = 4,
> > + .v_align = 4,
> > + .flags = MTK_JPEG_FMT_FLAG_ENC_OUTPUT,
> > + },
> > + {
> > + .fourcc = V4L2_PIX_FMT_YUYV,
> > + .hw_format = JPEG_ENC_YUV_FORMAT_YUYV,
> > + .h_sample = {8},
> > + .v_sample = {4},
> > + .colplanes = 1,
> > + .h_align = 5,
> > + .v_align = 3,
> > + .flags = MTK_JPEG_FMT_FLAG_ENC_OUTPUT,
> > + },
> > + {
> > + .fourcc = V4L2_PIX_FMT_YVYU,
> > + .hw_format = JPEG_ENC_YUV_FORMAT_YVYU,
> > + .h_sample = {8},
> > + .v_sample = {4},
> > + .colplanes = 1,
> > + .h_align = 5,
> > + .v_align = 3,
> > + .flags = MTK_JPEG_FMT_FLAG_ENC_OUTPUT,
> > + },
> > +};
> > +
> > +static struct mtk_jpeg_fmt mtk_jpeg_dec_formats[] = {
> > {
> > .fourcc = V4L2_PIX_FMT_JPEG,
> > .colplanes = 1,
> > @@ -53,7 +103,8 @@ static struct mtk_jpeg_fmt mtk_jpeg_formats[] = {
> > },
> > };
> >
> > -#define MTK_JPEG_NUM_FORMATS ARRAY_SIZE(mtk_jpeg_formats)
> > +#define MTK_JPEG_ENC_NUM_FORMATS ARRAY_SIZE(mtk_jpeg_enc_formats)
> > +#define MTK_JPEG_DEC_NUM_FORMATS ARRAY_SIZE(mtk_jpeg_dec_formats)
> >
> > enum {
> > MTK_JPEG_BUF_FLAGS_INIT = 0,
> > @@ -70,6 +121,11 @@ struct mtk_jpeg_src_buf {
> > static int debug;
> > module_param(debug, int, 0644);
> >
> > +static inline struct mtk_jpeg_ctx *ctrl_to_ctx(struct v4l2_ctrl *ctrl)
> > +{
> > + return container_of(ctrl->handler, struct mtk_jpeg_ctx, ctrl_hdl);
> > +}
> > +
> > static inline struct mtk_jpeg_ctx *mtk_jpeg_fh_to_ctx(struct v4l2_fh *fh)
> > {
> > return container_of(fh, struct mtk_jpeg_ctx, fh);
> > @@ -81,12 +137,25 @@ static inline struct mtk_jpeg_src_buf *mtk_jpeg_vb2_to_srcbuf(
> > return container_of(to_vb2_v4l2_buffer(vb), struct mtk_jpeg_src_buf, b);
> > }
> >
> > -static int mtk_jpeg_querycap(struct file *file, void *priv,
> > - struct v4l2_capability *cap)
> > +static int mtk_jpeg_enc_querycap(struct file *file, void *priv,
> > + struct v4l2_capability *cap)
> > +{
> > + struct mtk_jpeg_dev *jpeg = video_drvdata(file);
> > +
> > + strscpy(cap->driver, MTK_JPEG_NAME, sizeof(cap->driver));
> > + strscpy(cap->card, MTK_JPEG_NAME " encoder", sizeof(cap->card));
> > + snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
> > + dev_name(jpeg->dev));
> > +
> > + return 0;
> > +}
> > +
> > +static int mtk_jpeg_dec_querycap(struct file *file, void *priv,
> > + struct v4l2_capability *cap)
> > {
> > struct mtk_jpeg_dev *jpeg = video_drvdata(file);
> >
> > - strscpy(cap->driver, MTK_JPEG_NAME " decoder", sizeof(cap->driver));
> > + strscpy(cap->driver, MTK_JPEG_NAME, sizeof(cap->driver));
> > strscpy(cap->card, MTK_JPEG_NAME " decoder", sizeof(cap->card));
> > snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
> > dev_name(jpeg->dev));
> > @@ -94,6 +163,54 @@ static int mtk_jpeg_querycap(struct file *file, void *priv,
> > return 0;
> > }
> >
> > +static int vidioc_jpeg_enc_s_ctrl(struct v4l2_ctrl *ctrl)
> > +{
> > + struct mtk_jpeg_ctx *ctx = ctrl_to_ctx(ctrl);
> > +
> > + switch (ctrl->id) {
> > + case V4L2_CID_JPEG_RESTART_INTERVAL:
> > + ctx->restart_interval = ctrl->val;
> > + break;
> > + case V4L2_CID_JPEG_COMPRESSION_QUALITY:
> > + ctx->enc_quality = ctrl->val;
> > + break;
> > + case V4L2_CID_JPEG_ACTIVE_MARKER:
> > + ctx->enable_exif = ctrl->val & V4L2_JPEG_ACTIVE_MARKER_APP1 ?
> > + true : false;
> > + break;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +static const struct v4l2_ctrl_ops mtk_jpeg_enc_ctrl_ops = {
> > + .s_ctrl = vidioc_jpeg_enc_s_ctrl,
> > +};
> > +
> > +static int mtk_jpeg_enc_ctrls_setup(struct mtk_jpeg_ctx *ctx)
> > +{
> > + const struct v4l2_ctrl_ops *ops = &mtk_jpeg_enc_ctrl_ops;
> > + struct v4l2_ctrl_handler *handler = &ctx->ctrl_hdl;
> > +
> > + v4l2_ctrl_handler_init(handler, 3);
> > +
> > + v4l2_ctrl_new_std(handler, ops, V4L2_CID_JPEG_RESTART_INTERVAL, 0, 100,
> > + 1, 0);
> > + v4l2_ctrl_new_std(handler, ops, V4L2_CID_JPEG_COMPRESSION_QUALITY, 48,
> > + 100, 1, 90);
> > + v4l2_ctrl_new_std(handler, ops, V4L2_CID_JPEG_ACTIVE_MARKER, 0,
> > + V4L2_JPEG_ACTIVE_MARKER_APP1, 0, 0);
> > +
> > + if (handler->error) {
> > + v4l2_ctrl_handler_free(&ctx->ctrl_hdl);
> > + return handler->error;
> > + }
> > +
> > + v4l2_ctrl_handler_setup(&ctx->ctrl_hdl);
> > +
> > + return 0;
> > +}
> > +
> > static int mtk_jpeg_enum_fmt(struct mtk_jpeg_fmt *mtk_jpeg_formats, int n,
> > struct v4l2_fmtdesc *f, u32 type)
> > {
> > @@ -115,117 +232,105 @@ static int mtk_jpeg_enum_fmt(struct mtk_jpeg_fmt *mtk_jpeg_formats, int n,
> > return 0;
> > }
> >
> > -static int mtk_jpeg_enum_fmt_vid_cap(struct file *file, void *priv,
> > - struct v4l2_fmtdesc *f)
> > +static int mtk_jpeg_enc_enum_fmt_vid_cap(struct file *file, void *priv,
> > + struct v4l2_fmtdesc *f)
> > {
> > - return mtk_jpeg_enum_fmt(mtk_jpeg_formats, MTK_JPEG_NUM_FORMATS, f,
> > + return mtk_jpeg_enum_fmt(mtk_jpeg_enc_formats,
> > + MTK_JPEG_ENC_NUM_FORMATS, f,
> > + MTK_JPEG_FMT_FLAG_ENC_CAPTURE);
> > +}
> > +
> > +static int mtk_jpeg_dec_enum_fmt_vid_cap(struct file *file, void *priv,
> > + struct v4l2_fmtdesc *f)
> > +{
> > + return mtk_jpeg_enum_fmt(mtk_jpeg_dec_formats,
> > + MTK_JPEG_DEC_NUM_FORMATS, f,
> > MTK_JPEG_FMT_FLAG_DEC_CAPTURE);
> > }
> >
> > -static int mtk_jpeg_enum_fmt_vid_out(struct file *file, void *priv,
> > - struct v4l2_fmtdesc *f)
> > +static int mtk_jpeg_enc_enum_fmt_vid_out(struct file *file, void *priv,
> > + struct v4l2_fmtdesc *f)
> > +{
> > + return mtk_jpeg_enum_fmt(mtk_jpeg_enc_formats,
> > + MTK_JPEG_ENC_NUM_FORMATS, f,
> > + MTK_JPEG_FMT_FLAG_ENC_OUTPUT);
> > +}
> > +
> > +static int mtk_jpeg_dec_enum_fmt_vid_out(struct file *file, void *priv,
> > + struct v4l2_fmtdesc *f)
> > {
> > - return mtk_jpeg_enum_fmt(mtk_jpeg_formats, MTK_JPEG_NUM_FORMATS, f,
> > - MTK_JPEG_FMT_FLAG_DEC_OUTPUT);
> > + return mtk_jpeg_enum_fmt(mtk_jpeg_dec_formats, MTK_JPEG_DEC_NUM_FORMATS,
> > + f, MTK_JPEG_FMT_FLAG_DEC_OUTPUT);
> > }
>
> OK, so this patch is very hard to read because there are two independent changes
> taking place:
>
> 1) rename existing functions/defines/variables with a _dec prefix to prepare
> for the addition of the encoder feature.
>
> 2) add the encoder feature.
>
> Please split up this patch into two parts: one that does the rename and as much of
> the preparation to support both decoder and encoder without changing the
> functionality, and a second one that actually adds the new encoder feature.
>
> In fact, once that's done it is likely that most of this patch series can be
> merged, even if there are still things that need to be changed for the last
> patch adding the encoder support. I see nothing objectionable in patches 1-10
> and 13. So merging those together with a new rename patch wouldn't be an issue,
> I think.
>
> In any case, the diffs should be a lot cleaner and easier to review by splitting
> it up like that.
Dear Hans,
Thanks for your good advice. I have splited up this patch into two
patches in v9.
Best Regards,
Xia Jiang
>
> Regards,
>
> Hans
>
> >
> > -static struct mtk_jpeg_q_data *mtk_jpeg_get_q_data(struct mtk_jpeg_ctx *ctx,
> > - enum v4l2_buf_type type)
> > +static struct mtk_jpeg_q_data *
> > +mtk_jpeg_get_q_data(struct mtk_jpeg_ctx *ctx, enum v4l2_buf_type type)
> > {
> > if (V4L2_TYPE_IS_OUTPUT(type))
> > return &ctx->out_q;
> > return &ctx->cap_q;
> > }
> >
> > -static struct mtk_jpeg_fmt *mtk_jpeg_find_format(struct mtk_jpeg_ctx *ctx,
> > - u32 pixelformat,
> > +static struct mtk_jpeg_fmt *mtk_jpeg_find_format(u32 pixelformat,
> > unsigned int fmt_type)
> > {
> > - unsigned int k, fmt_flag;
> > -
> > - fmt_flag = (fmt_type == MTK_JPEG_FMT_TYPE_OUTPUT) ?
> > - MTK_JPEG_FMT_FLAG_DEC_OUTPUT :
> > - MTK_JPEG_FMT_FLAG_DEC_CAPTURE;
> > + unsigned int k;
> > + struct mtk_jpeg_fmt *fmt;
> >
> > - for (k = 0; k < MTK_JPEG_NUM_FORMATS; k++) {
> > - struct mtk_jpeg_fmt *fmt = &mtk_jpeg_formats[k];
> > + for (k = 0; k < MTK_JPEG_ENC_NUM_FORMATS; k++) {
> > + fmt = &mtk_jpeg_enc_formats[k];
> >
> > - if (fmt->fourcc == pixelformat && fmt->flags & fmt_flag)
> > + if (fmt->fourcc == pixelformat && fmt->flags & fmt_type)
> > return fmt;
> > }
> >
> > - return NULL;
> > -}
> > + for (k = 0; k < MTK_JPEG_DEC_NUM_FORMATS; k++) {
> > + fmt = &mtk_jpeg_dec_formats[k];
> >
> > -static void mtk_jpeg_adjust_fmt_mplane(struct mtk_jpeg_ctx *ctx,
> > - struct v4l2_format *f)
> > -{
> > - struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp;
> > - struct mtk_jpeg_q_data *q_data;
> > - int i;
> > -
> > - q_data = mtk_jpeg_get_q_data(ctx, f->type);
> > -
> > - pix_mp->width = q_data->w;
> > - pix_mp->height = q_data->h;
> > - pix_mp->pixelformat = q_data->fmt->fourcc;
> > - pix_mp->num_planes = q_data->fmt->colplanes;
> > -
> > - for (i = 0; i < pix_mp->num_planes; i++) {
> > - pix_mp->plane_fmt[i].bytesperline = q_data->bytesperline[i];
> > - pix_mp->plane_fmt[i].sizeimage = q_data->sizeimage[i];
> > + if (fmt->fourcc == pixelformat && fmt->flags & fmt_type)
> > + return fmt;
> > }
> > +
> > + return NULL;
> > }
> >
> > -static int mtk_jpeg_try_fmt_mplane(struct v4l2_format *f,
> > - struct mtk_jpeg_fmt *fmt,
> > - struct mtk_jpeg_ctx *ctx, int q_type)
> > +static int vidioc_try_fmt(struct v4l2_format *f, struct mtk_jpeg_fmt *fmt)
> > {
> > struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp;
> > int i;
> >
> > - memset(pix_mp->reserved, 0, sizeof(pix_mp->reserved));
> > pix_mp->field = V4L2_FIELD_NONE;
> > -
> > - if (ctx->state != MTK_JPEG_INIT) {
> > - mtk_jpeg_adjust_fmt_mplane(ctx, f);
> > - return 0;
> > - }
> > -
> > pix_mp->num_planes = fmt->colplanes;
> > pix_mp->pixelformat = fmt->fourcc;
> >
> > - if (q_type == MTK_JPEG_FMT_TYPE_OUTPUT) {
> > - struct v4l2_plane_pix_format *pfmt = &pix_mp->plane_fmt[0];
> > -
> > + if (fmt->fourcc == V4L2_PIX_FMT_JPEG) {
> > pix_mp->height = clamp(pix_mp->height, MTK_JPEG_MIN_HEIGHT,
> > MTK_JPEG_MAX_HEIGHT);
> > pix_mp->width = clamp(pix_mp->width, MTK_JPEG_MIN_WIDTH,
> > MTK_JPEG_MAX_WIDTH);
> > -
> > - memset(pfmt->reserved, 0, sizeof(pfmt->reserved));
> > - pfmt->bytesperline = 0;
> > - /* Source size must be aligned to 128 */
> > - pfmt->sizeimage = round_up(pfmt->sizeimage, 128);
> > - if (pfmt->sizeimage == 0)
> > - pfmt->sizeimage = MTK_JPEG_DEFAULT_SIZEIMAGE;
> > - return 0;
> > + pix_mp->plane_fmt[0].bytesperline = 0;
> > + pix_mp->plane_fmt[0].sizeimage =
> > + round_up(pix_mp->plane_fmt[0].sizeimage, 128);
> > + if (pix_mp->plane_fmt[0].sizeimage == 0)
> > + pix_mp->plane_fmt[0].sizeimage =
> > + MTK_JPEG_DEFAULT_SIZEIMAGE;
> > + } else {
> > + pix_mp->height = clamp(round_up(pix_mp->height, fmt->v_align),
> > + MTK_JPEG_MIN_HEIGHT,
> > + MTK_JPEG_MAX_HEIGHT);
> > + pix_mp->width = clamp(round_up(pix_mp->width, fmt->h_align),
> > + MTK_JPEG_MIN_WIDTH, MTK_JPEG_MAX_WIDTH);
> > + for (i = 0; i < pix_mp->num_planes; i++) {
> > + struct v4l2_plane_pix_format *pfmt =
> > + &pix_mp->plane_fmt[i];
> > + u32 stride = pix_mp->width * fmt->h_sample[i] / 4;
> > + u32 h = pix_mp->height * fmt->v_sample[i] / 4;
> > +
> > + pfmt->bytesperline = stride;
> > + pfmt->sizeimage = stride * h;
> > + }
> > }
> >
> > - /* type is MTK_JPEG_FMT_TYPE_CAPTURE */
> > - pix_mp->height = clamp(round_up(pix_mp->height, fmt->v_align),
> > - MTK_JPEG_MIN_HEIGHT, MTK_JPEG_MAX_HEIGHT);
> > - pix_mp->width = clamp(round_up(pix_mp->width, fmt->h_align),
> > - MTK_JPEG_MIN_WIDTH, MTK_JPEG_MAX_WIDTH);
> > -
> > - for (i = 0; i < fmt->colplanes; i++) {
> > - struct v4l2_plane_pix_format *pfmt = &pix_mp->plane_fmt[i];
> > - u32 stride = pix_mp->width * fmt->h_sample[i] / 4;
> > - u32 h = pix_mp->height * fmt->v_sample[i] / 4;
> > -
> > - pfmt->bytesperline = stride;
> > - pfmt->sizeimage = stride * h;
> > - }
> > return 0;
> > }
> >
> > @@ -280,14 +385,35 @@ static int mtk_jpeg_g_fmt_vid_mplane(struct file *file, void *priv,
> > return 0;
> > }
> >
> > -static int mtk_jpeg_try_fmt_vid_cap_mplane(struct file *file, void *priv,
> > - struct v4l2_format *f)
> > +static int mtk_jpeg_enc_try_fmt_vid_cap_mplane(struct file *file, void *priv,
> > + struct v4l2_format *f)
> > +{
> > + struct mtk_jpeg_ctx *ctx = mtk_jpeg_fh_to_ctx(priv);
> > + struct mtk_jpeg_fmt *fmt;
> > +
> > + fmt = mtk_jpeg_find_format(f->fmt.pix_mp.pixelformat,
> > + MTK_JPEG_FMT_FLAG_ENC_CAPTURE);
> > + if (!fmt)
> > + fmt = ctx->cap_q.fmt;
> > +
> > + v4l2_dbg(2, debug, &ctx->jpeg->v4l2_dev, "(%d) try_fmt:%c%c%c%c\n",
> > + f->type,
> > + (fmt->fourcc & 0xff),
> > + (fmt->fourcc >> 8 & 0xff),
> > + (fmt->fourcc >> 16 & 0xff),
> > + (fmt->fourcc >> 24 & 0xff));
> > +
> > + return vidioc_try_fmt(f, fmt);
> > +}
> > +
> > +static int mtk_jpeg_dec_try_fmt_vid_cap_mplane(struct file *file, void *priv,
> > + struct v4l2_format *f)
> > {
> > struct mtk_jpeg_ctx *ctx = mtk_jpeg_fh_to_ctx(priv);
> > struct mtk_jpeg_fmt *fmt;
> >
> > - fmt = mtk_jpeg_find_format(ctx, f->fmt.pix_mp.pixelformat,
> > - MTK_JPEG_FMT_TYPE_CAPTURE);
> > + fmt = mtk_jpeg_find_format(f->fmt.pix_mp.pixelformat,
> > + MTK_JPEG_FMT_FLAG_DEC_CAPTURE);
> > if (!fmt)
> > fmt = ctx->cap_q.fmt;
> >
> > @@ -298,17 +424,43 @@ static int mtk_jpeg_try_fmt_vid_cap_mplane(struct file *file, void *priv,
> > (fmt->fourcc >> 16 & 0xff),
> > (fmt->fourcc >> 24 & 0xff));
> >
> > - return mtk_jpeg_try_fmt_mplane(f, fmt, ctx, MTK_JPEG_FMT_TYPE_CAPTURE);
> > + if (ctx->state != MTK_JPEG_INIT) {
> > + mtk_jpeg_g_fmt_vid_mplane(file, priv, f);
> > + return 0;
> > + }
> > +
> > + return vidioc_try_fmt(f, fmt);
> > +}
> > +
> > +static int mtk_jpeg_enc_try_fmt_vid_out_mplane(struct file *file, void *priv,
> > + struct v4l2_format *f)
> > +{
> > + struct mtk_jpeg_ctx *ctx = mtk_jpeg_fh_to_ctx(priv);
> > + struct mtk_jpeg_fmt *fmt;
> > +
> > + fmt = mtk_jpeg_find_format(f->fmt.pix_mp.pixelformat,
> > + MTK_JPEG_FMT_FLAG_ENC_OUTPUT);
> > + if (!fmt)
> > + fmt = ctx->out_q.fmt;
> > +
> > + v4l2_dbg(2, debug, &ctx->jpeg->v4l2_dev, "(%d) try_fmt:%c%c%c%c\n",
> > + f->type,
> > + (fmt->fourcc & 0xff),
> > + (fmt->fourcc >> 8 & 0xff),
> > + (fmt->fourcc >> 16 & 0xff),
> > + (fmt->fourcc >> 24 & 0xff));
> > +
> > + return vidioc_try_fmt(f, fmt);
> > }
> >
> > -static int mtk_jpeg_try_fmt_vid_out_mplane(struct file *file, void *priv,
> > - struct v4l2_format *f)
> > +static int mtk_jpeg_dec_try_fmt_vid_out_mplane(struct file *file, void *priv,
> > + struct v4l2_format *f)
> > {
> > struct mtk_jpeg_ctx *ctx = mtk_jpeg_fh_to_ctx(priv);
> > struct mtk_jpeg_fmt *fmt;
> >
> > - fmt = mtk_jpeg_find_format(ctx, f->fmt.pix_mp.pixelformat,
> > - MTK_JPEG_FMT_TYPE_OUTPUT);
> > + fmt = mtk_jpeg_find_format(f->fmt.pix_mp.pixelformat,
> > + MTK_JPEG_FMT_FLAG_DEC_OUTPUT);
> > if (!fmt)
> > fmt = ctx->out_q.fmt;
> >
> > @@ -319,17 +471,21 @@ static int mtk_jpeg_try_fmt_vid_out_mplane(struct file *file, void *priv,
> > (fmt->fourcc >> 16 & 0xff),
> > (fmt->fourcc >> 24 & 0xff));
> >
> > - return mtk_jpeg_try_fmt_mplane(f, fmt, ctx, MTK_JPEG_FMT_TYPE_OUTPUT);
> > + if (ctx->state != MTK_JPEG_INIT) {
> > + mtk_jpeg_g_fmt_vid_mplane(file, priv, f);
> > + return 0;
> > + }
> > +
> > + return vidioc_try_fmt(f, fmt);
> > }
> >
> > static int mtk_jpeg_s_fmt_mplane(struct mtk_jpeg_ctx *ctx,
> > - struct v4l2_format *f)
> > + struct v4l2_format *f, unsigned int fmt_type)
> > {
> > struct vb2_queue *vq;
> > struct mtk_jpeg_q_data *q_data = NULL;
> > struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp;
> > struct mtk_jpeg_dev *jpeg = ctx->jpeg;
> > - unsigned int f_type;
> > int i;
> >
> > vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type);
> > @@ -343,10 +499,7 @@ static int mtk_jpeg_s_fmt_mplane(struct mtk_jpeg_ctx *ctx,
> > return -EBUSY;
> > }
> >
> > - f_type = V4L2_TYPE_IS_OUTPUT(f->type) ?
> > - MTK_JPEG_FMT_TYPE_OUTPUT : MTK_JPEG_FMT_TYPE_CAPTURE;
> > -
> > - q_data->fmt = mtk_jpeg_find_format(ctx, pix_mp->pixelformat, f_type);
> > + q_data->fmt = mtk_jpeg_find_format(pix_mp->pixelformat, fmt_type);
> > q_data->w = pix_mp->width;
> > q_data->h = pix_mp->height;
> > ctx->colorspace = pix_mp->colorspace;
> > @@ -374,28 +527,56 @@ static int mtk_jpeg_s_fmt_mplane(struct mtk_jpeg_ctx *ctx,
> > return 0;
> > }
> >
> > -static int mtk_jpeg_s_fmt_vid_out_mplane(struct file *file, void *priv,
> > - struct v4l2_format *f)
> > +static int mtk_jpeg_enc_s_fmt_vid_out_mplane(struct file *file, void *priv,
> > + struct v4l2_format *f)
> > +{
> > + int ret;
> > +
> > + ret = mtk_jpeg_enc_try_fmt_vid_out_mplane(file, priv, f);
> > + if (ret)
> > + return ret;
> > +
> > + return mtk_jpeg_s_fmt_mplane(mtk_jpeg_fh_to_ctx(priv), f,
> > + MTK_JPEG_FMT_FLAG_ENC_OUTPUT);
> > +}
> > +
> > +static int mtk_jpeg_dec_s_fmt_vid_out_mplane(struct file *file, void *priv,
> > + struct v4l2_format *f)
> > {
> > int ret;
> >
> > - ret = mtk_jpeg_try_fmt_vid_out_mplane(file, priv, f);
> > + ret = mtk_jpeg_dec_try_fmt_vid_out_mplane(file, priv, f);
> > if (ret)
> > return ret;
> >
> > - return mtk_jpeg_s_fmt_mplane(mtk_jpeg_fh_to_ctx(priv), f);
> > + return mtk_jpeg_s_fmt_mplane(mtk_jpeg_fh_to_ctx(priv), f,
> > + MTK_JPEG_FMT_FLAG_DEC_OUTPUT);
> > }
> >
> > -static int mtk_jpeg_s_fmt_vid_cap_mplane(struct file *file, void *priv,
> > - struct v4l2_format *f)
> > +static int mtk_jpeg_enc_s_fmt_vid_cap_mplane(struct file *file, void *priv,
> > + struct v4l2_format *f)
> > {
> > int ret;
> >
> > - ret = mtk_jpeg_try_fmt_vid_cap_mplane(file, priv, f);
> > + ret = mtk_jpeg_enc_try_fmt_vid_cap_mplane(file, priv, f);
> > if (ret)
> > return ret;
> >
> > - return mtk_jpeg_s_fmt_mplane(mtk_jpeg_fh_to_ctx(priv), f);
> > + return mtk_jpeg_s_fmt_mplane(mtk_jpeg_fh_to_ctx(priv), f,
> > + MTK_JPEG_FMT_FLAG_ENC_CAPTURE);
> > +}
> > +
> > +static int mtk_jpeg_dec_s_fmt_vid_cap_mplane(struct file *file, void *priv,
> > + struct v4l2_format *f)
> > +{
> > + int ret;
> > +
> > + ret = mtk_jpeg_dec_try_fmt_vid_cap_mplane(file, priv, f);
> > + if (ret)
> > + return ret;
> > +
> > + return mtk_jpeg_s_fmt_mplane(mtk_jpeg_fh_to_ctx(priv), f,
> > + MTK_JPEG_FMT_FLAG_DEC_CAPTURE);
> > }
> >
> > static void mtk_jpeg_queue_src_chg_event(struct mtk_jpeg_ctx *ctx)
> > @@ -420,8 +601,31 @@ static int mtk_jpeg_subscribe_event(struct v4l2_fh *fh,
> > return v4l2_ctrl_subscribe_event(fh, sub);
> > }
> >
> > -static int mtk_jpeg_g_selection(struct file *file, void *priv,
> > - struct v4l2_selection *s)
> > +static int mtk_jpeg_enc_g_selection(struct file *file, void *priv,
> > + struct v4l2_selection *s)
> > +{
> > + struct mtk_jpeg_ctx *ctx = mtk_jpeg_fh_to_ctx(priv);
> > +
> > + if (s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
> > + return -EINVAL;
> > +
> > + switch (s->target) {
> > + case V4L2_SEL_TGT_CROP:
> > + case V4L2_SEL_TGT_CROP_BOUNDS:
> > + case V4L2_SEL_TGT_CROP_DEFAULT:
> > + s->r.width = ctx->out_q.w;
> > + s->r.height = ctx->out_q.h;
> > + s->r.left = 0;
> > + s->r.top = 0;
> > + break;
> > + default:
> > + return -EINVAL;
> > + }
> > + return 0;
> > +}
> > +
> > +static int mtk_jpeg_dec_g_selection(struct file *file, void *priv,
> > + struct v4l2_selection *s)
> > {
> > struct mtk_jpeg_ctx *ctx = mtk_jpeg_fh_to_ctx(priv);
> >
> > @@ -446,11 +650,34 @@ static int mtk_jpeg_g_selection(struct file *file, void *priv,
> > default:
> > return -EINVAL;
> > }
> > +
> > return 0;
> > }
> >
> > -static int mtk_jpeg_s_selection(struct file *file, void *priv,
> > - struct v4l2_selection *s)
> > +static int mtk_jpeg_enc_s_selection(struct file *file, void *priv,
> > + struct v4l2_selection *s)
> > +{
> > + struct mtk_jpeg_ctx *ctx = mtk_jpeg_fh_to_ctx(priv);
> > +
> > + if (s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
> > + return -EINVAL;
> > +
> > + switch (s->target) {
> > + case V4L2_SEL_TGT_CROP:
> > + s->r.left = 0;
> > + s->r.top = 0;
> > + ctx->out_q.w = min(s->r.width, ctx->out_q.w);
> > + ctx->out_q.h = min(s->r.height, ctx->out_q.h);
> > + break;
> > + default:
> > + return -EINVAL;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +static int mtk_jpeg_dec_s_selection(struct file *file, void *priv,
> > + struct v4l2_selection *s)
> > {
> > struct mtk_jpeg_ctx *ctx = mtk_jpeg_fh_to_ctx(priv);
> >
> > @@ -467,6 +694,7 @@ static int mtk_jpeg_s_selection(struct file *file, void *priv,
> > default:
> > return -EINVAL;
> > }
> > +
> > return 0;
> > }
> >
> > @@ -495,20 +723,47 @@ static int mtk_jpeg_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
> > return v4l2_m2m_qbuf(file, fh->m2m_ctx, buf);
> > }
> >
> > -static const struct v4l2_ioctl_ops mtk_jpeg_ioctl_ops = {
> > - .vidioc_querycap = mtk_jpeg_querycap,
> > - .vidioc_enum_fmt_vid_cap = mtk_jpeg_enum_fmt_vid_cap,
> > - .vidioc_enum_fmt_vid_out = mtk_jpeg_enum_fmt_vid_out,
> > - .vidioc_try_fmt_vid_cap_mplane = mtk_jpeg_try_fmt_vid_cap_mplane,
> > - .vidioc_try_fmt_vid_out_mplane = mtk_jpeg_try_fmt_vid_out_mplane,
> > +static const struct v4l2_ioctl_ops mtk_jpeg_enc_ioctl_ops = {
> > + .vidioc_querycap = mtk_jpeg_enc_querycap,
> > + .vidioc_enum_fmt_vid_cap = mtk_jpeg_enc_enum_fmt_vid_cap,
> > + .vidioc_enum_fmt_vid_out = mtk_jpeg_enc_enum_fmt_vid_out,
> > + .vidioc_try_fmt_vid_cap_mplane = mtk_jpeg_enc_try_fmt_vid_cap_mplane,
> > + .vidioc_try_fmt_vid_out_mplane = mtk_jpeg_enc_try_fmt_vid_out_mplane,
> > + .vidioc_g_fmt_vid_cap_mplane = mtk_jpeg_g_fmt_vid_mplane,
> > + .vidioc_g_fmt_vid_out_mplane = mtk_jpeg_g_fmt_vid_mplane,
> > + .vidioc_s_fmt_vid_cap_mplane = mtk_jpeg_enc_s_fmt_vid_cap_mplane,
> > + .vidioc_s_fmt_vid_out_mplane = mtk_jpeg_enc_s_fmt_vid_out_mplane,
> > + .vidioc_qbuf = mtk_jpeg_qbuf,
> > + .vidioc_subscribe_event = mtk_jpeg_subscribe_event,
> > + .vidioc_g_selection = mtk_jpeg_enc_g_selection,
> > + .vidioc_s_selection = mtk_jpeg_enc_s_selection,
> > +
> > + .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs,
> > + .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf,
> > + .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs,
> > + .vidioc_querybuf = v4l2_m2m_ioctl_querybuf,
> > + .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf,
> > + .vidioc_expbuf = v4l2_m2m_ioctl_expbuf,
> > + .vidioc_streamon = v4l2_m2m_ioctl_streamon,
> > + .vidioc_streamoff = v4l2_m2m_ioctl_streamoff,
> > +
> > + .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
> > +};
> > +
> > +static const struct v4l2_ioctl_ops mtk_jpeg_dec_ioctl_ops = {
> > + .vidioc_querycap = mtk_jpeg_dec_querycap,
> > + .vidioc_enum_fmt_vid_cap = mtk_jpeg_dec_enum_fmt_vid_cap,
> > + .vidioc_enum_fmt_vid_out = mtk_jpeg_dec_enum_fmt_vid_out,
> > + .vidioc_try_fmt_vid_cap_mplane = mtk_jpeg_dec_try_fmt_vid_cap_mplane,
> > + .vidioc_try_fmt_vid_out_mplane = mtk_jpeg_dec_try_fmt_vid_out_mplane,
> > .vidioc_g_fmt_vid_cap_mplane = mtk_jpeg_g_fmt_vid_mplane,
> > .vidioc_g_fmt_vid_out_mplane = mtk_jpeg_g_fmt_vid_mplane,
> > - .vidioc_s_fmt_vid_cap_mplane = mtk_jpeg_s_fmt_vid_cap_mplane,
> > - .vidioc_s_fmt_vid_out_mplane = mtk_jpeg_s_fmt_vid_out_mplane,
> > + .vidioc_s_fmt_vid_cap_mplane = mtk_jpeg_dec_s_fmt_vid_cap_mplane,
> > + .vidioc_s_fmt_vid_out_mplane = mtk_jpeg_dec_s_fmt_vid_out_mplane,
> > .vidioc_qbuf = mtk_jpeg_qbuf,
> > .vidioc_subscribe_event = mtk_jpeg_subscribe_event,
> > - .vidioc_g_selection = mtk_jpeg_g_selection,
> > - .vidioc_s_selection = mtk_jpeg_s_selection,
> > + .vidioc_g_selection = mtk_jpeg_dec_g_selection,
> > + .vidioc_s_selection = mtk_jpeg_dec_s_selection,
> >
> > .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs,
> > .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf,
> > @@ -586,8 +841,9 @@ static bool mtk_jpeg_check_resolution_change(struct mtk_jpeg_ctx *ctx,
> > }
> >
> > q_data = &ctx->cap_q;
> > - if (q_data->fmt != mtk_jpeg_find_format(ctx, param->dst_fourcc,
> > - MTK_JPEG_FMT_TYPE_CAPTURE)) {
> > + if (q_data->fmt !=
> > + mtk_jpeg_find_format(param->dst_fourcc,
> > + MTK_JPEG_FMT_FLAG_DEC_CAPTURE)) {
> > v4l2_dbg(1, debug, &jpeg->v4l2_dev, "format change\n");
> > return true;
> > }
> > @@ -608,9 +864,8 @@ static void mtk_jpeg_set_queue_data(struct mtk_jpeg_ctx *ctx,
> > q_data = &ctx->cap_q;
> > q_data->w = param->dec_w;
> > q_data->h = param->dec_h;
> > - q_data->fmt = mtk_jpeg_find_format(ctx,
> > - param->dst_fourcc,
> > - MTK_JPEG_FMT_TYPE_CAPTURE);
> > + q_data->fmt = mtk_jpeg_find_format(param->dst_fourcc,
> > + MTK_JPEG_FMT_FLAG_DEC_CAPTURE);
> >
> > for (i = 0; i < q_data->fmt->colplanes; i++) {
> > q_data->bytesperline[i] = param->mem_stride[i];
> > @@ -627,7 +882,18 @@ static void mtk_jpeg_set_queue_data(struct mtk_jpeg_ctx *ctx,
> > param->dec_w, param->dec_h);
> > }
> >
> > -static void mtk_jpeg_buf_queue(struct vb2_buffer *vb)
> > +static void mtk_jpeg_enc_buf_queue(struct vb2_buffer *vb)
> > +{
> > + struct mtk_jpeg_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
> > + struct mtk_jpeg_dev *jpeg = ctx->jpeg;
> > +
> > + v4l2_dbg(2, debug, &jpeg->v4l2_dev, "(%d) buf_q id=%d, vb=%p\n",
> > + vb->vb2_queue->type, vb->index, vb);
> > +
> > + v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, to_vb2_v4l2_buffer(vb));
> > +}
> > +
> > +static void mtk_jpeg_dec_buf_queue(struct vb2_buffer *vb)
> > {
> > struct mtk_jpeg_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
> > struct mtk_jpeg_dec_param *param;
> > @@ -679,7 +945,16 @@ static struct vb2_v4l2_buffer *mtk_jpeg_buf_remove(struct mtk_jpeg_ctx *ctx,
> > return v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
> > }
> >
> > -static void mtk_jpeg_stop_streaming(struct vb2_queue *q)
> > +static void mtk_jpeg_enc_stop_streaming(struct vb2_queue *q)
> > +{
> > + struct mtk_jpeg_ctx *ctx = vb2_get_drv_priv(q);
> > + struct vb2_v4l2_buffer *vb;
> > +
> > + while ((vb = mtk_jpeg_buf_remove(ctx, q->type)))
> > + v4l2_m2m_buf_done(vb, VB2_BUF_STATE_ERROR);
> > +}
> > +
> > +static void mtk_jpeg_dec_stop_streaming(struct vb2_queue *q)
> > {
> > struct mtk_jpeg_ctx *ctx = vb2_get_drv_priv(q);
> > struct vb2_v4l2_buffer *vb;
> > @@ -705,13 +980,22 @@ static void mtk_jpeg_stop_streaming(struct vb2_queue *q)
> > v4l2_m2m_buf_done(vb, VB2_BUF_STATE_ERROR);
> > }
> >
> > -static const struct vb2_ops mtk_jpeg_qops = {
> > +static const struct vb2_ops mtk_jpeg_dec_qops = {
> > .queue_setup = mtk_jpeg_queue_setup,
> > .buf_prepare = mtk_jpeg_buf_prepare,
> > - .buf_queue = mtk_jpeg_buf_queue,
> > + .buf_queue = mtk_jpeg_dec_buf_queue,
> > .wait_prepare = vb2_ops_wait_prepare,
> > .wait_finish = vb2_ops_wait_finish,
> > - .stop_streaming = mtk_jpeg_stop_streaming,
> > + .stop_streaming = mtk_jpeg_dec_stop_streaming,
> > +};
> > +
> > +static const struct vb2_ops mtk_jpeg_enc_qops = {
> > + .queue_setup = mtk_jpeg_queue_setup,
> > + .buf_prepare = mtk_jpeg_buf_prepare,
> > + .buf_queue = mtk_jpeg_enc_buf_queue,
> > + .wait_prepare = vb2_ops_wait_prepare,
> > + .wait_finish = vb2_ops_wait_finish,
> > + .stop_streaming = mtk_jpeg_enc_stop_streaming,
> > };
> >
> > static void mtk_jpeg_set_dec_src(struct mtk_jpeg_ctx *ctx,
> > @@ -751,7 +1035,86 @@ static int mtk_jpeg_set_dec_dst(struct mtk_jpeg_ctx *ctx,
> > return 0;
> > }
> >
> > -static void mtk_jpeg_device_run(void *priv)
> > +static void mtk_jpeg_set_enc_dst(struct mtk_jpeg_ctx *ctx, void __iomem *base,
> > + struct vb2_buffer *dst_buf,
> > + struct mtk_jpeg_enc_bs *bs)
> > +{
> > + bs->dma_addr = vb2_dma_contig_plane_dma_addr(dst_buf, 0);
> > + bs->dma_addr_offset = ctx->enable_exif ? MTK_JPEG_DEFAULT_EXIF_SIZE : 0;
> > + bs->dma_addr_offsetmask = bs->dma_addr & JPEG_ENC_DST_ADDR_OFFSET_MASK;
> > + bs->size = vb2_plane_size(dst_buf, 0);
> > +
> > + mtk_jpeg_enc_set_dst_addr(base, bs->dma_addr, bs->size,
> > + bs->dma_addr_offset,
> > + bs->dma_addr_offsetmask);
> > +}
> > +
> > +static void mtk_jpeg_set_enc_src(struct mtk_jpeg_ctx *ctx, void __iomem *base,
> > + struct vb2_buffer *src_buf)
> > +{
> > + int i;
> > + dma_addr_t dma_addr;
> > +
> > + mtk_jpeg_enc_set_img_size(base, ctx->out_q.w, ctx->out_q.h);
> > + mtk_jpeg_enc_set_blk_num(base, ctx->out_q.fmt->fourcc, ctx->out_q.w,
> > + ctx->out_q.h);
> > + mtk_jpeg_enc_set_stride(base, ctx->out_q.fmt->fourcc, ctx->out_q.w,
> > + ctx->out_q.h, ctx->out_q.bytesperline[0]);
> > +
> > + for (i = 0; i < src_buf->num_planes; i++) {
> > + dma_addr = vb2_dma_contig_plane_dma_addr(src_buf, i) +
> > + src_buf->planes[i].data_offset;
> > + mtk_jpeg_enc_set_src_addr(base, dma_addr, i);
> > + }
> > +}
> > +
> > +static void mtk_jpeg_enc_device_run(void *priv)
> > +{
> > + struct mtk_jpeg_ctx *ctx = priv;
> > + struct mtk_jpeg_dev *jpeg = ctx->jpeg;
> > + struct vb2_v4l2_buffer *src_buf, *dst_buf;
> > + enum vb2_buffer_state buf_state = VB2_BUF_STATE_ERROR;
> > + unsigned long flags;
> > + struct mtk_jpeg_src_buf *jpeg_src_buf;
> > + struct mtk_jpeg_enc_bs enc_bs;
> > + int i, ret;
> > +
> > + src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
> > + dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
> > + jpeg_src_buf = mtk_jpeg_vb2_to_srcbuf(&src_buf->vb2_buf);
> > +
> > + if (jpeg_src_buf->flags & MTK_JPEG_BUF_FLAGS_LAST_FRAME) {
> > + for (i = 0; i < dst_buf->vb2_buf.num_planes; i++)
> > + vb2_set_plane_payload(&dst_buf->vb2_buf, i, 0);
> > + buf_state = VB2_BUF_STATE_DONE;
> > + goto enc_end;
> > + }
> > +
> > + ret = pm_runtime_get_sync(jpeg->dev);
> > + if (ret < 0)
> > + goto enc_end;
> > +
> > + spin_lock_irqsave(&jpeg->hw_lock, flags);
> > + mtk_jpeg_enc_reset(jpeg->reg_base);
> > +
> > + mtk_jpeg_set_enc_dst(ctx, jpeg->reg_base, &dst_buf->vb2_buf, &enc_bs);
> > + mtk_jpeg_set_enc_src(ctx, jpeg->reg_base, &src_buf->vb2_buf);
> > + mtk_jpeg_enc_set_config(jpeg->reg_base, ctx->out_q.fmt->hw_format,
> > + ctx->enable_exif, ctx->enc_quality,
> > + ctx->restart_interval);
> > + mtk_jpeg_enc_start(jpeg->reg_base);
> > + spin_unlock_irqrestore(&jpeg->hw_lock, flags);
> > + return;
> > +
> > +enc_end:
> > + v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
> > + v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
> > + v4l2_m2m_buf_done(src_buf, buf_state);
> > + v4l2_m2m_buf_done(dst_buf, buf_state);
> > + v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx);
> > +}
> > +
> > +static void mtk_jpeg_dec_device_run(void *priv)
> > {
> > struct mtk_jpeg_ctx *ctx = priv;
> > struct mtk_jpeg_dev *jpeg = ctx->jpeg;
> > @@ -786,15 +1149,16 @@ static void mtk_jpeg_device_run(void *priv)
> > goto dec_end;
> >
> > mtk_jpeg_set_dec_src(ctx, &src_buf->vb2_buf, &bs);
> > - if (mtk_jpeg_set_dec_dst(ctx, &jpeg_src_buf->dec_param, &dst_buf->vb2_buf, &fb))
> > + if (mtk_jpeg_set_dec_dst(ctx, &jpeg_src_buf->dec_param,
> > + &dst_buf->vb2_buf, &fb))
> > goto dec_end;
> >
> > spin_lock_irqsave(&jpeg->hw_lock, flags);
> > - mtk_jpeg_dec_reset(jpeg->dec_reg_base);
> > - mtk_jpeg_dec_set_config(jpeg->dec_reg_base,
> > + mtk_jpeg_dec_reset(jpeg->reg_base);
> > + mtk_jpeg_dec_set_config(jpeg->reg_base,
> > &jpeg_src_buf->dec_param, &bs, &fb);
> >
> > - mtk_jpeg_dec_start(jpeg->dec_reg_base);
> > + mtk_jpeg_dec_start(jpeg->reg_base);
> > spin_unlock_irqrestore(&jpeg->hw_lock, flags);
> > return;
> >
> > @@ -806,20 +1170,30 @@ static void mtk_jpeg_device_run(void *priv)
> > v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx);
> > }
> >
> > -static int mtk_jpeg_job_ready(void *priv)
> > +static int mtk_jpeg_enc_job_ready(void *priv)
> > +{
> > + return 1;
> > +}
> > +
> > +static int mtk_jpeg_dec_job_ready(void *priv)
> > {
> > struct mtk_jpeg_ctx *ctx = priv;
> >
> > return (ctx->state == MTK_JPEG_RUNNING) ? 1 : 0;
> > }
> >
> > -static const struct v4l2_m2m_ops mtk_jpeg_m2m_ops = {
> > - .device_run = mtk_jpeg_device_run,
> > - .job_ready = mtk_jpeg_job_ready,
> > +static const struct v4l2_m2m_ops mtk_jpeg_enc_m2m_ops = {
> > + .device_run = mtk_jpeg_enc_device_run,
> > + .job_ready = mtk_jpeg_enc_job_ready,
> > };
> >
> > -static int mtk_jpeg_queue_init(void *priv, struct vb2_queue *src_vq,
> > - struct vb2_queue *dst_vq)
> > +static const struct v4l2_m2m_ops mtk_jpeg_dec_m2m_ops = {
> > + .device_run = mtk_jpeg_dec_device_run,
> > + .job_ready = mtk_jpeg_dec_job_ready,
> > +};
> > +
> > +static int mtk_jpeg_dec_queue_init(void *priv, struct vb2_queue *src_vq,
> > + struct vb2_queue *dst_vq)
> > {
> > struct mtk_jpeg_ctx *ctx = priv;
> > int ret;
> > @@ -828,7 +1202,7 @@ static int mtk_jpeg_queue_init(void *priv, struct vb2_queue *src_vq,
> > src_vq->io_modes = VB2_DMABUF | VB2_MMAP;
> > src_vq->drv_priv = ctx;
> > src_vq->buf_struct_size = sizeof(struct mtk_jpeg_src_buf);
> > - src_vq->ops = &mtk_jpeg_qops;
> > + src_vq->ops = &mtk_jpeg_dec_qops;
> > src_vq->mem_ops = &vb2_dma_contig_memops;
> > src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
> > src_vq->lock = &ctx->jpeg->lock;
> > @@ -841,7 +1215,7 @@ static int mtk_jpeg_queue_init(void *priv, struct vb2_queue *src_vq,
> > dst_vq->io_modes = VB2_DMABUF | VB2_MMAP;
> > dst_vq->drv_priv = ctx;
> > dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
> > - dst_vq->ops = &mtk_jpeg_qops;
> > + dst_vq->ops = &mtk_jpeg_dec_qops;
> > dst_vq->mem_ops = &vb2_dma_contig_memops;
> > dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
> > dst_vq->lock = &ctx->jpeg->lock;
> > @@ -851,24 +1225,112 @@ static int mtk_jpeg_queue_init(void *priv, struct vb2_queue *src_vq,
> > return ret;
> > }
> >
> > -static void mtk_jpeg_clk_on(struct mtk_jpeg_dev *jpeg)
> > +static int mtk_jpeg_enc_queue_init(void *priv, struct vb2_queue *src_vq,
> > + struct vb2_queue *dst_vq)
> > {
> > + struct mtk_jpeg_ctx *ctx = priv;
> > int ret;
> >
> > + src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
> > + src_vq->io_modes = VB2_DMABUF | VB2_MMAP;
> > + src_vq->drv_priv = ctx;
> > + src_vq->buf_struct_size = sizeof(struct mtk_jpeg_src_buf);
> > + src_vq->ops = &mtk_jpeg_enc_qops;
> > + src_vq->mem_ops = &vb2_dma_contig_memops;
> > + src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
> > + src_vq->lock = &ctx->jpeg->lock;
> > + src_vq->dev = ctx->jpeg->dev;
> > + ret = vb2_queue_init(src_vq);
> > + if (ret)
> > + return ret;
> > +
> > + dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
> > + dst_vq->io_modes = VB2_DMABUF | VB2_MMAP;
> > + dst_vq->drv_priv = ctx;
> > + dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
> > + dst_vq->ops = &mtk_jpeg_enc_qops;
> > + dst_vq->mem_ops = &vb2_dma_contig_memops;
> > + dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
> > + dst_vq->lock = &ctx->jpeg->lock;
> > + dst_vq->dev = ctx->jpeg->dev;
> > + ret = vb2_queue_init(dst_vq);
> > +
> > + return ret;
> > +}
> > +
> > +static void mtk_jpeg_clk_on(struct mtk_jpeg_dev *jpeg)
> > +{
> > + int ret, i;
> > +
> > ret = mtk_smi_larb_get(jpeg->larb);
> > if (ret)
> > dev_err(jpeg->dev, "mtk_smi_larb_get larbvdec fail %d\n", ret);
> > - clk_prepare_enable(jpeg->clk_jdec_smi);
> > - clk_prepare_enable(jpeg->clk_jdec);
> > +
> > + for (i = 0; i < jpeg->variant->num_clocks; i++) {
> > + ret = clk_prepare_enable(jpeg->clocks[i]);
> > + if (ret) {
> > + while (--i >= 0)
> > + clk_disable_unprepare(jpeg->clocks[i]);
> > + }
> > + }
> > }
> >
> > static void mtk_jpeg_clk_off(struct mtk_jpeg_dev *jpeg)
> > {
> > - clk_disable_unprepare(jpeg->clk_jdec);
> > - clk_disable_unprepare(jpeg->clk_jdec_smi);
> > + int i;
> > +
> > + for (i = jpeg->variant->num_clocks - 1; i >= 0; i--)
> > + clk_disable_unprepare(jpeg->clocks[i]);
> > mtk_smi_larb_put(jpeg->larb);
> > }
> >
> > +static irqreturn_t mtk_jpeg_enc_irq(int irq, void *priv)
> > +{
> > + struct mtk_jpeg_dev *jpeg = priv;
> > + struct mtk_jpeg_ctx *ctx;
> > + struct vb2_v4l2_buffer *src_buf, *dst_buf;
> > + struct mtk_jpeg_src_buf *jpeg_src_buf;
> > + enum vb2_buffer_state buf_state = VB2_BUF_STATE_ERROR;
> > + u32 enc_irq_ret;
> > + u32 enc_ret, result_size;
> > +
> > + spin_lock(&jpeg->hw_lock);
> > +
> > + ctx = v4l2_m2m_get_curr_priv(jpeg->m2m_dev);
> > + if (!ctx) {
> > + v4l2_err(&jpeg->v4l2_dev, "Context is NULL\n");
> > + return IRQ_HANDLED;
> > + }
> > +
> > + src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
> > + dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
> > + jpeg_src_buf = mtk_jpeg_vb2_to_srcbuf(&src_buf->vb2_buf);
> > +
> > + enc_ret = mtk_jpeg_enc_get_and_clear_int_status(jpeg->reg_base);
> > + enc_irq_ret = mtk_jpeg_enc_enum_result(jpeg->reg_base, enc_ret);
> > +
> > + if (enc_irq_ret >= MTK_JPEG_ENC_RESULT_STALL)
> > + mtk_jpeg_enc_reset(jpeg->reg_base);
> > +
> > + if (enc_irq_ret != MTK_JPEG_ENC_RESULT_DONE) {
> > + dev_err(jpeg->dev, "encode failed\n");
> > + goto enc_end;
> > + }
> > +
> > + result_size = mtk_jpeg_enc_get_file_size(jpeg->reg_base);
> > + vb2_set_plane_payload(&dst_buf->vb2_buf, 0, result_size);
> > +
> > + buf_state = VB2_BUF_STATE_DONE;
> > +
> > +enc_end:
> > + v4l2_m2m_buf_done(src_buf, buf_state);
> > + v4l2_m2m_buf_done(dst_buf, buf_state);
> > + v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx);
> > + spin_unlock(&jpeg->hw_lock);
> > + pm_runtime_put_sync(ctx->jpeg->dev);
> > + return IRQ_HANDLED;
> > +}
> > +
> > static irqreturn_t mtk_jpeg_dec_irq(int irq, void *priv)
> > {
> > struct mtk_jpeg_dev *jpeg = priv;
> > @@ -876,13 +1338,13 @@ static irqreturn_t mtk_jpeg_dec_irq(int irq, void *priv)
> > struct vb2_v4l2_buffer *src_buf, *dst_buf;
> > struct mtk_jpeg_src_buf *jpeg_src_buf;
> > enum vb2_buffer_state buf_state = VB2_BUF_STATE_ERROR;
> > - u32 dec_irq_ret;
> > + u32 dec_irq_ret;
> > u32 dec_ret;
> > int i;
> >
> > spin_lock(&jpeg->hw_lock);
> >
> > - dec_ret = mtk_jpeg_dec_get_int_status(jpeg->dec_reg_base);
> > + dec_ret = mtk_jpeg_dec_get_int_status(jpeg->reg_base);
> > dec_irq_ret = mtk_jpeg_dec_enum_result(dec_ret);
> > ctx = v4l2_m2m_get_curr_priv(jpeg->m2m_dev);
> > if (!ctx) {
> > @@ -895,7 +1357,7 @@ static irqreturn_t mtk_jpeg_dec_irq(int irq, void *priv)
> > jpeg_src_buf = mtk_jpeg_vb2_to_srcbuf(&src_buf->vb2_buf);
> >
> > if (dec_irq_ret >= MTK_JPEG_DEC_RESULT_UNDERFLOW)
> > - mtk_jpeg_dec_reset(jpeg->dec_reg_base);
> > + mtk_jpeg_dec_reset(jpeg->reg_base);
> >
> > if (dec_irq_ret != MTK_JPEG_DEC_RESULT_EOF_DONE) {
> > dev_err(jpeg->dev, "decode failed\n");
> > @@ -917,39 +1379,131 @@ static irqreturn_t mtk_jpeg_dec_irq(int irq, void *priv)
> > return IRQ_HANDLED;
> > }
> >
> > -static void mtk_jpeg_set_default_params(struct mtk_jpeg_ctx *ctx)
> > +static void mtk_jpeg_set_enc_default_params(struct mtk_jpeg_ctx *ctx)
> > {
> > struct mtk_jpeg_q_data *q = &ctx->out_q;
> > - int i;
> > + struct v4l2_pix_format_mplane *pix_mp;
> > +
> > + pix_mp = kmalloc(sizeof(*pix_mp), GFP_KERNEL);
> >
> > + ctx->fh.ctrl_handler = &ctx->ctrl_hdl;
> > ctx->colorspace = V4L2_COLORSPACE_JPEG,
> > ctx->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
> > ctx->quantization = V4L2_QUANTIZATION_DEFAULT;
> > ctx->xfer_func = V4L2_XFER_FUNC_DEFAULT;
> > -
> > - q->fmt = mtk_jpeg_find_format(ctx, V4L2_PIX_FMT_JPEG,
> > - MTK_JPEG_FMT_TYPE_OUTPUT);
> > - q->w = MTK_JPEG_MIN_WIDTH;
> > - q->h = MTK_JPEG_MIN_HEIGHT;
> > - q->bytesperline[0] = 0;
> > - q->sizeimage[0] = MTK_JPEG_DEFAULT_SIZEIMAGE;
> > + pix_mp->width = MTK_JPEG_MIN_WIDTH;
> > + pix_mp->height = MTK_JPEG_MIN_HEIGHT;
> > +
> > + q->fmt = mtk_jpeg_find_format(V4L2_PIX_FMT_YUYV,
> > + MTK_JPEG_FMT_FLAG_ENC_OUTPUT);
> > + vidioc_try_fmt(container_of(pix_mp, struct v4l2_format,
> > + fmt.pix_mp), q->fmt);
> > + q->w = pix_mp->width;
> > + q->h = pix_mp->height;
> > + q->sizeimage[0] = pix_mp->plane_fmt[0].sizeimage;
> > + q->bytesperline[0] = pix_mp->plane_fmt[0].bytesperline;
> >
> > q = &ctx->cap_q;
> > - q->fmt = mtk_jpeg_find_format(ctx, V4L2_PIX_FMT_YUV420M,
> > - MTK_JPEG_FMT_TYPE_CAPTURE);
> > - q->w = MTK_JPEG_MIN_WIDTH;
> > - q->h = MTK_JPEG_MIN_HEIGHT;
> > + q->fmt = mtk_jpeg_find_format(V4L2_PIX_FMT_JPEG,
> > + MTK_JPEG_FMT_FLAG_ENC_CAPTURE);
> > + pix_mp->width = MTK_JPEG_MIN_WIDTH;
> > + pix_mp->height = MTK_JPEG_MIN_HEIGHT;
> > + vidioc_try_fmt(container_of(pix_mp, struct v4l2_format,
> > + fmt.pix_mp), q->fmt);
> > + q->w = pix_mp->width;
> > + q->h = pix_mp->height;
> > + q->sizeimage[0] = pix_mp->plane_fmt[0].sizeimage;
> > + q->bytesperline[0] = pix_mp->plane_fmt[0].bytesperline;
> > +}
> > +
> > +static void mtk_jpeg_set_dec_default_params(struct mtk_jpeg_ctx *ctx)
> > +{
> > + struct mtk_jpeg_q_data *q = &ctx->out_q;
> > + struct v4l2_pix_format_mplane *pix_mp;
> > + int i;
> > +
> > + pix_mp = kmalloc(sizeof(*pix_mp), GFP_KERNEL);
> >
> > + ctx->fh.ctrl_handler = &ctx->ctrl_hdl;
> > + ctx->colorspace = V4L2_COLORSPACE_JPEG,
> > + ctx->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
> > + ctx->quantization = V4L2_QUANTIZATION_DEFAULT;
> > + ctx->xfer_func = V4L2_XFER_FUNC_DEFAULT;
> > + pix_mp->width = MTK_JPEG_MIN_WIDTH;
> > + pix_mp->height = MTK_JPEG_MIN_HEIGHT;
> > +
> > + q->fmt = mtk_jpeg_find_format(V4L2_PIX_FMT_JPEG,
> > + MTK_JPEG_FMT_FLAG_DEC_OUTPUT);
> > + vidioc_try_fmt(container_of(pix_mp, struct v4l2_format,
> > + fmt.pix_mp), q->fmt);
> > + q->w = pix_mp->width;
> > + q->h = pix_mp->height;
> > + q->sizeimage[0] = pix_mp->plane_fmt[0].sizeimage;
> > + q->bytesperline[0] = pix_mp->plane_fmt[0].bytesperline;
> > +
> > + q = &ctx->cap_q;
> > + q->fmt = mtk_jpeg_find_format(V4L2_PIX_FMT_YUV420M,
> > + MTK_JPEG_FMT_FLAG_DEC_CAPTURE);
> > + pix_mp->width = MTK_JPEG_MIN_WIDTH;
> > + pix_mp->height = MTK_JPEG_MIN_HEIGHT;
> > + vidioc_try_fmt(container_of(pix_mp, struct v4l2_format,
> > + fmt.pix_mp), q->fmt);
> > + q->w = pix_mp->width;
> > + q->h = pix_mp->height;
> > for (i = 0; i < q->fmt->colplanes; i++) {
> > - u32 stride = q->w * q->fmt->h_sample[i] / 4;
> > - u32 h = q->h * q->fmt->v_sample[i] / 4;
> > + q->sizeimage[i] = pix_mp->plane_fmt[i].sizeimage;
> > + q->bytesperline[i] = pix_mp->plane_fmt[i].bytesperline;
> > + }
> > +}
> > +
> > +static int mtk_jpeg_enc_open(struct file *file)
> > +{
> > + struct mtk_jpeg_dev *jpeg = video_drvdata(file);
> > + struct video_device *vfd = video_devdata(file);
> > + struct mtk_jpeg_ctx *ctx;
> > + int ret = 0;
> >
> > - q->bytesperline[i] = stride;
> > - q->sizeimage[i] = stride * h;
> > + ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
> > + if (!ctx)
> > + return -ENOMEM;
> > +
> > + if (mutex_lock_interruptible(&jpeg->lock)) {
> > + ret = -ERESTARTSYS;
> > + goto free;
> > + }
> > +
> > + v4l2_fh_init(&ctx->fh, vfd);
> > + file->private_data = &ctx->fh;
> > + v4l2_fh_add(&ctx->fh);
> > +
> > + ctx->jpeg = jpeg;
> > + ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(jpeg->m2m_dev, ctx,
> > + mtk_jpeg_enc_queue_init);
> > + if (IS_ERR(ctx->fh.m2m_ctx)) {
> > + ret = PTR_ERR(ctx->fh.m2m_ctx);
> > + goto error;
> > }
> > +
> > + ret = mtk_jpeg_enc_ctrls_setup(ctx);
> > + if (ret) {
> > + v4l2_err(&jpeg->v4l2_dev, "Failed to setup jpeg enc controls\n");
> > + goto error;
> > + }
> > + mtk_jpeg_set_enc_default_params(ctx);
> > +
> > + mutex_unlock(&jpeg->lock);
> > + return 0;
> > +
> > +error:
> > + v4l2_fh_del(&ctx->fh);
> > + v4l2_fh_exit(&ctx->fh);
> > + mutex_unlock(&jpeg->lock);
> > +free:
> > + kfree(ctx);
> > + return ret;
> > }
> >
> > -static int mtk_jpeg_open(struct file *file)
> > +static int mtk_jpeg_dec_open(struct file *file)
> > {
> > struct mtk_jpeg_dev *jpeg = video_drvdata(file);
> > struct video_device *vfd = video_devdata(file);
> > @@ -971,13 +1525,20 @@ static int mtk_jpeg_open(struct file *file)
> >
> > ctx->jpeg = jpeg;
> > ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(jpeg->m2m_dev, ctx,
> > - mtk_jpeg_queue_init);
> > + mtk_jpeg_dec_queue_init);
> > if (IS_ERR(ctx->fh.m2m_ctx)) {
> > ret = PTR_ERR(ctx->fh.m2m_ctx);
> > goto error;
> > }
> >
> > - mtk_jpeg_set_default_params(ctx);
> > + v4l2_ctrl_handler_init(&ctx->ctrl_hdl, 0);
> > + ret = v4l2_ctrl_handler_setup(&ctx->ctrl_hdl);
> > + if (ret) {
> > + v4l2_err(&jpeg->v4l2_dev, "Failed to setup jpeg dec controls\n");
> > + goto error;
> > + }
> > + mtk_jpeg_set_dec_default_params(ctx);
> > +
> > mutex_unlock(&jpeg->lock);
> > return 0;
> >
> > @@ -997,6 +1558,7 @@ static int mtk_jpeg_release(struct file *file)
> >
> > mutex_lock(&jpeg->lock);
> > v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
> > + v4l2_ctrl_handler_free(&ctx->ctrl_hdl);
> > v4l2_fh_del(&ctx->fh);
> > v4l2_fh_exit(&ctx->fh);
> > kfree(ctx);
> > @@ -1004,9 +1566,18 @@ static int mtk_jpeg_release(struct file *file)
> > return 0;
> > }
> >
> > -static const struct v4l2_file_operations mtk_jpeg_fops = {
> > +static const struct v4l2_file_operations mtk_jpeg_enc_fops = {
> > .owner = THIS_MODULE,
> > - .open = mtk_jpeg_open,
> > + .open = mtk_jpeg_enc_open,
> > + .release = mtk_jpeg_release,
> > + .poll = v4l2_m2m_fop_poll,
> > + .unlocked_ioctl = video_ioctl2,
> > + .mmap = v4l2_m2m_fop_mmap,
> > +};
> > +
> > +static const struct v4l2_file_operations mtk_jpeg_dec_fops = {
> > + .owner = THIS_MODULE,
> > + .open = mtk_jpeg_dec_open,
> > .release = mtk_jpeg_release,
> > .poll = v4l2_m2m_fop_poll,
> > .unlocked_ioctl = video_ioctl2,
> > @@ -1017,6 +1588,7 @@ static int mtk_jpeg_clk_init(struct mtk_jpeg_dev *jpeg)
> > {
> > struct device_node *node;
> > struct platform_device *pdev;
> > + int i;
> >
> > node = of_parse_phandle(jpeg->dev->of_node, "mediatek,larb", 0);
> > if (!node)
> > @@ -1030,19 +1602,24 @@ static int mtk_jpeg_clk_init(struct mtk_jpeg_dev *jpeg)
> >
> > jpeg->larb = &pdev->dev;
> >
> > - jpeg->clk_jdec = devm_clk_get(jpeg->dev, "jpgdec");
> > - if (IS_ERR(jpeg->clk_jdec))
> > - return PTR_ERR(jpeg->clk_jdec);
> > + for (i = 0; i < jpeg->variant->num_clocks; i++) {
> > + jpeg->clocks[i] = devm_clk_get(jpeg->dev,
> > + jpeg->variant->clk_names[i]);
> > + if (IS_ERR(jpeg->clocks[i])) {
> > + dev_err(&pdev->dev, "failed to get clock: %s\n",
> > + jpeg->variant->clk_names[i]);
> > + return PTR_ERR(jpeg->clocks[i]);
> > + }
> > + }
> >
> > - jpeg->clk_jdec_smi = devm_clk_get(jpeg->dev, "jpgdec-smi");
> > - return PTR_ERR_OR_ZERO(jpeg->clk_jdec_smi);
> > + return 0;
> > }
> >
> > static int mtk_jpeg_probe(struct platform_device *pdev)
> > {
> > struct mtk_jpeg_dev *jpeg;
> > struct resource *res;
> > - int dec_irq;
> > + int jpeg_irq;
> > int ret;
> >
> > jpeg = devm_kzalloc(&pdev->dev, sizeof(*jpeg), GFP_KERNEL);
> > @@ -1052,25 +1629,30 @@ static int mtk_jpeg_probe(struct platform_device *pdev)
> > mutex_init(&jpeg->lock);
> > spin_lock_init(&jpeg->hw_lock);
> > jpeg->dev = &pdev->dev;
> > + jpeg->variant = of_device_get_match_data(jpeg->dev);
> >
> > res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > - jpeg->dec_reg_base = devm_ioremap_resource(&pdev->dev, res);
> > - if (IS_ERR(jpeg->dec_reg_base)) {
> > - ret = PTR_ERR(jpeg->dec_reg_base);
> > + jpeg->reg_base = devm_ioremap_resource(&pdev->dev, res);
> > + if (IS_ERR(jpeg->reg_base)) {
> > + ret = PTR_ERR(jpeg->reg_base);
> > return ret;
> > }
> >
> > - dec_irq = platform_get_irq(pdev, 0);
> > - if (dec_irq < 0) {
> > - dev_err(&pdev->dev, "Failed to get dec_irq %d.\n", dec_irq);
> > - return dec_irq;
> > + jpeg_irq = platform_get_irq(pdev, 0);
> > + if (jpeg_irq < 0) {
> > + dev_err(&pdev->dev, "Failed to get jpeg_irq %d.\n", jpeg_irq);
> > + return jpeg_irq;
> > }
> >
> > - ret = devm_request_irq(&pdev->dev, dec_irq, mtk_jpeg_dec_irq, 0,
> > - pdev->name, jpeg);
> > + if (jpeg->variant->is_encoder)
> > + ret = devm_request_irq(&pdev->dev, jpeg_irq, mtk_jpeg_enc_irq,
> > + 0, pdev->name, jpeg);
> > + else
> > + ret = devm_request_irq(&pdev->dev, jpeg_irq, mtk_jpeg_dec_irq,
> > + 0, pdev->name, jpeg);
> > if (ret) {
> > - dev_err(&pdev->dev, "Failed to request dec_irq %d (%d)\n",
> > - dec_irq, ret);
> > + dev_err(&pdev->dev, "Failed to request jpeg_irq %d (%d)\n",
> > + jpeg_irq, ret);
> > goto err_req_irq;
> > }
> >
> > @@ -1087,40 +1669,50 @@ static int mtk_jpeg_probe(struct platform_device *pdev)
> > goto err_dev_register;
> > }
> >
> > - jpeg->m2m_dev = v4l2_m2m_init(&mtk_jpeg_m2m_ops);
> > + if (jpeg->variant->is_encoder)
> > + jpeg->m2m_dev = v4l2_m2m_init(&mtk_jpeg_enc_m2m_ops);
> > + else
> > + jpeg->m2m_dev = v4l2_m2m_init(&mtk_jpeg_dec_m2m_ops);
> > if (IS_ERR(jpeg->m2m_dev)) {
> > v4l2_err(&jpeg->v4l2_dev, "Failed to init mem2mem device\n");
> > ret = PTR_ERR(jpeg->m2m_dev);
> > goto err_m2m_init;
> > }
> >
> > - jpeg->dec_vdev = video_device_alloc();
> > - if (!jpeg->dec_vdev) {
> > + jpeg->vdev = video_device_alloc();
> > + if (!jpeg->vdev) {
> > ret = -ENOMEM;
> > - goto err_dec_vdev_alloc;
> > + goto err_vfd_jpeg_alloc;
> > }
> > - snprintf(jpeg->dec_vdev->name, sizeof(jpeg->dec_vdev->name),
> > - "%s-dec", MTK_JPEG_NAME);
> > - jpeg->dec_vdev->fops = &mtk_jpeg_fops;
> > - jpeg->dec_vdev->ioctl_ops = &mtk_jpeg_ioctl_ops;
> > - jpeg->dec_vdev->minor = -1;
> > - jpeg->dec_vdev->release = video_device_release;
> > - jpeg->dec_vdev->lock = &jpeg->lock;
> > - jpeg->dec_vdev->v4l2_dev = &jpeg->v4l2_dev;
> > - jpeg->dec_vdev->vfl_dir = VFL_DIR_M2M;
> > - jpeg->dec_vdev->device_caps = V4L2_CAP_STREAMING |
> > + snprintf(jpeg->vdev->name, sizeof(jpeg->vdev->name),
> > + "%s-%s", MTK_JPEG_NAME,
> > + jpeg->variant->is_encoder ? "enc" : "dec");
> > + if (jpeg->variant->is_encoder) {
> > + jpeg->vdev->fops = &mtk_jpeg_enc_fops;
> > + jpeg->vdev->ioctl_ops = &mtk_jpeg_enc_ioctl_ops;
> > + } else {
> > + jpeg->vdev->fops = &mtk_jpeg_dec_fops;
> > + jpeg->vdev->ioctl_ops = &mtk_jpeg_dec_ioctl_ops;
> > + }
> > + jpeg->vdev->minor = -1;
> > + jpeg->vdev->release = video_device_release;
> > + jpeg->vdev->lock = &jpeg->lock;
> > + jpeg->vdev->v4l2_dev = &jpeg->v4l2_dev;
> > + jpeg->vdev->vfl_dir = VFL_DIR_M2M;
> > + jpeg->vdev->device_caps = V4L2_CAP_STREAMING |
> > V4L2_CAP_VIDEO_M2M_MPLANE;
> >
> > - ret = video_register_device(jpeg->dec_vdev, VFL_TYPE_GRABBER, -1);
> > + ret = video_register_device(jpeg->vdev, VFL_TYPE_GRABBER, -1);
> > if (ret) {
> > v4l2_err(&jpeg->v4l2_dev, "Failed to register video device\n");
> > - goto err_dec_vdev_register;
> > + goto err_vfd_jpeg_register;
> > }
> >
> > - video_set_drvdata(jpeg->dec_vdev, jpeg);
> > + video_set_drvdata(jpeg->vdev, jpeg);
> > v4l2_info(&jpeg->v4l2_dev,
> > - "decoder device registered as /dev/video%d (%d,%d)\n",
> > - jpeg->dec_vdev->num, VIDEO_MAJOR, jpeg->dec_vdev->minor);
> > + "jpeg %s device registered as /dev/video%d (%d,%d)\n",
> > + jpeg->variant->is_encoder ? "enc" : "dec", jpeg->vdev->num,
> > + VIDEO_MAJOR, jpeg->vdev->minor);
> >
> > platform_set_drvdata(pdev, jpeg);
> >
> > @@ -1128,10 +1720,10 @@ static int mtk_jpeg_probe(struct platform_device *pdev)
> >
> > return 0;
> >
> > -err_dec_vdev_register:
> > - video_device_release(jpeg->dec_vdev);
> > +err_vfd_jpeg_register:
> > + video_device_release(jpeg->vdev);
> >
> > -err_dec_vdev_alloc:
> > +err_vfd_jpeg_alloc:
> > v4l2_m2m_release(jpeg->m2m_dev);
> >
> > err_m2m_init:
> > @@ -1151,8 +1743,8 @@ static int mtk_jpeg_remove(struct platform_device *pdev)
> > struct mtk_jpeg_dev *jpeg = platform_get_drvdata(pdev);
> >
> > pm_runtime_disable(&pdev->dev);
> > - video_unregister_device(jpeg->dec_vdev);
> > - video_device_release(jpeg->dec_vdev);
> > + video_unregister_device(jpeg->vdev);
> > + video_device_release(jpeg->vdev);
> > v4l2_m2m_release(jpeg->m2m_dev);
> > v4l2_device_unregister(&jpeg->v4l2_dev);
> >
> > @@ -1211,14 +1803,36 @@ static const struct dev_pm_ops mtk_jpeg_pm_ops = {
> > SET_RUNTIME_PM_OPS(mtk_jpeg_pm_suspend, mtk_jpeg_pm_resume, NULL)
> > };
> >
> > +static struct mtk_jpeg_variant mt8173_jpeg_drvdata = {
> > + .is_encoder = false,
> > + .clk_names = {"jpgdec-smi", "jpgdec"},
> > + .num_clocks = 2,
> > +};
> > +
> > +static struct mtk_jpeg_variant mt2701_jpeg_drvdata = {
> > + .is_encoder = false,
> > + .clk_names = {"jpgdec-smi", "jpgdec"},
> > + .num_clocks = 2,
> > +};
> > +
> > +static struct mtk_jpeg_variant mtk_jpeg_drvdata = {
> > + .is_encoder = true,
> > + .clk_names = {"jpgenc"},
> > + .num_clocks = 1,
> > +};
> > +
> > static const struct of_device_id mtk_jpeg_match[] = {
> > {
> > .compatible = "mediatek,mt8173-jpgdec",
> > - .data = NULL,
> > + .data = &mt8173_jpeg_drvdata,
> > },
> > {
> > .compatible = "mediatek,mt2701-jpgdec",
> > - .data = NULL,
> > + .data = &mt2701_jpeg_drvdata,
> > + },
> > + {
> > + .compatible = "mediatek,mtk-jpgenc",
> > + .data = &mtk_jpeg_drvdata,
> > },
> > {},
> > };
> > diff --git a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.h b/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.h
> > index 9bbd615b1067..8f80f2a69d45 100644
> > --- a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.h
> > +++ b/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.h
> > @@ -3,6 +3,7 @@
> > * Copyright (c) 2016 MediaTek Inc.
> > * Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com>
> > * Rick Chang <rick.chang@mediatek.com>
> > + * Xia Jiang <xia.jiang@mediatek.com>
> > */
> >
> > #ifndef _MTK_JPEG_CORE_H
> > @@ -16,19 +17,21 @@
> > #define MTK_JPEG_NAME "mtk-jpeg"
> >
> > #define MTK_JPEG_COMP_MAX 3
> > +#define MTK_JPEG_MAX_CLOCKS 2
> > +
> >
> > #define MTK_JPEG_FMT_FLAG_DEC_OUTPUT BIT(0)
> > #define MTK_JPEG_FMT_FLAG_DEC_CAPTURE BIT(1)
> > -
> > -#define MTK_JPEG_FMT_TYPE_OUTPUT 1
> > -#define MTK_JPEG_FMT_TYPE_CAPTURE 2
> > +#define MTK_JPEG_FMT_FLAG_ENC_OUTPUT BIT(2)
> > +#define MTK_JPEG_FMT_FLAG_ENC_CAPTURE BIT(3)
> >
> > #define MTK_JPEG_MIN_WIDTH 32U
> > #define MTK_JPEG_MIN_HEIGHT 32U
> > -#define MTK_JPEG_MAX_WIDTH 8192U
> > -#define MTK_JPEG_MAX_HEIGHT 8192U
> > +#define MTK_JPEG_MAX_WIDTH 65535U
> > +#define MTK_JPEG_MAX_HEIGHT 65535U
> >
> > #define MTK_JPEG_DEFAULT_SIZEIMAGE (1 * 1024 * 1024)
> > +#define MTK_JPEG_DEFAULT_EXIF_SIZE (64 * 1024)
> >
> > /**
> > * enum mtk_jpeg_ctx_state - contex state of jpeg
> > @@ -39,6 +42,18 @@ enum mtk_jpeg_ctx_state {
> > MTK_JPEG_SOURCE_CHANGE,
> > };
> >
> > +/**
> > + * mtk_jpeg_variant - mtk jpeg driver variant
> > + * @is_encoder: driver mode is jpeg encoder
> > + * @clk_names: clock names
> > + * @num_clocks: numbers of clock
> > + */
> > +struct mtk_jpeg_variant {
> > + bool is_encoder;
> > + const char *clk_names[MTK_JPEG_MAX_CLOCKS];
> > + int num_clocks;
> > +};
> > +
> > /**
> > * struct mt_jpeg - JPEG IP abstraction
> > * @lock: the mutex protecting this structure
> > @@ -48,11 +63,11 @@ enum mtk_jpeg_ctx_state {
> > * @v4l2_dev: v4l2 device for mem2mem mode
> > * @m2m_dev: v4l2 mem2mem device data
> > * @alloc_ctx: videobuf2 memory allocator's context
> > - * @dec_vdev: video device node for decoder mem2mem mode
> > - * @dec_reg_base: JPEG registers mapping
> > - * @clk_jdec: JPEG hw working clock
> > - * @clk_jdec_smi: JPEG SMI bus clock
> > + * @vdev: video device node for jpeg mem2mem mode
> > + * @reg_base: JPEG registers mapping
> > * @larb: SMI device
> > + * @clocks: JPEG IP clock(s)
> > + * @variant: driver variant to be used
> > */
> > struct mtk_jpeg_dev {
> > struct mutex lock;
> > @@ -62,16 +77,17 @@ struct mtk_jpeg_dev {
> > struct v4l2_device v4l2_dev;
> > struct v4l2_m2m_dev *m2m_dev;
> > void *alloc_ctx;
> > - struct video_device *dec_vdev;
> > - void __iomem *dec_reg_base;
> > - struct clk *clk_jdec;
> > - struct clk *clk_jdec_smi;
> > + struct video_device *vdev;
> > + void __iomem *reg_base;
> > struct device *larb;
> > + struct clk *clocks[MTK_JPEG_MAX_CLOCKS];
> > + const struct mtk_jpeg_variant *variant;
> > };
> >
> > /**
> > * struct jpeg_fmt - driver's internal color format data
> > * @fourcc: the fourcc code, 0 if not applicable
> > + * @hw_format: hardware format value
> > * @h_sample: horizontal sample count of plane in 4 * 4 pixel image
> > * @v_sample: vertical sample count of plane in 4 * 4 pixel image
> > * @colplanes: number of color planes (1 for packed formats)
> > @@ -81,6 +97,7 @@ struct mtk_jpeg_dev {
> > */
> > struct mtk_jpeg_fmt {
> > u32 fourcc;
> > + u32 hw_format;
> > int h_sample[VIDEO_MAX_PLANES];
> > int v_sample[VIDEO_MAX_PLANES];
> > int colplanes;
> > @@ -113,6 +130,10 @@ struct mtk_jpeg_q_data {
> > * @cap_q: destination (capture) queue queue information
> > * @fh: V4L2 file handle
> > * @state: state of the context
> > + * @enable_exif: enable exif mode of jpeg encoder
> > + * @enc_quality: jpeg encoder quality
> > + * @restart_interval: jpeg encoder restart interval
> > + * @ctrl_hdl: controls handler
> > * @colorspace: enum v4l2_colorspace; supplemental to pixelformat
> > * @ycbcr_enc: enum v4l2_ycbcr_encoding, Y'CbCr encoding
> > * @quantization: enum v4l2_quantization, colorspace quantization
> > @@ -124,6 +145,10 @@ struct mtk_jpeg_ctx {
> > struct mtk_jpeg_q_data cap_q;
> > struct v4l2_fh fh;
> > enum mtk_jpeg_ctx_state state;
> > + bool enable_exif;
> > + u8 enc_quality;
> > + u8 restart_interval;
> > + struct v4l2_ctrl_handler ctrl_hdl;
> >
> > enum v4l2_colorspace colorspace;
> > enum v4l2_ycbcr_encoding ycbcr_enc;
> > diff --git a/drivers/media/platform/mtk-jpeg/mtk_jpeg_dec_hw.h b/drivers/media/platform/mtk-jpeg/mtk_jpeg_dec_hw.h
> > index 1cc37dbfc8e7..ce263db5f30a 100644
> > --- a/drivers/media/platform/mtk-jpeg/mtk_jpeg_dec_hw.h
> > +++ b/drivers/media/platform/mtk-jpeg/mtk_jpeg_dec_hw.h
> > @@ -3,10 +3,11 @@
> > * Copyright (c) 2016 MediaTek Inc.
> > * Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com>
> > * Rick Chang <rick.chang@mediatek.com>
> > + * Xia Jiang <xia.jiang@mediatek.com>
> > */
> >
> > -#ifndef _MTK_JPEG_HW_H
> > -#define _MTK_JPEG_HW_H
> > +#ifndef _MTK_JPEG_DEC_HW_H
> > +#define _MTK_JPEG_DEC_HW_H
> >
> > #include <media/videobuf2-core.h>
> >
> > @@ -75,4 +76,4 @@ void mtk_jpeg_dec_set_config(void __iomem *base,
> > void mtk_jpeg_dec_reset(void __iomem *dec_reg_base);
> > void mtk_jpeg_dec_start(void __iomem *dec_reg_base);
> >
> > -#endif /* _MTK_JPEG_HW_H */
> > +#endif /* _MTK_JPEG_DEC_HW_H */
> > diff --git a/drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_hw.c b/drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_hw.c
> > new file mode 100644
> > index 000000000000..7fc1de920a75
> > --- /dev/null
> > +++ b/drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_hw.c
> > @@ -0,0 +1,193 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * Copyright (c) 2019 MediaTek Inc.
> > + * Author: Xia Jiang <xia.jiang@mediatek.com>
> > + *
> > + */
> > +
> > +#include <linux/io.h>
> > +#include <linux/kernel.h>
> > +#include <media/videobuf2-core.h>
> > +
> > +#include "mtk_jpeg_enc_hw.h"
> > +
> > +static const struct mtk_jpeg_enc_qlt mtk_jpeg_enc_quality[] = {
> > + {.quality_param = 34, .hardware_value = JPEG_ENC_QUALITY_Q34},
> > + {.quality_param = 39, .hardware_value = JPEG_ENC_QUALITY_Q39},
> > + {.quality_param = 48, .hardware_value = JPEG_ENC_QUALITY_Q48},
> > + {.quality_param = 60, .hardware_value = JPEG_ENC_QUALITY_Q60},
> > + {.quality_param = 64, .hardware_value = JPEG_ENC_QUALITY_Q64},
> > + {.quality_param = 68, .hardware_value = JPEG_ENC_QUALITY_Q68},
> > + {.quality_param = 74, .hardware_value = JPEG_ENC_QUALITY_Q74},
> > + {.quality_param = 80, .hardware_value = JPEG_ENC_QUALITY_Q80},
> > + {.quality_param = 82, .hardware_value = JPEG_ENC_QUALITY_Q82},
> > + {.quality_param = 84, .hardware_value = JPEG_ENC_QUALITY_Q84},
> > + {.quality_param = 87, .hardware_value = JPEG_ENC_QUALITY_Q87},
> > + {.quality_param = 90, .hardware_value = JPEG_ENC_QUALITY_Q90},
> > + {.quality_param = 92, .hardware_value = JPEG_ENC_QUALITY_Q92},
> > + {.quality_param = 95, .hardware_value = JPEG_ENC_QUALITY_Q95},
> > + {.quality_param = 97, .hardware_value = JPEG_ENC_QUALITY_Q97},
> > +};
> > +
> > +void mtk_jpeg_enc_reset(void __iomem *base)
> > +{
> > + writel(0x00, base + JPEG_ENC_RSTB);
> > + writel(JPEG_ENC_RESET_BIT, base + JPEG_ENC_RSTB);
> > + writel(0x00, base + JPEG_ENC_CODEC_SEL);
> > +}
> > +
> > +u32 mtk_jpeg_enc_get_and_clear_int_status(void __iomem *base)
> > +{
> > + u32 ret;
> > +
> > + ret = readl(base + JPEG_ENC_INT_STS) &
> > + JPEG_ENC_INT_STATUS_MASK_ALLIRQ;
> > + if (ret)
> > + writel(0, base + JPEG_ENC_INT_STS);
> > +
> > + return ret;
> > +}
> > +
> > +u32 mtk_jpeg_enc_get_file_size(void __iomem *base)
> > +{
> > + return readl(base + JPEG_ENC_DMA_ADDR0) -
> > + readl(base + JPEG_ENC_DST_ADDR0);
> > +}
> > +
> > +u32 mtk_jpeg_enc_enum_result(void __iomem *base, u32 irq_status)
> > +{
> > + if (irq_status & JPEG_ENC_INT_STATUS_DONE)
> > + return MTK_JPEG_ENC_RESULT_DONE;
> > + else if (irq_status & JPEG_ENC_INT_STATUS_STALL)
> > + return MTK_JPEG_ENC_RESULT_STALL;
> > + else
> > + return MTK_JPEG_ENC_RESULT_VCODEC_IRQ;
> > +}
> > +
> > +void mtk_jpeg_enc_set_img_size(void __iomem *base, u32 width, u32 height)
> > +{
> > + u32 value;
> > +
> > + value = width << 16 | height;
> > + writel(value, base + JPEG_ENC_IMG_SIZE);
> > +}
> > +
> > +void mtk_jpeg_enc_set_blk_num(void __iomem *base, u32 enc_format, u32 width,
> > + u32 height)
> > +{
> > + u32 blk_num;
> > + u32 is_420;
> > + u32 padding_width;
> > + u32 padding_height;
> > + u32 luma_blocks;
> > + u32 chroma_blocks;
> > +
> > + is_420 = (enc_format == V4L2_PIX_FMT_NV12M ||
> > + enc_format == V4L2_PIX_FMT_NV21M) ? 1 : 0;
> > + padding_width = round_up(width, 16);
> > + padding_height = round_up(height, is_420 ? 16 : 8);
> > +
> > + luma_blocks = padding_width / 8 * padding_height / 8;
> > + if (is_420)
> > + chroma_blocks = luma_blocks / 4;
> > + else
> > + chroma_blocks = luma_blocks / 2;
> > +
> > + blk_num = luma_blocks + 2 * chroma_blocks - 1;
> > +
> > + writel(blk_num, base + JPEG_ENC_BLK_NUM);
> > +}
> > +
> > +void mtk_jpeg_enc_set_stride(void __iomem *base, u32 enc_format, u32 width,
> > + u32 height, u32 bytesperline)
> > +{
> > + u32 img_stride;
> > + u32 mem_stride;
> > +
> > + if (enc_format == V4L2_PIX_FMT_NV12M ||
> > + enc_format == V4L2_PIX_FMT_NV21M) {
> > + img_stride = round_up(width, 16);
> > + mem_stride = bytesperline;
> > + } else {
> > + img_stride = round_up(width * 2, 32);
> > + mem_stride = img_stride;
> > + }
> > +
> > + writel(img_stride, base + JPEG_ENC_IMG_STRIDE);
> > + writel(mem_stride, base + JPEG_ENC_STRIDE);
> > +}
> > +
> > +void mtk_jpeg_enc_set_src_addr(void __iomem *base, u32 src_addr,
> > + u32 plane_index)
> > +{
> > + if (!plane_index)
> > + writel(src_addr, base + JPEG_ENC_SRC_LUMA_ADDR);
> > + else
> > + writel(src_addr, base + JPEG_ENC_SRC_CHROMA_ADDR);
> > +}
> > +
> > +void mtk_jpeg_enc_set_dst_addr(void __iomem *base, u32 dst_addr,
> > + u32 stall_size, u32 init_offset,
> > + u32 offset_mask)
> > +{
> > + writel(init_offset & ~0xf, base + JPEG_ENC_OFFSET_ADDR);
> > + writel(offset_mask & 0xf, base + JPEG_ENC_BYTE_OFFSET_MASK);
> > + writel(dst_addr & ~0xf, base + JPEG_ENC_DST_ADDR0);
> > + writel((dst_addr + stall_size) & ~0xf, base + JPEG_ENC_STALL_ADDR0);
> > +}
> > +
> > +static void mtk_jpeg_enc_set_quality(void __iomem *base, u32 quality)
> > +{
> > + u32 value;
> > + u32 i, enc_quality;
> > +
> > + enc_quality = mtk_jpeg_enc_quality[0].hardware_value;
> > + for (i = 0; i < ARRAY_SIZE(mtk_jpeg_enc_quality); i++) {
> > + if (quality <= mtk_jpeg_enc_quality[i].quality_param) {
> > + enc_quality = mtk_jpeg_enc_quality[i].hardware_value;
> > + break;
> > + }
> > + }
> > +
> > + value = readl(base + JPEG_ENC_QUALITY);
> > + value = (value & JPEG_ENC_QUALITY_MASK) | enc_quality;
> > + writel(value, base + JPEG_ENC_QUALITY);
> > +}
> > +
> > +static void mtk_jpeg_enc_set_ctrl(void __iomem *base, u32 enc_format,
> > + bool exif_en, u32 restart_interval)
> > +{
> > + u32 value;
> > +
> > + value = readl(base + JPEG_ENC_CTRL);
> > + value &= ~JPEG_ENC_CTRL_YUV_FORMAT_MASK;
> > + value |= (enc_format & 3) << 3;
> > + if (exif_en)
> > + value |= JPEG_ENC_CTRL_FILE_FORMAT_BIT;
> > + else
> > + value &= ~JPEG_ENC_CTRL_FILE_FORMAT_BIT;
> > + if (restart_interval)
> > + value |= JPEG_ENC_CTRL_RESTART_EN_BIT;
> > + else
> > + value &= ~JPEG_ENC_CTRL_RESTART_EN_BIT;
> > + writel(value, base + JPEG_ENC_CTRL);
> > +}
> > +
> > +void mtk_jpeg_enc_set_config(void __iomem *base, u32 enc_format, bool exif_en,
> > + u32 quality, u32 restart_interval)
> > +{
> > + mtk_jpeg_enc_set_quality(base, quality);
> > +
> > + mtk_jpeg_enc_set_ctrl(base, enc_format, exif_en, restart_interval);
> > +
> > + writel(restart_interval, base + JPEG_ENC_RST_MCU_NUM);
> > +}
> > +
> > +void mtk_jpeg_enc_start(void __iomem *base)
> > +{
> > + u32 value;
> > +
> > + value = readl(base + JPEG_ENC_CTRL);
> > + value |= JPEG_ENC_CTRL_INT_EN_BIT | JPEG_ENC_CTRL_ENABLE_BIT;
> > + writel(value, base + JPEG_ENC_CTRL);
> > +}
> > diff --git a/drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_hw.h b/drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_hw.h
> > new file mode 100644
> > index 000000000000..73faf49b667c
> > --- /dev/null
> > +++ b/drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_hw.h
> > @@ -0,0 +1,123 @@
> > +/* SPDX-License-Identifier: GPL-2.0-only */
> > +/*
> > + * Copyright (c) 2019 MediaTek Inc.
> > + * Author: Xia Jiang <xia.jiang@mediatek.com>
> > + *
> > + */
> > +
> > +#ifndef _MTK_JPEG_ENC_HW_H
> > +#define _MTK_JPEG_ENC_HW_H
> > +
> > +#include <media/videobuf2-core.h>
> > +
> > +#include "mtk_jpeg_core.h"
> > +
> > +#define JPEG_ENC_INT_STATUS_DONE BIT(0)
> > +#define JPEG_ENC_INT_STATUS_STALL BIT(1)
> > +#define JPEG_ENC_INT_STATUS_VCODEC_IRQ BIT(4)
> > +#define JPEG_ENC_INT_STATUS_MASK_ALLIRQ 0x13
> > +
> > +#define JPEG_ENC_DST_ADDR_OFFSET_MASK GENMASK(3, 0)
> > +#define JPEG_ENC_QUALITY_MASK GENMASK(31, 16)
> > +
> > +#define JPEG_ENC_CTRL_YUV_FORMAT_MASK 0x18
> > +#define JPEG_ENC_CTRL_RESTART_EN_BIT BIT(10)
> > +#define JPEG_ENC_CTRL_FILE_FORMAT_BIT BIT(5)
> > +#define JPEG_ENC_CTRL_INT_EN_BIT BIT(2)
> > +#define JPEG_ENC_CTRL_ENABLE_BIT BIT(0)
> > +#define JPEG_ENC_RESET_BIT BIT(0)
> > +
> > +#define JPEG_ENC_YUV_FORMAT_YUYV 0
> > +#define JPEG_ENC_YUV_FORMAT_YVYU 1
> > +#define JPEG_ENC_YUV_FORMAT_NV12 2
> > +#define JEPG_ENC_YUV_FORMAT_NV21 3
> > +
> > +#define JPEG_ENC_QUALITY_Q60 0x0
> > +#define JPEG_ENC_QUALITY_Q80 0x1
> > +#define JPEG_ENC_QUALITY_Q90 0x2
> > +#define JPEG_ENC_QUALITY_Q95 0x3
> > +#define JPEG_ENC_QUALITY_Q39 0x4
> > +#define JPEG_ENC_QUALITY_Q68 0x5
> > +#define JPEG_ENC_QUALITY_Q84 0x6
> > +#define JPEG_ENC_QUALITY_Q92 0x7
> > +#define JPEG_ENC_QUALITY_Q48 0x8
> > +#define JPEG_ENC_QUALITY_Q74 0xa
> > +#define JPEG_ENC_QUALITY_Q87 0xb
> > +#define JPEG_ENC_QUALITY_Q34 0xc
> > +#define JPEG_ENC_QUALITY_Q64 0xe
> > +#define JPEG_ENC_QUALITY_Q82 0xf
> > +#define JPEG_ENC_QUALITY_Q97 0x10
> > +
> > +#define JPEG_ENC_RSTB 0x100
> > +#define JPEG_ENC_CTRL 0x104
> > +#define JPEG_ENC_QUALITY 0x108
> > +#define JPEG_ENC_BLK_NUM 0x10C
> > +#define JPEG_ENC_BLK_CNT 0x110
> > +#define JPEG_ENC_INT_STS 0x11c
> > +#define JPEG_ENC_DST_ADDR0 0x120
> > +#define JPEG_ENC_DMA_ADDR0 0x124
> > +#define JPEG_ENC_STALL_ADDR0 0x128
> > +#define JPEG_ENC_OFFSET_ADDR 0x138
> > +#define JPEG_ENC_RST_MCU_NUM 0x150
> > +#define JPEG_ENC_IMG_SIZE 0x154
> > +#define JPEG_ENC_DEBUG_INFO0 0x160
> > +#define JPEG_ENC_DEBUG_INFO1 0x164
> > +#define JPEG_ENC_TOTAL_CYCLE 0x168
> > +#define JPEG_ENC_BYTE_OFFSET_MASK 0x16c
> > +#define JPEG_ENC_SRC_LUMA_ADDR 0x170
> > +#define JPEG_ENC_SRC_CHROMA_ADDR 0x174
> > +#define JPEG_ENC_STRIDE 0x178
> > +#define JPEG_ENC_IMG_STRIDE 0x17c
> > +#define JPEG_ENC_DCM_CTRL 0x300
> > +#define JPEG_ENC_CODEC_SEL 0x314
> > +#define JPEG_ENC_ULTRA_THRES 0x318
> > +
> > +enum {
> > + MTK_JPEG_ENC_RESULT_DONE,
> > + MTK_JPEG_ENC_RESULT_STALL,
> > + MTK_JPEG_ENC_RESULT_VCODEC_IRQ
> > +};
> > +
> > +/**
> > + * struct mtk_jpeg_enc_qlt - JPEG encoder quality data
> > + * @quality_param: quality value
> > + * @hardware_value: hardware value of quality
> > + */
> > +struct mtk_jpeg_enc_qlt {
> > + u8 quality_param;
> > + u8 hardware_value;
> > +};
> > +
> > +/**
> > + * struct mt_jpeg_enc_bs - JPEG encoder bitstream buffer
> > + * @dma_addr: JPEG encoder destination address
> > + * @size: JPEG encoder bistream size
> > + * @dma_addr_offset: JPEG encoder offset address
> > + * @dma_addr_offsetmask: JPEG encoder destination address offset mask
> > + */
> > +struct mtk_jpeg_enc_bs {
> > + dma_addr_t dma_addr;
> > + size_t size;
> > + u32 dma_addr_offset;
> > + u32 dma_addr_offsetmask;
> > +};
> > +
> > +void mtk_jpeg_enc_reset(void __iomem *base);
> > +u32 mtk_jpeg_enc_get_and_clear_int_status(void __iomem *base);
> > +u32 mtk_jpeg_enc_get_file_size(void __iomem *base);
> > +u32 mtk_jpeg_enc_enum_result(void __iomem *base, u32 irq_status);
> > +void mtk_jpeg_enc_set_img_size(void __iomem *base, u32 width, u32 height);
> > +void mtk_jpeg_enc_set_blk_num(void __iomem *base, u32 enc_format, u32 width,
> > + u32 height);
> > +void mtk_jpeg_enc_set_stride(void __iomem *base, u32 enc_format, u32 width,
> > + u32 height, u32 bytesperline);
> > +void mtk_jpeg_enc_set_src_addr(void __iomem *base, u32 src_addr,
> > + u32 plane_index);
> > +void mtk_jpeg_enc_set_dst_addr(void __iomem *base, u32 dst_addr,
> > + u32 stall_size, u32 init_offset,
> > + u32 offset_mask);
> > +void mtk_jpeg_enc_set_config(void __iomem *base, u32 enc_format, bool exif_en,
> > + u32 quality, u32 restart_interval);
> > +void mtk_jpeg_enc_start(void __iomem *enc_reg_base);
> > +
> > +#endif /* _MTK_JPEG_ENC_HW_H */
> >
>
^ permalink raw reply
* Re: Security Random Number Generator support
From: Russell King - ARM Linux admin @ 2020-06-05 8:09 UTC (permalink / raw)
To: Neal Liu
Cc: Marc Zyngier,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Julius Werner, Herbert Xu, Arnd Bergmann, Greg Kroah-Hartman,
Sean Wang, linux-mediatek@lists.infradead.org, lkml, wsd_upstream,
Rob Herring, Linux Crypto Mailing List, Matt Mackall,
Matthias Brugger, Crystal Guo (郭晶), Ard Biesheuvel,
Linux ARM
In-Reply-To: <1591341543.19510.4.camel@mtkswgap22>
On Fri, Jun 05, 2020 at 03:19:03PM +0800, Neal Liu wrote:
> On Wed, 2020-06-03 at 17:34 +0800, Russell King - ARM Linux admin wrote:
> > This kind of thing is something that ARM have seems to shy away from
> > doing - it's a point I brought up many years ago when the whole
> > trustzone thing first appeared with its SMC call. Those around the
> > conference table were not interested - ARM seemed to prefer every
> > vendor to do off and do their own thing with the SMC interface.
>
> Does that mean it make sense to model a sec-rng driver, and get each
> vendor's SMC function id by DT node?
_If_ vendors have already gone off and decided to use different SMC
function IDs for this, while keeping the rest of the SMC interface
the same, then the choice has already been made.
I know on 32-bit that some of the secure world implementations can't
be changed; they're burnt into the ROM. I believe on 64-bit that isn't
the case, which makes it easier to standardise.
Do you have visibility of how this SMC is implemented in the secure
side? Is it in ATF, and is it done as a vendor hack or is there an
element of generic implementation to it? Has it been submitted
upstream to the main ATF repository?
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC for 0.8m (est. 1762m) line in suburbia: sync at 13.1Mbps down 424kbps up
^ permalink raw reply
* Re: [PATCH v4 03/11] irqchip: add sl28cpld interrupt controller support
From: Andy Shevchenko @ 2020-06-05 8:07 UTC (permalink / raw)
To: Michael Walle
Cc: open list:GPIO SUBSYSTEM, devicetree, Linux Kernel Mailing List,
linux-hwmon, linux-pwm, linux-watchdog, linux-arm Mailing List,
Linus Walleij, Bartosz Golaszewski, Rob Herring, Jean Delvare,
Guenter Roeck, Lee Jones, Thierry Reding, Uwe Kleine-König,
Wim Van Sebroeck, Shawn Guo, Li Yang, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Mark Brown, Greg Kroah-Hartman,
Andy Shevchenko
In-Reply-To: <20200604211039.12689-4-michael@walle.cc>
On Fri, Jun 5, 2020 at 12:13 AM Michael Walle <michael@walle.cc> wrote:
>
> Add support for the interrupt controller inside the sl28 CPLD management
> controller.
>
> The interrupt controller can handle at most 8 interrupts and is really
> simplistic and consists only of an interrupt mask and an interrupt
> pending register.
...
> +config SL28CPLD_INTC
> + bool
Same Q: Why not module?
...
> +static const struct of_device_id sl28cpld_intc_of_match[] = {
> + { .compatible = "kontron,sl28cpld-intc" },
> + {},
There is no point to have comma in terminator line.
> +};
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
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