* Re: [PATCH] dt-bindings: regulator: maxim,max8973: Drop Tegra specifics from example
From: Krzysztof Kozlowski @ 2022-01-27 7:24 UTC (permalink / raw)
To: Rob Herring, Liam Girdwood, Mark Brown; +Cc: linux-kernel, devicetree
In-Reply-To: <20220126231250.1635021-1-robh@kernel.org>
On 27/01/2022 00:12, Rob Herring wrote:
> There's no need to complicate examples with a platform specific macro.
> It also complicates example parsing to figure out the number of interrupt
> cells in examples (based on the bracketing).
>
> Signed-off-by: Rob Herring <robh@kernel.org>
> ---
> .../devicetree/bindings/regulator/maxim,max8973.yaml | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH v2 0/5] Tegra234 APE support
From: Sameer Pujar @ 2022-01-27 7:27 UTC (permalink / raw)
To: broonie, lgirdwood, tiwai, perex, robh+dt, thierry.reding
Cc: jonathanh, mkumard, devicetree, linux-tegra, linux-kernel,
alsa-devel, Sameer Pujar
This adds APE support on Tegra234 and enables sound card on
Jetson AGX Orin platform.
Changelog
=========
v1->v2
------
* Rebased patches on latest linux-next
Mohan Kumar (1):
ASoC: tegra: Update AHUB driver for Tegra234
Sameer Pujar (4):
dt-bindings: Add Tegra234 APE support
dt-bindings: Document Tegra234 APE support
arm64: tegra: Add audio devices on Tegra234
arm64: tegra: APE sound card for Jetson AGX Orin
.../bindings/bus/nvidia,tegra210-aconnect.yaml | 1 +
.../bindings/dma/nvidia,tegra210-adma.yaml | 4 +-
.../bindings/interrupt-controller/arm,gic.yaml | 1 +
.../bindings/sound/nvidia,tegra186-dspk.yaml | 4 +-
.../bindings/sound/nvidia,tegra210-admaif.yaml | 4 +-
.../bindings/sound/nvidia,tegra210-adx.yaml | 1 +
.../bindings/sound/nvidia,tegra210-ahub.yaml | 1 +
.../bindings/sound/nvidia,tegra210-amx.yaml | 3 +
.../bindings/sound/nvidia,tegra210-dmic.yaml | 1 +
.../bindings/sound/nvidia,tegra210-i2s.yaml | 1 +
.../bindings/sound/nvidia,tegra210-mixer.yaml | 1 +
.../bindings/sound/nvidia,tegra210-mvc.yaml | 1 +
.../bindings/sound/nvidia,tegra210-sfc.yaml | 1 +
.../dts/nvidia/tegra234-p3737-0000+p3701-0000.dts | 1783 ++++++++++++++++++++
arch/arm64/boot/dts/nvidia/tegra234.dtsi | 432 +++++
include/dt-bindings/clock/tegra234-clock.h | 74 +-
include/dt-bindings/memory/tegra234-mc.h | 7 +
include/dt-bindings/power/tegra234-powergate.h | 9 +
sound/soc/tegra/tegra210_ahub.c | 146 +-
sound/soc/tegra/tegra210_ahub.h | 4 +-
20 files changed, 2473 insertions(+), 6 deletions(-)
create mode 100644 include/dt-bindings/power/tegra234-powergate.h
--
2.7.4
^ permalink raw reply
* [PATCH v2 1/5] ASoC: tegra: Update AHUB driver for Tegra234
From: Sameer Pujar @ 2022-01-27 7:27 UTC (permalink / raw)
To: broonie, lgirdwood, tiwai, perex, robh+dt, thierry.reding
Cc: jonathanh, mkumard, devicetree, linux-tegra, linux-kernel,
alsa-devel, Sameer Pujar
In-Reply-To: <1643268455-15567-1-git-send-email-spujar@nvidia.com>
From: Mohan Kumar <mkumard@nvidia.com>
The register offsets of switches connecting various AHUB internal
modules have changed from previous chip. Address this variation by
making use of Tegra234 based compatible.
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
---
sound/soc/tegra/tegra210_ahub.c | 146 +++++++++++++++++++++++++++++++++++++++-
sound/soc/tegra/tegra210_ahub.h | 4 +-
2 files changed, 148 insertions(+), 2 deletions(-)
diff --git a/sound/soc/tegra/tegra210_ahub.c b/sound/soc/tegra/tegra210_ahub.c
index 388b815..bccf8b8 100644
--- a/sound/soc/tegra/tegra210_ahub.c
+++ b/sound/soc/tegra/tegra210_ahub.c
@@ -2,7 +2,7 @@
//
// tegra210_ahub.c - Tegra210 AHUB driver
//
-// Copyright (c) 2020 NVIDIA CORPORATION. All rights reserved.
+// Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved.
#include <linux/clk.h>
#include <linux/device.h>
@@ -624,6 +624,34 @@ MUX_ENUM_CTRL_DECL_186(t186_mixer18_tx, 0x27);
MUX_ENUM_CTRL_DECL_186(t186_mixer19_tx, 0x28);
MUX_ENUM_CTRL_DECL_186(t186_mixer110_tx, 0x29);
+/* Controls for t234 */
+MUX_ENUM_CTRL_DECL_234(t234_mvc1_tx, 0x44);
+MUX_ENUM_CTRL_DECL_234(t234_mvc2_tx, 0x45);
+MUX_ENUM_CTRL_DECL_234(t234_amx11_tx, 0x48);
+MUX_ENUM_CTRL_DECL_234(t234_amx12_tx, 0x49);
+MUX_ENUM_CTRL_DECL_234(t234_amx13_tx, 0x4a);
+MUX_ENUM_CTRL_DECL_234(t234_amx14_tx, 0x4b);
+MUX_ENUM_CTRL_DECL_234(t234_amx21_tx, 0x4c);
+MUX_ENUM_CTRL_DECL_234(t234_amx22_tx, 0x4d);
+MUX_ENUM_CTRL_DECL_234(t234_amx23_tx, 0x4e);
+MUX_ENUM_CTRL_DECL_234(t234_amx24_tx, 0x4f);
+MUX_ENUM_CTRL_DECL_234(t234_amx31_tx, 0x50);
+MUX_ENUM_CTRL_DECL_234(t234_amx32_tx, 0x51);
+MUX_ENUM_CTRL_DECL_234(t234_amx33_tx, 0x52);
+MUX_ENUM_CTRL_DECL_234(t234_amx34_tx, 0x53);
+MUX_ENUM_CTRL_DECL_234(t234_adx1_tx, 0x58);
+MUX_ENUM_CTRL_DECL_234(t234_adx2_tx, 0x59);
+MUX_ENUM_CTRL_DECL_234(t234_adx3_tx, 0x5a);
+MUX_ENUM_CTRL_DECL_234(t234_adx4_tx, 0x5b);
+MUX_ENUM_CTRL_DECL_234(t234_amx41_tx, 0x5c);
+MUX_ENUM_CTRL_DECL_234(t234_amx42_tx, 0x5d);
+MUX_ENUM_CTRL_DECL_234(t234_amx43_tx, 0x5e);
+MUX_ENUM_CTRL_DECL_234(t234_amx44_tx, 0x5f);
+MUX_ENUM_CTRL_DECL_234(t234_admaif17_tx, 0x60);
+MUX_ENUM_CTRL_DECL_234(t234_admaif18_tx, 0x61);
+MUX_ENUM_CTRL_DECL_234(t234_admaif19_tx, 0x62);
+MUX_ENUM_CTRL_DECL_234(t234_admaif20_tx, 0x63);
+
/*
* The number of entries in, and order of, this array is closely tied to the
* calculation of tegra210_ahub_codec.num_dapm_widgets near the end of
@@ -787,6 +815,102 @@ static const struct snd_soc_dapm_widget tegra186_ahub_widgets[] = {
TX_WIDGETS("MIXER1 TX5"),
};
+static const struct snd_soc_dapm_widget tegra234_ahub_widgets[] = {
+ WIDGETS("ADMAIF1", t186_admaif1_tx),
+ WIDGETS("ADMAIF2", t186_admaif2_tx),
+ WIDGETS("ADMAIF3", t186_admaif3_tx),
+ WIDGETS("ADMAIF4", t186_admaif4_tx),
+ WIDGETS("ADMAIF5", t186_admaif5_tx),
+ WIDGETS("ADMAIF6", t186_admaif6_tx),
+ WIDGETS("ADMAIF7", t186_admaif7_tx),
+ WIDGETS("ADMAIF8", t186_admaif8_tx),
+ WIDGETS("ADMAIF9", t186_admaif9_tx),
+ WIDGETS("ADMAIF10", t186_admaif10_tx),
+ WIDGETS("ADMAIF11", t186_admaif11_tx),
+ WIDGETS("ADMAIF12", t186_admaif12_tx),
+ WIDGETS("ADMAIF13", t186_admaif13_tx),
+ WIDGETS("ADMAIF14", t186_admaif14_tx),
+ WIDGETS("ADMAIF15", t186_admaif15_tx),
+ WIDGETS("ADMAIF16", t186_admaif16_tx),
+ WIDGETS("ADMAIF17", t234_admaif17_tx),
+ WIDGETS("ADMAIF18", t234_admaif18_tx),
+ WIDGETS("ADMAIF19", t234_admaif19_tx),
+ WIDGETS("ADMAIF20", t234_admaif20_tx),
+ WIDGETS("I2S1", t186_i2s1_tx),
+ WIDGETS("I2S2", t186_i2s2_tx),
+ WIDGETS("I2S3", t186_i2s3_tx),
+ WIDGETS("I2S4", t186_i2s4_tx),
+ WIDGETS("I2S5", t186_i2s5_tx),
+ WIDGETS("I2S6", t186_i2s6_tx),
+ TX_WIDGETS("DMIC1"),
+ TX_WIDGETS("DMIC2"),
+ TX_WIDGETS("DMIC3"),
+ TX_WIDGETS("DMIC4"),
+ WIDGETS("DSPK1", t186_dspk1_tx),
+ WIDGETS("DSPK2", t186_dspk2_tx),
+ WIDGETS("SFC1", t186_sfc1_tx),
+ WIDGETS("SFC2", t186_sfc2_tx),
+ WIDGETS("SFC3", t186_sfc3_tx),
+ WIDGETS("SFC4", t186_sfc4_tx),
+ WIDGETS("MVC1", t234_mvc1_tx),
+ WIDGETS("MVC2", t234_mvc2_tx),
+ WIDGETS("AMX1 RX1", t234_amx11_tx),
+ WIDGETS("AMX1 RX2", t234_amx12_tx),
+ WIDGETS("AMX1 RX3", t234_amx13_tx),
+ WIDGETS("AMX1 RX4", t234_amx14_tx),
+ WIDGETS("AMX2 RX1", t234_amx21_tx),
+ WIDGETS("AMX2 RX2", t234_amx22_tx),
+ WIDGETS("AMX2 RX3", t234_amx23_tx),
+ WIDGETS("AMX2 RX4", t234_amx24_tx),
+ WIDGETS("AMX3 RX1", t234_amx31_tx),
+ WIDGETS("AMX3 RX2", t234_amx32_tx),
+ WIDGETS("AMX3 RX3", t234_amx33_tx),
+ WIDGETS("AMX3 RX4", t234_amx34_tx),
+ WIDGETS("AMX4 RX1", t234_amx41_tx),
+ WIDGETS("AMX4 RX2", t234_amx42_tx),
+ WIDGETS("AMX4 RX3", t234_amx43_tx),
+ WIDGETS("AMX4 RX4", t234_amx44_tx),
+ TX_WIDGETS("AMX1"),
+ TX_WIDGETS("AMX2"),
+ TX_WIDGETS("AMX3"),
+ TX_WIDGETS("AMX4"),
+ WIDGETS("ADX1", t234_adx1_tx),
+ WIDGETS("ADX2", t234_adx2_tx),
+ WIDGETS("ADX3", t234_adx3_tx),
+ WIDGETS("ADX4", t234_adx4_tx),
+ TX_WIDGETS("ADX1 TX1"),
+ TX_WIDGETS("ADX1 TX2"),
+ TX_WIDGETS("ADX1 TX3"),
+ TX_WIDGETS("ADX1 TX4"),
+ TX_WIDGETS("ADX2 TX1"),
+ TX_WIDGETS("ADX2 TX2"),
+ TX_WIDGETS("ADX2 TX3"),
+ TX_WIDGETS("ADX2 TX4"),
+ TX_WIDGETS("ADX3 TX1"),
+ TX_WIDGETS("ADX3 TX2"),
+ TX_WIDGETS("ADX3 TX3"),
+ TX_WIDGETS("ADX3 TX4"),
+ TX_WIDGETS("ADX4 TX1"),
+ TX_WIDGETS("ADX4 TX2"),
+ TX_WIDGETS("ADX4 TX3"),
+ TX_WIDGETS("ADX4 TX4"),
+ WIDGETS("MIXER1 RX1", t186_mixer11_tx),
+ WIDGETS("MIXER1 RX2", t186_mixer12_tx),
+ WIDGETS("MIXER1 RX3", t186_mixer13_tx),
+ WIDGETS("MIXER1 RX4", t186_mixer14_tx),
+ WIDGETS("MIXER1 RX5", t186_mixer15_tx),
+ WIDGETS("MIXER1 RX6", t186_mixer16_tx),
+ WIDGETS("MIXER1 RX7", t186_mixer17_tx),
+ WIDGETS("MIXER1 RX8", t186_mixer18_tx),
+ WIDGETS("MIXER1 RX9", t186_mixer19_tx),
+ WIDGETS("MIXER1 RX10", t186_mixer110_tx),
+ TX_WIDGETS("MIXER1 TX1"),
+ TX_WIDGETS("MIXER1 TX2"),
+ TX_WIDGETS("MIXER1 TX3"),
+ TX_WIDGETS("MIXER1 TX4"),
+ TX_WIDGETS("MIXER1 TX5"),
+};
+
#define TEGRA_COMMON_MUX_ROUTES(name) \
{ name " XBAR-TX", NULL, name " Mux" }, \
{ name " Mux", "ADMAIF1", "ADMAIF1 XBAR-RX" }, \
@@ -1027,6 +1151,13 @@ static const struct snd_soc_component_driver tegra186_ahub_component = {
.num_dapm_routes = ARRAY_SIZE(tegra186_ahub_routes),
};
+static const struct snd_soc_component_driver tegra234_ahub_component = {
+ .dapm_widgets = tegra234_ahub_widgets,
+ .num_dapm_widgets = ARRAY_SIZE(tegra234_ahub_widgets),
+ .dapm_routes = tegra186_ahub_routes,
+ .num_dapm_routes = ARRAY_SIZE(tegra186_ahub_routes),
+};
+
static const struct regmap_config tegra210_ahub_regmap_config = {
.reg_bits = 32,
.val_bits = 32,
@@ -1067,9 +1198,22 @@ static const struct tegra_ahub_soc_data soc_data_tegra186 = {
.reg_count = TEGRA186_XBAR_UPDATE_MAX_REG,
};
+static const struct tegra_ahub_soc_data soc_data_tegra234 = {
+ .cmpnt_drv = &tegra234_ahub_component,
+ .dai_drv = tegra186_ahub_dais,
+ .num_dais = ARRAY_SIZE(tegra186_ahub_dais),
+ .regmap_config = &tegra186_ahub_regmap_config,
+ .mask[0] = TEGRA186_XBAR_REG_MASK_0,
+ .mask[1] = TEGRA186_XBAR_REG_MASK_1,
+ .mask[2] = TEGRA186_XBAR_REG_MASK_2,
+ .mask[3] = TEGRA186_XBAR_REG_MASK_3,
+ .reg_count = TEGRA186_XBAR_UPDATE_MAX_REG,
+};
+
static const struct of_device_id tegra_ahub_of_match[] = {
{ .compatible = "nvidia,tegra210-ahub", .data = &soc_data_tegra210 },
{ .compatible = "nvidia,tegra186-ahub", .data = &soc_data_tegra186 },
+ { .compatible = "nvidia,tegra234-ahub", .data = &soc_data_tegra234 },
{},
};
MODULE_DEVICE_TABLE(of, tegra_ahub_of_match);
diff --git a/sound/soc/tegra/tegra210_ahub.h b/sound/soc/tegra/tegra210_ahub.h
index 47802bbe..2728db4 100644
--- a/sound/soc/tegra/tegra210_ahub.h
+++ b/sound/soc/tegra/tegra210_ahub.h
@@ -2,7 +2,7 @@
/*
* tegra210_ahub.h - TEGRA210 AHUB
*
- * Copyright (c) 2020 NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved.
*
*/
@@ -74,6 +74,8 @@
tegra_ahub_get_value_enum, \
tegra_ahub_put_value_enum)
+#define MUX_ENUM_CTRL_DECL_234(ename, id) MUX_ENUM_CTRL_DECL_186(ename, id)
+
#define WIDGETS(sname, ename) \
SND_SOC_DAPM_AIF_IN(sname " XBAR-RX", NULL, 0, SND_SOC_NOPM, 0, 0), \
SND_SOC_DAPM_AIF_OUT(sname " XBAR-TX", NULL, 0, SND_SOC_NOPM, 0, 0), \
--
2.7.4
^ permalink raw reply related
* [PATCH v2 2/5] dt-bindings: Add Tegra234 APE support
From: Sameer Pujar @ 2022-01-27 7:27 UTC (permalink / raw)
To: broonie, lgirdwood, tiwai, perex, robh+dt, thierry.reding
Cc: jonathanh, mkumard, devicetree, linux-tegra, linux-kernel,
alsa-devel, Sameer Pujar
In-Reply-To: <1643268455-15567-1-git-send-email-spujar@nvidia.com>
Add clocks, power-domain and memory bindings to support APE subsystem
on Tegra234.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
---
include/dt-bindings/clock/tegra234-clock.h | 74 +++++++++++++++++++++++++-
include/dt-bindings/memory/tegra234-mc.h | 7 +++
include/dt-bindings/power/tegra234-powergate.h | 9 ++++
3 files changed, 89 insertions(+), 1 deletion(-)
create mode 100644 include/dt-bindings/power/tegra234-powergate.h
diff --git a/include/dt-bindings/clock/tegra234-clock.h b/include/dt-bindings/clock/tegra234-clock.h
index 8d7e66e..635b5fb 100644
--- a/include/dt-bindings/clock/tegra234-clock.h
+++ b/include/dt-bindings/clock/tegra234-clock.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0 */
-/* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. */
+/* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. */
#ifndef DT_BINDINGS_CLOCK_TEGRA234_CLOCK_H
#define DT_BINDINGS_CLOCK_TEGRA234_CLOCK_H
@@ -9,6 +9,26 @@
* @defgroup bpmp_clock_ids Clock ID's
* @{
*/
+/** output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_AHUB */
+#define TEGRA234_CLK_AHUB 4U
+/** @brief output of gate CLK_ENB_APB2APE */
+#define TEGRA234_CLK_APB2APE 5U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_APE */
+#define TEGRA234_CLK_APE 6U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_AUD_MCLK */
+#define TEGRA234_CLK_AUD_MCLK 7U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_DMIC1 */
+#define TEGRA234_CLK_DMIC1 15U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_DMIC2 */
+#define TEGRA234_CLK_DMIC2 16U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_DMIC3 */
+#define TEGRA234_CLK_DMIC3 17U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_DMIC4 */
+#define TEGRA234_CLK_DMIC4 18U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_DSPK1 */
+#define TEGRA234_CLK_DSPK1 29U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_DSPK2 */
+#define TEGRA234_CLK_DSPK2 30U
/**
* @brief controls the EMC clock frequency.
* @details Doing a clk_set_rate on this clock will select the
@@ -20,8 +40,60 @@
#define TEGRA234_CLK_EMC 31U
/** @brief output of gate CLK_ENB_FUSE */
#define TEGRA234_CLK_FUSE 40U
+/** output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2S1 */
+#define TEGRA234_CLK_I2S1 56U
+/** @brief clock recovered from I2S1 input */
+#define TEGRA234_CLK_I2S1_SYNC_INPUT 57U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2S2 */
+#define TEGRA234_CLK_I2S2 58U
+/** @brief clock recovered from I2S2 input */
+#define TEGRA234_CLK_I2S2_SYNC_INPUT 59U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2S3 */
+#define TEGRA234_CLK_I2S3 60U
+/** @brief clock recovered from I2S3 input */
+#define TEGRA234_CLK_I2S3_SYNC_INPUT 61U
+/** output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2S4 */
+#define TEGRA234_CLK_I2S4 62U
+/** @brief clock recovered from I2S4 input */
+#define TEGRA234_CLK_I2S4_SYNC_INPUT 63U
+/** output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2S5 */
+#define TEGRA234_CLK_I2S5 64U
+/** @brief clock recovered from I2S5 input */
+#define TEGRA234_CLK_I2S5_SYNC_INPUT 65U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2S6 */
+#define TEGRA234_CLK_I2S6 66U
+/** @brief clock recovered from I2S6 input */
+#define TEGRA234_CLK_I2S6_SYNC_INPUT 67U
+/** PLL controlled by CLK_RST_CONTROLLER_PLLA_BASE for use by audio clocks */
+#define TEGRA234_CLK_PLLA 93U
+/** @brief output of the divider CLK_RST_CONTROLLER_PLLA_OUT */
+#define TEGRA234_CLK_PLLA_OUT0 104U
/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC4 */
#define TEGRA234_CLK_SDMMC4 123U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_AUDIO_SYNC_CLK_DMIC1 */
+#define TEGRA234_CLK_SYNC_DMIC1 139U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_AUDIO_SYNC_CLK_DMIC2 */
+#define TEGRA234_CLK_SYNC_DMIC2 140U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_AUDIO_SYNC_CLK_DMIC3 */
+#define TEGRA234_CLK_SYNC_DMIC3 141U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_AUDIO_SYNC_CLK_DMIC4 */
+#define TEGRA234_CLK_SYNC_DMIC4 142U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_AUDIO_SYNC_CLK_DSPK1 */
+#define TEGRA234_CLK_SYNC_DSPK1 143U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_AUDIO_SYNC_CLK_DSPK2 */
+#define TEGRA234_CLK_SYNC_DSPK2 144U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_AUDIO_SYNC_CLK_I2S1 */
+#define TEGRA234_CLK_SYNC_I2S1 145U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_AUDIO_SYNC_CLK_I2S2 */
+#define TEGRA234_CLK_SYNC_I2S2 146U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_AUDIO_SYNC_CLK_I2S3 */
+#define TEGRA234_CLK_SYNC_I2S3 147U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_AUDIO_SYNC_CLK_I2S4 */
+#define TEGRA234_CLK_SYNC_I2S4 148U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_AUDIO_SYNC_CLK_I2S5 */
+#define TEGRA234_CLK_SYNC_I2S5 149U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_AUDIO_SYNC_CLK_I2S6 */
+#define TEGRA234_CLK_SYNC_I2S6 150U
/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_UARTA */
#define TEGRA234_CLK_UARTA 155U
/** @brief CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC_LEGACY_TM switch divider output */
diff --git a/include/dt-bindings/memory/tegra234-mc.h b/include/dt-bindings/memory/tegra234-mc.h
index 2662f70..444e62d 100644
--- a/include/dt-bindings/memory/tegra234-mc.h
+++ b/include/dt-bindings/memory/tegra234-mc.h
@@ -1,4 +1,5 @@
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. */
#ifndef DT_BINDINGS_MEMORY_TEGRA234_MC_H
#define DT_BINDINGS_MEMORY_TEGRA234_MC_H
@@ -7,6 +8,8 @@
#define TEGRA234_SID_INVALID 0x00
#define TEGRA234_SID_PASSTHROUGH 0x7f
+/* NISO0 stream IDs */
+#define TEGRA234_SID_APE 0x02
/* NISO1 stream IDs */
#define TEGRA234_SID_SDMMC4 0x02
@@ -20,6 +23,10 @@
#define TEGRA234_MEMORY_CLIENT_SDMMCRAB 0x63
/* sdmmcd memory write client */
#define TEGRA234_MEMORY_CLIENT_SDMMCWAB 0x67
+/* Audio Processing (APE) engine read clients */
+#define TEGRA234_MEMORY_CLIENT_APER 0x7a
+/* Audio Processing (APE) engine write clients */
+#define TEGRA234_MEMORY_CLIENT_APEW 0x7b
/* BPMP read client */
#define TEGRA234_MEMORY_CLIENT_BPMPR 0x93
/* BPMP write client */
diff --git a/include/dt-bindings/power/tegra234-powergate.h b/include/dt-bindings/power/tegra234-powergate.h
new file mode 100644
index 00000000..8e28fcb
--- /dev/null
+++ b/include/dt-bindings/power/tegra234-powergate.h
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. */
+
+#ifndef __ABI_MACH_T234_POWERGATE_T234_H_
+#define __ABI_MACH_T234_POWERGATE_T234_H_
+
+#define TEGRA234_POWER_DOMAIN_AUD 2U
+
+#endif
--
2.7.4
^ permalink raw reply related
* [PATCH v2 3/5] dt-bindings: Document Tegra234 APE support
From: Sameer Pujar @ 2022-01-27 7:27 UTC (permalink / raw)
To: broonie, lgirdwood, tiwai, perex, robh+dt, thierry.reding
Cc: jonathanh, mkumard, devicetree, linux-tegra, linux-kernel,
alsa-devel, Sameer Pujar
In-Reply-To: <1643268455-15567-1-git-send-email-spujar@nvidia.com>
Update binding docs for devices which are part of APE subsystem
on Tegra234 chip.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
---
Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml | 1 +
Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml | 4 +++-
Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml | 1 +
Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml | 4 +++-
Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml | 4 +++-
Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml | 1 +
Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml | 1 +
Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml | 3 +++
Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml | 1 +
Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml | 1 +
Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml | 1 +
Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml | 1 +
Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml | 1 +
13 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml
index 7b1a08c..d3ed048 100644
--- a/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml
+++ b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml
@@ -21,6 +21,7 @@ properties:
- const: nvidia,tegra210-aconnect
- items:
- enum:
+ - nvidia,tegra234-aconnect
- nvidia,tegra186-aconnect
- nvidia,tegra194-aconnect
- const: nvidia,tegra210-aconnect
diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml
index 5c2e2f1..fef8045 100644
--- a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml
+++ b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml
@@ -23,7 +23,9 @@ properties:
- nvidia,tegra210-adma
- nvidia,tegra186-adma
- items:
- - const: nvidia,tegra194-adma
+ - enum:
+ - nvidia,tegra234-adma
+ - nvidia,tegra194-adma
- const: nvidia,tegra186-adma
reg:
diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
index ba282f4..62219a5 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
@@ -58,6 +58,7 @@ properties:
- enum:
- nvidia,tegra186-agic
- nvidia,tegra194-agic
+ - nvidia,tegra234-agic
- const: nvidia,tegra210-agic
interrupt-controller: true
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml
index 0912d3e..73b98b2 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml
@@ -28,7 +28,9 @@ properties:
oneOf:
- const: nvidia,tegra186-dspk
- items:
- - const: nvidia,tegra194-dspk
+ - enum:
+ - nvidia,tegra234-dspk
+ - nvidia,tegra194-dspk
- const: nvidia,tegra186-dspk
reg:
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml
index 19eaacc..372043e 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml
@@ -27,7 +27,9 @@ properties:
- nvidia,tegra210-admaif
- nvidia,tegra186-admaif
- items:
- - const: nvidia,tegra194-admaif
+ - enum:
+ - nvidia,tegra234-admaif
+ - nvidia,tegra194-admaif
- const: nvidia,tegra186-admaif
reg:
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml
index c4ba12e..8d8dc7f 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml
@@ -30,6 +30,7 @@ properties:
- const: nvidia,tegra210-adx
- items:
- enum:
+ - nvidia,tegra234-adx
- nvidia,tegra194-adx
- nvidia,tegra186-adx
- const: nvidia,tegra210-adx
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml
index df81d20..4727f1e 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml
@@ -26,6 +26,7 @@ properties:
- enum:
- nvidia,tegra210-ahub
- nvidia,tegra186-ahub
+ - nvidia,tegra234-ahub
- items:
- const: nvidia,tegra194-ahub
- const: nvidia,tegra186-ahub
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml
index bb2111a..f9e4fc6 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml
@@ -31,6 +31,9 @@ properties:
- const: nvidia,tegra186-amx
- const: nvidia,tegra210-amx
- const: nvidia,tegra194-amx
+ - items:
+ - const: nvidia,tegra234-amx
+ - const: nvidia,tegra194-amx
reg:
maxItems: 1
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml
index 62db982..bcb496d 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml
@@ -28,6 +28,7 @@ properties:
- const: nvidia,tegra210-dmic
- items:
- enum:
+ - nvidia,tegra234-dmic
- nvidia,tegra194-dmic
- nvidia,tegra186-dmic
- const: nvidia,tegra210-dmic
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml
index f954be6..6188f56 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml
@@ -28,6 +28,7 @@ properties:
- const: nvidia,tegra210-i2s
- items:
- enum:
+ - nvidia,tegra234-i2s
- nvidia,tegra194-i2s
- nvidia,tegra186-i2s
- const: nvidia,tegra210-i2s
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml
index 428f3c8..ee1e1d2 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml
@@ -28,6 +28,7 @@ properties:
- const: nvidia,tegra210-amixer
- items:
- enum:
+ - nvidia,tegra234-amixer
- nvidia,tegra194-amixer
- nvidia,tegra186-amixer
- const: nvidia,tegra210-amixer
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml
index e2f5a85..c9888c5 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml
@@ -31,6 +31,7 @@ properties:
- const: nvidia,tegra210-mvc
- items:
- enum:
+ - nvidia,tegra234-mvc
- nvidia,tegra194-mvc
- nvidia,tegra186-mvc
- const: nvidia,tegra210-mvc
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml
index 41ad6517..8579306 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml
@@ -28,6 +28,7 @@ properties:
- const: nvidia,tegra210-sfc
- items:
- enum:
+ - nvidia,tegra234-sfc
- nvidia,tegra194-sfc
- nvidia,tegra186-sfc
- const: nvidia,tegra210-sfc
--
2.7.4
^ permalink raw reply related
* [PATCH v2 4/5] arm64: tegra: Add audio devices on Tegra234
From: Sameer Pujar @ 2022-01-27 7:27 UTC (permalink / raw)
To: broonie, lgirdwood, tiwai, perex, robh+dt, thierry.reding
Cc: jonathanh, mkumard, devicetree, linux-tegra, linux-kernel,
alsa-devel, Sameer Pujar
In-Reply-To: <1643268455-15567-1-git-send-email-spujar@nvidia.com>
Add following devices which are part of APE subsystem
* ACONNECT, AGIC and ADMA
* AHUB and children (ADMAIF, I2S, DMIC, DSPK, MVC, SFC,
AMX, ADX and Mixer)
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra234.dtsi | 414 +++++++++++++++++++++++++++++++
1 file changed, 414 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index 6b6f1580..aad7fd5 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -19,6 +19,420 @@
ranges = <0x0 0x0 0x0 0x40000000>;
+ aconnect@2900000 {
+ compatible = "nvidia,tegra234-aconnect",
+ "nvidia,tegra210-aconnect";
+ clocks = <&bpmp TEGRA234_CLK_APE>,
+ <&bpmp TEGRA234_CLK_APB2APE>;
+ clock-names = "ape", "apb2ape";
+ power-domains = <&bpmp TEGRA234_POWER_DOMAIN_AUD>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x02900000 0x02900000 0x200000>;
+ status = "disabled";
+
+ tegra_ahub: ahub@2900800 {
+ compatible = "nvidia,tegra234-ahub";
+ reg = <0x02900800 0x800>;
+ clocks = <&bpmp TEGRA234_CLK_AHUB>;
+ clock-names = "ahub";
+ assigned-clocks = <&bpmp TEGRA234_CLK_AHUB>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x02900800 0x02900800 0x11800>;
+ status = "disabled";
+
+ tegra_i2s1: i2s@2901000 {
+ compatible = "nvidia,tegra234-i2s",
+ "nvidia,tegra210-i2s";
+ reg = <0x2901000 0x100>;
+ clocks = <&bpmp TEGRA234_CLK_I2S1>,
+ <&bpmp TEGRA234_CLK_I2S1_SYNC_INPUT>;
+ clock-names = "i2s", "sync_input";
+ assigned-clocks = <&bpmp TEGRA234_CLK_I2S1>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
+ assigned-clock-rates = <1536000>;
+ sound-name-prefix = "I2S1";
+ status = "disabled";
+ };
+
+ tegra_i2s2: i2s@2901100 {
+ compatible = "nvidia,tegra234-i2s",
+ "nvidia,tegra210-i2s";
+ reg = <0x2901100 0x100>;
+ clocks = <&bpmp TEGRA234_CLK_I2S2>,
+ <&bpmp TEGRA234_CLK_I2S2_SYNC_INPUT>;
+ clock-names = "i2s", "sync_input";
+ assigned-clocks = <&bpmp TEGRA234_CLK_I2S2>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
+ assigned-clock-rates = <1536000>;
+ sound-name-prefix = "I2S2";
+ status = "disabled";
+ };
+
+ tegra_i2s3: i2s@2901200 {
+ compatible = "nvidia,tegra234-i2s",
+ "nvidia,tegra210-i2s";
+ reg = <0x2901200 0x100>;
+ clocks = <&bpmp TEGRA234_CLK_I2S3>,
+ <&bpmp TEGRA234_CLK_I2S3_SYNC_INPUT>;
+ clock-names = "i2s", "sync_input";
+ assigned-clocks = <&bpmp TEGRA234_CLK_I2S3>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
+ assigned-clock-rates = <1536000>;
+ sound-name-prefix = "I2S3";
+ status = "disabled";
+ };
+
+ tegra_i2s4: i2s@2901300 {
+ compatible = "nvidia,tegra234-i2s",
+ "nvidia,tegra210-i2s";
+ reg = <0x2901300 0x100>;
+ clocks = <&bpmp TEGRA234_CLK_I2S4>,
+ <&bpmp TEGRA234_CLK_I2S4_SYNC_INPUT>;
+ clock-names = "i2s", "sync_input";
+ assigned-clocks = <&bpmp TEGRA234_CLK_I2S4>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
+ assigned-clock-rates = <1536000>;
+ sound-name-prefix = "I2S4";
+ status = "disabled";
+ };
+
+ tegra_i2s5: i2s@2901400 {
+ compatible = "nvidia,tegra234-i2s",
+ "nvidia,tegra210-i2s";
+ reg = <0x2901400 0x100>;
+ clocks = <&bpmp TEGRA234_CLK_I2S5>,
+ <&bpmp TEGRA234_CLK_I2S5_SYNC_INPUT>;
+ clock-names = "i2s", "sync_input";
+ assigned-clocks = <&bpmp TEGRA234_CLK_I2S5>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
+ assigned-clock-rates = <1536000>;
+ sound-name-prefix = "I2S5";
+ status = "disabled";
+ };
+
+ tegra_i2s6: i2s@2901500 {
+ compatible = "nvidia,tegra234-i2s",
+ "nvidia,tegra210-i2s";
+ reg = <0x2901500 0x100>;
+ clocks = <&bpmp TEGRA234_CLK_I2S6>,
+ <&bpmp TEGRA234_CLK_I2S6_SYNC_INPUT>;
+ clock-names = "i2s", "sync_input";
+ assigned-clocks = <&bpmp TEGRA234_CLK_I2S6>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
+ assigned-clock-rates = <1536000>;
+ sound-name-prefix = "I2S6";
+ status = "disabled";
+ };
+
+ tegra_sfc1: sfc@2902000 {
+ compatible = "nvidia,tegra234-sfc",
+ "nvidia,tegra210-sfc";
+ reg = <0x2902000 0x200>;
+ sound-name-prefix = "SFC1";
+ status = "disabled";
+ };
+
+ tegra_sfc2: sfc@2902200 {
+ compatible = "nvidia,tegra234-sfc",
+ "nvidia,tegra210-sfc";
+ reg = <0x2902200 0x200>;
+ sound-name-prefix = "SFC2";
+ status = "disabled";
+ };
+
+ tegra_sfc3: sfc@2902400 {
+ compatible = "nvidia,tegra234-sfc",
+ "nvidia,tegra210-sfc";
+ reg = <0x2902400 0x200>;
+ sound-name-prefix = "SFC3";
+ status = "disabled";
+ };
+
+ tegra_sfc4: sfc@2902600 {
+ compatible = "nvidia,tegra234-sfc",
+ "nvidia,tegra210-sfc";
+ reg = <0x2902600 0x200>;
+ sound-name-prefix = "SFC4";
+ status = "disabled";
+ };
+
+ tegra_amx1: amx@2903000 {
+ compatible = "nvidia,tegra234-amx",
+ "nvidia,tegra194-amx";
+ reg = <0x2903000 0x100>;
+ sound-name-prefix = "AMX1";
+ status = "disabled";
+ };
+
+ tegra_amx2: amx@2903100 {
+ compatible = "nvidia,tegra234-amx",
+ "nvidia,tegra194-amx";
+ reg = <0x2903100 0x100>;
+ sound-name-prefix = "AMX2";
+ status = "disabled";
+ };
+
+ tegra_amx3: amx@2903200 {
+ compatible = "nvidia,tegra234-amx",
+ "nvidia,tegra194-amx";
+ reg = <0x2903200 0x100>;
+ sound-name-prefix = "AMX3";
+ status = "disabled";
+ };
+
+ tegra_amx4: amx@2903300 {
+ compatible = "nvidia,tegra234-amx",
+ "nvidia,tegra194-amx";
+ reg = <0x2903300 0x100>;
+ sound-name-prefix = "AMX4";
+ status = "disabled";
+ };
+
+ tegra_adx1: adx@2903800 {
+ compatible = "nvidia,tegra234-adx",
+ "nvidia,tegra210-adx";
+ reg = <0x2903800 0x100>;
+ sound-name-prefix = "ADX1";
+ status = "disabled";
+ };
+
+ tegra_adx2: adx@2903900 {
+ compatible = "nvidia,tegra234-adx",
+ "nvidia,tegra210-adx";
+ reg = <0x2903900 0x100>;
+ sound-name-prefix = "ADX2";
+ status = "disabled";
+ };
+
+ tegra_adx3: adx@2903a00 {
+ compatible = "nvidia,tegra234-adx",
+ "nvidia,tegra210-adx";
+ reg = <0x2903a00 0x100>;
+ sound-name-prefix = "ADX3";
+ status = "disabled";
+ };
+
+ tegra_adx4: adx@2903b00 {
+ compatible = "nvidia,tegra234-adx",
+ "nvidia,tegra210-adx";
+ reg = <0x2903b00 0x100>;
+ sound-name-prefix = "ADX4";
+ status = "disabled";
+ };
+
+
+ tegra_dmic1: dmic@2904000 {
+ compatible = "nvidia,tegra234-dmic",
+ "nvidia,tegra210-dmic";
+ reg = <0x2904000 0x100>;
+ clocks = <&bpmp TEGRA234_CLK_DMIC1>;
+ clock-names = "dmic";
+ assigned-clocks = <&bpmp TEGRA234_CLK_DMIC1>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
+ assigned-clock-rates = <3072000>;
+ sound-name-prefix = "DMIC1";
+ status = "disabled";
+ };
+
+ tegra_dmic2: dmic@2904100 {
+ compatible = "nvidia,tegra234-dmic",
+ "nvidia,tegra210-dmic";
+ reg = <0x2904100 0x100>;
+ clocks = <&bpmp TEGRA234_CLK_DMIC2>;
+ clock-names = "dmic";
+ assigned-clocks = <&bpmp TEGRA234_CLK_DMIC2>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
+ assigned-clock-rates = <3072000>;
+ sound-name-prefix = "DMIC2";
+ status = "disabled";
+ };
+
+ tegra_dmic3: dmic@2904200 {
+ compatible = "nvidia,tegra234-dmic",
+ "nvidia,tegra210-dmic";
+ reg = <0x2904200 0x100>;
+ clocks = <&bpmp TEGRA234_CLK_DMIC3>;
+ clock-names = "dmic";
+ assigned-clocks = <&bpmp TEGRA234_CLK_DMIC3>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
+ assigned-clock-rates = <3072000>;
+ sound-name-prefix = "DMIC3";
+ status = "disabled";
+ };
+
+ tegra_dmic4: dmic@2904300 {
+ compatible = "nvidia,tegra234-dmic",
+ "nvidia,tegra210-dmic";
+ reg = <0x2904300 0x100>;
+ clocks = <&bpmp TEGRA234_CLK_DMIC4>;
+ clock-names = "dmic";
+ assigned-clocks = <&bpmp TEGRA234_CLK_DMIC4>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
+ assigned-clock-rates = <3072000>;
+ sound-name-prefix = "DMIC4";
+ status = "disabled";
+ };
+
+ tegra_dspk1: dspk@2905000 {
+ compatible = "nvidia,tegra234-dspk",
+ "nvidia,tegra186-dspk";
+ reg = <0x2905000 0x100>;
+ clocks = <&bpmp TEGRA234_CLK_DSPK1>;
+ clock-names = "dspk";
+ assigned-clocks = <&bpmp TEGRA234_CLK_DSPK1>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
+ assigned-clock-rates = <12288000>;
+ sound-name-prefix = "DSPK1";
+ status = "disabled";
+ };
+
+ tegra_dspk2: dspk@2905100 {
+ compatible = "nvidia,tegra234-dspk",
+ "nvidia,tegra186-dspk";
+ reg = <0x2905100 0x100>;
+ clocks = <&bpmp TEGRA234_CLK_DSPK2>;
+ clock-names = "dspk";
+ assigned-clocks = <&bpmp TEGRA234_CLK_DSPK2>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
+ assigned-clock-rates = <12288000>;
+ sound-name-prefix = "DSPK2";
+ status = "disabled";
+ };
+
+ tegra_mvc1: mvc@290a000 {
+ compatible = "nvidia,tegra234-mvc",
+ "nvidia,tegra210-mvc";
+ reg = <0x290a000 0x200>;
+ sound-name-prefix = "MVC1";
+ status = "disabled";
+ };
+
+ tegra_mvc2: mvc@290a200 {
+ compatible = "nvidia,tegra234-mvc",
+ "nvidia,tegra210-mvc";
+ reg = <0x290a200 0x200>;
+ sound-name-prefix = "MVC2";
+ status = "disabled";
+ };
+
+ tegra_amixer: amixer@290bb00 {
+ compatible = "nvidia,tegra234-amixer",
+ "nvidia,tegra210-amixer";
+ reg = <0x290bb00 0x800>;
+ sound-name-prefix = "MIXER1";
+ status = "disabled";
+ };
+
+ tegra_admaif: admaif@290f000 {
+ compatible = "nvidia,tegra234-admaif",
+ "nvidia,tegra186-admaif";
+ reg = <0x0290f000 0x1000>;
+ dmas = <&adma 1>, <&adma 1>,
+ <&adma 2>, <&adma 2>,
+ <&adma 3>, <&adma 3>,
+ <&adma 4>, <&adma 4>,
+ <&adma 5>, <&adma 5>,
+ <&adma 6>, <&adma 6>,
+ <&adma 7>, <&adma 7>,
+ <&adma 8>, <&adma 8>,
+ <&adma 9>, <&adma 9>,
+ <&adma 10>, <&adma 10>,
+ <&adma 11>, <&adma 11>,
+ <&adma 12>, <&adma 12>,
+ <&adma 13>, <&adma 13>,
+ <&adma 14>, <&adma 14>,
+ <&adma 15>, <&adma 15>,
+ <&adma 16>, <&adma 16>,
+ <&adma 17>, <&adma 17>,
+ <&adma 18>, <&adma 18>,
+ <&adma 19>, <&adma 19>,
+ <&adma 20>, <&adma 20>;
+ dma-names = "rx1", "tx1",
+ "rx2", "tx2",
+ "rx3", "tx3",
+ "rx4", "tx4",
+ "rx5", "tx5",
+ "rx6", "tx6",
+ "rx7", "tx7",
+ "rx8", "tx8",
+ "rx9", "tx9",
+ "rx10", "tx10",
+ "rx11", "tx11",
+ "rx12", "tx12",
+ "rx13", "tx13",
+ "rx14", "tx14",
+ "rx15", "tx15",
+ "rx16", "tx16",
+ "rx17", "tx17",
+ "rx18", "tx18",
+ "rx19", "tx19",
+ "rx20", "tx20";
+ status = "disabled";
+ };
+ };
+
+ adma: dma-controller@2930000 {
+ compatible = "nvidia,tegra234-adma",
+ "nvidia,tegra186-adma";
+ reg = <0x02930000 0x20000>;
+ interrupt-parent = <&agic>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ clocks = <&bpmp TEGRA234_CLK_AHUB>;
+ clock-names = "d_audio";
+ status = "disabled";
+ };
+
+ agic: interrupt-controller@2a40000 {
+ compatible = "nvidia,tegra234-agic",
+ "nvidia,tegra210-agic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x02a41000 0x1000>,
+ <0x02a42000 0x2000>;
+ interrupts = <GIC_SPI 145
+ (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&bpmp TEGRA234_CLK_APE>;
+ clock-names = "clk";
+ status = "disabled";
+ };
+ };
+
misc@100000 {
compatible = "nvidia,tegra234-misc";
reg = <0x00100000 0xf000>,
--
2.7.4
^ permalink raw reply related
* [PATCH v2 5/5] arm64: tegra: APE sound card for Jetson AGX Orin
From: Sameer Pujar @ 2022-01-27 7:27 UTC (permalink / raw)
To: broonie, lgirdwood, tiwai, perex, robh+dt, thierry.reding
Cc: jonathanh, mkumard, devicetree, linux-tegra, linux-kernel,
alsa-devel, Sameer Pujar
In-Reply-To: <1643268455-15567-1-git-send-email-spujar@nvidia.com>
Add audio-graph based sound card support on Jetson AGX Orin
platform. The sound card binds following modules:
* I/O interfaces such as I2S and DMIC (to be specific I2S1,
I2S2, I2S4, I2S6 and DMIC3 instances).
* HW accelerators such as MVC, SFC, AMX, ADX and Mixer (all
the available instances).
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
---
.../dts/nvidia/tegra234-p3737-0000+p3701-0000.dts | 1783 ++++++++++++++++++++
arch/arm64/boot/dts/nvidia/tegra234.dtsi | 18 +
2 files changed, 1801 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
index efbbb87..4ae0e9e 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
@@ -13,6 +13,1734 @@
serial0 = &tcu;
};
+ bus@0 {
+ aconnect@2900000 {
+ status = "okay";
+
+ ahub@2900800 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0x0>;
+
+ xbar_admaif0_ep: endpoint {
+ remote-endpoint = <&admaif0_ep>;
+ };
+ };
+
+ port@1 {
+ reg = <0x1>;
+
+ xbar_admaif1_ep: endpoint {
+ remote-endpoint = <&admaif1_ep>;
+ };
+ };
+
+ port@2 {
+ reg = <0x2>;
+
+ xbar_admaif2_ep: endpoint {
+ remote-endpoint = <&admaif2_ep>;
+ };
+ };
+
+ port@3 {
+ reg = <0x3>;
+
+ xbar_admaif3_ep: endpoint {
+ remote-endpoint = <&admaif3_ep>;
+ };
+ };
+
+ port@4 {
+ reg = <0x4>;
+
+ xbar_admaif4_ep: endpoint {
+ remote-endpoint = <&admaif4_ep>;
+ };
+ };
+
+ port@5 {
+ reg = <0x5>;
+
+ xbar_admaif5_ep: endpoint {
+ remote-endpoint = <&admaif5_ep>;
+ };
+ };
+
+ port@6 {
+ reg = <0x6>;
+
+ xbar_admaif6_ep: endpoint {
+ remote-endpoint = <&admaif6_ep>;
+ };
+ };
+
+ port@7 {
+ reg = <0x7>;
+
+ xbar_admaif7_ep: endpoint {
+ remote-endpoint = <&admaif7_ep>;
+ };
+ };
+
+ port@8 {
+ reg = <0x8>;
+
+ xbar_admaif8_ep: endpoint {
+ remote-endpoint = <&admaif8_ep>;
+ };
+ };
+
+ port@9 {
+ reg = <0x9>;
+
+ xbar_admaif9_ep: endpoint {
+ remote-endpoint = <&admaif9_ep>;
+ };
+ };
+
+ port@a {
+ reg = <0xa>;
+
+ xbar_admaif10_ep: endpoint {
+ remote-endpoint = <&admaif10_ep>;
+ };
+ };
+
+ port@b {
+ reg = <0xb>;
+
+ xbar_admaif11_ep: endpoint {
+ remote-endpoint = <&admaif11_ep>;
+ };
+ };
+
+ port@c {
+ reg = <0xc>;
+
+ xbar_admaif12_ep: endpoint {
+ remote-endpoint = <&admaif12_ep>;
+ };
+ };
+
+ port@d {
+ reg = <0xd>;
+
+ xbar_admaif13_ep: endpoint {
+ remote-endpoint = <&admaif13_ep>;
+ };
+ };
+
+ port@e {
+ reg = <0xe>;
+
+ xbar_admaif14_ep: endpoint {
+ remote-endpoint = <&admaif14_ep>;
+ };
+ };
+
+ port@f {
+ reg = <0xf>;
+
+ xbar_admaif15_ep: endpoint {
+ remote-endpoint = <&admaif15_ep>;
+ };
+ };
+
+ port@10 {
+ reg = <0x10>;
+
+ xbar_admaif16_ep: endpoint {
+ remote-endpoint = <&admaif16_ep>;
+ };
+ };
+
+ port@11 {
+ reg = <0x11>;
+
+ xbar_admaif17_ep: endpoint {
+ remote-endpoint = <&admaif17_ep>;
+ };
+ };
+
+ port@12 {
+ reg = <0x12>;
+
+ xbar_admaif18_ep: endpoint {
+ remote-endpoint = <&admaif18_ep>;
+ };
+ };
+
+ port@13 {
+ reg = <0x13>;
+
+ xbar_admaif19_ep: endpoint {
+ remote-endpoint = <&admaif19_ep>;
+ };
+ };
+
+ xbar_i2s1_port: port@14 {
+ reg = <0x14>;
+
+ xbar_i2s1_ep: endpoint {
+ remote-endpoint = <&i2s1_cif_ep>;
+ };
+ };
+
+ xbar_i2s2_port: port@15 {
+ reg = <0x15>;
+
+ xbar_i2s2_ep: endpoint {
+ remote-endpoint = <&i2s2_cif_ep>;
+ };
+ };
+
+ xbar_i2s4_port: port@17 {
+ reg = <0x17>;
+
+ xbar_i2s4_ep: endpoint {
+ remote-endpoint = <&i2s4_cif_ep>;
+ };
+ };
+
+ xbar_i2s6_port: port@19 {
+ reg = <0x19>;
+
+ xbar_i2s6_ep: endpoint {
+ remote-endpoint = <&i2s6_cif_ep>;
+ };
+ };
+
+ xbar_dmic3_port: port@1c {
+ reg = <0x1c>;
+
+ xbar_dmic3_ep: endpoint {
+ remote-endpoint = <&dmic3_cif_ep>;
+ };
+ };
+
+ xbar_sfc1_in_port: port@20 {
+ reg = <0x20>;
+
+ xbar_sfc1_in_ep: endpoint {
+ remote-endpoint = <&sfc1_cif_in_ep>;
+ };
+ };
+
+ port@21 {
+ reg = <0x21>;
+
+ xbar_sfc1_out_ep: endpoint {
+ remote-endpoint = <&sfc1_cif_out_ep>;
+ };
+ };
+
+ xbar_sfc2_in_port: port@22 {
+ reg = <0x22>;
+
+ xbar_sfc2_in_ep: endpoint {
+ remote-endpoint = <&sfc2_cif_in_ep>;
+ };
+ };
+
+ port@23 {
+ reg = <0x23>;
+
+ xbar_sfc2_out_ep: endpoint {
+ remote-endpoint = <&sfc2_cif_out_ep>;
+ };
+ };
+
+ xbar_sfc3_in_port: port@24 {
+ reg = <0x24>;
+
+ xbar_sfc3_in_ep: endpoint {
+ remote-endpoint = <&sfc3_cif_in_ep>;
+ };
+ };
+
+ port@25 {
+ reg = <0x25>;
+
+ xbar_sfc3_out_ep: endpoint {
+ remote-endpoint = <&sfc3_cif_out_ep>;
+ };
+ };
+
+ xbar_sfc4_in_port: port@26 {
+ reg = <0x26>;
+
+ xbar_sfc4_in_ep: endpoint {
+ remote-endpoint = <&sfc4_cif_in_ep>;
+ };
+ };
+
+ port@27 {
+ reg = <0x27>;
+
+ xbar_sfc4_out_ep: endpoint {
+ remote-endpoint = <&sfc4_cif_out_ep>;
+ };
+ };
+
+ xbar_mvc1_in_port: port@28 {
+ reg = <0x28>;
+
+ xbar_mvc1_in_ep: endpoint {
+ remote-endpoint = <&mvc1_cif_in_ep>;
+ };
+ };
+
+ port@29 {
+ reg = <0x29>;
+
+ xbar_mvc1_out_ep: endpoint {
+ remote-endpoint = <&mvc1_cif_out_ep>;
+ };
+ };
+
+ xbar_mvc2_in_port: port@2a {
+ reg = <0x2a>;
+
+ xbar_mvc2_in_ep: endpoint {
+ remote-endpoint = <&mvc2_cif_in_ep>;
+ };
+ };
+
+ port@2b {
+ reg = <0x2b>;
+
+ xbar_mvc2_out_ep: endpoint {
+ remote-endpoint = <&mvc2_cif_out_ep>;
+ };
+ };
+
+ xbar_amx1_in1_port: port@2c {
+ reg = <0x2c>;
+
+ xbar_amx1_in1_ep: endpoint {
+ remote-endpoint = <&amx1_in1_ep>;
+ };
+ };
+
+ xbar_amx1_in2_port: port@2d {
+ reg = <0x2d>;
+
+ xbar_amx1_in2_ep: endpoint {
+ remote-endpoint = <&amx1_in2_ep>;
+ };
+ };
+
+ xbar_amx1_in3_port: port@2e {
+ reg = <0x2e>;
+
+ xbar_amx1_in3_ep: endpoint {
+ remote-endpoint = <&amx1_in3_ep>;
+ };
+ };
+
+ xbar_amx1_in4_port: port@2f {
+ reg = <0x2f>;
+
+ xbar_amx1_in4_ep: endpoint {
+ remote-endpoint = <&amx1_in4_ep>;
+ };
+ };
+
+ port@30 {
+ reg = <0x30>;
+
+ xbar_amx1_out_ep: endpoint {
+ remote-endpoint = <&amx1_out_ep>;
+ };
+ };
+
+ xbar_amx2_in1_port: port@31 {
+ reg = <0x31>;
+
+ xbar_amx2_in1_ep: endpoint {
+ remote-endpoint = <&amx2_in1_ep>;
+ };
+ };
+
+ xbar_amx2_in2_port: port@32 {
+ reg = <0x32>;
+
+ xbar_amx2_in2_ep: endpoint {
+ remote-endpoint = <&amx2_in2_ep>;
+ };
+ };
+
+ xbar_amx2_in3_port: port@33 {
+ reg = <0x33>;
+
+ xbar_amx2_in3_ep: endpoint {
+ remote-endpoint = <&amx2_in3_ep>;
+ };
+ };
+
+ xbar_amx2_in4_port: port@34 {
+ reg = <0x34>;
+
+ xbar_amx2_in4_ep: endpoint {
+ remote-endpoint = <&amx2_in4_ep>;
+ };
+ };
+
+ port@35 {
+ reg = <0x35>;
+
+ xbar_amx2_out_ep: endpoint {
+ remote-endpoint = <&amx2_out_ep>;
+ };
+ };
+
+ xbar_amx3_in1_port: port@36 {
+ reg = <0x36>;
+
+ xbar_amx3_in1_ep: endpoint {
+ remote-endpoint = <&amx3_in1_ep>;
+ };
+ };
+
+ xbar_amx3_in2_port: port@37 {
+ reg = <0x37>;
+
+ xbar_amx3_in2_ep: endpoint {
+ remote-endpoint = <&amx3_in2_ep>;
+ };
+ };
+
+ xbar_amx3_in3_port: port@38 {
+ reg = <0x38>;
+
+ xbar_amx3_in3_ep: endpoint {
+ remote-endpoint = <&amx3_in3_ep>;
+ };
+ };
+
+ xbar_amx3_in4_port: port@39 {
+ reg = <0x39>;
+
+ xbar_amx3_in4_ep: endpoint {
+ remote-endpoint = <&amx3_in4_ep>;
+ };
+ };
+
+ port@3a {
+ reg = <0x3a>;
+
+ xbar_amx3_out_ep: endpoint {
+ remote-endpoint = <&amx3_out_ep>;
+ };
+ };
+
+ xbar_amx4_in1_port: port@3b {
+ reg = <0x3b>;
+
+ xbar_amx4_in1_ep: endpoint {
+ remote-endpoint = <&amx4_in1_ep>;
+ };
+ };
+
+ xbar_amx4_in2_port: port@3c {
+ reg = <0x3c>;
+
+ xbar_amx4_in2_ep: endpoint {
+ remote-endpoint = <&amx4_in2_ep>;
+ };
+ };
+
+ xbar_amx4_in3_port: port@3d {
+ reg = <0x3d>;
+
+ xbar_amx4_in3_ep: endpoint {
+ remote-endpoint = <&amx4_in3_ep>;
+ };
+ };
+
+ xbar_amx4_in4_port: port@3e {
+ reg = <0x3e>;
+
+ xbar_amx4_in4_ep: endpoint {
+ remote-endpoint = <&amx4_in4_ep>;
+ };
+ };
+
+ port@3f {
+ reg = <0x3f>;
+
+ xbar_amx4_out_ep: endpoint {
+ remote-endpoint = <&amx4_out_ep>;
+ };
+ };
+
+ xbar_adx1_in_port: port@40 {
+ reg = <0x40>;
+
+ xbar_adx1_in_ep: endpoint {
+ remote-endpoint = <&adx1_in_ep>;
+ };
+ };
+
+ port@41 {
+ reg = <0x41>;
+
+ xbar_adx1_out1_ep: endpoint {
+ remote-endpoint = <&adx1_out1_ep>;
+ };
+ };
+
+ port@42 {
+ reg = <0x42>;
+
+ xbar_adx1_out2_ep: endpoint {
+ remote-endpoint = <&adx1_out2_ep>;
+ };
+ };
+
+ port@43 {
+ reg = <0x43>;
+
+ xbar_adx1_out3_ep: endpoint {
+ remote-endpoint = <&adx1_out3_ep>;
+ };
+ };
+
+ port@44 {
+ reg = <0x44>;
+
+ xbar_adx1_out4_ep: endpoint {
+ remote-endpoint = <&adx1_out4_ep>;
+ };
+ };
+
+ xbar_adx2_in_port: port@45 {
+ reg = <0x45>;
+
+ xbar_adx2_in_ep: endpoint {
+ remote-endpoint = <&adx2_in_ep>;
+ };
+ };
+
+ port@46 {
+ reg = <0x46>;
+
+ xbar_adx2_out1_ep: endpoint {
+ remote-endpoint = <&adx2_out1_ep>;
+ };
+ };
+
+ port@47 {
+ reg = <0x47>;
+
+ xbar_adx2_out2_ep: endpoint {
+ remote-endpoint = <&adx2_out2_ep>;
+ };
+ };
+
+ port@48 {
+ reg = <0x48>;
+
+ xbar_adx2_out3_ep: endpoint {
+ remote-endpoint = <&adx2_out3_ep>;
+ };
+ };
+
+ port@49 {
+ reg = <0x49>;
+
+ xbar_adx2_out4_ep: endpoint {
+ remote-endpoint = <&adx2_out4_ep>;
+ };
+ };
+
+ xbar_adx3_in_port: port@4a {
+ reg = <0x4a>;
+
+ xbar_adx3_in_ep: endpoint {
+ remote-endpoint = <&adx3_in_ep>;
+ };
+ };
+
+ port@4b {
+ reg = <0x4b>;
+
+ xbar_adx3_out1_ep: endpoint {
+ remote-endpoint = <&adx3_out1_ep>;
+ };
+ };
+
+ port@4c {
+ reg = <0x4c>;
+
+ xbar_adx3_out2_ep: endpoint {
+ remote-endpoint = <&adx3_out2_ep>;
+ };
+ };
+
+ port@4d {
+ reg = <0x4d>;
+
+ xbar_adx3_out3_ep: endpoint {
+ remote-endpoint = <&adx3_out3_ep>;
+ };
+ };
+
+ port@4e {
+ reg = <0x4e>;
+
+ xbar_adx3_out4_ep: endpoint {
+ remote-endpoint = <&adx3_out4_ep>;
+ };
+ };
+
+ xbar_adx4_in_port: port@4f {
+ reg = <0x4f>;
+
+ xbar_adx4_in_ep: endpoint {
+ remote-endpoint = <&adx4_in_ep>;
+ };
+ };
+
+ port@50 {
+ reg = <0x50>;
+
+ xbar_adx4_out1_ep: endpoint {
+ remote-endpoint = <&adx4_out1_ep>;
+ };
+ };
+
+ port@51 {
+ reg = <0x51>;
+
+ xbar_adx4_out2_ep: endpoint {
+ remote-endpoint = <&adx4_out2_ep>;
+ };
+ };
+
+ port@52 {
+ reg = <0x52>;
+
+ xbar_adx4_out3_ep: endpoint {
+ remote-endpoint = <&adx4_out3_ep>;
+ };
+ };
+
+ port@53 {
+ reg = <0x53>;
+
+ xbar_adx4_out4_ep: endpoint {
+ remote-endpoint = <&adx4_out4_ep>;
+ };
+ };
+
+ xbar_mixer_in1_port: port@54 {
+ reg = <0x54>;
+
+ xbar_mixer_in1_ep: endpoint {
+ remote-endpoint = <&mixer_in1_ep>;
+ };
+ };
+
+ xbar_mixer_in2_port: port@55 {
+ reg = <0x55>;
+
+ xbar_mixer_in2_ep: endpoint {
+ remote-endpoint = <&mixer_in2_ep>;
+ };
+ };
+
+ xbar_mixer_in3_port: port@56 {
+ reg = <0x56>;
+
+ xbar_mixer_in3_ep: endpoint {
+ remote-endpoint = <&mixer_in3_ep>;
+ };
+ };
+
+ xbar_mixer_in4_port: port@57 {
+ reg = <0x57>;
+
+ xbar_mixer_in4_ep: endpoint {
+ remote-endpoint = <&mixer_in4_ep>;
+ };
+ };
+
+ xbar_mixer_in5_port: port@58 {
+ reg = <0x58>;
+
+ xbar_mixer_in5_ep: endpoint {
+ remote-endpoint = <&mixer_in5_ep>;
+ };
+ };
+
+ xbar_mixer_in6_port: port@59 {
+ reg = <0x59>;
+
+ xbar_mixer_in6_ep: endpoint {
+ remote-endpoint = <&mixer_in6_ep>;
+ };
+ };
+
+ xbar_mixer_in7_port: port@5a {
+ reg = <0x5a>;
+
+ xbar_mixer_in7_ep: endpoint {
+ remote-endpoint = <&mixer_in7_ep>;
+ };
+ };
+
+ xbar_mixer_in8_port: port@5b {
+ reg = <0x5b>;
+
+ xbar_mixer_in8_ep: endpoint {
+ remote-endpoint = <&mixer_in8_ep>;
+ };
+ };
+
+ xbar_mixer_in9_port: port@5c {
+ reg = <0x5c>;
+
+ xbar_mixer_in9_ep: endpoint {
+ remote-endpoint = <&mixer_in9_ep>;
+ };
+ };
+
+ xbar_mixer_in10_port: port@5d {
+ reg = <0x5d>;
+
+ xbar_mixer_in10_ep: endpoint {
+ remote-endpoint = <&mixer_in10_ep>;
+ };
+ };
+
+ port@5e {
+ reg = <0x5e>;
+
+ xbar_mixer_out1_ep: endpoint {
+ remote-endpoint = <&mixer_out1_ep>;
+ };
+ };
+
+ port@5f {
+ reg = <0x5f>;
+
+ xbar_mixer_out2_ep: endpoint {
+ remote-endpoint = <&mixer_out2_ep>;
+ };
+ };
+
+ port@60 {
+ reg = <0x60>;
+
+ xbar_mixer_out3_ep: endpoint {
+ remote-endpoint = <&mixer_out3_ep>;
+ };
+ };
+
+ port@61 {
+ reg = <0x61>;
+
+ xbar_mixer_out4_ep: endpoint {
+ remote-endpoint = <&mixer_out4_ep>;
+ };
+ };
+
+ port@62 {
+ reg = <0x62>;
+
+ xbar_mixer_out5_ep: endpoint {
+ remote-endpoint = <&mixer_out5_ep>;
+ };
+ };
+ };
+
+ i2s@2901000 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ i2s1_cif_ep: endpoint {
+ remote-endpoint = <&xbar_i2s1_ep>;
+ };
+ };
+
+ i2s1_port: port@1 {
+ reg = <1>;
+
+ i2s1_dap_ep: endpoint {
+ dai-format = "i2s";
+ /* Place holder for external Codec */
+ };
+ };
+ };
+ };
+
+ i2s@2901100 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ i2s2_cif_ep: endpoint {
+ remote-endpoint = <&xbar_i2s2_ep>;
+ };
+ };
+
+ i2s2_port: port@1 {
+ reg = <1>;
+
+ i2s2_dap_ep: endpoint {
+ dai-format = "i2s";
+ /* Place holder for external Codec */
+ };
+ };
+ };
+ };
+
+ i2s@2901300 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ i2s4_cif_ep: endpoint {
+ remote-endpoint = <&xbar_i2s4_ep>;
+ };
+ };
+
+ i2s4_port: port@1 {
+ reg = <1>;
+
+ i2s4_dap_ep: endpoint {
+ dai-format = "i2s";
+ /* Place holder for external Codec */
+ };
+ };
+ };
+ };
+
+ i2s@2901500 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ i2s6_cif_ep: endpoint {
+ remote-endpoint = <&xbar_i2s6_ep>;
+ };
+ };
+
+ i2s6_port: port@1 {
+ reg = <1>;
+
+ i2s6_dap_ep: endpoint {
+ dai-format = "i2s";
+ /* Place holder for external Codec */
+ };
+ };
+ };
+ };
+
+ sfc@2902000 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ sfc1_cif_in_ep: endpoint {
+ remote-endpoint = <&xbar_sfc1_in_ep>;
+ };
+ };
+
+ sfc1_out_port: port@1 {
+ reg = <1>;
+
+ sfc1_cif_out_ep: endpoint {
+ remote-endpoint = <&xbar_sfc1_out_ep>;
+ };
+ };
+ };
+ };
+
+ sfc@2902200 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ sfc2_cif_in_ep: endpoint {
+ remote-endpoint = <&xbar_sfc2_in_ep>;
+ };
+ };
+
+ sfc2_out_port: port@1 {
+ reg = <1>;
+
+ sfc2_cif_out_ep: endpoint {
+ remote-endpoint = <&xbar_sfc2_out_ep>;
+ };
+ };
+ };
+ };
+
+ sfc@2902400 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ sfc3_cif_in_ep: endpoint {
+ remote-endpoint = <&xbar_sfc3_in_ep>;
+ };
+ };
+
+ sfc3_out_port: port@1 {
+ reg = <1>;
+
+ sfc3_cif_out_ep: endpoint {
+ remote-endpoint = <&xbar_sfc3_out_ep>;
+ };
+ };
+ };
+ };
+
+ sfc@2902600 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ sfc4_cif_in_ep: endpoint {
+ remote-endpoint = <&xbar_sfc4_in_ep>;
+ };
+ };
+
+ sfc4_out_port: port@1 {
+ reg = <1>;
+
+ sfc4_cif_out_ep: endpoint {
+ remote-endpoint = <&xbar_sfc4_out_ep>;
+ };
+ };
+ };
+ };
+
+ amx@2903000 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ amx1_in1_ep: endpoint {
+ remote-endpoint = <&xbar_amx1_in1_ep>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ amx1_in2_ep: endpoint {
+ remote-endpoint = <&xbar_amx1_in2_ep>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ amx1_in3_ep: endpoint {
+ remote-endpoint = <&xbar_amx1_in3_ep>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+
+ amx1_in4_ep: endpoint {
+ remote-endpoint = <&xbar_amx1_in4_ep>;
+ };
+ };
+
+ amx1_out_port: port@4 {
+ reg = <4>;
+
+ amx1_out_ep: endpoint {
+ remote-endpoint = <&xbar_amx1_out_ep>;
+ };
+ };
+ };
+ };
+
+ amx@2903100 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ amx2_in1_ep: endpoint {
+ remote-endpoint = <&xbar_amx2_in1_ep>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ amx2_in2_ep: endpoint {
+ remote-endpoint = <&xbar_amx2_in2_ep>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ amx2_in3_ep: endpoint {
+ remote-endpoint = <&xbar_amx2_in3_ep>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+
+ amx2_in4_ep: endpoint {
+ remote-endpoint = <&xbar_amx2_in4_ep>;
+ };
+ };
+
+ amx2_out_port: port@4 {
+ reg = <4>;
+
+ amx2_out_ep: endpoint {
+ remote-endpoint = <&xbar_amx2_out_ep>;
+ };
+ };
+ };
+ };
+
+ amx@2903200 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ amx3_in1_ep: endpoint {
+ remote-endpoint = <&xbar_amx3_in1_ep>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ amx3_in2_ep: endpoint {
+ remote-endpoint = <&xbar_amx3_in2_ep>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ amx3_in3_ep: endpoint {
+ remote-endpoint = <&xbar_amx3_in3_ep>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+
+ amx3_in4_ep: endpoint {
+ remote-endpoint = <&xbar_amx3_in4_ep>;
+ };
+ };
+
+ amx3_out_port: port@4 {
+ reg = <4>;
+
+ amx3_out_ep: endpoint {
+ remote-endpoint = <&xbar_amx3_out_ep>;
+ };
+ };
+ };
+ };
+
+ amx@2903300 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ amx4_in1_ep: endpoint {
+ remote-endpoint = <&xbar_amx4_in1_ep>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ amx4_in2_ep: endpoint {
+ remote-endpoint = <&xbar_amx4_in2_ep>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ amx4_in3_ep: endpoint {
+ remote-endpoint = <&xbar_amx4_in3_ep>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+
+ amx4_in4_ep: endpoint {
+ remote-endpoint = <&xbar_amx4_in4_ep>;
+ };
+ };
+
+ amx4_out_port: port@4 {
+ reg = <4>;
+
+ amx4_out_ep: endpoint {
+ remote-endpoint = <&xbar_amx4_out_ep>;
+ };
+ };
+ };
+ };
+
+ adx@2903800 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ adx1_in_ep: endpoint {
+ remote-endpoint = <&xbar_adx1_in_ep>;
+ };
+ };
+
+ adx1_out1_port: port@1 {
+ reg = <1>;
+
+ adx1_out1_ep: endpoint {
+ remote-endpoint = <&xbar_adx1_out1_ep>;
+ };
+ };
+
+ adx1_out2_port: port@2 {
+ reg = <2>;
+
+ adx1_out2_ep: endpoint {
+ remote-endpoint = <&xbar_adx1_out2_ep>;
+ };
+ };
+
+ adx1_out3_port: port@3 {
+ reg = <3>;
+
+ adx1_out3_ep: endpoint {
+ remote-endpoint = <&xbar_adx1_out3_ep>;
+ };
+ };
+
+ adx1_out4_port: port@4 {
+ reg = <4>;
+
+ adx1_out4_ep: endpoint {
+ remote-endpoint = <&xbar_adx1_out4_ep>;
+ };
+ };
+ };
+ };
+
+ adx@2903900 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ adx2_in_ep: endpoint {
+ remote-endpoint = <&xbar_adx2_in_ep>;
+ };
+ };
+
+ adx2_out1_port: port@1 {
+ reg = <1>;
+
+ adx2_out1_ep: endpoint {
+ remote-endpoint = <&xbar_adx2_out1_ep>;
+ };
+ };
+
+ adx2_out2_port: port@2 {
+ reg = <2>;
+
+ adx2_out2_ep: endpoint {
+ remote-endpoint = <&xbar_adx2_out2_ep>;
+ };
+ };
+
+ adx2_out3_port: port@3 {
+ reg = <3>;
+
+ adx2_out3_ep: endpoint {
+ remote-endpoint = <&xbar_adx2_out3_ep>;
+ };
+ };
+
+ adx2_out4_port: port@4 {
+ reg = <4>;
+
+ adx2_out4_ep: endpoint {
+ remote-endpoint = <&xbar_adx2_out4_ep>;
+ };
+ };
+ };
+ };
+
+ adx@2903a00 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ adx3_in_ep: endpoint {
+ remote-endpoint = <&xbar_adx3_in_ep>;
+ };
+ };
+
+ adx3_out1_port: port@1 {
+ reg = <1>;
+
+ adx3_out1_ep: endpoint {
+ remote-endpoint = <&xbar_adx3_out1_ep>;
+ };
+ };
+
+ adx3_out2_port: port@2 {
+ reg = <2>;
+
+ adx3_out2_ep: endpoint {
+ remote-endpoint = <&xbar_adx3_out2_ep>;
+ };
+ };
+
+ adx3_out3_port: port@3 {
+ reg = <3>;
+
+ adx3_out3_ep: endpoint {
+ remote-endpoint = <&xbar_adx3_out3_ep>;
+ };
+ };
+
+ adx3_out4_port: port@4 {
+ reg = <4>;
+
+ adx3_out4_ep: endpoint {
+ remote-endpoint = <&xbar_adx3_out4_ep>;
+ };
+ };
+ };
+ };
+
+ adx@2903b00 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ adx4_in_ep: endpoint {
+ remote-endpoint = <&xbar_adx4_in_ep>;
+ };
+ };
+
+ adx4_out1_port: port@1 {
+ reg = <1>;
+
+ adx4_out1_ep: endpoint {
+ remote-endpoint = <&xbar_adx4_out1_ep>;
+ };
+ };
+
+ adx4_out2_port: port@2 {
+ reg = <2>;
+
+ adx4_out2_ep: endpoint {
+ remote-endpoint = <&xbar_adx4_out2_ep>;
+ };
+ };
+
+ adx4_out3_port: port@3 {
+ reg = <3>;
+
+ adx4_out3_ep: endpoint {
+ remote-endpoint = <&xbar_adx4_out3_ep>;
+ };
+ };
+
+ adx4_out4_port: port@4 {
+ reg = <4>;
+
+ adx4_out4_ep: endpoint {
+ remote-endpoint = <&xbar_adx4_out4_ep>;
+ };
+ };
+ };
+ };
+
+ dmic@2904200 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ dmic3_cif_ep: endpoint {
+ remote-endpoint = <&xbar_dmic3_ep>;
+ };
+ };
+
+ dmic3_port: port@1 {
+ reg = <1>;
+
+ dmic3_dap_ep: endpoint {
+ /* Place holder for external Codec */
+ };
+ };
+ };
+ };
+
+ mvc@290a000 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ mvc1_cif_in_ep: endpoint {
+ remote-endpoint = <&xbar_mvc1_in_ep>;
+ };
+ };
+
+ mvc1_out_port: port@1 {
+ reg = <1>;
+
+ mvc1_cif_out_ep: endpoint {
+ remote-endpoint = <&xbar_mvc1_out_ep>;
+ };
+ };
+ };
+ };
+
+ mvc@290a200 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ mvc2_cif_in_ep: endpoint {
+ remote-endpoint = <&xbar_mvc2_in_ep>;
+ };
+ };
+
+ mvc2_out_port: port@1 {
+ reg = <1>;
+
+ mvc2_cif_out_ep: endpoint {
+ remote-endpoint = <&xbar_mvc2_out_ep>;
+ };
+ };
+ };
+ };
+
+ amixer@290bb00 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0x0>;
+
+ mixer_in1_ep: endpoint {
+ remote-endpoint = <&xbar_mixer_in1_ep>;
+ };
+ };
+
+ port@1 {
+ reg = <0x1>;
+
+ mixer_in2_ep: endpoint {
+ remote-endpoint = <&xbar_mixer_in2_ep>;
+ };
+ };
+
+ port@2 {
+ reg = <0x2>;
+
+ mixer_in3_ep: endpoint {
+ remote-endpoint = <&xbar_mixer_in3_ep>;
+ };
+ };
+
+ port@3 {
+ reg = <0x3>;
+
+ mixer_in4_ep: endpoint {
+ remote-endpoint = <&xbar_mixer_in4_ep>;
+ };
+ };
+
+ port@4 {
+ reg = <0x4>;
+
+ mixer_in5_ep: endpoint {
+ remote-endpoint = <&xbar_mixer_in5_ep>;
+ };
+ };
+
+ port@5 {
+ reg = <0x5>;
+
+ mixer_in6_ep: endpoint {
+ remote-endpoint = <&xbar_mixer_in6_ep>;
+ };
+ };
+
+ port@6 {
+ reg = <0x6>;
+
+ mixer_in7_ep: endpoint {
+ remote-endpoint = <&xbar_mixer_in7_ep>;
+ };
+ };
+
+ port@7 {
+ reg = <0x7>;
+
+ mixer_in8_ep: endpoint {
+ remote-endpoint = <&xbar_mixer_in8_ep>;
+ };
+ };
+
+ port@8 {
+ reg = <0x8>;
+
+ mixer_in9_ep: endpoint {
+ remote-endpoint = <&xbar_mixer_in9_ep>;
+ };
+ };
+
+ port@9 {
+ reg = <0x9>;
+
+ mixer_in10_ep: endpoint {
+ remote-endpoint = <&xbar_mixer_in10_ep>;
+ };
+ };
+
+ mixer_out1_port: port@a {
+ reg = <0xa>;
+
+ mixer_out1_ep: endpoint {
+ remote-endpoint = <&xbar_mixer_out1_ep>;
+ };
+ };
+
+ mixer_out2_port: port@b {
+ reg = <0xb>;
+
+ mixer_out2_ep: endpoint {
+ remote-endpoint = <&xbar_mixer_out2_ep>;
+ };
+ };
+
+ mixer_out3_port: port@c {
+ reg = <0xc>;
+
+ mixer_out3_ep: endpoint {
+ remote-endpoint = <&xbar_mixer_out3_ep>;
+ };
+ };
+
+ mixer_out4_port: port@d {
+ reg = <0xd>;
+
+ mixer_out4_ep: endpoint {
+ remote-endpoint = <&xbar_mixer_out4_ep>;
+ };
+ };
+
+ mixer_out5_port: port@e {
+ reg = <0xe>;
+
+ mixer_out5_ep: endpoint {
+ remote-endpoint = <&xbar_mixer_out5_ep>;
+ };
+ };
+ };
+ };
+
+ admaif@290f000 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ admaif0_port: port@0 {
+ reg = <0x0>;
+
+ admaif0_ep: endpoint {
+ remote-endpoint = <&xbar_admaif0_ep>;
+ };
+ };
+
+ admaif1_port: port@1 {
+ reg = <0x1>;
+
+ admaif1_ep: endpoint {
+ remote-endpoint = <&xbar_admaif1_ep>;
+ };
+ };
+
+ admaif2_port: port@2 {
+ reg = <0x2>;
+
+ admaif2_ep: endpoint {
+ remote-endpoint = <&xbar_admaif2_ep>;
+ };
+ };
+
+ admaif3_port: port@3 {
+ reg = <0x3>;
+
+ admaif3_ep: endpoint {
+ remote-endpoint = <&xbar_admaif3_ep>;
+ };
+ };
+
+ admaif4_port: port@4 {
+ reg = <0x4>;
+
+ admaif4_ep: endpoint {
+ remote-endpoint = <&xbar_admaif4_ep>;
+ };
+ };
+
+ admaif5_port: port@5 {
+ reg = <0x5>;
+
+ admaif5_ep: endpoint {
+ remote-endpoint = <&xbar_admaif5_ep>;
+ };
+ };
+
+ admaif6_port: port@6 {
+ reg = <0x6>;
+
+ admaif6_ep: endpoint {
+ remote-endpoint = <&xbar_admaif6_ep>;
+ };
+ };
+
+ admaif7_port: port@7 {
+ reg = <0x7>;
+
+ admaif7_ep: endpoint {
+ remote-endpoint = <&xbar_admaif7_ep>;
+ };
+ };
+
+ admaif8_port: port@8 {
+ reg = <0x8>;
+
+ admaif8_ep: endpoint {
+ remote-endpoint = <&xbar_admaif8_ep>;
+ };
+ };
+
+ admaif9_port: port@9 {
+ reg = <0x9>;
+
+ admaif9_ep: endpoint {
+ remote-endpoint = <&xbar_admaif9_ep>;
+ };
+ };
+
+ admaif10_port: port@a {
+ reg = <0xa>;
+
+ admaif10_ep: endpoint {
+ remote-endpoint = <&xbar_admaif10_ep>;
+ };
+ };
+
+ admaif11_port: port@b {
+ reg = <0xb>;
+
+ admaif11_ep: endpoint {
+ remote-endpoint = <&xbar_admaif11_ep>;
+ };
+ };
+
+ admaif12_port: port@c {
+ reg = <0xc>;
+
+ admaif12_ep: endpoint {
+ remote-endpoint = <&xbar_admaif12_ep>;
+ };
+ };
+
+ admaif13_port: port@d {
+ reg = <0xd>;
+
+ admaif13_ep: endpoint {
+ remote-endpoint = <&xbar_admaif13_ep>;
+ };
+ };
+
+ admaif14_port: port@e {
+ reg = <0xe>;
+
+ admaif14_ep: endpoint {
+ remote-endpoint = <&xbar_admaif14_ep>;
+ };
+ };
+
+ admaif15_port: port@f {
+ reg = <0xf>;
+
+ admaif15_ep: endpoint {
+ remote-endpoint = <&xbar_admaif15_ep>;
+ };
+ };
+
+ admaif16_port: port@10 {
+ reg = <0x10>;
+
+ admaif16_ep: endpoint {
+ remote-endpoint = <&xbar_admaif16_ep>;
+ };
+ };
+
+ admaif17_port: port@11 {
+ reg = <0x11>;
+
+ admaif17_ep: endpoint {
+ remote-endpoint = <&xbar_admaif17_ep>;
+ };
+ };
+
+ admaif18_port: port@12 {
+ reg = <0x12>;
+
+ admaif18_ep: endpoint {
+ remote-endpoint = <&xbar_admaif18_ep>;
+ };
+ };
+
+ admaif19_port: port@13 {
+ reg = <0x13>;
+
+ admaif19_ep: endpoint {
+ remote-endpoint = <&xbar_admaif19_ep>;
+ };
+ };
+ };
+ };
+ };
+
+ dma-controller@2930000 {
+ status = "okay";
+ };
+
+ interrupt-controller@2a40000 {
+ status = "okay";
+ };
+ };
+ };
+
chosen {
bootargs = "console=ttyS0,115200n8";
stdout-path = "serial0:115200n8";
@@ -21,4 +1749,59 @@
serial {
status = "okay";
};
+
+ sound {
+ status = "okay";
+
+ compatible = "nvidia,tegra186-audio-graph-card";
+
+ dais = /* ADMAIF (FE) Ports */
+ <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
+ <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>,
+ <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>,
+ <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
+ <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>,
+ /* XBAR Ports */
+ <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s4_port>,
+ <&xbar_i2s6_port>, <&xbar_dmic3_port>,
+ <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
+ <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,
+ <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,
+ <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
+ <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
+ <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
+ <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
+ <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
+ <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
+ <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
+ <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,
+ <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
+ <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,
+ <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
+ <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
+ <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
+ <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
+ <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,
+ /* HW accelerators */
+ <&sfc1_out_port>, <&sfc2_out_port>,
+ <&sfc3_out_port>, <&sfc4_out_port>,
+ <&mvc1_out_port>, <&mvc2_out_port>,
+ <&amx1_out_port>, <&amx2_out_port>,
+ <&amx3_out_port>, <&amx4_out_port>,
+ <&adx1_out1_port>, <&adx1_out2_port>,
+ <&adx1_out3_port>, <&adx1_out4_port>,
+ <&adx2_out1_port>, <&adx2_out2_port>,
+ <&adx2_out3_port>, <&adx2_out4_port>,
+ <&adx3_out1_port>, <&adx3_out2_port>,
+ <&adx3_out3_port>, <&adx3_out4_port>,
+ <&adx4_out1_port>, <&adx4_out2_port>,
+ <&adx4_out3_port>, <&adx4_out4_port>,
+ <&mixer_out1_port>, <&mixer_out2_port>, <&mixer_out3_port>,
+ <&mixer_out4_port>, <&mixer_out5_port>,
+ /* BE I/O Ports */
+ <&i2s1_port>, <&i2s2_port>, <&i2s4_port>, <&i2s6_port>,
+ <&dmic3_port>;
+
+ label = "NVIDIA Jetson AGX Orin APE";
+ };
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index aad7fd5..272a0c0 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -1106,6 +1106,24 @@
status = "disabled";
};
+ sound {
+ status = "disabled";
+
+ clocks = <&bpmp TEGRA234_CLK_PLLA>,
+ <&bpmp TEGRA234_CLK_PLLA_OUT0>;
+ clock-names = "pll_a", "plla_out0";
+ assigned-clocks = <&bpmp TEGRA234_CLK_PLLA>,
+ <&bpmp TEGRA234_CLK_PLLA_OUT0>,
+ <&bpmp TEGRA234_CLK_AUD_MCLK>;
+ assigned-clock-parents = <0>,
+ <&bpmp TEGRA234_CLK_PLLA>,
+ <&bpmp TEGRA234_CLK_PLLA_OUT0>;
+ interconnects = <&mc TEGRA234_MEMORY_CLIENT_APER &emc>,
+ <&mc TEGRA234_MEMORY_CLIENT_APEW &emc>;
+ interconnect-names = "dma-mem", "write";
+ iommus = <&smmu_niso0 TEGRA234_SID_APE>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
--
2.7.4
^ permalink raw reply related
* Re: [PATCH] ASoC: dt-bindings: Centralize the 'sound-dai' definition
From: Krzysztof Kozlowski @ 2022-01-27 7:28 UTC (permalink / raw)
To: Rob Herring, Jerome Brunet, Liam Girdwood, Mark Brown, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, Andy Gross, Bjorn Andersson, Sylwester Nawrocki,
Rohit kumar, Cheng-Yi Chiang, Shengjiu Wang, Srinivas Kandagatla,
Jonathan Bakker
Cc: Krzysztof Kozlowski, alsa-devel, devicetree, linux-kernel,
linux-arm-kernel, linux-arm-msm
In-Reply-To: <20220126231427.1638089-1-robh@kernel.org>
On 27/01/2022 00:14, Rob Herring wrote:
> 'sound-dai' is a common property, but has duplicate type definitions.
> Create a new common definition to define the type and then update all
> the other occurrences to just define how many entries there are just
> like other phandle+arg properties.
>
> The constraints on the number of entries is based on the examples and
> could be wrong.
>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> Signed-off-by: Rob Herring <robh@kernel.org>
> ---
> Please ack, this depends on commit abf0fee97313 ("dt-bindings: Improve
> phandle-array schemas") in my tree.
> ---
> .../bindings/sound/amlogic,gx-sound-card.yaml | 4 ++--
> .../bindings/sound/google,sc7180-trogdor.yaml | 6 ++++--
> .../bindings/sound/imx-audio-card.yaml | 7 +++++--
> .../bindings/sound/qcom,sm8250.yaml | 10 +++++++---
> .../bindings/sound/samsung,aries-wm8994.yaml | 5 +----
> .../bindings/sound/samsung,midas-audio.yaml | 2 --
> .../bindings/sound/samsung,odroid.yaml | 9 +++------
> .../devicetree/bindings/sound/sound-dai.yaml | 20 +++++++++++++++++++
> 8 files changed, 42 insertions(+), 21 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/sound/sound-dai.yaml
>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v4 1/3] riscv: dts: Add dma-channels property in dma node
From: Zong Li @ 2022-01-27 7:35 UTC (permalink / raw)
To: Vinod Koul
Cc: Rob Herring, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven, Bin Meng,
Green Wan, dmaengine,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
linux-kernel@vger.kernel.org List, linux-riscv
In-Reply-To: <YfJD11wlgkzuE+Sp@matsya>
On Thu, Jan 27, 2022 at 3:03 PM Vinod Koul <vkoul@kernel.org> wrote:
>
> On 17-01-22, 09:35, Zong Li wrote:
> > Add dma-channels property, then we can determine how many channels there
> > by device tree.
> >
> > Signed-off-by: Zong Li <zong.li@sifive.com>
> > ---
> > arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 1 +
> > arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 1 +
> > 2 files changed, 2 insertions(+)
> >
> > diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> > index c9f6d205d2ba..3c48f2d7a4a4 100644
> > --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> > @@ -188,6 +188,7 @@ dma@3000000 {
>
> Unrelated but the node name should be dma-controller@...
>
Thanks for the correction, I guess we could give another patch for
changing the node name.
> > reg = <0x0 0x3000000 0x0 0x8000>;
> > interrupt-parent = <&plic>;
> > interrupts = <23 24 25 26 27 28 29 30>;
> > + dma-channels = <4>;
> > #dma-cells = <1>;
> > };
> >
> > diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
> > index 0655b5c4201d..2bdfe7f06e4b 100644
> > --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
> > +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
> > @@ -171,6 +171,7 @@ dma: dma@3000000 {
> > reg = <0x0 0x3000000 0x0 0x8000>;
> > interrupt-parent = <&plic0>;
> > interrupts = <23 24 25 26 27 28 29 30>;
> > + dma-channels = <4>;
> > #dma-cells = <1>;
> > };
> > uart1: serial@10011000 {
> > --
> > 2.31.1
>
> --
> ~Vinod
^ permalink raw reply
* Re: [PATCH 6/8] dt-bindings: vendor-prefixes: add LG Electronics
From: Krzysztof Kozlowski @ 2022-01-27 7:45 UTC (permalink / raw)
To: Petr Vorel, Luca Weiss, linux-arm-msm, Rob Herring
Cc: Shawn Guo, Oleksij Rempel, Sam Ravnborg, Linus Walleij,
Daniel Palmer, Max Merchel, Hao Fang, devicetree, linux-kernel,
Jean THOMAS
In-Reply-To: <YfHlV13Zi4KV+bNT@pevik>
On 27/01/2022 01:20, Petr Vorel wrote:
> Hi all,
>
>>> Hi Krzysztof,
>
>>> On Montag, 13. September 2021 10:49:43 CEST Krzysztof Kozlowski wrote:
>>>> On 12/09/2021 01:27, Luca Weiss wrote:
>>>>> LG Electronics is a part of the LG Corporation and produces, amongst
>>>>> other things, consumer electronics such as phones and smartwatches.
>
>>>> Hi,
>
>>>> Thanks for the patches.
>
>>>> I think "lge" it's the same prefix as "lg". There is no sense in having
>>>> multiple vendor prefixes just because company splits inside business
>>>> units or subsidiaries. The same as with other conglomerates, e.g.
>>>> Samsung - if we wanted to be specific, there will be 4-5 Samsung
>>>> vendors... Not mentioning that company organisation is not always
>>>> disclosed and can change.
>
>
>>> I was mostly following qcom-msm8974-lge-nexus5-hammerhead as it's the other LG
>>> device tree I am aware of so I've picked lge instead of lg. Also worth noting
>>> that Google uses "LGE" in the Android device tree[1] or in the model name in
>>> the LG G Watch R kernel sources ("LGE APQ 8026v2 LENOK rev-1.0")
>
>> [1] Does not point to kernel tree. Downstream user could be a good
>> argument to switch to lge, but then I would expect correcting other "lg"
>> devices which are in fact made by LGE.
>
>
>>> I don't have a strong opinion either way so I'm fine with either.
>
>>> If we decide to go with "lg" do we want to change the Nexus 5 devicetree
>>> (hammerhead) also, that one has the lge name in at least compatible and
>>> filename (I don't know how much of a breaking change that would be considered
>>> as).
>
>> We would have to add a new one and mark the old compatible as deprecated.
>
> Have we sorted this lg- vs. lge- ?
>
> There are both:
> arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
> vs
> arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
>
Probably renaming/unifying/correcting prefix in existing compatibles is
not worth the effort. This would make a mess and affect other DTS users.
Most of existing usages of "lg" prefix are panels which are coming from
another subsidiary of LG - LG Display. We all use there "lg" prefix, not
"lgd".
Plus mention before Bullhead mobile phone which is coming from LG
Electronics.
If we use generalized "lg" prefix for one subsidiary (LG Display), then
let's do the same for another subsidiary - LG Electronics. Plus entire
branding of LG Electronics products is LG: the website, the logo,
advertisements. Everywhere except legal footer.
I vote for using "lg" for both subsidiaries: LG Display and LG Electronics.
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH] dt-bindings: vendor-prefixes: clarify HP prefix
From: Krzysztof Kozlowski @ 2022-01-27 7:52 UTC (permalink / raw)
To: Rob Herring, devicetree, linux-kernel
Cc: Krzysztof Kozlowski, nick.hawkins, verdun
There are two independent companies: "HP Inc." and "Hewlett Packard
Enterprise". Clarify that "hp" prefix is about the first one.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
Cc: nick.hawkins@hpe.com
Cc: verdun@hpe.com
Optionally please squash it with a new patch adding "hpe" prefix.
See: https://lore.kernel.org/all/20220125194609.32314-1-nick.hawkins@hpe.com/
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 0d8da47cda1a..05a059c8a011 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -518,7 +518,7 @@ patternProperties:
"^hoperun,.*":
description: Jiangsu HopeRun Software Co., Ltd.
"^hp,.*":
- description: Hewlett Packard
+ description: Hewlett Packard Inc.
"^hsg,.*":
description: HannStar Display Co.
"^holtek,.*":
--
2.32.0
^ permalink raw reply related
* Re: [PATCH net-next v3 2/3] net: macb: Added ZynqMP-specific initialization
From: Claudiu.Beznea @ 2022-01-27 8:39 UTC (permalink / raw)
To: robert.hancock, netdev
Cc: davem, kuba, robh+dt, michal.simek, Nicolas.Ferre, devicetree
In-Reply-To: <20220127002711.3632101-3-robert.hancock@calian.com>
Hi Robert,
On 27.01.2022 02:27, Robert Hancock wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> The GEM controllers on ZynqMP were missing some initialization steps which
> are required in some cases when using SGMII mode, which uses the PS-GTR
> transceivers managed by the phy-zynqmp driver.
>
> The GEM core appears to need a hardware-level reset in order to work
> properly in SGMII mode in cases where the GT reference clock was not
> present at initial power-on. This can be done using a reset mapped to
> the zynqmp-reset driver in the device tree.
>
> Also, when in SGMII mode, the GEM driver needs to ensure the PHY is
> initialized and powered on.
>
> Signed-off-by: Robert Hancock <robert.hancock@calian.com>
> ---
> drivers/net/ethernet/cadence/macb.h | 5 +++
> drivers/net/ethernet/cadence/macb_main.c | 53 +++++++++++++++++++++++-
> 2 files changed, 56 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
> index 9ddbee7de72b..584336b7cdaf 100644
> --- a/drivers/net/ethernet/cadence/macb.h
> +++ b/drivers/net/ethernet/cadence/macb.h
> @@ -12,6 +12,7 @@
> #include <linux/ptp_clock_kernel.h>
> #include <linux/net_tstamp.h>
> #include <linux/interrupt.h>
> +#include <linux/phy/phy.h>
>
> #if defined(CONFIG_ARCH_DMA_ADDR_T_64BIT) || defined(CONFIG_MACB_USE_HWSTAMP)
> #define MACB_EXT_DESC
> @@ -1291,6 +1292,9 @@ struct macb {
> u32 wol;
>
> struct macb_ptp_info *ptp_info; /* macb-ptp interface */
> +
> + struct phy *sgmii_phy; /* for ZynqMP SGMII mode */
You have spaces b/w "*sgmii_phy;" and "/* for ZynqMP SGMII mode */"
> +
> #ifdef MACB_EXT_DESC
> uint8_t hw_dma_cap;
> #endif
> @@ -1315,6 +1319,7 @@ struct macb {
>
> struct macb_pm_data pm_data;
> const struct macb_usrio_config *usrio;
> +
You have an extra line here.
> };
>
> #ifdef CONFIG_MACB_USE_HWSTAMP
> diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
> index a363da928e8b..4787196e0980 100644
> --- a/drivers/net/ethernet/cadence/macb_main.c
> +++ b/drivers/net/ethernet/cadence/macb_main.c
> @@ -34,7 +34,9 @@
> #include <linux/udp.h>
> #include <linux/tcp.h>
> #include <linux/iopoll.h>
> +#include <linux/phy/phy.h>
> #include <linux/pm_runtime.h>
> +#include <linux/reset.h>
> #include "macb.h"
>
> /* This structure is only used for MACB on SiFive FU540 devices */
> @@ -2739,6 +2741,10 @@ static int macb_open(struct net_device *dev)
>
> macb_init_hw(bp);
>
> + err = phy_power_on(bp->sgmii_phy);
> + if (err)
> + goto reset_hw;
> +
> err = macb_phylink_connect(bp);
> if (err)
> goto reset_hw;
This one should phy_power_off() before resetting the hardware.
> @@ -2775,6 +2781,8 @@ static int macb_close(struct net_device *dev)
> phylink_stop(bp->phylink);
> phylink_disconnect_phy(bp->phylink);
>
> + phy_power_off(bp->sgmii_phy);
> +
> spin_lock_irqsave(&bp->lock, flags);
> macb_reset_hw(bp);
> netif_carrier_off(dev);
> @@ -4544,13 +4552,50 @@ static const struct macb_config np4_config = {
> .usrio = &macb_default_usrio,
> };
>
> +static int zynqmp_init(struct platform_device *pdev)
> +{
> + struct net_device *dev = platform_get_drvdata(pdev);
> + struct macb *bp = netdev_priv(dev);
> + int ret;
> +
> + if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) {
> + /* Ensure PS-GTR PHY device used in SGMII mode is ready */
> + bp->sgmii_phy = devm_phy_get(&pdev->dev, "sgmii-phy");
> +
> + if (IS_ERR(bp->sgmii_phy)) {
> + ret = PTR_ERR(bp->sgmii_phy);
> + dev_err_probe(&pdev->dev, ret,
> + "failed to get PS-GTR PHY\n");
> + return ret;
> + }
> +
> + ret = phy_init(bp->sgmii_phy);
> + if (ret) {
> + dev_err(&pdev->dev, "failed to init PS-GTR PHY: %d\n",
> + ret);
> + return ret;
> + }
> + }
> +
> + /* Fully reset GEM controller at hardware level using zynqmp-reset driver,
> + * if mapped in device tree.
> + */
> + ret = device_reset_optional(&pdev->dev);
> + if (ret) {
> + dev_err_probe(&pdev->dev, ret, "failed to reset controller");
Before doing return you should call phy_exit();
> + return ret;
> + }
> +
> + return macb_init(pdev);
Same here, check return code and call phy_exit() if needed. In case init()
call in macb_probe() fails it will jump to err_out_free_netdev and will
miss calling phy_exit(). And is better to free resource in the same
function they were allocated.
> +}
> +
> static const struct macb_config zynqmp_config = {
> .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE |
> MACB_CAPS_JUMBO |
> MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH,
> .dma_burst_length = 16,
> .clk_init = macb_clk_init,
> - .init = macb_init,
> + .init = zynqmp_init,
> .jumbo_max_len = 10240,
> .usrio = &macb_default_usrio,
> };
> @@ -4767,7 +4812,7 @@ static int macb_probe(struct platform_device *pdev)
>
> err = macb_mii_init(bp);
> if (err)
> - goto err_out_free_netdev;
> + goto err_out_phy_exit;
>
> netif_carrier_off(dev);
>
> @@ -4792,6 +4837,9 @@ static int macb_probe(struct platform_device *pdev)
> mdiobus_unregister(bp->mii_bus);
> mdiobus_free(bp->mii_bus);
>
> +err_out_phy_exit:
> + phy_exit(bp->sgmii_phy);
> +
> err_out_free_netdev:
> free_netdev(dev);
>
> @@ -4813,6 +4861,7 @@ static int macb_remove(struct platform_device *pdev)
>
> if (dev) {
> bp = netdev_priv(dev);
> + phy_exit(bp->sgmii_phy);
> mdiobus_unregister(bp->mii_bus);
> mdiobus_free(bp->mii_bus);
>
> --
> 2.31.1
>
^ permalink raw reply
* Re: [PATCH V4 02/11] dt-bindings: power: imx8mq: add defines for VPU blk-ctrl domains
From: Hans Verkuil @ 2022-01-27 8:46 UTC (permalink / raw)
To: Shawn Guo
Cc: aford, cphealy, Lucas Stach, Rob Herring, Ezequiel Garcia,
Philipp Zabel, Mauro Carvalho Chehab, Rob Herring, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Greg Kroah-Hartman, linux-rockchip, devicetree, linux-arm-kernel,
linux-kernel, linux-staging, linux-media, Adam Ford
In-Reply-To: <20220125171129.472775-3-aford173@gmail.com>
Shawn,
Can you take patches 2-4 of this series or shall I? In the latter case I
need your Acked-by for these three patches.
Regards,
Hans
On 25/01/2022 18:11, Adam Ford wrote:
> From: Lucas Stach <l.stach@pengutronix.de>
>
> This adds the defines for the power domains provided by the VPU
> blk-ctrl on the i.MX8MQ.
>
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> Acked-by: Rob Herring <robh@kernel.org>
>
> diff --git a/include/dt-bindings/power/imx8mq-power.h b/include/dt-bindings/power/imx8mq-power.h
> index 8a513bd9166e..9f7d0f1e7c32 100644
> --- a/include/dt-bindings/power/imx8mq-power.h
> +++ b/include/dt-bindings/power/imx8mq-power.h
> @@ -18,4 +18,7 @@
> #define IMX8M_POWER_DOMAIN_MIPI_CSI2 9
> #define IMX8M_POWER_DOMAIN_PCIE2 10
>
> +#define IMX8MQ_VPUBLK_PD_G1 0
> +#define IMX8MQ_VPUBLK_PD_G2 1
> +
> #endif
^ permalink raw reply
* Re: [PATCH v3 6/6] RISC-V: Do not use cpumask data structure for hartid bitmap
From: Geert Uytterhoeven @ 2022-01-27 8:48 UTC (permalink / raw)
To: Atish Patra
Cc: Jessica Clarke, Atish Patra, Linux Kernel Mailing List,
Anup Patel, Albert Ou, Damien Le Moal, devicetree, Jisheng Zhang,
Krzysztof Kozlowski, linux-riscv, Palmer Dabbelt, Paul Walmsley,
Rob Herring
In-Reply-To: <CAOnJCU+AVS5Js4ZXmUubTqwU5Ye-9_z8onEE1mwhvCsOXchFBg@mail.gmail.com>
Hi Atish,
On Thu, Jan 27, 2022 at 2:02 AM Atish Patra <atishp@atishpatra.org> wrote:
> On Wed, Jan 26, 2022 at 1:10 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > On Wed, Jan 26, 2022 at 9:28 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > On Wed, Jan 26, 2022 at 3:21 AM Atish Patra <atishp@atishpatra.org> wrote:
> > > > On Tue, Jan 25, 2022 at 2:26 PM Jessica Clarke <jrtc27@jrtc27.com> wrote:
> > > > > On 20 Jan 2022, at 09:09, Atish Patra <atishp@rivosinc.com> wrote:
> > > > > > Currently, SBI APIs accept a hartmask that is generated from struct
> > > > > > cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it
> > > > > > is not the correct data structure for hartids as it can be higher
> > > > > > than NR_CPUs for platforms with sparse or discontguous hartids.
> > > > > >
> > > > > > Remove all association between hartid mask and struct cpumask.
> > > > > >
> > > > > > Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes)
> > > > > > Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes)
> > > > > > Signed-off-by: Atish Patra <atishp@rivosinc.com>
> > >
> > > > I am yet to reproduce it on my end.
> > > > @Geert Uytterhoeven: can you please try the below diff on your end.
> > >
> > > Unfortunately it doesn't fix the issue for me.
> > >
> > > /me debugging...
> >
> > Found it: after this commit, the SBI_EXT_RFENCE_REMOTE_FENCE_I and
> > SBI_EXT_RFENCE_REMOTE_SFENCE_VMA ecalls are now called with
> > hmask = 0x8000000000000001 and hbase = 1 instead of hmask = 3 and
> > hbase = 0.
> >
> > cpuid 1 maps to hartid 0
> > cpuid 0 maps to hartid 1
> >
> > __sbi_rfence_v02:364: cpuid 1 hartid 0
> > __sbi_rfence_v02:377: hartid 0 hbase 1
> > hmask |= 1UL << (hartid - hbase);
> >
> > oops
> >
> > __sbi_rfence_v02_call:303: SBI_EXT_RFENCE_REMOTE_FENCE_I hmask
> > 8000000000000001 hbase 1
> >
>
> Ahh yes. hmask will be incorrect if the bootcpu(cpu 0) is a higher
> hartid and it is trying to do a remote tlb flush/IPI
> to lower the hartid. We should generate the hartid array before the loop.
>
> Can you try this diff ? It seems to work for me during multiple boot
> cycle on the unleashed.
>
> You can find the patch here as well
> https://github.com/atishp04/linux/commits/v5.17-rc1
Thanks, that fixes the issue for me.
> --- a/arch/riscv/kernel/sbi.c
> +++ b/arch/riscv/kernel/sbi.c
> @@ -8,6 +8,8 @@
> #include <linux/init.h>
> #include <linux/pm.h>
> #include <linux/reboot.h>
> +#include <linux/sort.h>
> +
> #include <asm/sbi.h>
> #include <asm/smp.h>
>
> @@ -85,7 +87,7 @@ static unsigned long
> __sbi_v01_cpumask_to_hartmask(const struct cpumask *cpu_mas
> pr_warn("Unable to send any request to hartid > BITS_PER_LONG for
> SBI v0.1\n");
> break;
> }
> - hmask |= 1 << hartid;
> + hmask |= 1UL << hartid;
> }
>
> return hmask;
> @@ -160,7 +162,7 @@ static int __sbi_send_ipi_v01(const struct cpumask
> *cpu_mask)
> {
> unsigned long hart_mask;
>
> - if (!cpu_mask)
> + if (!cpu_mask || cpumask_empty(cpu_mask))
> cpu_mask = cpu_online_mask;
> hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask);
>
> @@ -176,7 +178,7 @@ static int __sbi_rfence_v01(int fid, const struct
> cpumask *cpu_mask,
> int result = 0;
> unsigned long hart_mask;
>
> - if (!cpu_mask)
> + if (!cpu_mask || cpumask_empty(cpu_mask))
> cpu_mask = cpu_online_mask;
> hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask);
>
> @@ -236,6 +238,18 @@ static int __sbi_rfence_v01(int fid, const struct
> cpumask *cpu_mask,
> static void sbi_set_power_off(void) {}
> #endif /* CONFIG_RISCV_SBI_V01 */
>
> +static int cmp_ulong(const void *A, const void *B)
> +{
> + const unsigned long *a = A, *b = B;
> +
> + if (*a < *b)
> + return -1;
> + else if (*a > *b)
> + return 1;
> + else
> + return 0;
> +}
> +
> static void __sbi_set_timer_v02(uint64_t stime_value)
> {
> #if __riscv_xlen == 32
> @@ -251,13 +265,22 @@ static int __sbi_send_ipi_v02(const struct
> cpumask *cpu_mask)
> {
> unsigned long hartid, cpuid, hmask = 0, hbase = 0;
> struct sbiret ret = {0};
> - int result;
> + int result, index = 0, max_index = 0;
> + unsigned long hartid_arr[NR_CPUS] = {0};
>
> - if (!cpu_mask)
> + if (!cpu_mask || cpumask_empty(cpu_mask))
> cpu_mask = cpu_online_mask;
>
> for_each_cpu(cpuid, cpu_mask) {
> hartid = cpuid_to_hartid_map(cpuid);
> + hartid_arr[index] = hartid;
> + index++;
> + }
> +
> + max_index = index;
> + sort(hartid_arr, max_index, sizeof(unsigned long), cmp_ulong, NULL);
> + for (index = 0; index < max_index; index++) {
> + hartid = hartid_arr[index];
> if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) {
> ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI,
> hmask, hbase, 0, 0, 0, 0);
> @@ -345,13 +368,21 @@ static int __sbi_rfence_v02(int fid, const
> struct cpumask *cpu_mask,
> unsigned long arg4, unsigned long arg5)
> {
> unsigned long hartid, cpuid, hmask = 0, hbase = 0;
> - int result;
> + int result, index = 0, max_index = 0;
> + unsigned long hartid_arr[NR_CPUS] = {0};
That's up to 256 bytes on the stack. And more if the maximum
number of cores is increased.
>
> - if (!cpu_mask)
> + if (!cpu_mask || cpumask_empty(cpu_mask))
> cpu_mask = cpu_online_mask;
>
> for_each_cpu(cpuid, cpu_mask) {
> hartid = cpuid_to_hartid_map(cpuid);
> + hartid_arr[index] = hartid;
> + index++;
> + }
> + max_index = index;
> + sort(hartid_arr, max_index, sizeof(unsigned long), cmp_ulong, NULL);
> + for (index = 0; index < max_index; index++) {
> + hartid = hartid_arr[index];
That looks expensive to me.
What about shifting hmask and adjusting hbase if a hartid is
lower than the current hbase?
> if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) {
> result = __sbi_rfence_v02_call(fid, hmask, hbase,
> start, size, arg4, arg5);
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* Re: [PATCH v3 6/6] RISC-V: Do not use cpumask data structure for hartid bitmap
From: Geert Uytterhoeven @ 2022-01-27 8:48 UTC (permalink / raw)
To: Atish Patra
Cc: Jessica Clarke, Atish Patra, Linux Kernel Mailing List,
Anup Patel, Albert Ou, Damien Le Moal, devicetree, Jisheng Zhang,
Krzysztof Kozlowski, linux-riscv, Palmer Dabbelt, Paul Walmsley,
Rob Herring
In-Reply-To: <CAMuHMdWsX-Pg3B1=KRf9hz1JrPAbydBrANTXg4q5CFJCqHJAoA@mail.gmail.com>
On Thu, Jan 27, 2022 at 9:48 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> On Thu, Jan 27, 2022 at 2:02 AM Atish Patra <atishp@atishpatra.org> wrote:
> > On Wed, Jan 26, 2022 at 1:10 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > On Wed, Jan 26, 2022 at 9:28 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > > On Wed, Jan 26, 2022 at 3:21 AM Atish Patra <atishp@atishpatra.org> wrote:
> > > > > On Tue, Jan 25, 2022 at 2:26 PM Jessica Clarke <jrtc27@jrtc27.com> wrote:
> > > > > > On 20 Jan 2022, at 09:09, Atish Patra <atishp@rivosinc.com> wrote:
> > > > > > > Currently, SBI APIs accept a hartmask that is generated from struct
> > > > > > > cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it
> > > > > > > is not the correct data structure for hartids as it can be higher
> > > > > > > than NR_CPUs for platforms with sparse or discontguous hartids.
> > > > > > >
> > > > > > > Remove all association between hartid mask and struct cpumask.
> > > > > > >
> > > > > > > Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes)
> > > > > > > Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes)
> > > > > > > Signed-off-by: Atish Patra <atishp@rivosinc.com>
> > > >
> > > > > I am yet to reproduce it on my end.
> > > > > @Geert Uytterhoeven: can you please try the below diff on your end.
> > > >
> > > > Unfortunately it doesn't fix the issue for me.
> > > >
> > > > /me debugging...
> > >
> > > Found it: after this commit, the SBI_EXT_RFENCE_REMOTE_FENCE_I and
> > > SBI_EXT_RFENCE_REMOTE_SFENCE_VMA ecalls are now called with
> > > hmask = 0x8000000000000001 and hbase = 1 instead of hmask = 3 and
> > > hbase = 0.
> > >
> > > cpuid 1 maps to hartid 0
> > > cpuid 0 maps to hartid 1
> > >
> > > __sbi_rfence_v02:364: cpuid 1 hartid 0
> > > __sbi_rfence_v02:377: hartid 0 hbase 1
> > > hmask |= 1UL << (hartid - hbase);
> > >
> > > oops
> > >
> > > __sbi_rfence_v02_call:303: SBI_EXT_RFENCE_REMOTE_FENCE_I hmask
> > > 8000000000000001 hbase 1
> > >
> >
> > Ahh yes. hmask will be incorrect if the bootcpu(cpu 0) is a higher
> > hartid and it is trying to do a remote tlb flush/IPI
> > to lower the hartid. We should generate the hartid array before the loop.
> >
> > Can you try this diff ? It seems to work for me during multiple boot
> > cycle on the unleashed.
> >
> > You can find the patch here as well
> > https://github.com/atishp04/linux/commits/v5.17-rc1
>
> Thanks, that fixes the issue for me.
Tested-by: Geert Uytterhoeven <geert@linux-m68k.org>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH v3] dt-bindings: nvmem: convert mtk-efuse.txt to YAML schema
From: Chunfeng Yun @ 2022-01-27 8:59 UTC (permalink / raw)
To: Srinivas Kandagatla
Cc: Rob Herring, Matthias Brugger, Andrew-CT Chen, devicetree,
linux-kernel, linux-arm-kernel, linux-mediatek, Chunfeng Yun,
Rob Herring
Convert mtk-efuse.txt to YAML schema mediatek,efuse.yaml
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
v3: add reviewed-by Rob
v2:
1. remove description of subnodes which is covered by nvmem.yaml suggested by Rob
2. change the example which is commoner than mt8173's
---
.../bindings/nvmem/mediatek,efuse.yaml | 86 +++++++++++++++++++
.../devicetree/bindings/nvmem/mtk-efuse.txt | 43 ----------
2 files changed, 86 insertions(+), 43 deletions(-)
create mode 100644 Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml
delete mode 100644 Documentation/devicetree/bindings/nvmem/mtk-efuse.txt
diff --git a/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml b/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml
new file mode 100644
index 000000000000..0f592c36431c
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml
@@ -0,0 +1,86 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/mediatek,efuse.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek efuse device tree bindings
+
+description: |
+ MediaTek's efuse is used for storing calibration data, it can be accessed
+ on ARM devices usiong I/O mapped memory.
+
+maintainers:
+ - Andrew-CT Chen <andrew-ct.chen@mediatek.com>
+
+allOf:
+ - $ref: "nvmem.yaml#"
+
+properties:
+ $nodename:
+ pattern: "^efuse@[0-9a-f]+$"
+
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - mediatek,mt7622-efuse
+ - mediatek,mt7623-efuse
+ - mediatek,mt8173-efuse
+ - mediatek,mt8192-efuse
+ - mediatek,mt8195-efuse
+ - mediatek,mt8516-efuse
+ - const: mediatek,efuse
+ - const: mediatek,mt8173-efuse
+ deprecated: true
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ efuse@11c10000 {
+ compatible = "mediatek,mt8195-efuse", "mediatek,efuse";
+ reg = <0x11c10000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ u3_tx_imp_p0: usb3-tx-imp@184 {
+ reg = <0x184 0x1>;
+ bits = <0 5>;
+ };
+ u3_rx_imp_p0: usb3-rx-imp@184 {
+ reg = <0x184 0x2>;
+ bits = <5 5>;
+ };
+ u3_intr_p0: usb3-intr@185 {
+ reg = <0x185 0x1>;
+ bits = <2 6>;
+ };
+ comb_tx_imp_p1: usb3-tx-imp@186 {
+ reg = <0x186 0x1>;
+ bits = <0 5>;
+ };
+ comb_rx_imp_p1: usb3-rx-imp@186 {
+ reg = <0x186 0x2>;
+ bits = <5 5>;
+ };
+ comb_intr_p1: usb3-intr@187 {
+ reg = <0x187 0x1>;
+ bits = <2 6>;
+ };
+ u2_intr_p0: usb2-intr-p0@188 {
+ reg = <0x188 0x1>;
+ bits = <0 5>;
+ };
+ u2_intr_p1: usb2-intr-p1@188 {
+ reg = <0x188 0x2>;
+ bits = <5 5>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/nvmem/mtk-efuse.txt b/Documentation/devicetree/bindings/nvmem/mtk-efuse.txt
deleted file mode 100644
index 39d529599444..000000000000
--- a/Documentation/devicetree/bindings/nvmem/mtk-efuse.txt
+++ /dev/null
@@ -1,43 +0,0 @@
-= Mediatek MTK-EFUSE device tree bindings =
-
-This binding is intended to represent MTK-EFUSE which is found in most Mediatek SOCs.
-
-Required properties:
-- compatible: should be
- "mediatek,mt7622-efuse", "mediatek,efuse": for MT7622
- "mediatek,mt7623-efuse", "mediatek,efuse": for MT7623
- "mediatek,mt8173-efuse" or "mediatek,efuse": for MT8173
- "mediatek,mt8192-efuse", "mediatek,efuse": for MT8192
- "mediatek,mt8195-efuse", "mediatek,efuse": for MT8195
- "mediatek,mt8516-efuse", "mediatek,efuse": for MT8516
-- reg: Should contain registers location and length
-- bits: contain the bits range by offset and size
-
-= Data cells =
-Are child nodes of MTK-EFUSE, bindings of which as described in
-bindings/nvmem/nvmem.txt
-
-Example:
-
- efuse: efuse@10206000 {
- compatible = "mediatek,mt8173-efuse";
- reg = <0 0x10206000 0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- /* Data cells */
- thermal_calibration: calib@528 {
- reg = <0x528 0xc>;
- };
- };
-
-= Data consumers =
-Are device nodes which consume nvmem data cells.
-
-For example:
-
- thermal {
- ...
- nvmem-cells = <&thermal_calibration>;
- nvmem-cell-names = "calibration";
- };
--
2.18.0
^ permalink raw reply related
* [PATCH] arm64: dts: ti: k3-j721e-common-proc-board: Enable PCIe + QSGMII multilink configuration
From: Aswath Govindraju @ 2022-01-27 9:02 UTC (permalink / raw)
Cc: Aswath Govindraju, Swapnil Jakhade, Nishanth Menon,
Vignesh Raghavendra, Tero Kristo, Rob Herring, linux-arm-kernel,
devicetree, linux-kernel
From: Swapnil Jakhade <sjakhade@cadence.com>
Enable PCIe + QSGMII multilink configuration for serdes 0. This is for
testing Sierra PHY multilink configuration.
Add support for PLL_CMNLC1 to get clock from REFRCV1 for multilink case.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
---
.../boot/dts/ti/k3-j721e-common-proc-board.dts | 15 ++++++++++++---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index 2d7596911b27..157d86dc2824 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -431,7 +431,7 @@
};
&serdes_ln_ctrl {
- idle-states = <J721E_SERDES0_LANE0_PCIE0_LANE0>, <J721E_SERDES0_LANE1_PCIE0_LANE1>,
+ idle-states = <J721E_SERDES0_LANE0_PCIE0_LANE0>, <J721E_SERDES0_LANE1_QSGMII_LANE2>,
<J721E_SERDES1_LANE0_PCIE1_LANE0>, <J721E_SERDES1_LANE1_PCIE1_LANE1>,
<J721E_SERDES2_LANE0_PCIE2_LANE0>, <J721E_SERDES2_LANE1_PCIE2_LANE1>,
<J721E_SERDES3_LANE0_USB3_0_SWAP>, <J721E_SERDES3_LANE1_USB3_0>,
@@ -757,8 +757,8 @@
};
&serdes0 {
- assigned-clocks = <&serdes0 CDNS_SIERRA_PLL_CMNLC>;
- assigned-clock-parents = <&wiz0_pll1_refclk>;
+ assigned-clocks = <&serdes0 CDNS_SIERRA_PLL_CMNLC>, <&serdes0 CDNS_SIERRA_PLL_CMNLC1>;
+ assigned-clock-parents = <&wiz0_pll1_refclk>, <&wiz0_pll1_refclk>;
serdes0_pcie_link: phy@0 {
reg = <0>;
@@ -767,6 +767,15 @@
cdns,phy-type = <PHY_TYPE_PCIE>;
resets = <&serdes_wiz0 1>;
};
+
+ serdes0_qsgmii_link: phy@1 {
+ reg = <1>;
+ cdns,num-lanes = <1>;
+ #phy-cells = <0>;
+ cdns,phy-type = <PHY_TYPE_QSGMII>;
+ resets = <&serdes_wiz0 2>;
+ };
+
};
&serdes1 {
--
2.17.1
^ permalink raw reply related
* Re: [PATCH] ASoC: dt-bindings: Centralize the 'sound-dai' definition
From: Jerome Brunet @ 2022-01-27 9:00 UTC (permalink / raw)
To: Rob Herring, Liam Girdwood, Mark Brown, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Andy Gross, Bjorn Andersson, Krzysztof Kozlowski,
Sylwester Nawrocki, Rohit kumar, Cheng-Yi Chiang, Shengjiu Wang,
Srinivas Kandagatla, Jonathan Bakker
Cc: Krzysztof Kozlowski, alsa-devel, devicetree, linux-kernel,
linux-arm-kernel, linux-arm-msm
In-Reply-To: <20220126231427.1638089-1-robh@kernel.org>
On Wed 26 Jan 2022 at 17:14, Rob Herring <robh@kernel.org> wrote:
> 'sound-dai' is a common property, but has duplicate type definitions.
> Create a new common definition to define the type and then update all
> the other occurrences to just define how many entries there are just
> like other phandle+arg properties.
>
> The constraints on the number of entries is based on the examples and
> could be wrong.
>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> Signed-off-by: Rob Herring <robh@kernel.org>
> ---
> Please ack, this depends on commit abf0fee97313 ("dt-bindings: Improve
> phandle-array schemas") in my tree.
> ---
> .../bindings/sound/amlogic,gx-sound-card.yaml | 4 ++--
> .../bindings/sound/google,sc7180-trogdor.yaml | 6 ++++--
> .../bindings/sound/imx-audio-card.yaml | 7 +++++--
> .../bindings/sound/qcom,sm8250.yaml | 10 +++++++---
> .../bindings/sound/samsung,aries-wm8994.yaml | 5 +----
> .../bindings/sound/samsung,midas-audio.yaml | 2 --
> .../bindings/sound/samsung,odroid.yaml | 9 +++------
> .../devicetree/bindings/sound/sound-dai.yaml | 20 +++++++++++++++++++
> 8 files changed, 42 insertions(+), 21 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/sound/sound-dai.yaml
>
> diff --git a/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml
> index 2e35aeaa8781..8b5be4b92f35 100644
> --- a/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml
> +++ b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml
> @@ -57,7 +57,7 @@ patternProperties:
> rate
>
> sound-dai:
> - $ref: /schemas/types.yaml#/definitions/phandle-array
> + maxItems: 1
> description: phandle of the CPU DAI
>
> patternProperties:
> @@ -71,7 +71,7 @@ patternProperties:
>
> properties:
> sound-dai:
> - $ref: /schemas/types.yaml#/definitions/phandle-array
> + maxItems: 1
No min or max here. Links may have more than one codec.
Ex:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts#n158
> description: phandle of the codec DAI
>
> required:
> diff --git a/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml b/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml
> index 837e3faa63a9..233caa0ade87 100644
> --- a/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml
> +++ b/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml
> @@ -62,13 +62,15 @@ patternProperties:
> description: Holds subnode which indicates cpu dai.
> type: object
> properties:
> - sound-dai: true
> + sound-dai:
> + maxItems: 1
>
> codec:
> description: Holds subnode which indicates codec dai.
> type: object
> properties:
> - sound-dai: true
> + sound-dai:
> + maxItems: 1
>
> required:
> - link-name
> diff --git a/Documentation/devicetree/bindings/sound/imx-audio-card.yaml b/Documentation/devicetree/bindings/sound/imx-audio-card.yaml
> index d1816dd061cf..bb3a435722c7 100644
> --- a/Documentation/devicetree/bindings/sound/imx-audio-card.yaml
> +++ b/Documentation/devicetree/bindings/sound/imx-audio-card.yaml
> @@ -59,13 +59,16 @@ patternProperties:
> description: Holds subnode which indicates cpu dai.
> type: object
> properties:
> - sound-dai: true
> + sound-dai:
> + maxItems: 1
>
> codec:
> description: Holds subnode which indicates codec dai.
> type: object
> properties:
> - sound-dai: true
> + sound-dai:
> + minItems: 1
> + maxItems: 2
>
> fsl,mclk-equal-bclk:
> description: Indicates mclk can be equal to bclk, especially for sai interface
> diff --git a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml
> index 4bfda04b4608..4ecd4080bb96 100644
> --- a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml
> +++ b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml
> @@ -69,19 +69,23 @@ patternProperties:
> description: Holds subnode which indicates cpu dai.
> type: object
> properties:
> - sound-dai: true
> + sound-dai:
> + maxItems: 1
>
> platform:
> description: Holds subnode which indicates platform dai.
> type: object
> properties:
> - sound-dai: true
> + sound-dai:
> + maxItems: 1
>
> codec:
> description: Holds subnode which indicates codec dai.
> type: object
> properties:
> - sound-dai: true
> + sound-dai:
> + minItems: 1
> + maxItems: 4
>
> required:
> - link-name
> diff --git a/Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml b/Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml
> index eb487ed3ca3b..4ffa275b3c49 100644
> --- a/Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml
> +++ b/Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml
> @@ -27,9 +27,6 @@ properties:
> sound-dai:
> minItems: 2
> maxItems: 2
> - items:
> - maxItems: 1
> - $ref: /schemas/types.yaml#/definitions/phandle-array
> description: |
> phandles to the I2S controller and bluetooth codec,
> in that order
> @@ -38,7 +35,7 @@ properties:
> type: object
> properties:
> sound-dai:
> - $ref: /schemas/types.yaml#/definitions/phandle-array
> + maxItems: 1
> description: phandle to the WM8994 CODEC
>
> samsung,audio-routing:
> diff --git a/Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml b/Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml
> index 095775c598fa..ec50bcb4af5f 100644
> --- a/Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml
> +++ b/Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml
> @@ -21,7 +21,6 @@ properties:
> type: object
> properties:
> sound-dai:
> - $ref: /schemas/types.yaml#/definitions/phandle-array
> maxItems: 1
> description: phandle to the I2S controller
> required:
> @@ -31,7 +30,6 @@ properties:
> type: object
> properties:
> sound-dai:
> - $ref: /schemas/types.yaml#/definitions/phandle-array
> maxItems: 1
> description: phandle to the WM1811 CODEC
> required:
> diff --git a/Documentation/devicetree/bindings/sound/samsung,odroid.yaml b/Documentation/devicetree/bindings/sound/samsung,odroid.yaml
> index e8122bc87362..db2513f3e168 100644
> --- a/Documentation/devicetree/bindings/sound/samsung,odroid.yaml
> +++ b/Documentation/devicetree/bindings/sound/samsung,odroid.yaml
> @@ -37,18 +37,15 @@ properties:
> type: object
> properties:
> sound-dai:
> - $ref: /schemas/types.yaml#/definitions/phandle-array
> description: phandles to the I2S controllers
>
> codec:
> type: object
> properties:
> sound-dai:
> - $ref: /schemas/types.yaml#/definitions/phandle-array
> - description: |
> - List of phandles to the CODEC nodes,
> - first entry must be corresponding to the MAX98090 CODEC and
> - the second entry must be the phandle of the HDMI IP block node.
> + items:
> + - description: phandle of the MAX98090 CODEC
> + - description: phandle of the HDMI IP block node
>
> samsung,audio-routing:
> $ref: /schemas/types.yaml#/definitions/non-unique-string-array
> diff --git a/Documentation/devicetree/bindings/sound/sound-dai.yaml b/Documentation/devicetree/bindings/sound/sound-dai.yaml
> new file mode 100644
> index 000000000000..61c6f7abc4e7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/sound-dai.yaml
> @@ -0,0 +1,20 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/sound/sound-dai.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Digital Audio Interface consumer Device Tree Bindings
> +
> +maintainers:
> + - Rob Herring <robh@kernel.org>
> +
> +select: true
> +
> +properties:
> + sound-dai:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description: A phandle plus args to digital audio interface provider(s)
> +
> +additionalProperties: true
> +...
^ permalink raw reply
* [PATCH v5 2/2] dt: bindings: KTD20xx: Introduce the ktd20xx family of RGB drivers
From: Florian Eckert @ 2022-01-27 9:08 UTC (permalink / raw)
To: pavel, robh+dt, andy.shevchenko
Cc: Eckert.Florian, linux-kernel, linux-leds, devicetree, Rob Herring
In-Reply-To: <20220127090841.396-1-fe@dev.tdt.de>
Introduce the bindings for the Kinetic KTD2061/58/59/60RGB LED device
driver. The KTD20xx can control RGB LEDs individually. Because of the
hardware limitations, only 7 colors and the color black (off) can be set.
Signed-off-by: Florian Eckert <fe@dev.tdt.de>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/leds/leds-ktd20xx.yaml | 130 ++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 131 insertions(+)
create mode 100644 Documentation/devicetree/bindings/leds/leds-ktd20xx.yaml
diff --git a/Documentation/devicetree/bindings/leds/leds-ktd20xx.yaml b/Documentation/devicetree/bindings/leds/leds-ktd20xx.yaml
new file mode 100644
index 000000000000..c4e440cc6945
--- /dev/null
+++ b/Documentation/devicetree/bindings/leds/leds-ktd20xx.yaml
@@ -0,0 +1,130 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/leds/leds-ktd20xx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: LED driver for KTD20xx RGB LED from Kinetic.
+
+maintainers:
+ - Florian Eckert <fe@dev.tdt.de>
+
+description: |
+ The KTD20XX is multi-channel, I2C LED driver. Into can control up to 12
+ LEDs per device. The RGB value can be set for each LED. Due to hardware
+ limitations, the full RGB range cannot be used. Only 7 colors and the
+ color black can be set (black means off).
+ R G B
+ 0 0 0 = Black (off)
+ 0 0 1 = Blue
+ 0 1 0 = Green
+ 0 1 1 = Cyan
+ 1 0 0 = Red
+ 1 0 1 = Magenta
+ 1 1 0 = Yellow
+ 1 1 1 = White
+
+properties:
+ compatible:
+ enum:
+ - kinetic,ktd20xx
+
+ reg:
+ maxItems: 1
+ description:
+ I2C slave address
+ ktd2061/58/59/60 0x68 0x69 0x6A 0x6B
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+ 'kinetic,led-current':
+ $ref: /schemas/types.yaml#/definitions/uint8
+ description:
+ This value is a current setting for all LEDs connected to this device.
+ If this value is not set then the default value off 0x28 (5mA) is set.
+ This means all LEDs get 5mA. The max value is 24mA. We have the
+ following mapping in 125uA steps. We can set a maximum of 24mA.
+ 0000 0000 (0x00) = 0uA
+ 0000 0001 (0x01) = 125uA
+ .... ....
+ 0010 1000 (0x28) = 5mA
+ .... ....
+ 1100 0000 (0xC0) = 24mA
+ 1100 0001 (0xC1) = 24mA
+ .... ....
+ 1111 1111 (0xFF) = 24mA
+ minimum: 0
+ maximum: 255
+
+patternProperties:
+ '^multi-led@[0-9a-f]$':
+ type: object
+ allOf:
+ - $ref: leds-class-multicolor.yaml#
+ description:
+ This node represents one of the Multicolor LED. No subnodes need to
+ be added for subchannels since this controller only supports 1bit
+ RGB values. We could display seven different colors and the color
+ black which means off.
+
+ properties:
+ reg:
+ minimum: 0
+ maximum: 11
+ description:
+ This property identifies wired connection of the LED to this device.
+ 0x00 LEDA1
+ 0x01 LEDA2
+ 0x02 LEDA3
+ 0x03 LEDA4
+ 0x04 LEDB1
+ 0x05 LEDB2
+ 0x06 LEDB3
+ 0x07 LEDB4
+ 0x08 LEDC1
+ 0x09 LEDC2
+ 0x0A LEDC3
+ 0x0B LEDC4
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/leds/common.h>
+
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led-controller@14 {
+ compatible = "kinetic,ktd20xx";
+ reg = <0x68>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ kinetic,led-current = <0x28>; // Current for all LEDs is 5mA
+
+ multi-led@0 {
+ reg = <0x0>;
+ color = <LED_COLOR_ID_MULTI>;
+ function = LED_FUNCTION_CHARGING;
+ linux,default-trigger = "default-on";
+ };
+
+ multi-led@2 {
+ reg = <0x2>;
+ color = <LED_COLOR_ID_MULTI>;
+ function = LED_FUNCTION_STANDBY;
+ linux,default-trigger = "default-on";
+ };
+ };
+ };
+
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index 04d68985d348..b56d8392119c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10743,6 +10743,7 @@ KTD20XX LED CONTROLLER DRIVER
M: Florian Eckert <fe@dev.tdt.de>
L: linux-leds@vger.kernel.org
S: Maintained
+F: Documentation/devicetree/bindings/leds/leds-ktd20xx.yaml
F: drivers/leds/leds-ktd20xx.c
KTEST
--
2.20.1
^ permalink raw reply related
* [PATCH v5 0/2] leds: add ktd20xx LED driver support
From: Florian Eckert @ 2022-01-27 9:08 UTC (permalink / raw)
To: pavel, robh+dt, andy.shevchenko
Cc: Eckert.Florian, linux-kernel, linux-leds, devicetree
v1: Initial send
v2: Remove variant 1 from source
v3: Changes requested by Andy Shevchenko added. Thanks for reviewing
- Removing OF dependency
- Add missing includes
- Use device_property_read_u32() instead of fwnode_property_read_u32()
- Use one liner function pattern <test> ? <value-true> : <value-false>
- Remove switch case call for intensity color selection use BIT()
instead
- Remove not needed fwnode_handle_put() in ktd200xx_probe_dt()
function
- Use dev_get_drvdata() instead of i2c_get_clientdata() function call
- Use sysfs_emit() function call
- Use kstrtobool() function call
- Remove not needed comma after last array element
- Use dev_err_probe() instead of dev_error() in driver probe function
- Do not use dev_group registration function set .dev_groups directly
into ktd20xx_driver struct.
v4: Changes requested by Andy Shevchenko. Thanks again for your review
- Fix Author indentation
- Reduce logging noise
- Use 'if' standard pattern
- Use set_bit function to make code cleaner
- Use meaningful jump labels
- Updating the logging output to better match the source code
- Remove duplicate dev pointer usage. This is not necessary as the
information can be used directly from the client structure
- Do not hide return value from kstrbool function
- Do not use mutex_destroy function in devm mananged structs
v5: Changes requested by Andy Shevchenko. Thanks again for your review
so I could learn a lot about good coding style.
- Update file header
- Add missing comma to last array element
- Fix spelling
- Replace not needed atomic bit set function set_bit() with __set_bit()
- Use more meaningful goto jump labels
- Use return statement and not goto jump labels where possible
- Use probe_new function
- Use dev_dbg() function instead of dev_info() function in probe
Florian Eckert (2):
leds: ktd20xx: Extension of the KTD20xx family of LED drivers from
Kinetic
dt: bindings: KTD20xx: Introduce the ktd20xx family of RGB drivers
.../bindings/leds/leds-ktd20xx.yaml | 130 ++++
MAINTAINERS | 7 +
drivers/leds/Kconfig | 12 +
drivers/leds/Makefile | 1 +
drivers/leds/leds-ktd20xx.c | 572 ++++++++++++++++++
5 files changed, 722 insertions(+)
create mode 100644 Documentation/devicetree/bindings/leds/leds-ktd20xx.yaml
create mode 100644 drivers/leds/leds-ktd20xx.c
--
2.20.1
^ permalink raw reply
* [PATCH v5 1/2] leds: ktd20xx: Extension of the KTD20xx family of LED drivers from Kinetic
From: Florian Eckert @ 2022-01-27 9:08 UTC (permalink / raw)
To: pavel, robh+dt, andy.shevchenko
Cc: Eckert.Florian, linux-kernel, linux-leds, devicetree,
kernel test robot
In-Reply-To: <20220127090841.396-1-fe@dev.tdt.de>
Introducing the KTD2061/58/59/60 RGB LED drivers. The difference in
these are the address numbers on the I2C bus that the device listens to.
All KT20xx units can drive up to 12 LEDs.
Due to the hardware limitation, we can only set 7 colors and the color
black (LED off) for each LED independently and not the full RGB range.
This is because the chip only has two color registers.
To control the LEDs independently, the chip has to be configured in a
special way.
Color register 0 must be loaded with the current value 0mA, and color
register 1 must be loaded with the value 'kinetic,led-current' from the
device tree node. If the property is omitted, the register is loaded
with the default value (0x28 = 5mA).
To select a color for an LED, a combination must be written to the color
selection register of that LED. This range for selecting the value is 3
bits wide (RGB). A '0' in any of the bits uses color register '0' and a
'1' uses color register '1'.
So we could choose the following combination for each LED:
R G B
0 0 0 = Black (off)
0 0 1 = Blue
0 1 0 = green
0 1 1 = Cyan
1 0 0 = Red
1 0 1 = Magenta
1 1 0 = Yellow
1 1 1 = White
Signed-off-by: Florian Eckert <fe@dev.tdt.de>
Reported-by: kernel test robot <lkp@intel.com>
---
MAINTAINERS | 6 +
drivers/leds/Kconfig | 12 +
drivers/leds/Makefile | 1 +
drivers/leds/leds-ktd20xx.c | 569 ++++++++++++++++++++++++++++++++++++
4 files changed, 588 insertions(+)
create mode 100644 drivers/leds/leds-ktd20xx.c
diff --git a/MAINTAINERS b/MAINTAINERS
index a58544f7b699..04d68985d348 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10739,6 +10739,12 @@ S: Maintained
F: Documentation/devicetree/bindings/leds/backlight/kinetic,ktd253.yaml
F: drivers/video/backlight/ktd253-backlight.c
+KTD20XX LED CONTROLLER DRIVER
+M: Florian Eckert <fe@dev.tdt.de>
+L: linux-leds@vger.kernel.org
+S: Maintained
+F: drivers/leds/leds-ktd20xx.c
+
KTEST
M: Steven Rostedt <rostedt@goodmis.org>
M: John Hawley <warthog9@eaglescrag.net>
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index 6090e647daee..a96e6bf7918b 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -157,6 +157,18 @@ config LEDS_EL15203000
To compile this driver as a module, choose M here: the module
will be called leds-el15203000.
+config LEDS_KTD20XX
+ tristate "LED Support for KTD2061/58/59/60 LED driver chip"
+ depends on LEDS_CLASS && I2C
+ depends on LEDS_CLASS_MULTICOLOR
+ select REGMAP_I2C
+ help
+ If you say yes here you get support for the Kinetic
+ KTD2061, KTD2058, KTD2059 and KTD2060 LED driver.
+
+ To compile this driver as a module, choose M here: the
+ module will be called leds-ktd20xx.
+
config LEDS_TURRIS_OMNIA
tristate "LED support for CZ.NIC's Turris Omnia"
depends on LEDS_CLASS_MULTICOLOR
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
index e58ecb36360f..5a86e72ea722 100644
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_LEDS_IP30) += leds-ip30.o
obj-$(CONFIG_LEDS_IPAQ_MICRO) += leds-ipaq-micro.o
obj-$(CONFIG_LEDS_IS31FL319X) += leds-is31fl319x.o
obj-$(CONFIG_LEDS_IS31FL32XX) += leds-is31fl32xx.o
+obj-${CONFIG_LEDS_KTD20XX} += leds-ktd20xx.o
obj-$(CONFIG_LEDS_LM3530) += leds-lm3530.o
obj-$(CONFIG_LEDS_LM3532) += leds-lm3532.o
obj-$(CONFIG_LEDS_LM3533) += leds-lm3533.o
diff --git a/drivers/leds/leds-ktd20xx.c b/drivers/leds/leds-ktd20xx.c
new file mode 100644
index 000000000000..be6d1e8b6d68
--- /dev/null
+++ b/drivers/leds/leds-ktd20xx.c
@@ -0,0 +1,569 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * LEDs driver for the Kinetic KDT20xx device
+ *
+ * Copyright (C) 2021 TDT AG Florian Eckert <fe@dev.tdt.de>
+ */
+
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/leds.h>
+#include <linux/led-class-multicolor.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/property.h>
+#include <linux/regmap.h>
+
+/* I2C Register Map */
+#define KTD20XX_ID 0x00
+#define KTD20XX_MONITOR 0x01
+#define KTD20XX_CONTROL 0x02
+
+/* Color0 Configuration Registers */
+#define KTD20XX_IRED0 0x03
+#define KTD20XX_IGRN0 0x04
+#define KTD20XX_IBLU0 0x05
+
+/* Color1 Configuration Registers */
+#define KTD20XX_IRED1 0x06
+#define KTD20XX_IGRN1 0x07
+#define KTD20XX_IBLU1 0x08
+
+/* Selection Configuration Register */
+#define KTD20XX_ISELA12 0x09
+#define KTD20XX_ISELA34 0x0A
+#define KTD20XX_ISELB12 0x0B
+#define KTD20XX_ISELB34 0x0C
+#define KTD20XX_ISELC12 0x0D
+#define KTD20XX_ISELC34 0x0E
+
+#define KTD20XX_MAX_LEDS 12
+#define KTD20XX_LED_CHANNELS 3
+
+enum ktd20xx_led_number {
+ /* ISELA12 */
+ RGB_A1,
+ RGB_A2,
+ /* ISELA34 */
+ RGB_A3,
+ RGB_A4,
+ /* ISELB12 */
+ RGB_B1,
+ RGB_B2,
+ /* ISELB34 */
+ RGB_B3,
+ RGB_B4,
+ /* ISELC12 */
+ RGB_C1,
+ RGB_C2,
+ /* ISELC34 */
+ RGB_C3,
+ RGB_C4,
+};
+
+enum ktd20xx_control_mode {
+ CONTROL_MODE_OFF,
+ CONTROL_MODE_NIGHT,
+ CONTROL_MODE_NORMAL,
+ CONTROL_MODE_RESET,
+};
+
+static const struct reg_default ktd20xx_reg_defs[] = {
+ /* Color0 Configuration Registers */
+ {KTD20XX_IRED0, 0x28},
+ {KTD20XX_IGRN0, 0x28},
+ {KTD20XX_IBLU0, 0x28},
+ /* Color1 Configuration Registers */
+ {KTD20XX_IRED1, 0x60},
+ {KTD20XX_IGRN1, 0x60},
+ {KTD20XX_IBLU1, 0x60},
+ /* Selection Configuration Register */
+ {KTD20XX_ISELA12, 0x00},
+ {KTD20XX_ISELA34, 0x00},
+ {KTD20XX_ISELB12, 0x00},
+ {KTD20XX_ISELB34, 0x00},
+ {KTD20XX_ISELC12, 0x00},
+ {KTD20XX_ISELC34, 0x00},
+};
+
+/* Chip values */
+static const struct reg_field kt20xx_control_mode = REG_FIELD(KTD20XX_CONTROL, 6, 7);
+static const struct reg_field kt20xx_faderate = REG_FIELD(KTD20XX_CONTROL, 0, 2);
+static const struct reg_field kt20xx_vendor = REG_FIELD(KTD20XX_ID, 5, 7);
+static const struct reg_field kt20xx_chip_id = REG_FIELD(KTD20XX_ID, 0, 4);
+static const struct reg_field kt20xx_chip_rev = REG_FIELD(KTD20XX_MONITOR, 4, 7);
+
+/* ISELA1 and ISELA2 */
+static const struct reg_field kt20xx_a1_select = REG_FIELD(KTD20XX_ISELA12, 4, 6);
+static const struct reg_field kt20xx_a1_enable = REG_FIELD(KTD20XX_ISELA12, 7, 7);
+static const struct reg_field kt20xx_a2_select = REG_FIELD(KTD20XX_ISELA12, 0, 2);
+static const struct reg_field kt20xx_a2_enable = REG_FIELD(KTD20XX_ISELA12, 3, 3);
+
+/* ISELA3 and ISELA4 */
+static const struct reg_field kt20xx_a3_select = REG_FIELD(KTD20XX_ISELA34, 4, 6);
+static const struct reg_field kt20xx_a3_enable = REG_FIELD(KTD20XX_ISELA34, 7, 7);
+static const struct reg_field kt20xx_a4_select = REG_FIELD(KTD20XX_ISELA34, 0, 2);
+static const struct reg_field kt20xx_a4_enable = REG_FIELD(KTD20XX_ISELA34, 3, 3);
+
+/* ISELB1 and ISELB2 */
+static const struct reg_field kt20xx_b1_select = REG_FIELD(KTD20XX_ISELB12, 4, 6);
+static const struct reg_field kt20xx_b1_enable = REG_FIELD(KTD20XX_ISELB12, 7, 7);
+static const struct reg_field kt20xx_b2_select = REG_FIELD(KTD20XX_ISELB12, 0, 2);
+static const struct reg_field kt20xx_b2_enable = REG_FIELD(KTD20XX_ISELB12, 3, 3);
+
+/* ISELB3 and ISELB4 */
+static const struct reg_field kt20xx_b3_select = REG_FIELD(KTD20XX_ISELB34, 4, 6);
+static const struct reg_field kt20xx_b3_enable = REG_FIELD(KTD20XX_ISELB34, 7, 7);
+static const struct reg_field kt20xx_b4_select = REG_FIELD(KTD20XX_ISELB34, 0, 2);
+static const struct reg_field kt20xx_b4_enable = REG_FIELD(KTD20XX_ISELB34, 3, 3);
+
+/* ISELC1 and ISELC2 */
+static const struct reg_field kt20xx_c1_select = REG_FIELD(KTD20XX_ISELC12, 4, 6);
+static const struct reg_field kt20xx_c1_enable = REG_FIELD(KTD20XX_ISELC12, 7, 7);
+static const struct reg_field kt20xx_c2_select = REG_FIELD(KTD20XX_ISELC12, 0, 2);
+static const struct reg_field kt20xx_c2_enable = REG_FIELD(KTD20XX_ISELC12, 3, 3);
+
+/* ISELC3 and ISELC4 */
+static const struct reg_field kt20xx_c3_select = REG_FIELD(KTD20XX_ISELC34, 4, 6);
+static const struct reg_field kt20xx_c3_enable = REG_FIELD(KTD20XX_ISELC34, 7, 7);
+static const struct reg_field kt20xx_c4_select = REG_FIELD(KTD20XX_ISELC34, 0, 2);
+static const struct reg_field kt20xx_c4_enable = REG_FIELD(KTD20XX_ISELC34, 3, 3);
+
+static const struct regmap_range ktd20xx_volatile_ranges = {
+ .range_min = KTD20XX_ID,
+ .range_max = KTD20XX_CONTROL,
+};
+
+static const struct regmap_access_table ktd20xx_volatile_table = {
+ .yes_ranges = &ktd20xx_volatile_ranges,
+ .n_yes_ranges = 1,
+};
+
+static const struct regmap_range ktd20xx_readable_ranges = {
+ .range_min = KTD20XX_ID,
+ .range_max = KTD20XX_MONITOR,
+};
+
+static const struct regmap_access_table ktd20xx_readable_table = {
+ .yes_ranges = &ktd20xx_readable_ranges,
+ .n_yes_ranges = 1,
+};
+
+static const struct regmap_config ktd20xx_regmap_config = {
+ .name = "ktd20xx_regmap",
+ .reg_bits = 8,
+ .val_bits = 8,
+
+ .max_register = KTD20XX_ISELC34,
+
+ .volatile_table = &ktd20xx_volatile_table,
+ .rd_table = &ktd20xx_readable_table,
+
+ .reg_defaults = ktd20xx_reg_defs,
+ .num_reg_defaults = ARRAY_SIZE(ktd20xx_reg_defs),
+ .cache_type = REGCACHE_FLAT,
+};
+
+struct ktd20xx_led {
+ struct led_classdev_mc mc_cdev;
+ struct mc_subled subled_info[KTD20XX_LED_CHANNELS];
+ int index;
+ struct regmap_field *enable;
+ struct regmap_field *select;
+ struct ktd20xx *chip;
+};
+
+struct ktd20xx {
+ struct mutex lock;
+ struct i2c_client *client;
+ struct regmap *regmap;
+ struct regmap_field *control_mode;
+ struct regmap_field *faderate;
+ struct regmap_field *vendor;
+ struct regmap_field *chip_id;
+ struct regmap_field *chip_rev;
+ struct ktd20xx_led leds[KTD20XX_MAX_LEDS];
+};
+
+static int ktd20xx_hwinit(struct ktd20xx *chip)
+{
+ struct device *dev = &chip->client->dev;
+ int ret;
+ unsigned int value;
+
+ /*
+ * If the device tree property 'kinetic,led-current' is found
+ * then set this value into the color0 register as the max current
+ * for all color channel LEDs. If this property is not set then
+ * use the default value 0x28 set by the chip after a hardware reset.
+ * The hardware default value 0x28 corresponds to 5mA.
+ */
+ /* Set color1 register current value to 0x00 and therefor 0mA */
+ regmap_write(chip->regmap, KTD20XX_IRED1, 0);
+ regmap_write(chip->regmap, KTD20XX_IGRN1, 0);
+ regmap_write(chip->regmap, KTD20XX_IBLU1, 0);
+
+ ret = device_property_read_u32(dev, "kinetic,led-current", &value);
+ if (ret) {
+ dev_warn(dev, "property 'kinetic,led-current' not found. Using default hardware value 0x28 (5mA).\n");
+ } else {
+ dev_dbg(dev, "property 'kinetic,led-current' found. Using value 0x%02x.\n",
+ value);
+ regmap_write(chip->regmap, KTD20XX_IRED0, value);
+ regmap_write(chip->regmap, KTD20XX_IGRN0, value);
+ regmap_write(chip->regmap, KTD20XX_IBLU0, value);
+ }
+
+ /* Enable chip to run in 'normal mode' */
+ regmap_field_write(chip->control_mode, CONTROL_MODE_NORMAL);
+
+ return 0;
+}
+
+static struct ktd20xx_led *mcled_cdev_to_led(struct led_classdev_mc *mc_cdev)
+{
+ return container_of(mc_cdev, struct ktd20xx_led, mc_cdev);
+}
+
+static int ktd20xx_brightness_set(struct led_classdev *cdev,
+ enum led_brightness brightness)
+{
+ struct led_classdev_mc *mc_dev = lcdev_to_mccdev(cdev);
+ struct ktd20xx_led *led = mcled_cdev_to_led(mc_dev);
+ struct device *dev = &led->chip->client->dev;
+ unsigned long rgb = 0;
+ int ret;
+ int i;
+
+ mutex_lock(&led->chip->lock);
+ ret = regmap_field_write(led->enable, brightness ? 1 : 0);
+ if (ret) {
+ dev_err(dev, "Cannot set enable flag of LED %d error: %d\n",
+ led->index, ret);
+ goto out_unlock;
+ }
+
+ for (i = 0; i < led->mc_cdev.num_colors; i++) {
+ unsigned int intensity = mc_dev->subled_info[i].intensity;
+ unsigned int channel = mc_dev->subled_info[i].channel;
+
+ if (intensity > 0)
+ __set_bit(channel, &rgb);
+ }
+
+ /*
+ * To use the color0 registers as default value after a hardware
+ * reset, we have to invert the rgb channel selection.
+ */
+ ret = regmap_field_write(led->select, ~rgb);
+ if (ret) {
+ dev_err(dev, "Can not set RGB for LED %d error: %d\n",
+ led->index, ret);
+ goto out_unlock;
+ }
+
+out_unlock:
+ mutex_unlock(&led->chip->lock);
+ return ret;
+}
+
+static int ktd20xx_probe_dt(struct ktd20xx *chip)
+{
+ struct device *dev = &chip->client->dev;
+ struct led_init_data init_data = {};
+ struct fwnode_handle *child = NULL;
+ struct led_classdev *led_cdev;
+ struct ktd20xx_led *led;
+ int color;
+ int i = 0;
+ int ret;
+
+ device_for_each_child_node(dev, child) {
+ led = &chip->leds[i];
+
+ ret = fwnode_property_read_u32(child, "reg", &led->index);
+ if (ret) {
+ dev_err(dev, "missing property 'reg'\n");
+ goto child_out;
+ }
+ if (led->index >= KTD20XX_MAX_LEDS) {
+ dev_warn(dev, "property 'reg' is greater then '%i'\n",
+ KTD20XX_MAX_LEDS);
+ ret = -EINVAL;
+ goto child_out;
+ }
+
+ ret = fwnode_property_read_u32(child, "color", &color);
+ if (ret) {
+ dev_err(dev, "missing property 'color'\n");
+ goto child_out;
+ }
+ if (color != LED_COLOR_ID_MULTI) {
+ dev_warn(dev, "property 'color' is not equal to the value 'LED_COLOR_ID_MULTI'\n");
+ ret = -EINVAL;
+ goto child_out;
+ }
+
+ led->subled_info[0].color_index = LED_COLOR_ID_RED;
+ led->subled_info[0].channel = 2;
+ led->subled_info[0].intensity = 1;
+ led->subled_info[1].color_index = LED_COLOR_ID_GREEN;
+ led->subled_info[1].channel = 1;
+ led->subled_info[1].intensity = 1;
+ led->subled_info[2].color_index = LED_COLOR_ID_BLUE;
+ led->subled_info[2].channel = 0;
+ led->subled_info[2].intensity = 1;
+
+ led->mc_cdev.subled_info = led->subled_info;
+ led->mc_cdev.num_colors = KTD20XX_LED_CHANNELS;
+
+ init_data.fwnode = child;
+
+ led->chip = chip;
+ led_cdev = &led->mc_cdev.led_cdev;
+ led_cdev->brightness_set_blocking = ktd20xx_brightness_set;
+
+ switch (led->index) {
+ case RGB_A1:
+ led->select = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_a1_select);
+ led->enable = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_a1_enable);
+ break;
+ case RGB_A2:
+ led->select = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_a2_select);
+ led->enable = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_a2_enable);
+ break;
+ case RGB_A3:
+ led->select = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_a3_select);
+ led->enable = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_a3_enable);
+ break;
+ case RGB_A4:
+ led->select = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_a4_select);
+ led->enable = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_a4_enable);
+ break;
+ case RGB_B1:
+ led->select = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_b1_select);
+ led->enable = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_b1_enable);
+ break;
+ case RGB_B2:
+ led->select = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_b2_select);
+ led->enable = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_b2_enable);
+ break;
+ case RGB_B3:
+ led->select = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_b3_select);
+ led->enable = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_b3_enable);
+ break;
+ case RGB_B4:
+ led->select = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_b4_select);
+ led->enable = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_b4_enable);
+ break;
+ case RGB_C1:
+ led->select = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_c1_select);
+ led->enable = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_c1_enable);
+ break;
+ case RGB_C2:
+ led->select = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_c2_select);
+ led->enable = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_c2_enable);
+ break;
+ case RGB_C3:
+ led->select = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_c3_select);
+ led->enable = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_c3_enable);
+ break;
+ case RGB_C4:
+ led->select = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_c4_select);
+ led->enable = devm_regmap_field_alloc(dev,
+ chip->regmap, kt20xx_c4_enable);
+ break;
+ }
+
+ ret = devm_led_classdev_multicolor_register_ext(dev,
+ &led->mc_cdev,
+ &init_data);
+
+ if (ret) {
+ dev_err(dev, "led register err: %d\n", ret);
+ goto child_out;
+ }
+
+ i++;
+ }
+
+ return 0;
+
+child_out:
+ fwnode_handle_put(child);
+ return ret;
+}
+
+/*
+ * The chip also offers the option "Night Mode".
+ * All LED current settings are divided by 16 for a 0 to 1.5mA current
+ * setting range.
+ */
+static ssize_t nightmode_show(struct device *dev, struct device_attribute *a,
+ char *buf)
+{
+ struct ktd20xx *chip = dev_get_drvdata(dev);
+ unsigned int value;
+
+ mutex_lock(&chip->lock);
+ regmap_field_read(chip->control_mode, &value);
+ mutex_unlock(&chip->lock);
+
+ return sysfs_emit(buf, "%d\n", value == CONTROL_MODE_NIGHT ? 1 : 0);
+}
+
+static ssize_t nightmode_store(struct device *dev, struct device_attribute *a,
+ const char *buf, size_t count)
+{
+ struct ktd20xx *chip = dev_get_drvdata(dev);
+ bool value;
+ int ret;
+
+ ret = kstrtobool(buf, &value);
+ if (ret)
+ return ret;
+
+ mutex_lock(&chip->lock);
+ ret = regmap_field_write(chip->control_mode,
+ value == 1 ? CONTROL_MODE_NIGHT : CONTROL_MODE_NORMAL);
+ mutex_unlock(&chip->lock);
+
+ if (ret)
+ return ret;
+
+ return count;
+}
+static DEVICE_ATTR_RW(nightmode);
+
+static struct attribute *ktd20xx_led_controller_attrs[] = {
+ &dev_attr_nightmode.attr,
+ NULL
+};
+ATTRIBUTE_GROUPS(ktd20xx_led_controller);
+
+static int ktd20xx_probe(struct i2c_client *client)
+{
+ unsigned int chip_rev;
+ struct ktd20xx *chip;
+ unsigned int chip_id;
+ unsigned int vendor;
+ struct device *dev;
+ int ret;
+
+ chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
+ if (!chip)
+ return -ENOMEM;
+
+ mutex_init(&chip->lock);
+ chip->client = client;
+ dev = &client->dev;
+ i2c_set_clientdata(client, chip);
+
+ chip->regmap = devm_regmap_init_i2c(client, &ktd20xx_regmap_config);
+ if (IS_ERR(chip->regmap)) {
+ return dev_err_probe(dev, PTR_ERR(chip->regmap),
+ "Failed to allocate register map\n");
+ }
+
+ chip->control_mode = devm_regmap_field_alloc(dev, chip->regmap,
+ kt20xx_control_mode);
+ chip->faderate = devm_regmap_field_alloc(dev, chip->regmap,
+ kt20xx_faderate);
+ chip->vendor = devm_regmap_field_alloc(dev, chip->regmap,
+ kt20xx_vendor);
+ chip->chip_id = devm_regmap_field_alloc(dev, chip->regmap,
+ kt20xx_chip_id);
+ chip->chip_rev = devm_regmap_field_alloc(dev, chip->regmap,
+ kt20xx_chip_rev);
+
+ /* Reset all registers to hardware device default settings */
+ regmap_field_write(chip->control_mode, CONTROL_MODE_RESET);
+
+ ret = regmap_field_read(chip->vendor, &vendor);
+ if (ret)
+ return dev_err_probe(dev, ret, "Failed to read vendor\n");
+
+ ret = regmap_field_read(chip->chip_id, &chip_id);
+ if (ret)
+ return dev_err_probe(dev, ret, "Failed to read chip id\n");
+
+ ret = regmap_field_read(chip->chip_rev, &chip_rev);
+ if (ret)
+ return dev_err_probe(dev, ret, "Failed to read chip rev\n");
+
+ dev_dbg(dev, "vendor: 0x%02x chip-id: 0x%02x chip-rev: 0x%02x\n",
+ vendor, chip_id, chip_rev);
+
+ ret = ktd20xx_probe_dt(chip);
+ if (ret)
+ return ret;
+
+ ret = ktd20xx_hwinit(chip);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int ktd20xx_remove(struct i2c_client *client)
+{
+ struct ktd20xx *chip = i2c_get_clientdata(client);
+
+ mutex_lock(&chip->lock);
+ regmap_field_write(chip->control_mode, CONTROL_MODE_OFF);
+ mutex_unlock(&chip->lock);
+
+ return 0;
+}
+
+static const struct i2c_device_id ktd20xx_id[] = {
+ { "ktd20xx", 0 },
+ {}
+};
+MODULE_DEVICE_TABLE(i2c, ktd20xx_id);
+
+static const struct of_device_id of_ktd20xx_leds_match[] = {
+ { .compatible = "kinetic,ktd20xx", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, of_ktd20xx_leds_match);
+
+static struct i2c_driver ktd20xx_driver = {
+ .driver = {
+ .name = "ktd20xx",
+ .dev_groups = ktd20xx_led_controller_groups,
+ .of_match_table = of_ktd20xx_leds_match,
+ },
+ .probe_new = ktd20xx_probe,
+ .remove = ktd20xx_remove,
+ .id_table = ktd20xx_id,
+};
+module_i2c_driver(ktd20xx_driver);
+
+MODULE_DESCRIPTION("Kinetic KTD20xx LED driver");
+MODULE_AUTHOR("Florian Eckert <fe@dev.tdt.de>");
+MODULE_LICENSE("GPL v2");
--
2.20.1
^ permalink raw reply related
* Re: [PATCH 27/27] drm: rockchip: Add VOP2 driver
From: Piotr Oniszczuk @ 2022-01-27 9:17 UTC (permalink / raw)
To: Sascha Hauer
Cc: dri-devel, linux-arm-kernel@lists.infradead.org, linux-rockchip,
devicetree@vger.kernel.org, kernel, Andy Yan, Benjamin Gaignard,
Michael Riesch, Sandy Huang, Heiko Stübner, Peter Geis
In-Reply-To: <20220126145549.617165-28-s.hauer@pengutronix.de>
Sascha,
FYI
small report regarding 4k modes support in v4:
-on rk3399 it gives me 4k screen where right vertical 1/3 part of screen is garbage
-on rk3566 my samsung 4k monitor has black screen and cycle of OSD msgs: HDMI2 connected; HDMI2 disconnected; ....
I would suggest split v4 into 2 separated series:
-VOP2 support
-HDMI 4k modes support
BTW: getting well working 4k HDMI modes on rk3399 was real story for me.
There is many different series of patches to address this - but all have some subtle issues for me (i.e. 4k HDMI modes works but i.e. Qt is failing with DRM atomic commits in EGLFS)
I developed well working [1] giving me reliable 4k on rk3399 (including working Qt DRM drawing in EGLFS mode)
Maybe it will be somehow helpful to get 4k modes solution for rk3566 _and_ rk3399 (on single kernel binary)?
[1] https://github.com/warpme/minimyth2/blob/master/script/kernel/linux-5.16/files/0730-drm-rockchip-add-4k-videomodes-support.patch
br
> Wiadomość napisana przez Sascha Hauer <s.hauer@pengutronix.de> w dniu 26.01.2022, o godz. 15:55:
>
> From: Andy Yan <andy.yan@rock-chips.com>
>
> The VOP2 unit is found on Rockchip SoCs beginning with rk3566/rk3568.
> It replaces the VOP unit found in the older Rockchip SoCs.
>
> This driver has been derived from the downstream Rockchip Kernel and
> heavily modified:
>
> - All nonstandard DRM properties have been removed
> - dropped struct vop2_plane_state and pass around less data between
> functions
> - Dropped all DRM_FORMAT_* not known on upstream
> - rework register access to get rid of excessively used macros
> - Drop all waiting for framesyncs
>
> The driver is tested with HDMI and MIPI-DSI display on a RK3568-EVB
> board. Overlay support is tested with the modetest utility. AFBC support
> on the cluster windows is tested with weston-simple-dmabuf-egl on
> weston using the (yet to be upstreamed) panfrost driver support.
>
> Changes since v3:
> - Sort includes
> - fix typos
> - Drop spinlock
> - Use regmap_set_bits()/regmap_clear_bits()
> - simplify vop2_scale_factor()
> - simplify vop2_afbc_transform_offset()
>
^ permalink raw reply
* Re: [PATCH v1, 7/8] media: uapi: Init VP9 stateless decode params
From: Chen-Yu Tsai @ 2022-01-27 9:23 UTC (permalink / raw)
To: Yunfei Dong, Andrzej Pietrasiewicz
Cc: Alexandre Courbot, Hans Verkuil, Tzung-Bi Shih,
AngeloGioacchino Del Regno, Tiffany Lin, Andrew-CT Chen,
Mauro Carvalho Chehab, Rob Herring, Matthias Brugger, Tomasz Figa,
George Sun, Xiaoyong Lu, Hsin-Yi Wang, Fritz Koenig,
Dafna Hirschfeld, Benjamin Gaignard, Daniel Vetter, dri-devel,
Irui Wang, Steve Cho, linux-media, devicetree, linux-kernel,
linux-arm-kernel, srv_heupstream, linux-mediatek,
Project_Global_Chrome_Upstream_Group
In-Reply-To: <20220127025544.10854-8-yunfei.dong@mediatek.com>
Hi,
On Thu, Jan 27, 2022 at 10:56 AM Yunfei Dong <yunfei.dong@mediatek.com> wrote:
>
> Init some of VP9 frame decode params to default value.
>
> Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>
Maybe add
Fixes: b88dbe38dca8 ("media: uapi: Add VP9 stateless decoder controls")
> ---
> drivers/media/v4l2-core/v4l2-ctrls-core.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/media/v4l2-core/v4l2-ctrls-core.c b/drivers/media/v4l2-core/v4l2-ctrls-core.c
> index 54abe5245dcc..b25c77b8a445 100644
> --- a/drivers/media/v4l2-core/v4l2-ctrls-core.c
> +++ b/drivers/media/v4l2-core/v4l2-ctrls-core.c
> @@ -112,6 +112,7 @@ static void std_init_compound(const struct v4l2_ctrl *ctrl, u32 idx,
> struct v4l2_ctrl_mpeg2_picture *p_mpeg2_picture;
> struct v4l2_ctrl_mpeg2_quantisation *p_mpeg2_quant;
> struct v4l2_ctrl_vp8_frame *p_vp8_frame;
> + struct v4l2_ctrl_vp9_frame *p_vp9_frame;
> struct v4l2_ctrl_fwht_params *p_fwht_params;
> void *p = ptr.p + idx * ctrl->elem_size;
>
> @@ -152,6 +153,13 @@ static void std_init_compound(const struct v4l2_ctrl *ctrl, u32 idx,
> p_vp8_frame = p;
> p_vp8_frame->num_dct_parts = 1;
> break;
> + case V4L2_CTRL_TYPE_VP9_FRAME:
> + p_vp9_frame = p;
> + p_vp9_frame->profile = 0;
> + p_vp9_frame->bit_depth = 8;
> + p_vp9_frame->flags |= V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING |
> + V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING;
> + break;
> case V4L2_CTRL_TYPE_FWHT_PARAMS:
> p_fwht_params = p;
> p_fwht_params->version = V4L2_FWHT_VERSION;
> --
> 2.25.1
>
^ permalink raw reply
* Re: [PATCH 1/2] arm64: dts: mt8192: add PWRAP node
From: Macpaul Lin @ 2022-01-27 9:32 UTC (permalink / raw)
To: Hui-Liu Liu, lee.jones, robh+dt, matthias.bgg, lgirdwood, broonie,
eddie.huang, a.zummo, alexandre.belloni, fshao
Cc: srv_heupstream, zhiyong.tao, hsin-hsiung.wang, sean.wang,
yuchen.huang, wen.su, devicetree, linux-arm-kernel,
linux-mediatek, linux-kernel, linux-rtc,
Project_Global_Chrome_Upstream_Group, Wens Tsai, Fabien Parent,
Rex-BC Chen
In-Reply-To: <20220127063145.13413-2-hui.liu@mediatek.com>
On 1/27/22 2:31 PM, Hui-Liu Liu wrote:
> From: Hui Liu <hui.liu@mediatek.com>
>
> Add pwrap node.
>
> Signed-off-by: Hui Liu <hui.liu@mediatek.com>
> ---
> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index 53d790c335f9..9ef33dbf7a73 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -316,6 +316,18 @@ systimer: timer@10017000 {
> clock-names = "clk13m";
> };
>
> + pwrap: pwrap@10026000 {
> + compatible = "mediatek,mt6873-pwrap";
> + reg = <0 0x10026000 0 0x1000>;
> + reg-names = "pwrap";
> + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 0>;
> + clocks = <&infracfg CLK_INFRA_PMIC_AP>,
> + <&infracfg CLK_INFRA_PMIC_TMR>;
> + clock-names = "spi", "wrap";
> + assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>;
> + assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>;
> + };
> +
> scp_adsp: clock-controller@10720000 {
> compatible = "mediatek,mt8192-scp_adsp";
> reg = <0 0x10720000 0 0x1000>;
>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Regards,
Macpaul Lin
^ permalink raw reply
* Re: [PATCH 2/2] arm64: dts: mt6359: add PMIC MT6359 related nodes
From: Macpaul Lin @ 2022-01-27 9:33 UTC (permalink / raw)
To: Hui-Liu Liu, lee.jones, robh+dt, matthias.bgg, lgirdwood, broonie,
eddie.huang, a.zummo, alexandre.belloni, fshao
Cc: srv_heupstream, zhiyong.tao, hsin-hsiung.wang, sean.wang,
yuchen.huang, wen.su, devicetree, linux-arm-kernel,
linux-mediatek, linux-kernel, linux-rtc,
Project_Global_Chrome_Upstream_Group, Fabien Parent, Macpaul Lin,
Pablo Sun, Rex-BC Chen
In-Reply-To: <20220127063145.13413-3-hui.liu@mediatek.com>
On 1/27/22 2:31 PM, Hui-Liu Liu wrote:
> From: Hui Liu <hui.liu@mediatek.com>
>
> Add MT6359 node.
>
> Signed-off-by: Hui Liu <hui.liu@mediatek.com>
> ---
> arch/arm64/boot/dts/mediatek/mt6359.dtsi | 298 ++++++++++++++++++++
> arch/arm64/boot/dts/mediatek/mt8192-evb.dts | 1 +
> 2 files changed, 299 insertions(+)
> create mode 100644 arch/arm64/boot/dts/mediatek/mt6359.dtsi
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt6359.dtsi b/arch/arm64/boot/dts/mediatek/mt6359.dtsi
> new file mode 100644
> index 000000000000..df3e822232d3
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt6359.dtsi
> @@ -0,0 +1,298 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright (C) 2022 MediaTek Inc.
> + */
> +
> +&pwrap {
> + pmic: pmic {
> + compatible = "mediatek,mt6359";
> + interrupt-controller;
> + #interrupt-cells = <2>;
> +
> + mt6359codec: mt6359codec {
> + };
> +
> + regulators {
> + mt6359_vs1_buck_reg: buck_vs1 {
> + regulator-name = "vs1";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <2200000>;
> + regulator-enable-ramp-delay = <0>;
> + regulator-always-on;
> + };
> + mt6359_vgpu11_buck_reg: buck_vgpu11 {
> + regulator-name = "vgpu11";
> + regulator-min-microvolt = <400000>;
> + regulator-max-microvolt = <1193750>;
> + regulator-ramp-delay = <5000>;
> + regulator-enable-ramp-delay = <200>;
> + regulator-allowed-modes = <0 1 2>;
> + };
> + mt6359_vmodem_buck_reg: buck_vmodem {
> + regulator-name = "vmodem";
> + regulator-min-microvolt = <400000>;
> + regulator-max-microvolt = <1100000>;
> + regulator-ramp-delay = <10760>;
> + regulator-enable-ramp-delay = <200>;
> + };
> + mt6359_vpu_buck_reg: buck_vpu {
> + regulator-name = "vpu";
> + regulator-min-microvolt = <400000>;
> + regulator-max-microvolt = <1193750>;
> + regulator-ramp-delay = <5000>;
> + regulator-enable-ramp-delay = <200>;
> + regulator-allowed-modes = <0 1 2>;
> + };
> + mt6359_vcore_buck_reg: buck_vcore {
> + regulator-name = "vcore";
> + regulator-min-microvolt = <400000>;
> + regulator-max-microvolt = <1300000>;
> + regulator-ramp-delay = <5000>;
> + regulator-enable-ramp-delay = <200>;
> + regulator-allowed-modes = <0 1 2>;
> + };
> + mt6359_vs2_buck_reg: buck_vs2 {
> + regulator-name = "vs2";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1600000>;
> + regulator-enable-ramp-delay = <0>;
> + regulator-always-on;
> + };
> + mt6359_vpa_buck_reg: buck_vpa {
> + regulator-name = "vpa";
> + regulator-min-microvolt = <500000>;
> + regulator-max-microvolt = <3650000>;
> + regulator-enable-ramp-delay = <300>;
> + };
> + mt6359_vproc2_buck_reg: buck_vproc2 {
> + regulator-name = "vproc2";
> + regulator-min-microvolt = <400000>;
> + regulator-max-microvolt = <1193750>;
> + regulator-ramp-delay = <7500>;
> + regulator-enable-ramp-delay = <200>;
> + regulator-allowed-modes = <0 1 2>;
> + };
> + mt6359_vproc1_buck_reg: buck_vproc1 {
> + regulator-name = "vproc1";
> + regulator-min-microvolt = <400000>;
> + regulator-max-microvolt = <1193750>;
> + regulator-ramp-delay = <7500>;
> + regulator-enable-ramp-delay = <200>;
> + regulator-allowed-modes = <0 1 2>;
> + };
> + mt6359_vcore_sshub_buck_reg: buck_vcore_sshub {
> + regulator-name = "vcore_sshub";
> + regulator-min-microvolt = <400000>;
> + regulator-max-microvolt = <1193750>;
> + };
> + mt6359_vgpu11_sshub_buck_reg: buck_vgpu11_sshub {
> + regulator-name = "vgpu11_sshub";
> + regulator-min-microvolt = <400000>;
> + regulator-max-microvolt = <1193750>;
> + };
> + mt6359_vaud18_ldo_reg: ldo_vaud18 {
> + regulator-name = "vaud18";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-enable-ramp-delay = <240>;
> + };
> + mt6359_vsim1_ldo_reg: ldo_vsim1 {
> + regulator-name = "vsim1";
> + regulator-min-microvolt = <1700000>;
> + regulator-max-microvolt = <3100000>;
> + };
> + mt6359_vibr_ldo_reg: ldo_vibr {
> + regulator-name = "vibr";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <3300000>;
> + };
> + mt6359_vrf12_ldo_reg: ldo_vrf12 {
> + regulator-name = "vrf12";
> + regulator-min-microvolt = <1100000>;
> + regulator-max-microvolt = <1300000>;
> + };
> + mt6359_vusb_ldo_reg: ldo_vusb {
> + regulator-name = "vusb";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> + regulator-enable-ramp-delay = <960>;
> + regulator-always-on;
> + };
> + mt6359_vsram_proc2_ldo_reg: ldo_vsram_proc2 {
> + regulator-name = "vsram_proc2";
> + regulator-min-microvolt = <500000>;
> + regulator-max-microvolt = <1293750>;
> + regulator-ramp-delay = <7500>;
> + regulator-enable-ramp-delay = <240>;
> + regulator-always-on;
> + };
> + mt6359_vio18_ldo_reg: ldo_vio18 {
> + regulator-name = "vio18";
> + regulator-min-microvolt = <1700000>;
> + regulator-max-microvolt = <1900000>;
> + regulator-enable-ramp-delay = <960>;
> + regulator-always-on;
> + };
> + mt6359_vcamio_ldo_reg: ldo_vcamio {
> + regulator-name = "vcamio";
> + regulator-min-microvolt = <1700000>;
> + regulator-max-microvolt = <1900000>;
> + };
> + mt6359_vcn18_ldo_reg: ldo_vcn18 {
> + regulator-name = "vcn18";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-enable-ramp-delay = <240>;
> + };
> + mt6359_vfe28_ldo_reg: ldo_vfe28 {
> + regulator-name = "vfe28";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + regulator-enable-ramp-delay = <120>;
> + };
> + mt6359_vcn13_ldo_reg: ldo_vcn13 {
> + regulator-name = "vcn13";
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <1300000>;
> + };
> + mt6359_vcn33_1_bt_ldo_reg: ldo_vcn33_1_bt {
> + regulator-name = "vcn33_1_bt";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <3500000>;
> + };
> + mt6359_vcn33_1_wifi_ldo_reg: ldo_vcn33_1_wifi {
> + regulator-name = "vcn33_1_wifi";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <3500000>;
> + };
> + mt6359_vaux18_ldo_reg: ldo_vaux18 {
> + regulator-name = "vaux18";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-enable-ramp-delay = <240>;
> + regulator-always-on;
> + };
> + mt6359_vsram_others_ldo_reg: ldo_vsram_others {
> + regulator-name = "vsram_others";
> + regulator-min-microvolt = <500000>;
> + regulator-max-microvolt = <1293750>;
> + regulator-ramp-delay = <5000>;
> + regulator-enable-ramp-delay = <240>;
> + };
> + mt6359_vefuse_ldo_reg: ldo_vefuse {
> + regulator-name = "vefuse";
> + regulator-min-microvolt = <1700000>;
> + regulator-max-microvolt = <2000000>;
> + };
> + mt6359_vxo22_ldo_reg: ldo_vxo22 {
> + regulator-name = "vxo22";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <2200000>;
> + regulator-always-on;
> + };
> + mt6359_vrfck_ldo_reg: ldo_vrfck {
> + regulator-name = "vrfck";
> + regulator-min-microvolt = <1500000>;
> + regulator-max-microvolt = <1700000>;
> + };
> + mt6359_vrfck_1_ldo_reg: ldo_vrfck_1 {
> + regulator-name = "vrfck";
> + regulator-min-microvolt = <1240000>;
> + regulator-max-microvolt = <1600000>;
> + };
> + mt6359_vbif28_ldo_reg: ldo_vbif28 {
> + regulator-name = "vbif28";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + regulator-enable-ramp-delay = <240>;
> + };
> + mt6359_vio28_ldo_reg: ldo_vio28 {
> + regulator-name = "vio28";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> + mt6359_vemc_ldo_reg: ldo_vemc {
> + regulator-name = "vemc";
> + regulator-min-microvolt = <2900000>;
> + regulator-max-microvolt = <3300000>;
> + };
> + mt6359_vemc_1_ldo_reg: ldo_vemc_1 {
> + regulator-name = "vemc";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <3300000>;
> + };
> + mt6359_vcn33_2_bt_ldo_reg: ldo_vcn33_2_bt {
> + regulator-name = "vcn33_2_bt";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <3500000>;
> + };
> + mt6359_vcn33_2_wifi_ldo_reg: ldo_vcn33_2_wifi {
> + regulator-name = "vcn33_2_wifi";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <3500000>;
> + };
> + mt6359_va12_ldo_reg: ldo_va12 {
> + regulator-name = "va12";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1300000>;
> + regulator-always-on;
> + };
> + mt6359_va09_ldo_reg: ldo_va09 {
> + regulator-name = "va09";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1200000>;
> + };
> + mt6359_vrf18_ldo_reg: ldo_vrf18 {
> + regulator-name = "vrf18";
> + regulator-min-microvolt = <1700000>;
> + regulator-max-microvolt = <1810000>;
> + };
> + mt6359_vsram_md_ldo_reg: ldo_vsram_md {
> + regulator-name = "vsram_md";
> + regulator-min-microvolt = <500000>;
> + regulator-max-microvolt = <1293750>;
> + regulator-ramp-delay = <10760>;
> + regulator-enable-ramp-delay = <240>;
> + };
> + mt6359_vufs_ldo_reg: ldo_vufs {
> + regulator-name = "vufs";
> + regulator-min-microvolt = <1700000>;
> + regulator-max-microvolt = <1900000>;
> + };
> + mt6359_vm18_ldo_reg: ldo_vm18 {
> + regulator-name = "vm18";
> + regulator-min-microvolt = <1700000>;
> + regulator-max-microvolt = <1900000>;
> + regulator-always-on;
> + };
> + mt6359_vbbck_ldo_reg: ldo_vbbck {
> + regulator-name = "vbbck";
> + regulator-min-microvolt = <1100000>;
> + regulator-max-microvolt = <1200000>;
> + };
> + mt6359_vsram_proc1_ldo_reg: ldo_vsram_proc1 {
> + regulator-name = "vsram_proc1";
> + regulator-min-microvolt = <500000>;
> + regulator-max-microvolt = <1293750>;
> + regulator-ramp-delay = <7500>;
> + regulator-enable-ramp-delay = <240>;
> + regulator-always-on;
> + };
> + mt6359_vsim2_ldo_reg: ldo_vsim2 {
> + regulator-name = "vsim2";
> + regulator-min-microvolt = <1700000>;
> + regulator-max-microvolt = <3100000>;
> + };
> + mt6359_vsram_others_sshub_ldo: ldo_vsram_others_sshub {
> + regulator-name = "vsram_others_sshub";
> + regulator-min-microvolt = <500000>;
> + regulator-max-microvolt = <1293750>;
> + };
> + };
> +
> + mt6359rtc: mt6359rtc {
> + compatible = "mediatek,mt6358-rtc";
> + };
> + };
> +};
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192-evb.dts b/arch/arm64/boot/dts/mediatek/mt8192-evb.dts
> index 0205837fa698..808be492e970 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192-evb.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt8192-evb.dts
> @@ -5,6 +5,7 @@
> */
> /dts-v1/;
> #include "mt8192.dtsi"
> +#include "mt6359.dtsi"
>
> / {
> model = "MediaTek MT8192 evaluation board";
>
Reviewed-by: Macpaul Lin Lincpaul.lin@mediatek.com>
Regards,
Macpaul Lin
^ permalink raw reply
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