* [PATCH 9/9] arm64: dts: hisilicon: hi6220: correct tsensor unit addresses
From: Krzysztof Kozlowski @ 2024-04-02 19:31 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-kernel, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240402193148.62323-1-krzk@kernel.org>
Correct unit address to fix dtc W=1 warnings:
hi6220.dtsi:855.31-862.5: Warning (simple_bus_reg): /soc/tsensor@0,f7030700: simple-bus unit address format error, expected "f7030700"
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index be808bb2544e..a589954c29e2 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -852,7 +852,7 @@ watchdog0: watchdog@f8005000 {
clock-names = "wdog_clk", "apb_pclk";
};
- tsensor: tsensor@0,f7030700 {
+ tsensor: tsensor@f7030700 {
compatible = "hisilicon,tsensor";
reg = <0x0 0xf7030700 0x0 0x1000>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
--
2.34.1
^ permalink raw reply related
* [PATCH 0/2] mfd: Add ROHM BD71879
From: Andreas Kemnade @ 2024-04-02 19:35 UTC (permalink / raw)
To: lee, robh+dt, krzysztof.kozlowski+dt, conor+dt, mazziesaccount,
devicetree, linux-kernel
Cc: Andreas Kemnade
Add software-compatible variant of the BD71828.
Andreas Kemnade (2):
dt-bindings: mfd: Add ROHM BD71879
mfd: rohm-bd71828: Add software-compatible variant BD71879
Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml | 4 +++-
drivers/mfd/rohm-bd71828.c | 4 ++++
2 files changed, 7 insertions(+), 1 deletion(-)
--
2.39.2
^ permalink raw reply
* [PATCH 2/2] mfd: rohm-bd71828: Add software-compatible variant BD71879
From: Andreas Kemnade @ 2024-04-02 19:35 UTC (permalink / raw)
To: lee, robh+dt, krzysztof.kozlowski+dt, conor+dt, mazziesaccount,
devicetree, linux-kernel
Cc: Andreas Kemnade
In-Reply-To: <20240402193515.513713-1-andreas@kemnade.info>
Add the BD71879 PMIC which is software-compatible to the BD71828, so reuse
the same device_type enum.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Suggested-by: Matti Vaittinen <mazziesaccount@gmail.com>
---
drivers/mfd/rohm-bd71828.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/mfd/rohm-bd71828.c b/drivers/mfd/rohm-bd71828.c
index 4a1fa8a0d76a..f0b444690d4d 100644
--- a/drivers/mfd/rohm-bd71828.c
+++ b/drivers/mfd/rohm-bd71828.c
@@ -585,6 +585,10 @@ static const struct of_device_id bd71828_of_match[] = {
{
.compatible = "rohm,bd71828",
.data = (void *)ROHM_CHIP_TYPE_BD71828,
+ }, {
+ .compatible = "rohm,bd71879",
+ /* equivalent from a software point of view */
+ .data = (void *)ROHM_CHIP_TYPE_BD71828,
}, {
.compatible = "rohm,bd71815",
.data = (void *)ROHM_CHIP_TYPE_BD71815,
--
2.39.2
^ permalink raw reply related
* [PATCH 1/2] dt-bindings: mfd: Add ROHM BD71879
From: Andreas Kemnade @ 2024-04-02 19:35 UTC (permalink / raw)
To: lee, robh+dt, krzysztof.kozlowski+dt, conor+dt, mazziesaccount,
devicetree, linux-kernel
Cc: Andreas Kemnade
In-Reply-To: <20240402193515.513713-1-andreas@kemnade.info>
As this chip was seen in several devices in the wild, add it.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Suggested-by: Matti Vaittinen <mazziesaccount@gmail.com>
---
Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml
index 0b62f854bf6b..e4df09e8961c 100644
--- a/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml
+++ b/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml
@@ -17,7 +17,9 @@ description: |
properties:
compatible:
- const: rohm,bd71828
+ enum:
+ - rohm,bd71828
+ - rohm,bd71879
reg:
description:
--
2.39.2
^ permalink raw reply related
* Re: [PATCH v4 2/5] soc: qcom: llcc: Add regmap for Broadcast_AND region
From: Unnathi Chalicheemala @ 2024-04-02 19:34 UTC (permalink / raw)
To: Krzysztof Kozlowski, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, kernel
In-Reply-To: <d6b0f9d2-a489-4c0e-9c77-0e3eab49d3cb@linaro.org>
On 3/30/2024 4:46 AM, Krzysztof Kozlowski wrote:
> On 29/03/2024 22:53, Unnathi Chalicheemala wrote:
>> Define new regmap structure for Broadcast_AND region and initialize
>> this regmap when HW block version is greater than 4.1, otherwise
>> initialize as a NULL pointer for backwards compatibility.
>>
>
>> + struct regmap *regmap;
>> u32 act_ctrl_reg;
>> u32 act_clear_reg;
>> u32 status_reg;
>> @@ -849,7 +850,8 @@ static int llcc_update_act_ctrl(u32 sid,
>> return ret;
>>
>> if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
>> - ret = regmap_read_poll_timeout(drv_data->bcast_regmap, status_reg,
>> + regmap = drv_data->bcast_and_regmap ?: drv_data->bcast_regmap;
>> + ret = regmap_read_poll_timeout(regmap, status_reg,
>> slice_status, (slice_status & ACT_COMPLETE),
>> 0, LLCC_STATUS_READ_DELAY);
>> if (ret)
>> @@ -1284,6 +1286,16 @@ static int qcom_llcc_probe(struct platform_device *pdev)
>>
>> drv_data->version = version;
>>
>> + /* Applicable only when drv_data->version >= 4.1 */
>> + drv_data->bcast_and_regmap = qcom_llcc_init_mmio(pdev, i + 1, "llcc_broadcast_and_base");
>> + if (IS_ERR(drv_data->bcast_and_regmap)) {
>
> I am pretty sure this breaks all users. Can you please explain how do
> you maintain ABI and that IS_ERR() is applied only for version >= 4.1?
>
> Best regards,
> Krzysztof
>
IS_ERR() check is done for all versions.
If new register isn't defined in DT(for version < 4.1) it simply sets bcast_and_regmap to NULL.
Otherwise, for version >= 4.1, it goes to err(in the case bcast_and_regmap isn't set properly).
Thank you for reviewing Krzysztof!
^ permalink raw reply
* [PATCH v1 0/4] arm64: dts: freescale: Add Toradex Colibri iMX8DX
From: Hiago De Franco @ 2024-04-02 19:35 UTC (permalink / raw)
To: Shawn Guo
Cc: Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Hiago De Franco, imx,
linux-arm-kernel, devicetree, linux-kernel
From: Hiago De Franco <hiago.franco@toradex.com>
This patch series introduces support for Colibri iMX8DX SoM and its
carrier boards, where the board can be mated with: Aster, Evaluation Board
v3, Iris v2, and Iris v1. This SoM is a variant of the already supported
Colibri iMX8QXP, utilizing an NXP i.MX8DX SoC instead of i.MX8QXP.
Therefore, this patch series also adds support for the i.MX8DX processor.
Hiago De Franco (4):
arm64: dts: freescale: Add i.MX8DX dtsi
dt-bindings: arm: fsl: remove reduntant toradex,colibri-imx8x
dt-bindings: arm: fsl: Add Colibri iMX8DX
arm64: dts: freescale: Add Toradex Colibri iMX8DX
Documentation/devicetree/bindings/arm/fsl.yaml | 7 ++++---
arch/arm64/boot/dts/freescale/Makefile | 4 ++++
.../boot/dts/freescale/imx8dx-colibri-aster.dts | 16 ++++++++++++++++
.../dts/freescale/imx8dx-colibri-eval-v3.dts | 16 ++++++++++++++++
.../dts/freescale/imx8dx-colibri-iris-v2.dts | 16 ++++++++++++++++
.../boot/dts/freescale/imx8dx-colibri-iris.dts | 16 ++++++++++++++++
.../arm64/boot/dts/freescale/imx8dx-colibri.dtsi | 11 +++++++++++
arch/arm64/boot/dts/freescale/imx8dx.dtsi | 13 +++++++++++++
8 files changed, 96 insertions(+), 3 deletions(-)
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx-colibri-aster.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx-colibri-eval-v3.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx-colibri-iris-v2.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx-colibri-iris.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx-colibri.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx.dtsi
--
2.39.2
^ permalink raw reply
* [PATCH v1 1/4] arm64: dts: freescale: Add i.MX8DX dtsi
From: Hiago De Franco @ 2024-04-02 19:35 UTC (permalink / raw)
To: Shawn Guo
Cc: Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Hiago De Franco, imx,
linux-arm-kernel, devicetree, linux-kernel
In-Reply-To: <20240402193512.240417-1-hiagofranco@gmail.com>
From: Hiago De Franco <hiago.franco@toradex.com>
Add DTSI for i.MX8DX processor. According to 'i.MX 8DualX Industrial
Applications Processors Data Sheet', the GPU and shader use a clock of
372MHz. Therefore, this dtsi includes the imx8dxp.dtsi and changes the
clock accordingly.
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
---
arch/arm64/boot/dts/freescale/imx8dx.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx.dtsi
diff --git a/arch/arm64/boot/dts/freescale/imx8dx.dtsi b/arch/arm64/boot/dts/freescale/imx8dx.dtsi
new file mode 100644
index 000000000000..ce76efc1a041
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8dx.dtsi
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017-2020 NXP
+ */
+
+/dts-v1/;
+
+#include "imx8dxp.dtsi"
+
+&gpu_3d0 {
+ assigned-clock-rates = <372000000>, <372000000>;
+};
--
2.39.2
^ permalink raw reply related
* [PATCH v1 2/4] dt-bindings: arm: fsl: remove reduntant toradex,colibri-imx8x
From: Hiago De Franco @ 2024-04-02 19:35 UTC (permalink / raw)
To: Shawn Guo
Cc: Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Hiago De Franco, imx,
linux-arm-kernel, devicetree, linux-kernel
In-Reply-To: <20240402193512.240417-1-hiagofranco@gmail.com>
From: Hiago De Franco <hiago.franco@toradex.com>
'toradex,colibri-imx8x' is already present as a constant value for
'i.MX8QP Board with Toradex Colibri iMX8X Modules', so there is no need
to keep it twice as a enum value for 'i.MX8QXP based Boards'.
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 -
1 file changed, 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 0027201e19f8..6fdfa10af43c 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -1218,7 +1218,6 @@ properties:
- enum:
- einfochips,imx8qxp-ai_ml # i.MX8QXP AI_ML Board
- fsl,imx8qxp-mek # i.MX8QXP MEK Board
- - toradex,colibri-imx8x # Colibri iMX8X Modules
- const: fsl,imx8qxp
- description: i.MX8DXL based Boards
--
2.39.2
^ permalink raw reply related
* [PATCH v1 3/4] dt-bindings: arm: fsl: Add Colibri iMX8DX
From: Hiago De Franco @ 2024-04-02 19:35 UTC (permalink / raw)
To: Shawn Guo
Cc: Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Hiago De Franco, imx,
linux-arm-kernel, devicetree, linux-kernel
In-Reply-To: <20240402193512.240417-1-hiagofranco@gmail.com>
From: Hiago De Franco <hiago.franco@toradex.com>
Add support for Toradex Colibri iMX8DX SoM. As the i.MX8QXP variant is
already supported, update the description with i.MX8DX and add
'fsl,imx8dx' item as well.
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 6fdfa10af43c..f872c6ae151e 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -1226,7 +1226,7 @@ properties:
- fsl,imx8dxl-evk # i.MX8DXL EVK Board
- const: fsl,imx8dxl
- - description: i.MX8QXP Boards with Toradex Colibri iMX8X Modules
+ - description: i.MX8QXP/i.MX8DX Boards with Toradex Colibri iMX8X Modules
items:
- enum:
- toradex,colibri-imx8x-aster # Colibri iMX8X Module on Aster Board
@@ -1234,7 +1234,9 @@ properties:
- toradex,colibri-imx8x-iris # Colibri iMX8X Module on Iris Board
- toradex,colibri-imx8x-iris-v2 # Colibri iMX8X Module on Iris Board V2
- const: toradex,colibri-imx8x
- - const: fsl,imx8qxp
+ - enum:
+ - fsl,imx8qxp
+ - fsl,imx8dx
- description:
TQMa8Xx is a series of SOM featuring NXP i.MX8X system-on-chip
--
2.39.2
^ permalink raw reply related
* [PATCH v1 4/4] arm64: dts: freescale: Add Toradex Colibri iMX8DX
From: Hiago De Franco @ 2024-04-02 19:35 UTC (permalink / raw)
To: Shawn Guo
Cc: Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Hiago De Franco, imx,
linux-arm-kernel, devicetree, linux-kernel
In-Reply-To: <20240402193512.240417-1-hiagofranco@gmail.com>
From: Hiago De Franco <hiago.franco@toradex.com>
Add support for Toradex Colibri iMX8DX SoM and Aster, Evaluation Board v3,
Iris and Iris v2 carrier boards the module can be mated in.
This SoM is a variant of the already supported Colibri iMX8QXP, using an
NXP i.MX8DX SoC instead of i.MX8QXP.
Link: https://www.toradex.com/computer-on-modules/colibri-arm-family/nxp-imx-8x
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
---
arch/arm64/boot/dts/freescale/Makefile | 4 ++++
.../boot/dts/freescale/imx8dx-colibri-aster.dts | 16 ++++++++++++++++
.../dts/freescale/imx8dx-colibri-eval-v3.dts | 16 ++++++++++++++++
.../dts/freescale/imx8dx-colibri-iris-v2.dts | 16 ++++++++++++++++
.../boot/dts/freescale/imx8dx-colibri-iris.dts | 16 ++++++++++++++++
.../arm64/boot/dts/freescale/imx8dx-colibri.dtsi | 11 +++++++++++
6 files changed, 79 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx-colibri-aster.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx-colibri-eval-v3.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx-colibri-iris-v2.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx-colibri-iris.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx-colibri.dtsi
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 045250d0a040..cf221a862cf7 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -98,6 +98,10 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-tqmlx2160a-mblx2160a-14-11-x.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-tqmlx2160a-mblx2160a-14-8-x.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-tqmlx2160a-mblx2160a-14-7-x.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8dx-colibri-aster.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8dx-colibri-eval-v3.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8dx-colibri-iris-v2.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8dx-colibri-iris.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8dxl-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8dxp-tqma8xdp-mba8xx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8dx-colibri-aster.dts b/arch/arm64/boot/dts/freescale/imx8dx-colibri-aster.dts
new file mode 100644
index 000000000000..c974f5dc0283
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8dx-colibri-aster.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2018-2021 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx8dx-colibri.dtsi"
+#include "imx8x-colibri-aster.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX8DX on Aster Board";
+ compatible = "toradex,colibri-imx8x-aster",
+ "toradex,colibri-imx8x",
+ "fsl,imx8dx";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8dx-colibri-eval-v3.dts b/arch/arm64/boot/dts/freescale/imx8dx-colibri-eval-v3.dts
new file mode 100644
index 000000000000..f2bf15463ae8
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8dx-colibri-eval-v3.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2018-2021 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx8dx-colibri.dtsi"
+#include "imx8x-colibri-eval-v3.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX8DX on Colibri Evaluation Board V3";
+ compatible = "toradex,colibri-imx8x-eval-v3",
+ "toradex,colibri-imx8x",
+ "fsl,imx8dx";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris-v2.dts b/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris-v2.dts
new file mode 100644
index 000000000000..fd425c70cf2b
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris-v2.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2018-2021 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx8dx-colibri.dtsi"
+#include "imx8x-colibri-iris-v2.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX8DX on Colibri Iris V2 Board";
+ compatible = "toradex,colibri-imx8x-iris-v2",
+ "toradex,colibri-imx8x",
+ "fsl,imx8dx";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris.dts b/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris.dts
new file mode 100644
index 000000000000..e5e2346ce4f1
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2018-2021 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx8dx-colibri.dtsi"
+#include "imx8x-colibri-iris.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX8DX on Colibri Iris Board";
+ compatible = "toradex,colibri-imx8x-iris",
+ "toradex,colibri-imx8x",
+ "fsl,imx8dx";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8dx-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8dx-colibri.dtsi
new file mode 100644
index 000000000000..66b0fcc6687d
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8dx-colibri.dtsi
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2018-2021 Toradex
+ */
+
+#include "imx8dx.dtsi"
+#include "imx8x-colibri.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX8DX Module";
+};
--
2.39.2
^ permalink raw reply related
* [PATCH 1/2] arm64: dts: cavium: move non-MMIO node out of soc
From: Krzysztof Kozlowski @ 2024-04-02 19:41 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, devicetree,
linux-kernel
Cc: Krzysztof Kozlowski
Non-MMIO devices, which are BTW not really part of the SoC, should not
be within simple-bus, as reported by dtc W=1 warning:
thunder-88xx.dtsi:374.28-379.5: Warning (simple_bus_reg): /soc/refclk50mhz: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
index 8ad31dee11a3..e29e878ee120 100644
--- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
+++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
@@ -365,19 +365,19 @@ pmu {
interrupts = <1 7 4>;
};
+ refclk50mhz: refclk50mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ clock-output-names = "refclk50mhz";
+ };
+
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
- refclk50mhz: refclk50mhz {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <50000000>;
- clock-output-names = "refclk50mhz";
- };
-
gic0: interrupt-controller@8010,00000000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
--
2.34.1
^ permalink raw reply related
* [PATCH 2/2] arm64: dts: cavium: correct unit addresses
From: Krzysztof Kozlowski @ 2024-04-02 19:41 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, devicetree,
linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240402194129.69481-1-krzk@kernel.org>
Correct several nodes' unit addresses to fix dtc W=1 warnings:
thunder-88xx.dtsi:381.44-398.5: Warning (simple_bus_reg): /soc/interrupt-controller@8010,00000000: simple-bus unit address format error, expected "801000000000"
thunder-88xx.dtsi:400.30-406.5: Warning (simple_bus_reg): /soc/serial@87e0,24000000: simple-bus unit address format error, expected "87e024000000"
thunder-88xx.dtsi:408.30-414.5: Warning (simple_bus_reg): /soc/serial@87e0,25000000: simple-bus unit address format error, expected "87e025000000"
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
index e29e878ee120..2e65ea715800 100644
--- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
+++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
@@ -378,7 +378,7 @@ soc {
#size-cells = <2>;
ranges;
- gic0: interrupt-controller@8010,00000000 {
+ gic0: interrupt-controller@801000000000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
#address-cells = <2>;
@@ -397,7 +397,7 @@ its: msi-controller@801000020000 {
};
};
- uaa0: serial@87e0,24000000 {
+ uaa0: serial@87e024000000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x87e0 0x24000000 0x0 0x1000>;
interrupts = <1 21 4>;
@@ -405,7 +405,7 @@ uaa0: serial@87e0,24000000 {
clock-names = "apb_pclk";
};
- uaa1: serial@87e0,25000000 {
+ uaa1: serial@87e025000000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x87e0 0x25000000 0x0 0x1000>;
interrupts = <1 22 4>;
--
2.34.1
^ permalink raw reply related
* Re: [PATCH v23 3/3] clk: npcm8xx: add clock controller
From: Tomer Maimon @ 2024-04-02 19:42 UTC (permalink / raw)
To: Stephen Boyd
Cc: benjaminfair, joel, krzysztof.kozlowski+dt, mturquette, robh+dt,
tali.perry1, venture, yuenn, openbmc, linux-clk, linux-kernel,
devicetree
In-Reply-To: <CAP6Zq1g4ksdLSVTm+PLqa5dSEidvHdpGZb=J9wKEftaH-Mg+bw@mail.gmail.com>
Hi Stephen,
Kind remainder, appreciate if you can reply about the comment that
been sent few weeks ago.
Thanks,
Tomer
On Tue, 5 Mar 2024 at 17:59, Tomer Maimon <tmaimon77@gmail.com> wrote:
>
> Hi Stephen,
>
> Appreciate it if you could reply to my email afew days ago, It is
> really important to us to move this driver to upstream.
>
> Thanks,
>
> Tomer
>
> On Thu, 29 Feb 2024 at 23:29, Tomer Maimon <tmaimon77@gmail.com> wrote:
> >
> > Hi Stephen,
> >
> > Thanks for your reply.
> >
> > On Thu, 29 Feb 2024 at 00:48, Stephen Boyd <sboyd@kernel.org> wrote:
> > >
> > > Quoting Tomer Maimon (2024-02-25 10:00:35)
> > > > Hi Stephen,
> > > >
> > > > On Thu, 22 Feb 2024 at 07:58, Stephen Boyd <sboyd@kernel.org> wrote:
> > > > >
> > > > > Quoting Tomer Maimon (2024-01-31 10:26:53)
> > > > > > diff --git a/drivers/clk/clk-npcm8xx.c b/drivers/clk/clk-npcm8xx.c
> > > > > > new file mode 100644
> > > > > > index 000000000000..eacb579d30af
> > > > > > --- /dev/null
> > > > > > +++ b/drivers/clk/clk-npcm8xx.c
> > > > > > @@ -0,0 +1,509 @@
> > > > > > +// SPDX-License-Identifier: GPL-2.0
> > > > > > +/*
> > > > > > + * Nuvoton NPCM8xx Clock Generator
> > > > > > + * All the clocks are initialized by the bootloader, so this driver allows only
> > > > > [...]
> > > > > > +
> > > > > > +/* external clock definition */
> > > > > > +#define NPCM8XX_CLK_S_REFCLK "refclk"
> > > > > > +
> > > > > > +/* pll definition */
> > > > > > +#define NPCM8XX_CLK_S_PLL0 "pll0"
> > > > > > +#define NPCM8XX_CLK_S_PLL1 "pll1"
> > > > > > +#define NPCM8XX_CLK_S_PLL2 "pll2"
> > > > > > +#define NPCM8XX_CLK_S_PLL_GFX "pll_gfx"
> > > > > > +
> > > > > > +/* early divider definition */
> > > > > > +#define NPCM8XX_CLK_S_PLL2_DIV2 "pll2_div2"
> > > > > > +#define NPCM8XX_CLK_S_PLL_GFX_DIV2 "pll_gfx_div2"
> > > > > > +#define NPCM8XX_CLK_S_PLL1_DIV2 "pll1_div2"
> > > > > > +
> > > > > > +/* mux definition */
> > > > > > +#define NPCM8XX_CLK_S_CPU_MUX "cpu_mux"
> > > > > > +
> > > > > > +/* div definition */
> > > > > > +#define NPCM8XX_CLK_S_TH "th"
> > > > > > +#define NPCM8XX_CLK_S_AXI "axi"
> > > > >
> > > > > Please inline all these string #defines to the place they're used.
> > > > The version V21 you mention using define only when the definition is
> > > > used more than once
> > > > https://www.spinics.net/lists/kernel/msg5045826.html
> > > > Should I remove all the string definitions and add the string to the array?
> > >
> > > If it's a clk name for a clk registered in this file it should be
> > > inlined. Is that the case for everything besides refclk? And even refclk
> > > could be inlined so that we don't have to jump to the definition of a
> > > string.
> > I will add the string in the clock arrays and remove all the string definitions.
> > >
> > > > > > +
> > > > > > +static unsigned long npcm8xx_clk_div_get_parent(struct clk_hw *hw,
> > > > > > + unsigned long parent_rate)
> > > > > > +{
> > > > > > + struct npcm8xx_clk *div = to_npcm8xx_clk(hw);
> > > > > > + unsigned int val;
> > > > > > +
> > > > > > + regmap_read(div->clk_regmap, div->offset, &val);
> > > > > > + val = val >> div->shift;
> > > > > > + val &= clk_div_mask(div->width);
> > > > > > +
> > > > > > + return divider_recalc_rate(hw, parent_rate, val, NULL, div->flags,
> > > > > > + div->width);
> > > > > > +}
> > > > > > +
> > > > > > +static const struct clk_ops npcm8xx_clk_div_ops = {
> > > > > > + .recalc_rate = npcm8xx_clk_div_get_parent,
> > > > > > +};
> > > > > > +
> > > > > > +static int npcm8xx_clk_probe(struct platform_device *pdev)
> > > > > > +{
> > > > > > + struct device_node *parent_np = of_get_parent(pdev->dev.of_node);
> > > > >
> > > > > The parent of this device is not a syscon.
> > > > Once I have registered the map that handles both reset and the clock
> > > > in general is syscon, this is why we will modify the DTS so the clock
> > > > and the reset will be under syscon father node
> > > > sysctrl: system-controller@f0801000 {
> > > > compatible = "syscon", "simple-mfd";
> > > > reg = <0x0 0xf0801000 0x0 0x1000>;
> > > >
> > > > rstc: reset-controller {
> > > > compatible = "nuvoton,npcm845-reset";
> > > > reg = <0x0 0xf0801000 0x0 0xC4>;
> > > > #reset-cells = <2>;
> > > > nuvoton,sysgcr = <&gcr>;
> > > > };
> > > >
> > > > clk: clock-controller {
> > > > compatible = "nuvoton,npcm845-clk";
> > > > #clock-cells = <1>;
> > > > clocks = <&refclk>;
> > > > clock-names = "refclk";
> > > > };
> > > > };
> > > > You can see other drivers that using the same method like
> > > > https://elixir.bootlin.com/linux/v6.8-rc5/source/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml
> > >
> > > You will need a similar file like
> > > Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml
> > > then to describe the child nodes.
> > I can do it.
> > >
> > > Socionext may not be the best example to follow. I generally try to
> > > avoid syscon and simply put #reset-cells and #clock-cells in the node
> > If I remove syscon I can't use syscon_node_to_regmap function, What
> > should I use If I remove syscon? auxiliary bus? something else?
> > > for the device. You can use the auxiliary bus to register drivers for
> > > clk and reset and put them into the resepective driver directories.
> > I little bit confused, what is an auxiliary bus to register drivers,
> > can you provide me an example?
> > > Avoid syscon means random drivers can't reach into the device with a
> > > regmap handle and read/write registers that they're not supposed to.
> > Indeed, but the drivers could use the reset and clock memory map only
> > if the module is also a child node.
> >
> > Please let me know what is your preferred way to handle it:
> > 1. stick with syscon and upstream-defined documentation for the rst clk syscon.
> > 2. avoid syscon and use an auxiliary bus, appreciate if you could give
> > me an example of how it should be done.
> > 3. Avoid sycon and handle it differently.
> > >
> > > > >
> > > > > > + struct clk_hw_onecell_data *npcm8xx_clk_data;
> > > > > > + struct device *dev = &pdev->dev;
> > > > > > + struct regmap *clk_regmap;
> > > > > > + struct clk_hw *hw;
> > > > > > + unsigned int i;
> > > > > > +
> > > > > > + npcm8xx_clk_data = devm_kzalloc(dev, struct_size(npcm8xx_clk_data, hws,
> > > > > > + NPCM8XX_NUM_CLOCKS),
> > > > > > + GFP_KERNEL);
> > > > > > + if (!npcm8xx_clk_data)
> > > > > > + return -ENOMEM;
> > > > > > +
> > > > > > + clk_regmap = syscon_node_to_regmap(parent_np);
> > > > > > + of_node_put(parent_np);
> > > > >
> > > > > Is there another binding update that is going to move this node to be a
> > > > > child of the syscon?
> > > > >
> > > > > gcr: system-controller@f0800000 {
> > > > > compatible = "nuvoton,npcm845-gcr", "syscon";
> > > > > reg = <0x0 0xf0800000 0x0 0x1000>;
> > > > > };
> > > > No, sorry but I'm not going to use the GCR node the handle the clock
> > > > and reset modules, the GCR has different memory space.
> > > > the clock driver will have the following device tree
> > >
> > > What does the reset driver use the CGR node for? The driver looks like
> > > it's using it to control USB phy resets.
> > Yes, the USB PHY reset is handled through the GCR registers.
> > >
> > > > sysctrl: system-controller@f0801000 {
> > > > compatible = "syscon", "simple-mfd";
> > > > reg = <0x0 0xf0801000 0x0 0x1000>;
> > > >
> > > > rstc: reset-controller {
> > > > compatible = "nuvoton,npcm845-reset";
> > > > reg = <0x0 0xf0801000 0x0 0xC4>;
> > >
> > > This isn't a valid reg property for a child node like this.
> > O.K.
> > >
> > > > #reset-cells = <2>;
> > > > nuvoton,sysgcr = <&gcr>;
> > > > };
> > > >
> > > > clk: clock-controller {
> > > > compatible = "nuvoton,npcm845-clk";
> > > > #clock-cells = <1>;
> > > > clocks = <&refclk>;
> > > > clock-names = "refclk";
> > > > };
> > > > };
> >
> > Appreciate your guidance!
> >
> > Thanks,
> >
> > Tomer
^ permalink raw reply
* Re: [PATCH] dt-bindings: rockchip: grf: Add missing type to 'pcie-phy' node
From: Heiko Stübner @ 2024-04-02 19:46 UTC (permalink / raw)
To: Krzysztof Kozlowski, Conor Dooley, Rob Herring
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
In-Reply-To: <20240401204959.1698106-1-robh@kernel.org>
Am Montag, 1. April 2024, 22:49:58 CEST schrieb Rob Herring:
> 'pcie-phy' is missing any type. Add 'type: object' to indicate it's a
> node.
>
> Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Do you want to apply that directly to the dt-tree?
Thanks
Heiko
^ permalink raw reply
* [PATCH] arm64: dts: imx8m*-venice-gw7: Fix TPM schema violations
From: Tim Harvey @ 2024-04-02 19:33 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
imx, linux-arm-kernel, linux-kernel
Cc: Tim Harvey, Lukas Wunner
Since commit 26c9d152ebf3 ("dt-bindings: tpm: Consolidate TCG TIS
bindings"), several issues are reported by "make dtbs_check" for arm64
devicetrees:
The compatible property needs to contain the chip's name in addition to
the generic "tcg,tpm_tis-spi".
tpm@1: compatible: ['tcg,tpm_tis-spi'] is too short
from schema $id:
http://devicetree.org/schemas/tpm/tcg,tpm_tis-spi.yaml#
Fix these schema violations.
Gateworks Venice uses an Atmel ATTPM20P:
https://trac.gateworks.com/wiki/tpm
Cc: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi | 2 +-
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi
index 41c966147b94..429be2bab8a2 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi
@@ -57,7 +57,7 @@ &ecspi2 {
status = "okay";
tpm@1 {
- compatible = "tcg,tpm_tis-spi";
+ compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
reg = <0x1>;
spi-max-frequency = <36000000>;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
index 5e2cbaf27e0f..35ae0faa815b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
@@ -297,7 +297,7 @@ flash@0 {
};
tpm@1 {
- compatible = "tcg,tpm_tis-spi";
+ compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
reg = <0x1>;
spi-max-frequency = <36000000>;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi
index e7bf032265e0..2f740d74707b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi
@@ -68,7 +68,7 @@ &ecspi2 {
status = "okay";
tpm@1 {
- compatible = "tcg,tpm_tis-spi";
+ compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
reg = <0x1>;
spi-max-frequency = <36000000>;
};
--
2.25.1
^ permalink raw reply related
* Re: [PATCH v2 0/3] dt-bindings: arm: bcm: raspberrypi,bcm2835-firmware: Drive-by fixes
From: Stefan Wahren @ 2024-04-02 19:52 UTC (permalink / raw)
To: Ivan T. Ivanov, Laurent Pinchart
Cc: Peter Robinson, Dave Stevenson, Naushir Patuck,
Bartosz Golaszewski, Broadcom internal kernel review list,
Conor Dooley, Florian Fainelli, Krzysztof Kozlowski,
Linus Walleij, Nicolas Saenz Julienne, Ray Jui, Rob Herring,
Scott Branden, linux-arm-kernel, devicetree, linux-rpi-kernel,
u-boot
In-Reply-To: <bcf8093ab0ea6f3738bf4a4623de700a@suse.de>
Am 02.04.24 um 10:58 schrieb Ivan T. Ivanov:
>
> Hi,
>
> On 2024-03-28 01:37, Laurent Pinchart wrote:
>> On Wed, Mar 27, 2024 at 07:49:38AM +0100, Stefan Wahren wrote:
>>> Hi,
>>>
>>> [add Peter and Ivan]
>>>
>>> Am 26.03.24 um 20:58 schrieb Laurent Pinchart:
>>> > Hello,
>>> >
>>> > This small series includes a few drive-by fixes for DT validation
>>> > errors.
>>> >
>>> > The first patch has been posted previously in v1 ([1], and now
>>> addresses
>>> > a small review comment. I think it's good to go.
>>> >
>>> > The next two patches address the same issue as "[PATCH 1/2]
>>> dt-bindings:
>>> > arm: bcm: raspberrypi,bcm2835-firmware: Add missing properties"
>>> ([2]),
>>> > but this time with a (hopefully) correct approach. Patch 2/3
>>> starts by
>>> > fixing the raspberrypi-bcm2835-firmware driver, removing the need
>>> for DT
>>> > properties that are specified in bcm2835-rpi.dtsi but not
>>> documented in
>>> > the corresponding bindings. Patch 3/3 can then drop those properties,
>>> > getting rid of the warnings.
>>>
>>> since this series drops properties from the device tree, does anyone
>>> have the chance to test it with a recent U-Boot?
>>
>> I don't have U-Boot running with my RPi, so I would appreciate if
>> someone could help :-)
>
> Sorry for taking me so long to verify this.
>
> I think on RPi U-Boot side we are fine. API used when accessing Mbox
> device do not follow DM model and do not use DMA, but just access
> device directly using this nice macros phys_to_bus/bus_to_phys.
>
> I build new DTB files with this patch included and U-Boot build
> from the latest sources. No obvious issues on RPi3 and RPi4.
> Devices boot fine.
Thanks you, Laurent and Ivan
Reviewed-by: Stefan Wahren <wahrenst@gmx.net>
>
> Regards,
> Ivan
^ permalink raw reply
* Re: [PATCH 5/7] dt-bindings: phy: qcom,ipq8074-qmp-pcie: add ipq9574 gen3x2 PHY
From: Rafał Miłecki @ 2024-04-02 19:56 UTC (permalink / raw)
To: Alexandru Gagniuc, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ansuelsmth, robimarko, linux-arm-msm, linux-phy, devicetree,
linux-kernel
In-Reply-To: <20240402192555.1955204-5-mr.nuke.me@gmail.com>
One minor mistake (I believe)
On 2.04.2024 21:25, Alexandru Gagniuc wrote:
> @@ -61,6 +61,43 @@ required:
> - clock-output-names
> - "#phy-cells"
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,ipq6018-qmp-pcie-phy
> + - qcom,ipq8074-qmp-gen3-pcie-phy
> + - qcom,ipq8074-qmp-pcie-phy
> + then:
> + properties:
> + clocks:
> + maxItems: 3
> + clock-names:
> + items:
> + - const: aux
> + - const: cfg_ahb
> + - const: pipe
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,ipq9574-qmp-gen3x2-pcie-phy
> + then:
> + properties:
> + clocks:
> + maxItems: 5
This should probably be minItems: 5.
You already have maxItems: 5 at global property.
> + clock-names:
> + items:
> + - const: aux
> + - const: cfg_ahb
> + - const: pipe
> + - const: anoc
> + - const: snoc
> +
> additionalProperties: false
>
> examples:
^ permalink raw reply
* [PATCH 1/5] arm64: dts: amazon: alpine-v2: add missing io-fabric unit addresses
From: Krzysztof Kozlowski @ 2024-04-02 20:07 UTC (permalink / raw)
To: Tsahee Zidenberg, Antoine Tenart, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree,
linux-kernel
Cc: Krzysztof Kozlowski
Add io-fabric unit address, because it has ranges property. This also
fixes dtc W=1 warnings:
alpine-v2.dtsi:153.13-229.5: Warning (simple_bus_reg): /soc/io-fabric: simple-bus unit address format error, expected "fc000000"
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/amazon/alpine-v2.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/amazon/alpine-v2.dtsi b/arch/arm64/boot/dts/amazon/alpine-v2.dtsi
index dbf2dce8d1d6..32b6ac8a5352 100644
--- a/arch/arm64/boot/dts/amazon/alpine-v2.dtsi
+++ b/arch/arm64/boot/dts/amazon/alpine-v2.dtsi
@@ -150,7 +150,7 @@ msix: msix@fbe00000 {
al,msi-num-spis = <160>;
};
- io-fabric {
+ io-fabric@fc000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
--
2.34.1
^ permalink raw reply related
* [PATCH 2/5] arm64: dts: amazon: alpine-v2: move non-MMIO node out of soc
From: Krzysztof Kozlowski @ 2024-04-02 20:07 UTC (permalink / raw)
To: Tsahee Zidenberg, Antoine Tenart, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree,
linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240402200744.79349-1-krzk@kernel.org>
Non-MMIO devices should not be within simple-bus, as reported by dtc W=1
warning:
alpine-v2.dtsi:100.9-106.5: Warning (simple_bus_reg): /soc/timer: missing or empty reg/ranges property
alpine-v2.dtsi:108.7-114.5: Warning (simple_bus_reg): /soc/pmu: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/amazon/alpine-v2.dtsi | 33 ++++++++++++-----------
1 file changed, 17 insertions(+), 16 deletions(-)
diff --git a/arch/arm64/boot/dts/amazon/alpine-v2.dtsi b/arch/arm64/boot/dts/amazon/alpine-v2.dtsi
index 32b6ac8a5352..5b6b58dd44cb 100644
--- a/arch/arm64/boot/dts/amazon/alpine-v2.dtsi
+++ b/arch/arm64/boot/dts/amazon/alpine-v2.dtsi
@@ -39,6 +39,7 @@
/ {
model = "Annapurna Labs Alpine v2";
compatible = "al,alpine-v2";
+ interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
@@ -89,6 +90,22 @@ sbclk: sbclk {
clock-frequency = <1000000>;
};
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
+ };
+
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
soc {
compatible = "simple-bus";
#address-cells = <2>;
@@ -97,22 +114,6 @@ soc {
interrupt-parent = <&gic>;
ranges;
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
- <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
- <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
- <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
- };
-
- pmu {
- compatible = "arm,armv8-pmuv3";
- interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
- };
-
gic: interrupt-controller@f0200000 {
compatible = "arm,gic-v3";
reg = <0x0 0xf0200000 0x0 0x10000>, /* GIC Dist */
--
2.34.1
^ permalink raw reply related
* [PATCH 3/5] arm64: dts: amazon: alpine-v3: add missing io-fabric unit addresses
From: Krzysztof Kozlowski @ 2024-04-02 20:07 UTC (permalink / raw)
To: Tsahee Zidenberg, Antoine Tenart, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree,
linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240402200744.79349-1-krzk@kernel.org>
Add io-fabric unit address, because it has ranges property. This also
fixes dtc W=1 warnings:
alpine-v2.dtsi:153.13-229.5: Warning (simple_bus_reg): /soc/io-fabric: simple-bus unit address format error, expected "fc000000"
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/amazon/alpine-v3.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/amazon/alpine-v3.dtsi b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi
index 3ea178acdddf..0ab40741f697 100644
--- a/arch/arm64/boot/dts/amazon/alpine-v3.dtsi
+++ b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi
@@ -361,7 +361,7 @@ msix: msix@fbe00000 {
interrupt-parent = <&gic>;
};
- io-fabric {
+ io-fabric@fc000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
--
2.34.1
^ permalink raw reply related
* [PATCH 4/5] arm64: dts: amazon: alpine-v3: drop cache nodes unit addresses
From: Krzysztof Kozlowski @ 2024-04-02 20:07 UTC (permalink / raw)
To: Tsahee Zidenberg, Antoine Tenart, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree,
linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240402200744.79349-1-krzk@kernel.org>
Cache device nodes within cpus do not have "reg" property, so should not
have unit address, as reported by dtc W=1 warnings:
alpine-v3.dtsi:247.24-254.5: Warning (unit_address_vs_reg): /cpus/cache@0: node has a unit name, but no reg or ranges property
alpine-v3.dtsi:256.26-263.5: Warning (unit_address_vs_reg): /cpus/cache@100: node has a unit name, but no reg or ranges property
alpine-v3.dtsi:265.26-272.5: Warning (unit_address_vs_reg): /cpus/cache@200: node has a unit name, but no reg or ranges property
alpine-v3.dtsi:274.26-281.5: Warning (unit_address_vs_reg): /cpus/cache@300: node has a unit name, but no reg or ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/amazon/alpine-v3.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/amazon/alpine-v3.dtsi b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi
index 0ab40741f697..3099fdfa9520 100644
--- a/arch/arm64/boot/dts/amazon/alpine-v3.dtsi
+++ b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi
@@ -244,7 +244,7 @@ cpu@303 {
next-level-cache = <&cluster3_l2>;
};
- cluster0_l2: cache@0 {
+ cluster0_l2: cache-0 {
compatible = "cache";
cache-size = <0x200000>;
cache-line-size = <64>;
@@ -253,7 +253,7 @@ cluster0_l2: cache@0 {
cache-unified;
};
- cluster1_l2: cache@100 {
+ cluster1_l2: cache-100 {
compatible = "cache";
cache-size = <0x200000>;
cache-line-size = <64>;
@@ -262,7 +262,7 @@ cluster1_l2: cache@100 {
cache-unified;
};
- cluster2_l2: cache@200 {
+ cluster2_l2: cache-200 {
compatible = "cache";
cache-size = <0x200000>;
cache-line-size = <64>;
@@ -271,7 +271,7 @@ cluster2_l2: cache@200 {
cache-unified;
};
- cluster3_l2: cache@300 {
+ cluster3_l2: cache-300 {
compatible = "cache";
cache-size = <0x200000>;
cache-line-size = <64>;
--
2.34.1
^ permalink raw reply related
* [PATCH 5/5] arm64: dts: amazon: alpine-v3: correct gic unit addresses
From: Krzysztof Kozlowski @ 2024-04-02 20:07 UTC (permalink / raw)
To: Tsahee Zidenberg, Antoine Tenart, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree,
linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240402200744.79349-1-krzk@kernel.org>
Correct gic unit addresses to fix dtc W=1 warnings:
alpine-v3.dtsi:321.38-331.5: Warning (simple_bus_reg): /soc/interrupt-controller@f0000000: simple-bus unit address format error, expected "f0800000"
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/amazon/alpine-v3.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/amazon/alpine-v3.dtsi b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi
index 3099fdfa9520..8b6156b5af65 100644
--- a/arch/arm64/boot/dts/amazon/alpine-v3.dtsi
+++ b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi
@@ -318,7 +318,7 @@ soc {
#size-cells = <2>;
ranges;
- gic: interrupt-controller@f0000000 {
+ gic: interrupt-controller@f0800000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
interrupt-controller;
--
2.34.1
^ permalink raw reply related
* [PATCH 1/2] arm64: dts: apm: storm: move non-MMIO node out of soc
From: Krzysztof Kozlowski @ 2024-04-02 20:08 UTC (permalink / raw)
To: Khuong Dinh, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski
Non-MMIO devices, like fixed-clocks, should not be within simple-bus.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/apm/apm-storm.dtsi | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi
index 988928c60f15..633d8418f7cc 100644
--- a/arch/arm64/boot/dts/apm/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi
@@ -112,6 +112,13 @@ gic: interrupt-controller@78010000 {
interrupts = <1 9 0xf04>; /* GIC Maintenence IRQ */
};
+ refclk: refclk {
+ compatible = "fixed-clock";
+ #clock-cells = <1>;
+ clock-frequency = <100000000>;
+ clock-output-names = "refclk";
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <1 0 0xff08>, /* Secure Phys IRQ */
@@ -137,12 +144,6 @@ clocks {
#address-cells = <2>;
#size-cells = <2>;
ranges;
- refclk: refclk {
- compatible = "fixed-clock";
- #clock-cells = <1>;
- clock-frequency = <100000000>;
- clock-output-names = "refclk";
- };
pcppll: pcppll@17000100 {
compatible = "apm,xgene-pcppll-clock";
--
2.34.1
^ permalink raw reply related
* [PATCH 2/2] arm64: dts: apm: shadowcat: move non-MMIO node out of soc
From: Krzysztof Kozlowski @ 2024-04-02 20:08 UTC (permalink / raw)
To: Khuong Dinh, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240402200818.79446-1-krzk@kernel.org>
Non-MMIO devices, like fixed-clocks, should not be within simple-bus.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
index 65ebac3082e2..ea5721ea02f0 100644
--- a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
+++ b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
@@ -211,6 +211,13 @@ v2m15: v2m@f0000 {
};
};
+ refclk: refclk {
+ compatible = "fixed-clock";
+ #clock-cells = <1>;
+ clock-frequency = <100000000>;
+ clock-output-names = "refclk";
+ };
+
pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <1 12 0xff04>;
@@ -236,13 +243,6 @@ clocks {
#size-cells = <2>;
ranges;
- refclk: refclk {
- compatible = "fixed-clock";
- #clock-cells = <1>;
- clock-frequency = <100000000>;
- clock-output-names = "refclk";
- };
-
pmdpll: pmdpll@170000f0 {
compatible = "apm,xgene-pcppll-v2-clock";
#clock-cells = <1>;
--
2.34.1
^ permalink raw reply related
* Re: [PATCH v2 0/3] dt-bindings: arm: bcm: raspberrypi,bcm2835-firmware: Drive-by fixes
From: Laurent Pinchart @ 2024-04-02 20:08 UTC (permalink / raw)
To: Stefan Wahren
Cc: Ivan T. Ivanov, Peter Robinson, Dave Stevenson, Naushir Patuck,
Bartosz Golaszewski, Broadcom internal kernel review list,
Conor Dooley, Florian Fainelli, Krzysztof Kozlowski,
Linus Walleij, Nicolas Saenz Julienne, Ray Jui, Rob Herring,
Scott Branden, linux-arm-kernel, devicetree, linux-rpi-kernel,
u-boot
In-Reply-To: <2e15ab46-f29c-44ac-8a2a-8baa140ee1a3@gmx.net>
Hello,
On Tue, Apr 02, 2024 at 09:52:06PM +0200, Stefan Wahren wrote:
> Am 02.04.24 um 10:58 schrieb Ivan T. Ivanov:
> > On 2024-03-28 01:37, Laurent Pinchart wrote:
> >> On Wed, Mar 27, 2024 at 07:49:38AM +0100, Stefan Wahren wrote:
> >>> Hi,
> >>>
> >>> [add Peter and Ivan]
> >>>
> >>> Am 26.03.24 um 20:58 schrieb Laurent Pinchart:
> >>> > Hello,
> >>> >
> >>> > This small series includes a few drive-by fixes for DT validation
> >>> > errors.
> >>> >
> >>> > The first patch has been posted previously in v1 ([1], and now addresses
> >>> > a small review comment. I think it's good to go.
> >>> >
> >>> > The next two patches address the same issue as "[PATCH 1/2] dt-bindings:
> >>> > arm: bcm: raspberrypi,bcm2835-firmware: Add missing properties" ([2]),
> >>> > but this time with a (hopefully) correct approach. Patch 2/3 starts by
> >>> > fixing the raspberrypi-bcm2835-firmware driver, removing the need for DT
> >>> > properties that are specified in bcm2835-rpi.dtsi but not documented in
> >>> > the corresponding bindings. Patch 3/3 can then drop those properties,
> >>> > getting rid of the warnings.
> >>>
> >>> since this series drops properties from the device tree, does anyone
> >>> have the chance to test it with a recent U-Boot?
> >>
> >> I don't have U-Boot running with my RPi, so I would appreciate if
> >> someone could help :-)
> >
> > Sorry for taking me so long to verify this.
> >
> > I think on RPi U-Boot side we are fine. API used when accessing Mbox
> > device do not follow DM model and do not use DMA, but just access
> > device directly using this nice macros phys_to_bus/bus_to_phys.
> >
> > I build new DTB files with this patch included and U-Boot build
> > from the latest sources. No obvious issues on RPi3 and RPi4.
> > Devices boot fine.
Thank you for testing Ivan.
> Thanks you, Laurent and Ivan
>
> Reviewed-by: Stefan Wahren <wahrenst@gmx.net>
Stefan, I'm quite unfamiliar with the Raspberry Pi upstreaming process
(despite having sent patches for ages :-)), do I understand correctly
that this patch will go through your tree, or do I need to work with
someone else to get it merged upstream ?
--
Regards,
Laurent Pinchart
^ permalink raw reply
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