* [PATCH v1 1/4] arm64: dts: freescale: Add i.MX8DX dtsi
From: Hiago De Franco @ 2024-04-02 19:35 UTC (permalink / raw)
To: Shawn Guo
Cc: Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Hiago De Franco, imx,
linux-arm-kernel, devicetree, linux-kernel
In-Reply-To: <20240402193512.240417-1-hiagofranco@gmail.com>
From: Hiago De Franco <hiago.franco@toradex.com>
Add DTSI for i.MX8DX processor. According to 'i.MX 8DualX Industrial
Applications Processors Data Sheet', the GPU and shader use a clock of
372MHz. Therefore, this dtsi includes the imx8dxp.dtsi and changes the
clock accordingly.
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
---
arch/arm64/boot/dts/freescale/imx8dx.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx.dtsi
diff --git a/arch/arm64/boot/dts/freescale/imx8dx.dtsi b/arch/arm64/boot/dts/freescale/imx8dx.dtsi
new file mode 100644
index 000000000000..ce76efc1a041
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8dx.dtsi
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017-2020 NXP
+ */
+
+/dts-v1/;
+
+#include "imx8dxp.dtsi"
+
+&gpu_3d0 {
+ assigned-clock-rates = <372000000>, <372000000>;
+};
--
2.39.2
^ permalink raw reply related
* [PATCH v1 0/4] arm64: dts: freescale: Add Toradex Colibri iMX8DX
From: Hiago De Franco @ 2024-04-02 19:35 UTC (permalink / raw)
To: Shawn Guo
Cc: Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Hiago De Franco, imx,
linux-arm-kernel, devicetree, linux-kernel
From: Hiago De Franco <hiago.franco@toradex.com>
This patch series introduces support for Colibri iMX8DX SoM and its
carrier boards, where the board can be mated with: Aster, Evaluation Board
v3, Iris v2, and Iris v1. This SoM is a variant of the already supported
Colibri iMX8QXP, utilizing an NXP i.MX8DX SoC instead of i.MX8QXP.
Therefore, this patch series also adds support for the i.MX8DX processor.
Hiago De Franco (4):
arm64: dts: freescale: Add i.MX8DX dtsi
dt-bindings: arm: fsl: remove reduntant toradex,colibri-imx8x
dt-bindings: arm: fsl: Add Colibri iMX8DX
arm64: dts: freescale: Add Toradex Colibri iMX8DX
Documentation/devicetree/bindings/arm/fsl.yaml | 7 ++++---
arch/arm64/boot/dts/freescale/Makefile | 4 ++++
.../boot/dts/freescale/imx8dx-colibri-aster.dts | 16 ++++++++++++++++
.../dts/freescale/imx8dx-colibri-eval-v3.dts | 16 ++++++++++++++++
.../dts/freescale/imx8dx-colibri-iris-v2.dts | 16 ++++++++++++++++
.../boot/dts/freescale/imx8dx-colibri-iris.dts | 16 ++++++++++++++++
.../arm64/boot/dts/freescale/imx8dx-colibri.dtsi | 11 +++++++++++
arch/arm64/boot/dts/freescale/imx8dx.dtsi | 13 +++++++++++++
8 files changed, 96 insertions(+), 3 deletions(-)
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx-colibri-aster.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx-colibri-eval-v3.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx-colibri-iris-v2.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx-colibri-iris.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx-colibri.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8dx.dtsi
--
2.39.2
^ permalink raw reply
* Re: [PATCH v4 2/5] soc: qcom: llcc: Add regmap for Broadcast_AND region
From: Unnathi Chalicheemala @ 2024-04-02 19:34 UTC (permalink / raw)
To: Krzysztof Kozlowski, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, kernel
In-Reply-To: <d6b0f9d2-a489-4c0e-9c77-0e3eab49d3cb@linaro.org>
On 3/30/2024 4:46 AM, Krzysztof Kozlowski wrote:
> On 29/03/2024 22:53, Unnathi Chalicheemala wrote:
>> Define new regmap structure for Broadcast_AND region and initialize
>> this regmap when HW block version is greater than 4.1, otherwise
>> initialize as a NULL pointer for backwards compatibility.
>>
>
>> + struct regmap *regmap;
>> u32 act_ctrl_reg;
>> u32 act_clear_reg;
>> u32 status_reg;
>> @@ -849,7 +850,8 @@ static int llcc_update_act_ctrl(u32 sid,
>> return ret;
>>
>> if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
>> - ret = regmap_read_poll_timeout(drv_data->bcast_regmap, status_reg,
>> + regmap = drv_data->bcast_and_regmap ?: drv_data->bcast_regmap;
>> + ret = regmap_read_poll_timeout(regmap, status_reg,
>> slice_status, (slice_status & ACT_COMPLETE),
>> 0, LLCC_STATUS_READ_DELAY);
>> if (ret)
>> @@ -1284,6 +1286,16 @@ static int qcom_llcc_probe(struct platform_device *pdev)
>>
>> drv_data->version = version;
>>
>> + /* Applicable only when drv_data->version >= 4.1 */
>> + drv_data->bcast_and_regmap = qcom_llcc_init_mmio(pdev, i + 1, "llcc_broadcast_and_base");
>> + if (IS_ERR(drv_data->bcast_and_regmap)) {
>
> I am pretty sure this breaks all users. Can you please explain how do
> you maintain ABI and that IS_ERR() is applied only for version >= 4.1?
>
> Best regards,
> Krzysztof
>
IS_ERR() check is done for all versions.
If new register isn't defined in DT(for version < 4.1) it simply sets bcast_and_regmap to NULL.
Otherwise, for version >= 4.1, it goes to err(in the case bcast_and_regmap isn't set properly).
Thank you for reviewing Krzysztof!
^ permalink raw reply
* [PATCH 1/2] dt-bindings: mfd: Add ROHM BD71879
From: Andreas Kemnade @ 2024-04-02 19:35 UTC (permalink / raw)
To: lee, robh+dt, krzysztof.kozlowski+dt, conor+dt, mazziesaccount,
devicetree, linux-kernel
Cc: Andreas Kemnade
In-Reply-To: <20240402193515.513713-1-andreas@kemnade.info>
As this chip was seen in several devices in the wild, add it.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Suggested-by: Matti Vaittinen <mazziesaccount@gmail.com>
---
Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml
index 0b62f854bf6b..e4df09e8961c 100644
--- a/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml
+++ b/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml
@@ -17,7 +17,9 @@ description: |
properties:
compatible:
- const: rohm,bd71828
+ enum:
+ - rohm,bd71828
+ - rohm,bd71879
reg:
description:
--
2.39.2
^ permalink raw reply related
* [PATCH 2/2] mfd: rohm-bd71828: Add software-compatible variant BD71879
From: Andreas Kemnade @ 2024-04-02 19:35 UTC (permalink / raw)
To: lee, robh+dt, krzysztof.kozlowski+dt, conor+dt, mazziesaccount,
devicetree, linux-kernel
Cc: Andreas Kemnade
In-Reply-To: <20240402193515.513713-1-andreas@kemnade.info>
Add the BD71879 PMIC which is software-compatible to the BD71828, so reuse
the same device_type enum.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Suggested-by: Matti Vaittinen <mazziesaccount@gmail.com>
---
drivers/mfd/rohm-bd71828.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/mfd/rohm-bd71828.c b/drivers/mfd/rohm-bd71828.c
index 4a1fa8a0d76a..f0b444690d4d 100644
--- a/drivers/mfd/rohm-bd71828.c
+++ b/drivers/mfd/rohm-bd71828.c
@@ -585,6 +585,10 @@ static const struct of_device_id bd71828_of_match[] = {
{
.compatible = "rohm,bd71828",
.data = (void *)ROHM_CHIP_TYPE_BD71828,
+ }, {
+ .compatible = "rohm,bd71879",
+ /* equivalent from a software point of view */
+ .data = (void *)ROHM_CHIP_TYPE_BD71828,
}, {
.compatible = "rohm,bd71815",
.data = (void *)ROHM_CHIP_TYPE_BD71815,
--
2.39.2
^ permalink raw reply related
* [PATCH 0/2] mfd: Add ROHM BD71879
From: Andreas Kemnade @ 2024-04-02 19:35 UTC (permalink / raw)
To: lee, robh+dt, krzysztof.kozlowski+dt, conor+dt, mazziesaccount,
devicetree, linux-kernel
Cc: Andreas Kemnade
Add software-compatible variant of the BD71828.
Andreas Kemnade (2):
dt-bindings: mfd: Add ROHM BD71879
mfd: rohm-bd71828: Add software-compatible variant BD71879
Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml | 4 +++-
drivers/mfd/rohm-bd71828.c | 4 ++++
2 files changed, 7 insertions(+), 1 deletion(-)
--
2.39.2
^ permalink raw reply
* [PATCH 9/9] arm64: dts: hisilicon: hi6220: correct tsensor unit addresses
From: Krzysztof Kozlowski @ 2024-04-02 19:31 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-kernel, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240402193148.62323-1-krzk@kernel.org>
Correct unit address to fix dtc W=1 warnings:
hi6220.dtsi:855.31-862.5: Warning (simple_bus_reg): /soc/tsensor@0,f7030700: simple-bus unit address format error, expected "f7030700"
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index be808bb2544e..a589954c29e2 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -852,7 +852,7 @@ watchdog0: watchdog@f8005000 {
clock-names = "wdog_clk", "apb_pclk";
};
- tsensor: tsensor@0,f7030700 {
+ tsensor: tsensor@f7030700 {
compatible = "hisilicon,tsensor";
reg = <0x0 0xf7030700 0x0 0x1000>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
--
2.34.1
^ permalink raw reply related
* [PATCH 8/9] arm64: dts: hisilicon: hi6220-hikey: drop unit addresses from fixed regulators
From: Krzysztof Kozlowski @ 2024-04-02 19:31 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-kernel, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240402193148.62323-1-krzk@kernel.org>
Fixed regulators are not part of any MMIO bus, so they should not have
unit addresses. This fixes dtc W=1 warnings:
hi6220-hikey.dts:85.26-92.4: Warning (unit_address_vs_reg): /regulator@0: node has a unit name, but no reg or ranges property
hi6220-hikey.dts:94.27-102.4: Warning (unit_address_vs_reg): /regulator@1: node has a unit name, but no reg or ranges property
hi6220-hikey.dts:104.26-113.4: Warning (unit_address_vs_reg): /regulator@2: node has a unit name, but no reg or ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index a2aa17e4dfdf..2d304efe081d 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -82,7 +82,7 @@ reboot-mode {
};
};
- reg_sys_5v: regulator@0 {
+ reg_sys_5v: regulator-0 {
compatible = "regulator-fixed";
regulator-name = "SYS_5V";
regulator-min-microvolt = <5000000>;
@@ -91,7 +91,7 @@ reg_sys_5v: regulator@0 {
regulator-always-on;
};
- reg_vdd_3v3: regulator@1 {
+ reg_vdd_3v3: regulator-1 {
compatible = "regulator-fixed";
regulator-name = "VDD_3V3";
regulator-min-microvolt = <3300000>;
@@ -101,7 +101,7 @@ reg_vdd_3v3: regulator@1 {
vin-supply = <®_sys_5v>;
};
- reg_5v_hub: regulator@2 {
+ reg_5v_hub: regulator-2 {
compatible = "regulator-fixed";
regulator-name = "5V_HUB";
regulator-min-microvolt = <5000000>;
--
2.34.1
^ permalink raw reply related
* [PATCH 7/9] arm64: dts: hisilicon: hi6220-hikey: add missing port@0 reg
From: Krzysztof Kozlowski @ 2024-04-02 19:31 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-kernel, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240402193148.62323-1-krzk@kernel.org>
adv7533 ports should have "reg" propeties, as reported by dtc W=1
warnings:
hi6220-hikey.dts:516.11-520.6: Warning (unit_address_vs_reg): /soc/i2c@f7102000/adv7533@39/ports/port@0: node has a unit name, but no reg or ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index f0672ec65b26..a2aa17e4dfdf 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -514,6 +514,7 @@ ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
+ reg = <0>;
adv7533_in: endpoint {
remote-endpoint = <&dsi_out0>;
};
--
2.34.1
^ permalink raw reply related
* [PATCH 6/9] arm64: dts: hisilicon: hip07: correct unit addresses
From: Krzysztof Kozlowski @ 2024-04-02 19:31 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-kernel, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240402193148.62323-1-krzk@kernel.org>
Correct several nodes' unit addresses to fix dtc W=1 warnings:
arch/arm64/boot/dts/hisilicon/hip07.dtsi:1382.23-1520.5: Warning (simple_bus_reg): /soc/dsa@c7000000: simple-bus unit address format error, expected "c5000000"
arch/arm64/boot/dts/hisilicon/hip07.dtsi:1727.29-1747.5: Warning (simple_bus_reg): /soc/pcie@a00a0000: simple-bus unit address format error, expected "af800000"
arch/arm64/boot/dts/hisilicon/hip07.dtsi:1748.29-1788.5: Warning (simple_bus_reg): /soc/crypto@d2000000: simple-bus unit address format error, expected "d0000000"
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/hisilicon/hip07.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index 9d1e86553ea8..00a6bfa7478c 100644
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -1379,7 +1379,7 @@ phy1: ethernet-phy@1 {
};
};
- dsaf0: dsa@c7000000 {
+ dsaf0: dsa@c5000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "hisilicon,hns-dsaf-v2";
@@ -1724,7 +1724,7 @@ sas2: sas@a3000000 {
status = "disabled";
};
- p0_pcie2_a: pcie@a00a0000 {
+ p0_pcie2_a: pcie@af800000 {
compatible = "hisilicon,hip07-pcie-ecam";
reg = <0 0xaf800000 0 0x800000>,
<0 0xa00a0000 0 0x10000>;
@@ -1745,7 +1745,7 @@ p0_pcie2_a: pcie@a00a0000 {
0x0 0 0 4 &mbigen_pcie2_a 671 4>;
status = "disabled";
};
- p0_sec_a: crypto@d2000000 {
+ p0_sec_a: crypto@d0000000 {
compatible = "hisilicon,hip07-sec";
reg = <0x0 0xd0000000 0x0 0x10000>,
<0x0 0xd2000000 0x0 0x10000>,
@@ -1786,7 +1786,7 @@ p0_sec_a: crypto@d2000000 {
<605 1>, <606 4>,
<607 1>, <608 4>;
};
- p0_sec_b: crypto@8,d2000000 {
+ p0_sec_b: crypto@8d0000000 {
compatible = "hisilicon,hip07-sec";
reg = <0x8 0xd0000000 0x0 0x10000>,
<0x8 0xd2000000 0x0 0x10000>,
@@ -1827,7 +1827,7 @@ p0_sec_b: crypto@8,d2000000 {
<605 1>, <606 4>,
<607 1>, <608 4>;
};
- p1_sec_a: crypto@400,d2000000 {
+ p1_sec_a: crypto@400d0000000 {
compatible = "hisilicon,hip07-sec";
reg = <0x400 0xd0000000 0x0 0x10000>,
<0x400 0xd2000000 0x0 0x10000>,
@@ -1868,7 +1868,7 @@ p1_sec_a: crypto@400,d2000000 {
<605 1>, <606 4>,
<607 1>, <608 4>;
};
- p1_sec_b: crypto@408,d2000000 {
+ p1_sec_b: crypto@408d0000000 {
compatible = "hisilicon,hip07-sec";
reg = <0x408 0xd0000000 0x0 0x10000>,
<0x408 0xd2000000 0x0 0x10000>,
--
2.34.1
^ permalink raw reply related
* [PATCH 5/9] arm64: dts: hisilicon: hip07: move non-MMIO node out of soc
From: Krzysztof Kozlowski @ 2024-04-02 19:31 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-kernel, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240402193148.62323-1-krzk@kernel.org>
Non-MMIO devices, which are BTW not really part of the SoC, should not
be within simple-bus, as reported by dtc W=1 warning:
hi p07.dtsi:1486.20-1493.5: Warning (unit_address_vs_reg): /soc/ethernet@4: node has a unit name, but no reg or ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/hisilicon/hip07.dtsi | 72 ++++++++++++------------
1 file changed, 36 insertions(+), 36 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index 81d907ef43ed..9d1e86553ea8 100644
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -1013,6 +1013,42 @@ p1_its_dsa_b: msi-controller@408c6000000 {
};
};
+ eth0: ethernet-0 {
+ compatible = "hisilicon,hns-nic-v2";
+ ae-handle = <&dsaf0>;
+ port-idx-in-ae = <4>;
+ local-mac-address = [00 00 00 00 00 00];
+ status = "disabled";
+ dma-coherent;
+ };
+
+ eth1: ethernet-1 {
+ compatible = "hisilicon,hns-nic-v2";
+ ae-handle = <&dsaf0>;
+ port-idx-in-ae = <5>;
+ local-mac-address = [00 00 00 00 00 00];
+ status = "disabled";
+ dma-coherent;
+ };
+
+ eth2: ethernet-2 {
+ compatible = "hisilicon,hns-nic-v2";
+ ae-handle = <&dsaf0>;
+ port-idx-in-ae = <0>;
+ local-mac-address = [00 00 00 00 00 00];
+ status = "disabled";
+ dma-coherent;
+ };
+
+ eth3: ethernet-3 {
+ compatible = "hisilicon,hns-nic-v2";
+ ae-handle = <&dsaf0>;
+ port-idx-in-ae = <1>;
+ local-mac-address = [00 00 00 00 00 00];
+ status = "disabled";
+ dma-coherent;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
@@ -1483,42 +1519,6 @@ port@5 {
};
};
- eth0: ethernet@4 {
- compatible = "hisilicon,hns-nic-v2";
- ae-handle = <&dsaf0>;
- port-idx-in-ae = <4>;
- local-mac-address = [00 00 00 00 00 00];
- status = "disabled";
- dma-coherent;
- };
-
- eth1: ethernet@5 {
- compatible = "hisilicon,hns-nic-v2";
- ae-handle = <&dsaf0>;
- port-idx-in-ae = <5>;
- local-mac-address = [00 00 00 00 00 00];
- status = "disabled";
- dma-coherent;
- };
-
- eth2: ethernet@0 {
- compatible = "hisilicon,hns-nic-v2";
- ae-handle = <&dsaf0>;
- port-idx-in-ae = <0>;
- local-mac-address = [00 00 00 00 00 00];
- status = "disabled";
- dma-coherent;
- };
-
- eth3: ethernet@1 {
- compatible = "hisilicon,hns-nic-v2";
- ae-handle = <&dsaf0>;
- port-idx-in-ae = <1>;
- local-mac-address = [00 00 00 00 00 00];
- status = "disabled";
- dma-coherent;
- };
-
infiniband@c4000000 {
compatible = "hisilicon,hns-roce-v1";
reg = <0x0 0xc4000000 0x0 0x100000>;
--
2.34.1
^ permalink raw reply related
* [PATCH 4/9] arm64: dts: hisilicon: hip06: correct unit addresses
From: Krzysztof Kozlowski @ 2024-04-02 19:31 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-kernel, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240402193148.62323-1-krzk@kernel.org>
Correct dsa and pcie unit addresses to fix dtc W=1 warnings:
hip06.dtsi:439.23-571.5: Warning (simple_bus_reg): /soc/dsa@c7000000: simple-bus unit address format error, expected "c5000000"
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index 249ca3b4b703..3d7285e6700e 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -472,7 +472,7 @@ phy1: ethernet-phy@1 {
};
};
- dsaf0: dsa@c7000000 {
+ dsaf0: dsa@c5000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "hisilicon,hns-dsaf-v2";
@@ -733,7 +733,7 @@ sas2: sas@a3000000 {
status = "disabled";
};
- pcie0: pcie@a0090000 {
+ pcie0: pcie@b0000000 {
compatible = "hisilicon,hip06-pcie-ecam";
reg = <0 0xb0000000 0 0x2000000>,
<0 0xa0090000 0 0x10000>;
--
2.34.1
^ permalink raw reply related
* [PATCH 3/9] arm64: dts: hisilicon: hip06: move non-MMIO node out of soc
From: Krzysztof Kozlowski @ 2024-04-02 19:31 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-kernel, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240402193148.62323-1-krzk@kernel.org>
Non-MMIO devices, which are BTW not really part of the SoC, should not
be within simple-bus, as reported by dtc W=1 warning:
hip06.dtsi:377.18-381.5: Warning (simple_bus_reg): /soc/refclk: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 84 ++++++++++++------------
1 file changed, 42 insertions(+), 42 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index f46c33d10750..249ca3b4b703 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -258,6 +258,48 @@ its_dsa: msi-controller@c6000000 {
};
};
+ eth2: ethernet-0 {
+ compatible = "hisilicon,hns-nic-v2";
+ ae-handle = <&dsaf0>;
+ port-idx-in-ae = <0>;
+ local-mac-address = [00 00 00 00 00 00];
+ status = "disabled";
+ dma-coherent;
+ };
+
+ eth3: ethernet-1 {
+ compatible = "hisilicon,hns-nic-v2";
+ ae-handle = <&dsaf0>;
+ port-idx-in-ae = <1>;
+ local-mac-address = [00 00 00 00 00 00];
+ status = "disabled";
+ dma-coherent;
+ };
+
+ eth0: ethernet-4 {
+ compatible = "hisilicon,hns-nic-v2";
+ ae-handle = <&dsaf0>;
+ port-idx-in-ae = <4>;
+ local-mac-address = [00 00 00 00 00 00];
+ status = "disabled";
+ dma-coherent;
+ };
+
+ eth1: ethernet-5 {
+ compatible = "hisilicon,hns-nic-v2";
+ ae-handle = <&dsaf0>;
+ port-idx-in-ae = <5>;
+ local-mac-address = [00 00 00 00 00 00];
+ status = "disabled";
+ dma-coherent;
+ };
+
+ refclk: refclk {
+ compatible = "fixed-clock";
+ clock-frequency = <50000000>;
+ #clock-cells = <0>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
@@ -374,12 +416,6 @@ uart0: serial@2f8 {
};
};
- refclk: refclk {
- compatible = "fixed-clock";
- clock-frequency = <50000000>;
- #clock-cells = <0>;
- };
-
usb_ohci: usb@a7030000 {
compatible = "generic-ohci";
reg = <0x0 0xa7030000 0x0 0x10000>;
@@ -570,42 +606,6 @@ port@5 {
};
};
- eth0: ethernet-4 {
- compatible = "hisilicon,hns-nic-v2";
- ae-handle = <&dsaf0>;
- port-idx-in-ae = <4>;
- local-mac-address = [00 00 00 00 00 00];
- status = "disabled";
- dma-coherent;
- };
-
- eth1: ethernet-5 {
- compatible = "hisilicon,hns-nic-v2";
- ae-handle = <&dsaf0>;
- port-idx-in-ae = <5>;
- local-mac-address = [00 00 00 00 00 00];
- status = "disabled";
- dma-coherent;
- };
-
- eth2: ethernet-0 {
- compatible = "hisilicon,hns-nic-v2";
- ae-handle = <&dsaf0>;
- port-idx-in-ae = <0>;
- local-mac-address = [00 00 00 00 00 00];
- status = "disabled";
- dma-coherent;
- };
-
- eth3: ethernet-1 {
- compatible = "hisilicon,hns-nic-v2";
- ae-handle = <&dsaf0>;
- port-idx-in-ae = <1>;
- local-mac-address = [00 00 00 00 00 00];
- status = "disabled";
- dma-coherent;
- };
-
sas0: sas@c3000000 {
compatible = "hisilicon,hip06-sas-v2";
reg = <0 0xc3000000 0 0x10000>;
--
2.34.1
^ permalink raw reply related
* [PATCH 2/9] arm64: dts: hisilicon: hip05-d02: correct local-bus unit addresses
From: Krzysztof Kozlowski @ 2024-04-02 19:31 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-kernel, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240402193148.62323-1-krzk@kernel.org>
Correct local-bus children unit addresses to fix dtc W=1 warnings:
hip05-d02.dts:57.16-76.4: Warning (simple_bus_reg): /soc/local-bus@80380000/nor-flash@0,0: simple-bus unit address format error, expected "0"
hip05-d02.dts:78.11-81.4: Warning (simple_bus_reg): /soc/local-bus@80380000/cpld@1,0: simple-bus unit address format error, expected "100000000"
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/hisilicon/hip05-d02.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hip05-d02.dts b/arch/arm64/boot/dts/hisilicon/hip05-d02.dts
index c4eaebbb448f..b7792d443189 100644
--- a/arch/arm64/boot/dts/hisilicon/hip05-d02.dts
+++ b/arch/arm64/boot/dts/hisilicon/hip05-d02.dts
@@ -54,7 +54,7 @@ &lbc {
ranges = <0 0 0x0 0x90000000 0x08000000>,
<1 0 0x0 0x98000000 0x08000000>;
- nor-flash@0,0 {
+ nor-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "numonyx,js28f00a", "cfi-flash";
@@ -75,7 +75,7 @@ partition@1000000 {
};
};
- cpld@1,0 {
+ cpld@100000000 {
compatible = "hisilicon,hip05-cpld";
reg = <1 0x0 0x100>;
};
--
2.34.1
^ permalink raw reply related
* [PATCH 1/9] arm64: dts: hisilicon: hip05: move non-MMIO node out of soc
From: Krzysztof Kozlowski @ 2024-04-02 19:31 UTC (permalink / raw)
To: Wei Xu, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-kernel, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
Non-MMIO devices, which are BTW not really part of the SoC, should not
be within simple-bus, as reported by dtc W=1 warning:
hip05.dtsi:301.30-305.5: Warning (simple_bus_reg): /soc/refclk200mhz: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/hisilicon/hip05.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
index 65ddc0698f82..d0912ca5f237 100644
--- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
@@ -279,6 +279,12 @@ its_dsa: msi-controller@c6000000 {
};
};
+ refclk200mhz: refclk200mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
@@ -298,12 +304,6 @@ soc {
#size-cells = <2>;
ranges;
- refclk200mhz: refclk200mhz {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- };
-
uart0: serial@80300000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x80300000 0x0 0x10000>;
--
2.34.1
^ permalink raw reply related
* Re: [PATCH 2/3] arm64: dts: marvell: turris-mox: drop unneeded flash address/size-cells
From: Marek Behún @ 2024-04-02 19:28 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Robert Marko, Andrew Lunn, Gregory Clement, Sebastian Hesselbarth,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel,
devicetree, linux-kernel
In-Reply-To: <20240402183240.49193-2-krzk@kernel.org>
On Tue, 2 Apr 2024 20:32:39 +0200
Krzysztof Kozlowski <krzk@kernel.org> wrote:
> Flash node uses single "partition" node to describe partitions, so
> remove deprecated address/size-cells properties to also fix dtc W=1
> warnings:
>
> armada-3720-turris-mox.dts:218.10-255.4: Warning (avoid_unnecessary_addr_size): /soc/internal-regs@d0000000/spi@10600/flash@0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
>
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> ---
> arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
> index f1a9f2234359..54453b0a91f9 100644
> --- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
> +++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
> @@ -216,8 +216,6 @@ &spi0 {
> assigned-clock-rates = <20000000>;
>
> flash@0 {
> - #address-cells = <1>;
> - #size-cells = <1>;
> compatible = "jedec,spi-nor";
> reg = <0>;
> spi-max-frequency = <20000000>;
Reviewed-by: Marek Behún <kabel@kernel.org>
^ permalink raw reply
* Re: [PATCH 3/3] arm64: dts: marvell: espressobin-ultra: fix Ethernet Switch unit address
From: Andrew Lunn @ 2024-04-02 19:27 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Robert Marko, Gregory Clement, Sebastian Hesselbarth, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree,
linux-kernel
In-Reply-To: <20240402183240.49193-3-krzk@kernel.org>
On Tue, Apr 02, 2024 at 08:32:40PM +0200, Krzysztof Kozlowski wrote:
> The Espressobin Ultra DTS includes Espressobin DTSI which defines
> ethernet-switch@1 node. The Ultra DTS overrides "reg" to 3, but that
> leaves still old unit address which conflicts with the new phy@1 node
> (W=1 dtc warning):
>
> armada-3720-espressobin.dtsi:148.29-203.4: Warning (unique_unit_address_if_enabled): /soc/internal-regs@d0000000/mdio@32004/ethernet-switch@1: duplicate unit-address (also used in node /soc/internal-regs@d0000000/mdio@32004/ethernet-phy@1)
>
> Fix this by deleting ethernet-switch@1 node and merging original node
> with code from Ultra DTS into new ethernet-switch@3.
That is a bit ugly, having the exact same code twice.
Could the bulk of the switch node be put into a .dtsi file, and then
included as needed
&mdio {
switch0: ethernet-switch@1 {
reg = <1>;
include "armada-3720-espressobin-switch.dtsi"
}
}
&mdio {
switch0: ethernet-switch@3 {
reg = <3>;
include "armada-3720-espressobin-switch.dtsi"
}
}
Andrew
^ permalink raw reply
* [PATCH 7/7] arm64: dts: qcom: ipq9574: add PCIe2 nodes
From: Alexandru Gagniuc @ 2024-04-02 19:25 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ansuelsmth, robimarko, Alexandru Gagniuc, linux-arm-msm,
devicetree, linux-kernel
In-Reply-To: <20240402192555.1955204-1-mr.nuke.me@gmail.com>
On ipq9574, there are 4 PCIe controllers. Describe the pcie2 node, and
its PHY in devicetree.
Only pcie2 is described, because only hardware using that controller
was available for testing.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
---
arch/arm64/boot/dts/qcom/ipq9574.dtsi | 93 ++++++++++++++++++++++++++-
1 file changed, 92 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
index 7f2e5cbf3bbb..626d6359d750 100644
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
@@ -300,7 +300,7 @@ gcc: clock-controller@1800000 {
<0>,
<0>,
<0>,
- <0>,
+ <&pcie2_qmp_phy>,
<0>,
<0>;
#clock-cells = <1>;
@@ -745,6 +745,97 @@ frame@b128000 {
status = "disabled";
};
};
+
+ pcie2_qmp_phy: phy@8c000 {
+ compatible = "qcom,ipq9574-qmp-gen3x2-pcie-phy";
+ reg = <0x0008c000 0x14f4>;
+
+ clocks = <&gcc GCC_PCIE2_AUX_CLK>,
+ <&gcc GCC_PCIE2_AHB_CLK>,
+ <&gcc GCC_PCIE2_PIPE_CLK>,
+ <&gcc GCC_ANOC_PCIE2_2LANE_M_CLK>,
+ <&gcc GCC_SNOC_PCIE2_2LANE_S_CLK>;
+ clock-names = "aux",
+ "cfg_ahb",
+ "pipe",
+ "anoc",
+ "snoc";
+
+ clock-output-names = "pcie_phy2_pipe_clk";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
+
+ resets = <&gcc GCC_PCIE2_PHY_BCR>,
+ <&gcc GCC_PCIE2PHY_PHY_BCR>;
+ reset-names = "phy",
+ "common";
+ status = "disabled";
+ };
+
+ pcie2: pcie@20000000 {
+ compatible = "qcom,pcie-ipq9574";
+ reg = <0x20000000 0xf1d>,
+ <0x20000f20 0xa8>,
+ <0x20001000 0x1000>,
+ <0x00088000 0x4000>,
+ <0x20100000 0x1000>;
+ reg-names = "dbi", "elbi", "atu", "parf", "config";
+ device_type = "pci";
+ linux,pci-domain = <3>;
+ bus-range = <0x00 0xff>;
+ num-lanes = <2>;
+ max-link-speed = <3>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ phys = <&pcie2_qmp_phy>;
+ phy-names = "pciephy";
+
+ ranges = <0x81000000 0x0 0x20200000 0x20200000 0x0 0x00100000>, /* I/O */
+ <0x82000000 0x0 0x20300000 0x20300000 0x0 0x07d00000>; /* MEM */
+
+ interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "msi";
+ msi-parent = <&v2m0>;
+
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0x7>;
+ interrupt-map = <0 0 0 1 &intc 0 0 164
+ IRQ_TYPE_LEVEL_HIGH>, /* int_a */
+ <0 0 0 2 &intc 0 0 165
+ IRQ_TYPE_LEVEL_HIGH>, /* int_b */
+ <0 0 0 3 &intc 0 0 186
+ IRQ_TYPE_LEVEL_HIGH>, /* int_c */
+ <0 0 0 4 &intc 0 0 187
+ IRQ_TYPE_LEVEL_HIGH>; /* int_d */
+
+ clocks = <&gcc GCC_PCIE2_AXI_M_CLK>,
+ <&gcc GCC_PCIE2_AXI_S_CLK>,
+ <&gcc GCC_PCIE2_AXI_S_BRIDGE_CLK>,
+ <&gcc GCC_PCIE2_RCHNG_CLK>;
+ clock-names = "axi_m",
+ "axi_s",
+ "axi_bridge",
+ "rchng";
+
+ resets = <&gcc GCC_PCIE2_PIPE_ARES>,
+ <&gcc GCC_PCIE2_CORE_STICKY_ARES>,
+ <&gcc GCC_PCIE2_AXI_S_STICKY_ARES>,
+ <&gcc GCC_PCIE2_AXI_S_ARES>,
+ <&gcc GCC_PCIE2_AXI_M_STICKY_ARES>,
+ <&gcc GCC_PCIE2_AXI_M_ARES>,
+ <&gcc GCC_PCIE2_AUX_ARES>,
+ <&gcc GCC_PCIE2_AHB_ARES>;
+ reset-names = "pipe",
+ "sticky",
+ "axi_s_sticky",
+ "axi_s",
+ "axi_m_sticky",
+ "axi_m",
+ "aux",
+ "ahb";
+ status = "disabled";
+ };
};
thermal-zones {
--
2.40.1
^ permalink raw reply related
* [PATCH 5/7] dt-bindings: phy: qcom,ipq8074-qmp-pcie: add ipq9574 gen3x2 PHY
From: Alexandru Gagniuc @ 2024-04-02 19:25 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ansuelsmth, robimarko, Alexandru Gagniuc, linux-arm-msm,
linux-phy, devicetree, linux-kernel
In-Reply-To: <20240402192555.1955204-1-mr.nuke.me@gmail.com>
The IPQ9574 gen3x2 PHY is very similar to IPQ6018. It requires two
extra clocks named "anoc" and "snoc". Document this, and add a
new compatible string for this PHY.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
---
.../phy/qcom,ipq8074-qmp-pcie-phy.yaml | 47 +++++++++++++++++--
1 file changed, 42 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml
index 634cec5d57ea..b0dbd2726acd 100644
--- a/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml
@@ -19,19 +19,19 @@ properties:
- qcom,ipq6018-qmp-pcie-phy
- qcom,ipq8074-qmp-gen3-pcie-phy
- qcom,ipq8074-qmp-pcie-phy
+ - qcom,ipq9574-qmp-gen3x2-pcie-phy
reg:
items:
- description: serdes
clocks:
- maxItems: 3
+ minItems: 3
+ maxItems: 5
clock-names:
- items:
- - const: aux
- - const: cfg_ahb
- - const: pipe
+ minItems: 3
+ maxItems: 5
resets:
maxItems: 2
@@ -61,6 +61,43 @@ required:
- clock-output-names
- "#phy-cells"
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,ipq6018-qmp-pcie-phy
+ - qcom,ipq8074-qmp-gen3-pcie-phy
+ - qcom,ipq8074-qmp-pcie-phy
+ then:
+ properties:
+ clocks:
+ maxItems: 3
+ clock-names:
+ items:
+ - const: aux
+ - const: cfg_ahb
+ - const: pipe
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,ipq9574-qmp-gen3x2-pcie-phy
+ then:
+ properties:
+ clocks:
+ maxItems: 5
+ clock-names:
+ items:
+ - const: aux
+ - const: cfg_ahb
+ - const: pipe
+ - const: anoc
+ - const: snoc
+
additionalProperties: false
examples:
--
2.40.1
^ permalink raw reply related
* [PATCH 3/7] dt-bindings: PCI: qcom: Add IPQ9574 PCIe controller
From: Alexandru Gagniuc @ 2024-04-02 19:25 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Bjorn Helgaas, Lorenzo Pieralisi,
Krzysztof Wilczyński, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Manivannan Sadhasivam
Cc: ansuelsmth, robimarko, Alexandru Gagniuc, linux-arm-msm,
linux-pci, devicetree, linux-kernel
In-Reply-To: <20240402192555.1955204-1-mr.nuke.me@gmail.com>
IPQ9574 has PCIe controllers which are almost identical to IPQ6018.
The only difference is that the "iface" clock is not required.
Document this difference along with the compatible string.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
---
.../devicetree/bindings/pci/qcom,pcie.yaml | 32 +++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index cf9a6910b542..6eb29547c18e 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -26,6 +26,7 @@ properties:
- qcom,pcie-ipq8064-v2
- qcom,pcie-ipq8074
- qcom,pcie-ipq8074-gen3
+ - qcom,pcie-ipq9574
- qcom,pcie-msm8996
- qcom,pcie-qcs404
- qcom,pcie-sdm845
@@ -383,6 +384,35 @@ allOf:
- const: axi_s # AXI Slave clock
- const: axi_bridge # AXI bridge clock
- const: rchng
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,pcie-ipq9574
+ then:
+ properties:
+ clocks:
+ minItems: 4
+ maxItems: 4
+ clock-names:
+ items:
+ - const: axi_m # AXI Master clock
+ - const: axi_s # AXI Slave clock
+ - const: axi_bridge # AXI bridge clock
+ - const: rchng
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,pcie-ipq6018
+ - qcom,pcie-ipq8074-gen3
+ - qcom,pcie-ipq9574
+ then:
+ properties:
resets:
minItems: 8
maxItems: 8
@@ -507,6 +537,7 @@ allOf:
- qcom,pcie-ipq8064v2
- qcom,pcie-ipq8074
- qcom,pcie-ipq8074-gen3
+ - qcom,pcie-ipq9574
- qcom,pcie-qcs404
then:
required:
@@ -566,6 +597,7 @@ allOf:
- qcom,pcie-ipq8064-v2
- qcom,pcie-ipq8074
- qcom,pcie-ipq8074-gen3
+ - qcom,pcie-ipq9574
- qcom,pcie-qcs404
then:
properties:
--
2.40.1
^ permalink raw reply related
* [PATCH 1/7] dt-bindings: clock: Add PCIe pipe related clocks for IPQ9574
From: Alexandru Gagniuc @ 2024-04-02 19:25 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Michael Turquette, Stephen Boyd,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: ansuelsmth, robimarko, Alexandru Gagniuc, linux-arm-msm,
linux-clk, devicetree, linux-kernel
Add defines for the missing PCIe PIPE clocks.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
---
include/dt-bindings/clock/qcom,ipq9574-gcc.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/include/dt-bindings/clock/qcom,ipq9574-gcc.h b/include/dt-bindings/clock/qcom,ipq9574-gcc.h
index 08fd3a37acaa..52123c5a09fa 100644
--- a/include/dt-bindings/clock/qcom,ipq9574-gcc.h
+++ b/include/dt-bindings/clock/qcom,ipq9574-gcc.h
@@ -216,4 +216,8 @@
#define GCC_CRYPTO_AHB_CLK 207
#define GCC_USB0_PIPE_CLK 208
#define GCC_USB0_SLEEP_CLK 209
+#define GCC_PCIE0_PIPE_CLK 210
+#define GCC_PCIE1_PIPE_CLK 211
+#define GCC_PCIE2_PIPE_CLK 212
+#define GCC_PCIE3_PIPE_CLK 213
#endif
--
2.40.1
^ permalink raw reply related
* Re: [PATCH 3/3] arm64: dts: qcom: msm8996: Add missing UFS host controller reset
From: Dmitry Baryshkov @ 2024-04-02 19:25 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Manivannan Sadhasivam, Konrad Dybcio, Alim Akhtar, Avri Altman,
Bart Van Assche, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andy Gross, Andy Gross, James E.J. Bottomley, Martin K. Petersen,
linux-arm-msm, linux-scsi, devicetree, linux-kernel
In-Reply-To: <g4a6gl47kfjx47ww36qnwp7zgvbd5gi5r7d26ibitfrybaa3l4@gvnz2mhsdf4s>
On Tue, 2 Apr 2024 at 20:35, Bjorn Andersson <andersson@kernel.org> wrote:
>
> On Fri, Feb 09, 2024 at 10:16:25PM +0200, Dmitry Baryshkov wrote:
> > On Tue, 30 Jan 2024 at 08:55, Manivannan Sadhasivam
> > <manivannan.sadhasivam@linaro.org> wrote:
> > >
> > > On Mon, Jan 29, 2024 at 11:44:15AM +0200, Dmitry Baryshkov wrote:
> > > > On Mon, 29 Jan 2024 at 09:55, Manivannan Sadhasivam
> > > > <manivannan.sadhasivam@linaro.org> wrote:
> > > > >
> > > > > UFS host controller reset is required for the drivers to properly reset the
> > > > > controller. Hence, add it.
> > > > >
> > > > > Fixes: 57fc67ef0d35 ("arm64: dts: qcom: msm8996: Add ufs related nodes")
> > > > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > > >
> > > > I think I had issues previously when I attempted to reset the
> > > > controller, but it might be because of the incomplete clocks
> > > > programming. Let met check whether it works first.
> > > >
> > >
> > > Sure. Please let me know.
> >
> > With the clocking fixes in place (I'll send them in a few minutes) and
> > with this patch the UFS breaks in the following way:
> >
>
> Was this further reviewed/investigated? What would you like me to do
> with this patch?
I'd say, hold until we can understand what is going on.
Mani, If you have any ideas what can be causing the issue, I'm open to
testing any ideas or any patches from your side.
Judging that the UFS breaks after toggling the reset, we might be
missing some setup steps.
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH v2 3/3] arm64: dts: qcom: msm8998: set qcom,no-msa-ready-indicator for wifi
From: Dmitry Baryshkov @ 2024-04-02 19:21 UTC (permalink / raw)
To: Alexey Minnekhanov
Cc: Marc Gonzalez, Konrad Dybcio, Krzysztof Kozlowski, Kalle Valo,
Jeff Johnson, ath10k, wireless, DT, MSM, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Pierre-Hugues Husson,
Arnaud Vrac, Bjorn Andersson, Jami Kettunen, Jeffrey Hugo
In-Reply-To: <8ef4f56c-83a3-4b26-877e-f1c7a0307e98@postmarketos.org>
On Tue, 2 Apr 2024 at 21:25, Alexey Minnekhanov
<alexeymin@postmarketos.org> wrote:
>
>
>
> On 02.04.2024 18:55, Dmitry Baryshkov wrote:
> > I'd say, we should take a step back and actually verify how this was
> > handled in the vendor kernel.
>
>
> AFAIK there is no such thing in vendor kernel driver for this, as
> this startup procedure is likely handled entirely in userspace in
> cnss_daemon.
>
> By the way this workaround is needed also for Wi-Fi in sdm630/660,
> so no not only msm8998 suffers from this.
Interesting. I have an sdm660 platform. I think I should be able to
check these workarounds then.
>
> > This sounds more like a firmware feature, not a hardware feature
>
> > having this property in DT does not look right
>
> I agree with these 2 points above. This can be handled more nicely
> as firmware feature encoded in firmware-5.bin using ath10k-fwencoder
> and not involve any new DT compatibles or properties.
I think Marc has already tried this. The firmware-N.bin, so-called
"boot firmware" (because for normal devices it also contains the
actual firmware), is loaded much later. See
https://lore.kernel.org/ath10k/243a97b7-c298-4307-9f06-8b3a7c3e24fd@freebox.fr/
Probably we have an option of loading the firmware earlier, so that at
this stage we already know the quirks set in the firmware-5.bin. But
note, I haven't checked if at this point the driver has all the
information to select correct firmware blob.
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH] arm64: tegra: correct Tegra132 I2C alias
From: Jon Hunter @ 2024-04-02 19:20 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Thierry Reding, devicetree, linux-tegra,
linux-kernel
Cc: stable
In-Reply-To: <20240401140854.97107-1-krzk@kernel.org>
On 01/04/2024 15:08, Krzysztof Kozlowski wrote:
> There is no such device as "as3722@40", because its name is "pmic". Use
> phandles for aliases to fix relying on full node path. This corrects
> aliases for RTC devices and also fixes dtc W=1 warning:
>
> tegra132-norrin.dts:12.3-36: Warning (alias_paths): /aliases:rtc0: aliases property is not a valid node (/i2c@7000d000/as3722@40)
>
> Fixes: 0f279ebdf3ce ("arm64: tegra: Add NVIDIA Tegra132 Norrin support")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> ---
> arch/arm64/boot/dts/nvidia/tegra132-norrin.dts | 4 ++--
> arch/arm64/boot/dts/nvidia/tegra132.dtsi | 2 +-
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
> index 14d58859bb55..683ac124523b 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
> +++ b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
> @@ -9,8 +9,8 @@ / {
> compatible = "nvidia,norrin", "nvidia,tegra132", "nvidia,tegra124";
>
> aliases {
> - rtc0 = "/i2c@7000d000/as3722@40";
> - rtc1 = "/rtc@7000e000";
> + rtc0 = &as3722;
> + rtc1 = &tegra_rtc;
> serial0 = &uarta;
> };
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra132.dtsi b/arch/arm64/boot/dts/nvidia/tegra132.dtsi
> index 7e24a212c7e4..5bcccfef3f7f 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra132.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra132.dtsi
> @@ -572,7 +572,7 @@ spi@7000de00 {
> status = "disabled";
> };
>
> - rtc@7000e000 {
> + tegra_rtc: rtc@7000e000 {
> compatible = "nvidia,tegra124-rtc", "nvidia,tegra20-rtc";
> reg = <0x0 0x7000e000 0x0 0x100>;
> interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Thanks!
Jon
--
nvpublic
^ permalink raw reply
* Re: [Patch v2 1/2] dt-bindings: make sid and broadcast reg optional
From: Jon Hunter @ 2024-04-02 19:15 UTC (permalink / raw)
To: Sumit Gupta, krzysztof.kozlowski, robh, conor+dt, maz,
mark.rutland, treding
Cc: devicetree, linux-kernel, linux-tegra, amhetre, bbasu
In-Reply-To: <20240402132626.24693-2-sumitg@nvidia.com>
On 02/04/2024 14:26, Sumit Gupta wrote:
> MC SID and Broadbast channel register access is restricted for Guest VM.
> Make both the regions as optional for SoC's from Tegra186 onwards.
> Tegra MC driver will skip access to the restricted registers from Guest
> if the respective regions are not present in the memory-controller node
> of Guest DT.
>
> Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
> ---
> .../memory-controllers/nvidia,tegra186-mc.yaml | 18 +++++++++---------
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
> index 935d63d181d9..c52c259f7ec5 100644
> --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
> +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
> @@ -146,17 +146,17 @@ allOf:
> then:
> properties:
> reg:
> - maxItems: 6
> + maxItems: 4
minItems?
Jon
--
nvpublic
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox