* [PATCH v7 04/37] dt-bindings: interrupt-controller: Add header for Renesas SH3/4 INTC.
From: Yoshinori Sato @ 2024-04-04 4:59 UTC (permalink / raw)
To: linux-sh
Cc: Yoshinori Sato, Damien Le Moal, Niklas Cassel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Michael Turquette, Stephen Boyd, David Airlie, Daniel Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Thomas Gleixner, Bjorn Helgaas, Lorenzo Pieralisi,
Krzysztof Wilczyński, Greg Kroah-Hartman, Jiri Slaby,
Magnus Damm, Daniel Lezcano, Rich Felker,
John Paul Adrian Glaubitz, Lee Jones, Helge Deller,
Heiko Stuebner, Shawn Guo, Sebastian Reichel, Chris Morgan,
Linus Walleij, Arnd Bergmann, David Rientjes, Hyeonggon Yoo,
Vlastimil Babka, Baoquan He, Andrew Morton, Guenter Roeck,
Kefeng Wang, Stephen Rothwell, Javier Martinez Canillas, Guo Ren,
Azeem Shaikh, Max Filippov, Jonathan Corbet, Jacky Huang,
Herve Codina, Manikanta Guntupalli, Anup Patel, Biju Das,
Uwe Kleine-König, Sam Ravnborg, Sergey Shtylyov,
Laurent Pinchart, linux-ide, devicetree, linux-kernel,
linux-renesas-soc, linux-clk, dri-devel, linux-pci, linux-serial,
linux-fbdev
In-Reply-To: <cover.1712205900.git.ysato@users.sourceforge.jp>
Renesas SH7751 Interrupt controller priority register define.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
.../renesas,sh7751-intc.h | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
create mode 100644 include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h
diff --git a/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h b/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h
new file mode 100644
index 000000000000..0543bd1b895e
--- /dev/null
+++ b/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+ *
+ * SH3/4 INTC IPR register offsets (Address / bits)
+ */
+
+#ifndef __DT_BINDINGS_RENESAS_SH7751_INTC
+#define __DT_BINDINGS_RENESAS_SH7751_INTC
+
+#define IPRA 0
+#define IPRB 4
+#define IPRC 8
+#define IPRD 12
+#define INTPRI00 256
+#define IPR_B12 12
+#define IPR_B8 8
+#define IPR_B4 4
+#define IPR_B0 0
+
+#endif
--
2.39.2
^ permalink raw reply related
* [PATCH v7 01/37] sh: passing FDT address to kernel startup.
From: Yoshinori Sato @ 2024-04-04 4:59 UTC (permalink / raw)
To: linux-sh
Cc: Yoshinori Sato, Damien Le Moal, Niklas Cassel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Michael Turquette, Stephen Boyd, David Airlie, Daniel Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Thomas Gleixner, Bjorn Helgaas, Lorenzo Pieralisi,
Krzysztof Wilczyński, Greg Kroah-Hartman, Jiri Slaby,
Magnus Damm, Daniel Lezcano, Rich Felker,
John Paul Adrian Glaubitz, Lee Jones, Helge Deller,
Heiko Stuebner, Shawn Guo, Sebastian Reichel, Chris Morgan,
Linus Walleij, Arnd Bergmann, David Rientjes, Hyeonggon Yoo,
Vlastimil Babka, Baoquan He, Andrew Morton, Guenter Roeck,
Kefeng Wang, Stephen Rothwell, Javier Martinez Canillas, Guo Ren,
Azeem Shaikh, Max Filippov, Jonathan Corbet, Jacky Huang,
Herve Codina, Manikanta Guntupalli, Anup Patel, Biju Das,
Uwe Kleine-König, Sam Ravnborg, Sergey Shtylyov,
Laurent Pinchart, linux-ide, devicetree, linux-kernel,
linux-renesas-soc, linux-clk, dri-devel, linux-pci, linux-serial,
linux-fbdev
In-Reply-To: <cover.1712205900.git.ysato@users.sourceforge.jp>
R4 is caller saved in SH ABI.
Save it so it doesn't get corrupted until it's needed for initialization.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/sh/boot/compressed/head_32.S | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/sh/boot/compressed/head_32.S b/arch/sh/boot/compressed/head_32.S
index 7bb168133dbb..6be59851122e 100644
--- a/arch/sh/boot/compressed/head_32.S
+++ b/arch/sh/boot/compressed/head_32.S
@@ -15,7 +15,8 @@ startup:
/* Load initial status register */
mov.l init_sr, r1
ldc r1, sr
-
+ /* Save FDT address */
+ mov r4, r13
/* Move myself to proper location if necessary */
mova 1f, r0
mov.l 1f, r2
@@ -84,7 +85,7 @@ l1:
/* Jump to the start of the decompressed kernel */
mov.l kernel_start_addr, r0
jmp @r0
- nop
+ mov r13, r4
.align 2
bss_start_addr:
--
2.39.2
^ permalink raw reply related
* [PATCH v7 03/37] sh: Enable OF support for build and configuration.
From: Yoshinori Sato @ 2024-04-04 4:59 UTC (permalink / raw)
To: linux-sh
Cc: Yoshinori Sato, Damien Le Moal, Niklas Cassel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Michael Turquette, Stephen Boyd, David Airlie, Daniel Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Thomas Gleixner, Bjorn Helgaas, Lorenzo Pieralisi,
Krzysztof Wilczyński, Greg Kroah-Hartman, Jiri Slaby,
Magnus Damm, Daniel Lezcano, Rich Felker,
John Paul Adrian Glaubitz, Lee Jones, Helge Deller,
Heiko Stuebner, Shawn Guo, Sebastian Reichel, Chris Morgan,
Linus Walleij, Arnd Bergmann, David Rientjes, Hyeonggon Yoo,
Vlastimil Babka, Baoquan He, Andrew Morton, Guenter Roeck,
Kefeng Wang, Stephen Rothwell, Javier Martinez Canillas, Guo Ren,
Azeem Shaikh, Max Filippov, Jonathan Corbet, Jacky Huang,
Herve Codina, Manikanta Guntupalli, Anup Patel, Biju Das,
Uwe Kleine-König, Sam Ravnborg, Sergey Shtylyov,
Laurent Pinchart, linux-ide, devicetree, linux-kernel,
linux-renesas-soc, linux-clk, dri-devel, linux-pci, linux-serial,
linux-fbdev
In-Reply-To: <cover.1712205900.git.ysato@users.sourceforge.jp>
IRQ, CLK and PCI will be migrated to a common driver framework.
So if OF, disable the SH specific drivers.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/Kconfig | 11 ++++++-----
arch/sh/drivers/Makefile | 2 ++
arch/sh/kernel/cpu/Makefile | 9 +++++++--
arch/sh/kernel/cpu/sh4/Makefile | 3 +++
4 files changed, 18 insertions(+), 7 deletions(-)
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index cbf48e69ad74..6711cde0d973 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -66,10 +66,10 @@ config SUPERH
select MODULES_USE_ELF_RELA
select NEED_SG_DMA_LENGTH
select NO_DMA if !MMU && !DMA_COHERENT
- select NO_GENERIC_PCI_IOPORT_MAP if PCI
+ select NO_GENERIC_PCI_IOPORT_MAP if !SH_DEVICE_TREE
select OLD_SIGACTION
select OLD_SIGSUSPEND
- select PCI_DOMAINS if PCI
+ select PCI_DOMAINS if PCI && !SH_DEVICE_TREE
select PERF_EVENTS
select PERF_USE_VMALLOC
select RTC_LIB
@@ -153,7 +153,7 @@ menu "System type"
#
config CPU_SH2
bool
- select SH_INTC
+ select SH_INTC if !SH_DEVICE_TREE
config CPU_SH2A
bool
@@ -179,7 +179,7 @@ config CPU_SH4
select CPU_HAS_INTEVT
select CPU_HAS_SR_RB
select CPU_HAS_FPU if !CPU_SH4AL_DSP
- select SH_INTC
+ select SH_INTC if !SH_DEVICE_TREE
select SYS_SUPPORTS_SH_TMU
config CPU_SH4A
@@ -522,6 +522,7 @@ config SH_PCLK_FREQ
config SH_CLK_CPG
def_bool y
+ depends on !COMMON_CLK
config SH_CLK_CPG_LEGACY
depends on SH_CLK_CPG
@@ -666,7 +667,7 @@ config BUILTIN_DTB_SOURCE
kernel.
config ZERO_PAGE_OFFSET
- hex
+ hex "Zero page offset"
default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
SH_7751_SOLUTION_ENGINE
default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
diff --git a/arch/sh/drivers/Makefile b/arch/sh/drivers/Makefile
index 8bd10b904bf9..83f609ca1eb4 100644
--- a/arch/sh/drivers/Makefile
+++ b/arch/sh/drivers/Makefile
@@ -5,6 +5,8 @@
obj-y += dma/ platform_early.o
+ifndef CONFIG_SH_DEVICE_TREE
obj-$(CONFIG_PCI) += pci/
+endif
obj-$(CONFIG_PUSH_SWITCH) += push-switch.o
obj-$(CONFIG_HEARTBEAT) += heartbeat.o
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index 46118236bf04..e00ebf134985 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -16,6 +16,11 @@ obj-$(CONFIG_ARCH_SHMOBILE) += shmobile/
# Common interfaces.
obj-$(CONFIG_SH_ADC) += adc.o
+ifndef CONFIG_COMMON_CLK
+obj-y += clock.o
obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o
-
-obj-y += irq/ init.o clock.o fpu.o pfc.o proc.o
+endif
+ifndef CONFIG_GENERIC_IRQ_CHIP
+obj-y += irq/
+endif
+obj-y += init.o fpu.o pfc.o proc.o
diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile
index 02e3ee16e15c..33da4c86feff 100644
--- a/arch/sh/kernel/cpu/sh4/Makefile
+++ b/arch/sh/kernel/cpu/sh4/Makefile
@@ -15,6 +15,7 @@ perf-$(CONFIG_CPU_SUBTYPE_SH7750) := perf_event.o
perf-$(CONFIG_CPU_SUBTYPE_SH7750S) := perf_event.o
perf-$(CONFIG_CPU_SUBTYPE_SH7091) := perf_event.o
+ifndef CONFIG_SH_DEVICE_TREE
# CPU subtype setup
obj-$(CONFIG_CPU_SUBTYPE_SH7750) += setup-sh7750.o
obj-$(CONFIG_CPU_SUBTYPE_SH7750R) += setup-sh7750.o
@@ -29,5 +30,7 @@ ifndef CONFIG_CPU_SH4A
clock-$(CONFIG_CPU_SH4) := clock-sh4.o
endif
+endif # CONFIG_SH_DEVICE_TREE
+
obj-y += $(clock-y)
obj-$(CONFIG_PERF_EVENTS) += $(perf-y)
--
2.39.2
^ permalink raw reply related
* [PATCH v7 02/37] sh: Kconfig unified OF supported targets.
From: Yoshinori Sato @ 2024-04-04 4:59 UTC (permalink / raw)
To: linux-sh
Cc: Yoshinori Sato, Damien Le Moal, Niklas Cassel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Michael Turquette, Stephen Boyd, David Airlie, Daniel Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Thomas Gleixner, Bjorn Helgaas, Lorenzo Pieralisi,
Krzysztof Wilczyński, Greg Kroah-Hartman, Jiri Slaby,
Magnus Damm, Daniel Lezcano, Rich Felker,
John Paul Adrian Glaubitz, Lee Jones, Helge Deller,
Heiko Stuebner, Shawn Guo, Sebastian Reichel, Chris Morgan,
Linus Walleij, Arnd Bergmann, David Rientjes, Hyeonggon Yoo,
Vlastimil Babka, Baoquan He, Andrew Morton, Guenter Roeck,
Kefeng Wang, Stephen Rothwell, Javier Martinez Canillas, Guo Ren,
Azeem Shaikh, Max Filippov, Jonathan Corbet, Jacky Huang,
Herve Codina, Manikanta Guntupalli, Anup Patel, Biju Das,
Uwe Kleine-König, Sam Ravnborg, Sergey Shtylyov,
Laurent Pinchart, linux-ide, devicetree, linux-kernel,
linux-renesas-soc, linux-clk, dri-devel, linux-pci, linux-serial,
linux-fbdev
In-Reply-To: <cover.1712205900.git.ysato@users.sourceforge.jp>
Targets that support OF should be treated as one board.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/Kconfig | 1 +
arch/sh/boards/Kconfig | 23 +++++++++++++----------
2 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 2ad3e29f0ebe..cbf48e69ad74 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -711,6 +711,7 @@ choice
prompt "Kernel command line"
optional
default CMDLINE_OVERWRITE
+ depends on !OF || USE_BUILTIN_DTB
help
Setting this option allows the kernel command line arguments
to be set.
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 109bec4dad94..46387fd040ad 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -19,16 +19,9 @@ config SH_DEVICE_TREE
select TIMER_OF
select COMMON_CLK
select GENERIC_CALIBRATE_DELAY
-
-config SH_JCORE_SOC
- bool "J-Core SoC"
- select SH_DEVICE_TREE
- select CLKSRC_JCORE_PIT
- select JCORE_AIC
- depends on CPU_J2
- help
- Select this option to include drivers core components of the
- J-Core SoC, including interrupt controllers and timers.
+ select GENERIC_IRQ_CHIP
+ select SYS_SUPPORTS_PCI
+ select GENERIC_PCI_IOMAP if PCI
config SH_SOLUTION_ENGINE
bool "SolutionEngine"
@@ -293,6 +286,7 @@ config SH_LANDISK
bool "LANDISK"
depends on CPU_SUBTYPE_SH7751R
select HAVE_PCI
+ select SYS_SUPPORTS_PCI
help
I-O DATA DEVICE, INC. "LANDISK Series" support.
@@ -369,6 +363,15 @@ config SH_APSH4AD0A
help
Select AP-SH4AD-0A if configuring for an ALPHAPROJECT AP-SH4AD-0A.
+config SH_OF_BOARD
+ bool "General Open Firmware boards"
+ select SH_DEVICE_TREE
+ select CLKSRC_JCORE_PIT if CPU_J2
+ select JCORE_AIC if CPU_J2
+ select HAVE_PCI if CPU_SUBTYPE_SH7751R
+ help
+ This board means general OF supported targets.
+
source "arch/sh/boards/mach-r2d/Kconfig"
source "arch/sh/boards/mach-highlander/Kconfig"
source "arch/sh/boards/mach-sdk7780/Kconfig"
--
2.39.2
^ permalink raw reply related
* [PATCH v7 00/37] Device Tree support for SH7751 based board
From: Yoshinori Sato @ 2024-04-04 4:59 UTC (permalink / raw)
To: linux-sh
Cc: Yoshinori Sato, Damien Le Moal, Niklas Cassel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Michael Turquette, Stephen Boyd, David Airlie, Daniel Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Thomas Gleixner, Bjorn Helgaas, Lorenzo Pieralisi,
Krzysztof Wilczyński, Greg Kroah-Hartman, Jiri Slaby,
Magnus Damm, Daniel Lezcano, Rich Felker,
John Paul Adrian Glaubitz, Lee Jones, Helge Deller,
Heiko Stuebner, Shawn Guo, Sebastian Reichel, Chris Morgan,
Linus Walleij, Arnd Bergmann, David Rientjes, Hyeonggon Yoo,
Vlastimil Babka, Baoquan He, Andrew Morton, Guenter Roeck,
Kefeng Wang, Stephen Rothwell, Javier Martinez Canillas, Guo Ren,
Azeem Shaikh, Max Filippov, Jonathan Corbet, Jacky Huang,
Herve Codina, Manikanta Guntupalli, Anup Patel, Biju Das,
Uwe Kleine-König, Sam Ravnborg, Sergey Shtylyov,
Laurent Pinchart, linux-ide, devicetree, linux-kernel,
linux-renesas-soc, linux-clk, dri-devel, linux-pci, linux-serial,
linux-fbdev
This is an updated version of something I wrote about 7 years ago.
Minimum support for R2D-plus and LANDISK.
I think R2D-1 will work if you add AX88796 to dts.
And board-specific functions and SCI's SPI functions are not supported.
You can get it working with qemu found here.
https://gitlab.com/yoshinori.sato/qemu/-/tree/landisk
v7 changes.
- sh/kernel/setup.c: fix kernel parameter handling.
- clk-sh7750.c: cleanup.
- sh_tmu.c: cleanup.
- irq-renesas-sh7751.c: IPR definition move to code.
- irq-renesas-sh7751irl.c: update register definition.
- pci-sh7751.c: Register initialization fix.
- sm501 and sm501fb: Re-design Device Tree properties.
v6 changes.
- pci-sh7751: merge register define.
- pci-sh7751: use 'dma-ranges' property.
- pci-sh7751: rename general PCI properties.
- sm501 and sm501fb: Re-design Device Tree properties.
- sh/kernel/setup: cleanup command line setup.
- irq-sh7751.c: some cleanup.
v5 changes.
- pci-sh7751: revert header changes. and some fix in previuous driver.
- sh/kernel/iomap.c: Use SH io functions.
- sm501 and sm501fb: re-write DT support.
v4 changes.
- cpg-sh7750: use clk-divider and clk-gate.
- pci-sh7751: unified header files to old PCI driver.
- irq-renesas-sh7751: IPR registers direct mapping.
- irq-renesas-sh7751irl: useful register bit mapping.
- sm501 and sm501fb: re-write dt parser.
- j2_minus: fix build error.
- dt-binding schema: fix some errors.
- *.dts: cleanup.
v3 changes.
- Rewrite clk drivers.
- Added sh_tmu to OF support.
- Cleanup PCI stuff.
- Update sm501 and sm501fb OF support.
- Update devicetree and documents.
v2 changes.
- Rebasing v6,6-rc1
- re-write irqchip driver.
- Add binding documents.
- Cleanup review comment.
Yoshinori Sato (37):
sh: passing FDT address to kernel startup.
sh: Kconfig unified OF supported targets.
sh: Enable OF support for build and configuration.
dt-bindings: interrupt-controller: Add header for Renesas SH3/4 INTC.
sh: GENERIC_IRQ_CHIP support for CONFIG_OF=y
sh: kernel/setup Update DT support.
sh: Fix COMMON_CLK support in CONFIG_OF=y.
clocksource: sh_tmu: CLOCKSOURCE support.
dt-binding: Add compatible SH7750 SoC
sh: Common PCI Framework driver support.
pci: pci-sh7751: Add SH7751 PCI driver
dt-bindings: pci: pci-sh7751: Add SH7751 PCI
dt-bindings: clock: sh7750-cpg: Add renesas,sh7750-cpg header.
clk: Compatible with narrow registers
clk: renesas: Add SH7750/7751 CPG Driver
irqchip: Add SH7751 INTC driver
dt-bindings: interrupt-controller: renesas,sh7751-intc: Add
json-schema
irqchip: SH7751 external interrupt encoder with enable gate.
dt-bindings: interrupt-controller: renesas,sh7751-irl-ext: Add
json-schema
serial: sh-sci: fix SH4 OF support.
dt-bindings: serial: renesas,scif: Add scif-sh7751.
dt-bindings: display: smi,sm501: SMI SM501 binding json-schema
dt-bindings: display: sm501 register definition helper
mfd: sm501: Convert platform_data to OF property
dt-binding: sh: cpus: Add SH CPUs json-schema
dt-bindings: vendor-prefixes: Add iodata
dt-bindings: ata: ata-generic: Add new targets
dt-bindings: soc: renesas: sh: Add SH7751 based target
sh: SH7751R SoC Internal peripheral definition dtsi.
sh: add RTS7751R2D Plus DTS
sh: Add IO DATA LANDISK dts
sh: Add IO DATA USL-5P dts
sh: j2_mimas_v2.dts update
sh: Add dtbs target support.
sh: RTS7751R2D Plus OF defconfig
sh: LANDISK OF defconfig
sh: j2_defconfig: update
.../devicetree/bindings/ata/ata-generic.yaml | 2 +
.../bindings/clock/renesas,sh7750-cpg.yaml | 105 ++++
.../bindings/display/smi,sm501.yaml | 398 +++++++++++++++
.../renesas,sh7751-intc.yaml | 53 ++
.../renesas,sh7751-irl-ext.yaml | 57 +++
.../bindings/pci/renesas,sh7751-pci.yaml | 89 ++++
.../bindings/serial/renesas,scif.yaml | 1 +
.../devicetree/bindings/sh/cpus.yaml | 63 +++
.../devicetree/bindings/soc/renesas/sh.yaml | 27 +
.../bindings/timer/renesas,tmu.yaml | 2 +
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
arch/sh/Kconfig | 33 +-
arch/sh/boards/Kconfig | 23 +-
arch/sh/boards/of-generic.c | 28 +-
arch/sh/boot/compressed/head_32.S | 5 +-
arch/sh/boot/dts/Makefile | 5 +
arch/sh/boot/dts/j2_mimas_v2.dts | 2 +-
arch/sh/boot/dts/landisk.dts | 77 +++
arch/sh/boot/dts/rts7751r2dplus.dts | 169 ++++++
arch/sh/boot/dts/sh7751r.dtsi | 105 ++++
arch/sh/boot/dts/usl-5p.dts | 85 ++++
arch/sh/configs/j2_defconfig | 11 +-
arch/sh/configs/landisk-of_defconfig | 104 ++++
arch/sh/configs/rts7751r2dplus-of_defconfig | 75 +++
arch/sh/drivers/Makefile | 2 +
arch/sh/include/asm/io.h | 8 +
arch/sh/include/asm/irq.h | 10 +-
arch/sh/include/asm/pci.h | 4 +
arch/sh/include/asm/setup.h | 1 +
arch/sh/kernel/cpu/Makefile | 6 +-
arch/sh/kernel/cpu/irq/imask.c | 17 +
arch/sh/kernel/cpu/sh4/Makefile | 3 +
arch/sh/kernel/iomap.c | 18 +
arch/sh/kernel/setup.c | 36 +-
arch/sh/kernel/time.c | 12 +
drivers/clk/clk-divider.c | 56 +-
drivers/clk/clk-gate.c | 62 ++-
drivers/clk/renesas/Kconfig | 13 +-
drivers/clk/renesas/Makefile | 1 +
drivers/clk/renesas/clk-sh7750.c | 480 ++++++++++++++++++
drivers/clocksource/sh_tmu.c | 198 +++++---
drivers/irqchip/Kconfig | 15 +
drivers/irqchip/Makefile | 3 +
drivers/irqchip/irq-renesas-sh7751.c | 282 ++++++++++
drivers/irqchip/irq-renesas-sh7751irl.c | 221 ++++++++
drivers/mfd/sm501.c | 315 ++++++++++++
drivers/pci/controller/Kconfig | 9 +
drivers/pci/controller/Makefile | 1 +
drivers/pci/controller/pci-sh7751.c | 342 +++++++++++++
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/sh-sci.c | 6 +-
drivers/video/fbdev/sm501fb.c | 106 ++++
include/dt-bindings/clock/sh7750-cpg.h | 26 +
include/dt-bindings/display/sm501.h | 76 +++
.../renesas,sh7751-intc.h | 19 +
include/linux/clk-provider.h | 22 +-
include/linux/sh_intc.h | 7 +-
57 files changed, 3713 insertions(+), 187 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml
create mode 100644 Documentation/devicetree/bindings/display/smi,sm501.yaml
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.yaml
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml
create mode 100644 Documentation/devicetree/bindings/pci/renesas,sh7751-pci.yaml
create mode 100644 Documentation/devicetree/bindings/sh/cpus.yaml
create mode 100644 Documentation/devicetree/bindings/soc/renesas/sh.yaml
create mode 100644 arch/sh/boot/dts/landisk.dts
create mode 100644 arch/sh/boot/dts/rts7751r2dplus.dts
create mode 100644 arch/sh/boot/dts/sh7751r.dtsi
create mode 100644 arch/sh/boot/dts/usl-5p.dts
create mode 100644 arch/sh/configs/landisk-of_defconfig
create mode 100644 arch/sh/configs/rts7751r2dplus-of_defconfig
create mode 100644 drivers/clk/renesas/clk-sh7750.c
create mode 100644 drivers/irqchip/irq-renesas-sh7751.c
create mode 100644 drivers/irqchip/irq-renesas-sh7751irl.c
create mode 100644 drivers/pci/controller/pci-sh7751.c
create mode 100644 include/dt-bindings/clock/sh7750-cpg.h
create mode 100644 include/dt-bindings/display/sm501.h
create mode 100644 include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h
--
2.39.2
^ permalink raw reply
* [PATCH v19 0/9] Add multiport support for DWC3 controllers
From: Krishna Kurapati @ 2024-04-04 5:12 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Bjorn Andersson, Wesley Cheng,
Konrad Dybcio, Greg Kroah-Hartman, Conor Dooley, Thinh Nguyen,
Felipe Balbi, Johan Hovold
Cc: devicetree, linux-arm-msm, linux-usb, linux-kernel, quic_ppratap,
quic_jackp, Krishna Kurapati
Currently the DWC3 driver supports only single port controller which
requires at most two PHYs ie HS and SS PHYs. There are SoCs that has
DWC3 controller with multiple ports that can operate in host mode.
Some of the port supports both SS+HS and other port supports only HS
mode.
This change primarily refactors the Phy logic in core driver to allow
multiport support with Generic Phy's.
Changes have been tested on QCOM SoC SA8295P which has 4 ports (2
are HS+SS capable and 2 are HS only capable).
Changes in v19:
Replaced IS_ERR(ptr) with a NULL check.
Modified name of function reading the port num in core file.
Changes in v18:
Updated variable names in patch-7 for setup_port_irq and
find_num_ports calls.
Changes in v17:
Modified DT handling patch by checking if dp_hs_phy_1 is present
or not and then going for DT parsing.
Changes in v16:
Removing ACPI has simplified the interrupt reading in wrapper. Also
the logic to find number of ports is based on dp_hs_phy interrupt check
in DT. Enabling and disabling interrupts is now done per port. Added
info on power event irq in commit message.
Changes in v15:
Added minItems property in qcom,dwc3 bindings as suggested by Rob.
Retained all RB's/ACK's got in v14.
Changes in v14:
Moved wrapper binding update to 5th patch in the series as it deals
with only wakeup and not enumeration. The first part of the series
deals with enumeration and the next part deals with wakeup.
Updated commit text for wrapper driver patches.
Added error checks in get_port_index and setup_irq call which were
missing in v13.
Added SOB and CDB tags appropriately for the patches.
Rebased code on top of latest usb next.
DT changes have been removed and will be sent as a separate series.
Changes in v13:
This series is a subset of patches in v11 as the first 3 patches in v11
have been mereged into usb-next.
Moved dr_mode property from platform specific files to common sc8280xp DT.
Fixed function call wrapping, added comments and replaced #defines with
enum in dwc3-qcom for identifying IRQ index appropriately.
Fixed nitpicks pointed out in v11 for suspend-resume handling.
Added reported-by tag for phy refactoring patch as a compile error was
found by kernel test bot [1].
Removed reviewed-by tag of maintainer for phy refactoring patch as a minor
change of increasing phy-names array size by 2-bytes was done to fix
compilation issue mentioned in [1].
Changes in v12:
Pushed as a subset of acked but no-yet-merged patches of v11 with intent
of making rebase of other patches easy. Active reviewers from community
suggested that it would be better to push the whole series in one go as it
would give good clarity and context for all the patches in the series.
So pushed v13 for the same addressing comments received in v11.
Changes in v11:
Implemented port_count calculation by reading interrupt-names from DT.
Refactored IRQ handling in dwc3-qcom.
Moving of macros to xhci-ext-caps.h made as a separate patch.
Names of interrupts to be displayed on /proc/interrupts set to the ones
present in DT.
Changes in v10:
Refactored phy init/exit/power-on/off functions in dwc3 core
Refactored dwc3-qcom irq registration and handling
Implemented wakeup for multiport irq's
Moved few macros from xhci.h to xhci-ext-caps.h
Fixed nits pointed out in v9
Fixed Co-developed by and SOB tags in patches 5 and 11
Changes in v9:
Added IRQ support for DP/DM/SS MP Irq's of SC8280
Refactored code to read port count by accessing xhci registers
Changes in v8:
Reorganised code in patch-5
Fixed nitpicks in code according to comments received on v7
Fixed indentation in DT patches
Added drive strength for pinctrl nodes in SA8295 DT
Changes in v7:
Added power event irq's for Multiport controller.
Udpated commit text for patch-9 (adding DT changes for enabling first
port of multiport controller on sa8540-ride).
Fixed check-patch warnings for driver code.
Fixed DT binding errors for changes in snps,dwc3.yaml
Reabsed code on top of usb-next
Changes in v6:
Updated comments in code after.
Updated variables names appropriately as per review comments.
Updated commit text in patch-2 and added additional info as per review
comments.
The patch header in v5 doesn't have "PATHCH v5" notation present. Corrected
it in this version.
Changes in v5:
Added DT support for first port of Teritiary USB controller on SA8540-Ride
Added support for reading port info from XHCI Extended Params registers.
Changes in RFC v4:
Added DT support for SA8295p.
Changes in RFC v3:
Incase any PHY init fails, then clear/exit the PHYs that
are already initialized.
Changes in RFC v2:
Changed dwc3_count_phys to return the number of PHY Phandles in the node.
This will be used now in dwc3_extract_num_phys to increment num_usb2_phy
and num_usb3_phy.
Added new parameter "ss_idx" in dwc3_core_get_phy_ny_node and changed its
structure such that the first half is for HS-PHY and second half is for
SS-PHY.
In dwc3_core_get_phy, for multiport controller, only if SS-PHY phandle is
present, pass proper SS_IDX else pass -1.
Tested enumeration interrupt registration on Tertiary controller of
SA8295 ADP:
/ # lsusb
Bus 001 Device 001: ID 1d6b:0002
Bus 002 Device 001: ID 1d6b:0003
Bus 001 Device 002: ID 046d:c06a
/ #
/ # dmesg | grep ports
[ 0.066250] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[ 0.154668] dwc3 a400000.usb: K: hs-ports: 4 ss-ports: 2
[ 0.223137] xhci-hcd xhci-hcd.0.auto: Host supports USB 3.1 Enhanced SuperSpeed
[ 0.227795] hub 1-0:1.0: 4 ports detected
[ 0.233724] hub 2-0:1.0: 2 ports detected
Tested interrupt registration for all 4 ports of SA8295 ADP:
/ # cat /proc/interrupts |grep phy
162: 0 0 0 0 0 0 0 0 PDC 127 Edge dp_hs_phy_1
163: 0 0 0 0 0 0 0 0 PDC 129 Edge dp_hs_phy_2
164: 0 0 0 0 0 0 0 0 PDC 131 Edge dp_hs_phy_3
165: 0 0 0 0 0 0 0 0 PDC 133 Edge dp_hs_phy_4
166: 0 0 0 0 0 0 0 0 PDC 126 Edge dm_hs_phy_1
167: 0 0 0 0 0 0 0 0 PDC 16 Level ss_phy_1
168: 0 0 0 0 0 0 0 0 PDC 128 Edge dm_hs_phy_2
169: 0 0 0 0 0 0 0 0 PDC 17 Level ss_phy_2
170: 0 0 0 0 0 0 0 0 PDC 130 Edge dm_hs_phy_3
171: 0 0 0 0 0 0 0 0 PDC 132 Edge dm_hs_phy_4
173: 0 0 0 0 0 0 0 0 PDC 14 Edge dp_hs_phy_irq
174: 0 0 0 0 0 0 0 0 PDC 15 Edge dm_hs_phy_irq
175: 0 0 0 0 0 0 0 0 PDC 138 Level ss_phy_irq
Tested working of ADB on SM8550 MTP.
Links to previous versions:
Link to v18: https://lore.kernel.org/all/20240326113253.3010447-1-quic_kriskura@quicinc.com/
Link to v17: https://lore.kernel.org/all/20240326102809.2940123-1-quic_kriskura@quicinc.com/
Link to v16: https://lore.kernel.org/all/20240307062052.2319851-1-quic_kriskura@quicinc.com/
Link to v15: https://lore.kernel.org/all/20240216005756.762712-1-quic_kriskura@quicinc.com/
Link to v14: https://lore.kernel.org/all/20240206051825.1038685-1-quic_kriskura@quicinc.com/
Link to v13: https://lore.kernel.org/all/20231007154806.605-1-quic_kriskura@quicinc.com/
Link to v12: https://lore.kernel.org/all/20231004165922.25642-1-quic_kriskura@quicinc.com/
Link to v11: https://lore.kernel.org/all/20230828133033.11988-1-quic_kriskura@quicinc.com/
Link to v10: https://lore.kernel.org/all/20230727223307.8096-1-quic_kriskura@quicinc.com/
Link to v9: https://lore.kernel.org/all/20230621043628.21485-1-quic_kriskura@quicinc.com/
Link to v8: https://lore.kernel.org/all/20230514054917.21318-1-quic_kriskura@quicinc.com/
Link to v7: https://lore.kernel.org/all/20230501143445.3851-1-quic_kriskura@quicinc.com/
Link to v6: https://lore.kernel.org/all/20230405125759.4201-1-quic_kriskura@quicinc.com/
Link to v5: https://lore.kernel.org/all/20230310163420.7582-1-quic_kriskura@quicinc.com/
Link to RFC v4: https://lore.kernel.org/all/20230115114146.12628-1-quic_kriskura@quicinc.com/
Link to RFC v3: https://lore.kernel.org/all/1654709787-23686-1-git-send-email-quic_harshq@quicinc.com/#r
Link to RFC v2: https://lore.kernel.org/all/1653560029-6937-1-git-send-email-quic_harshq@quicinc.com/#r
Krishna Kurapati (9):
dt-bindings: usb: Add bindings for multiport properties on DWC3
controller
usb: dwc3: core: Access XHCI address space temporarily to read port
info
usb: dwc3: core: Skip setting event buffers for host only controllers
usb: dwc3: core: Refactor PHY logic to support Multiport Controller
dt-bindings: usb: qcom,dwc3: Add bindings for SC8280 Multiport
usb: dwc3: qcom: Add helper function to request wakeup interrupts
usb: dwc3: qcom: Refactor IRQ handling in glue driver
usb: dwc3: qcom: Enable wakeup for applicable ports of multiport
usb: dwc3: qcom: Add multiport suspend/resume support for wrapper
.../devicetree/bindings/usb/qcom,dwc3.yaml | 34 ++
.../devicetree/bindings/usb/snps,dwc3.yaml | 13 +-
drivers/usb/dwc3/core.c | 325 +++++++++++++-----
drivers/usb/dwc3/core.h | 19 +-
drivers/usb/dwc3/drd.c | 15 +-
drivers/usb/dwc3/dwc3-qcom.c | 251 +++++++++-----
6 files changed, 482 insertions(+), 175 deletions(-)
--
2.34.1
^ permalink raw reply
* [PATCH v19 1/9] dt-bindings: usb: Add bindings for multiport properties on DWC3 controller
From: Krishna Kurapati @ 2024-04-04 5:12 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Bjorn Andersson, Wesley Cheng,
Konrad Dybcio, Greg Kroah-Hartman, Conor Dooley, Thinh Nguyen,
Felipe Balbi, Johan Hovold
Cc: devicetree, linux-arm-msm, linux-usb, linux-kernel, quic_ppratap,
quic_jackp, Krishna Kurapati, Johan Hovold
In-Reply-To: <20240404051229.3082902-1-quic_kriskura@quicinc.com>
Add bindings to indicate properties required to support multiport
on Synopsys DWC3 controller.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
---
.../devicetree/bindings/usb/snps,dwc3.yaml | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
index 203a1eb66691..bfac0a37d0e4 100644
--- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
@@ -85,15 +85,16 @@ properties:
phys:
minItems: 1
- maxItems: 2
+ maxItems: 8
phy-names:
minItems: 1
- maxItems: 2
- items:
- enum:
- - usb2-phy
- - usb3-phy
+ maxItems: 8
+ oneOf:
+ - items:
+ enum: [ usb2-phy, usb3-phy ]
+ - items:
+ pattern: "^usb[23]-[0-3]$"
power-domains:
description:
--
2.34.1
^ permalink raw reply related
* [PATCH v19 2/9] usb: dwc3: core: Access XHCI address space temporarily to read port info
From: Krishna Kurapati @ 2024-04-04 5:12 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Bjorn Andersson, Wesley Cheng,
Konrad Dybcio, Greg Kroah-Hartman, Conor Dooley, Thinh Nguyen,
Felipe Balbi, Johan Hovold
Cc: devicetree, linux-arm-msm, linux-usb, linux-kernel, quic_ppratap,
quic_jackp, Krishna Kurapati, Johan Hovold
In-Reply-To: <20240404051229.3082902-1-quic_kriskura@quicinc.com>
All DWC3 Multi Port controllers that exist today only support host mode.
Temporarily map XHCI address space for host-only controllers and parse
XHCI Extended Capabilities registers to read number of usb2 ports and
usb3 ports present on multiport controller. Each USB Port is at least HS
capable.
The port info for usb2 and usb3 phy are identified as num_usb2_ports
and num_usb3_ports. The intention is as follows:
Wherever we need to perform phy operations like:
LOOP_OVER_NUMBER_OF_AVAILABLE_PORTS()
{
phy_set_mode(dwc->usb2_generic_phy[i], PHY_MODE_USB_HOST);
phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST);
}
If number of usb2 ports is 3, loop can go from index 0-2 for
usb2_generic_phy. If number of usb3-ports is 2, we don't know for sure,
if the first 2 ports are SS capable or some other ports like (2 and 3)
are SS capable. So instead, num_usb2_ports is used to loop around all
phy's (both hs and ss) for performing phy operations. If any
usb3_generic_phy turns out to be NULL, phy operation just bails out.
num_usb3_ports is used to modify GUSB3PIPECTL registers while setting up
phy's as we need to know how many SS capable ports are there for this.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
---
drivers/usb/dwc3/core.c | 61 +++++++++++++++++++++++++++++++++++++++++
drivers/usb/dwc3/core.h | 5 ++++
2 files changed, 66 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 31684cdaaae3..d4765d93693f 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -39,6 +39,7 @@
#include "io.h"
#include "debug.h"
+#include "../host/xhci-ext-caps.h"
#define DWC3_DEFAULT_AUTOSUSPEND_DELAY 5000 /* ms */
@@ -1881,10 +1882,56 @@ static int dwc3_get_clocks(struct dwc3 *dwc)
return 0;
}
+static int dwc3_get_num_ports(struct dwc3 *dwc)
+{
+ void __iomem *base;
+ u8 major_revision;
+ u32 offset;
+ u32 val;
+
+ /*
+ * Remap xHCI address space to access XHCI ext cap regs since it is
+ * needed to get information on number of ports present.
+ */
+ base = ioremap(dwc->xhci_resources[0].start,
+ resource_size(&dwc->xhci_resources[0]));
+ if (!base)
+ return PTR_ERR(base);
+
+ offset = 0;
+ do {
+ offset = xhci_find_next_ext_cap(base, offset,
+ XHCI_EXT_CAPS_PROTOCOL);
+ if (!offset)
+ break;
+
+ val = readl(base + offset);
+ major_revision = XHCI_EXT_PORT_MAJOR(val);
+
+ val = readl(base + offset + 0x08);
+ if (major_revision == 0x03) {
+ dwc->num_usb3_ports += XHCI_EXT_PORT_COUNT(val);
+ } else if (major_revision <= 0x02) {
+ dwc->num_usb2_ports += XHCI_EXT_PORT_COUNT(val);
+ } else {
+ dev_warn(dwc->dev, "unrecognized port major revision %d\n",
+ major_revision);
+ }
+ } while (1);
+
+ dev_dbg(dwc->dev, "hs-ports: %u ss-ports: %u\n",
+ dwc->num_usb2_ports, dwc->num_usb3_ports);
+
+ iounmap(base);
+
+ return 0;
+}
+
static int dwc3_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct resource *res, dwc_res;
+ unsigned int hw_mode;
void __iomem *regs;
struct dwc3 *dwc;
int ret;
@@ -1968,6 +2015,20 @@ static int dwc3_probe(struct platform_device *pdev)
goto err_disable_clks;
}
+ /*
+ * Currently only DWC3 controllers that are host-only capable
+ * can have more than one port.
+ */
+ hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0);
+ if (hw_mode == DWC3_GHWPARAMS0_MODE_HOST) {
+ ret = dwc3_get_num_ports(dwc);
+ if (ret)
+ goto err_disable_clks;
+ } else {
+ dwc->num_usb2_ports = 1;
+ dwc->num_usb3_ports = 1;
+ }
+
spin_lock_init(&dwc->lock);
mutex_init(&dwc->mutex);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 7e80dd3d466b..341e4c73cb2e 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -1039,6 +1039,8 @@ struct dwc3_scratchpad_array {
* @usb3_phy: pointer to USB3 PHY
* @usb2_generic_phy: pointer to USB2 PHY
* @usb3_generic_phy: pointer to USB3 PHY
+ * @num_usb2_ports: number of USB2 ports
+ * @num_usb3_ports: number of USB3 ports
* @phys_ready: flag to indicate that PHYs are ready
* @ulpi: pointer to ulpi interface
* @ulpi_ready: flag to indicate that ULPI is initialized
@@ -1187,6 +1189,9 @@ struct dwc3 {
struct phy *usb2_generic_phy;
struct phy *usb3_generic_phy;
+ u8 num_usb2_ports;
+ u8 num_usb3_ports;
+
bool phys_ready;
struct ulpi *ulpi;
--
2.34.1
^ permalink raw reply related
* [PATCH v19 3/9] usb: dwc3: core: Skip setting event buffers for host only controllers
From: Krishna Kurapati @ 2024-04-04 5:12 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Bjorn Andersson, Wesley Cheng,
Konrad Dybcio, Greg Kroah-Hartman, Conor Dooley, Thinh Nguyen,
Felipe Balbi, Johan Hovold
Cc: devicetree, linux-arm-msm, linux-usb, linux-kernel, quic_ppratap,
quic_jackp, Krishna Kurapati, Johan Hovold
In-Reply-To: <20240404051229.3082902-1-quic_kriskura@quicinc.com>
On some SoC's like SA8295P where the tertiary controller is host-only
capable, GEVTADDRHI/LO, GEVTSIZ, GEVTCOUNT registers are not accessible.
Trying to access them leads to a crash.
For DRD/Peripheral supported controllers, event buffer setup is done
again in gadget_pullup. Skip setup or cleanup of event buffers if
controller is host-only capable.
Suggested-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
---
drivers/usb/dwc3/core.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index d4765d93693f..b023012b9321 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -486,6 +486,13 @@ static void dwc3_free_event_buffers(struct dwc3 *dwc)
static int dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned int length)
{
struct dwc3_event_buffer *evt;
+ unsigned int hw_mode;
+
+ hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0);
+ if (hw_mode == DWC3_GHWPARAMS0_MODE_HOST) {
+ dwc->ev_buf = NULL;
+ return 0;
+ }
evt = dwc3_alloc_one_event_buffer(dwc, length);
if (IS_ERR(evt)) {
@@ -507,6 +514,9 @@ int dwc3_event_buffers_setup(struct dwc3 *dwc)
{
struct dwc3_event_buffer *evt;
+ if (!dwc->ev_buf)
+ return 0;
+
evt = dwc->ev_buf;
evt->lpos = 0;
dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0),
@@ -524,6 +534,9 @@ void dwc3_event_buffers_cleanup(struct dwc3 *dwc)
{
struct dwc3_event_buffer *evt;
+ if (!dwc->ev_buf)
+ return;
+
evt = dwc->ev_buf;
evt->lpos = 0;
--
2.34.1
^ permalink raw reply related
* [PATCH v19 4/9] usb: dwc3: core: Refactor PHY logic to support Multiport Controller
From: Krishna Kurapati @ 2024-04-04 5:12 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Bjorn Andersson, Wesley Cheng,
Konrad Dybcio, Greg Kroah-Hartman, Conor Dooley, Thinh Nguyen,
Felipe Balbi, Johan Hovold
Cc: devicetree, linux-arm-msm, linux-usb, linux-kernel, quic_ppratap,
quic_jackp, Krishna Kurapati, Johan Hovold
In-Reply-To: <20240404051229.3082902-1-quic_kriskura@quicinc.com>
Currently the DWC3 driver supports only single port controller
which requires at least one HS PHY and at most one SS PHY.
But the DWC3 USB controller can be connected to multiple ports and
each port can have their own PHYs. Each port of the multiport
controller can either be HS+SS capable or HS only capable
Proper quantification of them is required to modify GUSB2PHYCFG
and GUSB3PIPECTL registers appropriately.
Add support for detecting, obtaining and configuring PHYs supported
by a multiport controller. Limit support to multiport controllers
with up to four ports for now (e.g. as needed for SC8280XP).
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
---
drivers/usb/dwc3/core.c | 251 ++++++++++++++++++++++++++++------------
drivers/usb/dwc3/core.h | 14 ++-
drivers/usb/dwc3/drd.c | 15 ++-
3 files changed, 193 insertions(+), 87 deletions(-)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index b023012b9321..71d6f361b3df 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -124,6 +124,7 @@ static void __dwc3_set_mode(struct work_struct *work)
int ret;
u32 reg;
u32 desired_dr_role;
+ int i;
mutex_lock(&dwc->mutex);
spin_lock_irqsave(&dwc->lock, flags);
@@ -201,8 +202,10 @@ static void __dwc3_set_mode(struct work_struct *work)
} else {
if (dwc->usb2_phy)
otg_set_vbus(dwc->usb2_phy->otg, true);
- phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST);
- phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST);
+ for (i = 0; i < dwc->num_usb2_ports; i++) {
+ phy_set_mode(dwc->usb2_generic_phy[i], PHY_MODE_USB_HOST);
+ phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST);
+ }
if (dwc->dis_split_quirk) {
reg = dwc3_readl(dwc->regs, DWC3_GUCTL3);
reg |= DWC3_GUCTL3_SPLITDISABLE;
@@ -217,8 +220,8 @@ static void __dwc3_set_mode(struct work_struct *work)
if (dwc->usb2_phy)
otg_set_vbus(dwc->usb2_phy->otg, false);
- phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_DEVICE);
- phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_DEVICE);
+ phy_set_mode(dwc->usb2_generic_phy[0], PHY_MODE_USB_DEVICE);
+ phy_set_mode(dwc->usb3_generic_phy[0], PHY_MODE_USB_DEVICE);
ret = dwc3_gadget_init(dwc);
if (ret)
@@ -589,22 +592,14 @@ static int dwc3_core_ulpi_init(struct dwc3 *dwc)
return ret;
}
-/**
- * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core
- * @dwc: Pointer to our controller context structure
- *
- * Returns 0 on success. The USB PHY interfaces are configured but not
- * initialized. The PHY interfaces and the PHYs get initialized together with
- * the core in dwc3_core_init.
- */
-static int dwc3_phy_setup(struct dwc3 *dwc)
+static int dwc3_ss_phy_setup(struct dwc3 *dwc, int index)
{
unsigned int hw_mode;
u32 reg;
hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0);
- reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
+ reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(index));
/*
* Make sure UX_EXIT_PX is cleared as that causes issues with some
@@ -659,9 +654,19 @@ static int dwc3_phy_setup(struct dwc3 *dwc)
if (dwc->dis_del_phy_power_chg_quirk)
reg &= ~DWC3_GUSB3PIPECTL_DEPOCHANGE;
- dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
+ dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(index), reg);
- reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
+ return 0;
+}
+
+static int dwc3_hs_phy_setup(struct dwc3 *dwc, int index)
+{
+ unsigned int hw_mode;
+ u32 reg;
+
+ hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0);
+
+ reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(index));
/* Select the HS PHY interface */
switch (DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3)) {
@@ -673,7 +678,7 @@ static int dwc3_phy_setup(struct dwc3 *dwc)
} else if (dwc->hsphy_interface &&
!strncmp(dwc->hsphy_interface, "ulpi", 4)) {
reg |= DWC3_GUSB2PHYCFG_ULPI_UTMI;
- dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
+ dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(index), reg);
} else {
/* Relying on default value. */
if (!(reg & DWC3_GUSB2PHYCFG_ULPI_UTMI))
@@ -740,7 +745,35 @@ static int dwc3_phy_setup(struct dwc3 *dwc)
if (dwc->ulpi_ext_vbus_drv)
reg |= DWC3_GUSB2PHYCFG_ULPIEXTVBUSDRV;
- dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
+ dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(index), reg);
+
+ return 0;
+}
+
+/**
+ * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core
+ * @dwc: Pointer to our controller context structure
+ *
+ * Returns 0 on success. The USB PHY interfaces are configured but not
+ * initialized. The PHY interfaces and the PHYs get initialized together with
+ * the core in dwc3_core_init.
+ */
+static int dwc3_phy_setup(struct dwc3 *dwc)
+{
+ int i;
+ int ret;
+
+ for (i = 0; i < dwc->num_usb3_ports; i++) {
+ ret = dwc3_ss_phy_setup(dwc, i);
+ if (ret)
+ return ret;
+ }
+
+ for (i = 0; i < dwc->num_usb2_ports; i++) {
+ ret = dwc3_hs_phy_setup(dwc, i);
+ if (ret)
+ return ret;
+ }
return 0;
}
@@ -748,23 +781,32 @@ static int dwc3_phy_setup(struct dwc3 *dwc)
static int dwc3_phy_init(struct dwc3 *dwc)
{
int ret;
+ int i;
+ int j;
usb_phy_init(dwc->usb2_phy);
usb_phy_init(dwc->usb3_phy);
- ret = phy_init(dwc->usb2_generic_phy);
- if (ret < 0)
- goto err_shutdown_usb3_phy;
+ for (i = 0; i < dwc->num_usb2_ports; i++) {
+ ret = phy_init(dwc->usb2_generic_phy[i]);
+ if (ret < 0)
+ goto err_exit_phy;
- ret = phy_init(dwc->usb3_generic_phy);
- if (ret < 0)
- goto err_exit_usb2_phy;
+ ret = phy_init(dwc->usb3_generic_phy[i]);
+ if (ret < 0) {
+ phy_exit(dwc->usb2_generic_phy[i]);
+ goto err_exit_phy;
+ }
+ }
return 0;
-err_exit_usb2_phy:
- phy_exit(dwc->usb2_generic_phy);
-err_shutdown_usb3_phy:
+err_exit_phy:
+ for (j = i - 1; j >= 0; j--) {
+ phy_exit(dwc->usb3_generic_phy[j]);
+ phy_exit(dwc->usb2_generic_phy[j]);
+ }
+
usb_phy_shutdown(dwc->usb3_phy);
usb_phy_shutdown(dwc->usb2_phy);
@@ -773,8 +815,12 @@ static int dwc3_phy_init(struct dwc3 *dwc)
static void dwc3_phy_exit(struct dwc3 *dwc)
{
- phy_exit(dwc->usb3_generic_phy);
- phy_exit(dwc->usb2_generic_phy);
+ int i;
+
+ for (i = 0; i < dwc->num_usb2_ports; i++) {
+ phy_exit(dwc->usb3_generic_phy[i]);
+ phy_exit(dwc->usb2_generic_phy[i]);
+ }
usb_phy_shutdown(dwc->usb3_phy);
usb_phy_shutdown(dwc->usb2_phy);
@@ -783,23 +829,32 @@ static void dwc3_phy_exit(struct dwc3 *dwc)
static int dwc3_phy_power_on(struct dwc3 *dwc)
{
int ret;
+ int i;
+ int j;
usb_phy_set_suspend(dwc->usb2_phy, 0);
usb_phy_set_suspend(dwc->usb3_phy, 0);
- ret = phy_power_on(dwc->usb2_generic_phy);
- if (ret < 0)
- goto err_suspend_usb3_phy;
+ for (i = 0; i < dwc->num_usb2_ports; i++) {
+ ret = phy_power_on(dwc->usb2_generic_phy[i]);
+ if (ret < 0)
+ goto err_power_off_phy;
- ret = phy_power_on(dwc->usb3_generic_phy);
- if (ret < 0)
- goto err_power_off_usb2_phy;
+ ret = phy_power_on(dwc->usb3_generic_phy[i]);
+ if (ret < 0) {
+ phy_power_off(dwc->usb2_generic_phy[i]);
+ goto err_power_off_phy;
+ }
+ }
return 0;
-err_power_off_usb2_phy:
- phy_power_off(dwc->usb2_generic_phy);
-err_suspend_usb3_phy:
+err_power_off_phy:
+ for (j = i - 1; j >= 0; j--) {
+ phy_power_off(dwc->usb3_generic_phy[j]);
+ phy_power_off(dwc->usb2_generic_phy[j]);
+ }
+
usb_phy_set_suspend(dwc->usb3_phy, 1);
usb_phy_set_suspend(dwc->usb2_phy, 1);
@@ -808,8 +863,12 @@ static int dwc3_phy_power_on(struct dwc3 *dwc)
static void dwc3_phy_power_off(struct dwc3 *dwc)
{
- phy_power_off(dwc->usb3_generic_phy);
- phy_power_off(dwc->usb2_generic_phy);
+ int i;
+
+ for (i = 0; i < dwc->num_usb2_ports; i++) {
+ phy_power_off(dwc->usb3_generic_phy[i]);
+ phy_power_off(dwc->usb2_generic_phy[i]);
+ }
usb_phy_set_suspend(dwc->usb3_phy, 1);
usb_phy_set_suspend(dwc->usb2_phy, 1);
@@ -1201,6 +1260,7 @@ static int dwc3_core_init(struct dwc3 *dwc)
unsigned int hw_mode;
u32 reg;
int ret;
+ int i;
hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0);
@@ -1244,15 +1304,19 @@ static int dwc3_core_init(struct dwc3 *dwc)
if (hw_mode == DWC3_GHWPARAMS0_MODE_DRD &&
!DWC3_VER_IS_WITHIN(DWC3, ANY, 194A)) {
if (!dwc->dis_u3_susphy_quirk) {
- reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
- reg |= DWC3_GUSB3PIPECTL_SUSPHY;
- dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
+ for (i = 0; i < dwc->num_usb3_ports; i++) {
+ reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(i));
+ reg |= DWC3_GUSB3PIPECTL_SUSPHY;
+ dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(i), reg);
+ }
}
if (!dwc->dis_u2_susphy_quirk) {
- reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
- reg |= DWC3_GUSB2PHYCFG_SUSPHY;
- dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
+ for (i = 0; i < dwc->num_usb2_ports; i++) {
+ reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i));
+ reg |= DWC3_GUSB2PHYCFG_SUSPHY;
+ dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg);
+ }
}
}
@@ -1372,7 +1436,9 @@ static int dwc3_core_get_phy(struct dwc3 *dwc)
{
struct device *dev = dwc->dev;
struct device_node *node = dev->of_node;
+ char phy_name[9];
int ret;
+ int i;
if (node) {
dwc->usb2_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 0);
@@ -1398,22 +1464,36 @@ static int dwc3_core_get_phy(struct dwc3 *dwc)
return dev_err_probe(dev, ret, "no usb3 phy configured\n");
}
- dwc->usb2_generic_phy = devm_phy_get(dev, "usb2-phy");
- if (IS_ERR(dwc->usb2_generic_phy)) {
- ret = PTR_ERR(dwc->usb2_generic_phy);
- if (ret == -ENOSYS || ret == -ENODEV)
- dwc->usb2_generic_phy = NULL;
+ for (i = 0; i < dwc->num_usb2_ports; i++) {
+ if (dwc->num_usb2_ports == 1)
+ sprintf(phy_name, "usb2-phy");
else
- return dev_err_probe(dev, ret, "no usb2 phy configured\n");
- }
+ sprintf(phy_name, "usb2-%d", i);
+
+ dwc->usb2_generic_phy[i] = devm_phy_get(dev, phy_name);
+ if (IS_ERR(dwc->usb2_generic_phy[i])) {
+ ret = PTR_ERR(dwc->usb2_generic_phy[i]);
+ if (ret == -ENOSYS || ret == -ENODEV)
+ dwc->usb2_generic_phy[i] = NULL;
+ else
+ return dev_err_probe(dev, ret, "failed to lookup phy %s\n",
+ phy_name);
+ }
- dwc->usb3_generic_phy = devm_phy_get(dev, "usb3-phy");
- if (IS_ERR(dwc->usb3_generic_phy)) {
- ret = PTR_ERR(dwc->usb3_generic_phy);
- if (ret == -ENOSYS || ret == -ENODEV)
- dwc->usb3_generic_phy = NULL;
+ if (dwc->num_usb2_ports == 1)
+ sprintf(phy_name, "usb3-phy");
else
- return dev_err_probe(dev, ret, "no usb3 phy configured\n");
+ sprintf(phy_name, "usb3-%d", i);
+
+ dwc->usb3_generic_phy[i] = devm_phy_get(dev, phy_name);
+ if (IS_ERR(dwc->usb3_generic_phy[i])) {
+ ret = PTR_ERR(dwc->usb3_generic_phy[i]);
+ if (ret == -ENOSYS || ret == -ENODEV)
+ dwc->usb3_generic_phy[i] = NULL;
+ else
+ return dev_err_probe(dev, ret, "failed to lookup phy %s\n",
+ phy_name);
+ }
}
return 0;
@@ -1423,6 +1503,7 @@ static int dwc3_core_init_mode(struct dwc3 *dwc)
{
struct device *dev = dwc->dev;
int ret;
+ int i;
switch (dwc->dr_mode) {
case USB_DR_MODE_PERIPHERAL:
@@ -1430,8 +1511,8 @@ static int dwc3_core_init_mode(struct dwc3 *dwc)
if (dwc->usb2_phy)
otg_set_vbus(dwc->usb2_phy->otg, false);
- phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_DEVICE);
- phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_DEVICE);
+ phy_set_mode(dwc->usb2_generic_phy[0], PHY_MODE_USB_DEVICE);
+ phy_set_mode(dwc->usb3_generic_phy[0], PHY_MODE_USB_DEVICE);
ret = dwc3_gadget_init(dwc);
if (ret)
@@ -1442,8 +1523,10 @@ static int dwc3_core_init_mode(struct dwc3 *dwc)
if (dwc->usb2_phy)
otg_set_vbus(dwc->usb2_phy->otg, true);
- phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST);
- phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST);
+ for (i = 0; i < dwc->num_usb2_ports; i++) {
+ phy_set_mode(dwc->usb2_generic_phy[i], PHY_MODE_USB_HOST);
+ phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST);
+ }
ret = dwc3_host_init(dwc);
if (ret)
@@ -1937,6 +2020,10 @@ static int dwc3_get_num_ports(struct dwc3 *dwc)
iounmap(base);
+ if (dwc->num_usb2_ports > DWC3_MAX_PORTS ||
+ dwc->num_usb3_ports > DWC3_MAX_PORTS)
+ return -ENOMEM;
+
return 0;
}
@@ -2174,6 +2261,7 @@ static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg)
{
unsigned long flags;
u32 reg;
+ int i;
switch (dwc->current_dr_role) {
case DWC3_GCTL_PRTCAP_DEVICE:
@@ -2192,17 +2280,21 @@ static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg)
/* Let controller to suspend HSPHY before PHY driver suspends */
if (dwc->dis_u2_susphy_quirk ||
dwc->dis_enblslpm_quirk) {
- reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
- reg |= DWC3_GUSB2PHYCFG_ENBLSLPM |
- DWC3_GUSB2PHYCFG_SUSPHY;
- dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
+ for (i = 0; i < dwc->num_usb2_ports; i++) {
+ reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i));
+ reg |= DWC3_GUSB2PHYCFG_ENBLSLPM |
+ DWC3_GUSB2PHYCFG_SUSPHY;
+ dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg);
+ }
/* Give some time for USB2 PHY to suspend */
usleep_range(5000, 6000);
}
- phy_pm_runtime_put_sync(dwc->usb2_generic_phy);
- phy_pm_runtime_put_sync(dwc->usb3_generic_phy);
+ for (i = 0; i < dwc->num_usb2_ports; i++) {
+ phy_pm_runtime_put_sync(dwc->usb2_generic_phy[i]);
+ phy_pm_runtime_put_sync(dwc->usb3_generic_phy[i]);
+ }
break;
case DWC3_GCTL_PRTCAP_OTG:
/* do nothing during runtime_suspend */
@@ -2232,6 +2324,7 @@ static int dwc3_resume_common(struct dwc3 *dwc, pm_message_t msg)
unsigned long flags;
int ret;
u32 reg;
+ int i;
switch (dwc->current_dr_role) {
case DWC3_GCTL_PRTCAP_DEVICE:
@@ -2251,17 +2344,21 @@ static int dwc3_resume_common(struct dwc3 *dwc, pm_message_t msg)
break;
}
/* Restore GUSB2PHYCFG bits that were modified in suspend */
- reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
- if (dwc->dis_u2_susphy_quirk)
- reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
+ for (i = 0; i < dwc->num_usb2_ports; i++) {
+ reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i));
+ if (dwc->dis_u2_susphy_quirk)
+ reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
- if (dwc->dis_enblslpm_quirk)
- reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM;
+ if (dwc->dis_enblslpm_quirk)
+ reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM;
- dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
+ dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg);
+ }
- phy_pm_runtime_get_sync(dwc->usb2_generic_phy);
- phy_pm_runtime_get_sync(dwc->usb3_generic_phy);
+ for (i = 0; i < dwc->num_usb2_ports; i++) {
+ phy_pm_runtime_get_sync(dwc->usb2_generic_phy[i]);
+ phy_pm_runtime_get_sync(dwc->usb3_generic_phy[i]);
+ }
break;
case DWC3_GCTL_PRTCAP_OTG:
/* nothing to do on runtime_resume */
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 341e4c73cb2e..df2e111aa848 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -33,6 +33,12 @@
#include <linux/power_supply.h>
+/*
+ * Maximum number of ports currently supported for multiport
+ * controllers.
+ */
+#define DWC3_MAX_PORTS 4
+
#define DWC3_MSG_MAX 500
/* Global constants */
@@ -1037,8 +1043,8 @@ struct dwc3_scratchpad_array {
* @usb_psy: pointer to power supply interface.
* @usb2_phy: pointer to USB2 PHY
* @usb3_phy: pointer to USB3 PHY
- * @usb2_generic_phy: pointer to USB2 PHY
- * @usb3_generic_phy: pointer to USB3 PHY
+ * @usb2_generic_phy: pointer to array of USB2 PHYs
+ * @usb3_generic_phy: pointer to array of USB3 PHYs
* @num_usb2_ports: number of USB2 ports
* @num_usb3_ports: number of USB3 ports
* @phys_ready: flag to indicate that PHYs are ready
@@ -1186,8 +1192,8 @@ struct dwc3 {
struct usb_phy *usb2_phy;
struct usb_phy *usb3_phy;
- struct phy *usb2_generic_phy;
- struct phy *usb3_generic_phy;
+ struct phy *usb2_generic_phy[DWC3_MAX_PORTS];
+ struct phy *usb3_generic_phy[DWC3_MAX_PORTS];
u8 num_usb2_ports;
u8 num_usb3_ports;
diff --git a/drivers/usb/dwc3/drd.c b/drivers/usb/dwc3/drd.c
index 57ddd2e43022..d76ae676783c 100644
--- a/drivers/usb/dwc3/drd.c
+++ b/drivers/usb/dwc3/drd.c
@@ -331,6 +331,7 @@ void dwc3_otg_update(struct dwc3 *dwc, bool ignore_idstatus)
u32 reg;
int id;
unsigned long flags;
+ int i;
if (dwc->dr_mode != USB_DR_MODE_OTG)
return;
@@ -386,9 +387,12 @@ void dwc3_otg_update(struct dwc3 *dwc, bool ignore_idstatus)
} else {
if (dwc->usb2_phy)
otg_set_vbus(dwc->usb2_phy->otg, true);
- if (dwc->usb2_generic_phy)
- phy_set_mode(dwc->usb2_generic_phy,
- PHY_MODE_USB_HOST);
+ for (i = 0; i < dwc->num_usb2_ports; i++) {
+ if (dwc->usb2_generic_phy[i]) {
+ phy_set_mode(dwc->usb2_generic_phy[i],
+ PHY_MODE_USB_HOST);
+ }
+ }
}
break;
case DWC3_OTG_ROLE_DEVICE:
@@ -400,9 +404,8 @@ void dwc3_otg_update(struct dwc3 *dwc, bool ignore_idstatus)
if (dwc->usb2_phy)
otg_set_vbus(dwc->usb2_phy->otg, false);
- if (dwc->usb2_generic_phy)
- phy_set_mode(dwc->usb2_generic_phy,
- PHY_MODE_USB_DEVICE);
+ if (dwc->usb2_generic_phy[0])
+ phy_set_mode(dwc->usb2_generic_phy[0], PHY_MODE_USB_DEVICE);
ret = dwc3_gadget_init(dwc);
if (ret)
dev_err(dwc->dev, "failed to initialize peripheral\n");
--
2.34.1
^ permalink raw reply related
* [PATCH v19 5/9] dt-bindings: usb: qcom,dwc3: Add bindings for SC8280 Multiport
From: Krishna Kurapati @ 2024-04-04 5:12 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Bjorn Andersson, Wesley Cheng,
Konrad Dybcio, Greg Kroah-Hartman, Conor Dooley, Thinh Nguyen,
Felipe Balbi, Johan Hovold
Cc: devicetree, linux-arm-msm, linux-usb, linux-kernel, quic_ppratap,
quic_jackp, Krishna Kurapati, Johan Hovold
In-Reply-To: <20240404051229.3082902-1-quic_kriskura@quicinc.com>
Add the compatible string for SC8280 Multiport USB controller from
Qualcomm.
There are 4 power event irq interrupts supported by this controller
(one for each port of multiport). Added all the 4 as non-optional
interrupts for SC8280XP-MP
Also each port of multiport has one DP and oen DM IRQ. Add all DP/DM
IRQ's related to 4 ports of SC8280XP Teritiary controller.
Also added ss phy irq for both SS Ports.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
---
.../devicetree/bindings/usb/qcom,dwc3.yaml | 34 +++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
index 38a3404ec71b..f55f601c0329 100644
--- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
@@ -30,6 +30,7 @@ properties:
- qcom,sc7180-dwc3
- qcom,sc7280-dwc3
- qcom,sc8280xp-dwc3
+ - qcom,sc8280xp-dwc3-mp
- qcom,sdm660-dwc3
- qcom,sdm670-dwc3
- qcom,sdm845-dwc3
@@ -282,6 +283,7 @@ allOf:
contains:
enum:
- qcom,sc8280xp-dwc3
+ - qcom,sc8280xp-dwc3-mp
- qcom,x1e80100-dwc3
then:
properties:
@@ -470,6 +472,38 @@ allOf:
- const: dm_hs_phy_irq
- const: ss_phy_irq
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sc8280xp-dwc3-mp
+ then:
+ properties:
+ interrupts:
+ minItems: 18
+ maxItems: 18
+ interrupt-names:
+ items:
+ - const: pwr_event_1
+ - const: pwr_event_2
+ - const: pwr_event_3
+ - const: pwr_event_4
+ - const: hs_phy_1
+ - const: hs_phy_2
+ - const: hs_phy_3
+ - const: hs_phy_4
+ - const: dp_hs_phy_1
+ - const: dm_hs_phy_1
+ - const: dp_hs_phy_2
+ - const: dm_hs_phy_2
+ - const: dp_hs_phy_3
+ - const: dm_hs_phy_3
+ - const: dp_hs_phy_4
+ - const: dm_hs_phy_4
+ - const: ss_phy_1
+ - const: ss_phy_2
+
additionalProperties: false
examples:
--
2.34.1
^ permalink raw reply related
* [PATCH v19 6/9] usb: dwc3: qcom: Add helper function to request wakeup interrupts
From: Krishna Kurapati @ 2024-04-04 5:12 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Bjorn Andersson, Wesley Cheng,
Konrad Dybcio, Greg Kroah-Hartman, Conor Dooley, Thinh Nguyen,
Felipe Balbi, Johan Hovold
Cc: devicetree, linux-arm-msm, linux-usb, linux-kernel, quic_ppratap,
quic_jackp, Krishna Kurapati, Johan Hovold
In-Reply-To: <20240404051229.3082902-1-quic_kriskura@quicinc.com>
The logic for requesting interrupts is duplicated for each interrupt. In
the upcoming patches that introduces support for multiport, it would be
better to clean up the duplication before reading mulitport related
interrupts.
Refactor interrupt setup call by adding a new helper function for
requesting the wakeup interrupts. To simplify implementation, make
the display name same as the interrupt name expected in DT.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
---
drivers/usb/dwc3/dwc3-qcom.c | 53 ++++++++++++++++--------------------
1 file changed, 24 insertions(+), 29 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
index f6b2fab49d5e..cae5dab8fcfc 100644
--- a/drivers/usb/dwc3/dwc3-qcom.c
+++ b/drivers/usb/dwc3/dwc3-qcom.c
@@ -501,6 +501,22 @@ static void dwc3_qcom_select_utmi_clk(struct dwc3_qcom *qcom)
PIPE_UTMI_CLK_DIS);
}
+static int dwc3_qcom_request_irq(struct dwc3_qcom *qcom, int irq,
+ const char *name)
+{
+ int ret;
+
+ /* Keep wakeup interrupts disabled until suspend */
+ ret = devm_request_threaded_irq(qcom->dev, irq, NULL,
+ qcom_dwc3_resume_irq,
+ IRQF_ONESHOT | IRQF_NO_AUTOEN,
+ name, qcom);
+ if (ret)
+ dev_err(qcom->dev, "failed to request irq %s: %d\n", name, ret);
+
+ return ret;
+}
+
static int dwc3_qcom_setup_irq(struct platform_device *pdev)
{
struct dwc3_qcom *qcom = platform_get_drvdata(pdev);
@@ -509,54 +525,33 @@ static int dwc3_qcom_setup_irq(struct platform_device *pdev)
irq = platform_get_irq_byname_optional(pdev, "qusb2_phy");
if (irq > 0) {
- /* Keep wakeup interrupts disabled until suspend */
- ret = devm_request_threaded_irq(qcom->dev, irq, NULL,
- qcom_dwc3_resume_irq,
- IRQF_ONESHOT | IRQF_NO_AUTOEN,
- "qcom_dwc3 QUSB2", qcom);
- if (ret) {
- dev_err(qcom->dev, "qusb2_phy_irq failed: %d\n", ret);
+ ret = dwc3_qcom_request_irq(qcom, irq, "qusb2_phy");
+ if (ret)
return ret;
- }
qcom->qusb2_phy_irq = irq;
}
irq = platform_get_irq_byname_optional(pdev, "dp_hs_phy_irq");
if (irq > 0) {
- ret = devm_request_threaded_irq(qcom->dev, irq, NULL,
- qcom_dwc3_resume_irq,
- IRQF_ONESHOT | IRQF_NO_AUTOEN,
- "qcom_dwc3 DP_HS", qcom);
- if (ret) {
- dev_err(qcom->dev, "dp_hs_phy_irq failed: %d\n", ret);
+ ret = dwc3_qcom_request_irq(qcom, irq, "dp_hs_phy_irq");
+ if (ret)
return ret;
- }
qcom->dp_hs_phy_irq = irq;
}
irq = platform_get_irq_byname_optional(pdev, "dm_hs_phy_irq");
if (irq > 0) {
- ret = devm_request_threaded_irq(qcom->dev, irq, NULL,
- qcom_dwc3_resume_irq,
- IRQF_ONESHOT | IRQF_NO_AUTOEN,
- "qcom_dwc3 DM_HS", qcom);
- if (ret) {
- dev_err(qcom->dev, "dm_hs_phy_irq failed: %d\n", ret);
+ ret = dwc3_qcom_request_irq(qcom, irq, "dm_hs_phy_irq");
+ if (ret)
return ret;
- }
qcom->dm_hs_phy_irq = irq;
}
irq = platform_get_irq_byname_optional(pdev, "ss_phy_irq");
if (irq > 0) {
- ret = devm_request_threaded_irq(qcom->dev, irq, NULL,
- qcom_dwc3_resume_irq,
- IRQF_ONESHOT | IRQF_NO_AUTOEN,
- "qcom_dwc3 SS", qcom);
- if (ret) {
- dev_err(qcom->dev, "ss_phy_irq failed: %d\n", ret);
+ ret = dwc3_qcom_request_irq(qcom, irq, "ss_phy_irq");
+ if (ret)
return ret;
- }
qcom->ss_phy_irq = irq;
}
--
2.34.1
^ permalink raw reply related
* [PATCH v19 7/9] usb: dwc3: qcom: Refactor IRQ handling in glue driver
From: Krishna Kurapati @ 2024-04-04 5:12 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Bjorn Andersson, Wesley Cheng,
Konrad Dybcio, Greg Kroah-Hartman, Conor Dooley, Thinh Nguyen,
Felipe Balbi, Johan Hovold
Cc: devicetree, linux-arm-msm, linux-usb, linux-kernel, quic_ppratap,
quic_jackp, Krishna Kurapati, Johan Hovold
In-Reply-To: <20240404051229.3082902-1-quic_kriskura@quicinc.com>
On multiport supported controllers, each port has its own DP/DM
and SS (if super speed capable) interrupts. As per the bindings,
their interrupt names differ from standard ones having "_x" added
as suffix (x indicates port number). Identify from the interrupt
names whether the controller is a multiport controller or not.
Refactor dwc3_qcom_setup_irq() call to parse multiport interrupts
along with non-multiport ones accordingly..
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
---
drivers/usb/dwc3/dwc3-qcom.c | 137 ++++++++++++++++++++++++++---------
1 file changed, 103 insertions(+), 34 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
index cae5dab8fcfc..35eb338514bc 100644
--- a/drivers/usb/dwc3/dwc3-qcom.c
+++ b/drivers/usb/dwc3/dwc3-qcom.c
@@ -52,6 +52,13 @@
#define APPS_USB_AVG_BW 0
#define APPS_USB_PEAK_BW MBps_to_icc(40)
+struct dwc3_qcom_port {
+ int qusb2_phy_irq;
+ int dp_hs_phy_irq;
+ int dm_hs_phy_irq;
+ int ss_phy_irq;
+};
+
struct dwc3_qcom {
struct device *dev;
void __iomem *qscratch_base;
@@ -59,11 +66,8 @@ struct dwc3_qcom {
struct clk **clks;
int num_clocks;
struct reset_control *resets;
-
- int qusb2_phy_irq;
- int dp_hs_phy_irq;
- int dm_hs_phy_irq;
- int ss_phy_irq;
+ struct dwc3_qcom_port ports[DWC3_MAX_PORTS];
+ u8 num_ports;
enum usb_device_speed usb2_speed;
struct extcon_dev *edev;
@@ -354,24 +358,24 @@ static void dwc3_qcom_disable_wakeup_irq(int irq)
static void dwc3_qcom_disable_interrupts(struct dwc3_qcom *qcom)
{
- dwc3_qcom_disable_wakeup_irq(qcom->qusb2_phy_irq);
+ dwc3_qcom_disable_wakeup_irq(qcom->ports[0].qusb2_phy_irq);
if (qcom->usb2_speed == USB_SPEED_LOW) {
- dwc3_qcom_disable_wakeup_irq(qcom->dm_hs_phy_irq);
+ dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq);
} else if ((qcom->usb2_speed == USB_SPEED_HIGH) ||
(qcom->usb2_speed == USB_SPEED_FULL)) {
- dwc3_qcom_disable_wakeup_irq(qcom->dp_hs_phy_irq);
+ dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq);
} else {
- dwc3_qcom_disable_wakeup_irq(qcom->dp_hs_phy_irq);
- dwc3_qcom_disable_wakeup_irq(qcom->dm_hs_phy_irq);
+ dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq);
+ dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq);
}
- dwc3_qcom_disable_wakeup_irq(qcom->ss_phy_irq);
+ dwc3_qcom_disable_wakeup_irq(qcom->ports[0].ss_phy_irq);
}
static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom)
{
- dwc3_qcom_enable_wakeup_irq(qcom->qusb2_phy_irq, 0);
+ dwc3_qcom_enable_wakeup_irq(qcom->ports[0].qusb2_phy_irq, 0);
/*
* Configure DP/DM line interrupts based on the USB2 device attached to
@@ -383,20 +387,20 @@ static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom)
*/
if (qcom->usb2_speed == USB_SPEED_LOW) {
- dwc3_qcom_enable_wakeup_irq(qcom->dm_hs_phy_irq,
- IRQ_TYPE_EDGE_FALLING);
+ dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq,
+ IRQ_TYPE_EDGE_FALLING);
} else if ((qcom->usb2_speed == USB_SPEED_HIGH) ||
(qcom->usb2_speed == USB_SPEED_FULL)) {
- dwc3_qcom_enable_wakeup_irq(qcom->dp_hs_phy_irq,
- IRQ_TYPE_EDGE_FALLING);
+ dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq,
+ IRQ_TYPE_EDGE_FALLING);
} else {
- dwc3_qcom_enable_wakeup_irq(qcom->dp_hs_phy_irq,
- IRQ_TYPE_EDGE_RISING);
- dwc3_qcom_enable_wakeup_irq(qcom->dm_hs_phy_irq,
- IRQ_TYPE_EDGE_RISING);
+ dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq,
+ IRQ_TYPE_EDGE_RISING);
+ dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq,
+ IRQ_TYPE_EDGE_RISING);
}
- dwc3_qcom_enable_wakeup_irq(qcom->ss_phy_irq, 0);
+ dwc3_qcom_enable_wakeup_irq(qcom->ports[0].ss_phy_irq, 0);
}
static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup)
@@ -517,42 +521,107 @@ static int dwc3_qcom_request_irq(struct dwc3_qcom *qcom, int irq,
return ret;
}
-static int dwc3_qcom_setup_irq(struct platform_device *pdev)
+static int dwc3_qcom_setup_port_irq(struct platform_device *pdev, int port_index, bool is_multiport)
{
struct dwc3_qcom *qcom = platform_get_drvdata(pdev);
+ const char *irq_name;
int irq;
int ret;
- irq = platform_get_irq_byname_optional(pdev, "qusb2_phy");
+ if (is_multiport)
+ irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "dp_hs_phy_%d", port_index + 1);
+ else
+ irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "dp_hs_phy_irq");
+ if (!irq_name)
+ return -ENOMEM;
+
+ irq = platform_get_irq_byname_optional(pdev, irq_name);
if (irq > 0) {
- ret = dwc3_qcom_request_irq(qcom, irq, "qusb2_phy");
+ ret = dwc3_qcom_request_irq(qcom, irq, irq_name);
if (ret)
return ret;
- qcom->qusb2_phy_irq = irq;
+ qcom->ports[port_index].dp_hs_phy_irq = irq;
}
- irq = platform_get_irq_byname_optional(pdev, "dp_hs_phy_irq");
+ if (is_multiport)
+ irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "dm_hs_phy_%d", port_index + 1);
+ else
+ irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "dm_hs_phy_irq");
+ if (!irq_name)
+ return -ENOMEM;
+
+ irq = platform_get_irq_byname_optional(pdev, irq_name);
if (irq > 0) {
- ret = dwc3_qcom_request_irq(qcom, irq, "dp_hs_phy_irq");
+ ret = dwc3_qcom_request_irq(qcom, irq, irq_name);
if (ret)
return ret;
- qcom->dp_hs_phy_irq = irq;
+ qcom->ports[port_index].dm_hs_phy_irq = irq;
}
- irq = platform_get_irq_byname_optional(pdev, "dm_hs_phy_irq");
+ if (is_multiport)
+ irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "ss_phy_%d", port_index + 1);
+ else
+ irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "ss_phy_irq");
+ if (!irq_name)
+ return -ENOMEM;
+
+ irq = platform_get_irq_byname_optional(pdev, irq_name);
if (irq > 0) {
- ret = dwc3_qcom_request_irq(qcom, irq, "dm_hs_phy_irq");
+ ret = dwc3_qcom_request_irq(qcom, irq, irq_name);
if (ret)
return ret;
- qcom->dm_hs_phy_irq = irq;
+ qcom->ports[port_index].ss_phy_irq = irq;
}
- irq = platform_get_irq_byname_optional(pdev, "ss_phy_irq");
+ if (is_multiport)
+ return 0;
+
+ irq = platform_get_irq_byname_optional(pdev, "qusb2_phy");
if (irq > 0) {
- ret = dwc3_qcom_request_irq(qcom, irq, "ss_phy_irq");
+ ret = dwc3_qcom_request_irq(qcom, irq, "qusb2_phy");
+ if (ret)
+ return ret;
+ qcom->ports[port_index].qusb2_phy_irq = irq;
+ }
+
+ return 0;
+}
+
+static int dwc3_qcom_find_num_ports(struct platform_device *pdev)
+{
+ char irq_name[14];
+ int port_num;
+ int irq;
+
+ irq = platform_get_irq_byname_optional(pdev, "dp_hs_phy_1");
+ if (irq <= 0)
+ return 1;
+
+ for (port_num = 2; port_num <= DWC3_MAX_PORTS; port_num++) {
+ sprintf(irq_name, "dp_hs_phy_%d", port_num);
+
+ irq = platform_get_irq_byname_optional(pdev, irq_name);
+ if (irq <= 0)
+ return port_num - 1;
+ }
+
+ return DWC3_MAX_PORTS;
+}
+
+static int dwc3_qcom_setup_irq(struct platform_device *pdev)
+{
+ struct dwc3_qcom *qcom = platform_get_drvdata(pdev);
+ bool is_multiport;
+ int ret;
+ int i;
+
+ qcom->num_ports = dwc3_qcom_find_num_ports(pdev);
+ is_multiport = (qcom->num_ports > 1);
+
+ for (i = 0; i < qcom->num_ports; i++) {
+ ret = dwc3_qcom_setup_port_irq(pdev, i, is_multiport);
if (ret)
return ret;
- qcom->ss_phy_irq = irq;
}
return 0;
--
2.34.1
^ permalink raw reply related
* [PATCH v19 8/9] usb: dwc3: qcom: Enable wakeup for applicable ports of multiport
From: Krishna Kurapati @ 2024-04-04 5:12 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Bjorn Andersson, Wesley Cheng,
Konrad Dybcio, Greg Kroah-Hartman, Conor Dooley, Thinh Nguyen,
Felipe Balbi, Johan Hovold
Cc: devicetree, linux-arm-msm, linux-usb, linux-kernel, quic_ppratap,
quic_jackp, Krishna Kurapati, Johan Hovold
In-Reply-To: <20240404051229.3082902-1-quic_kriskura@quicinc.com>
DWC3 Qcom wrapper currently supports only wakeup configuration
for single port controllers. Read speed of each port connected
to the controller and enable wakeup for each of them accordingly.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
---
drivers/usb/dwc3/dwc3-qcom.c | 71 +++++++++++++++++++++---------------
1 file changed, 41 insertions(+), 30 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
index 35eb338514bc..12182e0f8f45 100644
--- a/drivers/usb/dwc3/dwc3-qcom.c
+++ b/drivers/usb/dwc3/dwc3-qcom.c
@@ -57,6 +57,7 @@ struct dwc3_qcom_port {
int dp_hs_phy_irq;
int dm_hs_phy_irq;
int ss_phy_irq;
+ enum usb_device_speed usb2_speed;
};
struct dwc3_qcom {
@@ -68,7 +69,6 @@ struct dwc3_qcom {
struct reset_control *resets;
struct dwc3_qcom_port ports[DWC3_MAX_PORTS];
u8 num_ports;
- enum usb_device_speed usb2_speed;
struct extcon_dev *edev;
struct extcon_dev *host_edev;
@@ -307,7 +307,7 @@ static bool dwc3_qcom_is_host(struct dwc3_qcom *qcom)
return dwc->xhci;
}
-static enum usb_device_speed dwc3_qcom_read_usb2_speed(struct dwc3_qcom *qcom)
+static enum usb_device_speed dwc3_qcom_read_usb2_speed(struct dwc3_qcom *qcom, int port_index)
{
struct dwc3 *dwc = platform_get_drvdata(qcom->dwc3);
struct usb_device *udev;
@@ -318,14 +318,8 @@ static enum usb_device_speed dwc3_qcom_read_usb2_speed(struct dwc3_qcom *qcom)
*/
hcd = platform_get_drvdata(dwc->xhci);
- /*
- * It is possible to query the speed of all children of
- * USB2.0 root hub via usb_hub_for_each_child(). DWC3 code
- * currently supports only 1 port per controller. So
- * this is sufficient.
- */
#ifdef CONFIG_USB
- udev = usb_hub_find_child(hcd->self.root_hub, 1);
+ udev = usb_hub_find_child(hcd->self.root_hub, port_index + 1);
#else
udev = NULL;
#endif
@@ -356,26 +350,26 @@ static void dwc3_qcom_disable_wakeup_irq(int irq)
disable_irq_nosync(irq);
}
-static void dwc3_qcom_disable_interrupts(struct dwc3_qcom *qcom)
+static void dwc3_qcom_disable_port_interrupts(struct dwc3_qcom_port *port)
{
- dwc3_qcom_disable_wakeup_irq(qcom->ports[0].qusb2_phy_irq);
+ dwc3_qcom_disable_wakeup_irq(port->qusb2_phy_irq);
- if (qcom->usb2_speed == USB_SPEED_LOW) {
- dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq);
- } else if ((qcom->usb2_speed == USB_SPEED_HIGH) ||
- (qcom->usb2_speed == USB_SPEED_FULL)) {
- dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq);
+ if (port->usb2_speed == USB_SPEED_LOW) {
+ dwc3_qcom_disable_wakeup_irq(port->dm_hs_phy_irq);
+ } else if ((port->usb2_speed == USB_SPEED_HIGH) ||
+ (port->usb2_speed == USB_SPEED_FULL)) {
+ dwc3_qcom_disable_wakeup_irq(port->dp_hs_phy_irq);
} else {
- dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq);
- dwc3_qcom_disable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq);
+ dwc3_qcom_disable_wakeup_irq(port->dp_hs_phy_irq);
+ dwc3_qcom_disable_wakeup_irq(port->dm_hs_phy_irq);
}
- dwc3_qcom_disable_wakeup_irq(qcom->ports[0].ss_phy_irq);
+ dwc3_qcom_disable_wakeup_irq(port->ss_phy_irq);
}
-static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom)
+static void dwc3_qcom_enable_port_interrupts(struct dwc3_qcom_port *port)
{
- dwc3_qcom_enable_wakeup_irq(qcom->ports[0].qusb2_phy_irq, 0);
+ dwc3_qcom_enable_wakeup_irq(port->qusb2_phy_irq, 0);
/*
* Configure DP/DM line interrupts based on the USB2 device attached to
@@ -386,21 +380,37 @@ static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom)
* DP and DM lines as rising edge to detect HS/HS/LS device connect scenario.
*/
- if (qcom->usb2_speed == USB_SPEED_LOW) {
- dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq,
+ if (port->usb2_speed == USB_SPEED_LOW) {
+ dwc3_qcom_enable_wakeup_irq(port->dm_hs_phy_irq,
IRQ_TYPE_EDGE_FALLING);
- } else if ((qcom->usb2_speed == USB_SPEED_HIGH) ||
- (qcom->usb2_speed == USB_SPEED_FULL)) {
- dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq,
+ } else if ((port->usb2_speed == USB_SPEED_HIGH) ||
+ (port->usb2_speed == USB_SPEED_FULL)) {
+ dwc3_qcom_enable_wakeup_irq(port->dp_hs_phy_irq,
IRQ_TYPE_EDGE_FALLING);
} else {
- dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dp_hs_phy_irq,
+ dwc3_qcom_enable_wakeup_irq(port->dp_hs_phy_irq,
IRQ_TYPE_EDGE_RISING);
- dwc3_qcom_enable_wakeup_irq(qcom->ports[0].dm_hs_phy_irq,
+ dwc3_qcom_enable_wakeup_irq(port->dm_hs_phy_irq,
IRQ_TYPE_EDGE_RISING);
}
- dwc3_qcom_enable_wakeup_irq(qcom->ports[0].ss_phy_irq, 0);
+ dwc3_qcom_enable_wakeup_irq(port->ss_phy_irq, 0);
+}
+
+static void dwc3_qcom_disable_interrupts(struct dwc3_qcom *qcom)
+{
+ int i;
+
+ for (i = 0; i < qcom->num_ports; i++)
+ dwc3_qcom_disable_port_interrupts(&qcom->ports[i]);
+}
+
+static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom)
+{
+ int i;
+
+ for (i = 0; i < qcom->num_ports; i++)
+ dwc3_qcom_enable_port_interrupts(&qcom->ports[i]);
}
static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup)
@@ -427,7 +437,8 @@ static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup)
* freezable workqueue.
*/
if (dwc3_qcom_is_host(qcom) && wakeup) {
- qcom->usb2_speed = dwc3_qcom_read_usb2_speed(qcom);
+ for (i = 0; i < qcom->num_ports; i++)
+ qcom->ports[i].usb2_speed = dwc3_qcom_read_usb2_speed(qcom, i);
dwc3_qcom_enable_interrupts(qcom);
}
--
2.34.1
^ permalink raw reply related
* [PATCH v19 9/9] usb: dwc3: qcom: Add multiport suspend/resume support for wrapper
From: Krishna Kurapati @ 2024-04-04 5:12 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Bjorn Andersson, Wesley Cheng,
Konrad Dybcio, Greg Kroah-Hartman, Conor Dooley, Thinh Nguyen,
Felipe Balbi, Johan Hovold
Cc: devicetree, linux-arm-msm, linux-usb, linux-kernel, quic_ppratap,
quic_jackp, Krishna Kurapati, Johan Hovold
In-Reply-To: <20240404051229.3082902-1-quic_kriskura@quicinc.com>
Power event IRQ is used for wakeup in cases:
a) where the controller is super speed capable and missing an
ss_phy interrupt.
b) where the GIC is not capable of detecting DP/DM hs phy irq's.
Power event IRQ stat register indicates whether high speed phy
entered and exited L2 successfully during suspend and resume.
Indicate the same for all ports of multiport.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
---
drivers/usb/dwc3/dwc3-qcom.c | 22 +++++++++++++++++-----
1 file changed, 17 insertions(+), 5 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
index 12182e0f8f45..d3e6d5d5e8bf 100644
--- a/drivers/usb/dwc3/dwc3-qcom.c
+++ b/drivers/usb/dwc3/dwc3-qcom.c
@@ -52,6 +52,13 @@
#define APPS_USB_AVG_BW 0
#define APPS_USB_PEAK_BW MBps_to_icc(40)
+static const u32 pwr_evnt_irq_stat_reg[DWC3_MAX_PORTS] = {
+ 0x58,
+ 0x1dc,
+ 0x228,
+ 0x238,
+};
+
struct dwc3_qcom_port {
int qusb2_phy_irq;
int dp_hs_phy_irq;
@@ -421,9 +428,11 @@ static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup)
if (qcom->is_suspended)
return 0;
- val = readl(qcom->qscratch_base + PWR_EVNT_IRQ_STAT_REG);
- if (!(val & PWR_EVNT_LPM_IN_L2_MASK))
- dev_err(qcom->dev, "HS-PHY not in L2\n");
+ for (i = 0; i < qcom->num_ports; i++) {
+ val = readl(qcom->qscratch_base + pwr_evnt_irq_stat_reg[i]);
+ if (!(val & PWR_EVNT_LPM_IN_L2_MASK))
+ dev_err(qcom->dev, "port-%d HS-PHY not in L2\n", i + 1);
+ }
for (i = qcom->num_clocks - 1; i >= 0; i--)
clk_disable_unprepare(qcom->clks[i]);
@@ -472,8 +481,11 @@ static int dwc3_qcom_resume(struct dwc3_qcom *qcom, bool wakeup)
dev_warn(qcom->dev, "failed to enable interconnect: %d\n", ret);
/* Clear existing events from PHY related to L2 in/out */
- dwc3_qcom_setbits(qcom->qscratch_base, PWR_EVNT_IRQ_STAT_REG,
- PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK);
+ for (i = 0; i < qcom->num_ports; i++) {
+ dwc3_qcom_setbits(qcom->qscratch_base,
+ pwr_evnt_irq_stat_reg[i],
+ PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK);
+ }
qcom->is_suspended = false;
--
2.34.1
^ permalink raw reply related
* Re: [PATCH V2 RESEND 6/6] arm64: dts: qcom: sm8650: Add video and camera clock controllers
From: Jagadeesh Kona @ 2024-04-04 5:13 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Bjorn Andersson, Konrad Dybcio, Michael Turquette, Stephen Boyd,
Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Vladimir Zapolskiy, linux-arm-msm, linux-clk, devicetree,
linux-kernel, Taniya Das, Satya Priya Kakitapalli, Ajit Pandey,
Imran Shaik
In-Reply-To: <CAA8EJpqDwCVAjDphnC-HdfseMJ-xd8VVxb5+9UcGEcKLcn-heg@mail.gmail.com>
On 4/3/2024 9:24 PM, Dmitry Baryshkov wrote:
> On Wed, 3 Apr 2024 at 10:16, Jagadeesh Kona <quic_jkona@quicinc.com> wrote:
>>
>>
>>
>> On 3/25/2024 11:38 AM, Jagadeesh Kona wrote:
>>>
>>>
>>> On 3/21/2024 6:43 PM, Dmitry Baryshkov wrote:
>>>> On Thu, 21 Mar 2024 at 11:27, Jagadeesh Kona <quic_jkona@quicinc.com>
>>>> wrote:
>>>>>
>>>>> Add device nodes for video and camera clock controllers on Qualcomm
>>>>> SM8650 platform.
>>>>>
>>>>> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
>>>>> ---
>>>>> arch/arm64/boot/dts/qcom/sm8650.dtsi | 28 ++++++++++++++++++++++++++++
>>>>> 1 file changed, 28 insertions(+)
>>>>>
>>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi
>>>>> b/arch/arm64/boot/dts/qcom/sm8650.dtsi
>>>>> index 32c0a7b9aded..d862aa6be824 100644
>>>>> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
>>>>> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
>>>>> @@ -4,6 +4,8 @@
>>>>> */
>>>>>
>>>>> #include <dt-bindings/clock/qcom,rpmh.h>
>>>>> +#include <dt-bindings/clock/qcom,sm8450-videocc.h>
>>>>> +#include <dt-bindings/clock/qcom,sm8650-camcc.h>
>>>>> #include <dt-bindings/clock/qcom,sm8650-dispcc.h>
>>>>> #include <dt-bindings/clock/qcom,sm8650-gcc.h>
>>>>> #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
>>>>> @@ -3110,6 +3112,32 @@ opp-202000000 {
>>>>> };
>>>>> };
>>>>>
>>>>> + videocc: clock-controller@aaf0000 {
>>>>> + compatible = "qcom,sm8650-videocc";
>>>>> + reg = <0 0x0aaf0000 0 0x10000>;
>>>>> + clocks = <&bi_tcxo_div2>,
>>>>> + <&gcc GCC_VIDEO_AHB_CLK>;
>>>>> + power-domains = <&rpmhpd RPMHPD_MMCX>;
>>>>> + required-opps = <&rpmhpd_opp_low_svs>;
>>>>
>>>> The required-opps should no longer be necessary.
>>>>
>>>
>>> Sure, will check and remove this if not required.
>>
>>
>> I checked further on this and without required-opps, if there is no vote
>> on the power-domain & its peer from any other consumers, when runtime
>> get is called on device, it enables the power domain just at the minimum
>> non-zero level. But in some cases, the minimum non-zero level of
>> power-domain could be just retention and is not sufficient for clock
>> controller to operate, hence required-opps property is needed to specify
>> the minimum level required on power-domain for this clock controller.
>
> In which cases? If it ends up with the retention vote, it is a bug
> which must be fixed.
>
The minimum non-zero level(configured from bootloaders) of MMCX is
retention on few chipsets but it can vary across the chipsets. Hence to
be on safer side from our end, it is good to have required-opps in DT to
specify the minimum level required for this clock controller.
Thanks,
Jagadeesh
>>
>> Thanks,
>> Jagadeesh
>>
>>>
>>>>> + #clock-cells = <1>;
>>>>> + #reset-cells = <1>;
>>>>> + #power-domain-cells = <1>;
>>>>> + };
>>>>> +
>>>>> + camcc: clock-controller@ade0000 {
>>>>> + compatible = "qcom,sm8650-camcc";
>>>>> + reg = <0 0x0ade0000 0 0x20000>;
>>>>> + clocks = <&gcc GCC_CAMERA_AHB_CLK>,
>>>>> + <&bi_tcxo_div2>,
>>>>> + <&bi_tcxo_ao_div2>,
>>>>> + <&sleep_clk>;
>>>>> + power-domains = <&rpmhpd RPMHPD_MMCX>;
>>>>> + required-opps = <&rpmhpd_opp_low_svs>;
>>>>> + #clock-cells = <1>;
>>>>> + #reset-cells = <1>;
>>>>> + #power-domain-cells = <1>;
>>>>> + };
>>>>> +
>>>>> mdss: display-subsystem@ae00000 {
>>>>> compatible = "qcom,sm8650-mdss";
>>>>> reg = <0 0x0ae00000 0 0x1000>;
>>>>> --
>>>>> 2.43.0
>>>>>
>>>>>
>>>>
>>>>
>
>
>
^ permalink raw reply
* [RESEND v7 00/37] Device Tree support for SH7751 based board
From: Yoshinori Sato @ 2024-04-04 5:14 UTC (permalink / raw)
To: linux-sh
Cc: Yoshinori Sato, Damien Le Moal, Niklas Cassel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Michael Turquette, Stephen Boyd, David Airlie, Daniel Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Thomas Gleixner, Bjorn Helgaas, Lorenzo Pieralisi,
Krzysztof Wilczyński, Greg Kroah-Hartman, Jiri Slaby,
Magnus Damm, Daniel Lezcano, Rich Felker,
John Paul Adrian Glaubitz, Lee Jones, Helge Deller,
Heiko Stuebner, Shawn Guo, Sebastian Reichel, Chris Morgan,
Linus Walleij, Arnd Bergmann, David Rientjes, Hyeonggon Yoo,
Vlastimil Babka, Baoquan He, Andrew Morton, Guenter Roeck,
Kefeng Wang, Stephen Rothwell, Javier Martinez Canillas, Guo Ren,
Azeem Shaikh, Max Filippov, Jonathan Corbet, Jacky Huang,
Herve Codina, Manikanta Guntupalli, Anup Patel, Biju Das,
Uwe Kleine-König, Sam Ravnborg, Sergey Shtylyov,
Laurent Pinchart, linux-ide, devicetree, linux-kernel,
linux-renesas-soc, linux-clk, dri-devel, linux-pci, linux-serial,
linux-fbdev
Sorry. previus mail is thread broken.
This is an updated version of something I wrote about 7 years ago.
Minimum support for R2D-plus and LANDISK.
I think R2D-1 will work if you add AX88796 to dts.
And board-specific functions and SCI's SPI functions are not supported.
You can get it working with qemu found here.
https://gitlab.com/yoshinori.sato/qemu/-/tree/landisk
v7 changes.
- sh/kernel/setup.c: fix kernel parameter handling.
- clk-sh7750.c: cleanup.
- sh_tmu.c: cleanup.
- irq-renesas-sh7751.c: IPR definition move to code.
- irq-renesas-sh7751irl.c: update register definition.
- pci-sh7751.c: Register initialization fix.
- sm501 and sm501fb: Re-design Device Tree properties.
v6 changes.
- pci-sh7751: merge register define.
- pci-sh7751: use 'dma-ranges' property.
- pci-sh7751: rename general PCI properties.
- sm501 and sm501fb: Re-design Device Tree properties.
- sh/kernel/setup: cleanup command line setup.
- irq-sh7751.c: some cleanup.
v5 changes.
- pci-sh7751: revert header changes. and some fix in previuous driver.
- sh/kernel/iomap.c: Use SH io functions.
- sm501 and sm501fb: re-write DT support.
v4 changes.
- cpg-sh7750: use clk-divider and clk-gate.
- pci-sh7751: unified header files to old PCI driver.
- irq-renesas-sh7751: IPR registers direct mapping.
- irq-renesas-sh7751irl: useful register bit mapping.
- sm501 and sm501fb: re-write dt parser.
- j2_minus: fix build error.
- dt-binding schema: fix some errors.
- *.dts: cleanup.
v3 changes.
- Rewrite clk drivers.
- Added sh_tmu to OF support.
- Cleanup PCI stuff.
- Update sm501 and sm501fb OF support.
- Update devicetree and documents.
v2 changes.
- Rebasing v6,6-rc1
- re-write irqchip driver.
- Add binding documents.
- Cleanup review comment.
Yoshinori Sato (37):
sh: passing FDT address to kernel startup.
sh: Kconfig unified OF supported targets.
sh: Enable OF support for build and configuration.
dt-bindings: interrupt-controller: Add header for Renesas SH3/4 INTC.
sh: GENERIC_IRQ_CHIP support for CONFIG_OF=y
sh: kernel/setup Update DT support.
sh: Fix COMMON_CLK support in CONFIG_OF=y.
clocksource: sh_tmu: CLOCKSOURCE support.
dt-binding: Add compatible SH7750 SoC
sh: Common PCI Framework driver support.
pci: pci-sh7751: Add SH7751 PCI driver
dt-bindings: pci: pci-sh7751: Add SH7751 PCI
dt-bindings: clock: sh7750-cpg: Add renesas,sh7750-cpg header.
clk: Compatible with narrow registers
clk: renesas: Add SH7750/7751 CPG Driver
irqchip: Add SH7751 INTC driver
dt-bindings: interrupt-controller: renesas,sh7751-intc: Add
json-schema
irqchip: SH7751 external interrupt encoder with enable gate.
dt-bindings: interrupt-controller: renesas,sh7751-irl-ext: Add
json-schema
serial: sh-sci: fix SH4 OF support.
dt-bindings: serial: renesas,scif: Add scif-sh7751.
dt-bindings: display: smi,sm501: SMI SM501 binding json-schema
dt-bindings: display: sm501 register definition helper
mfd: sm501: Convert platform_data to OF property
dt-binding: sh: cpus: Add SH CPUs json-schema
dt-bindings: vendor-prefixes: Add iodata
dt-bindings: ata: ata-generic: Add new targets
dt-bindings: soc: renesas: sh: Add SH7751 based target
sh: SH7751R SoC Internal peripheral definition dtsi.
sh: add RTS7751R2D Plus DTS
sh: Add IO DATA LANDISK dts
sh: Add IO DATA USL-5P dts
sh: j2_mimas_v2.dts update
sh: Add dtbs target support.
sh: RTS7751R2D Plus OF defconfig
sh: LANDISK OF defconfig
sh: j2_defconfig: update
.../devicetree/bindings/ata/ata-generic.yaml | 2 +
.../bindings/clock/renesas,sh7750-cpg.yaml | 105 ++++
.../bindings/display/smi,sm501.yaml | 398 +++++++++++++++
.../renesas,sh7751-intc.yaml | 53 ++
.../renesas,sh7751-irl-ext.yaml | 57 +++
.../bindings/pci/renesas,sh7751-pci.yaml | 89 ++++
.../bindings/serial/renesas,scif.yaml | 1 +
.../devicetree/bindings/sh/cpus.yaml | 63 +++
.../devicetree/bindings/soc/renesas/sh.yaml | 27 +
.../bindings/timer/renesas,tmu.yaml | 2 +
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
arch/sh/Kconfig | 33 +-
arch/sh/boards/Kconfig | 23 +-
arch/sh/boards/of-generic.c | 28 +-
arch/sh/boot/compressed/head_32.S | 5 +-
arch/sh/boot/dts/Makefile | 5 +
arch/sh/boot/dts/j2_mimas_v2.dts | 2 +-
arch/sh/boot/dts/landisk.dts | 77 +++
arch/sh/boot/dts/rts7751r2dplus.dts | 169 ++++++
arch/sh/boot/dts/sh7751r.dtsi | 105 ++++
arch/sh/boot/dts/usl-5p.dts | 85 ++++
arch/sh/configs/j2_defconfig | 11 +-
arch/sh/configs/landisk-of_defconfig | 104 ++++
arch/sh/configs/rts7751r2dplus-of_defconfig | 75 +++
arch/sh/drivers/Makefile | 2 +
arch/sh/include/asm/io.h | 8 +
arch/sh/include/asm/irq.h | 10 +-
arch/sh/include/asm/pci.h | 4 +
arch/sh/include/asm/setup.h | 1 +
arch/sh/kernel/cpu/Makefile | 6 +-
arch/sh/kernel/cpu/irq/imask.c | 17 +
arch/sh/kernel/cpu/sh4/Makefile | 3 +
arch/sh/kernel/iomap.c | 18 +
arch/sh/kernel/setup.c | 36 +-
arch/sh/kernel/time.c | 12 +
drivers/clk/clk-divider.c | 56 +-
drivers/clk/clk-gate.c | 62 ++-
drivers/clk/renesas/Kconfig | 13 +-
drivers/clk/renesas/Makefile | 1 +
drivers/clk/renesas/clk-sh7750.c | 480 ++++++++++++++++++
drivers/clocksource/sh_tmu.c | 198 +++++---
drivers/irqchip/Kconfig | 15 +
drivers/irqchip/Makefile | 3 +
drivers/irqchip/irq-renesas-sh7751.c | 282 ++++++++++
drivers/irqchip/irq-renesas-sh7751irl.c | 221 ++++++++
drivers/mfd/sm501.c | 315 ++++++++++++
drivers/pci/controller/Kconfig | 9 +
drivers/pci/controller/Makefile | 1 +
drivers/pci/controller/pci-sh7751.c | 342 +++++++++++++
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/sh-sci.c | 6 +-
drivers/video/fbdev/sm501fb.c | 106 ++++
include/dt-bindings/clock/sh7750-cpg.h | 26 +
include/dt-bindings/display/sm501.h | 76 +++
.../renesas,sh7751-intc.h | 19 +
include/linux/clk-provider.h | 22 +-
include/linux/sh_intc.h | 7 +-
57 files changed, 3713 insertions(+), 187 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml
create mode 100644 Documentation/devicetree/bindings/display/smi,sm501.yaml
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.yaml
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml
create mode 100644 Documentation/devicetree/bindings/pci/renesas,sh7751-pci.yaml
create mode 100644 Documentation/devicetree/bindings/sh/cpus.yaml
create mode 100644 Documentation/devicetree/bindings/soc/renesas/sh.yaml
create mode 100644 arch/sh/boot/dts/landisk.dts
create mode 100644 arch/sh/boot/dts/rts7751r2dplus.dts
create mode 100644 arch/sh/boot/dts/sh7751r.dtsi
create mode 100644 arch/sh/boot/dts/usl-5p.dts
create mode 100644 arch/sh/configs/landisk-of_defconfig
create mode 100644 arch/sh/configs/rts7751r2dplus-of_defconfig
create mode 100644 drivers/clk/renesas/clk-sh7750.c
create mode 100644 drivers/irqchip/irq-renesas-sh7751.c
create mode 100644 drivers/irqchip/irq-renesas-sh7751irl.c
create mode 100644 drivers/pci/controller/pci-sh7751.c
create mode 100644 include/dt-bindings/clock/sh7750-cpg.h
create mode 100644 include/dt-bindings/display/sm501.h
create mode 100644 include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h
--
2.39.2
^ permalink raw reply
* [RESEND v7 01/37] sh: passing FDT address to kernel startup.
From: Yoshinori Sato @ 2024-04-04 5:14 UTC (permalink / raw)
To: linux-sh
Cc: Yoshinori Sato, Damien Le Moal, Niklas Cassel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Michael Turquette, Stephen Boyd, David Airlie, Daniel Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Thomas Gleixner, Bjorn Helgaas, Lorenzo Pieralisi,
Krzysztof Wilczyński, Greg Kroah-Hartman, Jiri Slaby,
Magnus Damm, Daniel Lezcano, Rich Felker,
John Paul Adrian Glaubitz, Lee Jones, Helge Deller,
Heiko Stuebner, Shawn Guo, Sebastian Reichel, Chris Morgan,
Linus Walleij, Arnd Bergmann, David Rientjes, Hyeonggon Yoo,
Vlastimil Babka, Baoquan He, Andrew Morton, Guenter Roeck,
Kefeng Wang, Stephen Rothwell, Javier Martinez Canillas, Guo Ren,
Azeem Shaikh, Max Filippov, Jonathan Corbet, Jacky Huang,
Herve Codina, Manikanta Guntupalli, Anup Patel, Biju Das,
Uwe Kleine-König, Sam Ravnborg, Sergey Shtylyov,
Laurent Pinchart, linux-ide, devicetree, linux-kernel,
linux-renesas-soc, linux-clk, dri-devel, linux-pci, linux-serial,
linux-fbdev
In-Reply-To: <cover.1712207606.git.ysato@users.sourceforge.jp>
R4 is caller saved in SH ABI.
Save it so it doesn't get corrupted until it's needed for initialization.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/sh/boot/compressed/head_32.S | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/sh/boot/compressed/head_32.S b/arch/sh/boot/compressed/head_32.S
index 7bb168133dbb..6be59851122e 100644
--- a/arch/sh/boot/compressed/head_32.S
+++ b/arch/sh/boot/compressed/head_32.S
@@ -15,7 +15,8 @@ startup:
/* Load initial status register */
mov.l init_sr, r1
ldc r1, sr
-
+ /* Save FDT address */
+ mov r4, r13
/* Move myself to proper location if necessary */
mova 1f, r0
mov.l 1f, r2
@@ -84,7 +85,7 @@ l1:
/* Jump to the start of the decompressed kernel */
mov.l kernel_start_addr, r0
jmp @r0
- nop
+ mov r13, r4
.align 2
bss_start_addr:
--
2.39.2
^ permalink raw reply related
* [RESEND v7 02/37] sh: Kconfig unified OF supported targets.
From: Yoshinori Sato @ 2024-04-04 5:14 UTC (permalink / raw)
To: linux-sh
Cc: Yoshinori Sato, Damien Le Moal, Niklas Cassel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Michael Turquette, Stephen Boyd, David Airlie, Daniel Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Thomas Gleixner, Bjorn Helgaas, Lorenzo Pieralisi,
Krzysztof Wilczyński, Greg Kroah-Hartman, Jiri Slaby,
Magnus Damm, Daniel Lezcano, Rich Felker,
John Paul Adrian Glaubitz, Lee Jones, Helge Deller,
Heiko Stuebner, Shawn Guo, Sebastian Reichel, Chris Morgan,
Linus Walleij, Arnd Bergmann, David Rientjes, Hyeonggon Yoo,
Vlastimil Babka, Baoquan He, Andrew Morton, Guenter Roeck,
Kefeng Wang, Stephen Rothwell, Javier Martinez Canillas, Guo Ren,
Azeem Shaikh, Max Filippov, Jonathan Corbet, Jacky Huang,
Herve Codina, Manikanta Guntupalli, Anup Patel, Biju Das,
Uwe Kleine-König, Sam Ravnborg, Sergey Shtylyov,
Laurent Pinchart, linux-ide, devicetree, linux-kernel,
linux-renesas-soc, linux-clk, dri-devel, linux-pci, linux-serial,
linux-fbdev
In-Reply-To: <cover.1712207606.git.ysato@users.sourceforge.jp>
Targets that support OF should be treated as one board.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/Kconfig | 1 +
arch/sh/boards/Kconfig | 23 +++++++++++++----------
2 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 2ad3e29f0ebe..cbf48e69ad74 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -711,6 +711,7 @@ choice
prompt "Kernel command line"
optional
default CMDLINE_OVERWRITE
+ depends on !OF || USE_BUILTIN_DTB
help
Setting this option allows the kernel command line arguments
to be set.
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 109bec4dad94..46387fd040ad 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -19,16 +19,9 @@ config SH_DEVICE_TREE
select TIMER_OF
select COMMON_CLK
select GENERIC_CALIBRATE_DELAY
-
-config SH_JCORE_SOC
- bool "J-Core SoC"
- select SH_DEVICE_TREE
- select CLKSRC_JCORE_PIT
- select JCORE_AIC
- depends on CPU_J2
- help
- Select this option to include drivers core components of the
- J-Core SoC, including interrupt controllers and timers.
+ select GENERIC_IRQ_CHIP
+ select SYS_SUPPORTS_PCI
+ select GENERIC_PCI_IOMAP if PCI
config SH_SOLUTION_ENGINE
bool "SolutionEngine"
@@ -293,6 +286,7 @@ config SH_LANDISK
bool "LANDISK"
depends on CPU_SUBTYPE_SH7751R
select HAVE_PCI
+ select SYS_SUPPORTS_PCI
help
I-O DATA DEVICE, INC. "LANDISK Series" support.
@@ -369,6 +363,15 @@ config SH_APSH4AD0A
help
Select AP-SH4AD-0A if configuring for an ALPHAPROJECT AP-SH4AD-0A.
+config SH_OF_BOARD
+ bool "General Open Firmware boards"
+ select SH_DEVICE_TREE
+ select CLKSRC_JCORE_PIT if CPU_J2
+ select JCORE_AIC if CPU_J2
+ select HAVE_PCI if CPU_SUBTYPE_SH7751R
+ help
+ This board means general OF supported targets.
+
source "arch/sh/boards/mach-r2d/Kconfig"
source "arch/sh/boards/mach-highlander/Kconfig"
source "arch/sh/boards/mach-sdk7780/Kconfig"
--
2.39.2
^ permalink raw reply related
* [RESEND v7 03/37] sh: Enable OF support for build and configuration.
From: Yoshinori Sato @ 2024-04-04 5:14 UTC (permalink / raw)
To: linux-sh
Cc: Yoshinori Sato, Damien Le Moal, Niklas Cassel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Michael Turquette, Stephen Boyd, David Airlie, Daniel Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Thomas Gleixner, Bjorn Helgaas, Lorenzo Pieralisi,
Krzysztof Wilczyński, Greg Kroah-Hartman, Jiri Slaby,
Magnus Damm, Daniel Lezcano, Rich Felker,
John Paul Adrian Glaubitz, Lee Jones, Helge Deller,
Heiko Stuebner, Shawn Guo, Sebastian Reichel, Chris Morgan,
Linus Walleij, Arnd Bergmann, David Rientjes, Hyeonggon Yoo,
Vlastimil Babka, Baoquan He, Andrew Morton, Guenter Roeck,
Kefeng Wang, Stephen Rothwell, Javier Martinez Canillas, Guo Ren,
Azeem Shaikh, Max Filippov, Jonathan Corbet, Jacky Huang,
Herve Codina, Manikanta Guntupalli, Anup Patel, Biju Das,
Uwe Kleine-König, Sam Ravnborg, Sergey Shtylyov,
Laurent Pinchart, linux-ide, devicetree, linux-kernel,
linux-renesas-soc, linux-clk, dri-devel, linux-pci, linux-serial,
linux-fbdev
In-Reply-To: <cover.1712207606.git.ysato@users.sourceforge.jp>
IRQ, CLK and PCI will be migrated to a common driver framework.
So if OF, disable the SH specific drivers.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/Kconfig | 11 ++++++-----
arch/sh/drivers/Makefile | 2 ++
arch/sh/kernel/cpu/Makefile | 9 +++++++--
arch/sh/kernel/cpu/sh4/Makefile | 3 +++
4 files changed, 18 insertions(+), 7 deletions(-)
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index cbf48e69ad74..6711cde0d973 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -66,10 +66,10 @@ config SUPERH
select MODULES_USE_ELF_RELA
select NEED_SG_DMA_LENGTH
select NO_DMA if !MMU && !DMA_COHERENT
- select NO_GENERIC_PCI_IOPORT_MAP if PCI
+ select NO_GENERIC_PCI_IOPORT_MAP if !SH_DEVICE_TREE
select OLD_SIGACTION
select OLD_SIGSUSPEND
- select PCI_DOMAINS if PCI
+ select PCI_DOMAINS if PCI && !SH_DEVICE_TREE
select PERF_EVENTS
select PERF_USE_VMALLOC
select RTC_LIB
@@ -153,7 +153,7 @@ menu "System type"
#
config CPU_SH2
bool
- select SH_INTC
+ select SH_INTC if !SH_DEVICE_TREE
config CPU_SH2A
bool
@@ -179,7 +179,7 @@ config CPU_SH4
select CPU_HAS_INTEVT
select CPU_HAS_SR_RB
select CPU_HAS_FPU if !CPU_SH4AL_DSP
- select SH_INTC
+ select SH_INTC if !SH_DEVICE_TREE
select SYS_SUPPORTS_SH_TMU
config CPU_SH4A
@@ -522,6 +522,7 @@ config SH_PCLK_FREQ
config SH_CLK_CPG
def_bool y
+ depends on !COMMON_CLK
config SH_CLK_CPG_LEGACY
depends on SH_CLK_CPG
@@ -666,7 +667,7 @@ config BUILTIN_DTB_SOURCE
kernel.
config ZERO_PAGE_OFFSET
- hex
+ hex "Zero page offset"
default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
SH_7751_SOLUTION_ENGINE
default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
diff --git a/arch/sh/drivers/Makefile b/arch/sh/drivers/Makefile
index 8bd10b904bf9..83f609ca1eb4 100644
--- a/arch/sh/drivers/Makefile
+++ b/arch/sh/drivers/Makefile
@@ -5,6 +5,8 @@
obj-y += dma/ platform_early.o
+ifndef CONFIG_SH_DEVICE_TREE
obj-$(CONFIG_PCI) += pci/
+endif
obj-$(CONFIG_PUSH_SWITCH) += push-switch.o
obj-$(CONFIG_HEARTBEAT) += heartbeat.o
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index 46118236bf04..e00ebf134985 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -16,6 +16,11 @@ obj-$(CONFIG_ARCH_SHMOBILE) += shmobile/
# Common interfaces.
obj-$(CONFIG_SH_ADC) += adc.o
+ifndef CONFIG_COMMON_CLK
+obj-y += clock.o
obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o
-
-obj-y += irq/ init.o clock.o fpu.o pfc.o proc.o
+endif
+ifndef CONFIG_GENERIC_IRQ_CHIP
+obj-y += irq/
+endif
+obj-y += init.o fpu.o pfc.o proc.o
diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile
index 02e3ee16e15c..33da4c86feff 100644
--- a/arch/sh/kernel/cpu/sh4/Makefile
+++ b/arch/sh/kernel/cpu/sh4/Makefile
@@ -15,6 +15,7 @@ perf-$(CONFIG_CPU_SUBTYPE_SH7750) := perf_event.o
perf-$(CONFIG_CPU_SUBTYPE_SH7750S) := perf_event.o
perf-$(CONFIG_CPU_SUBTYPE_SH7091) := perf_event.o
+ifndef CONFIG_SH_DEVICE_TREE
# CPU subtype setup
obj-$(CONFIG_CPU_SUBTYPE_SH7750) += setup-sh7750.o
obj-$(CONFIG_CPU_SUBTYPE_SH7750R) += setup-sh7750.o
@@ -29,5 +30,7 @@ ifndef CONFIG_CPU_SH4A
clock-$(CONFIG_CPU_SH4) := clock-sh4.o
endif
+endif # CONFIG_SH_DEVICE_TREE
+
obj-y += $(clock-y)
obj-$(CONFIG_PERF_EVENTS) += $(perf-y)
--
2.39.2
^ permalink raw reply related
* [RESEND v7 04/37] dt-bindings: interrupt-controller: Add header for Renesas SH3/4 INTC.
From: Yoshinori Sato @ 2024-04-04 5:14 UTC (permalink / raw)
To: linux-sh
Cc: Yoshinori Sato, Damien Le Moal, Niklas Cassel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Michael Turquette, Stephen Boyd, David Airlie, Daniel Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Thomas Gleixner, Bjorn Helgaas, Lorenzo Pieralisi,
Krzysztof Wilczyński, Greg Kroah-Hartman, Jiri Slaby,
Magnus Damm, Daniel Lezcano, Rich Felker,
John Paul Adrian Glaubitz, Lee Jones, Helge Deller,
Heiko Stuebner, Shawn Guo, Sebastian Reichel, Chris Morgan,
Linus Walleij, Arnd Bergmann, David Rientjes, Hyeonggon Yoo,
Vlastimil Babka, Baoquan He, Andrew Morton, Guenter Roeck,
Kefeng Wang, Stephen Rothwell, Javier Martinez Canillas, Guo Ren,
Azeem Shaikh, Max Filippov, Jonathan Corbet, Jacky Huang,
Herve Codina, Manikanta Guntupalli, Anup Patel, Biju Das,
Uwe Kleine-König, Sam Ravnborg, Sergey Shtylyov,
Laurent Pinchart, linux-ide, devicetree, linux-kernel,
linux-renesas-soc, linux-clk, dri-devel, linux-pci, linux-serial,
linux-fbdev
In-Reply-To: <cover.1712207606.git.ysato@users.sourceforge.jp>
Renesas SH7751 Interrupt controller priority register define.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
.../renesas,sh7751-intc.h | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
create mode 100644 include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h
diff --git a/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h b/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h
new file mode 100644
index 000000000000..0543bd1b895e
--- /dev/null
+++ b/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+ *
+ * SH3/4 INTC IPR register offsets (Address / bits)
+ */
+
+#ifndef __DT_BINDINGS_RENESAS_SH7751_INTC
+#define __DT_BINDINGS_RENESAS_SH7751_INTC
+
+#define IPRA 0
+#define IPRB 4
+#define IPRC 8
+#define IPRD 12
+#define INTPRI00 256
+#define IPR_B12 12
+#define IPR_B8 8
+#define IPR_B4 4
+#define IPR_B0 0
+
+#endif
--
2.39.2
^ permalink raw reply related
* [RESEND v7 05/37] sh: GENERIC_IRQ_CHIP support for CONFIG_OF=y
From: Yoshinori Sato @ 2024-04-04 5:14 UTC (permalink / raw)
To: linux-sh
Cc: Yoshinori Sato, Damien Le Moal, Niklas Cassel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Michael Turquette, Stephen Boyd, David Airlie, Daniel Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Thomas Gleixner, Bjorn Helgaas, Lorenzo Pieralisi,
Krzysztof Wilczyński, Greg Kroah-Hartman, Jiri Slaby,
Magnus Damm, Daniel Lezcano, Rich Felker,
John Paul Adrian Glaubitz, Lee Jones, Helge Deller,
Heiko Stuebner, Shawn Guo, Sebastian Reichel, Chris Morgan,
Linus Walleij, Arnd Bergmann, David Rientjes, Hyeonggon Yoo,
Vlastimil Babka, Baoquan He, Andrew Morton, Guenter Roeck,
Kefeng Wang, Stephen Rothwell, Javier Martinez Canillas, Guo Ren,
Azeem Shaikh, Max Filippov, Jonathan Corbet, Jacky Huang,
Herve Codina, Manikanta Guntupalli, Anup Patel, Biju Das,
Uwe Kleine-König, Sam Ravnborg, Sergey Shtylyov,
Laurent Pinchart, linux-ide, devicetree, linux-kernel,
linux-renesas-soc, linux-clk, dri-devel, linux-pci, linux-serial,
linux-fbdev
In-Reply-To: <cover.1712207606.git.ysato@users.sourceforge.jp>
Remove unused function prototype.
Add helper update_sr_imask. use for SH7751 irq driver.
Add stub intc_finalize.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/include/asm/io.h | 2 ++
arch/sh/include/asm/irq.h | 10 ++++++++--
arch/sh/kernel/cpu/Makefile | 5 +----
arch/sh/kernel/cpu/irq/imask.c | 17 +++++++++++++++++
include/linux/sh_intc.h | 7 ++++++-
5 files changed, 34 insertions(+), 7 deletions(-)
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index cf5eab840d57..5c544cf5201b 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -121,7 +121,9 @@ __BUILD_MEMORY_STRING(__raw_, q, u64)
#define ioport_map ioport_map
#define ioport_unmap ioport_unmap
+#ifndef CONFIG_SH_DEVICE_TREE
#define pci_iounmap pci_iounmap
+#endif
#define ioread8 ioread8
#define ioread16 ioread16
diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h
index 0f384b1f45ca..3d897229dcc4 100644
--- a/arch/sh/include/asm/irq.h
+++ b/arch/sh/include/asm/irq.h
@@ -16,8 +16,8 @@
/*
* Simple Mask Register Support
*/
-extern void make_maskreg_irq(unsigned int irq);
-extern unsigned short *irq_mask_register;
+
+void update_sr_imask(unsigned int irq, bool enable);
/*
* PINT IRQs
@@ -54,4 +54,10 @@ extern void irq_finish(unsigned int irq);
#include <asm-generic/irq.h>
+/* SH3/4 INTC stuff */
+/* IRL level 0 - 15 */
+#define NR_IRL 15
+/* IRL0 -> IRQ16 */
+#define IRL_BASE_IRQ 16
+
#endif /* __ASM_SH_IRQ_H */
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index e00ebf134985..ad12807fae9c 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -20,7 +20,4 @@ ifndef CONFIG_COMMON_CLK
obj-y += clock.o
obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o
endif
-ifndef CONFIG_GENERIC_IRQ_CHIP
-obj-y += irq/
-endif
-obj-y += init.o fpu.o pfc.o proc.o
+obj-y += init.o fpu.o pfc.o proc.o irq/
diff --git a/arch/sh/kernel/cpu/irq/imask.c b/arch/sh/kernel/cpu/irq/imask.c
index 572585c3f2fd..7589ca7c506c 100644
--- a/arch/sh/kernel/cpu/irq/imask.c
+++ b/arch/sh/kernel/cpu/irq/imask.c
@@ -51,6 +51,7 @@ static inline void set_interrupt_registers(int ip)
: "t");
}
+#ifndef CONFIG_GENERIC_IRQ_CHIP
static void mask_imask_irq(struct irq_data *data)
{
unsigned int irq = data->irq;
@@ -83,3 +84,19 @@ void make_imask_irq(unsigned int irq)
irq_set_chip_and_handler_name(irq, &imask_irq_chip, handle_level_irq,
"level");
}
+#else
+void update_sr_imask(unsigned int irq, bool enable)
+{
+ if (enable) {
+ set_bit(irq, imask_mask);
+ interrupt_priority = IMASK_PRIORITY -
+ find_first_bit(imask_mask, IMASK_PRIORITY);
+ } else {
+ clear_bit(irq, imask_mask);
+ if (interrupt_priority < IMASK_PRIORITY - irq)
+ interrupt_priority = IMASK_PRIORITY - irq;
+ }
+ set_interrupt_registers(interrupt_priority);
+}
+EXPORT_SYMBOL(update_sr_imask);
+#endif
diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h
index 27ae79191bdc..994b5b05a0d7 100644
--- a/include/linux/sh_intc.h
+++ b/include/linux/sh_intc.h
@@ -139,8 +139,13 @@ struct intc_desc symbol __initdata = { \
int register_intc_controller(struct intc_desc *desc);
int intc_set_priority(unsigned int irq, unsigned int prio);
int intc_irq_lookup(const char *chipname, intc_enum enum_id);
+#ifndef CONFIG_SH_DEVICE_TREE
void intc_finalize(void);
-
+#else
+static inline void intc_finalize(void)
+{
+}
+#endif
#ifdef CONFIG_INTC_USERIMASK
int register_intc_userimask(unsigned long addr);
#else
--
2.39.2
^ permalink raw reply related
* [RESEND v7 06/37] sh: kernel/setup Update DT support.
From: Yoshinori Sato @ 2024-04-04 5:14 UTC (permalink / raw)
To: linux-sh
Cc: Yoshinori Sato, Damien Le Moal, Niklas Cassel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Michael Turquette, Stephen Boyd, David Airlie, Daniel Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Thomas Gleixner, Bjorn Helgaas, Lorenzo Pieralisi,
Krzysztof Wilczyński, Greg Kroah-Hartman, Jiri Slaby,
Magnus Damm, Daniel Lezcano, Rich Felker,
John Paul Adrian Glaubitz, Lee Jones, Helge Deller,
Heiko Stuebner, Shawn Guo, Sebastian Reichel, Chris Morgan,
Linus Walleij, Arnd Bergmann, David Rientjes, Hyeonggon Yoo,
Vlastimil Babka, Baoquan He, Andrew Morton, Guenter Roeck,
Kefeng Wang, Stephen Rothwell, Javier Martinez Canillas, Guo Ren,
Azeem Shaikh, Max Filippov, Jonathan Corbet, Jacky Huang,
Herve Codina, Manikanta Guntupalli, Anup Patel, Biju Das,
Uwe Kleine-König, Sam Ravnborg, Sergey Shtylyov,
Laurent Pinchart, linux-ide, devicetree, linux-kernel,
linux-renesas-soc, linux-clk, dri-devel, linux-pci, linux-serial,
linux-fbdev
In-Reply-To: <cover.1712207606.git.ysato@users.sourceforge.jp>
Fix extrnal fdt initialize and bootargs.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/Kconfig | 23 +++++++++++------------
arch/sh/include/asm/setup.h | 1 +
arch/sh/kernel/setup.c | 36 +++++++++++++++++++++++-------------
3 files changed, 35 insertions(+), 25 deletions(-)
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 6711cde0d973..242cf30e704d 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -708,17 +708,22 @@ config ROMIMAGE_MMCIF
first part of the romImage which in turn loads the rest the kernel
image to RAM using the MMCIF hardware block.
+config CMDLINE
+ string "Kernel command line arguments string"
+ default "console=ttySC1,115200"
+
choice
prompt "Kernel command line"
- optional
- default CMDLINE_OVERWRITE
- depends on !OF || USE_BUILTIN_DTB
+ default CMDLINE_BOOTLOADER
+
+config CMDLINE_BOOTLOADER
+ bool "Use bootloader kernel arguments"
help
- Setting this option allows the kernel command line arguments
- to be set.
+ Uses the command-line options passed by the boot loader.
+ If boot loader dosen't provide kernel argments, Use built-in argments.
config CMDLINE_OVERWRITE
- bool "Overwrite bootloader kernel arguments"
+ bool "Overwrite built-in kernel arguments"
help
Given string will overwrite any arguments passed in by
a bootloader.
@@ -730,12 +735,6 @@ config CMDLINE_EXTEND
by a bootloader.
endchoice
-
-config CMDLINE
- string "Kernel command line arguments string"
- depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND
- default "console=ttySC1,115200"
-
endmenu
menu "Bus options"
diff --git a/arch/sh/include/asm/setup.h b/arch/sh/include/asm/setup.h
index fc807011187f..84bb23a771f3 100644
--- a/arch/sh/include/asm/setup.h
+++ b/arch/sh/include/asm/setup.h
@@ -21,5 +21,6 @@
void sh_mv_setup(void);
void check_for_initrd(void);
void per_cpu_trap_init(void);
+void sh_fdt_init(phys_addr_t dt_phys);
#endif /* _SH_SETUP_H */
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 620e5cf8ae1e..42e6292a40cf 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -30,6 +30,7 @@
#include <linux/memblock.h>
#include <linux/of.h>
#include <linux/of_fdt.h>
+#include <linux/libfdt.h>
#include <linux/uaccess.h>
#include <uapi/linux/mount.h>
#include <asm/io.h>
@@ -269,8 +270,22 @@ void __ref sh_fdt_init(phys_addr_t dt_phys)
void __init setup_arch(char **cmdline_p)
{
+#if defined(CONFIG_OF) && defined(CONFIG_OF_EARLY_FLATTREE)
+ if (IS_ENABLED(CONFIG_USE_BUILTIN_DTB)) {
+ /* Relocate Embedded DTB */
+ unflatten_and_copy_device_tree();
+ } else if (initial_boot_params) {
+ /* Reserve external DTB area */
+ memblock_reserve(__pa(initial_boot_params),
+ fdt_totalsize(initial_boot_params));
+ unflatten_device_tree();
+ }
+ /* copy from /chosen/bootargs */
+ strscpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
+#endif
enable_mmu();
+#ifndef CONFIG_OF
ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
printk(KERN_NOTICE "Boot params:\n"
@@ -299,14 +314,17 @@ void __init setup_arch(char **cmdline_p)
bss_resource.start = virt_to_phys(__bss_start);
bss_resource.end = virt_to_phys(__bss_stop)-1;
-#ifdef CONFIG_CMDLINE_OVERWRITE
- strscpy(command_line, CONFIG_CMDLINE, sizeof(command_line));
-#else
- strscpy(command_line, COMMAND_LINE, sizeof(command_line));
+#endif
+#if !defined(CONFIG_OF) || defined(CONFIG_USE_BUILTIN_DTB)
+ if (*COMMAND_LINE)
+ strscpy(command_line, COMMAND_LINE, sizeof(command_line));
+#endif
+ if (*command_line == '\0' || IS_ENABLED(CONFIG_CMDLINE_OVERWRITE))
+ /* Use built-in parameter */
+ strscpy(command_line, CONFIG_CMDLINE, sizeof(command_line));
#ifdef CONFIG_CMDLINE_EXTEND
strlcat(command_line, " ", sizeof(command_line));
strlcat(command_line, CONFIG_CMDLINE, sizeof(command_line));
-#endif
#endif
/* Save unparsed command line copy for /proc/cmdline */
@@ -322,14 +340,6 @@ void __init setup_arch(char **cmdline_p)
/* Let earlyprintk output early console messages */
sh_early_platform_driver_probe("earlyprintk", 1, 1);
-#ifdef CONFIG_OF_EARLY_FLATTREE
-#ifdef CONFIG_USE_BUILTIN_DTB
- unflatten_and_copy_device_tree();
-#else
- unflatten_device_tree();
-#endif
-#endif
-
paging_init();
/* Perform the machine specific initialisation */
--
2.39.2
^ permalink raw reply related
* [RESEND v7 07/37] sh: Fix COMMON_CLK support in CONFIG_OF=y.
From: Yoshinori Sato @ 2024-04-04 5:14 UTC (permalink / raw)
To: linux-sh
Cc: Yoshinori Sato, Damien Le Moal, Niklas Cassel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Michael Turquette, Stephen Boyd, David Airlie, Daniel Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Thomas Gleixner, Bjorn Helgaas, Lorenzo Pieralisi,
Krzysztof Wilczyński, Greg Kroah-Hartman, Jiri Slaby,
Magnus Damm, Daniel Lezcano, Rich Felker,
John Paul Adrian Glaubitz, Lee Jones, Helge Deller,
Heiko Stuebner, Shawn Guo, Sebastian Reichel, Chris Morgan,
Linus Walleij, Arnd Bergmann, David Rientjes, Hyeonggon Yoo,
Vlastimil Babka, Baoquan He, Andrew Morton, Guenter Roeck,
Kefeng Wang, Stephen Rothwell, Javier Martinez Canillas, Guo Ren,
Azeem Shaikh, Max Filippov, Jonathan Corbet, Jacky Huang,
Herve Codina, Manikanta Guntupalli, Anup Patel, Biju Das,
Uwe Kleine-König, Sam Ravnborg, Sergey Shtylyov,
Laurent Pinchart, linux-ide, devicetree, linux-kernel,
linux-renesas-soc, linux-clk, dri-devel, linux-pci, linux-serial,
linux-fbdev
In-Reply-To: <cover.1712207606.git.ysato@users.sourceforge.jp>
Initialize the clock and timer using the COMMON_CLK procedure.
sh's earlytimer mechanism doesn't work properly in OF,
so timer initialization is delayed.
If CONFIG_OF=y, perform the general timer initialization procedure.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boards/of-generic.c | 28 ++++------------------------
arch/sh/kernel/time.c | 12 ++++++++++++
2 files changed, 16 insertions(+), 24 deletions(-)
diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
index f7f3e618e85b..f1ca5a914c11 100644
--- a/arch/sh/boards/of-generic.c
+++ b/arch/sh/boards/of-generic.c
@@ -8,6 +8,7 @@
#include <linux/of.h>
#include <linux/of_clk.h>
#include <linux/of_fdt.h>
+#include <linux/of_platform.h>
#include <linux/clocksource.h>
#include <linux/irqchip.h>
#include <asm/machvec.h>
@@ -98,16 +99,7 @@ static void sh_of_smp_probe(void)
#endif
-static void noop(void)
-{
-}
-
-static int noopi(void)
-{
- return 0;
-}
-
-static void __init sh_of_mem_reserve(void)
+static void __init sh_of_mem_init(void)
{
early_init_fdt_reserve_self();
early_init_fdt_scan_reserved_mem();
@@ -140,25 +132,13 @@ static void __init sh_of_init_irq(void)
irqchip_init();
}
-static int __init sh_of_clk_init(void)
-{
-#ifdef CONFIG_COMMON_CLK
- /* Disabled pending move to COMMON_CLK framework. */
- pr_info("SH generic board support: scanning for clk providers\n");
- of_clk_init(NULL);
-#endif
- return 0;
-}
-
static struct sh_machine_vector __initmv sh_of_generic_mv = {
.mv_setup = sh_of_setup,
.mv_name = "devicetree", /* replaced by DT root's model */
.mv_irq_demux = sh_of_irq_demux,
.mv_init_irq = sh_of_init_irq,
- .mv_clk_init = sh_of_clk_init,
- .mv_mode_pins = noopi,
- .mv_mem_init = noop,
- .mv_mem_reserve = sh_of_mem_reserve,
+ .mv_mode_pins = generic_mode_pins,
+ .mv_mem_init = sh_of_mem_init,
};
struct sh_clk_ops;
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c
index 821a09cbd605..ce5b7c2f8628 100644
--- a/arch/sh/kernel/time.c
+++ b/arch/sh/kernel/time.c
@@ -19,7 +19,9 @@
#include <asm/clock.h>
#include <asm/rtc.h>
#include <asm/platform_early.h>
+#include <linux/of_clk.h>
+#ifndef CONFIG_SH_DEVICE_TREE
static void __init sh_late_time_init(void)
{
/*
@@ -43,3 +45,13 @@ void __init time_init(void)
late_time_init = sh_late_time_init;
}
+#else
+/* CONFIG_SH_DEVICE_TREE */
+void __init time_init(void)
+{
+ pr_info("SH generic board support: scanning for clk providers\n");
+
+ of_clk_init(NULL);
+ timer_probe();
+}
+#endif
--
2.39.2
^ permalink raw reply related
* [RESEND v7 08/37] clocksource: sh_tmu: CLOCKSOURCE support.
From: Yoshinori Sato @ 2024-04-04 5:14 UTC (permalink / raw)
To: linux-sh
Cc: Yoshinori Sato, Damien Le Moal, Niklas Cassel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Michael Turquette, Stephen Boyd, David Airlie, Daniel Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Thomas Gleixner, Bjorn Helgaas, Lorenzo Pieralisi,
Krzysztof Wilczyński, Greg Kroah-Hartman, Jiri Slaby,
Magnus Damm, Daniel Lezcano, Rich Felker,
John Paul Adrian Glaubitz, Lee Jones, Helge Deller,
Heiko Stuebner, Shawn Guo, Sebastian Reichel, Chris Morgan,
Linus Walleij, Arnd Bergmann, David Rientjes, Hyeonggon Yoo,
Vlastimil Babka, Baoquan He, Andrew Morton, Guenter Roeck,
Kefeng Wang, Stephen Rothwell, Javier Martinez Canillas, Guo Ren,
Azeem Shaikh, Max Filippov, Jonathan Corbet, Jacky Huang,
Herve Codina, Manikanta Guntupalli, Anup Patel, Biju Das,
Uwe Kleine-König, Sam Ravnborg, Sergey Shtylyov,
Laurent Pinchart, linux-ide, devicetree, linux-kernel,
linux-renesas-soc, linux-clk, dri-devel, linux-pci, linux-serial,
linux-fbdev
In-Reply-To: <cover.1712207606.git.ysato@users.sourceforge.jp>
Allows initialization as CLOCKSOURCE.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
drivers/clocksource/sh_tmu.c | 198 ++++++++++++++++++++++++-----------
1 file changed, 134 insertions(+), 64 deletions(-)
diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
index beffff81c00f..59f9da7fd987 100644
--- a/drivers/clocksource/sh_tmu.c
+++ b/drivers/clocksource/sh_tmu.c
@@ -17,6 +17,8 @@
#include <linux/irq.h>
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
#include <linux/platform_device.h>
#include <linux/pm_domain.h>
#include <linux/pm_runtime.h>
@@ -51,6 +53,7 @@ struct sh_tmu_channel {
struct sh_tmu_device {
struct platform_device *pdev;
+ struct device_node *np;
void __iomem *mapbase;
struct clk *clk;
@@ -65,6 +68,7 @@ struct sh_tmu_device {
bool has_clockevent;
bool has_clocksource;
+ const char *name;
};
#define TSTR -1 /* shared register */
@@ -148,8 +152,8 @@ static int __sh_tmu_enable(struct sh_tmu_channel *ch)
/* enable clock */
ret = clk_enable(ch->tmu->clk);
if (ret) {
- dev_err(&ch->tmu->pdev->dev, "ch%u: cannot enable clock\n",
- ch->index);
+ pr_err("%s ch%u: cannot enable clock\n",
+ ch->tmu->name, ch->index);
return ret;
}
@@ -174,9 +178,10 @@ static int sh_tmu_enable(struct sh_tmu_channel *ch)
if (ch->enable_count++ > 0)
return 0;
- pm_runtime_get_sync(&ch->tmu->pdev->dev);
- dev_pm_syscore_device(&ch->tmu->pdev->dev, true);
-
+ if (ch->tmu->pdev) {
+ pm_runtime_get_sync(&ch->tmu->pdev->dev);
+ dev_pm_syscore_device(&ch->tmu->pdev->dev, true);
+ }
return __sh_tmu_enable(ch);
}
@@ -202,8 +207,10 @@ static void sh_tmu_disable(struct sh_tmu_channel *ch)
__sh_tmu_disable(ch);
- dev_pm_syscore_device(&ch->tmu->pdev->dev, false);
- pm_runtime_put(&ch->tmu->pdev->dev);
+ if (ch->tmu->pdev) {
+ dev_pm_syscore_device(&ch->tmu->pdev->dev, false);
+ pm_runtime_put(&ch->tmu->pdev->dev);
+ }
}
static void sh_tmu_set_next(struct sh_tmu_channel *ch, unsigned long delta,
@@ -245,7 +252,7 @@ static irqreturn_t sh_tmu_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
-static struct sh_tmu_channel *cs_to_sh_tmu(struct clocksource *cs)
+static inline struct sh_tmu_channel *cs_to_sh_tmu(struct clocksource *cs)
{
return container_of(cs, struct sh_tmu_channel, cs);
}
@@ -292,7 +299,8 @@ static void sh_tmu_clocksource_suspend(struct clocksource *cs)
if (--ch->enable_count == 0) {
__sh_tmu_disable(ch);
- dev_pm_genpd_suspend(&ch->tmu->pdev->dev);
+ if (ch->tmu->pdev)
+ dev_pm_genpd_suspend(&ch->tmu->pdev->dev);
}
}
@@ -304,7 +312,8 @@ static void sh_tmu_clocksource_resume(struct clocksource *cs)
return;
if (ch->enable_count++ == 0) {
- dev_pm_genpd_resume(&ch->tmu->pdev->dev);
+ if (ch->tmu->pdev)
+ dev_pm_genpd_resume(&ch->tmu->pdev->dev);
__sh_tmu_enable(ch);
}
}
@@ -324,14 +333,14 @@ static int sh_tmu_register_clocksource(struct sh_tmu_channel *ch,
cs->mask = CLOCKSOURCE_MASK(32);
cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
- dev_info(&ch->tmu->pdev->dev, "ch%u: used as clock source\n",
- ch->index);
+ pr_info("%s ch%u: used as clock source\n",
+ ch->tmu->name, ch->index);
clocksource_register_hz(cs, ch->tmu->rate);
return 0;
}
-static struct sh_tmu_channel *ced_to_sh_tmu(struct clock_event_device *ced)
+static inline struct sh_tmu_channel *ced_to_sh_tmu(struct clock_event_device *ced)
{
return container_of(ced, struct sh_tmu_channel, ced);
}
@@ -364,8 +373,8 @@ static int sh_tmu_clock_event_set_state(struct clock_event_device *ced,
if (clockevent_state_oneshot(ced) || clockevent_state_periodic(ced))
sh_tmu_disable(ch);
- dev_info(&ch->tmu->pdev->dev, "ch%u: used for %s clock events\n",
- ch->index, periodic ? "periodic" : "oneshot");
+ pr_info("%s ch%u: used for %s clock events\n",
+ ch->tmu->name, ch->index, periodic ? "periodic" : "oneshot");
sh_tmu_clock_event_start(ch, periodic);
return 0;
}
@@ -417,20 +426,22 @@ static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch,
ced->set_state_shutdown = sh_tmu_clock_event_shutdown;
ced->set_state_periodic = sh_tmu_clock_event_set_periodic;
ced->set_state_oneshot = sh_tmu_clock_event_set_oneshot;
- ced->suspend = sh_tmu_clock_event_suspend;
- ced->resume = sh_tmu_clock_event_resume;
+ if (ch->tmu->pdev) {
+ ced->suspend = sh_tmu_clock_event_suspend;
+ ced->resume = sh_tmu_clock_event_resume;
+ }
- dev_info(&ch->tmu->pdev->dev, "ch%u: used for clock events\n",
- ch->index);
+ pr_info("%s ch%u: used for clock events\n",
+ ch->tmu->name, ch->index);
clockevents_config_and_register(ced, ch->tmu->rate, 0x300, 0xffffffff);
ret = request_irq(ch->irq, sh_tmu_interrupt,
IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
- dev_name(&ch->tmu->pdev->dev), ch);
+ ch->tmu->name, ch);
if (ret) {
- dev_err(&ch->tmu->pdev->dev, "ch%u: failed to request irq %d\n",
- ch->index, ch->irq);
+ pr_err("%s ch%u: failed to request irq %d\n",
+ ch->tmu->name, ch->index, ch->irq);
return;
}
}
@@ -465,28 +476,36 @@ static int sh_tmu_channel_setup(struct sh_tmu_channel *ch, unsigned int index,
else
ch->base = tmu->mapbase + 8 + ch->index * 12;
- ch->irq = platform_get_irq(tmu->pdev, index);
+ if (tmu->pdev)
+ ch->irq = platform_get_irq(tmu->pdev, index);
+ if (tmu->np)
+ ch->irq = of_irq_get(tmu->np, index);
+
if (ch->irq < 0)
return ch->irq;
ch->cs_enabled = false;
ch->enable_count = 0;
- return sh_tmu_register(ch, dev_name(&tmu->pdev->dev),
- clockevent, clocksource);
+ return sh_tmu_register(ch, tmu->name, clockevent, clocksource);
}
static int sh_tmu_map_memory(struct sh_tmu_device *tmu)
{
struct resource *res;
- res = platform_get_resource(tmu->pdev, IORESOURCE_MEM, 0);
- if (!res) {
- dev_err(&tmu->pdev->dev, "failed to get I/O memory\n");
- return -ENXIO;
+ if (tmu->pdev) {
+ res = platform_get_resource(tmu->pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ pr_err("sh_tmu failed to get I/O memory\n");
+ return -ENXIO;
+ }
+
+ tmu->mapbase = ioremap(res->start, resource_size(res));
}
+ if (tmu->np)
+ tmu->mapbase = of_iomap(tmu->np, 0);
- tmu->mapbase = ioremap(res->start, resource_size(res));
if (tmu->mapbase == NULL)
return -ENXIO;
@@ -495,7 +514,12 @@ static int sh_tmu_map_memory(struct sh_tmu_device *tmu)
static int sh_tmu_parse_dt(struct sh_tmu_device *tmu)
{
- struct device_node *np = tmu->pdev->dev.of_node;
+ struct device_node *np;
+
+ if (tmu->pdev)
+ np = tmu->pdev->dev.of_node;
+ if (tmu->np)
+ np = tmu->np;
tmu->model = SH_TMU;
tmu->num_channels = 3;
@@ -503,45 +527,19 @@ static int sh_tmu_parse_dt(struct sh_tmu_device *tmu)
of_property_read_u32(np, "#renesas,channels", &tmu->num_channels);
if (tmu->num_channels != 2 && tmu->num_channels != 3) {
- dev_err(&tmu->pdev->dev, "invalid number of channels %u\n",
- tmu->num_channels);
+ pr_err("%s: invalid number of channels %u\n",
+ tmu->name, tmu->num_channels);
return -EINVAL;
}
return 0;
}
-static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
+static int sh_tmu_setup(struct sh_tmu_device *tmu)
{
unsigned int i;
int ret;
- tmu->pdev = pdev;
-
- raw_spin_lock_init(&tmu->lock);
-
- if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
- ret = sh_tmu_parse_dt(tmu);
- if (ret < 0)
- return ret;
- } else if (pdev->dev.platform_data) {
- const struct platform_device_id *id = pdev->id_entry;
- struct sh_timer_config *cfg = pdev->dev.platform_data;
-
- tmu->model = id->driver_data;
- tmu->num_channels = hweight8(cfg->channels_mask);
- } else {
- dev_err(&tmu->pdev->dev, "missing platform data\n");
- return -ENXIO;
- }
-
- /* Get hold of clock. */
- tmu->clk = clk_get(&tmu->pdev->dev, "fck");
- if (IS_ERR(tmu->clk)) {
- dev_err(&tmu->pdev->dev, "cannot get clock\n");
- return PTR_ERR(tmu->clk);
- }
-
ret = clk_prepare(tmu->clk);
if (ret < 0)
goto err_clk_put;
@@ -557,7 +555,7 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
/* Map the memory resource. */
ret = sh_tmu_map_memory(tmu);
if (ret < 0) {
- dev_err(&tmu->pdev->dev, "failed to remap I/O memory\n");
+ pr_err("%s: failed to remap I/O memory\n", tmu->name);
goto err_clk_unprepare;
}
@@ -580,8 +578,6 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
goto err_unmap;
}
- platform_set_drvdata(pdev, tmu);
-
return 0;
err_unmap:
@@ -594,6 +590,39 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
return ret;
}
+static int sh_tmu_setup_pdev(struct sh_tmu_device *tmu, struct platform_device *pdev)
+{
+ int ret;
+
+ tmu->pdev = pdev;
+
+ raw_spin_lock_init(&tmu->lock);
+
+ if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
+ ret = sh_tmu_parse_dt(tmu);
+ if (ret < 0)
+ return ret;
+ } else if (pdev->dev.platform_data) {
+ const struct platform_device_id *id = pdev->id_entry;
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
+
+ tmu->model = id->driver_data;
+ tmu->num_channels = hweight8(cfg->channels_mask);
+ } else {
+ dev_err(&tmu->pdev->dev, "missing platform data\n");
+ return -ENXIO;
+ }
+
+ tmu->name = dev_name(&pdev->dev);
+ tmu->clk = clk_get(&tmu->pdev->dev, "fck");
+ if (IS_ERR(tmu->clk)) {
+ dev_err(&tmu->pdev->dev, "cannot get clock\n");
+ return PTR_ERR(tmu->clk);
+ }
+
+ return sh_tmu_setup(tmu);
+}
+
static int sh_tmu_probe(struct platform_device *pdev)
{
struct sh_tmu_device *tmu = platform_get_drvdata(pdev);
@@ -613,12 +642,13 @@ static int sh_tmu_probe(struct platform_device *pdev)
if (tmu == NULL)
return -ENOMEM;
- ret = sh_tmu_setup(tmu, pdev);
+ ret = sh_tmu_setup_pdev(tmu, pdev);
if (ret) {
kfree(tmu);
pm_runtime_idle(&pdev->dev);
return ret;
}
+ platform_set_drvdata(pdev, tmu);
if (is_sh_early_platform_device(pdev))
return 0;
@@ -632,6 +662,45 @@ static int sh_tmu_probe(struct platform_device *pdev)
return 0;
}
+static int sh_tmu_setup_of(struct sh_tmu_device *tmu, struct device_node *np)
+{
+ int ret;
+
+ tmu->np = np;
+ raw_spin_lock_init(&tmu->lock);
+
+ ret = sh_tmu_parse_dt(tmu);
+ if (ret < 0)
+ return ret;
+
+ tmu->clk = of_clk_get(np, 0);
+ tmu->name = of_node_full_name(np);
+
+ if (IS_ERR(tmu->clk)) {
+ pr_err("%pOF: cannot get clock\n", np);
+ return PTR_ERR(tmu->clk);
+ }
+
+ return sh_tmu_setup(tmu);
+}
+
+static int __init sh_tmu_of_register(struct device_node *np)
+{
+ struct sh_tmu_device *tmu;
+ int ret;
+
+ tmu = kzalloc(sizeof(*tmu), GFP_KERNEL);
+ if (tmu == NULL)
+ return -ENOMEM;
+
+ ret = sh_tmu_setup_of(tmu, np);
+ if (ret) {
+ kfree(tmu);
+ pr_warn("%pOF: Timer register failed (%d)", np, ret);
+ }
+ return ret;
+}
+
static const struct platform_device_id sh_tmu_id_table[] = {
{ "sh-tmu", SH_TMU },
{ "sh-tmu-sh3", SH_TMU_SH3 },
@@ -665,6 +734,7 @@ static void __exit sh_tmu_exit(void)
platform_driver_unregister(&sh_tmu_device_driver);
}
+TIMER_OF_DECLARE(sh_tmu, "renesas,tmu", sh_tmu_of_register);
#ifdef CONFIG_SUPERH
sh_early_platform_init("earlytimer", &sh_tmu_device_driver);
#endif
--
2.39.2
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