* [PATCH 0/3] Fix up qcom,halt-regs definition in various schemas
From: Luca Weiss @ 2024-04-07 9:58 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Mathieu Poirier, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel,
Luca Weiss
The original motivation is that a bunch of other schemas fail to
validate qcom,halt-regs, for example like in the following examples:
arch/arm64/boot/dts/qcom/apq8016-sbc.dtb: remoteproc@4080000: qcom,halt-regs:0: [20] is too short
from schema $id: http://devicetree.org/schemas/remoteproc/qcom,msm8916-mss-pil.yaml#
arch/arm64/boot/dts/qcom/apq8096-ifc6640.dtb: remoteproc@2080000: qcom,halt-regs:0: [82] is too short
from schema $id: http://devicetree.org/schemas/remoteproc/qcom,msm8996-mss-pil.yaml#
arch/arm64/boot/dts/qcom/apq8039-t2.dtb: remoteproc@4080000: qcom,halt-regs:0: [32] is too short
from schema $id: http://devicetree.org/schemas/remoteproc/qcom,msm8916-mss-pil.yaml#
While I'm actually not quite sure why these patches fix this in
the other schemas - feels like a bug/limitation in dt-schema maybe? -
the patches should be correct anyways to validate qcom,halt-regs in the
schemas I'm touching.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Luca Weiss (3):
dt-bindings: remoteproc: qcom,qcs404-cdsp-pil: Fix qcom,halt-regs definition
dt-bindings: remoteproc: qcom,sc7280-wpss-pil: Fix qcom,halt-regs definition
dt-bindings: remoteproc: qcom,sdm845-adsp-pil: Fix qcom,halt-regs definition
.../devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml | 6 +++++-
.../devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml | 6 +++++-
.../devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml | 6 +++++-
3 files changed, 15 insertions(+), 3 deletions(-)
---
base-commit: 8568bb2ccc278f344e6ac44af6ed010a90aa88dc
change-id: 20240407-qcom-halt-regs-fixup-2c6cce9734e4
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply
* [PATCH 1/3] dt-bindings: remoteproc: qcom,qcs404-cdsp-pil: Fix qcom,halt-regs definition
From: Luca Weiss @ 2024-04-07 9:58 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Mathieu Poirier, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel,
Luca Weiss
In-Reply-To: <20240407-qcom-halt-regs-fixup-v1-0-a0ea4e2c178e@z3ntu.xyz>
Set the 'items' correctly for the qcom,halt-regs property and update the
description to match what it should be.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
.../devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml
index 06f5f93f62a9..bca59394aef4 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml
@@ -81,7 +81,11 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
Phandle reference to a syscon representing TCSR followed by the
- three offsets within syscon for q6, modem and nc halt registers.
+ offset within syscon for q6 halt register.
+ items:
+ - items:
+ - description: phandle to TCSR syscon region
+ - description: offset to the Q6 halt register
qcom,smem-states:
$ref: /schemas/types.yaml#/definitions/phandle-array
--
2.44.0
^ permalink raw reply related
* [PATCH 2/3] dt-bindings: remoteproc: qcom,sc7280-wpss-pil: Fix qcom,halt-regs definition
From: Luca Weiss @ 2024-04-07 9:58 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Mathieu Poirier, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel,
Luca Weiss
In-Reply-To: <20240407-qcom-halt-regs-fixup-v1-0-a0ea4e2c178e@z3ntu.xyz>
Set the 'items' correctly for the qcom,halt-regs property and update the
description to match what it should be.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
.../devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
index 9381c7022ff4..f4118b2da5f6 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
@@ -89,7 +89,11 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
Phandle reference to a syscon representing TCSR followed by the
- three offsets within syscon for q6, modem and nc halt registers.
+ offset within syscon for q6 halt register.
+ items:
+ - items:
+ - description: phandle to TCSR syscon region
+ - description: offset to the Q6 halt register
qcom,qmp:
$ref: /schemas/types.yaml#/definitions/phandle
--
2.44.0
^ permalink raw reply related
* [PATCH 3/3] dt-bindings: remoteproc: qcom,sdm845-adsp-pil: Fix qcom,halt-regs definition
From: Luca Weiss @ 2024-04-07 9:58 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Mathieu Poirier, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel,
Luca Weiss
In-Reply-To: <20240407-qcom-halt-regs-fixup-v1-0-a0ea4e2c178e@z3ntu.xyz>
Set the 'items' correctly for the qcom,halt-regs property and update the
description to match what it should be.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
.../devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml
index 20df83a96ef3..a3c74871457f 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml
@@ -81,7 +81,11 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
Phandle reference to a syscon representing TCSR followed by the
- three offsets within syscon for q6, modem and nc halt registers.
+ offset within syscon for q6 halt register.
+ items:
+ - items:
+ - description: phandle to TCSR syscon region
+ - description: offset to the Q6 halt register
qcom,smem-states:
$ref: /schemas/types.yaml#/definitions/phandle-array
--
2.44.0
^ permalink raw reply related
* Re: [PATCH v4 1/2] dt-bindings: arm: qcom: Document the Samsung Galaxy Z Fold5
From: Alexandru Serdeliuc @ 2024-04-07 9:21 UTC (permalink / raw)
To: Krzysztof Kozlowski, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
In-Reply-To: <32b01e4e-dcdb-49bc-90bd-a75bb34c5b1b@linaro.org>
I am terribly sorry, this is my first patch sent here, I am still
trying to understand what and how to do it.
How to proceed with those missing tags? i should create a v5 and add them?
On 7/4/24 11:01, Krzysztof Kozlowski wrote:
> On 07/04/2024 07:38, Alexandru Marc Serdeliuc via B4 Relay wrote:
>> From: Alexandru Marc Serdeliuc <serdeliuk@yahoo.com>
>>
>> This documents Samsung Galaxy Z Fold5 (samsung,q5q)
>> which is a foldable phone by Samsung based on the sm8550 SoC.
>>
>> Signed-off-by: Alexandru Marc Serdeliuc <serdeliuk@yahoo.com>
>> ---
> This is a friendly reminder during the review process.
>
> It looks like you received a tag and forgot to add it.
>
> If you do not know the process, here is a short explanation:
> Please add Acked-by/Reviewed-by/Tested-by tags when posting new
> versions, under or above your Signed-off-by tag. Tag is "received", when
> provided in a message replied to you on the mailing list. Tools like b4
> can help here. However, there's no need to repost patches *only* to add
> the tags. The upstream maintainer will do that for tags received on the
> version they apply.
>
> https://elixir.bootlin.com/linux/v6.5-rc3/source/Documentation/process/submitting-patches.rst#L577
>
> If a tag was not added on purpose, please state why and what changed.
>
> Best regards,
> Krzysztof
>
^ permalink raw reply
* RE: [PATCH v2 1/6] dt-bindings: firmware: arm,scmi: set additionalProperties to true
From: Peng Fan @ 2024-04-07 10:04 UTC (permalink / raw)
To: Krzysztof Kozlowski, Peng Fan (OSS), Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Sudeep Holla,
Cristian Marussi
Cc: devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
In-Reply-To: <09f6b752-6b72-49d7-b248-6faba2fd13a7@kernel.org>
> Subject: Re: [PATCH v2 1/6] dt-bindings: firmware: arm,scmi: set
> additionalProperties to true
>
> On 07/04/2024 02:37, Peng Fan wrote:
> >> Subject: Re: [PATCH v2 1/6] dt-bindings: firmware: arm,scmi: set
> >> additionalProperties to true
> >>
> >> On 05/04/2024 14:39, Peng Fan (OSS) wrote:
> >>> From: Peng Fan <peng.fan@nxp.com>
> >>>
> >>> When adding vendor extension protocols, there is dt-schema warning:
> >>> "
> >>> imx,scmi.example.dtb: scmi: 'protocol@81', 'protocol@84' do not
> >>> match any of the regexes: 'pinctrl-[0-9]+'
> >>> "
> >>>
> >>> Set additionalProperties to true to address the issue.
> >>
> >> I do not see anything addressed here, except making the binding
> >> accepting anything anywhere...
> >
> > I not wanna add vendor protocols in arm,scmi.yaml, so will introduce a
> > new yaml imx.scmi.yaml which add i.MX SCMI protocol extension.
> >
> > With additionalProperties set to false, I not know how, please suggest.
>
> First of all, you cannot affect negatively existing devices (their
> bindings) and your patch does exactly that. This should make you thing what
> is the correct approach...
>
> Rob gave you the comment about missing compatible - you still did not
> address that.
I added the compatible in patch 2/6 in the examples "compatible = "arm,scmi";"
>
> You need common schema referenced in arm,scmi and your device specific
> schema, also using it.
ok, let me try to figure it out.
Thanks,
Peng.
>
>
> Best regards,
> Krzysztof
^ permalink raw reply
* Re: [RFC][PATCH 0/2] Amlogic T7 (A113D2) Clock Driver
From: Xianwei Zhao @ 2024-04-07 10:08 UTC (permalink / raw)
To: tanure
Cc: Yu Tu, Neil Armstrong, Kevin Hilman, Jerome Brunet,
Martin Blumenstingl, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Stephen Boyd, Michael Turquette, linux-arm-kernel,
linux-amlogic, devicetree, linux-kernel, linux-clk
In-Reply-To: <CAJX_Q+2wA+hNDhYtOsMi-DyuvH0KfkVgbsVFBFDj=Ph4fOEJaw@mail.gmail.com>
Hi Lucas,
Thanks for your reply.
On 2024/4/3 16:12, Lucas Tanure wrote:
> [ EXTERNAL EMAIL ]
>
> On Wed, Apr 3, 2024 at 7:44 AM Xianwei Zhao <xianwei.zhao@amlogic.com> wrote:
>>
>> Hi Lucas,
>> As we are preparing the T7 clock patchset, we would like to your
>> purpose and plan of this RFC patches. Are you going to submit these
>> patches at last?
>
> Hi Xianwei,
>
> I made some progress, and now the SD card controller probes but fails
> to read blocks from the SD card. I do think my port of the clock
> driver is okay, but I will not send my clock driver until the SD card
> fully works, so I am sure the clocking driver is tested.
> But if you have something already done, please send it, and I will
> test and review it from my side.
>
> Any help with the sdcard controller is also much appreciated.
> The SDCard part works well on our clock patchset. Then we will send the
formal clock submission later. What do you think?
> Thanks
> Lucas
>
>> On 2024/3/18 19:43, Lucas Tanure wrote:
>>> [ EXTERNAL EMAIL ]
>>>
>>> I am trying to port the T7 clock driver from Khadas 5.4 kernel for Vim4
>>> to mainline, but I am encountering some issues in the path.
>>>
>>> The kernel panics at clk_mux_val_to_index, but I believe that all the
>>> needed clocks are registered.
>>>
>>> If anyone from Amlogic or the community could help me understand what
>>> my driver is missing, that would be great.
>>> I will continue to try to figure out, but it has been some weeks
>>> without progress =/.
>>>
>>> Lucas Tanure (2):
>>> clk: meson: T7: add support for Amlogic T7 SoC PLL clock driver
>>> arm64: dts: amlogic: t7: SDCard, Ethernet and Clocking
>>>
>>> .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts | 66 +
>>> arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi | 189 +
>>> drivers/clk/meson/Kconfig | 25 +
>>> drivers/clk/meson/Makefile | 2 +
>>> drivers/clk/meson/t7-peripherals.c | 6368 +++++++++++++++++
>>> drivers/clk/meson/t7-peripherals.h | 131 +
>>> drivers/clk/meson/t7-pll.c | 1543 ++++
>>> drivers/clk/meson/t7-pll.h | 83 +
>>> .../clock/amlogic,t7-peripherals-clkc.h | 410 ++
>>> .../dt-bindings/clock/amlogic,t7-pll-clkc.h | 69 +
>>> 10 files changed, 8886 insertions(+)
>>> create mode 100644 drivers/clk/meson/t7-peripherals.c
>>> create mode 100644 drivers/clk/meson/t7-peripherals.h
>>> create mode 100644 drivers/clk/meson/t7-pll.c
>>> create mode 100644 drivers/clk/meson/t7-pll.h
>>> create mode 100644 include/dt-bindings/clock/amlogic,t7-peripherals-clkc.h
>>> create mode 100644 include/dt-bindings/clock/amlogic,t7-pll-clkc.h
>>>
>>> Starting kernel ...
>>>
>>> uboot time: 14277917 us
>>> boot 64bit kernel
>>> [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd092]
>>> [ 0.000000] Linux version 6.8.0-09793-gda876e5b54b3-dirty (tanureal@ryzen) (aarch64-none-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 10.3-2021.07 (arm-10.29)) 10.3.1 20210621, GNU ld (GNU Toolchain for the A-pr4
>>> [ 0.000000] KASLR disabled due to lack of seed
>>> [ 0.000000] Machine model: Khadas vim4
>>> [ 0.000000] efi: UEFI not found.
>>> [ 0.000000] OF: reserved mem: 0x0000000005000000..0x00000000052fffff (3072 KiB) nomap non-reusable secmon@5000000
>>> [ 0.000000] OF: reserved mem: 0x0000000005300000..0x00000000072fffff (32768 KiB) nomap non-reusable secmon@5300000
>>> [ 0.000000] NUMA: No NUMA configuration found
>>> [ 0.000000] NUMA: Faking a node at [mem 0x0000000000000000-0x00000000df7fffff]
>>> [ 0.000000] NUMA: NODE_DATA [mem 0xdf10c9c0-0xdf10efff]
>>> [ 0.000000] Zone ranges:
>>> [ 0.000000] DMA [mem 0x0000000000000000-0x00000000df7fffff]
>>> [ 0.000000] DMA32 empty
>>> [ 0.000000] Normal empty
>>> [ 0.000000] Movable zone start for each node
>>> [ 0.000000] Early memory node ranges
>>> [ 0.000000] node 0: [mem 0x0000000000000000-0x0000000004ffffff]
>>> [ 0.000000] node 0: [mem 0x0000000005000000-0x00000000072fffff]
>>> [ 0.000000] node 0: [mem 0x0000000007300000-0x00000000df7fffff]
>>> [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000df7fffff]
>>> [ 0.000000] On node 0, zone DMA: 2048 pages in unavailable ranges
>>> [ 0.000000] cma: Reserved 32 MiB at 0x00000000d9800000 on node -1
>>> [ 0.000000] psci: probing for conduit method from DT.
>>> [ 0.000000] psci: PSCIv1.0 detected in firmware.
>>> [ 0.000000] psci: Using standard PSCI v0.2 function IDs
>>> [ 0.000000] psci: Trusted OS migration not required
>>> [ 0.000000] psci: SMC Calling Convention v1.1
>>> [ 0.000000] percpu: Embedded 24 pages/cpu s58152 r8192 d31960 u98304
>>> [ 0.000000] Detected VIPT I-cache on CPU0
>>> [ 0.000000] CPU features: detected: Spectre-v2
>>> [ 0.000000] CPU features: detected: Spectre-v4
>>> [ 0.000000] CPU features: detected: Spectre-BHB
>>> [ 0.000000] CPU features: detected: ARM erratum 858921
>>> [ 0.000000] alternatives: applying boot alternatives
>>> [ 0.000000] Kernel command line: root=UUID=a91e7bfe-4263-4e53-867d-7824e7c6a992 rw rootfstype=ext4 console=ttyS0,921600 no_console_suspend earlycon=ttyS0,0xfe078000 khadas_board=VIM4 androidboot.selinux=permissive androidboot.0
>>> [ 0.000000] Unknown kernel command line parameters "khadas_board=VIM4", will be passed to user space.
>>> [ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
>>> [ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
>>> [ 0.000000] Fallback order for Node 0: 0
>>> [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 901152
>>> [ 0.000000] Policy zone: DMA
>>> [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
>>> [ 0.000000] software IO TLB: SWIOTLB bounce buffer size adjusted to 3MB
>>> [ 0.000000] software IO TLB: area num 8.
>>> [ 0.000000] software IO TLB: SWIOTLB bounce buffer size roundup to 4MB
>>> [ 0.000000] software IO TLB: mapped [mem 0x00000000d8e00000-0x00000000d9200000] (4MB)
>>> [ 0.000000] Memory: 3445944K/3661824K available (16896K kernel code, 4426K rwdata, 9184K rodata, 9728K init, 611K bss, 183112K reserved, 32768K cma-reserved)
>>> [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
>>> [ 0.000000] rcu: Preemptible hierarchical RCU implementation.
>>> [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
>>> [ 0.000000] Trampoline variant of Tasks RCU enabled.
>>> [ 0.000000] Tracing variant of Tasks RCU enabled.
>>> [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
>>> [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
>>> [ 0.000000] RCU Tasks: Setting shift to 3 and lim to 1 rcu_task_cb_adjust=1.
>>> [ 0.000000] RCU Tasks Trace: Setting shift to 3 and lim to 1 rcu_task_cb_adjust=1.
>>> [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
>>> [ 0.000000] GIC: GICv2 detected, but range too small and irqchip.gicv2_force_probe not set
>>> [ 0.000000] Root IRQ handler: gic_handle_irq
>>> [ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
>>> [ 0.000000] arch_timer: Enabling local workaround for ARM erratum 858921
>>> [ 0.000000] arch_timer: CPU0: Trapping CNTVCT access
>>> [ 0.000000] arch_timer: cp15 timer(s) running at 24.00MHz (phys).
>>> [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns
>>> [ 0.000000] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 4398046511097ns
>>> [ 0.000210] Console: colour dummy device 80x25
>>> [ 0.000253] Calibrating delay loop (skipped), value calculated using timer frequency.. 48.00 BogoMIPS (lpj=96000)
>>> [ 0.000261] pid_max: default: 32768 minimum: 301
>>> [ 0.000300] LSM: initializing lsm=capability
>>> [ 0.000358] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
>>> [ 0.000371] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
>>> [ 0.000920] cacheinfo: Unable to detect cache hierarchy for CPU 0
>>> [ 0.001389] rcu: Hierarchical SRCU implementation.
>>> [ 0.001391] rcu: Max phase no-delay instances is 1000.
>>> [ 0.001834] EFI services will not be available.
>>> [ 0.001999] smp: Bringing up secondary CPUs ...
>>> [ 0.002408] CPU features: detected: ARM erratum 845719
>>> [ 0.002426] Detected VIPT I-cache on CPU1
>>> [ 0.002516] CPU1: Booted secondary processor 0x0000000100 [0x410fd034]
>>> [ 0.003007] Detected VIPT I-cache on CPU2
>>> [ 0.003054] CPU2: Booted secondary processor 0x0000000101 [0x410fd034]
>>> [ 0.003497] Detected VIPT I-cache on CPU3
>>> [ 0.003546] CPU3: Booted secondary processor 0x0000000102 [0x410fd034]
>>> [ 0.003988] Detected VIPT I-cache on CPU4
>>> [ 0.004038] CPU4: Booted secondary processor 0x0000000103 [0x410fd034]
>>> [ 0.004472] Detected VIPT I-cache on CPU5
>>> [ 0.004509] arch_timer: Enabling local workaround for ARM erratum 858921
>>> [ 0.004519] arch_timer: CPU5: Trapping CNTVCT access
>>> [ 0.004527] CPU5: Booted secondary processor 0x0000000001 [0x410fd092]
>>> [ 0.004915] Detected VIPT I-cache on CPU6
>>> [ 0.004940] arch_timer: Enabling local workaround for ARM erratum 858921
>>> [ 0.004946] arch_timer: CPU6: Trapping CNTVCT access
>>> [ 0.004951] CPU6: Booted secondary processor 0x0000000002 [0x410fd092]
>>> [ 0.005333] Detected VIPT I-cache on CPU7
>>> [ 0.005358] arch_timer: Enabling local workaround for ARM erratum 858921
>>> [ 0.005364] arch_timer: CPU7: Trapping CNTVCT access
>>> [ 0.005369] CPU7: Booted secondary processor 0x0000000003 [0x410fd092]
>>> [ 0.005414] smp: Brought up 1 node, 8 CPUs
>>> [ 0.005419] SMP: Total of 8 processors activated.
>>> [ 0.005421] CPU: All CPU(s) started at EL2
>>> [ 0.005434] CPU features: detected: 32-bit EL0 Support
>>> [ 0.005437] CPU features: detected: 32-bit EL1 Support
>>> [ 0.005440] CPU features: detected: CRC32 instructions
>>> [ 0.005485] alternatives: applying system-wide alternatives
>>> [ 0.006730] devtmpfs: initialized
>>> [ 0.008534] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
>>> [ 0.008545] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
>>> [ 0.008989] pinctrl core: initialized pinctrl subsystem
>>> [ 0.009581] DMI not present or invalid.
>>> [ 0.011290] NET: Registered PF_NETLINK/PF_ROUTE protocol family
>>> [ 0.011944] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
>>> [ 0.012293] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
>>> [ 0.012711] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
>>> [ 0.012832] audit: initializing netlink subsys (disabled)
>>> [ 0.013075] audit: type=2000 audit(0.012:1): state=initialized audit_enabled=0 res=1
>>> [ 0.013508] thermal_sys: Registered thermal governor 'step_wise'
>>> [ 0.013512] thermal_sys: Registered thermal governor 'power_allocator'
>>> [ 0.013557] cpuidle: using governor menu
>>> [ 0.013675] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
>>> [ 0.013784] ASID allocator initialised with 65536 entries
>>> [ 0.014630] Serial: AMBA PL011 UART driver
>>> [ 0.017553] Modules: 22496 pages in range for non-PLT usage
>>> [ 0.017556] Modules: 514016 pages in range for PLT usage
>>> [ 0.017980] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
>>> [ 0.017984] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
>>> [ 0.017988] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
>>> [ 0.017990] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
>>> [ 0.017993] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
>>> [ 0.017995] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
>>> [ 0.017997] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
>>> [ 0.018000] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
>>> [ 0.018247] Demotion targets for Node 0: null
>>> [ 0.018884] ACPI: Interpreter disabled.
>>> [ 0.019584] iommu: Default domain type: Translated
>>> [ 0.019587] iommu: DMA domain TLB invalidation policy: strict mode
>>> [ 0.019979] SCSI subsystem initialized
>>> [ 0.020174] usbcore: registered new interface driver usbfs
>>> [ 0.020187] usbcore: registered new interface driver hub
>>> [ 0.020200] usbcore: registered new device driver usb
>>> [ 0.020434] pps_core: LinuxPPS API ver. 1 registered
>>> [ 0.020437] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
>>> [ 0.020443] PTP clock support registered
>>> [ 0.020487] EDAC MC: Ver: 3.0.0
>>> [ 0.020717] scmi_core: SCMI protocol bus registered
>>> [ 0.021039] FPGA manager framework
>>> [ 0.021076] Advanced Linux Sound Architecture Driver Initialized.
>>> [ 0.021612] vgaarb: loaded
>>> [ 0.021857] clocksource: Switched to clocksource arch_sys_counter
>>> [ 0.021967] VFS: Disk quotas dquot_6.6.0
>>> [ 0.021984] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
>>> [ 0.022062] pnp: PnP ACPI: disabled
>>> [ 0.026651] NET: Registered PF_INET protocol family
>>> [ 0.026781] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
>>> [ 0.028598] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
>>> [ 0.028615] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
>>> [ 0.028622] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
>>> [ 0.028750] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
>>> [ 0.029019] TCP: Hash tables configured (established 32768 bind 32768)
>>> [ 0.029096] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
>>> [ 0.029124] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
>>> [ 0.029225] NET: Registered PF_UNIX/PF_LOCAL protocol family
>>> [ 0.029506] RPC: Registered named UNIX socket transport module.
>>> [ 0.029510] RPC: Registered udp transport module.
>>> [ 0.029512] RPC: Registered tcp transport module.
>>> [ 0.029513] RPC: Registered tcp-with-tls transport module.
>>> [ 0.029515] RPC: Registered tcp NFSv4.1 backchannel transport module.
>>> [ 0.029524] PCI: CLS 0 bytes, default 64
>>> [ 0.029649] Unpacking initramfs...
>>> [ 0.033933] kvm [1]: IPA Size Limit: 40 bits
>>> [ 0.034713] kvm [1]: Hyp mode initialized successfully
>>> [ 0.035476] Initialise system trusted keyrings
>>> [ 0.035582] workingset: timestamp_bits=42 max_order=20 bucket_order=0
>>> [ 0.035747] squashfs: version 4.0 (2009/01/31) Phillip Lougher
>>> [ 0.035906] NFS: Registering the id_resolver key type
>>> [ 0.035919] Key type id_resolver registered
>>> [ 0.035922] Key type id_legacy registered
>>> [ 0.035933] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
>>> [ 0.035935] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
>>> [ 0.036031] 9p: Installing v9fs 9p2000 file system support
>>> [ 0.062587] Key type asymmetric registered
>>> [ 0.062596] Asymmetric key parser 'x509' registered
>>> [ 0.062657] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245)
>>> [ 0.062661] io scheduler mq-deadline registered
>>> [ 0.062664] io scheduler kyber registered
>>> [ 0.062688] io scheduler bfq registered
>>> [ 0.063318] irq_meson_gpio: 157 to 12 gpio interrupt mux initialized
>>> [ 0.068061] EINJ: ACPI disabled.
>>> [ 0.072570] amlogic_t7_pll_probe
>>> [ 0.072855] amlogic_t7_pll_probe ret 0
>>> [ 0.072943] amlogic_a1_periphs_probe
>>> [ 0.078155] amlogic_a1_periphs_probe ret 0
>>> [ 0.084876] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
>>> [ 0.086691] fe078000.serial: ttyS0 at MMIO 0xfe078000 (irq = 14, base_baud = 1500000) is a meson_uart
>>> [ 0.086710] printk: legacy console [ttyS0] enabled
>>> [ 0.229167] sysfs: cannot create duplicate filename '/class/tty/ttyS0'
>>> [ 0.229669] CPU: 3 PID: 1 Comm: swapper/0 Not tainted 6.8.0-09793-gda876e5b54b3-dirty #15
>>> [ 0.230684] Hardware name: Khadas vim4 (DT)
>>> [ 0.231205] Call trace:
>>> [ 0.231509] dump_backtrace+0x94/0xec
>>> [ 0.231963] show_stack+0x18/0x24
>>> [ 0.232374] dump_stack_lvl+0x78/0x90
>>> [ 0.232829] dump_stack+0x18/0x24
>>> [ 0.233241] sysfs_warn_dup+0x64/0x80
>>> [ 0.233696] sysfs_do_create_link_sd+0xf0/0xf8
>>> [ 0.234248] sysfs_create_link+0x20/0x40
>>> [ 0.234736] device_add+0x27c/0x77c
>>> [ 0.235169] device_register+0x20/0x30
>>> [ 0.235635] tty_register_device_attr+0xfc/0x240
>>> [ 0.236209] tty_port_register_device_attr_serdev+0x8c/0xac
>>> [ 0.236902] serial_core_register_port+0x318/0x658
>>> [ 0.237498] serial_ctrl_register_port+0x10/0x1c
>>> [ 0.238072] uart_add_one_port+0x10/0x1c
>>> [ 0.238560] meson_uart_probe+0x2c0/0x3b4
>>> [ 0.239058] platform_probe+0x68/0xd8
>>> [ 0.239513] really_probe+0x148/0x2b4
>>> [ 0.239968] __driver_probe_device+0x78/0x12c
>>> [ 0.240510] driver_probe_device+0xdc/0x160
>>> [ 0.241030] __driver_attach+0x94/0x19c
>>> [ 0.241507] bus_for_each_dev+0x74/0xd4
>>> [ 0.241983] driver_attach+0x24/0x30
>>> [ 0.242428] bus_add_driver+0xe4/0x1e8
>>> [ 0.242893] driver_register+0x60/0x128
>>> [ 0.243370] __platform_driver_register+0x28/0x34
>>> [ 0.243955] meson_uart_platform_driver_init+0x1c/0x28
>>> [ 0.244594] do_one_initcall+0x6c/0x1b0
>>> [ 0.245071] kernel_init_freeable+0x1cc/0x294
>>> [ 0.245613] kernel_init+0x20/0x1dc
>>> [ 0.246046] ret_from_fork+0x10/0x20
>>> [ 0.246555] meson_uart fe078000.serial: Cannot register tty device on line 0
>>> [ 0.247729] msm_serial: driver initialized
>>> [ 0.248150] SuperH (H)SCI(F) driver initialized
>>> [ 0.248544] STM32 USART driver initialized
>>> [ 0.263927] loop: module loaded
>>> [ 0.264952] megasas: 07.727.03.00-rc1
>>> [ 0.271065] tun: Universal TUN/TAP device driver, 1.6
>>> [ 0.271824] thunder_xcv, ver 1.0
>>> [ 0.271878] thunder_bgx, ver 1.0
>>> [ 0.271956] nicpf, ver 1.0
>>> [ 0.273230] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
>>> [ 0.273437] hns3: Copyright (c) 2017 Huawei Corporation.
>>> [ 0.274148] hclge is initializing
>>> [ 0.274541] e1000: Intel(R) PRO/1000 Network Driver
>>> [ 0.275116] e1000: Copyright (c) 1999-2006 Intel Corporation.
>>> [ 0.275860] e1000e: Intel(R) PRO/1000 Network Driver
>>> [ 0.276449] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
>>> [ 0.277209] igb: Intel(R) Gigabit Ethernet Network Driver
>>> [ 0.277867] igb: Copyright (c) 2007-2014 Intel Corporation.
>>> [ 0.278576] igbvf: Intel(R) Gigabit Virtual Function Network Driver
>>> [ 0.279330] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
>>> [ 0.280319] sky2: driver version 1.30
>>> [ 0.281597] VFIO - User Level meta-driver version: 0.3
>>> [ 0.283859] usbcore: registered new interface driver usb-storage
>>> [ 0.286328] i2c_dev: i2c /dev entries driver
>>> [ 0.292404] sdhci: Secure Digital Host Controller Interface driver
>>> [ 0.292481] sdhci: Copyright(c) Pierre Ossman
>>> [ 0.293577] Synopsys Designware Multimedia Card Interface Driver
>>> [ 0.294572] sdhci-pltfm: SDHCI platform and OF driver helper
>>> [ 0.296259] ledtrig-cpu: registered to indicate activity on CPUs
>>> [ 0.298966] meson-sm: secure-monitor enabled
>>> [ 0.299963] usbcore: registered new interface driver usbhid
>>> [ 0.299997] usbhid: USB HID core driver
>>> [ 0.306803] NET: Registered PF_PACKET protocol family
>>> [ 0.306919] 9pnet: Installing 9P2000 support
>>> [ 0.307331] Key type dns_resolver registered
>>> [ 0.318926] Timer migration: 1 hierarchy levels; 8 children per group; 1 crossnode level
>>> [ 0.319462] registered taskstats version 1
>>> [ 0.319968] Loading compiled-in X.509 certificates
>>> [ 0.362771] clk: Disabling unused clocks
>>> [ 0.363100] PM: genpd: Disabling unused power domains
>>> [ 0.363383] ALSA device list:
>>> [ 0.363580] No soundcards found.
>>> [ 0.368194] meson-gx-mmc fe08a000.sd: Got CD GPIO
>>> [ 0.368524] SError Interrupt on CPU6, code 0x00000000bf000002 -- SError
>>> [ 0.368531] CPU: 6 PID: 87 Comm: kworker/u32:3 Not tainted 6.8.0-09793-gda876e5b54b3-dirty #15
>>> [ 0.368537] Hardware name: Khadas vim4 (DT)
>>> [ 0.368540] Workqueue: async async_run_entry_fn
>>> [ 0.368552] pstate: 20000005 (nzCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
>>> [ 0.368556] pc : clk_mux_val_to_index+0x0/0xc0
>>> [ 0.368565] lr : clk_mux_get_parent+0x4c/0x84
>>> [ 0.368571] sp : ffff800082efba10
>>> [ 0.368572] x29: ffff800082efba10 x28: ffff8000823279c0 x27: ffff800082327000
>>> [ 0.368578] x26: ffff000004c361c0 x25: 0000000000000000 x24: 0000000000000002
>>> [ 0.368584] x23: ffff000003f1d300 x22: ffff000003f1d2a0 x21: ffff000004c37280
>>> [ 0.368589] x20: ffff000004c36ec0 x19: ffff000004bba800 x18: 0000000000000020
>>> [ 0.368594] x17: ffff000000022000 x16: 0000000000000003 x15: ffffffffffffffff
>>> [ 0.368599] x14: ffffffffffffffff x13: 0078756d2364732e x12: 3030306138306566
>>> [ 0.368604] x11: 7f7f7f7f7f7f7f7f x10: ffff7fff83438910 x9 : 0000000000000005
>>> [ 0.368609] x8 : 0101010101010101 x7 : 0000000000000000 x6 : 05114367045e5359
>>> [ 0.368613] x5 : 0000000000000006 x4 : 0000000000000000 x3 : 0000000000000000
>>> [ 0.368618] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff000004c36ec0
>>> [ 0.368624] Kernel panic - not syncing: Asynchronous SError Interrupt
>>> [ 0.368626] CPU: 6 PID: 87 Comm: kworker/u32:3 Not tainted 6.8.0-09793-gda876e5b54b3-dirty #15
>>> [ 0.368630] Hardware name: Khadas vim4 (DT)
>>> [ 0.368631] Workqueue: async async_run_entry_fn
>>> [ 0.368635] Call trace:
>>> [ 0.368637] dump_backtrace+0x94/0xec
>>> [ 0.368644] show_stack+0x18/0x24
>>> [ 0.368649] dump_stack_lvl+0x38/0x90
>>> [ 0.368656] dump_stack+0x18/0x24
>>> [ 0.368661] panic+0x388/0x3c8
>>> [ 0.368666] nmi_panic+0x48/0x94
>>> [ 0.368670] arm64_serror_panic+0x6c/0x78
>>> [ 0.368674] do_serror+0x3c/0x78
>>> [ 0.368677] el1h_64_error_handler+0x30/0x48
>>> [ 0.368681] el1h_64_error+0x64/0x68
>>> [ 0.368684] clk_mux_val_to_index+0x0/0xc0
>>> [ 0.368689] __clk_register+0x440/0x82c
>>> [ 0.368693] devm_clk_register+0x5c/0xbc
>>> [ 0.368697] meson_mmc_clk_init+0x11c/0x2a8
>>> [ 0.368702] meson_mmc_probe+0x18c/0x3c0
>>> [ 0.368705] platform_probe+0x68/0xd8
>>> [ 0.368711] really_probe+0x148/0x2b4
>>> [ 0.368714] __driver_probe_device+0x78/0x12c
>>> [ 0.368718] driver_probe_device+0xdc/0x160
>>> [ 0.368721] __device_attach_driver+0xb8/0x134
>>> [ 0.368724] bus_for_each_drv+0x84/0xe0
>>> [ 0.368727] __device_attach_async_helper+0xac/0xd0
>>> [ 0.368730] async_run_entry_fn+0x34/0xe0
>>> [ 0.368734] process_one_work+0x150/0x294
>>> [ 0.368740] worker_thread+0x304/0x408
>>> [ 0.368744] kthread+0x118/0x11c
>>> [ 0.368748] ret_from_fork+0x10/0x20
>>> [ 0.368753] SMP: stopping secondary CPUs
>>> [ 0.368760] Kernel Offset: disabled
>>> [ 0.368761] CPU features: 0x0,00000060,d0080000,0200421b
>>> [ 0.368765] Memory Limit: none
>>> [ 0.400328] ---[ end Kernel panic - not syncing: Asynchronous SError Interrupt ]---
>>>
>>>
>>> --
>>> 2.44.0
>>>
^ permalink raw reply
* RE: [PATCH v2 2/6] dt-bindings: firmware: add i.MX SCMI Extension protocol
From: Peng Fan @ 2024-04-07 10:15 UTC (permalink / raw)
To: Krzysztof Kozlowski, Peng Fan (OSS), Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Sudeep Holla,
Cristian Marussi
Cc: devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
In-Reply-To: <ca7f1e62-5f70-4aa5-b539-764b778a71e5@kernel.org>
> Subject: Re: [PATCH v2 2/6] dt-bindings: firmware: add i.MX SCMI Extension
> protocol
>
> On 07/04/2024 02:51, Peng Fan wrote:
> >> Subject: Re: [PATCH v2 2/6] dt-bindings: firmware: add i.MX SCMI
> >> Extension protocol
> >>
> >> On 05/04/2024 14:39, Peng Fan (OSS) wrote:
> >>> From: Peng Fan <peng.fan@nxp.com>
> >>>
> >>> Add i.MX SCMI Extension protocols bindings for:
> >>> - Battery Backed Secure Module(BBSM)
> >>
> >> Which is what?
> >
> > I should say BBM(BBSM + BBNSM), BBM has RTC and ON/OFF key features,
> > but BBM is managed by SCMI firmware and exported to agent by BBM
> > protocol. So add bindings for i.MX BBM protocol.
> >
> > Is this ok?
>
> No, I still don't know what is BBSM, BBNSM and BBM.
From RM:
The Battery Backup (BB) Domain contains the Battery Backed
Security Module (BBSM) and the Battery Backed Non-Secure
Module (BBNSM).
BBNSM:
The BBNSM is the interface to a non-interruptable power
supply (backup battery) and serves as the non-volatile logic
and storage for the chip. When the chip is powered off, the
BBNSM will maintain PMIC logic while connected to a backup supply.
Main features: RTC, PMIC Control, ONOFF Control
BBSM serves as nonvolatile security logic and storage for ELE
Main features: Monotonic counter, Secure RTC,
Zeroizable Master Key,
Security Violation and Tamper Detection
>
> >
> >>
> >>> - MISC settings such as General Purpose Registers settings.
> >>>
> >>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> >>> ---
> >>> .../devicetree/bindings/firmware/imx,scmi.yaml | 80
> >> ++++++++++++++++++++++
> >>> 1 file changed, 80 insertions(+)
> >>>
> >>> diff --git
> >>> a/Documentation/devicetree/bindings/firmware/imx,scmi.yaml
> >>> b/Documentation/devicetree/bindings/firmware/imx,scmi.yaml
> >>> new file mode 100644
> >>> index 000000000000..7ee19a661d83
> >>> --- /dev/null
> >>> +++ b/Documentation/devicetree/bindings/firmware/imx,scmi.yaml
> >>> @@ -0,0 +1,80 @@
> >>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) # Copyright
> >>> +2024 NXP %YAML 1.2
> >>> +---
> >>> +$id:
> >>> +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fde
> >>>
> +vi%2F&data=05%7C02%7Cpeng.fan%40nxp.com%7C410d9f1b5b874269dc6
> 908dc5
> >>>
> +6e0b628%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638480
> 77032584
> >>>
> +3394%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2l
> uMzIiLC
> >>>
> +JBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=e4zKRcyHbSCtn
> o6%2B%
> >>> +2BBaz%2FGhvPT0HikAdLmwi4VZxX4o%3D&reserved=0
> >>>
> >>
> +cetree.org%2Fschemas%2Ffirmware%2Fimx%2Cscmi.yaml%23&data=05%7
> >> C02%7Cp
> >>>
> >>
> +eng.fan%40nxp.com%7C5d16781d3eca425a342508dc562910b7%7C686ea
> >> 1d3bc2b4c
> >>>
> >>
> +6fa92cd99c5c301635%7C0%7C0%7C638479981570959816%7CUnknown%
> >> 7CTWFpbGZsb
> >>>
> >>
> +3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn
> >> 0%3D
> >>>
> >>
> +%7C0%7C%7C%7C&sdata=mWNwPvu2eyF18MroVOBHb%2Fjeo%2BIHfV5V
> >> h%2F9ebdx65MM
> >>> +%3D&reserved=0
> >>> +$schema:
> >>> +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fde
> >>>
> +vi%2F&data=05%7C02%7Cpeng.fan%40nxp.com%7C410d9f1b5b874269dc6
> 908dc5
> >>>
> +6e0b628%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638480
> 77032585
> >>>
> +6477%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2l
> uMzIiLC
> >>>
> +JBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=y1OBJ%2FPp4
> MljifpmG
> >>> +ZM%2FB6Ab20ivqm2qef7gzEjbNmA%3D&reserved=0
> >>> +cetree.org%2Fmeta-
> >> schemas%2Fcore.yaml%23&data=05%7C02%7Cpeng.fan%40nx
> >>>
> >>
> +p.com%7C5d16781d3eca425a342508dc562910b7%7C686ea1d3bc2b4c6fa
> >> 92cd99c5c
> >>>
> >>
> +301635%7C0%7C0%7C638479981570971949%7CUnknown%7CTWFpbGZs
> >> b3d8eyJWIjoiM
> >>>
> >>
> +C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7
> >> C%7C%7
> >>>
> >>
> +C&sdata=v4XnGG00D4I8j5MJvDUVYMRTm7yRrvz0V3fUyc5KAAA%3D&reser
> >> ved=0
> >>> +
> >>> +title: i.MX System Control and Management Interface(SCMI) Vendor
> >>> +Protocols Extension
> >>> +
> >>> +maintainers:
> >>> + - Peng Fan <peng.fan@nxp.com>
> >>> +
> >>> +allOf:
> >>> + - $ref: arm,scmi.yaml#
> >>
> >> Sorry, but arm,scmi is a final schema. Is your plan to define some
> >> common part?
> >
> > No. I just wanna add vendor extension per SCMI spec.
> >
> > 0x80-0xFF:
> > Reserved for vendor or platform-specific extensions to this interface
> >
> > Each vendor may have different usage saying id 0x81, so I add i.MX
> > dt-schema file.
> >
> >>
> >>> +
> >>> +properties:
> >>> + protocol@81:
> >>> + $ref: 'arm,scmi.yaml#/$defs/protocol-node'
> >>> + unevaluatedProperties: false
> >>> + description:
> >>> + The BBM Protocol is for managing Battery Backed Secure Module
> >> (BBSM) RTC
> >>> + and the ON/OFF Key
> >>> +
> >>> + properties:
> >>> + reg:
> >>> + const: 0x81
> >>> +
> >>> + required:
> >>> + - reg
> >>> +
> >>> + protocol@84:
> >>> + $ref: 'arm,scmi.yaml#/$defs/protocol-node'
> >>> + unevaluatedProperties: false
> >>> + description:
> >>> + The MISC Protocol is for managing SoC Misc settings, such as
> >>> + GPR settings
> >>
> >> Genera register is not a setting... this is a pleonasm. Please be
> >> more specific what is the GPR, MISC protocol etc.
> >
> > The MISC Protocol is for managing SoC Misc settings, such as SAI
> > MCLK/MQS in Always On domain BLK CTRL, SAI_CLK_SEL in WAKEUP BLK
> > CTRL, gpio expanders which is under control of SCMI firmware.
>
> So like a bag for everything which you do not want to call something specific?
>
> No, be specific...
This is not linux stuff, this is i.MX SCMI firmware design.
Sadly there is no public RM for i.MX95, we could not afford each settings
has a protocol ID, it is too heavy. The name MISC is not developed for linux,
it is firmware owner decided to use it.
>
> >
> >>> +
> >>> + properties:
> >>> + reg:
> >>> + const: 0x84
> >>> +
> >>> + wakeup-sources:
> >>> + description:
> >>> + Each entry consists of 2 integers, represents the source
> >>> + and electric signal edge
> >>
> >> Can you answer questions from reviewers?
> >
> > Sorry. Is this ok?
> > minItems: 1
> > maxItems: 32
>
> No. Does it answers Rob's question? I see zero correlation to his question.
Constraints and edge, right? Edge, I have use electric signal edge, so
what else?
>
> Do not ignore emails from reviewers but respond to them.
>
> >
> >>
> >>> + items:
> >>> + items:
> >>> + - description: the wakeup source
> >>> + - description: the wakeup electric signal edge
> >>> + $ref: /schemas/types.yaml#/definitions/uint32-matrix
> >>> +
> >>> + required:
> >>> + - reg
> >>> +
> >>> +additionalProperties: false
> >>> +
> >>> +examples:
> >>> + - |
> >>> + firmware {
> >>> + scmi {
> >>> + compatible = "arm,scmi";
> >>
> >>> + mboxes = <&mu2 5 0>, <&mu2 3 0>, <&mu2 3 1>;
> >>> + shmem = <&scmi_buf0>, <&scmi_buf1>;
> >>> +
> >>> + #address-cells = <1>;
> >>> + #size-cells = <0>;
> >>> +
> >>> + protocol@81 {
> >>> + reg = <0x81>;
> >>> + };
> >>> +
> >>> + protocol@84 {
> >>> + reg = <0x84>;
> >>> + wakeup-sources = <0x8000 1
> >>> + 0x8001 1
> >>> + 0x8002 1
> >>> + 0x8003 1
> >>> + 0x8004 1>;
> >>
> >> Nothing improved... If you are going to ignore reviews, then you will
> >> only get NAKed.
> >
> > Sorry, you mean the examples, or the whole dt-schema?
>
> *Read comments and respond to them*. Regardless where they are.
Yeah. My bad.
Thanks,
Peng
>
> Best regards,
> Krzysztof
^ permalink raw reply
* [PATCH 1/3] dt-bindings: PCI: cdns,cdns-pcie-host: drop redundant msi-parent and pci-bus.yaml
From: Krzysztof Kozlowski @ 2024-04-07 10:19 UTC (permalink / raw)
To: Bjorn Helgaas, Lorenzo Pieralisi, Krzysztof Wilczyński,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Hector Martin,
Sven Peter, Alyssa Rosenzweig, Ray Jui, Scott Branden,
Broadcom internal kernel review list, Jim Quinlan,
Nicolas Saenz Julienne, Florian Fainelli, Will Deacon,
Linus Walleij, Srikanth Thokala, Ryder Lee, Jianjun Wang,
Sergio Paracuellos, Matthias Brugger, AngeloGioacchino Del Regno,
Daire McNamara, Bjorn Andersson, Konrad Dybcio, Marek Vasut,
Yoshihiro Shimoda, Shawn Lin, Heiko Stuebner, Jingoo Han,
Gustavo Pimentel, Manivannan Sadhasivam, Bharat Kumar Gogada,
Michal Simek, Geert Uytterhoeven, Magnus Damm, Neil Armstrong,
Mark Kettenis, Tom Joseph, Ahmad Zainie, Jiaxun Yang,
Kishon Vijay Abraham I, Thippeswamy Havalige, linux-pci,
devicetree, linux-kernel, asahi, linux-arm-kernel,
linux-rpi-kernel, linux-mediatek, linux-arm-msm,
linux-renesas-soc, linux-rockchip
Cc: Krzysztof Kozlowski
The binding reference common cdns-pcie-host.yaml, which already defines
msi-parent and has a reference to pci-bus.yaml schema. Drop redundant
pieces here to make it a bit smaller.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml | 3 ---
1 file changed, 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
index bc3c48f60fff..a8190d9b100f 100644
--- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
@@ -10,7 +10,6 @@ maintainers:
- Tom Joseph <tjoseph@cadence.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
- $ref: cdns-pcie-host.yaml#
properties:
@@ -25,8 +24,6 @@ properties:
- const: reg
- const: cfg
- msi-parent: true
-
required:
- reg
- reg-names
--
2.34.1
^ permalink raw reply related
* [PATCH 2/3] dt-bindings: PCI: mediatek,mt7621: add missing child node reg
From: Krzysztof Kozlowski @ 2024-04-07 10:19 UTC (permalink / raw)
To: Bjorn Helgaas, Lorenzo Pieralisi, Krzysztof Wilczyński,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Hector Martin,
Sven Peter, Alyssa Rosenzweig, Ray Jui, Scott Branden,
Broadcom internal kernel review list, Jim Quinlan,
Nicolas Saenz Julienne, Florian Fainelli, Will Deacon,
Linus Walleij, Srikanth Thokala, Ryder Lee, Jianjun Wang,
Sergio Paracuellos, Matthias Brugger, AngeloGioacchino Del Regno,
Daire McNamara, Bjorn Andersson, Konrad Dybcio, Marek Vasut,
Yoshihiro Shimoda, Shawn Lin, Heiko Stuebner, Jingoo Han,
Gustavo Pimentel, Manivannan Sadhasivam, Bharat Kumar Gogada,
Michal Simek, Geert Uytterhoeven, Magnus Damm, Neil Armstrong,
Mark Kettenis, Tom Joseph, Ahmad Zainie, Jiaxun Yang,
Kishon Vijay Abraham I, Thippeswamy Havalige, linux-pci,
devicetree, linux-kernel, asahi, linux-arm-kernel,
linux-rpi-kernel, linux-mediatek, linux-arm-msm,
linux-renesas-soc, linux-rockchip
Cc: Krzysztof Kozlowski
In-Reply-To: <20240407102000.37213-1-krzysztof.kozlowski@linaro.org>
MT7621 PCI host bridge has children which apparently are also PCI host
bridges, at least that's what the binding suggest. The children have
"reg" property, but do not explicitly define it. Instead they rely on
pci-bus.yaml schema, but that one has "reg" without any constraints.
Define the "reg" for the children, so the binding will be more specific
and later will allow dropping reference to deprecated pci-bus.yaml
schema.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../devicetree/bindings/pci/mediatek,mt7621-pcie.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml b/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml
index e63e6458cea8..61d027239910 100644
--- a/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml
@@ -36,6 +36,9 @@ patternProperties:
$ref: /schemas/pci/pci-bus.yaml#
properties:
+ reg:
+ maxItems: 1
+
resets:
maxItems: 1
--
2.34.1
^ permalink raw reply related
* [PATCH 3/3] dt-bindings: PCI: host-bridges: switch from deprecated pci-bus.yaml
From: Krzysztof Kozlowski @ 2024-04-07 10:20 UTC (permalink / raw)
To: Bjorn Helgaas, Lorenzo Pieralisi, Krzysztof Wilczyński,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Hector Martin,
Sven Peter, Alyssa Rosenzweig, Ray Jui, Scott Branden,
Broadcom internal kernel review list, Jim Quinlan,
Nicolas Saenz Julienne, Florian Fainelli, Will Deacon,
Linus Walleij, Srikanth Thokala, Ryder Lee, Jianjun Wang,
Sergio Paracuellos, Matthias Brugger, AngeloGioacchino Del Regno,
Daire McNamara, Bjorn Andersson, Konrad Dybcio, Marek Vasut,
Yoshihiro Shimoda, Shawn Lin, Heiko Stuebner, Jingoo Han,
Gustavo Pimentel, Manivannan Sadhasivam, Bharat Kumar Gogada,
Michal Simek, Geert Uytterhoeven, Magnus Damm, Neil Armstrong,
Mark Kettenis, Tom Joseph, Ahmad Zainie, Jiaxun Yang,
Kishon Vijay Abraham I, Thippeswamy Havalige, linux-pci,
devicetree, linux-kernel, asahi, linux-arm-kernel,
linux-rpi-kernel, linux-mediatek, linux-arm-msm,
linux-renesas-soc, linux-rockchip
Cc: Krzysztof Kozlowski
In-Reply-To: <20240407102000.37213-1-krzysztof.kozlowski@linaro.org>
dtschema package with core schemas deprecated pci-bus.yaml schema in
favor of pci-host-bridge.yaml. Update all bindings to use the latter
one.
The difference between pci-bus.yaml and pci-host-bridge.yaml is only in
lack of "reg" property defined by the latter, which should not have any
effect here, because all these bindings define the "reg".
The change is therefore quite trivial, except mediatek,mt7621-pcie.yaml
binding which have children nodes being also host bridges, apparently.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml | 2 +-
Documentation/devicetree/bindings/pci/apple,pcie.yaml | 2 +-
Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml | 2 +-
Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml | 2 +-
Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml | 2 +-
Documentation/devicetree/bindings/pci/faraday,ftpci100.yaml | 2 +-
Documentation/devicetree/bindings/pci/host-generic-pci.yaml | 2 +-
Documentation/devicetree/bindings/pci/intel,ixp4xx-pci.yaml | 2 +-
Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml | 2 +-
Documentation/devicetree/bindings/pci/loongson.yaml | 2 +-
.../devicetree/bindings/pci/mediatek,mt7621-pcie.yaml | 4 ++--
Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml | 2 +-
.../devicetree/bindings/pci/microchip,pcie-host.yaml | 2 +-
Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml | 2 +-
Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 2 +-
Documentation/devicetree/bindings/pci/rcar-pci-host.yaml | 2 +-
.../devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml | 2 +-
.../devicetree/bindings/pci/rockchip,rk3399-pcie.yaml | 2 +-
Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml | 2 +-
Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml | 2 +-
Documentation/devicetree/bindings/pci/versatile.yaml | 2 +-
Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml | 2 +-
Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml | 2 +-
Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml | 2 +-
Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml | 2 +-
25 files changed, 26 insertions(+), 26 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml b/Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml
index a5bd90bc0712..79a21ba0f9fd 100644
--- a/Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml
@@ -13,7 +13,7 @@ description:
Amlogic Meson PCIe host controller is based on the Synopsys DesignWare PCI core.
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- $ref: /schemas/pci/snps,dw-pcie-common.yaml#
# We need a select here so we don't match all nodes with 'snps,dw-pcie'
diff --git a/Documentation/devicetree/bindings/pci/apple,pcie.yaml b/Documentation/devicetree/bindings/pci/apple,pcie.yaml
index 215ff9a9c835..c8775f9cb071 100644
--- a/Documentation/devicetree/bindings/pci/apple,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/apple,pcie.yaml
@@ -85,7 +85,7 @@ required:
unevaluatedProperties: false
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- $ref: /schemas/interrupt-controller/msi-controller.yaml#
- if:
properties:
diff --git a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml
index 0e07ab61a48d..5434c144d2ec 100644
--- a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml
@@ -11,7 +11,7 @@ maintainers:
- Scott Branden <scott.branden@broadcom.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
index 22491f7f8852..11f8ea33240c 100644
--- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
@@ -108,7 +108,7 @@ required:
- msi-controller
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- $ref: /schemas/interrupt-controller/msi-controller.yaml#
- if:
properties:
diff --git a/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml
index a6b494401ebb..f4eb82e684bd 100644
--- a/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml
@@ -10,7 +10,7 @@ maintainers:
- Tom Joseph <tjoseph@cadence.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- $ref: cdns-pcie.yaml#
properties:
diff --git a/Documentation/devicetree/bindings/pci/faraday,ftpci100.yaml b/Documentation/devicetree/bindings/pci/faraday,ftpci100.yaml
index 92efbf0f1297..378dd1c8e2ee 100644
--- a/Documentation/devicetree/bindings/pci/faraday,ftpci100.yaml
+++ b/Documentation/devicetree/bindings/pci/faraday,ftpci100.yaml
@@ -51,7 +51,7 @@ description: |
<0x6000 0 0 4 &pci_intc 2>;
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
index d25423aa7167..3484e0b4b412 100644
--- a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
+++ b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
@@ -116,7 +116,7 @@ required:
- ranges
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- if:
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/intel,ixp4xx-pci.yaml b/Documentation/devicetree/bindings/pci/intel,ixp4xx-pci.yaml
index debfb54a8042..3cae2e0f7f5e 100644
--- a/Documentation/devicetree/bindings/pci/intel,ixp4xx-pci.yaml
+++ b/Documentation/devicetree/bindings/pci/intel,ixp4xx-pci.yaml
@@ -12,7 +12,7 @@ maintainers:
description: PCI host controller found in the Intel IXP4xx SoC series.
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml b/Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml
index 505acc4f3efc..1fd557504b10 100644
--- a/Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml
@@ -11,7 +11,7 @@ maintainers:
- Srikanth Thokala <srikanth.thokala@intel.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/loongson.yaml b/Documentation/devicetree/bindings/pci/loongson.yaml
index a8324a9bd002..1988465e73a1 100644
--- a/Documentation/devicetree/bindings/pci/loongson.yaml
+++ b/Documentation/devicetree/bindings/pci/loongson.yaml
@@ -13,7 +13,7 @@ description: |+
PCI host controller found on Loongson PCHs and SoCs.
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml b/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml
index 61d027239910..5bbb4a3f3dbd 100644
--- a/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml
@@ -14,7 +14,7 @@ description: |+
with 3 Root Ports. Each Root Port supports a Gen1 1-lane Link
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
@@ -33,7 +33,7 @@ properties:
patternProperties:
'^pcie@[0-2],0$':
type: object
- $ref: /schemas/pci/pci-bus.yaml#
+ $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
reg:
diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
index 7e8c7a2a5f9b..76d742051f73 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
@@ -140,7 +140,7 @@ required:
- interrupt-controller
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- if:
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
index f7a3c2636355..a3c4ddc094aa 100644
--- a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
@@ -10,7 +10,7 @@ maintainers:
- Daire McNamara <daire.mcnamara@microchip.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- $ref: /schemas/interrupt-controller/msi-controller.yaml#
properties:
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml
index 0d1b23523f62..0a39bbfcb28b 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml
@@ -95,6 +95,6 @@ anyOf:
- msi-map
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
additionalProperties: true
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index cf9a6910b542..f867746b1ae5 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -130,7 +130,7 @@ anyOf:
- msi-map
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- if:
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml b/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml
index b6a7cb32f61e..210c3f2bf94c 100644
--- a/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml
+++ b/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml
@@ -12,7 +12,7 @@ maintainers:
- Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
allOf:
- - $ref: pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml b/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
index 5a0d64d3ae6b..b288cdb1ec70 100644
--- a/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
+++ b/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
@@ -110,7 +110,7 @@ required:
- "#interrupt-cells"
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- if:
properties:
diff --git a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml
index 002b728cbc71..720a5f945a4e 100644
--- a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml
@@ -10,7 +10,7 @@ maintainers:
- Shawn Lin <shawn.lin@rock-chips.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- $ref: rockchip,rk3399-pcie-common.yaml#
properties:
diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
index 022055edbf9e..548f59d76ef2 100644
--- a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
@@ -23,7 +23,7 @@ select:
- compatible
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- $ref: /schemas/pci/snps,dw-pcie-common.yaml#
- if:
not:
diff --git a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
index a20dccbafd94..695e491b7b3b 100644
--- a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
+++ b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
@@ -11,7 +11,7 @@ maintainers:
- Kishon Vijay Abraham I <kishon@ti.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/versatile.yaml b/Documentation/devicetree/bindings/pci/versatile.yaml
index 09748ef6b94f..294c7cd84b37 100644
--- a/Documentation/devicetree/bindings/pci/versatile.yaml
+++ b/Documentation/devicetree/bindings/pci/versatile.yaml
@@ -13,7 +13,7 @@ description: |+
PCI host controller found on the ARM Versatile PB board's FPGA.
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
index 4734be456bde..b75ceefa6f93 100644
--- a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
+++ b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
@@ -10,7 +10,7 @@ maintainers:
- Bharat Kumar Gogada <bharat.kumar.gogada@amd.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml b/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml
index 69b7decabd45..fb87b960a250 100644
--- a/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml
@@ -10,7 +10,7 @@ maintainers:
- Thippeswamy Havalige <thippeswamy.havalige@amd.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml
index 426f90a47f35..b0d07c71c1c0 100644
--- a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml
@@ -10,7 +10,7 @@ maintainers:
- Thippeswamy Havalige <thippeswamy.havalige@amd.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- $ref: /schemas/interrupt-controller/msi-controller.yaml#
properties:
diff --git a/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml b/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml
index 0aa00b8e49b3..2f59b3a73dd2 100644
--- a/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml
+++ b/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml
@@ -10,7 +10,7 @@ maintainers:
- Thippeswamy Havalige <thippeswamy.havalige@amd.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
--
2.34.1
^ permalink raw reply related
* [PATCH] arm64: dts: cavium: thunder2-99xx:: drop redundant reg-names
From: Krzysztof Kozlowski @ 2024-04-07 10:28 UTC (permalink / raw)
To: Robert Richter, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-kernel, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
There is no "reg-names" property in the PCI bindings and the value does
not conform to Devicetree coding style (upper-case letters, space), so
assume this was copied from downstream.
This fixes dtbs_check warning:
thunder2-99xx.dtb: pcie@30000000: Unevaluated properties are not allowed ('reg-names' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi b/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
index 3419bd252696..874d4d3a4e4f 100644
--- a/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
+++ b/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
@@ -103,7 +103,6 @@ pcie@30000000 {
/* ECAM at 0x3000_0000 - 0x4000_0000 */
reg = <0x0 0x30000000 0x0 0x10000000>;
- reg-names = "PCI ECAM";
/*
* PCI ranges:
--
2.34.1
^ permalink raw reply related
* [PATCH 1/4] arm64: dts: rockchip: drop redundant pcie-reset-suspend in Scarlet Dumo
From: Krzysztof Kozlowski @ 2024-04-07 10:28 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Cc: Krzysztof Kozlowski
There is no "pcie-reset-suspend" property in the PCI bindings or Linux
driver, so assume this was copied from downstream. Drop the property,
but leave the comment, because it might be useful for someone.
This fixes dtbs_check warning:
rk3399-gru-scarlet-dumo.dtb: pcie@f8000000: Unevaluated properties are not allowed ('pcie-reset-suspend' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
index 5846a11f0e84..b9d64048d46c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
@@ -689,7 +689,6 @@ &pcie0 {
ep-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
/* PERST# asserted in S3 */
- pcie-reset-suspend = <1>;
vpcie3v3-supply = <&wlan_3v3>;
vpcie1v8-supply = <&pp1800_pcie>;
--
2.34.1
^ permalink raw reply related
* [PATCH 2/4] arm64: dts: rockchip: drop redundant bus-scan-delay-ms in Pinebook
From: Krzysztof Kozlowski @ 2024-04-07 10:28 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240407102854.38672-1-krzysztof.kozlowski@linaro.org>
There is no "bus-scan-delay-ms" property in the PCI bindings or Linux
driver, so assume this was copied from downstream. This fixes
dtbs_check warning:
rk3399-pinebook-pro.dtb: pcie@f8000000: Unevaluated properties are not allowed ('bus-scan-delay-ms' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
index 054c6a4d1a45..294eb2de263d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
@@ -779,7 +779,6 @@ &pcie_phy {
};
&pcie0 {
- bus-scan-delay-ms = <1000>;
ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
num-lanes = <4>;
pinctrl-names = "default";
--
2.34.1
^ permalink raw reply related
* [PATCH 3/4] arm64: dts: rockchip: drop redundant disable-gpios in Lubancat 1
From: Krzysztof Kozlowski @ 2024-04-07 10:28 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240407102854.38672-1-krzysztof.kozlowski@linaro.org>
There is no "disable-gpios" property in the PCI bindings or Linux
driver, so assume this was copied from downstream. This property looks
like some real hardware, just described wrongly. Rockchip PCIe
controller (DesignWare based) does not define any other GPIO-s property,
except reset-gpios which is already there, so not sure what would be the
real property for this GPIO.
This fixes dtbs_check warning:
rk3566-lubancat-1.dtb: pcie@fe260000: Unevaluated properties are not allowed ('disable-gpios' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts b/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts
index 6ecdf5d28339..c1194d1e438d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts
@@ -447,7 +447,6 @@ rgmii_phy1: phy@0 {
&pcie2x1 {
reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
- disable-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};
--
2.34.1
^ permalink raw reply related
* [PATCH 4/4] arm64: dts: rockchip: drop redundant disable-gpios in Lubancat 2
From: Krzysztof Kozlowski @ 2024-04-07 10:28 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240407102854.38672-1-krzysztof.kozlowski@linaro.org>
There is no "disable-gpios" property in the PCI bindings or Linux
driver, so assume this was copied from downstream. This property looks
like some real hardware, just described wrongly. Rockchip PCIe
controller (DesignWare based) does not define any other GPIO-s property,
except reset-gpios which is already there, so not sure what would be the
real property for this GPIO.
This fixes dtbs_check warning:
rk3568-lubancat-2.dtb: pcie@fe260000: Unevaluated properties are not allowed ('disable-gpios' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts b/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts
index a8a4cc190eb3..a3112d5df200 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts
@@ -523,7 +523,6 @@ &pcie3x2 {
&pcie2x1 {
reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
- disable-gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_mini_pcie>;
status = "okay";
};
--
2.34.1
^ permalink raw reply related
* Re: [PATCH v4 2/2] arm64: dts: qcom: sm8550: Add support for Samsung Galaxy Z Fold5
From: Alexandru Serdeliuc @ 2024-04-07 10:03 UTC (permalink / raw)
To: Krzysztof Kozlowski, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
In-Reply-To: <d24628cf-a628-4eb1-ae2f-bf414b62534a@linaro.org>
Hi, please excuse my lack of knowledge, I am still trying to figure out
how to properly send a patch. Hopefully not wasting your time too much.
Here is what was changed, or I should send a v5 and add the
modifications to cover letter?
- v4
. removed a spurious new line
. removed pcie_1_phy_aux_clk as requested
. removed secondary pcie1 which does not exists on the device
. changed firmware extension from .mbn to .mdt
. added missing reserved memory regions required by firmware to
properly load
- v3
. added b4 version 3
. removed address and size cells in device description
- v2 added both but added an extra v2 in the subject line instead to b4
subject header, was requested to send the patch again, along with
following mods:
. removed whole bootargs line
. fixed underscores in reserved memory by removing all reserved
memory regions
. added missing idetation to spash_screen remark
. validated the dts with "dtbs_check"
. removed all comments at the end of nodes
. moved status of the node at the end of the node
. reversed pin control name with control numbers
. ordered the nodes alphabetically
- The initial request was split in two patches sent due to the following
checkpatch warning, was requested to re send them together:
WARNING: DT binding docs and includes should be a separate patch. See:
Documentation/devicetree/bindings/submitting-patches.rst
On 7/4/24 11:03, Krzysztof Kozlowski wrote:
> On 07/04/2024 07:38, Alexandru Marc Serdeliuc via B4 Relay wrote:
>> From: Alexandru Marc Serdeliuc <serdeliuk@yahoo.com>
>>
>> Add support for Samsung Galaxy Z Fold5 (q5q) foldable phone based on sm8550
>>
>> Currently working features:
>> - Framebuffer
>> - UFS
>> - i2c
>> - Buttons
>>
>> Signed-off-by: Alexandru Marc Serdeliuc <serdeliuk@yahoo.com>
>> ---
>> arch/arm64/boot/dts/qcom/Makefile | 1 +
> Where is the changelog? This is v4 and nothing (neither here nor in
> cover letter) explained what was happening with this patchset.
>
> Tags were ignored, so maybe comments as well?
>
> Please provide *full* and detailed changelog.
>
> Best regards,
> Krzysztof
>
^ permalink raw reply
* Re: [PATCH 2/4] arm64: dts: rockchip: drop redundant bus-scan-delay-ms in Pinebook
From: Dragan Simic @ 2024-04-07 10:34 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
In-Reply-To: <20240407102854.38672-2-krzysztof.kozlowski@linaro.org>
Hello Krzysztof,
On 2024-04-07 12:28, Krzysztof Kozlowski wrote:
> There is no "bus-scan-delay-ms" property in the PCI bindings or Linux
> driver, so assume this was copied from downstream. This fixes
> dtbs_check warning:
>
> rk3399-pinebook-pro.dtb: pcie@f8000000: Unevaluated properties are
> not allowed ('bus-scan-delay-ms' was unexpected)
Please note that it's been already deleted. [1]
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=43853e843aa6c3d47ff2b0cce898318839483d05
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
> b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
> index 054c6a4d1a45..294eb2de263d 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
> @@ -779,7 +779,6 @@ &pcie_phy {
> };
>
> &pcie0 {
> - bus-scan-delay-ms = <1000>;
> ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
> num-lanes = <4>;
> pinctrl-names = "default";
^ permalink raw reply
* Re: [PATCH v2 3/3] dt-bindings: kbuild: Add separate target/dependency for processed-schema.json
From: Conor Dooley @ 2024-04-07 10:59 UTC (permalink / raw)
To: Rob Herring
Cc: Krzysztof Kozlowski, Conor Dooley, Masahiro Yamada,
Nathan Chancellor, Nicolas Schier, Dmitry Baryshkov,
Marijn Suijten, devicetree, linux-kernel, linux-kbuild
In-Reply-To: <20240405-dt-kbuild-rework-v2-3-3a035caee357@kernel.org>
[-- Attachment #1: Type: text/plain, Size: 1162 bytes --]
On Fri, Apr 05, 2024 at 05:56:03PM -0500, Rob Herring wrote:
> Running dtbs_check and dt_compatible_check targets really only depend
> on processed-schema.json, but the dependency is 'dt_binding_check'. That
> was sort worked around with the CHECK_DT_BINDING variable in order to
> skip some of the work that 'dt_binding_check' does. It still runs the
> full checks of the schemas which is not necessary and adds 10s of
> seconds to the build time. That's significant when checking only a few
> DTBs and with recent changes that have improved the validation time by
> 6-7x.
>
> Add a new target, dt_binding_schema, which just builds
> processed-schema.json and can be used as the dependency for other
> targets. The scripts_dtc dependency isn't needed either as the examples
> aren't built for it.
>
> Signed-off-by: Rob Herring <robh@kernel.org>
Yoo, that's pretty nice. 20 seconds cut off my dtbs_check build time on
riscv with this change :) As you point out, when you're not checking all
that many it is pretty significant - 48 seconds before and 28 seconds now
Tested-by: Conor Dooley <conor.dooley@microchip.com>
Thanks,
Conor.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply
* Re: [PATCH v4 1/2] dt-bindings: arm: qcom: Document the Samsung Galaxy Z Fold5
From: Krzysztof Kozlowski @ 2024-04-07 11:08 UTC (permalink / raw)
To: Alexandru Serdeliuc, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
In-Reply-To: <46ca8527-8b3e-4894-a1ee-8f2663e457fb@yahoo.com>
On 07/04/2024 11:21, Alexandru Serdeliuc wrote:
> I am terribly sorry, this is my first patch sent here, I am still
> trying to understand what and how to do it.
>
> How to proceed with those missing tags? i should create a v5 and add them?
>
You need to add them. Please read the document I linked.
Best regards,
Krzysztof
^ permalink raw reply
* RE: [PATCH v2 4/6] firmware: arm_scmi: add initial support for i.MX MISC protocol
From: Peng Fan @ 2024-04-07 11:16 UTC (permalink / raw)
To: Marco Felsch
Cc: Peng Fan (OSS), Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Sudeep Holla, Cristian Marussi, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev
In-Reply-To: <20240407110208.4huirwif7as3dsps@pengutronix.de>
> Subject: Re: [PATCH v2 4/6] firmware: arm_scmi: add initial support for i.MX
> MISC protocol
>
> Hi Peng,
>
> On 24-04-07, Peng Fan wrote:
> > > Subject: Re: [PATCH v2 4/6] firmware: arm_scmi: add initial support
> > > for i.MX MISC protocol
> > >
> > > Hi Peng,
> > >
> > > On 24-04-05, Peng Fan (OSS) wrote:
> > > > From: Peng Fan <peng.fan@nxp.com>
> > > >
> > > > The i.MX MISC protocol is for misc settings, such as gpio expander
> > > > wakeup.
> > >
> > > Can you elaborate a bit more please?
> >
> > The gpio expander is under M33(SCMI firmware used core) I2C control,
>
> Due to missing technical references I guess that your specific EVK has an i2c-
> expander connected to the system-critical-i2c bus? The system-critical-i2c
> should be only used for system critical topics like PMIC control.
Right.
>
> > But the gpio expander supports board function such as PCIE_WAKEUP,
> > BTN_WAKEUP. So these are managed by MISC protocol.
>
> This seems more like an specific i.MX95-EVK problem too me since you have
> conneccted the i2c-gpio-expander to the system-critical-i2c bus instead of
> using an bus available within Linux. Also can you please provide me a link
> with the propsoal for the MISC protocol? I can't find any references within the
> SCMI v3.2
It is i.MX VENDOR Extension, not a standard one in Spec.
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdevelo
> per.arm.com%2Fdocumentation%2Fden0056%2Fe%2F&data=05%7C02%7Cp
> eng.fan%40nxp.com%7C6120357a772045a0618808dc56f22c95%7C686ea1d
> 3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638480845336536607%7CUnk
> nown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik
> 1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=NI%2F8WMPuGzJwD74
> 1jcuknHZUR5uI2me9iEeWbeDKshE%3D&reserved=0 nor within the SCP
> firmware git:
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub
> .com%2FARM-software%2FSCP-
> firmware&data=05%7C02%7Cpeng.fan%40nxp.com%7C6120357a772045a06
> 18808dc56f22c95%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C
> 638480845336550459%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAw
> MDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C
> &sdata=N3bT9ItgvL4Z9xP1oxlmDTG%2FFjsXkuhJIA9wooJWfcM%3D&reserve
> d=0.
>
> > SAI_CLK_MSEL in WAKEUP BLK CTRL is also managed by MISC Protocol.
>
> You recently said that we need blk-ctrl drivers for managing/controlling the
> GPR stuff within Linux since the SCMI firmware does not support this. Now
> blk-ctrl GPR control is supported by the firmware?
AONMIX/WAKEUPMIX BLK CTRL is managed by SCMI firmware, for other
non system critical BLK CTRLs, they are managed by Linux directly, such as
GPU/VPU BLK CTRL and etc.
Regards,
Peng.
>
> Regards,
> Marco
>
> >
> > And etc...
> >
> > I will add more info in commit log in next version later, after I get
> > more reviews on the patchset.
> >
> > Thanks,
> > Peng.
> >
> > >
> > > Regards,
> > > Marco
> > >
> > >
> > > >
> > > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > > > ---
> > > > drivers/firmware/arm_scmi/Kconfig | 10 ++
> > > > drivers/firmware/arm_scmi/Makefile | 1 +
> > > > drivers/firmware/arm_scmi/imx-sm-misc.c | 305
> > > ++++++++++++++++++++++++++++++++
> > > > include/linux/scmi_imx_protocol.h | 17 ++
> > > > 4 files changed, 333 insertions(+)
> > > >
> > > > diff --git a/drivers/firmware/arm_scmi/Kconfig
> > > > b/drivers/firmware/arm_scmi/Kconfig
> > > > index 56d11c9d9f47..bfeae92f6420 100644
> > > > --- a/drivers/firmware/arm_scmi/Kconfig
> > > > +++ b/drivers/firmware/arm_scmi/Kconfig
> > > > @@ -191,3 +191,13 @@ config IMX_SCMI_BBM_EXT
> > > > and BUTTON.
> > > >
> > > > This driver can also be built as a module.
> > > > +
> > > > +config IMX_SCMI_MISC_EXT
> > > > + tristate "i.MX SCMI MISC EXTENSION"
> > > > + depends on ARM_SCMI_PROTOCOL || (COMPILE_TEST && OF)
> > > > + default y if ARCH_MXC
> > > > + help
> > > > + This enables i.MX System MISC control logic such as gpio expander
> > > > + wakeup
> > > > +
> > > > + This driver can also be built as a module.
> > > > diff --git a/drivers/firmware/arm_scmi/Makefile
> > > > b/drivers/firmware/arm_scmi/Makefile
> > > > index 327687acf857..a23fde721222 100644
> > > > --- a/drivers/firmware/arm_scmi/Makefile
> > > > +++ b/drivers/firmware/arm_scmi/Makefile
> > > > @@ -12,6 +12,7 @@ scmi-transport-
> > > $(CONFIG_ARM_SCMI_TRANSPORT_VIRTIO)
> > > > += virtio.o
> > > > scmi-transport-$(CONFIG_ARM_SCMI_TRANSPORT_OPTEE) += optee.o
> > > > scmi-protocols-y = base.o clock.o perf.o power.o reset.o sensors.o
> > > > system.o voltage.o powercap.o
> > > > scmi-protocols-$(CONFIG_IMX_SCMI_BBM_EXT) += imx-sm-bbm.o
> > > > +scmi-protocols-$(CONFIG_IMX_SCMI_MISC_EXT) += imx-sm-misc.o
> > > > scmi-module-objs := $(scmi-driver-y) $(scmi-protocols-y)
> > > > $(scmi-transport-y)
> > > >
> > > > obj-$(CONFIG_ARM_SCMI_PROTOCOL) += scmi-core.o diff --git
> > > > a/drivers/firmware/arm_scmi/imx-sm-misc.c
> > > > b/drivers/firmware/arm_scmi/imx-sm-misc.c
> > > > new file mode 100644
> > > > index 000000000000..1b0ec2281518
> > > > --- /dev/null
> > > > +++ b/drivers/firmware/arm_scmi/imx-sm-misc.c
> > > > @@ -0,0 +1,305 @@
> > > > +// SPDX-License-Identifier: GPL-2.0
> > > > +/*
> > > > + * System control and Management Interface (SCMI) NXP MISC
> > > > +Protocol
> > > > + *
> > > > + * Copyright 2024 NXP
> > > > + */
> > > > +
> > > > +#define pr_fmt(fmt) "SCMI Notifications MISC - " fmt
> > > > +
> > > > +#include <linux/bits.h>
> > > > +#include <linux/io.h>
> > > > +#include <linux/module.h>
> > > > +#include <linux/of.h>
> > > > +#include <linux/platform_device.h> #include
> > > > +<linux/scmi_protocol.h> #include <linux/scmi_imx_protocol.h>
> > > > +
> > > > +#include "protocols.h"
> > > > +#include "notify.h"
> > > > +
> > > > +#define SCMI_PROTOCOL_SUPPORTED_VERSION 0x10000
> > > > +
> > > > +enum scmi_imx_misc_protocol_cmd {
> > > > + SCMI_IMX_MISC_CTRL_SET = 0x3,
> > > > + SCMI_IMX_MISC_CTRL_GET = 0x4,
> > > > + SCMI_IMX_MISC_CTRL_NOTIFY = 0x8, };
> > > > +
> > > > +struct scmi_imx_misc_info {
> > > > + u32 version;
> > > > + u32 nr_dev_ctrl;
> > > > + u32 nr_brd_ctrl;
> > > > + u32 nr_reason;
> > > > +};
> > > > +
> > > > +struct scmi_msg_imx_misc_protocol_attributes {
> > > > + __le32 attributes;
> > > > +};
> > > > +
> > > > +#define GET_BRD_CTRLS_NR(x) le32_get_bits((x), GENMASK(31,
> > > 24))
> > > > +#define GET_REASONS_NR(x) le32_get_bits((x), GENMASK(23,
> 16))
> > > > +#define GET_DEV_CTRLS_NR(x) le32_get_bits((x), GENMASK(15, 0))
> > > > +#define BRD_CTRL_START_ID BIT(15)
> > > > +
> > > > +struct scmi_imx_misc_ctrl_set_in {
> > > > + __le32 id;
> > > > + __le32 num;
> > > > + __le32 value[MISC_MAX_VAL];
> > > > +};
> > > > +
> > > > +struct scmi_imx_misc_ctrl_notify_in {
> > > > + __le32 ctrl_id;
> > > > + __le32 flags;
> > > > +};
> > > > +
> > > > +struct scmi_imx_misc_ctrl_notify_payld {
> > > > + __le32 ctrl_id;
> > > > + __le32 flags;
> > > > +};
> > > > +
> > > > +struct scmi_imx_misc_ctrl_get_out {
> > > > + __le32 num;
> > > > + __le32 *val;
> > > > +};
> > > > +
> > > > +static int scmi_imx_misc_attributes_get(const struct
> > > > +scmi_protocol_handle
> > > *ph,
> > > > + struct scmi_imx_misc_info *mi) {
> > > > + int ret;
> > > > + struct scmi_xfer *t;
> > > > + struct scmi_msg_imx_misc_protocol_attributes *attr;
> > > > +
> > > > + ret = ph->xops->xfer_get_init(ph, PROTOCOL_ATTRIBUTES, 0,
> > > > + sizeof(*attr), &t);
> > > > + if (ret)
> > > > + return ret;
> > > > +
> > > > + attr = t->rx.buf;
> > > > +
> > > > + ret = ph->xops->do_xfer(ph, t);
> > > > + if (!ret) {
> > > > + mi->nr_dev_ctrl = GET_DEV_CTRLS_NR(attr->attributes);
> > > > + mi->nr_brd_ctrl = GET_BRD_CTRLS_NR(attr->attributes);
> > > > + mi->nr_reason = GET_REASONS_NR(attr->attributes);
> > > > + dev_info(ph->dev, "i.MX MISC NUM DEV CTRL: %d, NUM
> > > BRD CTRL: %d,NUM Reason: %d\n",
> > > > + mi->nr_dev_ctrl, mi->nr_brd_ctrl, mi->nr_reason);
> > > > + }
> > > > +
> > > > + ph->xops->xfer_put(ph, t);
> > > > +
> > > > + return ret;
> > > > +}
> > > > +
> > > > +static int scmi_imx_misc_ctrl_validate_id(const struct
> > > scmi_protocol_handle *ph,
> > > > + u32 ctrl_id)
> > > > +{
> > > > + struct scmi_imx_misc_info *mi = ph->get_priv(ph);
> > > > +
> > > > + if ((ctrl_id < BRD_CTRL_START_ID) && (ctrl_id > mi->nr_dev_ctrl))
> > > > + return -EINVAL;
> > > > + if (ctrl_id >= BRD_CTRL_START_ID + mi->nr_brd_ctrl)
> > > > + return -EINVAL;
> > > > +
> > > > + return 0;
> > > > +}
> > > > +
> > > > +static int scmi_imx_misc_ctrl_notify(const struct
> > > > +scmi_protocol_handle
> > > *ph,
> > > > + u32 ctrl_id, u32 flags)
> > > > +{
> > > > + struct scmi_imx_misc_ctrl_notify_in *in;
> > > > + struct scmi_xfer *t;
> > > > + int ret;
> > > > +
> > > > + ret = scmi_imx_misc_ctrl_validate_id(ph, ctrl_id);
> > > > + if (ret)
> > > > + return ret;
> > > > +
> > > > + ret = ph->xops->xfer_get_init(ph, SCMI_IMX_MISC_CTRL_NOTIFY,
> > > > + sizeof(*in), 0, &t);
> > > > + if (ret)
> > > > + return ret;
> > > > +
> > > > + in = t->tx.buf;
> > > > + in->ctrl_id = cpu_to_le32(ctrl_id);
> > > > + in->flags = cpu_to_le32(flags);
> > > > +
> > > > + ret = ph->xops->do_xfer(ph, t);
> > > > +
> > > > + ph->xops->xfer_put(ph, t);
> > > > +
> > > > + return ret;
> > > > +}
> > > > +
> > > > +static int
> > > > +scmi_imx_misc_ctrl_set_notify_enabled(const struct
> > > scmi_protocol_handle *ph,
> > > > + u8 evt_id, u32 src_id, bool enable) {
> > > > + int ret;
> > > > +
> > > > + ret = scmi_imx_misc_ctrl_notify(ph, src_id, enable ? evt_id : 0);
> > > > + if (ret)
> > > > + dev_err(ph->dev, "FAIL_ENABLED - evt[%X] src[%d] -
> > > ret:%d\n",
> > > > + evt_id, src_id, ret);
> > > > +
> > > > + return ret;
> > > > +}
> > > > +
> > > > +static int scmi_imx_misc_ctrl_get_num_sources(const struct
> > > > +scmi_protocol_handle *ph) {
> > > > + return GENMASK(15, 0);
> > > > +}
> > > > +
> > > > +static void *
> > > > +scmi_imx_misc_ctrl_fill_custom_report(const struct
> > > > +scmi_protocol_handle
> > > *ph,
> > > > + u8 evt_id, ktime_t timestamp,
> > > > + const void *payld, size_t payld_sz,
> > > > + void *report, u32 *src_id) {
> > > > + const struct scmi_imx_misc_ctrl_notify_payld *p = payld;
> > > > + struct scmi_imx_misc_ctrl_notify_report *r = report;
> > > > +
> > > > + if (sizeof(*p) != payld_sz)
> > > > + return NULL;
> > > > +
> > > > + r->timestamp = timestamp;
> > > > + r->ctrl_id = p->ctrl_id;
> > > > + r->flags = p->flags;
> > > > + *src_id = r->ctrl_id;
> > > > + dev_dbg(ph->dev, "%s: ctrl_id: %d flags: %d\n", __func__,
> > > > + r->ctrl_id, r->flags);
> > > > +
> > > > + return r;
> > > > +}
> > > > +
> > > > +static const struct scmi_event_ops scmi_imx_misc_event_ops = {
> > > > + .get_num_sources = scmi_imx_misc_ctrl_get_num_sources,
> > > > + .set_notify_enabled = scmi_imx_misc_ctrl_set_notify_enabled,
> > > > + .fill_custom_report = scmi_imx_misc_ctrl_fill_custom_report,
> > > > +};
> > > > +
> > > > +static const struct scmi_event scmi_imx_misc_events[] = {
> > > > + {
> > > > + .id = SCMI_EVENT_IMX_MISC_CONTROL_DISABLED,
> > > > + .max_payld_sz = sizeof(struct
> > > scmi_imx_misc_ctrl_notify_payld),
> > > > + .max_report_sz = sizeof(struct
> > > scmi_imx_misc_ctrl_notify_report),
> > > > + },
> > > > + {
> > > > + .id = SCMI_EVENT_IMX_MISC_CONTROL_FALLING_EDGE,
> > > > + .max_payld_sz = sizeof(struct
> > > scmi_imx_misc_ctrl_notify_payld),
> > > > + .max_report_sz = sizeof(struct
> > > scmi_imx_misc_ctrl_notify_report),
> > > > + },
> > > > + {
> > > > + .id = SCMI_EVENT_IMX_MISC_CONTROL_RISING_EDGE,
> > > > + .max_payld_sz = sizeof(struct
> > > scmi_imx_misc_ctrl_notify_payld),
> > > > + .max_report_sz = sizeof(struct
> > > scmi_imx_misc_ctrl_notify_report),
> > > > + }
> > > > +};
> > > > +
> > > > +static struct scmi_protocol_events scmi_imx_misc_protocol_events = {
> > > > + .queue_sz = SCMI_PROTO_QUEUE_SZ,
> > > > + .ops = &scmi_imx_misc_event_ops,
> > > > + .evts = scmi_imx_misc_events,
> > > > + .num_events = ARRAY_SIZE(scmi_imx_misc_events), };
> > > > +
> > > > +static int scmi_imx_misc_protocol_init(const struct
> > > > +scmi_protocol_handle *ph) {
> > > > + struct scmi_imx_misc_info *minfo;
> > > > + u32 version;
> > > > + int ret;
> > > > +
> > > > + ret = ph->xops->version_get(ph, &version);
> > > > + if (ret)
> > > > + return ret;
> > > > +
> > > > + dev_info(ph->dev, "NXP SM MISC Version %d.%d\n",
> > > > + PROTOCOL_REV_MAJOR(version),
> > > PROTOCOL_REV_MINOR(version));
> > > > +
> > > > + minfo = devm_kzalloc(ph->dev, sizeof(*minfo), GFP_KERNEL);
> > > > + if (!minfo)
> > > > + return -ENOMEM;
> > > > +
> > > > + ret = scmi_imx_misc_attributes_get(ph, minfo);
> > > > + if (ret)
> > > > + return ret;
> > > > +
> > > > + return ph->set_priv(ph, minfo, version); }
> > > > +
> > > > +static int scmi_imx_misc_ctrl_get(const struct scmi_protocol_handle
> *ph,
> > > > + u32 ctrl_id, u32 *num, u32 *val) {
> > > > + struct scmi_imx_misc_ctrl_get_out *out;
> > > > + struct scmi_xfer *t;
> > > > + int ret, i;
> > > > +
> > > > + ret = scmi_imx_misc_ctrl_validate_id(ph, ctrl_id);
> > > > + if (ret)
> > > > + return ret;
> > > > +
> > > > + ret = ph->xops->xfer_get_init(ph, SCMI_IMX_MISC_CTRL_GET,
> > > sizeof(u32),
> > > > + 0, &t);
> > > > + if (ret)
> > > > + return ret;
> > > > +
> > > > + put_unaligned_le32(ctrl_id, t->tx.buf);
> > > > + ret = ph->xops->do_xfer(ph, t);
> > > > + if (!ret) {
> > > > + out = t->rx.buf;
> > > > + *num = le32_to_cpu(out->num);
> > > > + for (i = 0; i < *num && i < MISC_MAX_VAL; i++)
> > > > + val[i] = le32_to_cpu(out->val[i]);
> > > > + }
> > > > +
> > > > + ph->xops->xfer_put(ph, t);
> > > > +
> > > > + return ret;
> > > > +}
> > > > +
> > > > +static int scmi_imx_misc_ctrl_set(const struct scmi_protocol_handle
> *ph,
> > > > + u32 ctrl_id, u32 num, u32 *val) {
> > > > + struct scmi_imx_misc_ctrl_set_in *in;
> > > > + struct scmi_xfer *t;
> > > > + int ret, i;
> > > > +
> > > > + ret = scmi_imx_misc_ctrl_validate_id(ph, ctrl_id);
> > > > + if (ret)
> > > > + return ret;
> > > > +
> > > > + if (num > MISC_MAX_VAL)
> > > > + return -EINVAL;
> > > > +
> > > > + ret = ph->xops->xfer_get_init(ph, SCMI_IMX_MISC_CTRL_SET,
> > > sizeof(*in),
> > > > + 0, &t);
> > > > + if (ret)
> > > > + return ret;
> > > > +
> > > > + in = t->tx.buf;
> > > > + in->id = cpu_to_le32(ctrl_id);
> > > > + in->num = cpu_to_le32(num);
> > > > + for (i = 0; i < num; i++)
> > > > + in->value[i] = cpu_to_le32(val[i]);
> > > > +
> > > > + ret = ph->xops->do_xfer(ph, t);
> > > > +
> > > > + ph->xops->xfer_put(ph, t);
> > > > +
> > > > + return ret;
> > > > +}
> > > > +
> > > > +static const struct scmi_imx_misc_proto_ops
> > > > +scmi_imx_misc_proto_ops =
> > > {
> > > > + .misc_ctrl_set = scmi_imx_misc_ctrl_set,
> > > > + .misc_ctrl_get = scmi_imx_misc_ctrl_get, };
> > > > +
> > > > +static const struct scmi_protocol scmi_imx_misc = {
> > > > + .id = SCMI_PROTOCOL_IMX_MISC,
> > > > + .owner = THIS_MODULE,
> > > > + .instance_init = &scmi_imx_misc_protocol_init,
> > > > + .ops = &scmi_imx_misc_proto_ops,
> > > > + .events = &scmi_imx_misc_protocol_events,
> > > > + .supported_version = SCMI_PROTOCOL_SUPPORTED_VERSION, };
> > > > +module_scmi_protocol(scmi_imx_misc);
> > > > diff --git a/include/linux/scmi_imx_protocol.h
> > > > b/include/linux/scmi_imx_protocol.h
> > > > index 90ce011a4429..a69bd4a20f0f 100644
> > > > --- a/include/linux/scmi_imx_protocol.h
> > > > +++ b/include/linux/scmi_imx_protocol.h
> > > > @@ -13,8 +13,14 @@
> > > > #include <linux/notifier.h>
> > > > #include <linux/types.h>
> > > >
> > > > +#define SCMI_PAYLOAD_LEN 100
> > > > +
> > > > +#define SCMI_ARRAY(X, Y) ((SCMI_PAYLOAD_LEN - (X)) / sizeof(Y))
> > > > +#define MISC_MAX_VAL SCMI_ARRAY(8, uint32_t)
> > > > +
> > > > enum scmi_nxp_protocol {
> > > > SCMI_PROTOCOL_IMX_BBM = 0x81,
> > > > + SCMI_PROTOCOL_IMX_MISC = 0x84,
> > > > };
> > > >
> > > > struct scmi_imx_bbm_proto_ops {
> > > > @@ -42,4 +48,15 @@ struct scmi_imx_bbm_notif_report {
> > > > unsigned int rtc_id;
> > > > unsigned int rtc_evt;
> > > > };
> > > > +
> > > > +struct scmi_imx_misc_ctrl_notify_report {
> > > > + ktime_t timestamp;
> > > > + unsigned int ctrl_id;
> > > > + unsigned int flags;
> > > > +};
> > > > +
> > > > +struct scmi_imx_misc_proto_ops {
> > > > + int (*misc_ctrl_set)(const struct scmi_protocol_handle *ph, u32
> > > > +id,
> > > u32 num, u32 *val);
> > > > + int (*misc_ctrl_get)(const struct scmi_protocol_handle *ph, u32
> > > > +id,
> > > > +u32 *num, u32 *val); };
> > > > #endif
> > > >
> > > > --
> > > > 2.37.1
> > > >
> > > >
> > > >
> >
^ permalink raw reply
* Re: [PATCH v4 5/5] dmaengine: imx-sdma: Add i2c dma support
From: Vinod Koul @ 2024-04-07 11:20 UTC (permalink / raw)
To: Frank Li
Cc: Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joy Zou, dmaengine, linux-arm-kernel, linux-kernel, devicetree,
imx, Robin Gong, Clark Wang, Daniel Baluta
In-Reply-To: <20240329-sdma_upstream-v4-5-daeb3067dea7@nxp.com>
On 29-03-24, 10:34, Frank Li wrote:
> From: Robin Gong <yibin.gong@nxp.com>
>
> New sdma script (sdma-6q: v3.6, sdma-7d: v4.6) support i2c at imx8mp and
> imx6ull. So add I2C dma support.
>
> Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> Acked-by: Clark Wang <xiaoning.wang@nxp.com>
> Reviewed-by: Joy Zou <joy.zou@nxp.com>
> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
> drivers/dma/imx-sdma.c | 7 +++++++
> include/linux/dma/imx-dma.h | 1 +
> 2 files changed, 8 insertions(+)
>
> diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
> index f68ab34a3c880..1ab8a7d3a50dc 100644
> --- a/drivers/dma/imx-sdma.c
> +++ b/drivers/dma/imx-sdma.c
> @@ -251,6 +251,8 @@ struct sdma_script_start_addrs {
> s32 sai_2_mcu_addr;
> s32 uart_2_mcu_rom_addr;
> s32 uartsh_2_mcu_rom_addr;
> + s32 i2c_2_mcu_addr;
> + s32 mcu_2_i2c_addr;
> /* End of v3 array */
> s32 mcu_2_zqspi_addr;
> /* End of v4 array */
> @@ -1081,6 +1083,11 @@ static int sdma_get_pc(struct sdma_channel *sdmac,
> per_2_emi = sdma->script_addrs->sai_2_mcu_addr;
> emi_2_per = sdma->script_addrs->mcu_2_sai_addr;
> break;
> + case IMX_DMATYPE_I2C:
> + per_2_emi = sdma->script_addrs->i2c_2_mcu_addr;
> + emi_2_per = sdma->script_addrs->mcu_2_i2c_addr;
> + sdmac->is_ram_script = true;
> + break;
> case IMX_DMATYPE_HDMI:
> emi_2_per = sdma->script_addrs->hdmi_dma_addr;
> sdmac->is_ram_script = true;
> diff --git a/include/linux/dma/imx-dma.h b/include/linux/dma/imx-dma.h
> index cfec5f946e237..76a8de9ae1517 100644
> --- a/include/linux/dma/imx-dma.h
> +++ b/include/linux/dma/imx-dma.h
> @@ -41,6 +41,7 @@ enum sdma_peripheral_type {
> IMX_DMATYPE_SAI, /* SAI */
> IMX_DMATYPE_MULTI_SAI, /* MULTI FIFOs For Audio */
> IMX_DMATYPE_HDMI, /* HDMI Audio */
> + IMX_DMATYPE_I2C, /* I2C */
I have HDMI Audio: 26 already?
--
~Vinod
^ permalink raw reply
* Re: [PATCH v4 4/5] dt-bindings: fsl-imx-sdma: Add I2C peripheral types ID
From: Vinod Koul @ 2024-04-07 11:21 UTC (permalink / raw)
To: Frank Li
Cc: Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joy Zou, dmaengine, linux-arm-kernel, linux-kernel, devicetree,
imx
In-Reply-To: <20240329-sdma_upstream-v4-4-daeb3067dea7@nxp.com>
On 29-03-24, 10:34, Frank Li wrote:
> Add peripheral types ID 26 for I2C because sdma firmware (sdma-6q: v3.6,
> sdma-7d: v4.6) support I2C DMA transfer.
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
> Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml
> index b95dd8db5a30a..80bcd3a6ecaf3 100644
> --- a/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml
> +++ b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml
> @@ -93,6 +93,7 @@ properties:
> - Shared ASRC: 23
> - SAI: 24
> - HDMI Audio: 25
> + - I2C: 26
Sorry comment was for this patch, I have skipped these two now
>
> The third cell: transfer priority ID
> enum:
>
> --
> 2.34.1
--
~Vinod
^ permalink raw reply
* Re: [PATCH v2 4/6] firmware: arm_scmi: add initial support for i.MX MISC protocol
From: Marco Felsch @ 2024-04-07 11:02 UTC (permalink / raw)
To: Peng Fan
Cc: Peng Fan (OSS), Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Sudeep Holla, Cristian Marussi, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev
In-Reply-To: <DU0PR04MB9417A07F56B7E14DAB3DCE2188012@DU0PR04MB9417.eurprd04.prod.outlook.com>
Hi Peng,
On 24-04-07, Peng Fan wrote:
> > Subject: Re: [PATCH v2 4/6] firmware: arm_scmi: add initial support for i.MX
> > MISC protocol
> >
> > Hi Peng,
> >
> > On 24-04-05, Peng Fan (OSS) wrote:
> > > From: Peng Fan <peng.fan@nxp.com>
> > >
> > > The i.MX MISC protocol is for misc settings, such as gpio expander
> > > wakeup.
> >
> > Can you elaborate a bit more please?
>
> The gpio expander is under M33(SCMI firmware used core) I2C control,
Due to missing technical references I guess that your specific EVK has
an i2c-expander connected to the system-critical-i2c bus? The
system-critical-i2c should be only used for system critical topics like
PMIC control.
> But the gpio expander supports board function such as PCIE_WAKEUP,
> BTN_WAKEUP. So these are managed by MISC protocol.
This seems more like an specific i.MX95-EVK problem too me since you
have conneccted the i2c-gpio-expander to the system-critical-i2c bus
instead of using an bus available within Linux. Also can you please
provide me a link with the propsoal for the MISC protocol? I can't find
any references within the SCMI v3.2
https://developer.arm.com/documentation/den0056/e/ nor within the SCP
firmware git: https://github.com/ARM-software/SCP-firmware.
> SAI_CLK_MSEL in WAKEUP BLK CTRL is also managed by MISC Protocol.
You recently said that we need blk-ctrl drivers for managing/controlling
the GPR stuff within Linux since the SCMI firmware does not support
this. Now blk-ctrl GPR control is supported by the firmware?
Regards,
Marco
>
> And etc...
>
> I will add more info in commit log in next version later, after I get more
> reviews on the patchset.
>
> Thanks,
> Peng.
>
> >
> > Regards,
> > Marco
> >
> >
> > >
> > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > > ---
> > > drivers/firmware/arm_scmi/Kconfig | 10 ++
> > > drivers/firmware/arm_scmi/Makefile | 1 +
> > > drivers/firmware/arm_scmi/imx-sm-misc.c | 305
> > ++++++++++++++++++++++++++++++++
> > > include/linux/scmi_imx_protocol.h | 17 ++
> > > 4 files changed, 333 insertions(+)
> > >
> > > diff --git a/drivers/firmware/arm_scmi/Kconfig
> > > b/drivers/firmware/arm_scmi/Kconfig
> > > index 56d11c9d9f47..bfeae92f6420 100644
> > > --- a/drivers/firmware/arm_scmi/Kconfig
> > > +++ b/drivers/firmware/arm_scmi/Kconfig
> > > @@ -191,3 +191,13 @@ config IMX_SCMI_BBM_EXT
> > > and BUTTON.
> > >
> > > This driver can also be built as a module.
> > > +
> > > +config IMX_SCMI_MISC_EXT
> > > + tristate "i.MX SCMI MISC EXTENSION"
> > > + depends on ARM_SCMI_PROTOCOL || (COMPILE_TEST && OF)
> > > + default y if ARCH_MXC
> > > + help
> > > + This enables i.MX System MISC control logic such as gpio expander
> > > + wakeup
> > > +
> > > + This driver can also be built as a module.
> > > diff --git a/drivers/firmware/arm_scmi/Makefile
> > > b/drivers/firmware/arm_scmi/Makefile
> > > index 327687acf857..a23fde721222 100644
> > > --- a/drivers/firmware/arm_scmi/Makefile
> > > +++ b/drivers/firmware/arm_scmi/Makefile
> > > @@ -12,6 +12,7 @@ scmi-transport-
> > $(CONFIG_ARM_SCMI_TRANSPORT_VIRTIO)
> > > += virtio.o
> > > scmi-transport-$(CONFIG_ARM_SCMI_TRANSPORT_OPTEE) += optee.o
> > > scmi-protocols-y = base.o clock.o perf.o power.o reset.o sensors.o
> > > system.o voltage.o powercap.o
> > > scmi-protocols-$(CONFIG_IMX_SCMI_BBM_EXT) += imx-sm-bbm.o
> > > +scmi-protocols-$(CONFIG_IMX_SCMI_MISC_EXT) += imx-sm-misc.o
> > > scmi-module-objs := $(scmi-driver-y) $(scmi-protocols-y)
> > > $(scmi-transport-y)
> > >
> > > obj-$(CONFIG_ARM_SCMI_PROTOCOL) += scmi-core.o diff --git
> > > a/drivers/firmware/arm_scmi/imx-sm-misc.c
> > > b/drivers/firmware/arm_scmi/imx-sm-misc.c
> > > new file mode 100644
> > > index 000000000000..1b0ec2281518
> > > --- /dev/null
> > > +++ b/drivers/firmware/arm_scmi/imx-sm-misc.c
> > > @@ -0,0 +1,305 @@
> > > +// SPDX-License-Identifier: GPL-2.0
> > > +/*
> > > + * System control and Management Interface (SCMI) NXP MISC Protocol
> > > + *
> > > + * Copyright 2024 NXP
> > > + */
> > > +
> > > +#define pr_fmt(fmt) "SCMI Notifications MISC - " fmt
> > > +
> > > +#include <linux/bits.h>
> > > +#include <linux/io.h>
> > > +#include <linux/module.h>
> > > +#include <linux/of.h>
> > > +#include <linux/platform_device.h>
> > > +#include <linux/scmi_protocol.h>
> > > +#include <linux/scmi_imx_protocol.h>
> > > +
> > > +#include "protocols.h"
> > > +#include "notify.h"
> > > +
> > > +#define SCMI_PROTOCOL_SUPPORTED_VERSION 0x10000
> > > +
> > > +enum scmi_imx_misc_protocol_cmd {
> > > + SCMI_IMX_MISC_CTRL_SET = 0x3,
> > > + SCMI_IMX_MISC_CTRL_GET = 0x4,
> > > + SCMI_IMX_MISC_CTRL_NOTIFY = 0x8,
> > > +};
> > > +
> > > +struct scmi_imx_misc_info {
> > > + u32 version;
> > > + u32 nr_dev_ctrl;
> > > + u32 nr_brd_ctrl;
> > > + u32 nr_reason;
> > > +};
> > > +
> > > +struct scmi_msg_imx_misc_protocol_attributes {
> > > + __le32 attributes;
> > > +};
> > > +
> > > +#define GET_BRD_CTRLS_NR(x) le32_get_bits((x), GENMASK(31,
> > 24))
> > > +#define GET_REASONS_NR(x) le32_get_bits((x), GENMASK(23, 16))
> > > +#define GET_DEV_CTRLS_NR(x) le32_get_bits((x), GENMASK(15, 0))
> > > +#define BRD_CTRL_START_ID BIT(15)
> > > +
> > > +struct scmi_imx_misc_ctrl_set_in {
> > > + __le32 id;
> > > + __le32 num;
> > > + __le32 value[MISC_MAX_VAL];
> > > +};
> > > +
> > > +struct scmi_imx_misc_ctrl_notify_in {
> > > + __le32 ctrl_id;
> > > + __le32 flags;
> > > +};
> > > +
> > > +struct scmi_imx_misc_ctrl_notify_payld {
> > > + __le32 ctrl_id;
> > > + __le32 flags;
> > > +};
> > > +
> > > +struct scmi_imx_misc_ctrl_get_out {
> > > + __le32 num;
> > > + __le32 *val;
> > > +};
> > > +
> > > +static int scmi_imx_misc_attributes_get(const struct scmi_protocol_handle
> > *ph,
> > > + struct scmi_imx_misc_info *mi)
> > > +{
> > > + int ret;
> > > + struct scmi_xfer *t;
> > > + struct scmi_msg_imx_misc_protocol_attributes *attr;
> > > +
> > > + ret = ph->xops->xfer_get_init(ph, PROTOCOL_ATTRIBUTES, 0,
> > > + sizeof(*attr), &t);
> > > + if (ret)
> > > + return ret;
> > > +
> > > + attr = t->rx.buf;
> > > +
> > > + ret = ph->xops->do_xfer(ph, t);
> > > + if (!ret) {
> > > + mi->nr_dev_ctrl = GET_DEV_CTRLS_NR(attr->attributes);
> > > + mi->nr_brd_ctrl = GET_BRD_CTRLS_NR(attr->attributes);
> > > + mi->nr_reason = GET_REASONS_NR(attr->attributes);
> > > + dev_info(ph->dev, "i.MX MISC NUM DEV CTRL: %d, NUM
> > BRD CTRL: %d,NUM Reason: %d\n",
> > > + mi->nr_dev_ctrl, mi->nr_brd_ctrl, mi->nr_reason);
> > > + }
> > > +
> > > + ph->xops->xfer_put(ph, t);
> > > +
> > > + return ret;
> > > +}
> > > +
> > > +static int scmi_imx_misc_ctrl_validate_id(const struct
> > scmi_protocol_handle *ph,
> > > + u32 ctrl_id)
> > > +{
> > > + struct scmi_imx_misc_info *mi = ph->get_priv(ph);
> > > +
> > > + if ((ctrl_id < BRD_CTRL_START_ID) && (ctrl_id > mi->nr_dev_ctrl))
> > > + return -EINVAL;
> > > + if (ctrl_id >= BRD_CTRL_START_ID + mi->nr_brd_ctrl)
> > > + return -EINVAL;
> > > +
> > > + return 0;
> > > +}
> > > +
> > > +static int scmi_imx_misc_ctrl_notify(const struct scmi_protocol_handle
> > *ph,
> > > + u32 ctrl_id, u32 flags)
> > > +{
> > > + struct scmi_imx_misc_ctrl_notify_in *in;
> > > + struct scmi_xfer *t;
> > > + int ret;
> > > +
> > > + ret = scmi_imx_misc_ctrl_validate_id(ph, ctrl_id);
> > > + if (ret)
> > > + return ret;
> > > +
> > > + ret = ph->xops->xfer_get_init(ph, SCMI_IMX_MISC_CTRL_NOTIFY,
> > > + sizeof(*in), 0, &t);
> > > + if (ret)
> > > + return ret;
> > > +
> > > + in = t->tx.buf;
> > > + in->ctrl_id = cpu_to_le32(ctrl_id);
> > > + in->flags = cpu_to_le32(flags);
> > > +
> > > + ret = ph->xops->do_xfer(ph, t);
> > > +
> > > + ph->xops->xfer_put(ph, t);
> > > +
> > > + return ret;
> > > +}
> > > +
> > > +static int
> > > +scmi_imx_misc_ctrl_set_notify_enabled(const struct
> > scmi_protocol_handle *ph,
> > > + u8 evt_id, u32 src_id, bool enable) {
> > > + int ret;
> > > +
> > > + ret = scmi_imx_misc_ctrl_notify(ph, src_id, enable ? evt_id : 0);
> > > + if (ret)
> > > + dev_err(ph->dev, "FAIL_ENABLED - evt[%X] src[%d] -
> > ret:%d\n",
> > > + evt_id, src_id, ret);
> > > +
> > > + return ret;
> > > +}
> > > +
> > > +static int scmi_imx_misc_ctrl_get_num_sources(const struct
> > > +scmi_protocol_handle *ph) {
> > > + return GENMASK(15, 0);
> > > +}
> > > +
> > > +static void *
> > > +scmi_imx_misc_ctrl_fill_custom_report(const struct scmi_protocol_handle
> > *ph,
> > > + u8 evt_id, ktime_t timestamp,
> > > + const void *payld, size_t payld_sz,
> > > + void *report, u32 *src_id)
> > > +{
> > > + const struct scmi_imx_misc_ctrl_notify_payld *p = payld;
> > > + struct scmi_imx_misc_ctrl_notify_report *r = report;
> > > +
> > > + if (sizeof(*p) != payld_sz)
> > > + return NULL;
> > > +
> > > + r->timestamp = timestamp;
> > > + r->ctrl_id = p->ctrl_id;
> > > + r->flags = p->flags;
> > > + *src_id = r->ctrl_id;
> > > + dev_dbg(ph->dev, "%s: ctrl_id: %d flags: %d\n", __func__,
> > > + r->ctrl_id, r->flags);
> > > +
> > > + return r;
> > > +}
> > > +
> > > +static const struct scmi_event_ops scmi_imx_misc_event_ops = {
> > > + .get_num_sources = scmi_imx_misc_ctrl_get_num_sources,
> > > + .set_notify_enabled = scmi_imx_misc_ctrl_set_notify_enabled,
> > > + .fill_custom_report = scmi_imx_misc_ctrl_fill_custom_report,
> > > +};
> > > +
> > > +static const struct scmi_event scmi_imx_misc_events[] = {
> > > + {
> > > + .id = SCMI_EVENT_IMX_MISC_CONTROL_DISABLED,
> > > + .max_payld_sz = sizeof(struct
> > scmi_imx_misc_ctrl_notify_payld),
> > > + .max_report_sz = sizeof(struct
> > scmi_imx_misc_ctrl_notify_report),
> > > + },
> > > + {
> > > + .id = SCMI_EVENT_IMX_MISC_CONTROL_FALLING_EDGE,
> > > + .max_payld_sz = sizeof(struct
> > scmi_imx_misc_ctrl_notify_payld),
> > > + .max_report_sz = sizeof(struct
> > scmi_imx_misc_ctrl_notify_report),
> > > + },
> > > + {
> > > + .id = SCMI_EVENT_IMX_MISC_CONTROL_RISING_EDGE,
> > > + .max_payld_sz = sizeof(struct
> > scmi_imx_misc_ctrl_notify_payld),
> > > + .max_report_sz = sizeof(struct
> > scmi_imx_misc_ctrl_notify_report),
> > > + }
> > > +};
> > > +
> > > +static struct scmi_protocol_events scmi_imx_misc_protocol_events = {
> > > + .queue_sz = SCMI_PROTO_QUEUE_SZ,
> > > + .ops = &scmi_imx_misc_event_ops,
> > > + .evts = scmi_imx_misc_events,
> > > + .num_events = ARRAY_SIZE(scmi_imx_misc_events), };
> > > +
> > > +static int scmi_imx_misc_protocol_init(const struct
> > > +scmi_protocol_handle *ph) {
> > > + struct scmi_imx_misc_info *minfo;
> > > + u32 version;
> > > + int ret;
> > > +
> > > + ret = ph->xops->version_get(ph, &version);
> > > + if (ret)
> > > + return ret;
> > > +
> > > + dev_info(ph->dev, "NXP SM MISC Version %d.%d\n",
> > > + PROTOCOL_REV_MAJOR(version),
> > PROTOCOL_REV_MINOR(version));
> > > +
> > > + minfo = devm_kzalloc(ph->dev, sizeof(*minfo), GFP_KERNEL);
> > > + if (!minfo)
> > > + return -ENOMEM;
> > > +
> > > + ret = scmi_imx_misc_attributes_get(ph, minfo);
> > > + if (ret)
> > > + return ret;
> > > +
> > > + return ph->set_priv(ph, minfo, version); }
> > > +
> > > +static int scmi_imx_misc_ctrl_get(const struct scmi_protocol_handle *ph,
> > > + u32 ctrl_id, u32 *num, u32 *val) {
> > > + struct scmi_imx_misc_ctrl_get_out *out;
> > > + struct scmi_xfer *t;
> > > + int ret, i;
> > > +
> > > + ret = scmi_imx_misc_ctrl_validate_id(ph, ctrl_id);
> > > + if (ret)
> > > + return ret;
> > > +
> > > + ret = ph->xops->xfer_get_init(ph, SCMI_IMX_MISC_CTRL_GET,
> > sizeof(u32),
> > > + 0, &t);
> > > + if (ret)
> > > + return ret;
> > > +
> > > + put_unaligned_le32(ctrl_id, t->tx.buf);
> > > + ret = ph->xops->do_xfer(ph, t);
> > > + if (!ret) {
> > > + out = t->rx.buf;
> > > + *num = le32_to_cpu(out->num);
> > > + for (i = 0; i < *num && i < MISC_MAX_VAL; i++)
> > > + val[i] = le32_to_cpu(out->val[i]);
> > > + }
> > > +
> > > + ph->xops->xfer_put(ph, t);
> > > +
> > > + return ret;
> > > +}
> > > +
> > > +static int scmi_imx_misc_ctrl_set(const struct scmi_protocol_handle *ph,
> > > + u32 ctrl_id, u32 num, u32 *val) {
> > > + struct scmi_imx_misc_ctrl_set_in *in;
> > > + struct scmi_xfer *t;
> > > + int ret, i;
> > > +
> > > + ret = scmi_imx_misc_ctrl_validate_id(ph, ctrl_id);
> > > + if (ret)
> > > + return ret;
> > > +
> > > + if (num > MISC_MAX_VAL)
> > > + return -EINVAL;
> > > +
> > > + ret = ph->xops->xfer_get_init(ph, SCMI_IMX_MISC_CTRL_SET,
> > sizeof(*in),
> > > + 0, &t);
> > > + if (ret)
> > > + return ret;
> > > +
> > > + in = t->tx.buf;
> > > + in->id = cpu_to_le32(ctrl_id);
> > > + in->num = cpu_to_le32(num);
> > > + for (i = 0; i < num; i++)
> > > + in->value[i] = cpu_to_le32(val[i]);
> > > +
> > > + ret = ph->xops->do_xfer(ph, t);
> > > +
> > > + ph->xops->xfer_put(ph, t);
> > > +
> > > + return ret;
> > > +}
> > > +
> > > +static const struct scmi_imx_misc_proto_ops scmi_imx_misc_proto_ops =
> > {
> > > + .misc_ctrl_set = scmi_imx_misc_ctrl_set,
> > > + .misc_ctrl_get = scmi_imx_misc_ctrl_get, };
> > > +
> > > +static const struct scmi_protocol scmi_imx_misc = {
> > > + .id = SCMI_PROTOCOL_IMX_MISC,
> > > + .owner = THIS_MODULE,
> > > + .instance_init = &scmi_imx_misc_protocol_init,
> > > + .ops = &scmi_imx_misc_proto_ops,
> > > + .events = &scmi_imx_misc_protocol_events,
> > > + .supported_version = SCMI_PROTOCOL_SUPPORTED_VERSION, };
> > > +module_scmi_protocol(scmi_imx_misc);
> > > diff --git a/include/linux/scmi_imx_protocol.h
> > > b/include/linux/scmi_imx_protocol.h
> > > index 90ce011a4429..a69bd4a20f0f 100644
> > > --- a/include/linux/scmi_imx_protocol.h
> > > +++ b/include/linux/scmi_imx_protocol.h
> > > @@ -13,8 +13,14 @@
> > > #include <linux/notifier.h>
> > > #include <linux/types.h>
> > >
> > > +#define SCMI_PAYLOAD_LEN 100
> > > +
> > > +#define SCMI_ARRAY(X, Y) ((SCMI_PAYLOAD_LEN - (X)) / sizeof(Y))
> > > +#define MISC_MAX_VAL SCMI_ARRAY(8, uint32_t)
> > > +
> > > enum scmi_nxp_protocol {
> > > SCMI_PROTOCOL_IMX_BBM = 0x81,
> > > + SCMI_PROTOCOL_IMX_MISC = 0x84,
> > > };
> > >
> > > struct scmi_imx_bbm_proto_ops {
> > > @@ -42,4 +48,15 @@ struct scmi_imx_bbm_notif_report {
> > > unsigned int rtc_id;
> > > unsigned int rtc_evt;
> > > };
> > > +
> > > +struct scmi_imx_misc_ctrl_notify_report {
> > > + ktime_t timestamp;
> > > + unsigned int ctrl_id;
> > > + unsigned int flags;
> > > +};
> > > +
> > > +struct scmi_imx_misc_proto_ops {
> > > + int (*misc_ctrl_set)(const struct scmi_protocol_handle *ph, u32 id,
> > u32 num, u32 *val);
> > > + int (*misc_ctrl_get)(const struct scmi_protocol_handle *ph, u32 id,
> > > +u32 *num, u32 *val); };
> > > #endif
> > >
> > > --
> > > 2.37.1
> > >
> > >
> > >
>
^ permalink raw reply
* Re: [PATCH v6 2/3] soc/sophgo: add top sysctrl layout file for CV18XX/SG200X
From: Vinod Koul @ 2024-04-07 11:23 UTC (permalink / raw)
To: Inochi Amaoto
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen Wang,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Jisheng Zhang, Liu Gui,
Jingbao Qiu, dlan, dmaengine, devicetree, linux-kernel,
linux-riscv
In-Reply-To: <IA1PR20MB49532FB358A842A2ACC5E878BB3A2@IA1PR20MB4953.namprd20.prod.outlook.com>
On 29-03-24, 10:04, Inochi Amaoto wrote:
> The "top" system controller of CV18XX/SG200X exposes control
> register access for various devices. Add soc header file to
> describe it.
>
> Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
> ---
> include/soc/sophgo/cv1800-sysctl.h | 30 ++++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
> create mode 100644 include/soc/sophgo/cv1800-sysctl.h
>
> diff --git a/include/soc/sophgo/cv1800-sysctl.h b/include/soc/sophgo/cv1800-sysctl.h
> new file mode 100644
> index 000000000000..b9396d33e240
> --- /dev/null
> +++ b/include/soc/sophgo/cv1800-sysctl.h
> @@ -0,0 +1,30 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> +/*
> + * Copyright (C) 2023 Inochi Amaoto <inochiama@outlook.com>
> + */
> +
> +#ifndef CV1800_SYSCTL_H
> +#define CV1800_SYSCTL_H
> +
> +/*
> + * SOPHGO CV1800/SG2000 SoC top system controller registers offsets.
> + */
> +
> +#define CV1800_CONF_INFO 0x004
> +#define CV1800_SYS_CTRL_REG 0x008
> +#define CV1800_USB_PHY_CTRL_REG 0x048
> +#define CV1800_SDMA_DMA_CHANNEL_REMAP0 0x154
> +#define CV1800_SDMA_DMA_CHANNEL_REMAP1 0x158
> +#define CV1800_TOP_TIMER_CLK_SEL 0x1a0
> +#define CV1800_TOP_WDT_CTRL 0x1a8
> +#define CV1800_DDR_AXI_URGENT_OW 0x1b8
> +#define CV1800_DDR_AXI_URGENT 0x1bc
> +#define CV1800_DDR_AXI_QOS_0 0x1d8
> +#define CV1800_DDR_AXI_QOS_1 0x1dc
> +#define CV1800_SD_PWRSW_CTRL 0x1f4
> +#define CV1800_SD_PWRSW_TIME 0x1f8
> +#define CV1800_DDR_AXI_QOS_OW 0x23c
> +#define CV1800_SD_CTRL_OPT 0x294
> +#define CV1800_SDMA_DMA_INT_MUX 0x298
Why are these register defines in soc, all the dma registers should
belong to dma driver and other IPs, why do you need a common header??
--
~Vinod
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