* Re: [PATCH 2/4] arm64: dts: rockchip: drop redundant bus-scan-delay-ms in Pinebook
From: Dragan Simic @ 2024-04-07 10:34 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
In-Reply-To: <20240407102854.38672-2-krzysztof.kozlowski@linaro.org>
Hello Krzysztof,
On 2024-04-07 12:28, Krzysztof Kozlowski wrote:
> There is no "bus-scan-delay-ms" property in the PCI bindings or Linux
> driver, so assume this was copied from downstream. This fixes
> dtbs_check warning:
>
> rk3399-pinebook-pro.dtb: pcie@f8000000: Unevaluated properties are
> not allowed ('bus-scan-delay-ms' was unexpected)
Please note that it's been already deleted. [1]
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=43853e843aa6c3d47ff2b0cce898318839483d05
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
> b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
> index 054c6a4d1a45..294eb2de263d 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
> @@ -779,7 +779,6 @@ &pcie_phy {
> };
>
> &pcie0 {
> - bus-scan-delay-ms = <1000>;
> ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
> num-lanes = <4>;
> pinctrl-names = "default";
^ permalink raw reply
* Re: [PATCH v4 2/2] arm64: dts: qcom: sm8550: Add support for Samsung Galaxy Z Fold5
From: Alexandru Serdeliuc @ 2024-04-07 10:03 UTC (permalink / raw)
To: Krzysztof Kozlowski, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
In-Reply-To: <d24628cf-a628-4eb1-ae2f-bf414b62534a@linaro.org>
Hi, please excuse my lack of knowledge, I am still trying to figure out
how to properly send a patch. Hopefully not wasting your time too much.
Here is what was changed, or I should send a v5 and add the
modifications to cover letter?
- v4
. removed a spurious new line
. removed pcie_1_phy_aux_clk as requested
. removed secondary pcie1 which does not exists on the device
. changed firmware extension from .mbn to .mdt
. added missing reserved memory regions required by firmware to
properly load
- v3
. added b4 version 3
. removed address and size cells in device description
- v2 added both but added an extra v2 in the subject line instead to b4
subject header, was requested to send the patch again, along with
following mods:
. removed whole bootargs line
. fixed underscores in reserved memory by removing all reserved
memory regions
. added missing idetation to spash_screen remark
. validated the dts with "dtbs_check"
. removed all comments at the end of nodes
. moved status of the node at the end of the node
. reversed pin control name with control numbers
. ordered the nodes alphabetically
- The initial request was split in two patches sent due to the following
checkpatch warning, was requested to re send them together:
WARNING: DT binding docs and includes should be a separate patch. See:
Documentation/devicetree/bindings/submitting-patches.rst
On 7/4/24 11:03, Krzysztof Kozlowski wrote:
> On 07/04/2024 07:38, Alexandru Marc Serdeliuc via B4 Relay wrote:
>> From: Alexandru Marc Serdeliuc <serdeliuk@yahoo.com>
>>
>> Add support for Samsung Galaxy Z Fold5 (q5q) foldable phone based on sm8550
>>
>> Currently working features:
>> - Framebuffer
>> - UFS
>> - i2c
>> - Buttons
>>
>> Signed-off-by: Alexandru Marc Serdeliuc <serdeliuk@yahoo.com>
>> ---
>> arch/arm64/boot/dts/qcom/Makefile | 1 +
> Where is the changelog? This is v4 and nothing (neither here nor in
> cover letter) explained what was happening with this patchset.
>
> Tags were ignored, so maybe comments as well?
>
> Please provide *full* and detailed changelog.
>
> Best regards,
> Krzysztof
>
^ permalink raw reply
* [PATCH 4/4] arm64: dts: rockchip: drop redundant disable-gpios in Lubancat 2
From: Krzysztof Kozlowski @ 2024-04-07 10:28 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240407102854.38672-1-krzysztof.kozlowski@linaro.org>
There is no "disable-gpios" property in the PCI bindings or Linux
driver, so assume this was copied from downstream. This property looks
like some real hardware, just described wrongly. Rockchip PCIe
controller (DesignWare based) does not define any other GPIO-s property,
except reset-gpios which is already there, so not sure what would be the
real property for this GPIO.
This fixes dtbs_check warning:
rk3568-lubancat-2.dtb: pcie@fe260000: Unevaluated properties are not allowed ('disable-gpios' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts b/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts
index a8a4cc190eb3..a3112d5df200 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts
@@ -523,7 +523,6 @@ &pcie3x2 {
&pcie2x1 {
reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
- disable-gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_mini_pcie>;
status = "okay";
};
--
2.34.1
^ permalink raw reply related
* [PATCH 3/4] arm64: dts: rockchip: drop redundant disable-gpios in Lubancat 1
From: Krzysztof Kozlowski @ 2024-04-07 10:28 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240407102854.38672-1-krzysztof.kozlowski@linaro.org>
There is no "disable-gpios" property in the PCI bindings or Linux
driver, so assume this was copied from downstream. This property looks
like some real hardware, just described wrongly. Rockchip PCIe
controller (DesignWare based) does not define any other GPIO-s property,
except reset-gpios which is already there, so not sure what would be the
real property for this GPIO.
This fixes dtbs_check warning:
rk3566-lubancat-1.dtb: pcie@fe260000: Unevaluated properties are not allowed ('disable-gpios' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts b/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts
index 6ecdf5d28339..c1194d1e438d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts
@@ -447,7 +447,6 @@ rgmii_phy1: phy@0 {
&pcie2x1 {
reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
- disable-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};
--
2.34.1
^ permalink raw reply related
* [PATCH 2/4] arm64: dts: rockchip: drop redundant bus-scan-delay-ms in Pinebook
From: Krzysztof Kozlowski @ 2024-04-07 10:28 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240407102854.38672-1-krzysztof.kozlowski@linaro.org>
There is no "bus-scan-delay-ms" property in the PCI bindings or Linux
driver, so assume this was copied from downstream. This fixes
dtbs_check warning:
rk3399-pinebook-pro.dtb: pcie@f8000000: Unevaluated properties are not allowed ('bus-scan-delay-ms' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
index 054c6a4d1a45..294eb2de263d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
@@ -779,7 +779,6 @@ &pcie_phy {
};
&pcie0 {
- bus-scan-delay-ms = <1000>;
ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
num-lanes = <4>;
pinctrl-names = "default";
--
2.34.1
^ permalink raw reply related
* [PATCH 1/4] arm64: dts: rockchip: drop redundant pcie-reset-suspend in Scarlet Dumo
From: Krzysztof Kozlowski @ 2024-04-07 10:28 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Cc: Krzysztof Kozlowski
There is no "pcie-reset-suspend" property in the PCI bindings or Linux
driver, so assume this was copied from downstream. Drop the property,
but leave the comment, because it might be useful for someone.
This fixes dtbs_check warning:
rk3399-gru-scarlet-dumo.dtb: pcie@f8000000: Unevaluated properties are not allowed ('pcie-reset-suspend' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
index 5846a11f0e84..b9d64048d46c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
@@ -689,7 +689,6 @@ &pcie0 {
ep-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
/* PERST# asserted in S3 */
- pcie-reset-suspend = <1>;
vpcie3v3-supply = <&wlan_3v3>;
vpcie1v8-supply = <&pp1800_pcie>;
--
2.34.1
^ permalink raw reply related
* [PATCH] arm64: dts: cavium: thunder2-99xx:: drop redundant reg-names
From: Krzysztof Kozlowski @ 2024-04-07 10:28 UTC (permalink / raw)
To: Robert Richter, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-kernel, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
There is no "reg-names" property in the PCI bindings and the value does
not conform to Devicetree coding style (upper-case letters, space), so
assume this was copied from downstream.
This fixes dtbs_check warning:
thunder2-99xx.dtb: pcie@30000000: Unevaluated properties are not allowed ('reg-names' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi b/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
index 3419bd252696..874d4d3a4e4f 100644
--- a/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
+++ b/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
@@ -103,7 +103,6 @@ pcie@30000000 {
/* ECAM at 0x3000_0000 - 0x4000_0000 */
reg = <0x0 0x30000000 0x0 0x10000000>;
- reg-names = "PCI ECAM";
/*
* PCI ranges:
--
2.34.1
^ permalink raw reply related
* [PATCH 3/3] dt-bindings: PCI: host-bridges: switch from deprecated pci-bus.yaml
From: Krzysztof Kozlowski @ 2024-04-07 10:20 UTC (permalink / raw)
To: Bjorn Helgaas, Lorenzo Pieralisi, Krzysztof Wilczyński,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Hector Martin,
Sven Peter, Alyssa Rosenzweig, Ray Jui, Scott Branden,
Broadcom internal kernel review list, Jim Quinlan,
Nicolas Saenz Julienne, Florian Fainelli, Will Deacon,
Linus Walleij, Srikanth Thokala, Ryder Lee, Jianjun Wang,
Sergio Paracuellos, Matthias Brugger, AngeloGioacchino Del Regno,
Daire McNamara, Bjorn Andersson, Konrad Dybcio, Marek Vasut,
Yoshihiro Shimoda, Shawn Lin, Heiko Stuebner, Jingoo Han,
Gustavo Pimentel, Manivannan Sadhasivam, Bharat Kumar Gogada,
Michal Simek, Geert Uytterhoeven, Magnus Damm, Neil Armstrong,
Mark Kettenis, Tom Joseph, Ahmad Zainie, Jiaxun Yang,
Kishon Vijay Abraham I, Thippeswamy Havalige, linux-pci,
devicetree, linux-kernel, asahi, linux-arm-kernel,
linux-rpi-kernel, linux-mediatek, linux-arm-msm,
linux-renesas-soc, linux-rockchip
Cc: Krzysztof Kozlowski
In-Reply-To: <20240407102000.37213-1-krzysztof.kozlowski@linaro.org>
dtschema package with core schemas deprecated pci-bus.yaml schema in
favor of pci-host-bridge.yaml. Update all bindings to use the latter
one.
The difference between pci-bus.yaml and pci-host-bridge.yaml is only in
lack of "reg" property defined by the latter, which should not have any
effect here, because all these bindings define the "reg".
The change is therefore quite trivial, except mediatek,mt7621-pcie.yaml
binding which have children nodes being also host bridges, apparently.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml | 2 +-
Documentation/devicetree/bindings/pci/apple,pcie.yaml | 2 +-
Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml | 2 +-
Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml | 2 +-
Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml | 2 +-
Documentation/devicetree/bindings/pci/faraday,ftpci100.yaml | 2 +-
Documentation/devicetree/bindings/pci/host-generic-pci.yaml | 2 +-
Documentation/devicetree/bindings/pci/intel,ixp4xx-pci.yaml | 2 +-
Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml | 2 +-
Documentation/devicetree/bindings/pci/loongson.yaml | 2 +-
.../devicetree/bindings/pci/mediatek,mt7621-pcie.yaml | 4 ++--
Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml | 2 +-
.../devicetree/bindings/pci/microchip,pcie-host.yaml | 2 +-
Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml | 2 +-
Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 2 +-
Documentation/devicetree/bindings/pci/rcar-pci-host.yaml | 2 +-
.../devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml | 2 +-
.../devicetree/bindings/pci/rockchip,rk3399-pcie.yaml | 2 +-
Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml | 2 +-
Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml | 2 +-
Documentation/devicetree/bindings/pci/versatile.yaml | 2 +-
Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml | 2 +-
Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml | 2 +-
Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml | 2 +-
Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml | 2 +-
25 files changed, 26 insertions(+), 26 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml b/Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml
index a5bd90bc0712..79a21ba0f9fd 100644
--- a/Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml
@@ -13,7 +13,7 @@ description:
Amlogic Meson PCIe host controller is based on the Synopsys DesignWare PCI core.
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- $ref: /schemas/pci/snps,dw-pcie-common.yaml#
# We need a select here so we don't match all nodes with 'snps,dw-pcie'
diff --git a/Documentation/devicetree/bindings/pci/apple,pcie.yaml b/Documentation/devicetree/bindings/pci/apple,pcie.yaml
index 215ff9a9c835..c8775f9cb071 100644
--- a/Documentation/devicetree/bindings/pci/apple,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/apple,pcie.yaml
@@ -85,7 +85,7 @@ required:
unevaluatedProperties: false
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- $ref: /schemas/interrupt-controller/msi-controller.yaml#
- if:
properties:
diff --git a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml
index 0e07ab61a48d..5434c144d2ec 100644
--- a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml
@@ -11,7 +11,7 @@ maintainers:
- Scott Branden <scott.branden@broadcom.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
index 22491f7f8852..11f8ea33240c 100644
--- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
@@ -108,7 +108,7 @@ required:
- msi-controller
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- $ref: /schemas/interrupt-controller/msi-controller.yaml#
- if:
properties:
diff --git a/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml
index a6b494401ebb..f4eb82e684bd 100644
--- a/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml
@@ -10,7 +10,7 @@ maintainers:
- Tom Joseph <tjoseph@cadence.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- $ref: cdns-pcie.yaml#
properties:
diff --git a/Documentation/devicetree/bindings/pci/faraday,ftpci100.yaml b/Documentation/devicetree/bindings/pci/faraday,ftpci100.yaml
index 92efbf0f1297..378dd1c8e2ee 100644
--- a/Documentation/devicetree/bindings/pci/faraday,ftpci100.yaml
+++ b/Documentation/devicetree/bindings/pci/faraday,ftpci100.yaml
@@ -51,7 +51,7 @@ description: |
<0x6000 0 0 4 &pci_intc 2>;
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
index d25423aa7167..3484e0b4b412 100644
--- a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
+++ b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
@@ -116,7 +116,7 @@ required:
- ranges
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- if:
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/intel,ixp4xx-pci.yaml b/Documentation/devicetree/bindings/pci/intel,ixp4xx-pci.yaml
index debfb54a8042..3cae2e0f7f5e 100644
--- a/Documentation/devicetree/bindings/pci/intel,ixp4xx-pci.yaml
+++ b/Documentation/devicetree/bindings/pci/intel,ixp4xx-pci.yaml
@@ -12,7 +12,7 @@ maintainers:
description: PCI host controller found in the Intel IXP4xx SoC series.
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml b/Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml
index 505acc4f3efc..1fd557504b10 100644
--- a/Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml
@@ -11,7 +11,7 @@ maintainers:
- Srikanth Thokala <srikanth.thokala@intel.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/loongson.yaml b/Documentation/devicetree/bindings/pci/loongson.yaml
index a8324a9bd002..1988465e73a1 100644
--- a/Documentation/devicetree/bindings/pci/loongson.yaml
+++ b/Documentation/devicetree/bindings/pci/loongson.yaml
@@ -13,7 +13,7 @@ description: |+
PCI host controller found on Loongson PCHs and SoCs.
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml b/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml
index 61d027239910..5bbb4a3f3dbd 100644
--- a/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml
@@ -14,7 +14,7 @@ description: |+
with 3 Root Ports. Each Root Port supports a Gen1 1-lane Link
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
@@ -33,7 +33,7 @@ properties:
patternProperties:
'^pcie@[0-2],0$':
type: object
- $ref: /schemas/pci/pci-bus.yaml#
+ $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
reg:
diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
index 7e8c7a2a5f9b..76d742051f73 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
@@ -140,7 +140,7 @@ required:
- interrupt-controller
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- if:
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
index f7a3c2636355..a3c4ddc094aa 100644
--- a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
@@ -10,7 +10,7 @@ maintainers:
- Daire McNamara <daire.mcnamara@microchip.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- $ref: /schemas/interrupt-controller/msi-controller.yaml#
properties:
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml
index 0d1b23523f62..0a39bbfcb28b 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml
@@ -95,6 +95,6 @@ anyOf:
- msi-map
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
additionalProperties: true
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index cf9a6910b542..f867746b1ae5 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -130,7 +130,7 @@ anyOf:
- msi-map
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- if:
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml b/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml
index b6a7cb32f61e..210c3f2bf94c 100644
--- a/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml
+++ b/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml
@@ -12,7 +12,7 @@ maintainers:
- Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
allOf:
- - $ref: pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml b/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
index 5a0d64d3ae6b..b288cdb1ec70 100644
--- a/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
+++ b/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
@@ -110,7 +110,7 @@ required:
- "#interrupt-cells"
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- if:
properties:
diff --git a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml
index 002b728cbc71..720a5f945a4e 100644
--- a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml
@@ -10,7 +10,7 @@ maintainers:
- Shawn Lin <shawn.lin@rock-chips.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- $ref: rockchip,rk3399-pcie-common.yaml#
properties:
diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
index 022055edbf9e..548f59d76ef2 100644
--- a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
@@ -23,7 +23,7 @@ select:
- compatible
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- $ref: /schemas/pci/snps,dw-pcie-common.yaml#
- if:
not:
diff --git a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
index a20dccbafd94..695e491b7b3b 100644
--- a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
+++ b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
@@ -11,7 +11,7 @@ maintainers:
- Kishon Vijay Abraham I <kishon@ti.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/versatile.yaml b/Documentation/devicetree/bindings/pci/versatile.yaml
index 09748ef6b94f..294c7cd84b37 100644
--- a/Documentation/devicetree/bindings/pci/versatile.yaml
+++ b/Documentation/devicetree/bindings/pci/versatile.yaml
@@ -13,7 +13,7 @@ description: |+
PCI host controller found on the ARM Versatile PB board's FPGA.
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
index 4734be456bde..b75ceefa6f93 100644
--- a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
+++ b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
@@ -10,7 +10,7 @@ maintainers:
- Bharat Kumar Gogada <bharat.kumar.gogada@amd.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml b/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml
index 69b7decabd45..fb87b960a250 100644
--- a/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml
@@ -10,7 +10,7 @@ maintainers:
- Thippeswamy Havalige <thippeswamy.havalige@amd.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml
index 426f90a47f35..b0d07c71c1c0 100644
--- a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml
@@ -10,7 +10,7 @@ maintainers:
- Thippeswamy Havalige <thippeswamy.havalige@amd.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
- $ref: /schemas/interrupt-controller/msi-controller.yaml#
properties:
diff --git a/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml b/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml
index 0aa00b8e49b3..2f59b3a73dd2 100644
--- a/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml
+++ b/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml
@@ -10,7 +10,7 @@ maintainers:
- Thippeswamy Havalige <thippeswamy.havalige@amd.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
--
2.34.1
^ permalink raw reply related
* [PATCH 2/3] dt-bindings: PCI: mediatek,mt7621: add missing child node reg
From: Krzysztof Kozlowski @ 2024-04-07 10:19 UTC (permalink / raw)
To: Bjorn Helgaas, Lorenzo Pieralisi, Krzysztof Wilczyński,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Hector Martin,
Sven Peter, Alyssa Rosenzweig, Ray Jui, Scott Branden,
Broadcom internal kernel review list, Jim Quinlan,
Nicolas Saenz Julienne, Florian Fainelli, Will Deacon,
Linus Walleij, Srikanth Thokala, Ryder Lee, Jianjun Wang,
Sergio Paracuellos, Matthias Brugger, AngeloGioacchino Del Regno,
Daire McNamara, Bjorn Andersson, Konrad Dybcio, Marek Vasut,
Yoshihiro Shimoda, Shawn Lin, Heiko Stuebner, Jingoo Han,
Gustavo Pimentel, Manivannan Sadhasivam, Bharat Kumar Gogada,
Michal Simek, Geert Uytterhoeven, Magnus Damm, Neil Armstrong,
Mark Kettenis, Tom Joseph, Ahmad Zainie, Jiaxun Yang,
Kishon Vijay Abraham I, Thippeswamy Havalige, linux-pci,
devicetree, linux-kernel, asahi, linux-arm-kernel,
linux-rpi-kernel, linux-mediatek, linux-arm-msm,
linux-renesas-soc, linux-rockchip
Cc: Krzysztof Kozlowski
In-Reply-To: <20240407102000.37213-1-krzysztof.kozlowski@linaro.org>
MT7621 PCI host bridge has children which apparently are also PCI host
bridges, at least that's what the binding suggest. The children have
"reg" property, but do not explicitly define it. Instead they rely on
pci-bus.yaml schema, but that one has "reg" without any constraints.
Define the "reg" for the children, so the binding will be more specific
and later will allow dropping reference to deprecated pci-bus.yaml
schema.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../devicetree/bindings/pci/mediatek,mt7621-pcie.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml b/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml
index e63e6458cea8..61d027239910 100644
--- a/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml
@@ -36,6 +36,9 @@ patternProperties:
$ref: /schemas/pci/pci-bus.yaml#
properties:
+ reg:
+ maxItems: 1
+
resets:
maxItems: 1
--
2.34.1
^ permalink raw reply related
* [PATCH 1/3] dt-bindings: PCI: cdns,cdns-pcie-host: drop redundant msi-parent and pci-bus.yaml
From: Krzysztof Kozlowski @ 2024-04-07 10:19 UTC (permalink / raw)
To: Bjorn Helgaas, Lorenzo Pieralisi, Krzysztof Wilczyński,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Hector Martin,
Sven Peter, Alyssa Rosenzweig, Ray Jui, Scott Branden,
Broadcom internal kernel review list, Jim Quinlan,
Nicolas Saenz Julienne, Florian Fainelli, Will Deacon,
Linus Walleij, Srikanth Thokala, Ryder Lee, Jianjun Wang,
Sergio Paracuellos, Matthias Brugger, AngeloGioacchino Del Regno,
Daire McNamara, Bjorn Andersson, Konrad Dybcio, Marek Vasut,
Yoshihiro Shimoda, Shawn Lin, Heiko Stuebner, Jingoo Han,
Gustavo Pimentel, Manivannan Sadhasivam, Bharat Kumar Gogada,
Michal Simek, Geert Uytterhoeven, Magnus Damm, Neil Armstrong,
Mark Kettenis, Tom Joseph, Ahmad Zainie, Jiaxun Yang,
Kishon Vijay Abraham I, Thippeswamy Havalige, linux-pci,
devicetree, linux-kernel, asahi, linux-arm-kernel,
linux-rpi-kernel, linux-mediatek, linux-arm-msm,
linux-renesas-soc, linux-rockchip
Cc: Krzysztof Kozlowski
The binding reference common cdns-pcie-host.yaml, which already defines
msi-parent and has a reference to pci-bus.yaml schema. Drop redundant
pieces here to make it a bit smaller.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml | 3 ---
1 file changed, 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
index bc3c48f60fff..a8190d9b100f 100644
--- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
@@ -10,7 +10,6 @@ maintainers:
- Tom Joseph <tjoseph@cadence.com>
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
- $ref: cdns-pcie-host.yaml#
properties:
@@ -25,8 +24,6 @@ properties:
- const: reg
- const: cfg
- msi-parent: true
-
required:
- reg
- reg-names
--
2.34.1
^ permalink raw reply related
* RE: [PATCH v2 2/6] dt-bindings: firmware: add i.MX SCMI Extension protocol
From: Peng Fan @ 2024-04-07 10:15 UTC (permalink / raw)
To: Krzysztof Kozlowski, Peng Fan (OSS), Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Sudeep Holla,
Cristian Marussi
Cc: devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
In-Reply-To: <ca7f1e62-5f70-4aa5-b539-764b778a71e5@kernel.org>
> Subject: Re: [PATCH v2 2/6] dt-bindings: firmware: add i.MX SCMI Extension
> protocol
>
> On 07/04/2024 02:51, Peng Fan wrote:
> >> Subject: Re: [PATCH v2 2/6] dt-bindings: firmware: add i.MX SCMI
> >> Extension protocol
> >>
> >> On 05/04/2024 14:39, Peng Fan (OSS) wrote:
> >>> From: Peng Fan <peng.fan@nxp.com>
> >>>
> >>> Add i.MX SCMI Extension protocols bindings for:
> >>> - Battery Backed Secure Module(BBSM)
> >>
> >> Which is what?
> >
> > I should say BBM(BBSM + BBNSM), BBM has RTC and ON/OFF key features,
> > but BBM is managed by SCMI firmware and exported to agent by BBM
> > protocol. So add bindings for i.MX BBM protocol.
> >
> > Is this ok?
>
> No, I still don't know what is BBSM, BBNSM and BBM.
From RM:
The Battery Backup (BB) Domain contains the Battery Backed
Security Module (BBSM) and the Battery Backed Non-Secure
Module (BBNSM).
BBNSM:
The BBNSM is the interface to a non-interruptable power
supply (backup battery) and serves as the non-volatile logic
and storage for the chip. When the chip is powered off, the
BBNSM will maintain PMIC logic while connected to a backup supply.
Main features: RTC, PMIC Control, ONOFF Control
BBSM serves as nonvolatile security logic and storage for ELE
Main features: Monotonic counter, Secure RTC,
Zeroizable Master Key,
Security Violation and Tamper Detection
>
> >
> >>
> >>> - MISC settings such as General Purpose Registers settings.
> >>>
> >>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> >>> ---
> >>> .../devicetree/bindings/firmware/imx,scmi.yaml | 80
> >> ++++++++++++++++++++++
> >>> 1 file changed, 80 insertions(+)
> >>>
> >>> diff --git
> >>> a/Documentation/devicetree/bindings/firmware/imx,scmi.yaml
> >>> b/Documentation/devicetree/bindings/firmware/imx,scmi.yaml
> >>> new file mode 100644
> >>> index 000000000000..7ee19a661d83
> >>> --- /dev/null
> >>> +++ b/Documentation/devicetree/bindings/firmware/imx,scmi.yaml
> >>> @@ -0,0 +1,80 @@
> >>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) # Copyright
> >>> +2024 NXP %YAML 1.2
> >>> +---
> >>> +$id:
> >>> +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fde
> >>>
> +vi%2F&data=05%7C02%7Cpeng.fan%40nxp.com%7C410d9f1b5b874269dc6
> 908dc5
> >>>
> +6e0b628%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638480
> 77032584
> >>>
> +3394%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2l
> uMzIiLC
> >>>
> +JBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=e4zKRcyHbSCtn
> o6%2B%
> >>> +2BBaz%2FGhvPT0HikAdLmwi4VZxX4o%3D&reserved=0
> >>>
> >>
> +cetree.org%2Fschemas%2Ffirmware%2Fimx%2Cscmi.yaml%23&data=05%7
> >> C02%7Cp
> >>>
> >>
> +eng.fan%40nxp.com%7C5d16781d3eca425a342508dc562910b7%7C686ea
> >> 1d3bc2b4c
> >>>
> >>
> +6fa92cd99c5c301635%7C0%7C0%7C638479981570959816%7CUnknown%
> >> 7CTWFpbGZsb
> >>>
> >>
> +3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn
> >> 0%3D
> >>>
> >>
> +%7C0%7C%7C%7C&sdata=mWNwPvu2eyF18MroVOBHb%2Fjeo%2BIHfV5V
> >> h%2F9ebdx65MM
> >>> +%3D&reserved=0
> >>> +$schema:
> >>> +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fde
> >>>
> +vi%2F&data=05%7C02%7Cpeng.fan%40nxp.com%7C410d9f1b5b874269dc6
> 908dc5
> >>>
> +6e0b628%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638480
> 77032585
> >>>
> +6477%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2l
> uMzIiLC
> >>>
> +JBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=y1OBJ%2FPp4
> MljifpmG
> >>> +ZM%2FB6Ab20ivqm2qef7gzEjbNmA%3D&reserved=0
> >>> +cetree.org%2Fmeta-
> >> schemas%2Fcore.yaml%23&data=05%7C02%7Cpeng.fan%40nx
> >>>
> >>
> +p.com%7C5d16781d3eca425a342508dc562910b7%7C686ea1d3bc2b4c6fa
> >> 92cd99c5c
> >>>
> >>
> +301635%7C0%7C0%7C638479981570971949%7CUnknown%7CTWFpbGZs
> >> b3d8eyJWIjoiM
> >>>
> >>
> +C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7
> >> C%7C%7
> >>>
> >>
> +C&sdata=v4XnGG00D4I8j5MJvDUVYMRTm7yRrvz0V3fUyc5KAAA%3D&reser
> >> ved=0
> >>> +
> >>> +title: i.MX System Control and Management Interface(SCMI) Vendor
> >>> +Protocols Extension
> >>> +
> >>> +maintainers:
> >>> + - Peng Fan <peng.fan@nxp.com>
> >>> +
> >>> +allOf:
> >>> + - $ref: arm,scmi.yaml#
> >>
> >> Sorry, but arm,scmi is a final schema. Is your plan to define some
> >> common part?
> >
> > No. I just wanna add vendor extension per SCMI spec.
> >
> > 0x80-0xFF:
> > Reserved for vendor or platform-specific extensions to this interface
> >
> > Each vendor may have different usage saying id 0x81, so I add i.MX
> > dt-schema file.
> >
> >>
> >>> +
> >>> +properties:
> >>> + protocol@81:
> >>> + $ref: 'arm,scmi.yaml#/$defs/protocol-node'
> >>> + unevaluatedProperties: false
> >>> + description:
> >>> + The BBM Protocol is for managing Battery Backed Secure Module
> >> (BBSM) RTC
> >>> + and the ON/OFF Key
> >>> +
> >>> + properties:
> >>> + reg:
> >>> + const: 0x81
> >>> +
> >>> + required:
> >>> + - reg
> >>> +
> >>> + protocol@84:
> >>> + $ref: 'arm,scmi.yaml#/$defs/protocol-node'
> >>> + unevaluatedProperties: false
> >>> + description:
> >>> + The MISC Protocol is for managing SoC Misc settings, such as
> >>> + GPR settings
> >>
> >> Genera register is not a setting... this is a pleonasm. Please be
> >> more specific what is the GPR, MISC protocol etc.
> >
> > The MISC Protocol is for managing SoC Misc settings, such as SAI
> > MCLK/MQS in Always On domain BLK CTRL, SAI_CLK_SEL in WAKEUP BLK
> > CTRL, gpio expanders which is under control of SCMI firmware.
>
> So like a bag for everything which you do not want to call something specific?
>
> No, be specific...
This is not linux stuff, this is i.MX SCMI firmware design.
Sadly there is no public RM for i.MX95, we could not afford each settings
has a protocol ID, it is too heavy. The name MISC is not developed for linux,
it is firmware owner decided to use it.
>
> >
> >>> +
> >>> + properties:
> >>> + reg:
> >>> + const: 0x84
> >>> +
> >>> + wakeup-sources:
> >>> + description:
> >>> + Each entry consists of 2 integers, represents the source
> >>> + and electric signal edge
> >>
> >> Can you answer questions from reviewers?
> >
> > Sorry. Is this ok?
> > minItems: 1
> > maxItems: 32
>
> No. Does it answers Rob's question? I see zero correlation to his question.
Constraints and edge, right? Edge, I have use electric signal edge, so
what else?
>
> Do not ignore emails from reviewers but respond to them.
>
> >
> >>
> >>> + items:
> >>> + items:
> >>> + - description: the wakeup source
> >>> + - description: the wakeup electric signal edge
> >>> + $ref: /schemas/types.yaml#/definitions/uint32-matrix
> >>> +
> >>> + required:
> >>> + - reg
> >>> +
> >>> +additionalProperties: false
> >>> +
> >>> +examples:
> >>> + - |
> >>> + firmware {
> >>> + scmi {
> >>> + compatible = "arm,scmi";
> >>
> >>> + mboxes = <&mu2 5 0>, <&mu2 3 0>, <&mu2 3 1>;
> >>> + shmem = <&scmi_buf0>, <&scmi_buf1>;
> >>> +
> >>> + #address-cells = <1>;
> >>> + #size-cells = <0>;
> >>> +
> >>> + protocol@81 {
> >>> + reg = <0x81>;
> >>> + };
> >>> +
> >>> + protocol@84 {
> >>> + reg = <0x84>;
> >>> + wakeup-sources = <0x8000 1
> >>> + 0x8001 1
> >>> + 0x8002 1
> >>> + 0x8003 1
> >>> + 0x8004 1>;
> >>
> >> Nothing improved... If you are going to ignore reviews, then you will
> >> only get NAKed.
> >
> > Sorry, you mean the examples, or the whole dt-schema?
>
> *Read comments and respond to them*. Regardless where they are.
Yeah. My bad.
Thanks,
Peng
>
> Best regards,
> Krzysztof
^ permalink raw reply
* Re: [RFC][PATCH 0/2] Amlogic T7 (A113D2) Clock Driver
From: Xianwei Zhao @ 2024-04-07 10:08 UTC (permalink / raw)
To: tanure
Cc: Yu Tu, Neil Armstrong, Kevin Hilman, Jerome Brunet,
Martin Blumenstingl, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Stephen Boyd, Michael Turquette, linux-arm-kernel,
linux-amlogic, devicetree, linux-kernel, linux-clk
In-Reply-To: <CAJX_Q+2wA+hNDhYtOsMi-DyuvH0KfkVgbsVFBFDj=Ph4fOEJaw@mail.gmail.com>
Hi Lucas,
Thanks for your reply.
On 2024/4/3 16:12, Lucas Tanure wrote:
> [ EXTERNAL EMAIL ]
>
> On Wed, Apr 3, 2024 at 7:44 AM Xianwei Zhao <xianwei.zhao@amlogic.com> wrote:
>>
>> Hi Lucas,
>> As we are preparing the T7 clock patchset, we would like to your
>> purpose and plan of this RFC patches. Are you going to submit these
>> patches at last?
>
> Hi Xianwei,
>
> I made some progress, and now the SD card controller probes but fails
> to read blocks from the SD card. I do think my port of the clock
> driver is okay, but I will not send my clock driver until the SD card
> fully works, so I am sure the clocking driver is tested.
> But if you have something already done, please send it, and I will
> test and review it from my side.
>
> Any help with the sdcard controller is also much appreciated.
> The SDCard part works well on our clock patchset. Then we will send the
formal clock submission later. What do you think?
> Thanks
> Lucas
>
>> On 2024/3/18 19:43, Lucas Tanure wrote:
>>> [ EXTERNAL EMAIL ]
>>>
>>> I am trying to port the T7 clock driver from Khadas 5.4 kernel for Vim4
>>> to mainline, but I am encountering some issues in the path.
>>>
>>> The kernel panics at clk_mux_val_to_index, but I believe that all the
>>> needed clocks are registered.
>>>
>>> If anyone from Amlogic or the community could help me understand what
>>> my driver is missing, that would be great.
>>> I will continue to try to figure out, but it has been some weeks
>>> without progress =/.
>>>
>>> Lucas Tanure (2):
>>> clk: meson: T7: add support for Amlogic T7 SoC PLL clock driver
>>> arm64: dts: amlogic: t7: SDCard, Ethernet and Clocking
>>>
>>> .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts | 66 +
>>> arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi | 189 +
>>> drivers/clk/meson/Kconfig | 25 +
>>> drivers/clk/meson/Makefile | 2 +
>>> drivers/clk/meson/t7-peripherals.c | 6368 +++++++++++++++++
>>> drivers/clk/meson/t7-peripherals.h | 131 +
>>> drivers/clk/meson/t7-pll.c | 1543 ++++
>>> drivers/clk/meson/t7-pll.h | 83 +
>>> .../clock/amlogic,t7-peripherals-clkc.h | 410 ++
>>> .../dt-bindings/clock/amlogic,t7-pll-clkc.h | 69 +
>>> 10 files changed, 8886 insertions(+)
>>> create mode 100644 drivers/clk/meson/t7-peripherals.c
>>> create mode 100644 drivers/clk/meson/t7-peripherals.h
>>> create mode 100644 drivers/clk/meson/t7-pll.c
>>> create mode 100644 drivers/clk/meson/t7-pll.h
>>> create mode 100644 include/dt-bindings/clock/amlogic,t7-peripherals-clkc.h
>>> create mode 100644 include/dt-bindings/clock/amlogic,t7-pll-clkc.h
>>>
>>> Starting kernel ...
>>>
>>> uboot time: 14277917 us
>>> boot 64bit kernel
>>> [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd092]
>>> [ 0.000000] Linux version 6.8.0-09793-gda876e5b54b3-dirty (tanureal@ryzen) (aarch64-none-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 10.3-2021.07 (arm-10.29)) 10.3.1 20210621, GNU ld (GNU Toolchain for the A-pr4
>>> [ 0.000000] KASLR disabled due to lack of seed
>>> [ 0.000000] Machine model: Khadas vim4
>>> [ 0.000000] efi: UEFI not found.
>>> [ 0.000000] OF: reserved mem: 0x0000000005000000..0x00000000052fffff (3072 KiB) nomap non-reusable secmon@5000000
>>> [ 0.000000] OF: reserved mem: 0x0000000005300000..0x00000000072fffff (32768 KiB) nomap non-reusable secmon@5300000
>>> [ 0.000000] NUMA: No NUMA configuration found
>>> [ 0.000000] NUMA: Faking a node at [mem 0x0000000000000000-0x00000000df7fffff]
>>> [ 0.000000] NUMA: NODE_DATA [mem 0xdf10c9c0-0xdf10efff]
>>> [ 0.000000] Zone ranges:
>>> [ 0.000000] DMA [mem 0x0000000000000000-0x00000000df7fffff]
>>> [ 0.000000] DMA32 empty
>>> [ 0.000000] Normal empty
>>> [ 0.000000] Movable zone start for each node
>>> [ 0.000000] Early memory node ranges
>>> [ 0.000000] node 0: [mem 0x0000000000000000-0x0000000004ffffff]
>>> [ 0.000000] node 0: [mem 0x0000000005000000-0x00000000072fffff]
>>> [ 0.000000] node 0: [mem 0x0000000007300000-0x00000000df7fffff]
>>> [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000df7fffff]
>>> [ 0.000000] On node 0, zone DMA: 2048 pages in unavailable ranges
>>> [ 0.000000] cma: Reserved 32 MiB at 0x00000000d9800000 on node -1
>>> [ 0.000000] psci: probing for conduit method from DT.
>>> [ 0.000000] psci: PSCIv1.0 detected in firmware.
>>> [ 0.000000] psci: Using standard PSCI v0.2 function IDs
>>> [ 0.000000] psci: Trusted OS migration not required
>>> [ 0.000000] psci: SMC Calling Convention v1.1
>>> [ 0.000000] percpu: Embedded 24 pages/cpu s58152 r8192 d31960 u98304
>>> [ 0.000000] Detected VIPT I-cache on CPU0
>>> [ 0.000000] CPU features: detected: Spectre-v2
>>> [ 0.000000] CPU features: detected: Spectre-v4
>>> [ 0.000000] CPU features: detected: Spectre-BHB
>>> [ 0.000000] CPU features: detected: ARM erratum 858921
>>> [ 0.000000] alternatives: applying boot alternatives
>>> [ 0.000000] Kernel command line: root=UUID=a91e7bfe-4263-4e53-867d-7824e7c6a992 rw rootfstype=ext4 console=ttyS0,921600 no_console_suspend earlycon=ttyS0,0xfe078000 khadas_board=VIM4 androidboot.selinux=permissive androidboot.0
>>> [ 0.000000] Unknown kernel command line parameters "khadas_board=VIM4", will be passed to user space.
>>> [ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
>>> [ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
>>> [ 0.000000] Fallback order for Node 0: 0
>>> [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 901152
>>> [ 0.000000] Policy zone: DMA
>>> [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
>>> [ 0.000000] software IO TLB: SWIOTLB bounce buffer size adjusted to 3MB
>>> [ 0.000000] software IO TLB: area num 8.
>>> [ 0.000000] software IO TLB: SWIOTLB bounce buffer size roundup to 4MB
>>> [ 0.000000] software IO TLB: mapped [mem 0x00000000d8e00000-0x00000000d9200000] (4MB)
>>> [ 0.000000] Memory: 3445944K/3661824K available (16896K kernel code, 4426K rwdata, 9184K rodata, 9728K init, 611K bss, 183112K reserved, 32768K cma-reserved)
>>> [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
>>> [ 0.000000] rcu: Preemptible hierarchical RCU implementation.
>>> [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
>>> [ 0.000000] Trampoline variant of Tasks RCU enabled.
>>> [ 0.000000] Tracing variant of Tasks RCU enabled.
>>> [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
>>> [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
>>> [ 0.000000] RCU Tasks: Setting shift to 3 and lim to 1 rcu_task_cb_adjust=1.
>>> [ 0.000000] RCU Tasks Trace: Setting shift to 3 and lim to 1 rcu_task_cb_adjust=1.
>>> [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
>>> [ 0.000000] GIC: GICv2 detected, but range too small and irqchip.gicv2_force_probe not set
>>> [ 0.000000] Root IRQ handler: gic_handle_irq
>>> [ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
>>> [ 0.000000] arch_timer: Enabling local workaround for ARM erratum 858921
>>> [ 0.000000] arch_timer: CPU0: Trapping CNTVCT access
>>> [ 0.000000] arch_timer: cp15 timer(s) running at 24.00MHz (phys).
>>> [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns
>>> [ 0.000000] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 4398046511097ns
>>> [ 0.000210] Console: colour dummy device 80x25
>>> [ 0.000253] Calibrating delay loop (skipped), value calculated using timer frequency.. 48.00 BogoMIPS (lpj=96000)
>>> [ 0.000261] pid_max: default: 32768 minimum: 301
>>> [ 0.000300] LSM: initializing lsm=capability
>>> [ 0.000358] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
>>> [ 0.000371] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
>>> [ 0.000920] cacheinfo: Unable to detect cache hierarchy for CPU 0
>>> [ 0.001389] rcu: Hierarchical SRCU implementation.
>>> [ 0.001391] rcu: Max phase no-delay instances is 1000.
>>> [ 0.001834] EFI services will not be available.
>>> [ 0.001999] smp: Bringing up secondary CPUs ...
>>> [ 0.002408] CPU features: detected: ARM erratum 845719
>>> [ 0.002426] Detected VIPT I-cache on CPU1
>>> [ 0.002516] CPU1: Booted secondary processor 0x0000000100 [0x410fd034]
>>> [ 0.003007] Detected VIPT I-cache on CPU2
>>> [ 0.003054] CPU2: Booted secondary processor 0x0000000101 [0x410fd034]
>>> [ 0.003497] Detected VIPT I-cache on CPU3
>>> [ 0.003546] CPU3: Booted secondary processor 0x0000000102 [0x410fd034]
>>> [ 0.003988] Detected VIPT I-cache on CPU4
>>> [ 0.004038] CPU4: Booted secondary processor 0x0000000103 [0x410fd034]
>>> [ 0.004472] Detected VIPT I-cache on CPU5
>>> [ 0.004509] arch_timer: Enabling local workaround for ARM erratum 858921
>>> [ 0.004519] arch_timer: CPU5: Trapping CNTVCT access
>>> [ 0.004527] CPU5: Booted secondary processor 0x0000000001 [0x410fd092]
>>> [ 0.004915] Detected VIPT I-cache on CPU6
>>> [ 0.004940] arch_timer: Enabling local workaround for ARM erratum 858921
>>> [ 0.004946] arch_timer: CPU6: Trapping CNTVCT access
>>> [ 0.004951] CPU6: Booted secondary processor 0x0000000002 [0x410fd092]
>>> [ 0.005333] Detected VIPT I-cache on CPU7
>>> [ 0.005358] arch_timer: Enabling local workaround for ARM erratum 858921
>>> [ 0.005364] arch_timer: CPU7: Trapping CNTVCT access
>>> [ 0.005369] CPU7: Booted secondary processor 0x0000000003 [0x410fd092]
>>> [ 0.005414] smp: Brought up 1 node, 8 CPUs
>>> [ 0.005419] SMP: Total of 8 processors activated.
>>> [ 0.005421] CPU: All CPU(s) started at EL2
>>> [ 0.005434] CPU features: detected: 32-bit EL0 Support
>>> [ 0.005437] CPU features: detected: 32-bit EL1 Support
>>> [ 0.005440] CPU features: detected: CRC32 instructions
>>> [ 0.005485] alternatives: applying system-wide alternatives
>>> [ 0.006730] devtmpfs: initialized
>>> [ 0.008534] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
>>> [ 0.008545] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
>>> [ 0.008989] pinctrl core: initialized pinctrl subsystem
>>> [ 0.009581] DMI not present or invalid.
>>> [ 0.011290] NET: Registered PF_NETLINK/PF_ROUTE protocol family
>>> [ 0.011944] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
>>> [ 0.012293] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
>>> [ 0.012711] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
>>> [ 0.012832] audit: initializing netlink subsys (disabled)
>>> [ 0.013075] audit: type=2000 audit(0.012:1): state=initialized audit_enabled=0 res=1
>>> [ 0.013508] thermal_sys: Registered thermal governor 'step_wise'
>>> [ 0.013512] thermal_sys: Registered thermal governor 'power_allocator'
>>> [ 0.013557] cpuidle: using governor menu
>>> [ 0.013675] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
>>> [ 0.013784] ASID allocator initialised with 65536 entries
>>> [ 0.014630] Serial: AMBA PL011 UART driver
>>> [ 0.017553] Modules: 22496 pages in range for non-PLT usage
>>> [ 0.017556] Modules: 514016 pages in range for PLT usage
>>> [ 0.017980] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
>>> [ 0.017984] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
>>> [ 0.017988] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
>>> [ 0.017990] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
>>> [ 0.017993] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
>>> [ 0.017995] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
>>> [ 0.017997] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
>>> [ 0.018000] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
>>> [ 0.018247] Demotion targets for Node 0: null
>>> [ 0.018884] ACPI: Interpreter disabled.
>>> [ 0.019584] iommu: Default domain type: Translated
>>> [ 0.019587] iommu: DMA domain TLB invalidation policy: strict mode
>>> [ 0.019979] SCSI subsystem initialized
>>> [ 0.020174] usbcore: registered new interface driver usbfs
>>> [ 0.020187] usbcore: registered new interface driver hub
>>> [ 0.020200] usbcore: registered new device driver usb
>>> [ 0.020434] pps_core: LinuxPPS API ver. 1 registered
>>> [ 0.020437] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
>>> [ 0.020443] PTP clock support registered
>>> [ 0.020487] EDAC MC: Ver: 3.0.0
>>> [ 0.020717] scmi_core: SCMI protocol bus registered
>>> [ 0.021039] FPGA manager framework
>>> [ 0.021076] Advanced Linux Sound Architecture Driver Initialized.
>>> [ 0.021612] vgaarb: loaded
>>> [ 0.021857] clocksource: Switched to clocksource arch_sys_counter
>>> [ 0.021967] VFS: Disk quotas dquot_6.6.0
>>> [ 0.021984] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
>>> [ 0.022062] pnp: PnP ACPI: disabled
>>> [ 0.026651] NET: Registered PF_INET protocol family
>>> [ 0.026781] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
>>> [ 0.028598] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
>>> [ 0.028615] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
>>> [ 0.028622] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
>>> [ 0.028750] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
>>> [ 0.029019] TCP: Hash tables configured (established 32768 bind 32768)
>>> [ 0.029096] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
>>> [ 0.029124] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
>>> [ 0.029225] NET: Registered PF_UNIX/PF_LOCAL protocol family
>>> [ 0.029506] RPC: Registered named UNIX socket transport module.
>>> [ 0.029510] RPC: Registered udp transport module.
>>> [ 0.029512] RPC: Registered tcp transport module.
>>> [ 0.029513] RPC: Registered tcp-with-tls transport module.
>>> [ 0.029515] RPC: Registered tcp NFSv4.1 backchannel transport module.
>>> [ 0.029524] PCI: CLS 0 bytes, default 64
>>> [ 0.029649] Unpacking initramfs...
>>> [ 0.033933] kvm [1]: IPA Size Limit: 40 bits
>>> [ 0.034713] kvm [1]: Hyp mode initialized successfully
>>> [ 0.035476] Initialise system trusted keyrings
>>> [ 0.035582] workingset: timestamp_bits=42 max_order=20 bucket_order=0
>>> [ 0.035747] squashfs: version 4.0 (2009/01/31) Phillip Lougher
>>> [ 0.035906] NFS: Registering the id_resolver key type
>>> [ 0.035919] Key type id_resolver registered
>>> [ 0.035922] Key type id_legacy registered
>>> [ 0.035933] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
>>> [ 0.035935] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
>>> [ 0.036031] 9p: Installing v9fs 9p2000 file system support
>>> [ 0.062587] Key type asymmetric registered
>>> [ 0.062596] Asymmetric key parser 'x509' registered
>>> [ 0.062657] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245)
>>> [ 0.062661] io scheduler mq-deadline registered
>>> [ 0.062664] io scheduler kyber registered
>>> [ 0.062688] io scheduler bfq registered
>>> [ 0.063318] irq_meson_gpio: 157 to 12 gpio interrupt mux initialized
>>> [ 0.068061] EINJ: ACPI disabled.
>>> [ 0.072570] amlogic_t7_pll_probe
>>> [ 0.072855] amlogic_t7_pll_probe ret 0
>>> [ 0.072943] amlogic_a1_periphs_probe
>>> [ 0.078155] amlogic_a1_periphs_probe ret 0
>>> [ 0.084876] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
>>> [ 0.086691] fe078000.serial: ttyS0 at MMIO 0xfe078000 (irq = 14, base_baud = 1500000) is a meson_uart
>>> [ 0.086710] printk: legacy console [ttyS0] enabled
>>> [ 0.229167] sysfs: cannot create duplicate filename '/class/tty/ttyS0'
>>> [ 0.229669] CPU: 3 PID: 1 Comm: swapper/0 Not tainted 6.8.0-09793-gda876e5b54b3-dirty #15
>>> [ 0.230684] Hardware name: Khadas vim4 (DT)
>>> [ 0.231205] Call trace:
>>> [ 0.231509] dump_backtrace+0x94/0xec
>>> [ 0.231963] show_stack+0x18/0x24
>>> [ 0.232374] dump_stack_lvl+0x78/0x90
>>> [ 0.232829] dump_stack+0x18/0x24
>>> [ 0.233241] sysfs_warn_dup+0x64/0x80
>>> [ 0.233696] sysfs_do_create_link_sd+0xf0/0xf8
>>> [ 0.234248] sysfs_create_link+0x20/0x40
>>> [ 0.234736] device_add+0x27c/0x77c
>>> [ 0.235169] device_register+0x20/0x30
>>> [ 0.235635] tty_register_device_attr+0xfc/0x240
>>> [ 0.236209] tty_port_register_device_attr_serdev+0x8c/0xac
>>> [ 0.236902] serial_core_register_port+0x318/0x658
>>> [ 0.237498] serial_ctrl_register_port+0x10/0x1c
>>> [ 0.238072] uart_add_one_port+0x10/0x1c
>>> [ 0.238560] meson_uart_probe+0x2c0/0x3b4
>>> [ 0.239058] platform_probe+0x68/0xd8
>>> [ 0.239513] really_probe+0x148/0x2b4
>>> [ 0.239968] __driver_probe_device+0x78/0x12c
>>> [ 0.240510] driver_probe_device+0xdc/0x160
>>> [ 0.241030] __driver_attach+0x94/0x19c
>>> [ 0.241507] bus_for_each_dev+0x74/0xd4
>>> [ 0.241983] driver_attach+0x24/0x30
>>> [ 0.242428] bus_add_driver+0xe4/0x1e8
>>> [ 0.242893] driver_register+0x60/0x128
>>> [ 0.243370] __platform_driver_register+0x28/0x34
>>> [ 0.243955] meson_uart_platform_driver_init+0x1c/0x28
>>> [ 0.244594] do_one_initcall+0x6c/0x1b0
>>> [ 0.245071] kernel_init_freeable+0x1cc/0x294
>>> [ 0.245613] kernel_init+0x20/0x1dc
>>> [ 0.246046] ret_from_fork+0x10/0x20
>>> [ 0.246555] meson_uart fe078000.serial: Cannot register tty device on line 0
>>> [ 0.247729] msm_serial: driver initialized
>>> [ 0.248150] SuperH (H)SCI(F) driver initialized
>>> [ 0.248544] STM32 USART driver initialized
>>> [ 0.263927] loop: module loaded
>>> [ 0.264952] megasas: 07.727.03.00-rc1
>>> [ 0.271065] tun: Universal TUN/TAP device driver, 1.6
>>> [ 0.271824] thunder_xcv, ver 1.0
>>> [ 0.271878] thunder_bgx, ver 1.0
>>> [ 0.271956] nicpf, ver 1.0
>>> [ 0.273230] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
>>> [ 0.273437] hns3: Copyright (c) 2017 Huawei Corporation.
>>> [ 0.274148] hclge is initializing
>>> [ 0.274541] e1000: Intel(R) PRO/1000 Network Driver
>>> [ 0.275116] e1000: Copyright (c) 1999-2006 Intel Corporation.
>>> [ 0.275860] e1000e: Intel(R) PRO/1000 Network Driver
>>> [ 0.276449] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
>>> [ 0.277209] igb: Intel(R) Gigabit Ethernet Network Driver
>>> [ 0.277867] igb: Copyright (c) 2007-2014 Intel Corporation.
>>> [ 0.278576] igbvf: Intel(R) Gigabit Virtual Function Network Driver
>>> [ 0.279330] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
>>> [ 0.280319] sky2: driver version 1.30
>>> [ 0.281597] VFIO - User Level meta-driver version: 0.3
>>> [ 0.283859] usbcore: registered new interface driver usb-storage
>>> [ 0.286328] i2c_dev: i2c /dev entries driver
>>> [ 0.292404] sdhci: Secure Digital Host Controller Interface driver
>>> [ 0.292481] sdhci: Copyright(c) Pierre Ossman
>>> [ 0.293577] Synopsys Designware Multimedia Card Interface Driver
>>> [ 0.294572] sdhci-pltfm: SDHCI platform and OF driver helper
>>> [ 0.296259] ledtrig-cpu: registered to indicate activity on CPUs
>>> [ 0.298966] meson-sm: secure-monitor enabled
>>> [ 0.299963] usbcore: registered new interface driver usbhid
>>> [ 0.299997] usbhid: USB HID core driver
>>> [ 0.306803] NET: Registered PF_PACKET protocol family
>>> [ 0.306919] 9pnet: Installing 9P2000 support
>>> [ 0.307331] Key type dns_resolver registered
>>> [ 0.318926] Timer migration: 1 hierarchy levels; 8 children per group; 1 crossnode level
>>> [ 0.319462] registered taskstats version 1
>>> [ 0.319968] Loading compiled-in X.509 certificates
>>> [ 0.362771] clk: Disabling unused clocks
>>> [ 0.363100] PM: genpd: Disabling unused power domains
>>> [ 0.363383] ALSA device list:
>>> [ 0.363580] No soundcards found.
>>> [ 0.368194] meson-gx-mmc fe08a000.sd: Got CD GPIO
>>> [ 0.368524] SError Interrupt on CPU6, code 0x00000000bf000002 -- SError
>>> [ 0.368531] CPU: 6 PID: 87 Comm: kworker/u32:3 Not tainted 6.8.0-09793-gda876e5b54b3-dirty #15
>>> [ 0.368537] Hardware name: Khadas vim4 (DT)
>>> [ 0.368540] Workqueue: async async_run_entry_fn
>>> [ 0.368552] pstate: 20000005 (nzCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
>>> [ 0.368556] pc : clk_mux_val_to_index+0x0/0xc0
>>> [ 0.368565] lr : clk_mux_get_parent+0x4c/0x84
>>> [ 0.368571] sp : ffff800082efba10
>>> [ 0.368572] x29: ffff800082efba10 x28: ffff8000823279c0 x27: ffff800082327000
>>> [ 0.368578] x26: ffff000004c361c0 x25: 0000000000000000 x24: 0000000000000002
>>> [ 0.368584] x23: ffff000003f1d300 x22: ffff000003f1d2a0 x21: ffff000004c37280
>>> [ 0.368589] x20: ffff000004c36ec0 x19: ffff000004bba800 x18: 0000000000000020
>>> [ 0.368594] x17: ffff000000022000 x16: 0000000000000003 x15: ffffffffffffffff
>>> [ 0.368599] x14: ffffffffffffffff x13: 0078756d2364732e x12: 3030306138306566
>>> [ 0.368604] x11: 7f7f7f7f7f7f7f7f x10: ffff7fff83438910 x9 : 0000000000000005
>>> [ 0.368609] x8 : 0101010101010101 x7 : 0000000000000000 x6 : 05114367045e5359
>>> [ 0.368613] x5 : 0000000000000006 x4 : 0000000000000000 x3 : 0000000000000000
>>> [ 0.368618] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff000004c36ec0
>>> [ 0.368624] Kernel panic - not syncing: Asynchronous SError Interrupt
>>> [ 0.368626] CPU: 6 PID: 87 Comm: kworker/u32:3 Not tainted 6.8.0-09793-gda876e5b54b3-dirty #15
>>> [ 0.368630] Hardware name: Khadas vim4 (DT)
>>> [ 0.368631] Workqueue: async async_run_entry_fn
>>> [ 0.368635] Call trace:
>>> [ 0.368637] dump_backtrace+0x94/0xec
>>> [ 0.368644] show_stack+0x18/0x24
>>> [ 0.368649] dump_stack_lvl+0x38/0x90
>>> [ 0.368656] dump_stack+0x18/0x24
>>> [ 0.368661] panic+0x388/0x3c8
>>> [ 0.368666] nmi_panic+0x48/0x94
>>> [ 0.368670] arm64_serror_panic+0x6c/0x78
>>> [ 0.368674] do_serror+0x3c/0x78
>>> [ 0.368677] el1h_64_error_handler+0x30/0x48
>>> [ 0.368681] el1h_64_error+0x64/0x68
>>> [ 0.368684] clk_mux_val_to_index+0x0/0xc0
>>> [ 0.368689] __clk_register+0x440/0x82c
>>> [ 0.368693] devm_clk_register+0x5c/0xbc
>>> [ 0.368697] meson_mmc_clk_init+0x11c/0x2a8
>>> [ 0.368702] meson_mmc_probe+0x18c/0x3c0
>>> [ 0.368705] platform_probe+0x68/0xd8
>>> [ 0.368711] really_probe+0x148/0x2b4
>>> [ 0.368714] __driver_probe_device+0x78/0x12c
>>> [ 0.368718] driver_probe_device+0xdc/0x160
>>> [ 0.368721] __device_attach_driver+0xb8/0x134
>>> [ 0.368724] bus_for_each_drv+0x84/0xe0
>>> [ 0.368727] __device_attach_async_helper+0xac/0xd0
>>> [ 0.368730] async_run_entry_fn+0x34/0xe0
>>> [ 0.368734] process_one_work+0x150/0x294
>>> [ 0.368740] worker_thread+0x304/0x408
>>> [ 0.368744] kthread+0x118/0x11c
>>> [ 0.368748] ret_from_fork+0x10/0x20
>>> [ 0.368753] SMP: stopping secondary CPUs
>>> [ 0.368760] Kernel Offset: disabled
>>> [ 0.368761] CPU features: 0x0,00000060,d0080000,0200421b
>>> [ 0.368765] Memory Limit: none
>>> [ 0.400328] ---[ end Kernel panic - not syncing: Asynchronous SError Interrupt ]---
>>>
>>>
>>> --
>>> 2.44.0
>>>
^ permalink raw reply
* RE: [PATCH v2 1/6] dt-bindings: firmware: arm,scmi: set additionalProperties to true
From: Peng Fan @ 2024-04-07 10:04 UTC (permalink / raw)
To: Krzysztof Kozlowski, Peng Fan (OSS), Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Sudeep Holla,
Cristian Marussi
Cc: devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
In-Reply-To: <09f6b752-6b72-49d7-b248-6faba2fd13a7@kernel.org>
> Subject: Re: [PATCH v2 1/6] dt-bindings: firmware: arm,scmi: set
> additionalProperties to true
>
> On 07/04/2024 02:37, Peng Fan wrote:
> >> Subject: Re: [PATCH v2 1/6] dt-bindings: firmware: arm,scmi: set
> >> additionalProperties to true
> >>
> >> On 05/04/2024 14:39, Peng Fan (OSS) wrote:
> >>> From: Peng Fan <peng.fan@nxp.com>
> >>>
> >>> When adding vendor extension protocols, there is dt-schema warning:
> >>> "
> >>> imx,scmi.example.dtb: scmi: 'protocol@81', 'protocol@84' do not
> >>> match any of the regexes: 'pinctrl-[0-9]+'
> >>> "
> >>>
> >>> Set additionalProperties to true to address the issue.
> >>
> >> I do not see anything addressed here, except making the binding
> >> accepting anything anywhere...
> >
> > I not wanna add vendor protocols in arm,scmi.yaml, so will introduce a
> > new yaml imx.scmi.yaml which add i.MX SCMI protocol extension.
> >
> > With additionalProperties set to false, I not know how, please suggest.
>
> First of all, you cannot affect negatively existing devices (their
> bindings) and your patch does exactly that. This should make you thing what
> is the correct approach...
>
> Rob gave you the comment about missing compatible - you still did not
> address that.
I added the compatible in patch 2/6 in the examples "compatible = "arm,scmi";"
>
> You need common schema referenced in arm,scmi and your device specific
> schema, also using it.
ok, let me try to figure it out.
Thanks,
Peng.
>
>
> Best regards,
> Krzysztof
^ permalink raw reply
* Re: [PATCH v4 1/2] dt-bindings: arm: qcom: Document the Samsung Galaxy Z Fold5
From: Alexandru Serdeliuc @ 2024-04-07 9:21 UTC (permalink / raw)
To: Krzysztof Kozlowski, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
In-Reply-To: <32b01e4e-dcdb-49bc-90bd-a75bb34c5b1b@linaro.org>
I am terribly sorry, this is my first patch sent here, I am still
trying to understand what and how to do it.
How to proceed with those missing tags? i should create a v5 and add them?
On 7/4/24 11:01, Krzysztof Kozlowski wrote:
> On 07/04/2024 07:38, Alexandru Marc Serdeliuc via B4 Relay wrote:
>> From: Alexandru Marc Serdeliuc <serdeliuk@yahoo.com>
>>
>> This documents Samsung Galaxy Z Fold5 (samsung,q5q)
>> which is a foldable phone by Samsung based on the sm8550 SoC.
>>
>> Signed-off-by: Alexandru Marc Serdeliuc <serdeliuk@yahoo.com>
>> ---
> This is a friendly reminder during the review process.
>
> It looks like you received a tag and forgot to add it.
>
> If you do not know the process, here is a short explanation:
> Please add Acked-by/Reviewed-by/Tested-by tags when posting new
> versions, under or above your Signed-off-by tag. Tag is "received", when
> provided in a message replied to you on the mailing list. Tools like b4
> can help here. However, there's no need to repost patches *only* to add
> the tags. The upstream maintainer will do that for tags received on the
> version they apply.
>
> https://elixir.bootlin.com/linux/v6.5-rc3/source/Documentation/process/submitting-patches.rst#L577
>
> If a tag was not added on purpose, please state why and what changed.
>
> Best regards,
> Krzysztof
>
^ permalink raw reply
* [PATCH 3/3] dt-bindings: remoteproc: qcom,sdm845-adsp-pil: Fix qcom,halt-regs definition
From: Luca Weiss @ 2024-04-07 9:58 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Mathieu Poirier, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel,
Luca Weiss
In-Reply-To: <20240407-qcom-halt-regs-fixup-v1-0-a0ea4e2c178e@z3ntu.xyz>
Set the 'items' correctly for the qcom,halt-regs property and update the
description to match what it should be.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
.../devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml
index 20df83a96ef3..a3c74871457f 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml
@@ -81,7 +81,11 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
Phandle reference to a syscon representing TCSR followed by the
- three offsets within syscon for q6, modem and nc halt registers.
+ offset within syscon for q6 halt register.
+ items:
+ - items:
+ - description: phandle to TCSR syscon region
+ - description: offset to the Q6 halt register
qcom,smem-states:
$ref: /schemas/types.yaml#/definitions/phandle-array
--
2.44.0
^ permalink raw reply related
* [PATCH 2/3] dt-bindings: remoteproc: qcom,sc7280-wpss-pil: Fix qcom,halt-regs definition
From: Luca Weiss @ 2024-04-07 9:58 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Mathieu Poirier, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel,
Luca Weiss
In-Reply-To: <20240407-qcom-halt-regs-fixup-v1-0-a0ea4e2c178e@z3ntu.xyz>
Set the 'items' correctly for the qcom,halt-regs property and update the
description to match what it should be.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
.../devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
index 9381c7022ff4..f4118b2da5f6 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
@@ -89,7 +89,11 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
Phandle reference to a syscon representing TCSR followed by the
- three offsets within syscon for q6, modem and nc halt registers.
+ offset within syscon for q6 halt register.
+ items:
+ - items:
+ - description: phandle to TCSR syscon region
+ - description: offset to the Q6 halt register
qcom,qmp:
$ref: /schemas/types.yaml#/definitions/phandle
--
2.44.0
^ permalink raw reply related
* [PATCH 1/3] dt-bindings: remoteproc: qcom,qcs404-cdsp-pil: Fix qcom,halt-regs definition
From: Luca Weiss @ 2024-04-07 9:58 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Mathieu Poirier, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel,
Luca Weiss
In-Reply-To: <20240407-qcom-halt-regs-fixup-v1-0-a0ea4e2c178e@z3ntu.xyz>
Set the 'items' correctly for the qcom,halt-regs property and update the
description to match what it should be.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
.../devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml
index 06f5f93f62a9..bca59394aef4 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml
@@ -81,7 +81,11 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
Phandle reference to a syscon representing TCSR followed by the
- three offsets within syscon for q6, modem and nc halt registers.
+ offset within syscon for q6 halt register.
+ items:
+ - items:
+ - description: phandle to TCSR syscon region
+ - description: offset to the Q6 halt register
qcom,smem-states:
$ref: /schemas/types.yaml#/definitions/phandle-array
--
2.44.0
^ permalink raw reply related
* [PATCH 0/3] Fix up qcom,halt-regs definition in various schemas
From: Luca Weiss @ 2024-04-07 9:58 UTC (permalink / raw)
To: ~postmarketos/upstreaming, phone-devel, Bjorn Andersson,
Mathieu Poirier, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-remoteproc, devicetree, linux-kernel,
Luca Weiss
The original motivation is that a bunch of other schemas fail to
validate qcom,halt-regs, for example like in the following examples:
arch/arm64/boot/dts/qcom/apq8016-sbc.dtb: remoteproc@4080000: qcom,halt-regs:0: [20] is too short
from schema $id: http://devicetree.org/schemas/remoteproc/qcom,msm8916-mss-pil.yaml#
arch/arm64/boot/dts/qcom/apq8096-ifc6640.dtb: remoteproc@2080000: qcom,halt-regs:0: [82] is too short
from schema $id: http://devicetree.org/schemas/remoteproc/qcom,msm8996-mss-pil.yaml#
arch/arm64/boot/dts/qcom/apq8039-t2.dtb: remoteproc@4080000: qcom,halt-regs:0: [32] is too short
from schema $id: http://devicetree.org/schemas/remoteproc/qcom,msm8916-mss-pil.yaml#
While I'm actually not quite sure why these patches fix this in
the other schemas - feels like a bug/limitation in dt-schema maybe? -
the patches should be correct anyways to validate qcom,halt-regs in the
schemas I'm touching.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Luca Weiss (3):
dt-bindings: remoteproc: qcom,qcs404-cdsp-pil: Fix qcom,halt-regs definition
dt-bindings: remoteproc: qcom,sc7280-wpss-pil: Fix qcom,halt-regs definition
dt-bindings: remoteproc: qcom,sdm845-adsp-pil: Fix qcom,halt-regs definition
.../devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml | 6 +++++-
.../devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml | 6 +++++-
.../devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml | 6 +++++-
3 files changed, 15 insertions(+), 3 deletions(-)
---
base-commit: 8568bb2ccc278f344e6ac44af6ed010a90aa88dc
change-id: 20240407-qcom-halt-regs-fixup-2c6cce9734e4
Best regards,
--
Luca Weiss <luca@z3ntu.xyz>
^ permalink raw reply
* [PATCH v9 4/4] ASoc: dt-bindings: PCM6240: Add initial DT binding
From: Shenghao Ding @ 2024-04-07 9:18 UTC (permalink / raw)
To: linux-kernel
Cc: lgirdwood, broonie, robh+dt, krzysztof.kozlowski+dt, conor+dt,
linux-sound, devicetree, perex, tiwai, 13916275206, mohit.chawla,
soyer, jkhuang3, tiwai, pdjuandi, manisha.agrawal, aviel,
hnagalla, praneeth, Baojun.Xu, Shenghao Ding, Rob Herring
In-Reply-To: <20240407091846.1299-1-shenghao-ding@ti.com>
PCM6240 family chips are popular among audio customers, in spite of only a
portion of the functionality of codec, such as ADC or DAC, and so on, for
different Specifications, range from Personal Electric to Automotive
Electric, even some professional fields. Yet their audio performance is far
superior to the codec's, and cost is lower than codec, and much easier to
program than codec.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shenghao Ding <shenghao-ding@ti.com>
---
v9:
- No changes.
v8:
- use some reasonable format of changelog.
- Link to v5: https://lore.kernel.org/all/20240221051501.627-4-shenghao-ding@ti.com/
---
.../devicetree/bindings/sound/ti,pcm6240.yaml | 177 ++++++++++++++++++
1 file changed, 177 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/ti,pcm6240.yaml
diff --git a/Documentation/devicetree/bindings/sound/ti,pcm6240.yaml b/Documentation/devicetree/bindings/sound/ti,pcm6240.yaml
new file mode 100644
index 000000000000..dd5b08e3d7a1
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/ti,pcm6240.yaml
@@ -0,0 +1,177 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2022 - 2024 Texas Instruments Incorporated
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/ti,pcm6240.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments PCM6240 Family Audio ADC/DAC
+
+maintainers:
+ - Shenghao Ding <shenghao-ding@ti.com>
+
+description: |
+ The PCM6240 Family is a big family of Audio ADC/DAC for
+ different Specifications, range from Personal Electric
+ to Automotive Electric, even some professional fields.
+
+ Specifications about the audio chip can be found at:
+ https://www.ti.com/lit/gpn/tlv320adc3120
+ https://www.ti.com/lit/gpn/tlv320adc5120
+ https://www.ti.com/lit/gpn/tlv320adc6120
+ https://www.ti.com/lit/gpn/dix4192
+ https://www.ti.com/lit/gpn/pcm1690
+ https://www.ti.com/lit/gpn/pcm3120-q1
+ https://www.ti.com/lit/gpn/pcm3140-q1
+ https://www.ti.com/lit/gpn/pcm5120-q1
+ https://www.ti.com/lit/gpn/pcm6120-q1
+ https://www.ti.com/lit/gpn/pcm6260-q1
+ https://www.ti.com/lit/gpn/pcm9211
+ https://www.ti.com/lit/gpn/pcmd3140
+ https://www.ti.com/lit/gpn/pcmd3180
+ https://www.ti.com/lit/gpn/taa5212
+ https://www.ti.com/lit/gpn/tad5212
+
+properties:
+ compatible:
+ description: |
+ ti,adc3120: Stereo-channel, 768-kHz, Burr-Brown™ audio analog-to-
+ digital converter (ADC) with 106-dB SNR.
+
+ ti,adc5120: 2-Channel, 768-kHz, Burr-Brown™ Audio ADC with 120-dB SNR.
+
+ ti,adc6120: Stereo-channel, 768-kHz, Burr-Brown™ audio analog-to-
+ digital converter (ADC) with 123-dB SNR.
+
+ ti,dix4192: 216-kHz digital audio converter with Quad-Channel In
+ and One-Channel Out.
+
+ ti,pcm1690: Automotive Catalog 113dB SNR 8-Channel Audio DAC with
+ Differential Outputs.
+
+ ti,pcm3120: Automotive, stereo, 106-dB SNR, 768-kHz, low-power
+ software-controlled audio ADC.
+
+ ti,pcm3140: Automotive, Quad-Channel, 768-kHz, Burr-Brown™ Audio ADC
+ with 106-dB SNR.
+
+ ti,pcm5120: Automotive, stereo, 120-dB SNR, 768-kHz, low-power
+ software-controlled audio ADC.
+
+ ti,pcm5140: Automotive, Quad-Channel, 768-kHz, Burr-Brown™ Audio ADC
+ with 120-dB SNR.
+
+ ti,pcm6120: Automotive, stereo, 123-dB SNR, 768-kHz, low-power
+ software-controlled audio ADC.
+
+ ti,pcm6140: Automotive, Quad-Channel, 768-kHz, Burr-Brown™ Audio ADC
+ with 123-dB SNR.
+
+ ti,pcm6240: Automotive 4-ch audio ADC with integrated programmable mic
+ bias, boost and input diagnostics.
+
+ ti,pcm6260: Automotive 6-ch audio ADC with integrated programmable mic
+ bias, boost and input diagnostics.
+
+ ti,pcm9211: 216-kHz digital audio converter With Stereo ADC and
+ Routing.
+
+ ti,pcmd3140: Four-channel PDM-input to TDM or I2S output converter.
+
+ ti,pcmd3180: Eight-channel pulse-density-modulation input to TDM or
+ I2S output converter.
+
+ ti,taa5212: Low-power high-performance stereo audio ADC with 118-dB
+ dynamic range.
+
+ ti,tad5212: Low-power stereo audio DAC with 120-dB dynamic range.
+ oneOf:
+ - items:
+ - enum:
+ - ti,adc3120
+ - ti,adc5120
+ - ti,pcm3120
+ - ti,pcm5120
+ - ti,pcm6120
+ - const: ti,adc6120
+ - items:
+ - enum:
+ - ti,pcmd512x
+ - ti,pcm9211
+ - ti,taa5212
+ - ti,tad5212
+ - const: ti,adc6120
+ - items:
+ - enum:
+ - ti,pcm3140
+ - ti,pcm5140
+ - ti,dix4192
+ - ti,pcm6140
+ - ti,pcm6260
+ - const: ti,pcm6240
+ - items:
+ - enum:
+ - ti,pcmd3140
+ - ti,pcmd3180
+ - ti,pcm1690
+ - ti,taa5412
+ - ti,tad5412
+ - const: ti,pcm6240
+ - enum:
+ - ti,adc6120
+ - ti,pcm6240
+
+ reg:
+ description:
+ I2C address, in multiple pcmdevices case, all the i2c address
+ aggregate as one Audio Device to support multiple audio slots.
+ minItems: 1
+ maxItems: 4
+
+ reset-gpios:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+ description:
+ Invalid only for ti,pcm1690 because of no INT pin.
+
+ '#sound-dai-cells':
+ const: 0
+
+required:
+ - compatible
+ - reg
+
+allOf:
+ - $ref: dai-common.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - ti,pcm1690
+ then:
+ properties:
+ interrupts: false
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ i2c {
+ /* example for two devices with interrupt support */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pcm6240: audio-codec@48 {
+ compatible = "ti,pcm6240";
+ reg = <0x48>, /* primary-device */
+ <0x4b>; /* secondary-device */
+ #sound-dai-cells = <0>;
+ reset-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <15>;
+ };
+ };
+...
--
2.35.7
^ permalink raw reply related
* [PATCH v9 2/4] ASoc: PCM6240: Create header file for PCM6240 Family driver code
From: Shenghao Ding @ 2024-04-07 9:18 UTC (permalink / raw)
To: linux-kernel
Cc: lgirdwood, broonie, robh+dt, krzysztof.kozlowski+dt, conor+dt,
linux-sound, devicetree, perex, tiwai, 13916275206, mohit.chawla,
soyer, jkhuang3, tiwai, pdjuandi, manisha.agrawal, aviel,
hnagalla, praneeth, Baojun.Xu, Shenghao Ding
In-Reply-To: <20240407091846.1299-1-shenghao-ding@ti.com>
PCM6240 driver implements a flexible and configurable setting for register
and filter coefficients, to one, two or even multiple PCM6240 Family Audio
chips.
Signed-off-by: Shenghao Ding <shenghao-ding@ti.com>
---
v9:
- Add upper_dev_name in pcmdevice_priv for kcontrol complying with alsa
naming
v8:
- use some reasonable format of changelog.
- Link to v3: https://lore.kernel.org/all/20240203030504.1724-2-shenghao-ding@ti.com/
V7:
- No changes.
V6:
- No changes.
V5:
- No changes.
V4:
- No changes.
V3:
- remove unused data structure.
- Link to v2: https://lore.kernel.org/all/20240126035855.1785-2-shenghao-ding@ti.com/
---
sound/soc/codecs/pcm6240.h | 252 +++++++++++++++++++++++++++++++++++++
1 file changed, 252 insertions(+)
create mode 100644 sound/soc/codecs/pcm6240.h
diff --git a/sound/soc/codecs/pcm6240.h b/sound/soc/codecs/pcm6240.h
new file mode 100644
index 000000000000..7c8f1b53d51f
--- /dev/null
+++ b/sound/soc/codecs/pcm6240.h
@@ -0,0 +1,252 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+//
+// ALSA SoC Texas Instruments PCM6240 Family Audio ADC/DAC/Router
+//
+// Copyright (C) 2022 - 2024 Texas Instruments Incorporated
+// https://www.ti.com
+//
+// The PCM6240 driver implements a flexible and configurable
+// algo coefficient setting for one, two, or even multiple
+// PCM6240 Family Audio chips.
+//
+// Author: Shenghao Ding <shenghao-ding@ti.com>
+//
+
+#ifndef __PCM6240_H__
+#define __PCM6240_H__
+
+enum pcm_device {
+ ADC3120,
+ ADC5120,
+ ADC6120,
+ DIX4192,
+ PCM1690,
+ PCM3120,
+ PCM3140,
+ PCM5120,
+ PCM5140,
+ PCM6120,
+ PCM6140,
+ PCM6240,
+ PCM6260,
+ PCM9211,
+ PCMD3140,
+ PCMD3180,
+ PCMD512X,
+ TAA5212,
+ TAA5412,
+ TAD5212,
+ TAD5412,
+ MAX_DEVICE,
+};
+
+#define PCMDEV_GENERIC_VOL_CTRL 0x0
+#define PCMDEV_PCM1690_VOL_CTRL 0x1
+#define PCMDEV_PCM1690_FINE_VOL_CTRL 0x2
+
+/* Maximum number of I2C addresses */
+#define PCMDEVICE_MAX_I2C_DEVICES 4
+/* Maximum number defined in REGBIN protocol */
+#define PCMDEVICE_MAX_REGBIN_DEVICES 8
+#define PCMDEVICE_CONFIG_SUM 64
+#define PCMDEVICE_BIN_FILENAME_LEN 64
+
+#define PCMDEVICE_RATES (SNDRV_PCM_RATE_44100 | \
+ SNDRV_PCM_RATE_48000)
+#define PCMDEVICE_MAX_CHANNELS 8
+#define PCMDEVICE_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
+ SNDRV_PCM_FMTBIT_S20_3LE | \
+ SNDRV_PCM_FMTBIT_S24_3LE | \
+ SNDRV_PCM_FMTBIT_S24_LE | \
+ SNDRV_PCM_FMTBIT_S32_LE)
+
+/* PAGE Control Register (available in page0 of each book) */
+#define PCMDEVICE_PAGE_SELECT 0x00
+#define PCMDEVICE_REG(page, reg) ((page * 128) + reg)
+#define PCMDEVICE_REG_SWRESET PCMDEVICE_REG(0X0, 0x01)
+#define PCMDEVICE_REG_SWRESET_RESET BIT(0)
+
+#define ADC5120_REG_CH1_ANALOG_GAIN PCMDEVICE_REG(0X0, 0x3d)
+#define ADC5120_REG_CH1_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x3e)
+#define ADC5120_REG_CH2_ANALOG_GAIN PCMDEVICE_REG(0X0, 0x42)
+#define ADC5120_REG_CH2_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x43)
+
+#define PCM1690_REG_MODE_CTRL PCMDEVICE_REG(0X0, 0x46)
+#define PCM1690_REG_MODE_CTRL_DAMS_MSK BIT(7)
+#define PCM1690_REG_MODE_CTRL_DAMS_FINE_STEP 0x0
+#define PCM1690_REG_MODE_CTRL_DAMS_WIDE_RANGE 0x80
+
+#define PCM1690_REG_CH1_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x48)
+#define PCM1690_REG_CH2_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x49)
+#define PCM1690_REG_CH3_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x4a)
+#define PCM1690_REG_CH4_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x4b)
+#define PCM1690_REG_CH5_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x4c)
+#define PCM1690_REG_CH6_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x4d)
+#define PCM1690_REG_CH7_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x4e)
+#define PCM1690_REG_CH8_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x4f)
+
+#define PCM6240_REG_CH1_ANALOG_GAIN PCMDEVICE_REG(0X0, 0x3d)
+#define PCM6240_REG_CH1_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x3e)
+#define PCM6240_REG_CH2_ANALOG_GAIN PCMDEVICE_REG(0X0, 0x42)
+#define PCM6240_REG_CH2_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x43)
+#define PCM6240_REG_CH3_ANALOG_GAIN PCMDEVICE_REG(0X0, 0x47)
+#define PCM6240_REG_CH3_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x48)
+#define PCM6240_REG_CH4_ANALOG_GAIN PCMDEVICE_REG(0X0, 0x4c)
+#define PCM6240_REG_CH4_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x4d)
+
+#define PCM6260_REG_CH1_ANALOG_GAIN PCMDEVICE_REG(0X0, 0x3d)
+#define PCM6260_REG_CH1_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x3e)
+#define PCM6260_REG_CH2_ANALOG_GAIN PCMDEVICE_REG(0X0, 0x42)
+#define PCM6260_REG_CH2_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x43)
+#define PCM6260_REG_CH3_ANALOG_GAIN PCMDEVICE_REG(0X0, 0x47)
+#define PCM6260_REG_CH3_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x48)
+#define PCM6260_REG_CH4_ANALOG_GAIN PCMDEVICE_REG(0X0, 0x4c)
+#define PCM6260_REG_CH4_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x4d)
+#define PCM6260_REG_CH5_ANALOG_GAIN PCMDEVICE_REG(0X0, 0x51)
+#define PCM6260_REG_CH5_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x52)
+#define PCM6260_REG_CH6_ANALOG_GAIN PCMDEVICE_REG(0X0, 0x56)
+#define PCM6260_REG_CH6_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x57)
+
+#define PCM9211_REG_SW_CTRL PCMDEVICE_REG(0X0, 0x40)
+#define PCM9211_REG_SW_CTRL_MRST_MSK BIT(7)
+#define PCM9211_REG_SW_CTRL_MRST 0x0
+
+#define PCM9211_REG_CH1_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x46)
+#define PCM9211_REG_CH2_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x47)
+
+#define PCMD3140_REG_CH1_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x3E)
+#define PCMD3140_REG_CH2_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x43)
+#define PCMD3140_REG_CH3_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x48)
+#define PCMD3140_REG_CH4_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x4D)
+
+#define PCMD3140_REG_CH1_FINE_GAIN PCMDEVICE_REG(0X0, 0x3F)
+#define PCMD3140_REG_CH2_FINE_GAIN PCMDEVICE_REG(0X0, 0x44)
+#define PCMD3140_REG_CH3_FINE_GAIN PCMDEVICE_REG(0X0, 0x49)
+#define PCMD3140_REG_CH4_FINE_GAIN PCMDEVICE_REG(0X0, 0x4E)
+
+#define PCMD3180_REG_CH1_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x3E)
+#define PCMD3180_REG_CH2_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x43)
+#define PCMD3180_REG_CH3_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x48)
+#define PCMD3180_REG_CH4_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x4D)
+#define PCMD3180_REG_CH5_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x52)
+#define PCMD3180_REG_CH6_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x57)
+#define PCMD3180_REG_CH7_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x5C)
+#define PCMD3180_REG_CH8_DIGITAL_GAIN PCMDEVICE_REG(0X0, 0x61)
+
+#define PCMD3180_REG_CH1_FINE_GAIN PCMDEVICE_REG(0X0, 0x3F)
+#define PCMD3180_REG_CH2_FINE_GAIN PCMDEVICE_REG(0X0, 0x44)
+#define PCMD3180_REG_CH3_FINE_GAIN PCMDEVICE_REG(0X0, 0x49)
+#define PCMD3180_REG_CH4_FINE_GAIN PCMDEVICE_REG(0X0, 0x4E)
+#define PCMD3180_REG_CH5_FINE_GAIN PCMDEVICE_REG(0X0, 0x53)
+#define PCMD3180_REG_CH6_FINE_GAIN PCMDEVICE_REG(0X0, 0x58)
+#define PCMD3180_REG_CH7_FINE_GAIN PCMDEVICE_REG(0X0, 0x5D)
+#define PCMD3180_REG_CH8_FINE_GAIN PCMDEVICE_REG(0X0, 0x62)
+
+#define TAA5412_REG_CH1_DIGITAL_VOLUME PCMDEVICE_REG(0X0, 0x52)
+#define TAA5412_REG_CH2_DIGITAL_VOLUME PCMDEVICE_REG(0X0, 0x57)
+#define TAA5412_REG_CH3_DIGITAL_VOLUME PCMDEVICE_REG(0X0, 0x5B)
+#define TAA5412_REG_CH4_DIGITAL_VOLUME PCMDEVICE_REG(0X0, 0x5F)
+
+#define TAA5412_REG_CH1_FINE_GAIN PCMDEVICE_REG(0X0, 0x53)
+#define TAA5412_REG_CH2_FINE_GAIN PCMDEVICE_REG(0X0, 0x58)
+#define TAA5412_REG_CH3_FINE_GAIN PCMDEVICE_REG(0X0, 0x5C)
+#define TAA5412_REG_CH4_FINE_GAIN PCMDEVICE_REG(0X0, 0x60)
+
+#define PCMDEVICE_CMD_SING_W 0x1
+#define PCMDEVICE_CMD_BURST 0x2
+#define PCMDEVICE_CMD_DELAY 0x3
+#define PCMDEVICE_CMD_FIELD_W 0x4
+
+enum pcmdevice_bin_blk_type {
+ PCMDEVICE_BIN_BLK_COEFF = 1,
+ PCMDEVICE_BIN_BLK_POST_POWER_UP,
+ PCMDEVICE_BIN_BLK_PRE_SHUTDOWN,
+ PCMDEVICE_BIN_BLK_PRE_POWER_UP,
+ PCMDEVICE_BIN_BLK_POST_SHUTDOWN
+};
+
+enum pcmdevice_fw_state {
+ PCMDEVICE_FW_LOAD_OK = 0,
+ PCMDEVICE_FW_LOAD_FAILED
+};
+
+struct pcmdevice_regbin_hdr {
+ unsigned int img_sz;
+ unsigned int checksum;
+ unsigned int binary_version_num;
+ unsigned int drv_fw_version;
+ unsigned int timestamp;
+ unsigned char plat_type;
+ unsigned char dev_family;
+ unsigned char reserve;
+ unsigned char ndev;
+ unsigned char devs[PCMDEVICE_MAX_REGBIN_DEVICES];
+ unsigned int nconfig;
+ unsigned int config_size[PCMDEVICE_CONFIG_SUM];
+};
+
+struct pcmdevice_block_data {
+ unsigned char dev_idx;
+ unsigned char block_type;
+ unsigned short yram_checksum;
+ unsigned int block_size;
+ unsigned int n_subblks;
+ unsigned char *regdata;
+};
+
+struct pcmdevice_config_info {
+ char cfg_name[64];
+ unsigned int nblocks;
+ unsigned int real_nblocks;
+ unsigned char active_dev;
+ struct pcmdevice_block_data **blk_data;
+};
+
+struct pcmdevice_regbin {
+ struct pcmdevice_regbin_hdr fw_hdr;
+ int ncfgs;
+ struct pcmdevice_config_info **cfg_info;
+};
+
+struct pcmdevice_irqinfo {
+ int gpio;
+ int nmb;
+};
+
+struct pcmdevice_priv {
+ struct snd_soc_component *component;
+ struct i2c_client *client;
+ struct device *dev;
+ struct mutex codec_lock;
+ struct gpio_desc *hw_rst;
+ struct regmap *regmap;
+ struct pcmdevice_regbin regbin;
+ struct pcmdevice_irqinfo irq_info;
+ unsigned int addr[PCMDEVICE_MAX_I2C_DEVICES];
+ unsigned int chip_id;
+ int cur_conf;
+ int fw_state;
+ int ndev;
+ unsigned char bin_name[PCMDEVICE_BIN_FILENAME_LEN];
+ /* used for kcontrol name */
+ unsigned char upper_dev_name[I2C_NAME_SIZE];
+ unsigned char dev_name[I2C_NAME_SIZE];
+};
+
+/* mixer control */
+struct pcmdevice_mixer_control {
+ int max;
+ int reg;
+ unsigned int dev_no;
+ unsigned int shift;
+ unsigned int invert;
+};
+struct pcmdev_ctrl_info {
+ const unsigned int *gain;
+ const struct pcmdevice_mixer_control *pcmdev_ctrl;
+ unsigned int ctrl_array_size;
+ snd_kcontrol_get_t *get;
+ snd_kcontrol_put_t *put;
+ int pcmdev_ctrl_name_id;
+};
+#endif /* __PCM6240_H__ */
--
2.35.7
^ permalink raw reply related
* [PATCH v9 3/4] ASoc: PCM6240: Add compile item for PCM6240 Family driver
From: Shenghao Ding @ 2024-04-07 9:18 UTC (permalink / raw)
To: linux-kernel
Cc: lgirdwood, broonie, robh+dt, krzysztof.kozlowski+dt, conor+dt,
linux-sound, devicetree, perex, tiwai, 13916275206, mohit.chawla,
soyer, jkhuang3, tiwai, pdjuandi, manisha.agrawal, aviel,
hnagalla, praneeth, Baojun.Xu, Shenghao Ding
In-Reply-To: <20240407091846.1299-1-shenghao-ding@ti.com>
PCM6240 driver implements a flexible and configurable setting for register
and filter coefficients, to one, two or even multiple PCM6240 Family Audio
chips.
Signed-off-by: Shenghao Ding <shenghao-ding@ti.com>
---
v9:
- No changes.
v8:
- use some reasonable format of changelog.
- Link to v2: https://lore.kernel.org/all/20240126035855.1785-3-shenghao-ding@ti.com/
---
sound/soc/codecs/Kconfig | 10 ++++++++++
sound/soc/codecs/Makefile | 2 ++
2 files changed, 12 insertions(+)
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index f78ea2f86fa6..0c35cdfd4a47 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -179,6 +179,7 @@ config SND_SOC_ALL_CODECS
imply SND_SOC_PCM5102A
imply SND_SOC_PCM512x_I2C
imply SND_SOC_PCM512x_SPI
+ imply SND_SOC_PCM6240
imply SND_SOC_PEB2466
imply SND_SOC_RK3328
imply SND_SOC_RK817
@@ -1422,6 +1423,15 @@ config SND_SOC_PCM512x_SPI
select SND_SOC_PCM512x
select REGMAP_SPI
+config SND_SOC_PCM6240
+ tristate "Texas Instruments PCM6240 Family Audio chips based on I2C"
+ depends on I2C
+ help
+ Enable support for Texas Instruments PCM6240 Family Audio chips.
+ Note the PCM6240 driver implements a flexible and configurable
+ setting for register and filter coefficients, to one, two or
+ even multiple PCM6240 Family Audio chips.
+
config SND_SOC_PEB2466
tristate "Infineon PEB2466 quad PCM codec"
depends on SPI
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile
index 7c075539dc47..5553155b843b 100644
--- a/sound/soc/codecs/Makefile
+++ b/sound/soc/codecs/Makefile
@@ -204,6 +204,7 @@ snd-soc-pcm5102a-objs := pcm5102a.o
snd-soc-pcm512x-objs := pcm512x.o
snd-soc-pcm512x-i2c-objs := pcm512x-i2c.o
snd-soc-pcm512x-spi-objs := pcm512x-spi.o
+snd-soc-pcm6240-objs := pcm6240.o
snd-soc-peb2466-objs := peb2466.o
snd-soc-rk3328-objs := rk3328_codec.o
snd-soc-rk817-objs := rk817_codec.o
@@ -594,6 +595,7 @@ obj-$(CONFIG_SND_SOC_PCM5102A) += snd-soc-pcm5102a.o
obj-$(CONFIG_SND_SOC_PCM512x) += snd-soc-pcm512x.o
obj-$(CONFIG_SND_SOC_PCM512x_I2C) += snd-soc-pcm512x-i2c.o
obj-$(CONFIG_SND_SOC_PCM512x_SPI) += snd-soc-pcm512x-spi.o
+obj-$(CONFIG_SND_SOC_PCM6240) += snd-soc-pcm6240.o
obj-$(CONFIG_SND_SOC_PEB2466) += snd-soc-peb2466.o
obj-$(CONFIG_SND_SOC_RK3328) += snd-soc-rk3328.o
obj-$(CONFIG_SND_SOC_RK817) += snd-soc-rk817.o
--
2.35.7
^ permalink raw reply related
* [PATCH v9 1/4] ASoc: PCM6240: Create PCM6240 Family driver code
From: Shenghao Ding @ 2024-04-07 9:18 UTC (permalink / raw)
To: linux-kernel
Cc: lgirdwood, broonie, robh+dt, krzysztof.kozlowski+dt, conor+dt,
linux-sound, devicetree, perex, tiwai, 13916275206, mohit.chawla,
soyer, jkhuang3, tiwai, pdjuandi, manisha.agrawal, aviel,
hnagalla, praneeth, Baojun.Xu, Shenghao Ding
In-Reply-To: <20240407091846.1299-1-shenghao-ding@ti.com>
PCM6240 driver implements a flexible and configurable setting for register
and filter coefficients, to one, two or even multiple PCM6240 Family Audio
chips.
Signed-off-by: Shenghao Ding <shenghao-ding@ti.com>
---
v9:
- fixed wrong return value in order to report errors to users in
pcmdev_put_volsw
- fixed indentation in pcmdevice_process_block， each case was
encapsulated into a function
- Gain kcontrols end with Volume
- rename the Gain kcontrol
- Add upper_dev_name in pcmdevice_priv for kcontrol complying with alsa
naming
v8:
- use some reasonable format of changelog.
- | Reported-by: kernel test robot <lkp@intel.com>
| Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
| Closes: https://lore.kernel.org/r/202404021225.mx5KlUlV-lkp@intel.com/
- Link to v7: https://lore.kernel.org/all/20240331021835.1470-2-shenghao-ding@ti.com/
---
sound/soc/codecs/pcm6240.c | 2217 ++++++++++++++++++++++++++++++++++++
1 file changed, 2217 insertions(+)
create mode 100644 sound/soc/codecs/pcm6240.c
diff --git a/sound/soc/codecs/pcm6240.c b/sound/soc/codecs/pcm6240.c
new file mode 100644
index 000000000000..93d592dbee66
--- /dev/null
+++ b/sound/soc/codecs/pcm6240.c
@@ -0,0 +1,2217 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// ALSA SoC Texas Instruments PCM6240 Family Audio ADC/DAC Device
+//
+// Copyright (C) 2022 - 2024 Texas Instruments Incorporated
+// https://www.ti.com
+//
+// The PCM6240 driver implements a flexible and configurable
+// algo coefficient setting for one, two, or even multiple
+// PCM6240 Family chips.
+//
+// Author: Shenghao Ding <shenghao-ding@ti.com>
+//
+
+#include <asm/unaligned.h>
+#include <linux/firmware.h>
+#include <linux/gpio.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/of_irq.h>
+#include <linux/regmap.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <sound/tlv.h>
+
+#include "pcm6240.h"
+
+static const struct i2c_device_id pcmdevice_i2c_id[] = {
+ { "adc3120", ADC3120 },
+ { "adc5120", ADC5120 },
+ { "adc6120", ADC6120 },
+ { "dix4192", DIX4192 },
+ { "pcm1690", PCM1690 },
+ { "pcm3120", PCM3120 },
+ { "pcm3140", PCM3140 },
+ { "pcm5120", PCM5120 },
+ { "pcm5140", PCM5140 },
+ { "pcm6120", PCM6120 },
+ { "pcm6140", PCM6140 },
+ { "pcm6240", PCM6240 },
+ { "pcm6260", PCM6260 },
+ { "pcm9211", PCM9211 },
+ { "pcmd3140", PCMD3140 },
+ { "pcmd3180", PCMD3180 },
+ { "pcmd512x", PCMD512X },
+ { "taa5212", TAA5212 },
+ { "taa5412", TAA5412 },
+ { "tad5212", TAD5212 },
+ { "tad5412", TAD5412 },
+ {}
+};
+MODULE_DEVICE_TABLE(i2c, pcmdevice_i2c_id);
+
+static const char *const pcmdev_ctrl_name[] = {
+ "%s i2c%d Dev%d Ch%d Ana Volume",
+ "%s i2c%d Dev%d Ch%d Digi Volume",
+ "%s i2c%d Dev%d Ch%d Fine Volume",
+};
+
+static const char *const pcmdev_ctrl_name_with_prefix[] = {
+ "%s Dev%d Ch%d Ana Volume",
+ "%s Dev%d Ch%d Digi Volume",
+ "%s Dev%d Ch%d Fine Volume",
+};
+
+static const struct pcmdevice_mixer_control adc5120_analog_gain_ctl[] = {
+ {
+ .shift = 1,
+ .reg = ADC5120_REG_CH1_ANALOG_GAIN,
+ .max = 0x54,
+ .invert = 0,
+ },
+ {
+ .shift = 1,
+ .reg = ADC5120_REG_CH2_ANALOG_GAIN,
+ .max = 0x54,
+ .invert = 0,
+ }
+};
+
+static const struct pcmdevice_mixer_control adc5120_digi_gain_ctl[] = {
+ {
+ .shift = 0,
+ .reg = ADC5120_REG_CH1_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = ADC5120_REG_CH2_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ }
+};
+
+static const struct pcmdevice_mixer_control pcm1690_digi_gain_ctl[] = {
+ {
+ .shift = 0,
+ .reg = PCM1690_REG_CH1_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCM1690_REG_CH2_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCM1690_REG_CH3_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCM1690_REG_CH4_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCM1690_REG_CH5_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCM1690_REG_CH6_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCM1690_REG_CH7_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCM1690_REG_CH8_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ }
+};
+
+static const struct pcmdevice_mixer_control pcm6240_analog_gain_ctl[] = {
+ {
+ .shift = 2,
+ .reg = PCM6240_REG_CH1_ANALOG_GAIN,
+ .max = 0x42,
+ .invert = 0,
+ },
+ {
+ .shift = 2,
+ .reg = PCM6240_REG_CH2_ANALOG_GAIN,
+ .max = 0x42,
+ .invert = 0,
+ },
+ {
+ .shift = 2,
+ .reg = PCM6240_REG_CH3_ANALOG_GAIN,
+ .max = 0x42,
+ .invert = 0,
+ },
+ {
+ .shift = 2,
+ .reg = PCM6240_REG_CH4_ANALOG_GAIN,
+ .max = 0x42,
+ .invert = 0,
+ }
+};
+
+static const struct pcmdevice_mixer_control pcm6240_digi_gain_ctl[] = {
+ {
+ .shift = 0,
+ .reg = PCM6240_REG_CH1_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCM6240_REG_CH2_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCM6240_REG_CH3_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCM6240_REG_CH4_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ }
+};
+
+static const struct pcmdevice_mixer_control pcm6260_analog_gain_ctl[] = {
+ {
+ .shift = 2,
+ .reg = PCM6260_REG_CH1_ANALOG_GAIN,
+ .max = 0x42,
+ .invert = 0,
+ },
+ {
+ .shift = 2,
+ .reg = PCM6260_REG_CH2_ANALOG_GAIN,
+ .max = 0x42,
+ .invert = 0,
+ },
+ {
+ .shift = 2,
+ .reg = PCM6260_REG_CH3_ANALOG_GAIN,
+ .max = 0x42,
+ .invert = 0,
+ },
+ {
+ .shift = 2,
+ .reg = PCM6260_REG_CH4_ANALOG_GAIN,
+ .max = 0x42,
+ .invert = 0,
+ },
+ {
+ .shift = 2,
+ .reg = PCM6260_REG_CH5_ANALOG_GAIN,
+ .max = 0x42,
+ .invert = 0,
+ },
+ {
+ .shift = 2,
+ .reg = PCM6260_REG_CH6_ANALOG_GAIN,
+ .max = 0x42,
+ .invert = 0,
+ }
+};
+
+static const struct pcmdevice_mixer_control pcm6260_digi_gain_ctl[] = {
+ {
+ .shift = 0,
+ .reg = PCM6260_REG_CH1_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCM6260_REG_CH2_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCM6260_REG_CH3_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCM6260_REG_CH4_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCM6260_REG_CH5_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCM6260_REG_CH6_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ }
+};
+
+static const struct pcmdevice_mixer_control pcm9211_digi_gain_ctl[] = {
+ {
+ .shift = 0,
+ .reg = PCM9211_REG_CH1_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCM9211_REG_CH2_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ }
+};
+
+static const struct pcmdevice_mixer_control pcmd3140_digi_gain_ctl[] = {
+ {
+ .shift = 0,
+ .reg = PCMD3140_REG_CH1_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCMD3140_REG_CH2_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCMD3140_REG_CH3_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCMD3140_REG_CH4_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ }
+};
+
+static const struct pcmdevice_mixer_control pcmd3140_fine_gain_ctl[] = {
+ {
+ .shift = 4,
+ .reg = PCMD3140_REG_CH1_FINE_GAIN,
+ .max = 0xf,
+ .invert = 0,
+ },
+ {
+ .shift = 4,
+ .reg = PCMD3140_REG_CH2_FINE_GAIN,
+ .max = 0xf,
+ .invert = 0,
+ },
+ {
+ .shift = 4,
+ .reg = PCMD3140_REG_CH3_FINE_GAIN,
+ .max = 0xf,
+ .invert = 0,
+ },
+ {
+ .shift = 4,
+ .reg = PCMD3140_REG_CH4_FINE_GAIN,
+ .max = 0xf,
+ .invert = 0,
+ }
+};
+
+static const struct pcmdevice_mixer_control pcmd3180_digi_gain_ctl[] = {
+ {
+ .shift = 0,
+ .reg = PCMD3180_REG_CH1_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCMD3180_REG_CH2_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCMD3180_REG_CH3_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCMD3180_REG_CH4_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCMD3180_REG_CH5_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCMD3180_REG_CH6_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCMD3180_REG_CH7_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = PCMD3180_REG_CH8_DIGITAL_GAIN,
+ .max = 0xff,
+ .invert = 0,
+ }
+};
+
+static const struct pcmdevice_mixer_control pcmd3180_fine_gain_ctl[] = {
+ {
+ .shift = 4,
+ .reg = PCMD3180_REG_CH1_FINE_GAIN,
+ .max = 0xf,
+ .invert = 0,
+ },
+ {
+ .shift = 4,
+ .reg = PCMD3180_REG_CH2_FINE_GAIN,
+ .max = 0xf,
+ .invert = 0,
+ },
+ {
+ .shift = 4,
+ .reg = PCMD3180_REG_CH3_FINE_GAIN,
+ .max = 0xf,
+ .invert = 0,
+ },
+ {
+ .shift = 4,
+ .reg = PCMD3180_REG_CH4_FINE_GAIN,
+ .max = 0xf,
+ .invert = 0,
+ },
+ {
+ .shift = 4,
+ .reg = PCMD3180_REG_CH5_FINE_GAIN,
+ .max = 0xf,
+ .invert = 0,
+ },
+ {
+ .shift = 4,
+ .reg = PCMD3180_REG_CH6_FINE_GAIN,
+ .max = 0xf,
+ .invert = 0,
+ },
+ {
+ .shift = 4,
+ .reg = PCMD3180_REG_CH7_FINE_GAIN,
+ .max = 0xf,
+ .invert = 0,
+ },
+ {
+ .shift = 4,
+ .reg = PCMD3180_REG_CH8_FINE_GAIN,
+ .max = 0xf,
+ .invert = 0,
+ }
+};
+
+static const struct pcmdevice_mixer_control taa5412_digi_vol_ctl[] = {
+ {
+ .shift = 0,
+ .reg = TAA5412_REG_CH1_DIGITAL_VOLUME,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = TAA5412_REG_CH2_DIGITAL_VOLUME,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = TAA5412_REG_CH3_DIGITAL_VOLUME,
+ .max = 0xff,
+ .invert = 0,
+ },
+ {
+ .shift = 0,
+ .reg = TAA5412_REG_CH4_DIGITAL_VOLUME,
+ .max = 0xff,
+ .invert = 0,
+ }
+};
+
+static const struct pcmdevice_mixer_control taa5412_fine_gain_ctl[] = {
+ {
+ .shift = 4,
+ .reg = TAA5412_REG_CH1_FINE_GAIN,
+ .max = 0xf,
+ .invert = 0,
+ },
+ {
+ .shift = 4,
+ .reg = TAA5412_REG_CH2_FINE_GAIN,
+ .max = 0xf,
+ .invert = 0,
+ },
+ {
+ .shift = 4,
+ .reg = TAA5412_REG_CH3_FINE_GAIN,
+ .max = 0xf,
+ .invert = 4,
+ },
+ {
+ .shift = 0,
+ .reg = TAA5412_REG_CH4_FINE_GAIN,
+ .max = 0xf,
+ .invert = 4,
+ }
+};
+
+static const DECLARE_TLV_DB_MINMAX_MUTE(pcmd3140_dig_gain_tlv,
+ -10000, 2700);
+static const DECLARE_TLV_DB_MINMAX_MUTE(pcm1690_fine_dig_gain_tlv,
+ -12750, 0);
+static const DECLARE_TLV_DB_MINMAX_MUTE(pcm1690_dig_gain_tlv,
+ -25500, 0);
+static const DECLARE_TLV_DB_MINMAX_MUTE(pcm9211_dig_gain_tlv,
+ -11450, 2000);
+static const DECLARE_TLV_DB_MINMAX_MUTE(adc5120_fgain_tlv,
+ -10050, 2700);
+static const DECLARE_TLV_DB_LINEAR(adc5120_chgain_tlv, 0, 4200);
+static const DECLARE_TLV_DB_MINMAX_MUTE(pcm6260_fgain_tlv,
+ -10000, 2700);
+static const DECLARE_TLV_DB_LINEAR(pcm6260_chgain_tlv, 0, 4200);
+static const DECLARE_TLV_DB_MINMAX_MUTE(taa5412_dig_vol_tlv,
+ -8050, 4700);
+static const DECLARE_TLV_DB_LINEAR(taa5412_fine_gain_tlv,
+ -80, 70);
+
+static int pcmdev_change_dev(struct pcmdevice_priv *pcm_priv,
+ unsigned short dev_no)
+{
+ struct i2c_client *client = (struct i2c_client *)pcm_priv->client;
+ struct regmap *map = pcm_priv->regmap;
+ int ret;
+
+ if (client->addr == pcm_priv->addr[dev_no])
+ return 0;
+
+ client->addr = pcm_priv->addr[dev_no];
+ /* All pcmdevices share the same regmap, clear the page
+ * inside regmap once switching to another pcmdevice.
+ * Register 0 at any pages inside pcmdevice is the same
+ * one for page-switching.
+ */
+ ret = regmap_write(map, PCMDEVICE_PAGE_SELECT, 0);
+ if (ret < 0)
+ dev_err(pcm_priv->dev, "%s: err = %d\n", __func__, ret);
+
+ return ret;
+}
+
+static int pcmdev_dev_read(struct pcmdevice_priv *pcm_dev,
+ unsigned int dev_no, unsigned int reg, unsigned int *val)
+{
+ struct regmap *map = pcm_dev->regmap;
+ int ret;
+
+ if (dev_no >= pcm_dev->ndev) {
+ dev_err(pcm_dev->dev, "%s: no such channel(%d)\n", __func__,
+ dev_no);
+ return -EINVAL;
+ }
+
+ ret = pcmdev_change_dev(pcm_dev, dev_no);
+ if (ret < 0) {
+ dev_err(pcm_dev->dev, "%s: chg dev err = %d\n", __func__, ret);
+ return ret;
+ }
+
+ ret = regmap_read(map, reg, val);
+ if (ret < 0)
+ dev_err(pcm_dev->dev, "%s: err = %d\n", __func__, ret);
+
+ return ret;
+}
+
+static int pcmdev_dev_update_bits(struct pcmdevice_priv *pcm_dev,
+ unsigned int dev_no, unsigned int reg, unsigned int mask,
+ unsigned int value)
+{
+ struct regmap *map = pcm_dev->regmap;
+ int ret;
+
+ if (dev_no >= pcm_dev->ndev) {
+ dev_err(pcm_dev->dev, "%s: no such channel(%d)\n", __func__,
+ dev_no);
+ return -EINVAL;
+ }
+
+ ret = pcmdev_change_dev(pcm_dev, dev_no);
+ if (ret < 0) {
+ dev_err(pcm_dev->dev, "%s: chg dev err = %d\n", __func__, ret);
+ return ret;
+ }
+
+ ret = regmap_update_bits(map, reg, mask, value);
+ if (ret < 0)
+ dev_err(pcm_dev->dev, "%s: update_bits err=%d\n",
+ __func__, ret);
+
+ return ret;
+}
+
+static int pcmdev_get_volsw(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol, int vol_ctrl_type)
+{
+ struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
+ struct pcmdevice_priv *pcm_dev =
+ snd_soc_component_get_drvdata(component);
+ struct pcmdevice_mixer_control *mc =
+ (struct pcmdevice_mixer_control *)kcontrol->private_value;
+ int max = mc->max, ret;
+ unsigned int mask = BIT(fls(max)) - 1;
+ unsigned int dev_no = mc->dev_no;
+ unsigned int shift = mc->shift;
+ unsigned int reg = mc->reg;
+ unsigned int val;
+
+ mutex_lock(&pcm_dev->codec_lock);
+
+ if (pcm_dev->chip_id == PCM1690) {
+ ret = pcmdev_dev_read(pcm_dev, dev_no, PCM1690_REG_MODE_CTRL,
+ &val);
+ if (ret) {
+ dev_err(pcm_dev->dev, "%s: read mode err=%d\n",
+ __func__, ret);
+ goto out;
+ }
+ val &= PCM1690_REG_MODE_CTRL_DAMS_MSK;
+ /* Set to wide-range mode, before using vol ctrl. */
+ if (!val && vol_ctrl_type == PCMDEV_PCM1690_VOL_CTRL) {
+ ucontrol->value.integer.value[0] = -25500;
+ goto out;
+ }
+ /* Set to fine mode, before using fine vol ctrl. */
+ if (val && vol_ctrl_type == PCMDEV_PCM1690_FINE_VOL_CTRL) {
+ ucontrol->value.integer.value[0] = -12750;
+ goto out;
+ }
+ }
+
+ ret = pcmdev_dev_read(pcm_dev, dev_no, reg, &val);
+ if (ret) {
+ dev_err(pcm_dev->dev, "%s: read err=%d\n",
+ __func__, ret);
+ goto out;
+ }
+
+ val = (val >> shift) & mask;
+ val = (val > max) ? max : val;
+ val = mc->invert ? max - val : val;
+ ucontrol->value.integer.value[0] = val;
+out:
+ mutex_unlock(&pcm_dev->codec_lock);
+ return ret;
+}
+
+static int pcmdevice_get_volsw(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ return pcmdev_get_volsw(kcontrol, ucontrol, PCMDEV_GENERIC_VOL_CTRL);
+}
+
+static int pcm1690_get_volsw(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ return pcmdev_get_volsw(kcontrol, ucontrol, PCMDEV_PCM1690_VOL_CTRL);
+}
+
+static int pcm1690_get_finevolsw(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ return pcmdev_get_volsw(kcontrol, ucontrol,
+ PCMDEV_PCM1690_FINE_VOL_CTRL);
+}
+
+static int pcmdev_put_volsw(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol, int vol_ctrl_type)
+{
+ struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
+ struct pcmdevice_priv *pcm_dev =
+ snd_soc_component_get_drvdata(component);
+ struct pcmdevice_mixer_control *mc =
+ (struct pcmdevice_mixer_control *)kcontrol->private_value;
+ int max = mc->max, rc;
+ unsigned int mask = BIT(fls(max)) - 1;
+ unsigned int dev_no = mc->dev_no;
+ unsigned int shift = mc->shift;
+ unsigned int val, val_mask;
+ unsigned int reg = mc->reg;
+
+ mutex_lock(&pcm_dev->codec_lock);
+ val = ucontrol->value.integer.value[0] & mask;
+ val = (val > max) ? max : val;
+ val = mc->invert ? max - val : val;
+ val_mask = mask << shift;
+ val = val << shift;
+
+ switch (vol_ctrl_type) {
+ case PCMDEV_PCM1690_VOL_CTRL:
+ val_mask |= PCM1690_REG_MODE_CTRL_DAMS_MSK;
+ val |= PCM1690_REG_MODE_CTRL_DAMS_WIDE_RANGE;
+ break;
+ case PCMDEV_PCM1690_FINE_VOL_CTRL:
+ val_mask |= PCM1690_REG_MODE_CTRL_DAMS_MSK;
+ val |= PCM1690_REG_MODE_CTRL_DAMS_FINE_STEP;
+ break;
+ }
+
+ rc = pcmdev_dev_update_bits(pcm_dev, dev_no, reg, val_mask, val);
+ if (rc < 0)
+ dev_err(pcm_dev->dev, "%s: update_bits err = %d\n",
+ __func__, rc);
+ else
+ rc = 1;
+ mutex_unlock(&pcm_dev->codec_lock);
+ return rc;
+}
+
+static int pcmdevice_put_volsw(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ return pcmdev_put_volsw(kcontrol, ucontrol, PCMDEV_GENERIC_VOL_CTRL);
+}
+
+static int pcm1690_put_volsw(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ return pcmdev_put_volsw(kcontrol, ucontrol, PCMDEV_PCM1690_VOL_CTRL);
+}
+
+static int pcm1690_put_finevolsw(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ return pcmdev_put_volsw(kcontrol, ucontrol,
+ PCMDEV_PCM1690_FINE_VOL_CTRL);
+}
+
+static const struct pcmdev_ctrl_info pcmdev_gain_ctl_info[][2] = {
+ // ADC3120
+ {
+ {
+ .gain = adc5120_chgain_tlv,
+ .pcmdev_ctrl = adc5120_analog_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(adc5120_analog_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 0,
+ },
+ {
+ .gain = adc5120_fgain_tlv,
+ .pcmdev_ctrl = adc5120_digi_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(adc5120_digi_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 1,
+ },
+ },
+ // ADC5120
+ {
+ {
+ .gain = adc5120_chgain_tlv,
+ .pcmdev_ctrl = adc5120_analog_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(adc5120_analog_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 0,
+ },
+ {
+ .gain = adc5120_fgain_tlv,
+ .pcmdev_ctrl = adc5120_digi_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(adc5120_digi_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 1,
+ },
+ },
+ // ADC6120
+ {
+ {
+ .gain = adc5120_chgain_tlv,
+ .pcmdev_ctrl = adc5120_analog_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(adc5120_analog_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 0,
+ },
+ {
+ .gain = adc5120_fgain_tlv,
+ .pcmdev_ctrl = adc5120_digi_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(adc5120_digi_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 1,
+ },
+ },
+ // DIX4192
+ {
+ {
+ .ctrl_array_size = 0,
+ },
+ {
+ .ctrl_array_size = 0,
+ },
+ },
+ // PCM1690
+ {
+ {
+ .gain = pcm1690_fine_dig_gain_tlv,
+ .pcmdev_ctrl = pcm1690_digi_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(pcm1690_digi_gain_ctl),
+ .get = pcm1690_get_volsw,
+ .put = pcm1690_put_volsw,
+ .pcmdev_ctrl_name_id = 1,
+ },
+ {
+ .gain = pcm1690_dig_gain_tlv,
+ .pcmdev_ctrl = pcm1690_digi_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(pcm1690_digi_gain_ctl),
+ .get = pcm1690_get_finevolsw,
+ .put = pcm1690_put_finevolsw,
+ .pcmdev_ctrl_name_id = 2,
+ },
+ },
+ // PCM3120
+ {
+ {
+ .gain = adc5120_chgain_tlv,
+ .pcmdev_ctrl = adc5120_analog_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(adc5120_analog_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 0,
+ },
+ {
+ .gain = adc5120_fgain_tlv,
+ .pcmdev_ctrl = adc5120_digi_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(adc5120_digi_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 1,
+ },
+ },
+ // PCM3140
+ {
+ {
+ .gain = pcm6260_chgain_tlv,
+ .pcmdev_ctrl = pcm6240_analog_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(pcm6240_analog_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 0,
+ },
+ {
+ .gain = pcm6260_fgain_tlv,
+ .pcmdev_ctrl = pcm6240_digi_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(pcm6240_digi_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 1,
+ },
+ },
+ // PCM5120
+ {
+ {
+ .gain = adc5120_chgain_tlv,
+ .pcmdev_ctrl = adc5120_analog_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(adc5120_analog_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 0,
+ },
+ {
+ .gain = adc5120_fgain_tlv,
+ .pcmdev_ctrl = adc5120_digi_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(adc5120_digi_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 1,
+ },
+ },
+ // PCM5140
+ {
+ {
+ .gain = pcm6260_chgain_tlv,
+ .pcmdev_ctrl = pcm6240_analog_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(pcm6240_analog_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 0,
+ },
+ {
+ .gain = pcm6260_fgain_tlv,
+ .pcmdev_ctrl = pcm6240_digi_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(pcm6240_digi_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 1,
+ },
+ },
+ // PCM6120
+ {
+ {
+ .gain = adc5120_chgain_tlv,
+ .pcmdev_ctrl = adc5120_analog_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(adc5120_analog_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 0,
+ },
+ {
+ .gain = adc5120_fgain_tlv,
+ .pcmdev_ctrl = adc5120_digi_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(adc5120_digi_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 1,
+ },
+ },
+ // PCM6140
+ {
+ {
+ .gain = pcm6260_chgain_tlv,
+ .pcmdev_ctrl = pcm6240_analog_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(pcm6240_analog_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 0,
+ },
+ {
+ .gain = pcm6260_fgain_tlv,
+ .pcmdev_ctrl = pcm6240_digi_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(pcm6240_digi_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 1,
+ },
+ },
+ // PCM6240
+ {
+ {
+ .gain = pcm6260_chgain_tlv,
+ .pcmdev_ctrl = pcm6240_analog_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(pcm6240_analog_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 0,
+ },
+ {
+ .gain = pcm6260_fgain_tlv,
+ .pcmdev_ctrl = pcm6240_digi_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(pcm6240_digi_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 1,
+ },
+ },
+ // PCM6260
+ {
+ {
+ .gain = pcm6260_chgain_tlv,
+ .pcmdev_ctrl = pcm6260_analog_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(pcm6260_analog_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 0,
+ },
+ {
+ .gain = pcm6260_fgain_tlv,
+ .pcmdev_ctrl = pcm6260_digi_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(pcm6260_digi_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 1,
+ },
+ },
+ // PCM9211
+ {
+ {
+ .ctrl_array_size = 0,
+ },
+ {
+ .gain = pcm9211_dig_gain_tlv,
+ .pcmdev_ctrl = pcm9211_digi_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(pcm9211_digi_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 1,
+ },
+
+ },
+ // PCMD3140
+ {
+ {
+ .gain = taa5412_fine_gain_tlv,
+ .pcmdev_ctrl = pcmd3140_fine_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(pcmd3140_fine_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 2,
+ },
+ {
+ .gain = pcmd3140_dig_gain_tlv,
+ .pcmdev_ctrl = pcmd3140_digi_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(pcmd3140_digi_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 1,
+ },
+ },
+ // PCMD3180
+ {
+ {
+ .gain = taa5412_fine_gain_tlv,
+ .pcmdev_ctrl = pcmd3180_fine_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(pcmd3180_fine_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 2,
+ },
+ {
+ .gain = pcmd3140_dig_gain_tlv,
+ .pcmdev_ctrl = pcmd3180_digi_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(pcmd3180_digi_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 1,
+ },
+ },
+ // PCMD512X
+ {
+ {
+ .ctrl_array_size = 0,
+ },
+ {
+ .ctrl_array_size = 0,
+ },
+ },
+ // TAA5212
+ {
+ {
+ .gain = taa5412_fine_gain_tlv,
+ .pcmdev_ctrl = taa5412_fine_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(taa5412_fine_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 2,
+ },
+ {
+ .gain = taa5412_dig_vol_tlv,
+ .pcmdev_ctrl = taa5412_digi_vol_ctl,
+ .ctrl_array_size = ARRAY_SIZE(taa5412_digi_vol_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 1,
+ },
+ },
+ // TAA5412
+ {
+ {
+ .gain = taa5412_fine_gain_tlv,
+ .pcmdev_ctrl = taa5412_fine_gain_ctl,
+ .ctrl_array_size = ARRAY_SIZE(taa5412_fine_gain_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 2,
+ },
+ {
+ .gain = taa5412_dig_vol_tlv,
+ .pcmdev_ctrl = taa5412_digi_vol_ctl,
+ .ctrl_array_size = ARRAY_SIZE(taa5412_digi_vol_ctl),
+ .get = pcmdevice_get_volsw,
+ .put = pcmdevice_put_volsw,
+ .pcmdev_ctrl_name_id = 1,
+ },
+ },
+ // TAD5212
+ {
+ {
+ .ctrl_array_size = 0,
+ },
+ {
+ .ctrl_array_size = 0,
+ },
+ },
+ // TAD5412
+ {
+ {
+ .ctrl_array_size = 0,
+ },
+ {
+ .ctrl_array_size = 0,
+ },
+ },
+};
+
+static int pcmdev_dev_bulk_write(struct pcmdevice_priv *pcm_dev,
+ unsigned int dev_no, unsigned int reg, unsigned char *data,
+ unsigned int len)
+{
+ struct regmap *map = pcm_dev->regmap;
+ int ret;
+
+ if (dev_no >= pcm_dev->ndev) {
+ dev_err(pcm_dev->dev, "%s: no such channel(%d)\n", __func__,
+ dev_no);
+ return -EINVAL;
+ }
+
+ ret = pcmdev_change_dev(pcm_dev, dev_no);
+ if (ret < 0) {
+ dev_err(pcm_dev->dev, "%s: chg dev err = %d\n", __func__, ret);
+ return ret;
+ }
+
+ ret = regmap_bulk_write(map, reg, data, len);
+ if (ret < 0)
+ dev_err(pcm_dev->dev, "%s: bulk_write err = %d\n", __func__,
+ ret);
+
+ return ret;
+}
+
+static int pcmdev_dev_write(struct pcmdevice_priv *pcm_dev,
+ unsigned int dev_no, unsigned int reg, unsigned int value)
+{
+ struct regmap *map = pcm_dev->regmap;
+ int ret;
+
+ if (dev_no >= pcm_dev->ndev) {
+ dev_err(pcm_dev->dev, "%s: no such channel(%d)\n", __func__,
+ dev_no);
+ return -EINVAL;
+ }
+
+ ret = pcmdev_change_dev(pcm_dev, dev_no);
+ if (ret < 0) {
+ dev_err(pcm_dev->dev, "%s: chg dev err = %d\n", __func__, ret);
+ return ret;
+ }
+
+ ret = regmap_write(map, reg, value);
+ if (ret < 0)
+ dev_err(pcm_dev->dev, "%s: err = %d\n", __func__, ret);
+
+ return ret;
+}
+
+static int pcmdevice_info_profile(
+ struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_info *uinfo)
+{
+ struct snd_soc_component *codec
+ = snd_soc_kcontrol_component(kcontrol);
+ struct pcmdevice_priv *pcm_dev =
+ snd_soc_component_get_drvdata(codec);
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
+ uinfo->count = 1;
+ uinfo->value.integer.min = 0;
+ uinfo->value.integer.max = max(0, pcm_dev->regbin.ncfgs - 1);
+
+ return 0;
+}
+
+static int pcmdevice_get_profile_id(
+ struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_component *codec
+ = snd_soc_kcontrol_component(kcontrol);
+ struct pcmdevice_priv *pcm_dev =
+ snd_soc_component_get_drvdata(codec);
+
+ ucontrol->value.integer.value[0] = pcm_dev->cur_conf;
+
+ return 0;
+}
+
+static int pcmdevice_set_profile_id(
+ struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_component *codec
+ = snd_soc_kcontrol_component(kcontrol);
+ struct pcmdevice_priv *pcm_dev =
+ snd_soc_component_get_drvdata(codec);
+ int nr_profile = ucontrol->value.integer.value[0];
+ int max = pcm_dev->regbin.ncfgs - 1;
+ int ret = 0;
+
+ nr_profile = clamp(nr_profile, 0, max);
+
+ if (pcm_dev->cur_conf != nr_profile) {
+ pcm_dev->cur_conf = nr_profile;
+ ret = 1;
+ }
+
+ return ret;
+}
+
+static int pcmdevice_info_volsw(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_info *uinfo)
+{
+ struct pcmdevice_mixer_control *mc =
+ (struct pcmdevice_mixer_control *)kcontrol->private_value;
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
+ uinfo->count = 1;
+ uinfo->value.integer.min = 0;
+ uinfo->value.integer.max = mc->max;
+ return 0;
+}
+
+static void pcm9211_sw_rst(struct pcmdevice_priv *pcm_dev)
+{
+ int ret, i;
+
+ for (i = 0; i < pcm_dev->ndev; i++) {
+ ret = pcmdev_dev_update_bits(pcm_dev, i,
+ PCM9211_REG_SW_CTRL, PCM9211_REG_SW_CTRL_MRST_MSK,
+ PCM9211_REG_SW_CTRL_MRST);
+ if (ret < 0)
+ dev_err(pcm_dev->dev, "%s: dev %d swreset fail %d\n",
+ __func__, i, ret);
+ }
+}
+
+static void pcmdevice_sw_rst(struct pcmdevice_priv *pcm_dev)
+{
+ int ret, i;
+
+ for (i = 0; i < pcm_dev->ndev; i++) {
+ ret = pcmdev_dev_write(pcm_dev, i, PCMDEVICE_REG_SWRESET,
+ PCMDEVICE_REG_SWRESET_RESET);
+ if (ret < 0)
+ dev_err(pcm_dev->dev, "%s: dev %d swreset fail %d\n",
+ __func__, i, ret);
+ }
+}
+
+static struct pcmdevice_config_info *pcmdevice_add_config(void *ctxt,
+ const unsigned char *config_data, unsigned int config_size,
+ int *status)
+{
+ struct pcmdevice_priv *pcm_dev = (struct pcmdevice_priv *)ctxt;
+ struct pcmdevice_config_info *cfg_info;
+ struct pcmdevice_block_data **bk_da;
+ unsigned int config_offset = 0, i;
+
+ cfg_info = kzalloc(sizeof(struct pcmdevice_config_info), GFP_KERNEL);
+ if (!cfg_info) {
+ *status = -ENOMEM;
+ goto out;
+ }
+
+ if (pcm_dev->regbin.fw_hdr.binary_version_num >= 0x105) {
+ if (config_offset + 64 > (int)config_size) {
+ *status = -EINVAL;
+ dev_err(pcm_dev->dev,
+ "%s: cfg_name out of boundary\n", __func__);
+ goto out;
+ }
+ memcpy(cfg_info->cfg_name, &config_data[config_offset], 64);
+ config_offset += 64;
+ }
+
+ if (config_offset + 4 > config_size) {
+ *status = -EINVAL;
+ dev_err(pcm_dev->dev, "%s: nblocks out of boundary\n",
+ __func__);
+ goto out;
+ }
+ cfg_info->nblocks =
+ get_unaligned_be32(&config_data[config_offset]);
+ config_offset += 4;
+
+ bk_da = cfg_info->blk_data = kcalloc(cfg_info->nblocks,
+ sizeof(struct pcmdevice_block_data *), GFP_KERNEL);
+ if (!bk_da) {
+ *status = -ENOMEM;
+ goto out;
+ }
+ cfg_info->real_nblocks = 0;
+ for (i = 0; i < cfg_info->nblocks; i++) {
+ if (config_offset + 12 > config_size) {
+ *status = -EINVAL;
+ dev_err(pcm_dev->dev,
+ "%s: out of boundary i = %d nblocks = %u\n",
+ __func__, i, cfg_info->nblocks);
+ break;
+ }
+ bk_da[i] = kzalloc(sizeof(struct pcmdevice_block_data),
+ GFP_KERNEL);
+ if (!bk_da[i]) {
+ *status = -ENOMEM;
+ break;
+ }
+ bk_da[i]->dev_idx = config_data[config_offset];
+ config_offset++;
+
+ bk_da[i]->block_type = config_data[config_offset];
+ config_offset++;
+
+ if (bk_da[i]->block_type == PCMDEVICE_BIN_BLK_PRE_POWER_UP) {
+ if (bk_da[i]->dev_idx == 0)
+ cfg_info->active_dev =
+ (1 << pcm_dev->ndev) - 1;
+ else
+ cfg_info->active_dev =
+ 1 << (bk_da[i]->dev_idx - 1);
+ }
+
+ bk_da[i]->yram_checksum =
+ get_unaligned_be16(&config_data[config_offset]);
+ config_offset += 2;
+ bk_da[i]->block_size =
+ get_unaligned_be32(&config_data[config_offset]);
+ config_offset += 4;
+
+ bk_da[i]->n_subblks =
+ get_unaligned_be32(&config_data[config_offset]);
+
+ config_offset += 4;
+
+ if (config_offset + bk_da[i]->block_size > config_size) {
+ *status = -EINVAL;
+ dev_err(pcm_dev->dev,
+ "%s: out of boundary: i = %d blks = %u\n",
+ __func__, i, cfg_info->nblocks);
+ break;
+ }
+
+ bk_da[i]->regdata = kmemdup(&config_data[config_offset],
+ bk_da[i]->block_size, GFP_KERNEL);
+ if (!bk_da[i]->regdata) {
+ *status = -ENOMEM;
+ goto out;
+ }
+ config_offset += bk_da[i]->block_size;
+ cfg_info->real_nblocks += 1;
+ }
+out:
+ return cfg_info;
+}
+
+static int pcmdev_gain_ctrl_add(struct pcmdevice_priv *pcm_dev,
+ int dev_no, int ctl_id)
+{
+ struct i2c_adapter *adap = pcm_dev->client->adapter;
+ struct snd_soc_component *comp = pcm_dev->component;
+ struct pcmdevice_mixer_control *pcmdev_ctrl;
+ struct snd_kcontrol_new *pcmdev_controls;
+ int ret, mix_index = 0, name_id, chn;
+ unsigned int id = pcm_dev->chip_id;
+ const int nr_chn =
+ pcmdev_gain_ctl_info[id][ctl_id].ctrl_array_size;
+ const char *ctrl_name;
+ char *name;
+
+ if (!nr_chn) {
+ dev_dbg(pcm_dev->dev, "%s: no gain ctrl for %s\n", __func__,
+ pcm_dev->dev_name);
+ return 0;
+ }
+
+ pcmdev_controls = devm_kzalloc(pcm_dev->dev,
+ nr_chn * sizeof(struct snd_kcontrol_new), GFP_KERNEL);
+ if (!pcmdev_controls)
+ return -ENOMEM;
+
+ name_id = pcmdev_gain_ctl_info[id][ctl_id].pcmdev_ctrl_name_id;
+
+ if (comp->name_prefix)
+ ctrl_name = pcmdev_ctrl_name_with_prefix[name_id];
+ else
+ ctrl_name = pcmdev_ctrl_name[name_id];
+
+ for (chn = 1; chn <= nr_chn; chn++) {
+ name = devm_kzalloc(pcm_dev->dev,
+ SNDRV_CTL_ELEM_ID_NAME_MAXLEN, GFP_KERNEL);
+ if (!name) {
+ ret = -ENOMEM;
+ goto out;
+ }
+ if (comp->name_prefix)
+ scnprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
+ ctrl_name, comp->name_prefix, dev_no, chn);
+ else
+ scnprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
+ ctrl_name, pcm_dev->upper_dev_name, adap->nr,
+ dev_no, chn);
+ pcmdev_controls[mix_index].tlv.p =
+ pcmdev_gain_ctl_info[id][ctl_id].gain;
+ pcmdev_ctrl = devm_kmemdup(pcm_dev->dev,
+ &pcmdev_gain_ctl_info[id][ctl_id].pcmdev_ctrl[chn - 1],
+ sizeof(*pcmdev_ctrl), GFP_KERNEL);
+ if (!pcmdev_ctrl) {
+ ret = -ENOMEM;
+ goto out;
+ }
+ pcmdev_ctrl->dev_no = dev_no;
+ pcmdev_controls[mix_index].private_value =
+ (unsigned long)pcmdev_ctrl;
+ pcmdev_controls[mix_index].name = name;
+ pcmdev_controls[mix_index].access =
+ SNDRV_CTL_ELEM_ACCESS_TLV_READ |
+ SNDRV_CTL_ELEM_ACCESS_READWRITE;
+ pcmdev_controls[mix_index].iface =
+ SNDRV_CTL_ELEM_IFACE_MIXER;
+ pcmdev_controls[mix_index].info = pcmdevice_info_volsw;
+ pcmdev_controls[mix_index].get =
+ pcmdev_gain_ctl_info[id][ctl_id].get;
+ pcmdev_controls[mix_index].put =
+ pcmdev_gain_ctl_info[id][ctl_id].put;
+ mix_index++;
+ }
+
+ ret = snd_soc_add_component_controls(comp, pcmdev_controls, mix_index);
+ if (ret)
+ dev_err(pcm_dev->dev, "%s: add_controls err = %d\n",
+ __func__, ret);
+out:
+ return ret;
+}
+
+static int pcmdev_profile_ctrl_add(struct pcmdevice_priv *pcm_dev)
+{
+ struct snd_soc_component *comp = pcm_dev->component;
+ struct i2c_adapter *adap = pcm_dev->client->adapter;
+ struct snd_kcontrol_new *pcmdev_ctrl;
+ char *name;
+ int ret;
+
+ pcmdev_ctrl = devm_kzalloc(pcm_dev->dev,
+ sizeof(struct snd_kcontrol_new), GFP_KERNEL);
+ if (!pcmdev_ctrl)
+ return -ENOMEM;
+
+ /* Create a mixer item for selecting the active profile */
+ name = devm_kzalloc(pcm_dev->dev, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
+ GFP_KERNEL);
+ if (!name)
+ return -ENOMEM;
+
+ if (comp->name_prefix)
+ scnprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
+ "%s Profile id", comp->name_prefix);
+ else
+ scnprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
+ "%s i2c%d Profile id", pcm_dev->upper_dev_name,
+ adap->nr);
+ pcmdev_ctrl->name = name;
+ pcmdev_ctrl->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
+ pcmdev_ctrl->info = pcmdevice_info_profile;
+ pcmdev_ctrl->get = pcmdevice_get_profile_id;
+ pcmdev_ctrl->put = pcmdevice_set_profile_id;
+
+ ret = snd_soc_add_component_controls(comp, pcmdev_ctrl, 1);
+ if (ret)
+ dev_err(pcm_dev->dev, "%s: add_controls err = %d\n",
+ __func__, ret);
+
+ return ret;
+}
+
+static void pcmdevice_config_info_remove(void *ctxt)
+{
+ struct pcmdevice_priv *pcm_dev = (struct pcmdevice_priv *) ctxt;
+ struct pcmdevice_regbin *regbin = &(pcm_dev->regbin);
+ struct pcmdevice_config_info **cfg_info = regbin->cfg_info;
+ int i, j;
+
+ if (!cfg_info)
+ return;
+ for (i = 0; i < regbin->ncfgs; i++) {
+ if (!cfg_info[i])
+ continue;
+ if (cfg_info[i]->blk_data) {
+ for (j = 0; j < (int)cfg_info[i]->real_nblocks; j++) {
+ if (!cfg_info[i]->blk_data[j])
+ continue;
+ kfree(cfg_info[i]->blk_data[j]->regdata);
+ kfree(cfg_info[i]->blk_data[j]);
+ }
+ kfree(cfg_info[i]->blk_data);
+ }
+ kfree(cfg_info[i]);
+ }
+ kfree(cfg_info);
+}
+
+static int pcmdev_regbin_ready(const struct firmware *fmw, void *ctxt)
+{
+ struct pcmdevice_config_info **cfg_info;
+ struct pcmdevice_priv *pcm_dev = ctxt;
+ struct pcmdevice_regbin_hdr *fw_hdr;
+ struct pcmdevice_regbin *regbin;
+ unsigned int total_config_sz = 0;
+ int offset = 0, ret = 0, i;
+ unsigned char *buf;
+
+ regbin = &(pcm_dev->regbin);
+ fw_hdr = &(regbin->fw_hdr);
+ if (!fmw || !fmw->data) {
+ dev_err(pcm_dev->dev, "%s: failed to read %s\n",
+ __func__, pcm_dev->bin_name);
+ pcm_dev->fw_state = PCMDEVICE_FW_LOAD_FAILED;
+ ret = -EINVAL;
+ goto out;
+ }
+ buf = (unsigned char *)fmw->data;
+
+ fw_hdr->img_sz = get_unaligned_be32(&buf[offset]);
+ offset += 4;
+ if (fw_hdr->img_sz != fmw->size) {
+ dev_err(pcm_dev->dev, "%s: file size(%d) not match %u",
+ __func__, (int)fmw->size, fw_hdr->img_sz);
+ pcm_dev->fw_state = PCMDEVICE_FW_LOAD_FAILED;
+ ret = -EINVAL;
+ goto out;
+ }
+
+ fw_hdr->checksum = get_unaligned_be32(&buf[offset]);
+ offset += 4;
+ fw_hdr->binary_version_num = get_unaligned_be32(&buf[offset]);
+ if (fw_hdr->binary_version_num < 0x103) {
+ dev_err(pcm_dev->dev, "%s: bin version 0x%04x is out of date",
+ __func__, fw_hdr->binary_version_num);
+ pcm_dev->fw_state = PCMDEVICE_FW_LOAD_FAILED;
+ ret = -EINVAL;
+ goto out;
+ }
+ offset += 4;
+ fw_hdr->drv_fw_version = get_unaligned_be32(&buf[offset]);
+ offset += 8;
+ fw_hdr->plat_type = buf[offset];
+ offset += 1;
+ fw_hdr->dev_family = buf[offset];
+ offset += 1;
+ fw_hdr->reserve = buf[offset];
+ offset += 1;
+ fw_hdr->ndev = buf[offset];
+ offset += 1;
+ if (fw_hdr->ndev != pcm_dev->ndev) {
+ dev_err(pcm_dev->dev, "%s: invalid ndev(%u)\n", __func__,
+ fw_hdr->ndev);
+ pcm_dev->fw_state = PCMDEVICE_FW_LOAD_FAILED;
+ ret = -EINVAL;
+ goto out;
+ }
+
+ if (offset + PCMDEVICE_MAX_REGBIN_DEVICES > fw_hdr->img_sz) {
+ dev_err(pcm_dev->dev, "%s: devs out of boundary!\n", __func__);
+ pcm_dev->fw_state = PCMDEVICE_FW_LOAD_FAILED;
+ ret = -EINVAL;
+ goto out;
+ }
+
+ for (i = 0; i < PCMDEVICE_MAX_REGBIN_DEVICES; i++, offset++)
+ fw_hdr->devs[i] = buf[offset];
+
+ fw_hdr->nconfig = get_unaligned_be32(&buf[offset]);
+ offset += 4;
+
+ for (i = 0; i < PCMDEVICE_CONFIG_SUM; i++) {
+ fw_hdr->config_size[i] = get_unaligned_be32(&buf[offset]);
+ offset += 4;
+ total_config_sz += fw_hdr->config_size[i];
+ }
+
+ if (fw_hdr->img_sz - total_config_sz != (unsigned int)offset) {
+ dev_err(pcm_dev->dev, "%s: bin file error!\n", __func__);
+ pcm_dev->fw_state = PCMDEVICE_FW_LOAD_FAILED;
+ ret = -EINVAL;
+ goto out;
+ }
+ cfg_info = kcalloc(fw_hdr->nconfig, sizeof(*cfg_info), GFP_KERNEL);
+ if (!cfg_info) {
+ pcm_dev->fw_state = PCMDEVICE_FW_LOAD_FAILED;
+ ret = -ENOMEM;
+ goto out;
+ }
+ regbin->cfg_info = cfg_info;
+ regbin->ncfgs = 0;
+ for (i = 0; i < (int)fw_hdr->nconfig; i++) {
+ cfg_info[i] = pcmdevice_add_config(ctxt, &buf[offset],
+ fw_hdr->config_size[i], &ret);
+ if (ret) {
+ /* In case the bin file is partially destroyed. */
+ if (regbin->ncfgs == 0)
+ pcm_dev->fw_state = PCMDEVICE_FW_LOAD_FAILED;
+ break;
+ }
+ offset += (int)fw_hdr->config_size[i];
+ regbin->ncfgs += 1;
+ }
+
+out:
+ if (pcm_dev->fw_state == PCMDEVICE_FW_LOAD_FAILED) {
+ dev_err(pcm_dev->dev,
+ "%s: remove config due to fw load error!\n", __func__);
+ pcmdevice_config_info_remove(pcm_dev);
+ }
+
+ return ret;
+}
+
+static int pcmdevice_comp_probe(struct snd_soc_component *comp)
+{
+ struct pcmdevice_priv *pcm_dev = snd_soc_component_get_drvdata(comp);
+ struct i2c_adapter *adap = pcm_dev->client->adapter;
+ const struct firmware *fw_entry = NULL;
+ int ret, i, j;
+
+ mutex_lock(&pcm_dev->codec_lock);
+
+ pcm_dev->component = comp;
+
+ for (i = 0; i < pcm_dev->ndev; i++) {
+ for (j = 0; j < 2; j++) {
+ ret = pcmdev_gain_ctrl_add(pcm_dev, i, j);
+ if (ret < 0)
+ goto out;
+ }
+ }
+
+ if (comp->name_prefix) {
+ /* There's name_prefix defined in DTS. Bin file name will be
+ * name_prefix.bin stores the firmware including register
+ * setting and params for different filters inside chips, it
+ * must be copied into firmware folder. The same types of
+ * pcmdevices sitting on the same i2c bus will be aggregated as
+ * one single codec, all of them share the same bin file.
+ */
+ scnprintf(pcm_dev->bin_name, PCMDEVICE_BIN_FILENAME_LEN,
+ "%s.bin", comp->name_prefix);
+ } else {
+ /* There's NO name_prefix defined in DTS. Bin file name will be
+ * device-name[defined in pcmdevice_i2c_id]-i2c-bus_id
+ * [0,1,...,N]-sum[1,...,4]dev.bin stores the firmware
+ * including register setting and params for different filters
+ * inside chips, it must be copied into firmware folder. The
+ * same types of pcmdevices sitting on the same i2c bus will be
+ * aggregated as one single codec, all of them share the same
+ * bin file.
+ */
+ scnprintf(pcm_dev->bin_name, PCMDEVICE_BIN_FILENAME_LEN,
+ "%s-i2c-%d-%udev.bin", pcm_dev->dev_name, adap->nr,
+ pcm_dev->ndev);
+ }
+
+ ret = request_firmware(&fw_entry, pcm_dev->bin_name, pcm_dev->dev);
+ if (ret) {
+ dev_err(pcm_dev->dev, "%s: request %s err = %d\n", __func__,
+ pcm_dev->bin_name, ret);
+ goto out;
+ }
+
+ ret = pcmdev_regbin_ready(fw_entry, pcm_dev);
+ if (ret) {
+ dev_err(pcm_dev->dev, "%s: %s parse err = %d\n", __func__,
+ pcm_dev->bin_name, ret);
+ goto out;
+ }
+ ret = pcmdev_profile_ctrl_add(pcm_dev);
+out:
+ if (fw_entry)
+ release_firmware(fw_entry);
+
+ mutex_unlock(&pcm_dev->codec_lock);
+ return ret;
+}
+
+
+static void pcmdevice_comp_remove(struct snd_soc_component *codec)
+{
+ struct pcmdevice_priv *pcm_dev = snd_soc_component_get_drvdata(codec);
+
+ if (!pcm_dev)
+ return;
+ mutex_lock(&pcm_dev->codec_lock);
+ pcmdevice_config_info_remove(pcm_dev);
+ mutex_unlock(&pcm_dev->codec_lock);
+}
+
+static const struct snd_soc_dapm_widget pcmdevice_dapm_widgets[] = {
+ SND_SOC_DAPM_AIF_IN("ASI", "ASI Playback", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("ASI1 OUT", "ASI1 Capture",
+ 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_OUTPUT("OUT"),
+ SND_SOC_DAPM_INPUT("MIC"),
+};
+
+static const struct snd_soc_dapm_route pcmdevice_audio_map[] = {
+ {"OUT", NULL, "ASI"},
+ {"ASI1 OUT", NULL, "MIC"},
+};
+
+static const struct snd_soc_component_driver
+ soc_codec_driver_pcmdevice = {
+ .probe = pcmdevice_comp_probe,
+ .remove = pcmdevice_comp_remove,
+ .dapm_widgets = pcmdevice_dapm_widgets,
+ .num_dapm_widgets = ARRAY_SIZE(pcmdevice_dapm_widgets),
+ .dapm_routes = pcmdevice_audio_map,
+ .num_dapm_routes = ARRAY_SIZE(pcmdevice_audio_map),
+ .suspend_bias_off = 1,
+ .idle_bias_on = 0,
+ .use_pmdown_time = 1,
+ .endianness = 1,
+};
+
+static int pcmdev_single_byte_wr(struct pcmdevice_priv *pcm_dev,
+ unsigned char *data, int devn, int sublocksize)
+{
+ unsigned short len = get_unaligned_be16(&data[2]);
+ int offset = 2;
+ int i, ret;
+
+ offset += 2;
+ if (offset + 4 * len > sublocksize) {
+ dev_err(pcm_dev->dev, "%s: dev-%d byt wr out of boundary\n",
+ __func__, devn);
+ return -EINVAL;
+ }
+
+ for (i = 0; i < len; i++) {
+ ret = pcmdev_dev_write(pcm_dev, devn,
+ PCMDEVICE_REG(data[offset + 1], data[offset + 2]),
+ data[offset + 3]);
+ /* skip this error for next operation or next devices */
+ if (ret < 0)
+ dev_err(pcm_dev->dev, "%s: dev-%d single write err\n",
+ __func__, devn);
+
+ offset += 4;
+ }
+
+ return offset;
+}
+
+static int pcmdev_burst_wr(struct pcmdevice_priv *pcm_dev,
+ unsigned char *data, int devn, int sublocksize)
+{
+ unsigned short len = get_unaligned_be16(&data[2]);
+ int offset = 2;
+ int ret;
+
+ offset += 2;
+ if (offset + 4 + len > sublocksize) {
+ dev_err(pcm_dev->dev, "%s: dev-%d burst Out of boundary\n",
+ __func__, devn);
+ return -EINVAL;
+ }
+ if (len % 4) {
+ dev_err(pcm_dev->dev, "%s: dev-%d bst-len(%u) not div by 4\n",
+ __func__, devn, len);
+ return -EINVAL;
+ }
+ ret = pcmdev_dev_bulk_write(pcm_dev, devn,
+ PCMDEVICE_REG(data[offset + 1], data[offset + 2]),
+ &(data[offset + 4]), len);
+ /* skip this error for next devices */
+ if (ret < 0)
+ dev_err(pcm_dev->dev, "%s: dev-%d bulk_write err = %d\n",
+ __func__, devn, ret);
+
+ offset += (len + 4);
+
+ return offset;
+}
+
+static int pcmdev_delay(struct pcmdevice_priv *pcm_dev,
+ unsigned char *data, int devn, int sublocksize)
+{
+ unsigned int delay_time = 0;
+ int offset = 2;
+
+ if (offset + 2 > sublocksize) {
+ dev_err(pcm_dev->dev, "%s: dev-%d deley out of boundary\n",
+ __func__, devn);
+ return -EINVAL;
+ }
+ delay_time = get_unaligned_be16(&data[2]) * 1000;
+ usleep_range(delay_time, delay_time + 50);
+ offset += 2;
+
+ return offset;
+}
+
+static int pcmdev_bits_wr(struct pcmdevice_priv *pcm_dev,
+ unsigned char *data, int devn, int sublocksize)
+{
+ int offset = 2;
+ int ret;
+
+ if (offset + 6 > sublocksize) {
+ dev_err(pcm_dev->dev, "%s: dev-%d bit write out of memory\n",
+ __func__, devn);
+ return -EINVAL;
+ }
+ ret = pcmdev_dev_update_bits(pcm_dev, devn,
+ PCMDEVICE_REG(data[offset + 3], data[offset + 4]),
+ data[offset + 1], data[offset + 5]);
+ /* skip this error for next devices */
+ if (ret < 0)
+ dev_err(pcm_dev->dev, "%s: dev-%d update_bits err = %d\n",
+ __func__, devn, ret);
+
+ offset += 6;
+
+ return offset;
+}
+
+static int pcmdevice_process_block(void *ctxt, unsigned char *data,
+ unsigned char dev_idx, int sublocksize)
+{
+ struct pcmdevice_priv *pcm_dev = (struct pcmdevice_priv *)ctxt;
+ int devn, dev_end, ret = 0;
+ unsigned char subblk_typ = data[1];
+
+ if (dev_idx) {
+ devn = dev_idx - 1;
+ dev_end = dev_idx;
+ } else {
+ devn = 0;
+ dev_end = pcm_dev->ndev;
+ }
+
+ /* loop in case of several devices sharing the same sub-block */
+ for (; devn < dev_end; devn++) {
+ switch (subblk_typ) {
+ case PCMDEVICE_CMD_SING_W:
+ ret = pcmdev_single_byte_wr(pcm_dev, data, devn, sublocksize);
+ break;
+ case PCMDEVICE_CMD_BURST:
+ ret = pcmdev_burst_wr(pcm_dev, data, devn, sublocksize);
+ break;
+ case PCMDEVICE_CMD_DELAY:
+ ret = pcmdev_delay(pcm_dev, data, devn, sublocksize);
+ break;
+ case PCMDEVICE_CMD_FIELD_W:
+ ret = pcmdev_bits_wr(pcm_dev, data, devn, sublocksize);
+ break;
+ default:
+ break;
+ }
+ /*
+ * In case of sub-block error, break the loop for the rest of
+ * devices.
+ */
+ if (ret < 0)
+ break;
+ }
+
+ return ret;
+}
+
+static void pcmdevice_select_cfg_blk(void *ctxt, int conf_no,
+ unsigned char block_type)
+{
+ struct pcmdevice_priv *pcm_dev = (struct pcmdevice_priv *)ctxt;
+ struct pcmdevice_regbin *regbin = &(pcm_dev->regbin);
+ struct pcmdevice_config_info **cfg_info = regbin->cfg_info;
+ struct pcmdevice_block_data **blk_data;
+ int j, k;
+
+ if (conf_no >= regbin->ncfgs || conf_no < 0 || NULL == cfg_info) {
+ dev_err(pcm_dev->dev, "%s: conf_no should be less than %u\n",
+ __func__, regbin->ncfgs);
+ goto out;
+ }
+ blk_data = cfg_info[conf_no]->blk_data;
+
+ for (j = 0; j < (int)cfg_info[conf_no]->real_nblocks; j++) {
+ unsigned int length = 0, ret;
+
+ if (block_type > 5 || block_type < 2) {
+ dev_err(pcm_dev->dev,
+ "%s: block_type should be out of range\n",
+ __func__);
+ goto out;
+ }
+ if (block_type != blk_data[j]->block_type)
+ continue;
+
+ for (k = 0; k < (int)blk_data[j]->n_subblks; k++) {
+ ret = pcmdevice_process_block(pcm_dev,
+ blk_data[j]->regdata + length,
+ blk_data[j]->dev_idx,
+ blk_data[j]->block_size - length);
+ length += ret;
+ if (blk_data[j]->block_size < length) {
+ dev_err(pcm_dev->dev,
+ "%s: %u %u out of boundary\n",
+ __func__, length,
+ blk_data[j]->block_size);
+ break;
+ }
+ }
+ if (length != blk_data[j]->block_size)
+ dev_err(pcm_dev->dev, "%s: %u %u size is not same\n",
+ __func__, length, blk_data[j]->block_size);
+ }
+
+out:
+ return;
+}
+
+static int pcmdevice_mute(struct snd_soc_dai *dai, int mute, int stream)
+{
+ struct snd_soc_component *codec = dai->component;
+ struct pcmdevice_priv *pcm_dev = snd_soc_component_get_drvdata(codec);
+ unsigned char block_type;
+
+ if (pcm_dev->fw_state == PCMDEVICE_FW_LOAD_FAILED) {
+ dev_err(pcm_dev->dev, "%s: bin file not loaded\n", __func__);
+ return -EINVAL;
+ }
+
+ if (mute)
+ block_type = PCMDEVICE_BIN_BLK_PRE_SHUTDOWN;
+ else
+ block_type = PCMDEVICE_BIN_BLK_PRE_POWER_UP;
+
+ mutex_lock(&pcm_dev->codec_lock);
+ pcmdevice_select_cfg_blk(pcm_dev, pcm_dev->cur_conf, block_type);
+ mutex_unlock(&pcm_dev->codec_lock);
+ return 0;
+}
+
+static int pcmdevice_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
+{
+ struct pcmdevice_priv *pcm_dev = snd_soc_dai_get_drvdata(dai);
+ unsigned int fsrate;
+ unsigned int slot_width;
+ int bclk_rate;
+ int ret = 0;
+
+ fsrate = params_rate(params);
+ switch (fsrate) {
+ case 48000:
+ break;
+ case 44100:
+ break;
+ default:
+ dev_err(pcm_dev->dev, "%s: incorrect sample rate = %u\n",
+ __func__, fsrate);
+ ret = -EINVAL;
+ goto out;
+ }
+
+ slot_width = params_width(params);
+ switch (slot_width) {
+ case 16:
+ break;
+ case 20:
+ break;
+ case 24:
+ break;
+ case 32:
+ break;
+ default:
+ dev_err(pcm_dev->dev, "%s: incorrect slot width = %u\n",
+ __func__, slot_width);
+ ret = -EINVAL;
+ goto out;
+ }
+
+ bclk_rate = snd_soc_params_to_bclk(params);
+ if (bclk_rate < 0) {
+ dev_err(pcm_dev->dev, "%s: incorrect bclk rate = %d\n",
+ __func__, bclk_rate);
+ ret = bclk_rate;
+ }
+
+out:
+ return ret;
+}
+
+static const struct snd_soc_dai_ops pcmdevice_dai_ops = {
+ .mute_stream = pcmdevice_mute,
+ .hw_params = pcmdevice_hw_params,
+};
+
+static struct snd_soc_dai_driver pcmdevice_dai_driver[] = {
+ {
+ .name = "pcmdevice-codec",
+ .capture = {
+ .stream_name = "Capture",
+ .channels_min = 2,
+ .channels_max = PCMDEVICE_MAX_CHANNELS,
+ .rates = PCMDEVICE_RATES,
+ .formats = PCMDEVICE_FORMATS,
+ },
+ .playback = {
+ .stream_name = "Playback",
+ .channels_min = 2,
+ .channels_max = PCMDEVICE_MAX_CHANNELS,
+ .rates = PCMDEVICE_RATES,
+ .formats = PCMDEVICE_FORMATS,
+ },
+ .ops = &pcmdevice_dai_ops,
+ .symmetric_rate = 1,
+ }
+};
+
+#ifdef CONFIG_OF
+static const struct of_device_id pcmdevice_of_match[] = {
+ { .compatible = "ti,adc3120" },
+ { .compatible = "ti,adc5120" },
+ { .compatible = "ti,adc6120" },
+ { .compatible = "ti,dix4192" },
+ { .compatible = "ti,pcm1690" },
+ { .compatible = "ti,pcm3120" },
+ { .compatible = "ti,pcm3140" },
+ { .compatible = "ti,pcm5120" },
+ { .compatible = "ti,pcm5140" },
+ { .compatible = "ti,pcm6120" },
+ { .compatible = "ti,pcm6140" },
+ { .compatible = "ti,pcm6240" },
+ { .compatible = "ti,pcm6260" },
+ { .compatible = "ti,pcm9211" },
+ { .compatible = "ti,pcmd3140" },
+ { .compatible = "ti,pcmd3180" },
+ { .compatible = "ti,pcmd512x" },
+ { .compatible = "ti,taa5212" },
+ { .compatible = "ti,taa5412" },
+ { .compatible = "ti,tad5212" },
+ { .compatible = "ti,tad5412" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, pcmdevice_of_match);
+#endif
+
+static const struct regmap_range_cfg pcmdevice_ranges[] = {
+ {
+ .range_min = 0,
+ .range_max = 256 * 128,
+ .selector_reg = PCMDEVICE_PAGE_SELECT,
+ .selector_mask = 0xff,
+ .selector_shift = 0,
+ .window_start = 0,
+ .window_len = 128,
+ },
+};
+
+static const struct regmap_config pcmdevice_i2c_regmap = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .cache_type = REGCACHE_MAPLE,
+ .ranges = pcmdevice_ranges,
+ .num_ranges = ARRAY_SIZE(pcmdevice_ranges),
+ .max_register = 256 * 128,
+};
+
+static void pcmdevice_remove(struct pcmdevice_priv *pcm_dev)
+{
+ if (gpio_is_valid(pcm_dev->irq_info.gpio)) {
+ gpio_free(pcm_dev->irq_info.gpio);
+ free_irq(pcm_dev->irq_info.nmb, pcm_dev);
+ }
+ mutex_destroy(&pcm_dev->codec_lock);
+}
+
+static char *str_to_upper(char *str)
+{
+ char *orig = str;
+
+ if (!str)
+ return NULL;
+
+ while (*str) {
+ *str = toupper(*str);
+ str++;
+ }
+
+ return orig;
+}
+
+static int pcmdevice_i2c_probe(struct i2c_client *i2c)
+{
+ const struct i2c_device_id *id = i2c_match_id(pcmdevice_i2c_id, i2c);
+ struct pcmdevice_priv *pcm_dev;
+ struct device_node *np;
+ unsigned int dev_addrs[PCMDEVICE_MAX_I2C_DEVICES];
+ int ret = 0, i = 0, ndev = 0;
+#ifdef CONFIG_OF
+ const __be32 *reg, *reg_end;
+ int len, sw, aw;
+#endif
+
+ pcm_dev = devm_kzalloc(&i2c->dev, sizeof(*pcm_dev), GFP_KERNEL);
+ if (!pcm_dev) {
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ pcm_dev->chip_id = (id != NULL) ? id->driver_data : 0;
+
+ pcm_dev->dev = &i2c->dev;
+ pcm_dev->client = i2c;
+
+ if (pcm_dev->chip_id >= MAX_DEVICE)
+ pcm_dev->chip_id = 0;
+
+ strscpy(pcm_dev->dev_name, pcmdevice_i2c_id[pcm_dev->chip_id].name,
+ sizeof(pcm_dev->dev_name));
+
+ strscpy(pcm_dev->upper_dev_name,
+ pcmdevice_i2c_id[pcm_dev->chip_id].name,
+ sizeof(pcm_dev->upper_dev_name));
+
+ str_to_upper(pcm_dev->upper_dev_name);
+
+ pcm_dev->regmap = devm_regmap_init_i2c(i2c, &pcmdevice_i2c_regmap);
+ if (IS_ERR(pcm_dev->regmap)) {
+ ret = PTR_ERR(pcm_dev->regmap);
+ dev_err(&i2c->dev, "%s: failed to allocate register map: %d\n",
+ __func__, ret);
+ goto out;
+ }
+
+ i2c_set_clientdata(i2c, pcm_dev);
+ mutex_init(&pcm_dev->codec_lock);
+ np = pcm_dev->dev->of_node;
+#ifdef CONFIG_OF
+ aw = of_n_addr_cells(np);
+ sw = of_n_size_cells(np);
+ if (sw == 0) {
+ reg = (const __be32 *)of_get_property(np,
+ "reg", &len);
+ reg_end = reg + len/sizeof(*reg);
+ ndev = 0;
+ do {
+ dev_addrs[ndev] = of_read_number(reg, aw);
+ reg += aw;
+ ndev++;
+ } while (reg < reg_end);
+ } else {
+ ndev = 1;
+ dev_addrs[0] = i2c->addr;
+ }
+#else
+ ndev = 1;
+ dev_addrs[0] = i2c->addr;
+#endif
+ pcm_dev->irq_info.gpio = of_irq_get(np, 0);
+
+ for (i = 0; i < ndev; i++)
+ pcm_dev->addr[i] = dev_addrs[i];
+
+ pcm_dev->ndev = ndev;
+
+ pcm_dev->hw_rst = devm_gpiod_get_optional(&i2c->dev,
+ "reset-gpios", GPIOD_OUT_HIGH);
+ /* No reset GPIO, no side-effect */
+ if (IS_ERR(pcm_dev->hw_rst)) {
+ if (pcm_dev->chip_id == PCM9211 || pcm_dev->chip_id == PCM1690)
+ pcm9211_sw_rst(pcm_dev);
+ else
+ pcmdevice_sw_rst(pcm_dev);
+ } else {
+ gpiod_set_value_cansleep(pcm_dev->hw_rst, 0);
+ usleep_range(500, 1000);
+ gpiod_set_value_cansleep(pcm_dev->hw_rst, 1);
+ }
+
+ if (pcm_dev->chip_id == PCM1690)
+ goto skip_interrupt;
+ if (gpio_is_valid(pcm_dev->irq_info.gpio)) {
+ dev_dbg(pcm_dev->dev, "irq-gpio = %d", pcm_dev->irq_info.gpio);
+
+ ret = gpio_request(pcm_dev->irq_info.gpio, "PCMDEV-IRQ");
+ if (!ret) {
+ int gpio = pcm_dev->irq_info.gpio;
+
+ gpio_direction_input(gpio);
+ pcm_dev->irq_info.nmb = gpio_to_irq(gpio);
+
+ } else
+ dev_err(pcm_dev->dev, "%s: GPIO %d request error\n",
+ __func__, pcm_dev->irq_info.gpio);
+ } else
+ dev_err(pcm_dev->dev, "Looking up irq-gpio failed %d\n",
+ pcm_dev->irq_info.gpio);
+
+skip_interrupt:
+ ret = devm_snd_soc_register_component(&i2c->dev,
+ &soc_codec_driver_pcmdevice, pcmdevice_dai_driver,
+ ARRAY_SIZE(pcmdevice_dai_driver));
+ if (ret < 0)
+ dev_err(&i2c->dev, "probe register comp failed %d\n", ret);
+
+out:
+ if (ret < 0)
+ pcmdevice_remove(pcm_dev);
+ return ret;
+}
+
+static void pcmdevice_i2c_remove(struct i2c_client *i2c)
+{
+ struct pcmdevice_priv *pcm_dev = i2c_get_clientdata(i2c);
+
+ pcmdevice_remove(pcm_dev);
+}
+
+static struct i2c_driver pcmdevice_i2c_driver = {
+ .driver = {
+ .name = "pcmdevice-codec",
+ .of_match_table = of_match_ptr(pcmdevice_of_match),
+ },
+ .probe = pcmdevice_i2c_probe,
+ .remove = pcmdevice_i2c_remove,
+ .id_table = pcmdevice_i2c_id,
+};
+module_i2c_driver(pcmdevice_i2c_driver);
+
+MODULE_AUTHOR("Shenghao Ding <shenghao-ding@ti.com>");
+MODULE_DESCRIPTION("ASoC PCM6240 Family Audio ADC/DAC Driver");
+MODULE_LICENSE("GPL");
--
2.35.7
^ permalink raw reply related
* RE: [EXT] Re: [PATCH v1 1/1] arm64: dts: imx93-11x11-evk: add rtc PCF2131 support
From: Joy Zou @ 2024-04-07 9:24 UTC (permalink / raw)
To: Krzysztof Kozlowski, Jacky Bai, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
shawnguo@kernel.org, s.hauer@pengutronix.de
Cc: kernel@pengutronix.de, festevam@gmail.com, dl-linux-imx,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
In-Reply-To: <d18b05d9-266b-4a1b-a2cd-3b6f8173a39b@linaro.org>
BR
Joy Zou
> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Sent: 2024年4月7日 17:12
> To: Joy Zou <joy.zou@nxp.com>; Jacky Bai <ping.bai@nxp.com>;
> robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> conor+dt@kernel.org; shawnguo@kernel.org; s.hauer@pengutronix.de
> Cc: kernel@pengutronix.de; festevam@gmail.com; dl-linux-imx
> <linux-imx@nxp.com>; devicetree@vger.kernel.org; imx@lists.linux.dev;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org
> Subject: Re: [EXT] Re: [PATCH v1 1/1] arm64: dts: imx93-11x11-evk: add rtc
> PCF2131 support
>
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
>
>
> On 07/04/2024 11:09, Joy Zou wrote:
> >
> >> -----Original Message-----
> >> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> >> Sent: 2024年4月7日 17:04
> >> To: Joy Zou <joy.zou@nxp.com>; Jacky Bai <ping.bai@nxp.com>;
> >> robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> >> conor+dt@kernel.org; shawnguo@kernel.org; s.hauer@pengutronix.de
> >> Cc: kernel@pengutronix.de; festevam@gmail.com; dl-linux-imx
> >> <linux-imx@nxp.com>; devicetree@vger.kernel.org; imx@lists.linux.dev;
> >> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org
> >> Subject: [EXT] Re: [PATCH v1 1/1] arm64: dts: imx93-11x11-evk: add
> >> rtc
> >> PCF2131 support
> >>> +&lpi2c3 {
> >>> + #address-cells = <1>;
> >>> + #size-cells = <0>;
> >>> + clock-frequency = <400000>;
> >>> + pinctrl-names = "default", "sleep";
> >>> + pinctrl-0 = <&pinctrl_lpi2c3>;
> >>> + pinctrl-1 = <&pinctrl_lpi2c3>;
> >>> + status = "okay";
> >>> +
> >>> + pcf2131: rtc@53 {
> >>> + compatible = "nxp,pcf2131";
> >>> + reg = <0x53>;
> >>> + interrupt-parent = <&pcal6524>;
> >>> + interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
> >>> + status = "okay";
> >>
> >> Really, just drop...
> > Ok, will drop the status in next version.
> > Thanks for your comment!
>
> Please read DTS coding style.
Thanks you very much!
Yeah, I have read the DTS coding style. The “status” property is by default “okay”, thus it can be omitted.
BR
Joy Zou
>
> Best regards,
> Krzysztof
^ permalink raw reply
* [PATCH v9 0/4] ASoc: PCM6240: mixer-test report
From: Shenghao Ding @ 2024-04-07 9:18 UTC (permalink / raw)
To: linux-kernel
Cc: lgirdwood, broonie, robh+dt, krzysztof.kozlowski+dt, conor+dt,
linux-sound, devicetree, perex, tiwai, 13916275206, mohit.chawla,
soyer, jkhuang3, tiwai, pdjuandi, manisha.agrawal, aviel,
hnagalla, praneeth, Baojun.Xu, Shenghao Ding
v9:
- Retest with the code with Volume kcontrol
v8:
- use some reasonable format of changelog.
- fixed the format of subject
- remove *** BLURB HERE ***
mixer-test report:
root@am335x-evm:/bin# mixer-test
TAP version 13
# Card 0 - TI BeagleBone Black (TI BeagleBone Black)
1..455
ok 1 get_value.0.64
# 0.64 PCMD3180 i2c2 Profile id
ok 2 name.0.64
ok 3 write_default.0.64
ok 4 write_valid.0.64
ok 5 write_invalid.0.64
ok 6 event_missing.0.64
ok 7 event_spurious.0.64
ok 8 get_value.0.63
# 0.63 PCMD3180 i2c2 Dev3 Ch8 Digi Volume
ok 9 name.0.63
ok 10 write_default.0.63
ok 11 write_valid.0.63
ok 12 write_invalid.0.63
ok 13 event_missing.0.63
ok 14 event_spurious.0.63
ok 15 get_value.0.62
# 0.62 PCMD3180 i2c2 Dev3 Ch7 Digi Volume
ok 16 name.0.62
ok 17 write_default.0.62
ok 18 write_valid.0.62
ok 19 write_invalid.0.62
ok 20 event_missing.0.62
ok 21 event_spurious.0.62
ok 22 get_value.0.61
# 0.61 PCMD3180 i2c2 Dev3 Ch6 Digi Volume
ok 23 name.0.61
ok 24 write_default.0.61
ok 25 write_valid.0.61
ok 26 write_invalid.0.61
ok 27 event_missing.0.61
ok 28 event_spurious.0.61
ok 29 get_value.0.60
# 0.60 PCMD3180 i2c2 Dev3 Ch5 Digi Volume
ok 30 name.0.60
ok 31 write_default.0.60
ok 32 write_valid.0.60
ok 33 write_invalid.0.60
ok 34 event_missing.0.60
ok 35 event_spurious.0.60
ok 36 get_value.0.59
# 0.59 PCMD3180 i2c2 Dev3 Ch4 Digi Volume
ok 37 name.0.59
ok 38 write_default.0.59
ok 39 write_valid.0.59
ok 40 write_invalid.0.59
ok 41 event_missing.0.59
ok 42 event_spurious.0.59
ok 43 get_value.0.58
# 0.58 PCMD3180 i2c2 Dev3 Ch3 Digi Volume
ok 44 name.0.58
ok 45 write_default.0.58
ok 46 write_valid.0.58
ok 47 write_invalid.0.58
ok 48 event_missing.0.58
ok 49 event_spurious.0.58
ok 50 get_value.0.57
# 0.57 PCMD3180 i2c2 Dev3 Ch2 Digi Volume
ok 51 name.0.57
ok 52 write_default.0.57
ok 53 write_valid.0.57
ok 54 write_invalid.0.57
ok 55 event_missing.0.57
ok 56 event_spurious.0.57
ok 57 get_value.0.56
# 0.56 PCMD3180 i2c2 Dev3 Ch1 Digi Volume
ok 58 name.0.56
ok 59 write_default.0.56
ok 60 write_valid.0.56
ok 61 write_invalid.0.56
ok 62 event_missing.0.56
ok 63 event_spurious.0.56
ok 64 get_value.0.55
# 0.55 PCMD3180 i2c2 Dev3 Ch8 Fine Volume
ok 65 name.0.55
ok 66 write_default.0.55
ok 67 write_valid.0.55
ok 68 write_invalid.0.55
ok 69 event_missing.0.55
ok 70 event_spurious.0.55
ok 71 get_value.0.54
# 0.54 PCMD3180 i2c2 Dev3 Ch7 Fine Volume
ok 72 name.0.54
ok 73 write_default.0.54
ok 74 write_valid.0.54
ok 75 write_invalid.0.54
ok 76 event_missing.0.54
ok 77 event_spurious.0.54
ok 78 get_value.0.53
# 0.53 PCMD3180 i2c2 Dev3 Ch6 Fine Volume
ok 79 name.0.53
ok 80 write_default.0.53
ok 81 write_valid.0.53
ok 82 write_invalid.0.53
ok 83 event_missing.0.53
ok 84 event_spurious.0.53
ok 85 get_value.0.52
# 0.52 PCMD3180 i2c2 Dev3 Ch5 Fine Volume
ok 86 name.0.52
ok 87 write_default.0.52
ok 88 write_valid.0.52
ok 89 write_invalid.0.52
ok 90 event_missing.0.52
ok 91 event_spurious.0.52
ok 92 get_value.0.51
# 0.51 PCMD3180 i2c2 Dev3 Ch4 Fine Volume
ok 93 name.0.51
ok 94 write_default.0.51
ok 95 write_valid.0.51
ok 96 write_invalid.0.51
ok 97 event_missing.0.51
ok 98 event_spurious.0.51
ok 99 get_value.0.50
# 0.50 PCMD3180 i2c2 Dev3 Ch3 Fine Volume
ok 100 name.0.50
ok 101 write_default.0.50
ok 102 write_valid.0.50
ok 103 write_invalid.0.50
ok 104 event_missing.0.50
ok 105 event_spurious.0.50
ok 106 get_value.0.49
# 0.49 PCMD3180 i2c2 Dev3 Ch2 Fine Volume
ok 107 name.0.49
ok 108 write_default.0.49
ok 109 write_valid.0.49
ok 110 write_invalid.0.49
ok 111 event_missing.0.49
ok 112 event_spurious.0.49
ok 113 get_value.0.48
# 0.48 PCMD3180 i2c2 Dev3 Ch1 Fine Volume
ok 114 name.0.48
ok 115 write_default.0.48
ok 116 write_valid.0.48
ok 117 write_invalid.0.48
ok 118 event_missing.0.48
ok 119 event_spurious.0.48
ok 120 get_value.0.47
# 0.47 PCMD3180 i2c2 Dev2 Ch8 Digi Volume
ok 121 name.0.47
ok 122 write_default.0.47
ok 123 write_valid.0.47
ok 124 write_invalid.0.47
ok 125 event_missing.0.47
ok 126 event_spurious.0.47
ok 127 get_value.0.46
# 0.46 PCMD3180 i2c2 Dev2 Ch7 Digi Volume
ok 128 name.0.46
ok 129 write_default.0.46
ok 130 write_valid.0.46
ok 131 write_invalid.0.46
ok 132 event_missing.0.46
ok 133 event_spurious.0.46
ok 134 get_value.0.45
# 0.45 PCMD3180 i2c2 Dev2 Ch6 Digi Volume
ok 135 name.0.45
ok 136 write_default.0.45
ok 137 write_valid.0.45
ok 138 write_invalid.0.45
ok 139 event_missing.0.45
ok 140 event_spurious.0.45
ok 141 get_value.0.44
# 0.44 PCMD3180 i2c2 Dev2 Ch5 Digi Volume
ok 142 name.0.44
ok 143 write_default.0.44
ok 144 write_valid.0.44
ok 145 write_invalid.0.44
ok 146 event_missing.0.44
ok 147 event_spurious.0.44
ok 148 get_value.0.43
# 0.43 PCMD3180 i2c2 Dev2 Ch4 Digi Volume
ok 149 name.0.43
ok 150 write_default.0.43
ok 151 write_valid.0.43
ok 152 write_invalid.0.43
ok 153 event_missing.0.43
ok 154 event_spurious.0.43
ok 155 get_value.0.42
# 0.42 PCMD3180 i2c2 Dev2 Ch3 Digi Volume
ok 156 name.0.42
ok 157 write_default.0.42
ok 158 write_valid.0.42
ok 159 write_invalid.0.42
ok 160 event_missing.0.42
ok 161 event_spurious.0.42
ok 162 get_value.0.41
# 0.41 PCMD3180 i2c2 Dev2 Ch2 Digi Volume
ok 163 name.0.41
ok 164 write_default.0.41
ok 165 write_valid.0.41
ok 166 write_invalid.0.41
ok 167 event_missing.0.41
ok 168 event_spurious.0.41
ok 169 get_value.0.40
# 0.40 PCMD3180 i2c2 Dev2 Ch1 Digi Volume
ok 170 name.0.40
ok 171 write_default.0.40
ok 172 write_valid.0.40
ok 173 write_invalid.0.40
ok 174 event_missing.0.40
ok 175 event_spurious.0.40
ok 176 get_value.0.39
# 0.39 PCMD3180 i2c2 Dev2 Ch8 Fine Volume
ok 177 name.0.39
ok 178 write_default.0.39
ok 179 write_valid.0.39
ok 180 write_invalid.0.39
ok 181 event_missing.0.39
ok 182 event_spurious.0.39
ok 183 get_value.0.38
# 0.38 PCMD3180 i2c2 Dev2 Ch7 Fine Volume
ok 184 name.0.38
ok 185 write_default.0.38
ok 186 write_valid.0.38
ok 187 write_invalid.0.38
ok 188 event_missing.0.38
ok 189 event_spurious.0.38
ok 190 get_value.0.37
# 0.37 PCMD3180 i2c2 Dev2 Ch6 Fine Volume
ok 191 name.0.37
ok 192 write_default.0.37
ok 193 write_valid.0.37
ok 194 write_invalid.0.37
ok 195 event_missing.0.37
ok 196 event_spurious.0.37
ok 197 get_value.0.36
# 0.36 PCMD3180 i2c2 Dev2 Ch5 Fine Volume
ok 198 name.0.36
ok 199 write_default.0.36
ok 200 write_valid.0.36
ok 201 write_invalid.0.36
ok 202 event_missing.0.36
ok 203 event_spurious.0.36
ok 204 get_value.0.35
# 0.35 PCMD3180 i2c2 Dev2 Ch4 Fine Volume
ok 205 name.0.35
ok 206 write_default.0.35
ok 207 write_valid.0.35
ok 208 write_invalid.0.35
ok 209 event_missing.0.35
ok 210 event_spurious.0.35
ok 211 get_value.0.34
# 0.34 PCMD3180 i2c2 Dev2 Ch3 Fine Volume
ok 212 name.0.34
ok 213 write_default.0.34
ok 214 write_valid.0.34
ok 215 write_invalid.0.34
ok 216 event_missing.0.34
ok 217 event_spurious.0.34
ok 218 get_value.0.33
# 0.33 PCMD3180 i2c2 Dev2 Ch2 Fine Volume
ok 219 name.0.33
ok 220 write_default.0.33
ok 221 write_valid.0.33
ok 222 write_invalid.0.33
ok 223 event_missing.0.33
ok 224 event_spurious.0.33
ok 225 get_value.0.32
# 0.32 PCMD3180 i2c2 Dev2 Ch1 Fine Volume
ok 226 name.0.32
ok 227 write_default.0.32
ok 228 write_valid.0.32
ok 229 write_invalid.0.32
ok 230 event_missing.0.32
ok 231 event_spurious.0.32
ok 232 get_value.0.31
# 0.31 PCMD3180 i2c2 Dev1 Ch8 Digi Volume
ok 233 name.0.31
ok 234 write_default.0.31
ok 235 write_valid.0.31
ok 236 write_invalid.0.31
ok 237 event_missing.0.31
ok 238 event_spurious.0.31
ok 239 get_value.0.30
# 0.30 PCMD3180 i2c2 Dev1 Ch7 Digi Volume
ok 240 name.0.30
ok 241 write_default.0.30
ok 242 write_valid.0.30
ok 243 write_invalid.0.30
ok 244 event_missing.0.30
ok 245 event_spurious.0.30
ok 246 get_value.0.29
# 0.29 PCMD3180 i2c2 Dev1 Ch6 Digi Volume
ok 247 name.0.29
ok 248 write_default.0.29
ok 249 write_valid.0.29
ok 250 write_invalid.0.29
ok 251 event_missing.0.29
ok 252 event_spurious.0.29
ok 253 get_value.0.28
# 0.28 PCMD3180 i2c2 Dev1 Ch5 Digi Volume
ok 254 name.0.28
ok 255 write_default.0.28
ok 256 write_valid.0.28
ok 257 write_invalid.0.28
ok 258 event_missing.0.28
ok 259 event_spurious.0.28
ok 260 get_value.0.27
# 0.27 PCMD3180 i2c2 Dev1 Ch4 Digi Volume
ok 261 name.0.27
ok 262 write_default.0.27
ok 263 write_valid.0.27
ok 264 write_invalid.0.27
ok 265 event_missing.0.27
ok 266 event_spurious.0.27
ok 267 get_value.0.26
# 0.26 PCMD3180 i2c2 Dev1 Ch3 Digi Volume
ok 268 name.0.26
ok 269 write_default.0.26
ok 270 write_valid.0.26
ok 271 write_invalid.0.26
ok 272 event_missing.0.26
ok 273 event_spurious.0.26
ok 274 get_value.0.25
# 0.25 PCMD3180 i2c2 Dev1 Ch2 Digi Volume
ok 275 name.0.25
ok 276 write_default.0.25
ok 277 write_valid.0.25
ok 278 write_invalid.0.25
ok 279 event_missing.0.25
ok 280 event_spurious.0.25
ok 281 get_value.0.24
# 0.24 PCMD3180 i2c2 Dev1 Ch1 Digi Volume
ok 282 name.0.24
ok 283 write_default.0.24
ok 284 write_valid.0.24
ok 285 write_invalid.0.24
ok 286 event_missing.0.24
ok 287 event_spurious.0.24
ok 288 get_value.0.23
# 0.23 PCMD3180 i2c2 Dev1 Ch8 Fine Volume
ok 289 name.0.23
ok 290 write_default.0.23
ok 291 write_valid.0.23
ok 292 write_invalid.0.23
ok 293 event_missing.0.23
ok 294 event_spurious.0.23
ok 295 get_value.0.22
# 0.22 PCMD3180 i2c2 Dev1 Ch7 Fine Volume
ok 296 name.0.22
ok 297 write_default.0.22
ok 298 write_valid.0.22
ok 299 write_invalid.0.22
ok 300 event_missing.0.22
ok 301 event_spurious.0.22
ok 302 get_value.0.21
# 0.21 PCMD3180 i2c2 Dev1 Ch6 Fine Volume
ok 303 name.0.21
ok 304 write_default.0.21
ok 305 write_valid.0.21
ok 306 write_invalid.0.21
ok 307 event_missing.0.21
ok 308 event_spurious.0.21
ok 309 get_value.0.20
# 0.20 PCMD3180 i2c2 Dev1 Ch5 Fine Volume
ok 310 name.0.20
ok 311 write_default.0.20
ok 312 write_valid.0.20
ok 313 write_invalid.0.20
ok 314 event_missing.0.20
ok 315 event_spurious.0.20
ok 316 get_value.0.19
# 0.19 PCMD3180 i2c2 Dev1 Ch4 Fine Volume
ok 317 name.0.19
ok 318 write_default.0.19
ok 319 write_valid.0.19
ok 320 write_invalid.0.19
ok 321 event_missing.0.19
ok 322 event_spurious.0.19
ok 323 get_value.0.18
# 0.18 PCMD3180 i2c2 Dev1 Ch3 Fine Volume
ok 324 name.0.18
ok 325 write_default.0.18
ok 326 write_valid.0.18
ok 327 write_invalid.0.18
ok 328 event_missing.0.18
ok 329 event_spurious.0.18
ok 330 get_value.0.17
# 0.17 PCMD3180 i2c2 Dev1 Ch2 Fine Volume
ok 331 name.0.17
ok 332 write_default.0.17
ok 333 write_valid.0.17
ok 334 write_invalid.0.17
ok 335 event_missing.0.17
ok 336 event_spurious.0.17
ok 337 get_value.0.16
# 0.16 PCMD3180 i2c2 Dev1 Ch1 Fine Volume
ok 338 name.0.16
ok 339 write_default.0.16
ok 340 write_valid.0.16
ok 341 write_invalid.0.16
ok 342 event_missing.0.16
ok 343 event_spurious.0.16
ok 344 get_value.0.15
# 0.15 PCMD3180 i2c2 Dev0 Ch8 Digi Volume
ok 345 name.0.15
ok 346 write_default.0.15
ok 347 write_valid.0.15
ok 348 write_invalid.0.15
ok 349 event_missing.0.15
ok 350 event_spurious.0.15
ok 351 get_value.0.14
# 0.14 PCMD3180 i2c2 Dev0 Ch7 Digi Volume
ok 352 name.0.14
ok 353 write_default.0.14
ok 354 write_valid.0.14
ok 355 write_invalid.0.14
ok 356 event_missing.0.14
ok 357 event_spurious.0.14
ok 358 get_value.0.13
# 0.13 PCMD3180 i2c2 Dev0 Ch6 Digi Volume
ok 359 name.0.13
ok 360 write_default.0.13
ok 361 write_valid.0.13
ok 362 write_invalid.0.13
ok 363 event_missing.0.13
ok 364 event_spurious.0.13
ok 365 get_value.0.12
# 0.12 PCMD3180 i2c2 Dev0 Ch5 Digi Volume
ok 366 name.0.12
ok 367 write_default.0.12
ok 368 write_valid.0.12
ok 369 write_invalid.0.12
ok 370 event_missing.0.12
ok 371 event_spurious.0.12
ok 372 get_value.0.11
# 0.11 PCMD3180 i2c2 Dev0 Ch4 Digi Volume
ok 373 name.0.11
ok 374 write_default.0.11
ok 375 write_valid.0.11
ok 376 write_invalid.0.11
ok 377 event_missing.0.11
ok 378 event_spurious.0.11
ok 379 get_value.0.10
# 0.10 PCMD3180 i2c2 Dev0 Ch3 Digi Volume
ok 380 name.0.10
ok 381 write_default.0.10
ok 382 write_valid.0.10
ok 383 write_invalid.0.10
ok 384 event_missing.0.10
ok 385 event_spurious.0.10
ok 386 get_value.0.9
# 0.9 PCMD3180 i2c2 Dev0 Ch2 Digi Volume
ok 387 name.0.9
ok 388 write_default.0.9
ok 389 write_valid.0.9
ok 390 write_invalid.0.9
ok 391 event_missing.0.9
ok 392 event_spurious.0.9
ok 393 get_value.0.8
# 0.8 PCMD3180 i2c2 Dev0 Ch1 Digi Volume
ok 394 name.0.8
ok 395 write_default.0.8
ok 396 write_valid.0.8
ok 397 write_invalid.0.8
ok 398 event_missing.0.8
ok 399 event_spurious.0.8
ok 400 get_value.0.7
# 0.7 PCMD3180 i2c2 Dev0 Ch8 Fine Volume
ok 401 name.0.7
ok 402 write_default.0.7
ok 403 write_valid.0.7
ok 404 write_invalid.0.7
ok 405 event_missing.0.7
ok 406 event_spurious.0.7
ok 407 get_value.0.6
# 0.6 PCMD3180 i2c2 Dev0 Ch7 Fine Volume
ok 408 name.0.6
ok 409 write_default.0.6
ok 410 write_valid.0.6
ok 411 write_invalid.0.6
ok 412 event_missing.0.6
ok 413 event_spurious.0.6
ok 414 get_value.0.5
# 0.5 PCMD3180 i2c2 Dev0 Ch6 Fine Volume
ok 415 name.0.5
ok 416 write_default.0.5
ok 417 write_valid.0.5
ok 418 write_invalid.0.5
ok 419 event_missing.0.5
ok 420 event_spurious.0.5
ok 421 get_value.0.4
# 0.4 PCMD3180 i2c2 Dev0 Ch5 Fine Volume
ok 422 name.0.4
ok 423 write_default.0.4
ok 424 write_valid.0.4
ok 425 write_invalid.0.4
ok 426 event_missing.0.4
ok 427 event_spurious.0.4
ok 428 get_value.0.3
# 0.3 PCMD3180 i2c2 Dev0 Ch4 Fine Volume
ok 429 name.0.3
ok 430 write_default.0.3
ok 431 write_valid.0.3
ok 432 write_invalid.0.3
ok 433 event_missing.0.3
ok 434 event_spurious.0.3
ok 435 get_value.0.2
# 0.2 PCMD3180 i2c2 Dev0 Ch3 Fine Volume
ok 436 name.0.2
ok 437 write_default.0.2
ok 438 write_valid.0.2
ok 439 write_invalid.0.2
ok 440 event_missing.0.2
ok 441 event_spurious.0.2
ok 442 get_value.0.1
# 0.1 PCMD3180 i2c2 Dev0 Ch2 Fine Volume
ok 443 name.0.1
ok 444 write_default.0.1
ok 445 write_valid.0.1
ok 446 write_invalid.0.1
ok 447 event_missing.0.1
ok 448 event_spurious.0.1
ok 449 get_value.0.0
# 0.0 PCMD3180 i2c2 Dev0 Ch1 Fine Volume
ok 450 name.0.0
ok 451 write_default.0.0
ok 452 write_valid.0.0
ok 453 write_invalid.0.0
ok 454 event_missing.0.0
ok 455 event_spurious.0.0
# Totals: pass:455 fail:0 xfail:0 xpass:0 skip:0 error:0
root@am335x-evm:/bin#
Signed-off-by: Shenghao Ding <shenghao-ding@ti.com>
Shenghao Ding (4):
ASoc: PCM6240: Create PCM6240 Family driver code
ASoc: PCM6240: Create header file for PCM6240 Family driver code
ASoc: PCM6240: Add compile item for PCM6240 Family driver
ASoc: dt-bindings: PCM6240: Add initial DT binding
.../devicetree/bindings/sound/ti,pcm6240.yaml | 177 ++
sound/soc/codecs/Kconfig | 10 +
sound/soc/codecs/Makefile | 2 +
sound/soc/codecs/pcm6240.c | 2217 +++++++++++++++++
sound/soc/codecs/pcm6240.h | 252 ++
5 files changed, 2658 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/ti,pcm6240.yaml
create mode 100644 sound/soc/codecs/pcm6240.c
create mode 100644 sound/soc/codecs/pcm6240.h
--
2.35.7
^ permalink raw reply
* Re: [EXT] Re: [PATCH v1 1/1] arm64: dts: imx93-11x11-evk: add rtc PCF2131 support
From: Krzysztof Kozlowski @ 2024-04-07 9:12 UTC (permalink / raw)
To: Joy Zou, Jacky Bai, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
shawnguo@kernel.org, s.hauer@pengutronix.de
Cc: kernel@pengutronix.de, festevam@gmail.com, dl-linux-imx,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
In-Reply-To: <AS4PR04MB9386C629F898A8417AE57506E1012@AS4PR04MB9386.eurprd04.prod.outlook.com>
On 07/04/2024 11:09, Joy Zou wrote:
>
>> -----Original Message-----
>> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> Sent: 2024年4月7日 17:04
>> To: Joy Zou <joy.zou@nxp.com>; Jacky Bai <ping.bai@nxp.com>;
>> robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
>> conor+dt@kernel.org; shawnguo@kernel.org; s.hauer@pengutronix.de
>> Cc: kernel@pengutronix.de; festevam@gmail.com; dl-linux-imx
>> <linux-imx@nxp.com>; devicetree@vger.kernel.org; imx@lists.linux.dev;
>> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org
>> Subject: [EXT] Re: [PATCH v1 1/1] arm64: dts: imx93-11x11-evk: add rtc
>> PCF2131 support
>>> +&lpi2c3 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + clock-frequency = <400000>;
>>> + pinctrl-names = "default", "sleep";
>>> + pinctrl-0 = <&pinctrl_lpi2c3>;
>>> + pinctrl-1 = <&pinctrl_lpi2c3>;
>>> + status = "okay";
>>> +
>>> + pcf2131: rtc@53 {
>>> + compatible = "nxp,pcf2131";
>>> + reg = <0x53>;
>>> + interrupt-parent = <&pcal6524>;
>>> + interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
>>> + status = "okay";
>>
>> Really, just drop...
> Ok, will drop the status in next version.
> Thanks for your comment!
Please read DTS coding style.
Best regards,
Krzysztof
^ permalink raw reply
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