* [PATCH v2] dt-bindings: sound: Convert pcm3060 to DT schema
From: Padmashree S S @ 2026-03-26 18:37 UTC (permalink / raw)
To: k.marinushkin, lgirdwood, broonie
Cc: robh, conor+dt, krzk+dt, devicetree, linux-sound, linux-kernel,
Padmashree S S
Note:
* This patch is part of the GSoC2026 application process for device tree bindings conversions
* https://github.com/LinuxFoundationGSoC/ProjectIdeas/wiki/GSoC-2026-Device-Tree-Bindings
Signed-off-by: Padmashree S S <padmashreess2006@gmail.com>
---
.../devicetree/bindings/sound/pcm3060.txt | 23 ----------
.../devicetree/bindings/sound/pcm3060.yaml | 45 +++++++++++++++++++
2 files changed, 45 insertions(+), 23 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/sound/pcm3060.txt
create mode 100644 Documentation/devicetree/bindings/sound/pcm3060.yaml
diff --git a/Documentation/devicetree/bindings/sound/pcm3060.txt b/Documentation/devicetree/bindings/sound/pcm3060.txt
deleted file mode 100644
index 97de66932d44..000000000000
--- a/Documentation/devicetree/bindings/sound/pcm3060.txt
+++ /dev/null
@@ -1,23 +0,0 @@
-PCM3060 audio CODEC
-
-This driver supports both I2C and SPI.
-
-Required properties:
-
-- compatible: "ti,pcm3060"
-
-- reg : the I2C address of the device for I2C, the chip select
- number for SPI.
-
-Optional properties:
-
-- ti,out-single-ended: "true" if output is single-ended;
- "false" or not specified if output is differential.
-
-Examples:
-
- pcm3060: pcm3060@46 {
- compatible = "ti,pcm3060";
- reg = <0x46>;
- ti,out-single-ended = "true";
- };
diff --git a/Documentation/devicetree/bindings/sound/pcm3060.yaml b/Documentation/devicetree/bindings/sound/pcm3060.yaml
new file mode 100644
index 000000000000..ceb6f044b196
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/pcm3060.yaml
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/pcm3060.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: PCM3060 audio CODEC
+
+maintainers:
+ - Kirill Marinushkin <k.marinushkin@gmail.com>
+
+properties:
+ compatible:
+ const: ti,pcm3060
+
+ reg:
+ maxItems: 1
+ description: |
+ The I2C address of the device
+ or SPI chip select number.
+
+ ti,out-single-ended:
+ type: boolean
+ description: |
+ If present, the output is single-ended.
+ If absent, the output is differential.
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pcm3060: audio-codec@46 {
+ compatible = "ti,pcm3060";
+ reg = <0x46>;
+ ti,out-single-ended;
+ };
+ };
--
2.43.0
^ permalink raw reply related
* [PATCH v2 5/6] riscv: dts: spacemit: enable USB 3 ports on Milk-V Jupiter
From: Aurelien Jarno @ 2026-03-26 18:35 UTC (permalink / raw)
To: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Yixun Lan
Cc: Aurelien Jarno, Javier Martinez Canillas,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:RISC-V SPACEMIT SoC Support,
open list:RISC-V SPACEMIT SoC Support
In-Reply-To: <20260326183745.1370642-1-aurelien@aurel32.net>
Enable the DWC3 USB 3.0 controller (USB#2 port in the K1 datasheet) and
its associated combo_phy (USB 3 PHY) and usbphy2 (USB 2 PHY) on the
Milk-V Jupiter board.
The board uses a VLI VL817 hub, providing four ports. Two are routed to
the 3.0 type-A connectors, and two to the F_USB3 front USB header. The
hub requires two separate 5V power supplies: one for the hub itself and
one for the USB connectors. Add an always-on regulator sourcing 5V from
the DC-IN input, along with two GPIO-controlled fixed regulators to
manage the hub and connectors power supplies.
Note that the board also provides four USB 2.0 ports (two via type-A
connectors and two via the F_USB2 front USB header), but these are
handled by a different controller (USB#1 port in the K1 datasheet).
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
---
.../boot/dts/spacemit/k1-milkv-jupiter.dts | 62 +++++++++++++++++++
1 file changed, 62 insertions(+)
v2:
- Collect Reviewed-by:
diff --git a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
index bac6438c67532..8eeaf2631b719 100644
--- a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
@@ -58,6 +58,41 @@ reg_vcc_4v: regulator-vcc-4v {
regulator-always-on;
vin-supply = <®_dc_in>;
};
+
+ reg_vcc_5v: regulator-vcc-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ vin-supply = <®_dc_in>;
+ };
+
+ regulator-usb3-vbus-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "USB30_VBUS";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ vin-supply = <®_vcc_5v>;
+ gpio = <&gpio K1_GPIO(97) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ usb3_hub_5v: regulator-usb3-hub-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "USB30_HUB";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <®_vcc_5v>;
+ gpio = <&gpio K1_GPIO(123) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+};
+
+&combo_phy {
+ status = "okay";
};
ð0 {
@@ -302,3 +337,30 @@ &uart0 {
pinctrl-0 = <&uart0_2_cfg>;
status = "okay";
};
+
+&usbphy2 {
+ status = "okay";
+};
+
+&usb_dwc3 {
+ dr_mode = "host";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ hub_2_0: hub@1 {
+ compatible = "usb2109,2817";
+ reg = <0x1>;
+ vdd-supply = <&usb3_hub_5v>;
+ peer-hub = <&hub_3_0>;
+ reset-gpios = <&gpio K1_GPIO(124) GPIO_ACTIVE_LOW>;
+ };
+
+ hub_3_0: hub@2 {
+ compatible = "usb2109,817";
+ reg = <0x2>;
+ vdd-supply = <&usb3_hub_5v>;
+ peer-hub = <&hub_2_0>;
+ reset-gpios = <&gpio K1_GPIO(124) GPIO_ACTIVE_LOW>;
+ };
+};
--
2.51.0
^ permalink raw reply related
* [PATCH v2 6/6] riscv: dts: spacemit: enable PCIe ports on Milk-V Jupiter
From: Aurelien Jarno @ 2026-03-26 18:35 UTC (permalink / raw)
To: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Yixun Lan, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Alexandre Ghiti
Cc: Aurelien Jarno, Javier Martinez Canillas,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:RISC-V SPACEMIT SoC Support,
open list:RISC-V SPACEMIT SoC Support
In-Reply-To: <20260326183745.1370642-1-aurelien@aurel32.net>
Enable the two PCIe controller along with and their associated PHY. They
are routed to the M.2 M-key connector and to the PCIe x8 slot.
Add an always-on regulator sourcing 3.3V from the DC-IN input, to power
the PCIe ports.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
---
.../boot/dts/spacemit/k1-milkv-jupiter.dts | 42 +++++++++++++++++++
1 file changed, 42 insertions(+)
v2:
- Collect Reviewed-by:
- Fix a typo in the description
diff --git a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
index 8eeaf2631b719..afaad59e6bce2 100644
--- a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
@@ -40,6 +40,16 @@ led2 {
};
};
+ pcie_vcc_3v3: regulator-pcie-vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie_vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ vin-supply = <®_dc_in>;
+ };
+
reg_dc_in: regulator-dc-in-12v {
compatible = "regulator-fixed";
regulator-name = "dc_in_12v";
@@ -291,6 +301,38 @@ dldo7 {
};
};
+&pcie1_phy {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie1_3_cfg>;
+ status = "okay";
+};
+
+&pcie1_port {
+ phys = <&pcie1_phy>;
+ vpcie3v3-supply = <&pcie_vcc_3v3>;
+};
+
+&pcie1 {
+ vpcie3v3-supply = <&pcie_vcc_3v3>;
+ status = "okay";
+};
+
+&pcie2_phy {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_4_cfg>;
+ status = "okay";
+};
+
+&pcie2_port {
+ phys = <&pcie2_phy>;
+ vpcie3v3-supply = <&pcie_vcc_3v3>;
+};
+
+&pcie2 {
+ vpcie3v3-supply = <&pcie_vcc_3v3>;
+ status = "okay";
+};
+
&qspi {
pinctrl-names = "default";
pinctrl-0 = <&qspi_cfg>;
--
2.51.0
^ permalink raw reply related
* [PATCH v2 4/6] riscv: dts: spacemit: enable QSPI and add SPI NOR on Milk-V Jupiter
From: Aurelien Jarno @ 2026-03-26 18:35 UTC (permalink / raw)
To: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Yixun Lan
Cc: Aurelien Jarno, Javier Martinez Canillas,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:RISC-V SPACEMIT SoC Support,
open list:RISC-V SPACEMIT SoC Support
In-Reply-To: <20260326183745.1370642-1-aurelien@aurel32.net>
Add the QSPI controller node for the Milk-V Jupiter board and describe
the attached SPI NOR flash (GD25Q64E).
The flash supports a frequency up to 133MHz (80 MHz for reads), and the
SoC supports a frequency up to 104 MHz. However tests have shown that
the flash is not reliably detected above 26.5 MHz, consistent with
frequency used in the vendor kernel. Therefore, use this frequency.
The m25p,fast-read properties is taken from the vendor kernel, and the
GD25Q64E datasheet confirms tha the fast read opcodes are supported.
Add a corresponding flash partition layout, matching the layout and the
names used in the vendor U-Boot.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
---
.../boot/dts/spacemit/k1-milkv-jupiter.dts | 43 ++++++++++++++++++-
1 file changed, 42 insertions(+), 1 deletion(-)
v2:
- Remove bootph-pre-ram property from SPI NOR flash and update the patch description accordingly
- Mention that the fast read opcodes is marked as supported in the datasheet
- Collect Reviewed-by:
diff --git a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
index 836311c3f035c..bac6438c67532 100644
--- a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
@@ -173,7 +173,7 @@ buck3_1v8: buck3 {
regulator-always-on;
};
- buck4 {
+ buck4_3v3: buck4 {
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3300000>;
regulator-ramp-delay = <5000>;
@@ -256,6 +256,47 @@ dldo7 {
};
};
+&qspi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&qspi_cfg>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <26500000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
+ vcc-supply = <&buck4_3v3>; /* QSPI_VCC1833 */
+ m25p,fast-read;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ bootinfo@0 {
+ reg = <0x0 0x10000>;
+ };
+ private@10000 {
+ reg = <0x10000 0x10000>;
+ };
+ fsbl@20000 {
+ reg = <0x20000 0x40000>;
+ };
+ env@60000 {
+ reg = <0x60000 0x10000>;
+ };
+ opensbi@70000 {
+ reg = <0x70000 0x30000>;
+ };
+ uboot@a00000 {
+ reg = <0xa0000 0x760000>;
+ };
+ };
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_2_cfg>;
--
2.51.0
^ permalink raw reply related
* [PATCH v2 3/6] riscv: dts: spacemit: add i2c aliases on Milk-V Jupiter
From: Aurelien Jarno @ 2026-03-26 18:35 UTC (permalink / raw)
To: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Yixun Lan
Cc: Aurelien Jarno, Javier Martinez Canillas,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:RISC-V ARCHITECTURE,
open list:RISC-V SPACEMIT SoC Support
In-Reply-To: <20260326183745.1370642-1-aurelien@aurel32.net>
Add i2c aliases for i2c2 and i2c8 on Milk-V Jupiter. This is useful to
keep a stable number for the /dev entries after loading the i2c-dev
module.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
---
arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts | 2 ++
1 file changed, 2 insertions(+)
v2:
- Collect Reviewed-by:
diff --git a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
index bd48208a370cf..836311c3f035c 100644
--- a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
@@ -15,6 +15,8 @@ aliases {
ethernet0 = ð0;
ethernet1 = ð1;
serial0 = &uart0;
+ i2c2 = &i2c2;
+ i2c8 = &i2c8;
};
chosen {
--
2.51.0
^ permalink raw reply related
* [PATCH v2 2/6] riscv: dts: spacemit: add 24c04 eeprom on Milk-V Jupiter
From: Aurelien Jarno @ 2026-03-26 18:35 UTC (permalink / raw)
To: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Yixun Lan, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Alexandre Ghiti
Cc: Aurelien Jarno, Javier Martinez Canillas,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:RISC-V SPACEMIT SoC Support,
open list:RISC-V SPACEMIT SoC Support
In-Reply-To: <20260326183745.1370642-1-aurelien@aurel32.net>
The Milk-V Jupiter board includes a 24c04 eeprom on the i2c2 bus. The
eeprom contains an ONIE TLV table, which on the board I tested only
provides a product-name entry. Expose it via an onie,tlv-layout nvmem
layout.
The eeprom is marked as read-only since its contents are not supposed to
be modified.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
---
.../boot/dts/spacemit/k1-milkv-jupiter.dts | 22 +++++++++++++++++++
1 file changed, 22 insertions(+)
v2:
- Collect Reviewed-by:
diff --git a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
index 3cd83c5924e4f..bd48208a370cf 100644
--- a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
@@ -108,6 +108,28 @@ &pdma {
status = "okay";
};
+&i2c2 {
+ pinctrl-0 = <&i2c2_0_cfg>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ eeprom@50 {
+ compatible = "atmel,24c04";
+ reg = <0x50>;
+ vcc-supply = <&buck3_1v8>; /* EEPROM_VCC18 */
+ pagesize = <16>;
+ read-only;
+ size = <512>;
+
+ nvmem-layout {
+ compatible = "onie,tlv-layout";
+
+ product-name {
+ };
+ };
+ };
+};
+
&i2c8 {
pinctrl-0 = <&i2c8_cfg>;
pinctrl-names = "default";
--
2.51.0
^ permalink raw reply related
* [PATCH v2 1/6] riscv: dts: spacemit: add LEDs for Milk-V Jupiter board
From: Aurelien Jarno @ 2026-03-26 18:35 UTC (permalink / raw)
To: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Yixun Lan
Cc: Aurelien Jarno, Javier Martinez Canillas,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:RISC-V SPACEMIT SoC Support,
open list:RISC-V SPACEMIT SoC Support
In-Reply-To: <20260326183745.1370642-1-aurelien@aurel32.net>
The Milk-V Jupiter board provides support for two LEDs through the front
panel header. The "Power LED" indicates the system is running, and the
"HDD LED" shows disk activity. Configure the corresponding LED triggers
accordingly.
Caveats:
- The LEDs are driven through a 4.7k series resistor, making them
quite faint.
- The disk activity trigger requires a storage controller on the M.2 or
PCIe interface. That said, it matches the purpose and the vendor
kernel.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
---
.../boot/dts/spacemit/k1-milkv-jupiter.dts | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
v2:
- Collect Reviewed-by:
diff --git a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
index 9959c8023ece0..3cd83c5924e4f 100644
--- a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
@@ -21,6 +21,23 @@ chosen {
stdout-path = "serial0";
};
+ leds {
+ compatible = "gpio-leds";
+
+ led1 {
+ label = "pwr-led";
+ gpios = <&gpio K1_GPIO(96) GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "default-on";
+ default-state = "on";
+ };
+
+ led2 {
+ label = "hdd-led";
+ gpios = <&gpio K1_GPIO(92) GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "disk-activity";
+ };
+ };
+
reg_dc_in: regulator-dc-in-12v {
compatible = "regulator-fixed";
regulator-name = "dc_in_12v";
--
2.51.0
^ permalink raw reply related
* Re: [PATCH v2 1/2] regulator: dt-bindings: mt6315: Add regulator supplies
From: Conor Dooley @ 2026-03-26 18:35 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: Mark Brown, Liam Girdwood, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Matthias Brugger, AngeloGioacchino Del Regno,
linux-kernel, linux-arm-kernel, linux-mediatek, devicetree
In-Reply-To: <20260326081050.1115201-2-wenst@chromium.org>
[-- Attachment #1: Type: text/plain, Size: 75 bytes --]
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply
* Re: [PATCH v2 2/7] dt-bindings: dmaengine: Add SpacemiT K3 DMA compatible string
From: Conor Dooley @ 2026-03-26 18:34 UTC (permalink / raw)
To: Troy Mitchell
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti, Yixun Lan, Vinod Koul,
Frank Li, Guodong Xu, Michael Turquette, Stephen Boyd, devicetree,
linux-riscv, spacemit, linux-kernel, dmaengine, linux-clk
In-Reply-To: <20260326-k3-pdma-v2-2-ca94ca7bb595@linux.spacemit.com>
[-- Attachment #1: Type: text/plain, Size: 1090 bytes --]
On Thu, Mar 26, 2026 at 04:17:17PM +0800, Troy Mitchell wrote:
> From: Guodong Xu <guodong@riscstar.com>
>
> Add k3 compatible string.
That's obvious. What you need to explain is why it is not compatible with
the existing k1.
pw-bot: changes-requested
Cheers,
Conor.
>
> Signed-off-by: Guodong Xu <guodong@riscstar.com>
> Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
> ---
> Documentation/devicetree/bindings/dma/spacemit,k1-pdma.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/dma/spacemit,k1-pdma.yaml b/Documentation/devicetree/bindings/dma/spacemit,k1-pdma.yaml
> index ec06235baf5c..62ce6d81526b 100644
> --- a/Documentation/devicetree/bindings/dma/spacemit,k1-pdma.yaml
> +++ b/Documentation/devicetree/bindings/dma/spacemit,k1-pdma.yaml
> @@ -14,7 +14,9 @@ allOf:
>
> properties:
> compatible:
> - const: spacemit,k1-pdma
> + enum:
> + - spacemit,k1-pdma
> + - spacemit,k3-pdma
>
> reg:
> maxItems: 1
>
> --
> 2.53.0
>
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^ permalink raw reply
* Re: [PATCH 2/2] dt-bindings: Add clock guard DT description
From: Conor Dooley @ 2026-03-26 18:32 UTC (permalink / raw)
To: Vyacheslav Yurkov
Cc: Krzysztof Kozlowski, Rob Herring, Vyacheslav Yurkov,
Michael Turquette, Stephen Boyd, Krzysztof Kozlowski,
Conor Dooley, linux-kernel, linux-clk, devicetree
In-Reply-To: <4d575f17-5cd5-495c-99a9-176b3393d54d@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 3243 bytes --]
On Thu, Mar 26, 2026 at 02:39:22PM +0100, Vyacheslav Yurkov wrote:
> On 26.03.2026 11:08, Krzysztof Kozlowski wrote:
>
> > >
> > > DTS example:
> > > clock_guard: clock_controller_guard {
> > > compatible = "clock-controller-guard";
> > > #clock-cells = <1>;
> > > clocks = <&h2f_clk 0>, <&clk_fgpa_rx 0>, <clk_fpga_tx 0>;
> > > clock-names = "h2f_clk0", "clk_fpga_rx", "clk_fpga_tx";
> > > gpios = <&fpga_ip 0 GPIO_ACTIVE_HIGH>, <&fpga_ip 1 GPIO_ACTIVE_HIGH>;
> > > gpio-names = "gpio-input0", "gpio-input1";
> > > clock-output-names = "clkctrl-guard";
> > > };
> > >
> > > custom_device {
> > > compatible = "...";
> > > ...
> > > #clock-cells = <1>;
> > > clocks = <&clock_guard 0>;
> > > clock-names = "clock-guard";
> > > };
> >
> > So a pure SW construct? Device has specific clock inputs but you do not
> > model them and instead replace with one fake-guard-input.
> >
> > I don't see how this represents the hardware at all.
> >
> > Maybe some diagrams would help, assuming we still talk about hardware.
> >
> > Best regards,
> > Krzysztof
>
> Techincally that's correct, it's a software construct. If this is not a
Is it a software construct?
I assume that the PLL status is going to be some lock bit in a register,
and you're got some "hardware" in your FPGA fabric that reads that bit
and sets a GPIO when it gets locked? Or maybe it's even simpler, and
your GPIO just gets set once your custom HDL comes out of reset, which
happens when the PLL locks?
If that's an approximation of what you have, that's not a software
construct.
> right place to submit such a helper driver, I'd appreciate a hint what
> subsystem is the right one.
>
> I was not sure how to provide a diagram in the mailing list, so I posted in
> on Github https://github.com/OSS-Keepers/clock-controller-guard/issues/1
>
> It is a driver which models dependencies for other drivers. These are soft
> or "indirect" dependencies, because we cannot access the FPGA unless the
> FPGA_PLL_locked, and GPIO is telling us we are good to go.
>
> Conor, I think this should answer your question as well.
Not really, but it gets part of the way there. I want to know what this
provider actually is. I now know it is a PLL, not an off-chip
oscillator, but I know nothing about the interface that you have to it
(or if you have one at all). What compatible string/kernel driver does
it use?
Because SoC-FPGAs can route GPIOs from the SoC part to the FPGA fabric
and use them as if interacting with something off-chip, I'm not sure if
we are dealing with an separate FPGA or a SoC-FPGA. Which is it?
Effectively I want to understand why you cannot just read the lock bit
from the PLL directly. In my experience with *SoC*-FPGAs, things like
PLLs that must lock for the fabric to be usable have a register
interface from which the lock bit can be read, that is of course not
clocked by the PLL output clock and therefore accessible before the
PLL has locked.
I think more info is needed here to guide you on where such a "helper
driver" should be located and what the dt represetation should be.
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^ permalink raw reply
* [PATCH v2 2/2] iio: amplifiers: ad8366: add support for adrf5702/3
From: Rodrigo Alencar via B4 Relay @ 2026-03-26 18:32 UTC (permalink / raw)
To: linux-iio, devicetree, linux-kernel
Cc: Lars-Peter Clausen, Michael Hennerich, Jonathan Cameron,
David Lechner, Andy Shevchenko, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Rodrigo Alencar
In-Reply-To: <20260326-adrf570x-iio-support-v2-0-b622a17335d0@analog.com>
From: Rodrigo Alencar <rodrigo.alencar@analog.com>
Add chip info structs and device table entries for ADRF5702 and ADRF5703
Digital Step Attenuators.
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Rodrigo Alencar <rodrigo.alencar@analog.com>
---
drivers/iio/amplifiers/Kconfig | 2 ++
drivers/iio/amplifiers/ad8366.c | 22 ++++++++++++++++++++++
2 files changed, 24 insertions(+)
diff --git a/drivers/iio/amplifiers/Kconfig b/drivers/iio/amplifiers/Kconfig
index 39d280d4d437..9e24421b5e97 100644
--- a/drivers/iio/amplifiers/Kconfig
+++ b/drivers/iio/amplifiers/Kconfig
@@ -18,6 +18,8 @@ config AD8366
AD8366 Dual-Digital Variable Gain Amplifier (VGA)
ADA4961 BiCMOS RF Digital Gain Amplifier (DGA)
ADL5240 Digitally controlled variable gain amplifier (VGA)
+ ADRF5702: 0.125 dB LSB, 8-Bit, Silicon Digital Attenuator
+ ADRF5703: 0.25 dB LSB, 7-Bit, Silicon Digital Attenuator
ADRF5720: 0.5 dB LSB, 6-Bit, Silicon Digital Attenuator
ADRF5730: 0.5 dB LSB, 6-Bit, Silicon Digital Attenuator
ADRF5731: 2 dB LSB, 4-Bit, Silicon Digital Attenuator
diff --git a/drivers/iio/amplifiers/ad8366.c b/drivers/iio/amplifiers/ad8366.c
index 334ca91c0f59..bbf41a1fb3a1 100644
--- a/drivers/iio/amplifiers/ad8366.c
+++ b/drivers/iio/amplifiers/ad8366.c
@@ -5,6 +5,8 @@
* AD8366 Dual-Digital Variable Gain Amplifier (VGA)
* ADA4961 BiCMOS RF Digital Gain Amplifier (DGA)
* ADL5240 Digitally controlled variable gain amplifier (VGA)
+ * ADRF5702: 0.125 dB LSB, 8-Bit, Silicon Digital Attenuator, 50 MHz to 20 GHz
+ * ADRF5703: 0.25 dB LSB, 7-Bit, Silicon Digital Attenuator, 9 kHz to 20 GHz
* ADRF5720: 0.5 dB LSB, 6-Bit, Silicon Digital Attenuator, 9 kHz to 40 GHz
* ADRF5730: 0.5 dB LSB, 6-Bit, Silicon Digital Attenuator, 100 MHz to 40 GHz
* ADRF5731: 2 dB LSB, 4-Bit, Silicon Digital Attenuator, 100 MHz to 40 GHz
@@ -106,6 +108,22 @@ static const struct ad8366_info adl5240_chip_info = {
.num_channels = 1,
};
+static const struct ad8366_info adrf5702_chip_info = {
+ .name = "adrf5702",
+ .gain_min = -31875,
+ .gain_max = 0,
+ .gain_step = -125,
+ .num_channels = 1,
+};
+
+static const struct ad8366_info adrf5703_chip_info = {
+ .name = "adrf5703",
+ .gain_min = -31750,
+ .gain_max = 0,
+ .gain_step = -250,
+ .num_channels = 1,
+};
+
static const struct ad8366_info adrf5720_chip_info = {
.name = "adrf5720",
.gain_min = -31500,
@@ -337,6 +355,8 @@ static const struct spi_device_id ad8366_id[] = {
{ "ad8366", (kernel_ulong_t)&ad8366_chip_info },
{ "ada4961", (kernel_ulong_t)&ada4961_chip_info },
{ "adl5240", (kernel_ulong_t)&adl5240_chip_info },
+ { "adrf5702", (kernel_ulong_t)&adrf5702_chip_info },
+ { "adrf5703", (kernel_ulong_t)&adrf5703_chip_info },
{ "adrf5720", (kernel_ulong_t)&adrf5720_chip_info },
{ "adrf5730", (kernel_ulong_t)&adrf5730_chip_info },
{ "adrf5731", (kernel_ulong_t)&adrf5731_chip_info },
@@ -353,6 +373,8 @@ static const struct of_device_id ad8366_of_match[] = {
{ .compatible = "adi,ad8366", .data = &ad8366_chip_info },
{ .compatible = "adi,ada4961", .data = &ada4961_chip_info },
{ .compatible = "adi,adl5240", .data = &adl5240_chip_info },
+ { .compatible = "adi,adrf5702", .data = &adrf5702_chip_info },
+ { .compatible = "adi,adrf5703", .data = &adrf5703_chip_info },
{ .compatible = "adi,adrf5720", .data = &adrf5720_chip_info },
{ .compatible = "adi,adrf5730", .data = &adrf5730_chip_info },
{ .compatible = "adi,adrf5731", .data = &adrf5731_chip_info },
--
2.43.0
^ permalink raw reply related
* [PATCH v2 1/2] dt-bindings: iio: amplifiers: ad8366: add adrf5702/3 support
From: Rodrigo Alencar via B4 Relay @ 2026-03-26 18:32 UTC (permalink / raw)
To: linux-iio, devicetree, linux-kernel
Cc: Lars-Peter Clausen, Michael Hennerich, Jonathan Cameron,
David Lechner, Andy Shevchenko, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Rodrigo Alencar
In-Reply-To: <20260326-adrf570x-iio-support-v2-0-b622a17335d0@analog.com>
From: Rodrigo Alencar <rodrigo.alencar@analog.com>
Add compatible entries for ADRF5702 and ADRF5703 Digital Attenuators.
ADRF5702 is an 8-bit DSA with a step of 0.125 dB and ADRF5703 is a 7-bit
DSA with a step 0.25 dB. Then, each device ends up with its own gain
range, hence no fallback compatibles are used.
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Rodrigo Alencar <rodrigo.alencar@analog.com>
---
Documentation/devicetree/bindings/iio/amplifiers/adi,ad8366.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/iio/amplifiers/adi,ad8366.yaml b/Documentation/devicetree/bindings/iio/amplifiers/adi,ad8366.yaml
index 2719de1166a1..065637ce33a5 100644
--- a/Documentation/devicetree/bindings/iio/amplifiers/adi,ad8366.yaml
+++ b/Documentation/devicetree/bindings/iio/amplifiers/adi,ad8366.yaml
@@ -20,6 +20,8 @@ properties:
- adi,ad8366
- adi,ada4961
- adi,adl5240
+ - adi,adrf5702
+ - adi,adrf5703
- adi,adrf5720
- adi,adrf5730
- adi,adrf5731
@@ -66,6 +68,8 @@ allOf:
anyOf:
- const: adi,ad8366
- const: adi,ada4961
+ - const: adi,adrf5702
+ - const: adi,adrf5703
- const: adi,adrf5720
- const: adi,adrf5730
- const: adi,adrf5731
--
2.43.0
^ permalink raw reply related
* [PATCH v2 0/2] ADRF5702/ADRF5703 Digital Attenuator support
From: Rodrigo Alencar via B4 Relay @ 2026-03-26 18:32 UTC (permalink / raw)
To: linux-iio, devicetree, linux-kernel
Cc: Lars-Peter Clausen, Michael Hennerich, Jonathan Cameron,
David Lechner, Andy Shevchenko, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Rodrigo Alencar
This is a small patch series that adds support for two extra attenuators.
Basically, new chip info and device table entries are added into the
AD8366 IIO driver.
Signed-off-by: Rodrigo Alencar <rodrigo.alencar@analog.com>
---
Changes in v2:
- Add more context to the dt-bindings commit message.
- Link to v1: https://lore.kernel.org/r/20260325-adrf570x-iio-support-v1-0-9a2685eb2e55@analog.com
---
Rodrigo Alencar (2):
dt-bindings: iio: amplifiers: ad8366: add adrf5702/3 support
iio: amplifiers: ad8366: add support for adrf5702/3
.../bindings/iio/amplifiers/adi,ad8366.yaml | 4 ++++
drivers/iio/amplifiers/Kconfig | 2 ++
drivers/iio/amplifiers/ad8366.c | 22 ++++++++++++++++++++++
3 files changed, 28 insertions(+)
---
base-commit: af980a79bfed43c4a0be12cca786be46f1a0c5e8
change-id: 20260325-adrf570x-iio-support-e199418fba40
Best regards,
--
Rodrigo Alencar <rodrigo.alencar@analog.com>
^ permalink raw reply
* Re: [PATCH v6 3/3] arm64: dts: qcom: Add Samsung Galaxy Book4 Edge DTS/DTSI
From: Maxim Storetvedt @ 2026-03-26 18:30 UTC (permalink / raw)
To: Konrad Dybcio, andersson, robh, krzk+dt, conor+dt
Cc: marcus, marijn.suijten, linux-arm-msm, devicetree, linux-kernel,
abel.vesa, abel.vesa, johan, konradybcio, kirill
In-Reply-To: <892fe03c-f3d5-4b6c-b821-95dad55fdade@oss.qualcomm.com>
On 3/26/26 12:33, Konrad Dybcio wrote:
> On 3/25/26 7:30 PM, Maxim Storetvedt wrote:
>>
>>
>> On 3/23/26 13:17, Konrad Dybcio wrote:
>>> On 3/22/26 5:03 PM, Maxim Storetvedt wrote:
>>>> Adds devicetrees for the 14-inch and 16-inch SKUs of the Samsung Galaxy Book4 Edge.
>>>>
>>>> These use a common dtsi derived from nodes that were able to work on Linux
>>>> from the initial Galaxy Book4 Edge DTS by Marcus:
>>>>
>>>> Link: https://lore.kernel.org/all/p3mhtj2rp6y2ezuwpd2gu7dwx5cbckfu4s4pazcudi4j2wogtr@4yecb2bkeyms/
>>>>
>>>> combined with the ongoing patch for the Honor Magicbook Art 14, and its downstream by
>>>> Valentin Manea, which shares device similarities:
>>>
>>> [...]
>>>
>>>> +&i2c8 {
>>>> + clock-frequency = <400000>;
>>>> +
>>>> + status = "okay";
>>>> +
>>>> + touchscreen@5d {
>>>> + compatible = "hid-over-i2c";
>>>> + reg = <0x5d>;
>>>> +
>>>> + hid-descr-addr = <0x1>;
>>>> + interrupts-extended = <&tlmm 34 IRQ_TYPE_LEVEL_LOW>;
>>>> +
>>>> + vdd-supply = <&vreg_misc_3p3>;
>>>> + /* Lower power supply is not enoug to work. */
>>>> + // vddl-supply = <&vreg_l15b_1p8>;
>>>
>>> How should we interpret that?
>>>
>>
>> This was in the original patch, but using that same regulator appears to
>> be enough to also get touchscreen working on the 16" book4e. That said,
>> it still does not work on the 14". Something to revisit later...
>>
>>>
>>> [...]
>>>
>>>> +&panel {
>>>> + compatible = "samsung,atna40cu07", "samsung,atna33xc20";
>>>
>>> I think it'd make sense to move the compatible from 'common' to the
>>> 16in DTS then too
>>>
>>>> + enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>;
>>>
>>> this matches the common definition
>>>
>>>> + power-supply = <&vreg_edp_3p3>;
>>>
>>> ditto
>>>
>>>> + no-hpd;
>>>
>>> really??
>>>
>> One less thing to debug while previously attempting to work around the
>> "illegal link rate" error, which turned out to be related to eDP 1.4
>> (similar to the sp11). I've kept it as-is in case other SKUs attempt
>> booting from this dts, such as the x1e80100 16" (as it might be getting
>> a black screen using the current x1e84100 16" dts, though this is not
>> fully tested).
>
> So do the 80100 and 84100-equipped SKUs of the laptop come with different
> displays?
>
> Konrad
So far assumed both 16" variants to be fairly similar, though one
valiant 16" 80100 user over in the debug thread did try to boot via the
84100 dts, with no success. Instead having the screen go dark after the
first post-tux kernel prints.
This was strapped together via WSL though, so could be there was
something else at fault, but strange it didn't at least fall back to a
visible initramfs shell.
Cheers,
-Max
^ permalink raw reply
* Re: [PATCH 2/7] arm64: dts: qcom: sm6125: Enable USB-C port handling
From: Biswapriyo Nath @ 2026-03-26 18:28 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Biswapriyo Nath, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Lee Jones, Pavel Machek,
Sean Young, Michael Turquette, Stephen Boyd, Martin Botka,
linux-arm-msm, devicetree, linux-kernel, linux-leds, linux-clk,
~postmarketos/upstreaming, phone-devel
In-Reply-To: <593b3801-a83c-4132-970f-5075ebca2bc4@oss.qualcomm.com>
On Thu, 26 Mar 2026 10:41:03 +0100 Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> wrote:
> On 3/25/26 7:07 PM, Biswapriyo Nath wrote:
> > Plug in USB-C related bits and pieces to enable USB role switching.
> > Also, remove dr_mode to enable OTG capability.
> >
> > Signed-off-by: Biswapriyo Nath <nathbappai@gmail.com>
> > ---
>
> I'm not sure what this is going to do for other 6125 devices
> that don't have the Type-C infra wired up.. Does just applying
> this commit alone keep peripheral mode working on your phone?
>
> Konrad
>
Yes, I have verified that USB peripheral mode is working with this
patch only by using USB network[1].
[1]: https://wiki.postmarketos.org/wiki/USB_Network
^ permalink raw reply
* RE: [PATCH v8 01/11] dt-bindings: clock: Document RZ/G3L SoC
From: Biju Das @ 2026-03-26 18:27 UTC (permalink / raw)
To: geert, biju.das.au
Cc: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, magnus.damm, linux-renesas-soc@vger.kernel.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Prabhakar Mahadev Lad, Conor Dooley
In-Reply-To: <CAMuHMdVjLuAWrADbKY9QqD4MY54G5P_jaU4=4aHTeiZXaoR67w@mail.gmail.com>
Hi Geert,
> -----Original Message-----
> From: Geert Uytterhoeven <geert@linux-m68k.org>
> Sent: 26 March 2026 18:24
> Subject: Re: [PATCH v8 01/11] dt-bindings: clock: Document RZ/G3L SoC
>
> Hi Biju,
>
> On Tue, 24 Mar 2026 at 12:43, Biju <biju.das.au@gmail.com> wrote:
> > From: Biju Das <biju.das.jz@bp.renesas.com>
> >
> > Document the device tree bindings for the Renesas RZ/G3L SoC Clock
> > Pulse Generator (CPG). RZ/G3L CPG is similar to RZ/G2L CPG but has 5
> > clocks compared to 1 clock on other SoCs.
> >
> > Also define RZ/G3L (R9A08G046) Clock Pulse Generator Core Clocks, as
> > listed in section 4.4.4.1 ("Block Diagram of the Clock System"),
> > module clock outputs, as listed in section 4.4.2 ("Clock List r1.00")
> > and add Reset definitions referring to registers CPG_RST_* in Section
> > 4.4.3
> > ("Register") of the RZ/G3L Hardware User's Manual (Rev.1.00 Oct, 2025).
> >
> > Acked-by: Conor Dooley <conor.dooley@microchip.com>
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
>
> > --- /dev/null
> > +++ b/include/dt-bindings/clock/r9a08g046-cpg.h
>
> Missing "renesas," prefix.
Oops, missed it.
>
> > @@ -0,0 +1,342 @@
> > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > + *
> > + * Copyright (C) 2026 Renesas Electronics Corp.
> > + */
> > +#ifndef __DT_BINDINGS_CLOCK_R9A08G046_CPG_H__
> > +#define __DT_BINDINGS_CLOCK_R9A08G046_CPG_H__
>
> Missing RENESAS_ infix.
>
> Will fix accordingly while applying.
Thank you for taking care.
Cheers,
Biju
^ permalink raw reply
* Re: [PATCH v8 01/11] dt-bindings: clock: Document RZ/G3L SoC
From: Geert Uytterhoeven @ 2026-03-26 18:24 UTC (permalink / raw)
To: Biju
Cc: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Magnus Damm, Biju Das, linux-renesas-soc, linux-clk,
devicetree, linux-kernel, Prabhakar Mahadev Lad, Conor Dooley
In-Reply-To: <20260324114329.268249-2-biju.das.jz@bp.renesas.com>
Hi Biju,
On Tue, 24 Mar 2026 at 12:43, Biju <biju.das.au@gmail.com> wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
>
> Document the device tree bindings for the Renesas RZ/G3L SoC Clock Pulse
> Generator (CPG). RZ/G3L CPG is similar to RZ/G2L CPG but has 5 clocks
> compared to 1 clock on other SoCs.
>
> Also define RZ/G3L (R9A08G046) Clock Pulse Generator Core Clocks, as
> listed in section 4.4.4.1 ("Block Diagram of the Clock System"), module
> clock outputs, as listed in section 4.4.2 ("Clock List r1.00") and add
> Reset definitions referring to registers CPG_RST_* in Section 4.4.3
> ("Register") of the RZ/G3L Hardware User's Manual (Rev.1.00 Oct, 2025).
>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> --- /dev/null
> +++ b/include/dt-bindings/clock/r9a08g046-cpg.h
Missing "renesas," prefix.
> @@ -0,0 +1,342 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> + *
> + * Copyright (C) 2026 Renesas Electronics Corp.
> + */
> +#ifndef __DT_BINDINGS_CLOCK_R9A08G046_CPG_H__
> +#define __DT_BINDINGS_CLOCK_R9A08G046_CPG_H__
Missing RENESAS_ infix.
Will fix accordingly while applying.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH v4] dt-bindings: arm: mediatek: mediatek,g3dsys: Convert to DT schema
From: Udaya Kiran Challa @ 2026-03-26 18:17 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt
Cc: devicetree, linux-kernel, skhan, Udaya Kiran Challa
Convert the MediaTek G3D system controller devicetree binding
from the legacy text format to DT schema.
Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com>
---
Changelog:
Changes since v3:
- Fix $id path to match new location
Link to v3:https://lore.kernel.org/all/20260325181509.3430-1-challauday369@gmail.com/
Changes since v2:
- Move binding to soc/mediatek directory
- Rename file to mediatek,mt2701-g3dsys.yaml based on fallback compatible
Link to v2:https://lore.kernel.org/all/20260323180616.23333-1-challauday369@gmail.com/
Changes since v1:
- Drop redundant description for reg
- Drop redundant description for provider properties
Link to v1:https://lore.kernel.org/all/20260315080302.454233-1-challauday369@gmail.com/
---
.../bindings/arm/mediatek/mediatek,g3dsys.txt | 30 ----------
.../soc/mediatek/mediatek,mt2701-g3dsys.yaml | 58 +++++++++++++++++++
2 files changed, 58 insertions(+), 30 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,g3dsys.txt
create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mediatek,mt2701-g3dsys.yaml
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,g3dsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,g3dsys.txt
deleted file mode 100644
index 7de43bf41fdc..000000000000
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,g3dsys.txt
+++ /dev/null
@@ -1,30 +0,0 @@
-MediaTek g3dsys controller
-============================
-
-The MediaTek g3dsys controller provides various clocks and reset controller to
-the GPU.
-
-Required Properties:
-
-- compatible: Should be:
- - "mediatek,mt2701-g3dsys", "syscon":
- for MT2701 SoC
- - "mediatek,mt7623-g3dsys", "mediatek,mt2701-g3dsys", "syscon":
- for MT7623 SoC
-- #clock-cells: Must be 1
-- #reset-cells: Must be 1
-
-The g3dsys controller uses the common clk binding from
-Documentation/devicetree/bindings/clock/clock-bindings.txt
-The available clocks are defined in dt-bindings/clock/mt*-clk.h.
-
-Example:
-
-g3dsys: clock-controller@13000000 {
- compatible = "mediatek,mt7623-g3dsys",
- "mediatek,mt2701-g3dsys",
- "syscon";
- reg = <0 0x13000000 0 0x200>;
- #clock-cells = <1>;
- #reset-cells = <1>;
-};
diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt2701-g3dsys.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt2701-g3dsys.yaml
new file mode 100644
index 000000000000..ad3df062d5db
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt2701-g3dsys.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/mediatek/mediatek,mt2701-g3dsys.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek G3D System Controller
+
+maintainers:
+ - Sean Wang <sean.wang@mediatek.com>
+ - Ryder Lee <ryder.lee@mediatek.com>
+
+description: |
+ The MediaTek G3D system controller provides clocks and reset control
+ for the GPU subsystem on MediaTek SoCs.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - const: mediatek,mt2701-g3dsys
+ - const: syscon
+ - items:
+ - const: mediatek,mt7623-g3dsys
+ - const: mediatek,mt2701-g3dsys
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ "#clock-cells":
+ const: 1
+
+ "#reset-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - "#clock-cells"
+ - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ g3dsys: syscon@13000000 {
+ compatible = "mediatek,mt7623-g3dsys",
+ "mediatek,mt2701-g3dsys",
+ "syscon";
+ reg = <0 0x13000000 0 0x200>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+ };
--
2.34.1
^ permalink raw reply related
* Re: [PATCH net-next 1/2] net: stmmac: remove axi_kbbe, axi_mb and axi_rb members
From: Russell King (Oracle) @ 2026-03-26 18:15 UTC (permalink / raw)
To: Simon Horman
Cc: Andrew Lunn, Alexandre Torgue, Andrew Lunn, Conor Dooley,
David S. Miller, devicetree, Eric Dumazet, Giuseppe Cavallaro,
Jakub Kicinski, Jose Abreu, Krzysztof Kozlowski, linux-arm-kernel,
linux-stm32, netdev, Paolo Abeni, Rob Herring, Yao Zi
In-Reply-To: <acVxNBLE8Ck2qfjc@shell.armlinux.org.uk>
On Thu, Mar 26, 2026 at 05:47:32PM +0000, Russell King (Oracle) wrote:
> On Thu, Mar 26, 2026 at 05:29:43PM +0000, Simon Horman wrote:
> > On Tue, Mar 24, 2026 at 10:05:40AM +0000, Russell King (Oracle) wrote:
> > > axi_kbbe, axi_mb and axi_rb are all written, but nothing ever reads
> > > their values. Remove the code that sets these and the struct members.
> > >
> > > Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
> >
> > Hi Russell,
> >
> > FYI, AI review suggests that these fields should also be removed from
> > Documentation/networking/device_drivers/ethernet/stmicro/stmmac.rst
>
> I noticed. I've prepared an update if netdev folk want that to happen
> as I've noticed that that documentation is fairly out of date now.
There's another reason I haven't submitted an update, and that's
because netdev is fairly backlogged at the moment - currently there's
381 patches in patchwork - four pages of patchwork, with the oldest
"new" patch dated 21st March. I don't think netdev patchwork needs
more patches at the moment!
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
^ permalink raw reply
* Re: [PATCH v5 5/8] dt-bindings: i2c: realtek,rtl9301-i2c: extend for clocks and RTL9607C support
From: Conor Dooley @ 2026-03-26 18:13 UTC (permalink / raw)
To: Rustam Adilov
Cc: Chris Packham, Andi Shyti, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-i2c, devicetree, linux-kernel
In-Reply-To: <20260326152656.14030-6-adilov@disroot.org>
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On Thu, Mar 26, 2026 at 08:26:53PM +0500, Rustam Adilov wrote:
> Add the "realtek,rtl9607-i2c" compatible for i2c controller on the
> RTL9607C SoC series.
>
> Add a clocks property to the properties to describe the i2c reference
> clock and make it available for all the compatibles. This i2c reference
> clock is assumed to be coming from switchcore region via Lexra bus as
> the other SoC peripherals.
>
> According to the info available about the existing devices, they also
> have the i2c master controller clocks.
>
> RTL9607C requires the "realtek,scl" and "clocks" to be specified
> and so handle it under separate if check for "realtek,rtl9607-i2c".
>
> Signed-off-by: Rustam Adilov <adilov@disroot.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
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^ permalink raw reply
* Re: [PATCH v1 1/3] dt-bindings: arm: fsl: add Variscite DART-MX93 Boards
From: Conor Dooley @ 2026-03-26 18:12 UTC (permalink / raw)
To: Stefano Radaelli
Cc: linux-kernel, devicetree, imx, linux-arm-kernel, pierluigi.p,
Stefano Radaelli, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Shawn Guo, Dario Binacchi, Alexander Stein, Maud Spierings,
Josua Mayer, Markus Niebel, Francesco Dolcini, Primoz Fiser
In-Reply-To: <b7b243c9c3931e8d7ddd984b654e7ef493e84690.1774539301.git.stefano.r@variscite.com>
[-- Attachment #1: Type: text/plain, Size: 75 bytes --]
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
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^ permalink raw reply
* Re: [PATCH 0/7] Add vibrator, IR transmitter and USB-C handling in xiaomi-ginkgo
From: barnabas.czeman @ 2026-03-26 17:48 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Biswapriyo Nath, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Lee Jones, Pavel Machek,
Sean Young, Michael Turquette, Stephen Boyd, Martin Botka,
linux-arm-msm, devicetree, linux-kernel, linux-leds, linux-clk,
~postmarketos/upstreaming, phone-devel, kernel test robot
In-Reply-To: <9a61ad79-b787-4b83-b7dd-2ea36e7cea81@oss.qualcomm.com>
On 2026-03-26 10:39, Konrad Dybcio wrote:
> On 3/25/26 7:07 PM, Biswapriyo Nath wrote:
>> This patch series add support for various components in Xiaomi Redmi
>> Note 8.
>>
>> Most notably:
>> - IR transmitter
>> - USB-C OTG
>> - Vibrator
>>
>> Also, fix some bindings warning as reported due to previous commits.
>> These are tested with linux-next tag next-20260320.
>>
>> Signed-off-by: Biswapriyo Nath <nathbappai@gmail.com>
>> ---
>> Biswapriyo Nath (7):
>> arm64: dts: qcom: sm6125-xiaomi-ginkgo: Enable vibrator
>> arm64: dts: qcom: sm6125: Enable USB-C port handling
>> arm64: dts: qcom: sm6125-xiaomi-ginkgo: Add PMI632 Type-C
>> property
>> dt-bindings: leds: irled: ir-spi-led: Add new duty-cycle value
>> arm64: dts: qcom: sm6125-xiaomi-ginkgo: Add IR transmitter
>> arm64: dts: qcom: sm6125: Use 64 bit addressing
>> dt-bindings: clock: qcom, dispcc-sm6125: Add #reset-cells
>> property
>>
>> .../bindings/clock/qcom,dispcc-sm6125.yaml | 3 +
>> .../devicetree/bindings/leds/irled/ir-spi-led.yaml | 2 +-
>> .../boot/dts/qcom/sm6125-xiaomi-ginkgo-common.dtsi | 56 +++++++
>
> I'm assuming all of these changes apply to both ginkgo and willow,
> which both include ginkgo-common?
All these change should work on both, willow is a ginkgo with NFC.
>
> Konrad
^ permalink raw reply
* Re: [PATCH net-next 1/2] net: stmmac: remove axi_kbbe, axi_mb and axi_rb members
From: Russell King (Oracle) @ 2026-03-26 17:47 UTC (permalink / raw)
To: Simon Horman
Cc: Andrew Lunn, Alexandre Torgue, Andrew Lunn, Conor Dooley,
David S. Miller, devicetree, Eric Dumazet, Giuseppe Cavallaro,
Jakub Kicinski, Jose Abreu, Krzysztof Kozlowski, linux-arm-kernel,
linux-stm32, netdev, Paolo Abeni, Rob Herring, Yao Zi
In-Reply-To: <20260326172943.GR111839@horms.kernel.org>
On Thu, Mar 26, 2026 at 05:29:43PM +0000, Simon Horman wrote:
> On Tue, Mar 24, 2026 at 10:05:40AM +0000, Russell King (Oracle) wrote:
> > axi_kbbe, axi_mb and axi_rb are all written, but nothing ever reads
> > their values. Remove the code that sets these and the struct members.
> >
> > Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
>
> Hi Russell,
>
> FYI, AI review suggests that these fields should also be removed from
> Documentation/networking/device_drivers/ethernet/stmicro/stmmac.rst
I noticed. I've prepared an update if netdev folk want that to happen
as I've noticed that that documentation is fairly out of date now.
Do we think it's still useful, or should we consider deleting or
trimming it down? Would it be better to move the struct definitions
into the header file and making the header file part of the docs so
that the documentation is local to the structs?
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
^ permalink raw reply
* Re: [PATCH 1/2] dt-bindings: iio: amplifiers: ad8366: add adrf5702/3 support
From: Conor Dooley @ 2026-03-26 17:46 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Jonathan Cameron, Rodrigo Alencar via B4 Relay, rodrigo.alencar,
linux-iio, devicetree, linux-kernel, Lars-Peter Clausen,
Michael Hennerich, David Lechner, Andy Shevchenko, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
In-Reply-To: <20260325191953.290a204f@jic23-huawei>
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On Wed, Mar 25, 2026 at 07:19:53PM +0000, Jonathan Cameron wrote:
> On Wed, 25 Mar 2026 18:13:45 +0000
> Conor Dooley <conor@kernel.org> wrote:
>
> > On Wed, Mar 25, 2026 at 12:46:27PM +0000, Jonathan Cameron wrote:
> > > On Wed, 25 Mar 2026 11:12:02 +0000
> > > Rodrigo Alencar via B4 Relay <devnull+rodrigo.alencar.analog.com@kernel.org> wrote:
> > >
> > > > From: Rodrigo Alencar <rodrigo.alencar@analog.com>
> > > >
> > > > Add compatible entries for ADRF5702 and ADRF5703 Digital Attenuators.
> > >
> > > Explain how they are different from the existing supported devices.
> > >
> > > Something simple like the "Each device has its own gain range and step,
> > > hence no fallback compatibles are used." that you had in the original patch
> > > is what we need here.
> >
> > Which means that this is a v2 that doesn't say it is a v2, or explain
> > what has changed?
>
> I meant the original driver - which only landed recently and answered
> the question of difference nicely.
Ah I see. Wording confused me!
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^ permalink raw reply
* Re: [PATCH v4 2/4] dt-bindings: hwmon: Add Sensirion SHT30 series
From: Conor Dooley @ 2026-03-26 17:45 UTC (permalink / raw)
To: Guenter Roeck
Cc: Zaixiang Xu, robh, krzk+dt, conor+dt, linux-hwmon, devicetree,
linux-kernel
In-Reply-To: <20260326-lullaby-elevator-3a3d25e9a6c0@spud>
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On Thu, Mar 26, 2026 at 05:42:30PM +0000, Conor Dooley wrote:
> On Wed, Mar 25, 2026 at 06:05:22PM -0700, Guenter Roeck wrote:
> > On 3/25/26 11:20, Conor Dooley wrote:
> > > On Wed, Mar 25, 2026 at 05:08:08PM +0800, Zaixiang Xu wrote:
> > > > Add YAML devicetree binding schema for Sensirion SHT30 series.
> > > > Use fallback compatibles for compatible chips and add optional
> > > > interrupts and vdd-supply properties.
> > > >
> > > > Reported-by: kernel test robot <lkp@intel.com>
> > > > Closes: https://lore.kernel.org/r/202603212044.BRPaiz86-lkp@intel.com/
> > >
> > > The robot did not report that this binding was missing.
> > > It also told you not to add these tags.
> > >
> > > You also ignored my and Krzysztof's reviews.
> > >
> > > NAK.
> > >
> >
> > Maybe we should just point to AI feedback:
> >
> > https://sashiko.dev/#/patchset/1774429690-129139-1-git-send-email-zaixiang.xu.dev%40gmail.com
> >
> > and only get involved after AI does not report any problems.
> >
>
> The presentation of info in that is weird, it creates a pseudo-commit
> message, and then goes on to talk about things that the pseudo-commit
> message has had culled.
How good is this LLM stuff at figuring out if previous review feedback
has been resolved? Or is it not capable of looking at earlier revisions?
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