* Re: [PATCH v9 1/6] dt-bindings: pinctrl: add NXP MC33978/MC34978 MSDI
From: Rob Herring (Arm) @ 2026-03-31 18:32 UTC (permalink / raw)
To: Oleksij Rempel
Cc: Linus Walleij, linux-gpio, kernel, Conor Dooley, Peter Rosin,
devicetree, Krzysztof Kozlowski, David Jander, linux-kernel,
linux-hwmon, Guenter Roeck, Lee Jones
In-Reply-To: <20260331171612.102018-2-o.rempel@pengutronix.de>
On Tue, 31 Mar 2026 19:16:07 +0200, Oleksij Rempel wrote:
> Add device tree binding documentation for the NXP MC33978 and MC34978
> Multiple Switch Detection Interface (MSDI) devices.
>
> The MC33978 and MC34978 differ primarily in their operating temperature
> ranges. While not software-detectable, providing specific compatible
> strings allows the hwmon subsystem to correctly interpret thermal
> thresholds and hardware faults.
>
> These ICs monitor up to 22 mechanical switch contacts in automotive and
> industrial environments. They provide configurable wetting currents to
> break through contact oxidation and feature extensive hardware
> protection against thermal overload and voltage transients (load
> dumps/brown-outs).
>
> The device interfaces via SPI. While it provides multiple functions, its
> primary hardware purpose is pin/switch control. To accurately represent
> the hardware as a single physical integrated circuit without unnecessary
> DT overhead, all functions are flattened into a single pinctrl node:
> - pinctrl: Exposing the 22 switch inputs (SG/SP pins) as a GPIO controller
> and managing their pin configurations.
> - hwmon: Exposing critical hardware faults (OT, OV, UV) and static
> voltage/temperature thresholds.
> - mux: Controlling the 24-to-1 analog multiplexer to route pin voltages,
> internal temperature, or battery voltage to an external SoC ADC.
>
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
> Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
> Reviewed-by: Linus Walleij <linusw@kernel.org>
> ---
> changes v9:
> - no changes
> changes v8:
> - Update IRQ_TYPE_* macros include path reference in documentation from
> interrupt-controller.h to dt-bindings/interrupt-controller/irq.h.
> - Add bias-disable, drive-open-drain, drive-open-source, and drive-strength
> to the list of supported pin configuration properties.
> changes v7:
> - no changes
> changes v6:
> - add Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
> - add Reviewed-by: Linus Walleij <linusw@kernel.org>
> changes v5:
> - Commit Message: Added justification for distinct compatible strings
> based on temperature ranges.
> - Restricted pins property to an explicit enum of valid hardware pins
> changes v4:
> - Drop the standalone mfd/nxp,mc33978.yaml schema entirely.
> - Move the unified device binding to bindings/pinctrl/nxp,mc33978.yaml,
> - Remove the dedicated child node compatible strings (nxp,mc33978-pinctrl).
> - Flatten the pinctrl/gpio properties directly into the main SPI device
> node.
> changes v3:
> - Drop regular expression pattern from pinctrl child node and define
> it as a standard property
> - Reorder required properties list in MFD binding
> - Remove stray blank line from the MFD binding devicetree example
> - Replace unevaluatedProperties with additionalProperties in the pinctrl
> binding
> changes v2:
> - Squashed MFD, pinctrl, hwmon, and mux bindings into a single patch
> - Removed the empty hwmon child node
> - Folded the mux-controller node into the parent MFD node
> - Added vbatp-supply and vddq-supply to the required properties block
> - Changed the example node name from mc33978@0 to gpio@0
> - Removed unnecessary literal block scalars (|) from descriptions
> - Documented SG, SP, and SB pin acronyms in the pinctrl description
> - Added consumer polarity guidance (GPIO_ACTIVE_LOW/HIGH) for SG/SB
> inputs, with a note on output circuit dependency
> - Updated commit message
> ---
> .../bindings/pinctrl/nxp,mc33978.yaml | 158 ++++++++++++++++++
> 1 file changed, 158 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/nxp,mc33978.yaml
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pinctrl/nxp,mc33978.example.dtb: gpio@0 (nxp,mc33978): $nodename:0: 'gpio@0' does not match '^mux-controller(@.*|-([0-9]|[1-9][0-9]+))?$'
from schema $id: http://devicetree.org/schemas/mux/mux-controller.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.kernel.org/project/devicetree/patch/20260331171612.102018-2-o.rempel@pengutronix.de
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
^ permalink raw reply
* Re: [PATCH v3 1/2] dt-bindings: display: panel: Add ChipWealth CH13726A AMOLED driver
From: Aaron Kling @ 2026-03-31 18:41 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Neil Armstrong, Jessica Zhang, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Simona Vetter, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, dri-devel, devicetree,
linux-kernel, Teguh Sobirin
In-Reply-To: <CALHNRZ-TAQmcwYr9iW+j+S5Egh11C0LpPeY1SO=hgDdvG8otqQ@mail.gmail.com>
On Tue, Mar 24, 2026 at 11:01 AM Aaron Kling <webgeek1234@gmail.com> wrote:
>
> On Tue, Mar 24, 2026 at 4:08 AM Krzysztof Kozlowski <krzk@kernel.org> wrote:
> >
> > On Mon, Mar 23, 2026 at 12:08:32PM -0500, Aaron Kling wrote:
> > > The Chip Wealth Technology CH13726A AMOLED driver is a single chip
> > > solution for MIPI-DSI. This is used for the AYN Thor bottom panel.
> > >
> > > Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
> > > ---
> > > .../display/panel/chipwealth,ch13726a.yaml | 65 ++++++++++++++++++++++
> > > 1 file changed, 65 insertions(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/display/panel/chipwealth,ch13726a.yaml b/Documentation/devicetree/bindings/display/panel/chipwealth,ch13726a.yaml
> > > new file mode 100644
> > > index 0000000000000000000000000000000000000000..5d964900795653401a871994bcf6403cdeaad64f
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/display/panel/chipwealth,ch13726a.yaml
> > > @@ -0,0 +1,65 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/display/panel/chipwealth,ch13726a.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Chip Wealth Technology CH13726A AMOLED driver
> > > +
> > > +maintainers:
> > > + - Neil Armstrong <neil.armstrong@linaro.org>
> > > +
> > > +description:
> > > + Chip Wealth Technology CH13726A is a single-chip solution
> > > + for AMOLED connected using a MIPI-DSI video interface.
> >
> > Here you describe the hardware, including what I asked last time -
> > explain why this is ayntec thor panel, but not chipwealth,ch13726a.
> >
> > Then also name the file as the compatible. If you do not know the part
> > (model?) number, then why do you think filename should be called
> > ch13726a?
>
> The vendor source release for the AYN Thor calls the 'panel' ch13726a,
> but per the data sheet for said part, it's a chip used in various
> panels, not a panel itself. The handling for various panels using this
> chip will share a lot of similarities since the chip is what the
> kernel driver will talk to. The alternative would be having separate
> drivers and bindings for every panel that will be mostly duplicated.
> This is the case for multiple things supported in the kernel already,
> such as the vtdr6130 which is currently described as a unique panel
> but is in fact the part number for a ddic. And I will need to refactor
> that for another device I have in the pipeline. In fact, all the
> device panels I need to submit in this context reference ddic's and
> not unique panel models. I'm waiting to see what gets approved for
> this series before sending the rest of those in.
>
> If I add something to the description like 'This chip is not a panel
> itself, but is used to control various panels', would that be
> sufficient? Or does the kernel need a new way to describe ddic's
> separately from panels, since this seems to be common now?
Krzysztof,
Any response to this? Or do I take another guess at what you want when
sending a new revision?
Aaron
^ permalink raw reply
* Re: [PATCH] ARM: dts: qcom: msm8960: expressatt: Add MAX17048 fuel gauge
From: Dmitry Baryshkov @ 2026-03-31 18:43 UTC (permalink / raw)
To: guptarud
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-arm-msm, devicetree, linux-kernel
In-Reply-To: <20260331-expressatt_fuel_guage-v1-1-23d1d8526b69@gmail.com>
On Tue, Mar 31, 2026 at 11:00:04AM -0700, Rudraksha Gupta via B4 Relay wrote:
> From: Rudraksha Gupta <guptarud@gmail.com>
>
> Add MAX17048 fuel gauge support.
>
> Tested by comparing battery capacity readings between upstream (mainline
> max17040 driver) and downstream (Samsung max17048_fuelgauge driver)
> across a full discharge cycle. Upstream reads ~3% lower throughout. Both
> track the discharge curve correctly:
>
> Upstream: 95 92 88 87 86 87 83 82 80 68 60 55 50 45 40 35 30 20 16 10 10 5 5 1
> Downstream: 95 94 92 91 91 89 87 86 84 73 64 59 51 48 43 38 33 23 17 14 12 8 6 3
>
> +
> + /* Fuel gauge (MAX17048) on i2c-gpio 24/25. Alert on GPIO 67. */
> + i2c-fuelgauge {
> + compatible = "i2c-gpio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + sda-gpios = <&tlmm 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + scl-gpios = <&tlmm 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
These pins seems to match GSBI5. Is there a reason for using bit-banged
I2C instead of defining and enabling GSBI-based I2C?
> + pinctrl-0 = <&fuelgauge_i2c_pins>;
> + pinctrl-names = "default";
> + status = "okay";
> + i2c-gpio,delay-us = <2>;
> +
> + fuel-gauge@36 {
> + compatible = "maxim,max17048";
> + reg = <0x36>;
> + maxim,double-soc;
> + maxim,rcomp = /bits/ 8 <0x62>;
> + maxim,alert-low-soc-level = <2>;
> + interrupt-parent = <&tlmm>;
> + interrupts = <67 IRQ_TYPE_EDGE_FALLING>;
> + pinctrl-0 = <&fuelgauge_alert_pin>;
> + pinctrl-names = "default";
> + wakeup-source;
> + };
> + };
> };
>
> &gsbi2 {
> @@ -281,6 +307,13 @@ touchscreen: touchscreen-int-state {
> drive-strength = <2>;
> };
>
> + fuelgauge_i2c_pins: fuelgauge-i2c-state {
> + pins = "gpio24", "gpio25";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> nfc_default: nfc-default-state {
> irq-pins {
> pins = "gpio106";
> @@ -325,6 +358,13 @@ touchkey_irq_pin: touchkey-irq-state {
> drive-strength = <2>;
> bias-disable;
> };
> +
> + fuelgauge_alert_pin: fuelgauge-alert-state {
I don't see the previous node in upstream DT. Please make sure that you
list all dependencies.
> + pins = "gpio67";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-disable;
> + };
> };
>
> &pm8921 {
>
> ---
> base-commit: e9ec05addd1a067fc7cb218f20ecdc1b1b0898c0
> change-id: 20260331-expressatt_fuel_guage-465dfb3f87ab
> prerequisite-message-id: <20260331-expressatt_camera_flash-v4-0-f1e99f474513@gmail.com>
> prerequisite-patch-id: ab8b8d87fd2d518c4c5b5dace3f22238d1abbe49
> prerequisite-patch-id: 47e32e653e520a27770bb05d99135694b0128ba0
> prerequisite-patch-id: 7ef7df61e7ef6476a35811d765f522f793d9ecc7
>
> Best regards,
> --
> Rudraksha Gupta <guptarud@gmail.com>
>
>
--
With best wishes
Dmitry
^ permalink raw reply
* [PATCH v2 0/2] arm64: dts: qcom: Introduce support for Monaco-ac-sku Evaluation Kit
From: Umang Chheda @ 2026-03-31 18:44 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Richard Cochran
Cc: linux-arm-msm, devicetree, linux-kernel, Umang Chheda, netdev,
Faruque Ansari
Add support for Qualcomm's Monaco-ac-sku Evaluation Kit (EVK) without
safety monitoring feature of Safety Island(SAIL) subsystem.
This board is based on Qualcomm's QCS8300-AC variant SoC.
Monaco-ac-sku EVK board is a single board computer (SBC) that supports various
industrial applications, including factory automation, industrial
robots, drones, edge AI boxes, machine vision, autonomous mobile
robots (AMRs), and industrial gateways.
Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com>
---
Changes in v2:
- Drop keyword "sku" from the compatible string of board bindings
- Krzysztof.
- Wrap commit text of dt-bindings change based on upstream guidelines
- Krzysztof.
- Link to v1: https://patch.msgid.link/20260328-monaco-evk-ac-sku-v1-0-79d166fa5571@oss.qualcomm.com
---
Umang Chheda (2):
dt-bindings: arm: qcom: Add monaco-evk-ac support
arm64: dts: qcom: monaco: Add monaco-ac EVK board
Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
arch/arm64/boot/dts/qcom/Makefile | 1 +
arch/arm64/boot/dts/qcom/monaco-evk-ac-sku.dts | 730 ++++++++++++++++++++++++
3 files changed, 732 insertions(+)
---
base-commit: 3b058d1aeeeff27a7289529c4944291613b364e9
change-id: 20260328-monaco-evk-ac-sku-6d66f965335c
Best regards,
--
Umang Chheda <umang.chheda@oss.qualcomm.com>
^ permalink raw reply
* [PATCH v2 1/2] dt-bindings: arm: qcom: Add monaco-evk-ac support
From: Umang Chheda @ 2026-03-31 18:44 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Richard Cochran
Cc: linux-arm-msm, devicetree, linux-kernel, Umang Chheda, netdev
In-Reply-To: <20260401-monaco-evk-ac-sku-v2-0-27b5f702cfba@oss.qualcomm.com>
Introduce bindings for the monaco-evk-ac IoT board, which is
based on the monaco-ac (QCS8300-AC) SoC variant.
Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com>
---
Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index ca880c105f3b..c76365a89687 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -918,6 +918,7 @@ properties:
- enum:
- arduino,monza
- qcom,monaco-evk
+ - qcom,monaco-evk-ac
- qcom,qcs8300-ride
- const: qcom,qcs8300
--
2.34.1
^ permalink raw reply related
* [PATCH v2 2/2] arm64: dts: qcom: monaco: Add monaco-ac EVK board
From: Umang Chheda @ 2026-03-31 18:44 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Richard Cochran
Cc: linux-arm-msm, devicetree, linux-kernel, Umang Chheda, netdev,
Faruque Ansari
In-Reply-To: <20260401-monaco-evk-ac-sku-v2-0-27b5f702cfba@oss.qualcomm.com>
Add initial device tree support for monaco-ac EVK board,
based on Qualcomm's monaco-ac (QCS8300-AC) variant SoC.
monaco-ac EVK is single board supporting these peripherals :
- Storage: 1 × 128 GB UFS, micro-SD card, EEPROMs for MACs,
and eMMC.
- Audio/Video, Camera & Display ports.
- Connectivity: RJ45 2.5GbE, WLAN/Bluetooth, CAN/CAN-FD.
- PCIe ports.
- USB & UART ports.
Compared to "monaco-evk" variant, which utilizes higher tier QCS8300-AA
SKU (supporting 40 TOPS of NPU) and a 4-PMIC (2x PM8650AU + Maxim MAX20018
+ TI TPS6594) power delivery network (PDN) to support higher power
requirement. This board utilizes lower tier QCS8300-AC SKU
(Supporting 20 TOPS of NPU) and a simplified 2 PMIC(2x PM8650AU) PDN.
Add support for the following components :
- GPI (Generic Peripheral Interface) and QUPv3-0/1
controllers to facilitate DMA and peripheral communication.
- TCA9534 I/O expander via I2C to provide 8 additional GPIO
lines for extended I/O functionality.
- USB1 controller routed to a TypeC connector in device mode to
support USB peripheral operations.
- Remoteproc subsystems for supported DSPs such as Audio DSP,
Compute DSP and Generic DSP, along with their corresponding
firmware.
- Configure nvmem-layout on the I2C EEPROM to store data for Ethernet
and other consumers.
- QCA8081 2.5G Ethernet PHY on port-0 and expose the
Ethernet MAC address via nvmem for network configuration.
It depends on CONFIG_QCA808X_PHY to use QCA8081 PHY.
- Support for the Iris video decoder, including the required
firmware, to enable video decoding capabilities.
- PCIe0 and PCIe1 controller and phy-nodes.
- Sound card and max98357a based I2S speaker amplifier.
Written with inputs from:
Nirmesh Kumar Singh <nirmesh.singh@oss.qualcomm.com> - GPIO
Expander.
Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> - GPI/QUP.
Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com> - Ethernet.
Monish Chunara <monish.chunara@oss.qualcomm.com> - EEPROM.
Swati Agarwal <swati.agarwal@oss.qualcomm.com> - USB.
Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com> - PCIe.
Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> - Audio.
Co-developed-by: Faruque Ansari <faruque.ansari@oss.qualcomm.com>
Signed-off-by: Faruque Ansari <faruque.ansari@oss.qualcomm.com>
Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/Makefile | 1 +
arch/arm64/boot/dts/qcom/monaco-evk-ac-sku.dts | 730 +++++++++++++++++++++++++
2 files changed, 731 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index c46d94bb6dd5..1d8c2a3db6c0 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -57,6 +57,7 @@ dtb-$(CONFIG_ARCH_QCOM) += mahua-crd.dtb
dtb-$(CONFIG_ARCH_QCOM) += milos-fairphone-fp6.dtb
dtb-$(CONFIG_ARCH_QCOM) += monaco-arduino-monza.dtb
dtb-$(CONFIG_ARCH_QCOM) += monaco-evk.dtb
+dtb-$(CONFIG_ARCH_QCOM) += monaco-evk-ac-sku.dtb
monaco-evk-camera-imx577-dtbs := monaco-evk.dtb monaco-evk-camera-imx577.dtbo
dtb-$(CONFIG_ARCH_QCOM) += monaco-evk-camera-imx577.dtb
diff --git a/arch/arm64/boot/dts/qcom/monaco-evk-ac-sku.dts b/arch/arm64/boot/dts/qcom/monaco-evk-ac-sku.dts
new file mode 100644
index 000000000000..f6294b2a486d
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/monaco-evk-ac-sku.dts
@@ -0,0 +1,730 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/sound/qcom,q6afe.h>
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+
+#include "monaco.dtsi"
+#include "monaco-pmics.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. Monaco-ac EVK";
+ compatible = "qcom,monaco-evk-ac", "qcom,qcs8300";
+
+ aliases {
+ ethernet0 = ðernet0;
+ i2c1 = &i2c1;
+ serial0 = &uart7;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ dmic: audio-codec-0 {
+ compatible = "dmic-codec";
+ #sound-dai-cells = <0>;
+ num-channels = <1>;
+ };
+
+ max98357a: audio-codec-1 {
+ compatible = "maxim,max98357a";
+ #sound-dai-cells = <0>;
+ };
+
+ sound {
+ compatible = "qcom,qcs8275-sndcard";
+ model = "MONACO-EVK";
+
+ pinctrl-0 = <&hs0_mi2s_active>, <&mi2s1_active>;
+ pinctrl-names = "default";
+
+ hs0-mi2s-playback-dai-link {
+ link-name = "HS0 MI2S Playback";
+
+ codec {
+ sound-dai = <&max98357a>;
+ };
+
+ cpu {
+ sound-dai = <&q6apmbedai PRIMARY_MI2S_RX>;
+ };
+
+ platform {
+ sound-dai = <&q6apm>;
+ };
+ };
+
+ sec-mi2s-capture-dai-link {
+ link-name = "Secondary MI2S Capture";
+
+ codec {
+ sound-dai = <&dmic>;
+ };
+
+ cpu {
+ sound-dai = <&q6apmbedai SECONDARY_MI2S_TX>;
+ };
+
+ platform {
+ sound-dai = <&q6apm>;
+ };
+ };
+ };
+};
+
+&apps_rsc {
+ regulators-0 {
+ compatible = "qcom,pmm8654au-rpmh-regulators";
+ qcom,pmic-id = "a";
+
+ vreg_l3a: ldo3 {
+ regulator-name = "vreg_l3a";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l4a: ldo4 {
+ regulator-name = "vreg_l4a";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <912000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l5a: ldo5 {
+ regulator-name = "vreg_l5a";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l6a: ldo6 {
+ regulator-name = "vreg_l6a";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <912000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l7a: ldo7 {
+ regulator-name = "vreg_l7a";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <912000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l8a: ldo8 {
+ regulator-name = "vreg_l8a";
+ regulator-min-microvolt = <2504000>;
+ regulator-max-microvolt = <2960000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l9a: ldo9 {
+ regulator-name = "vreg_l9a";
+ regulator-min-microvolt = <2970000>;
+ regulator-max-microvolt = <3072000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_s4a: smps4 {
+ regulator-name = "vreg_s4a";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_s9a: smps9 {
+ regulator-name = "vreg_s9a";
+ regulator-min-microvolt = <1352000>;
+ regulator-max-microvolt = <1352000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ regulators-1 {
+ compatible = "qcom,pmm8654au-rpmh-regulators";
+ qcom,pmic-id = "c";
+
+ vreg_l1c: ldo1 {
+ regulator-name = "vreg_l1c";
+ regulator-min-microvolt = <300000>;
+ regulator-max-microvolt = <500000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l2c: ldo2 {
+ regulator-name = "vreg_l2c";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <904000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l4c: ldo4 {
+ regulator-name = "vreg_l4c";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l6c: ldo6 {
+ regulator-name = "vreg_l6c";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l7c: ldo7 {
+ regulator-name = "vreg_l7c";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l8c: ldo8 {
+ regulator-name = "vreg_l8c";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l9c: ldo9 {
+ regulator-name = "vreg_l9c";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_s5c: smps5 {
+ regulator-name = "vreg_s5c";
+ regulator-min-microvolt = <1104000>;
+ regulator-max-microvolt = <1104000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+};
+
+ðernet0 {
+ phy-mode = "2500base-x";
+ phy-handle = <&hsgmii_phy0>;
+
+ pinctrl-0 = <ðernet0_default>;
+ pinctrl-names = "default";
+
+ snps,mtl-rx-config = <&mtl_rx_setup>;
+ snps,mtl-tx-config = <&mtl_tx_setup>;
+ nvmem-cells = <&mac_addr0>;
+ nvmem-cell-names = "mac-address";
+
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hsgmii_phy0: ethernet-phy@1c {
+ compatible = "ethernet-phy-id004d.d101";
+ reg = <0x1c>;
+ reset-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <11000>;
+ reset-deassert-us = <70000>;
+ };
+ };
+
+ mtl_rx_setup: rx-queues-config {
+ snps,rx-queues-to-use = <4>;
+ snps,rx-sched-sp;
+
+ queue0 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x0>;
+ snps,route-up;
+ snps,priority = <0x1>;
+ };
+
+ queue1 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x1>;
+ snps,route-ptp;
+ };
+
+ queue2 {
+ snps,avb-algorithm;
+ snps,map-to-dma-channel = <0x2>;
+ snps,route-avcp;
+ };
+
+ queue3 {
+ snps,avb-algorithm;
+ snps,map-to-dma-channel = <0x3>;
+ snps,priority = <0xc>;
+ };
+ };
+
+ mtl_tx_setup: tx-queues-config {
+ snps,tx-queues-to-use = <4>;
+
+ queue0 {
+ snps,dcb-algorithm;
+ };
+
+ queue1 {
+ snps,dcb-algorithm;
+ };
+
+ queue2 {
+ snps,avb-algorithm;
+ snps,send_slope = <0x1000>;
+ snps,idle_slope = <0x1000>;
+ snps,high_credit = <0x3e800>;
+ snps,low_credit = <0xffc18000>;
+ };
+
+ queue3 {
+ snps,avb-algorithm;
+ snps,send_slope = <0x1000>;
+ snps,idle_slope = <0x1000>;
+ snps,high_credit = <0x3e800>;
+ snps,low_credit = <0xffc18000>;
+ };
+ };
+};
+
+&gpi_dma0 {
+ status = "okay";
+};
+
+&gpi_dma1 {
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-0 = <&qup_i2c1_default>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ fan_controller: fan@18 {
+ compatible = "ti,amc6821";
+ reg = <0x18>;
+ #pwm-cells = <2>;
+
+ fan {
+ pwms = <&fan_controller 40000 PWM_POLARITY_INVERTED>;
+ };
+ };
+
+ eeprom0: eeprom@50 {
+ compatible = "atmel,24c256";
+ reg = <0x50>;
+ pagesize = <64>;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ mac_addr0: mac-addr@0 {
+ reg = <0x0 0x6>;
+ };
+ };
+ };
+};
+
+&i2c15 {
+ pinctrl-0 = <&qup_i2c15_default>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ expander0: gpio@38 {
+ compatible = "ti,tca9538";
+ reg = <0x38>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupts-extended = <&tlmm 56 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&expander0_int>;
+ pinctrl-names = "default";
+ };
+
+ expander1: gpio@39 {
+ compatible = "ti,tca9538";
+ reg = <0x39>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupts-extended = <&tlmm 16 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&expander1_int>;
+ pinctrl-names = "default";
+ };
+
+ expander2: gpio@3a {
+ compatible = "ti,tca9538";
+ reg = <0x3a>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupts-extended = <&tlmm 95 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&expander2_int>;
+ pinctrl-names = "default";
+ };
+
+ expander3: gpio@3b {
+ compatible = "ti,tca9538";
+ reg = <0x3b>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupts-extended = <&tlmm 24 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&expander3_int>;
+ pinctrl-names = "default";
+ };
+
+ expander4: gpio@3c {
+ compatible = "ti,tca9538";
+ reg = <0x3c>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupts-extended = <&tlmm 96 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&expander4_int>;
+ pinctrl-names = "default";
+ };
+
+ expander5: gpio@3d {
+ compatible = "ti,tca9538";
+ reg = <0x3d>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupts-extended = <&tlmm 3 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&expander5_int>;
+ pinctrl-names = "default";
+ };
+
+ expander6: gpio@3e {
+ compatible = "ti,tca9538";
+ reg = <0x3e>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupts-extended = <&tlmm 52 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&expander6_int>;
+ pinctrl-names = "default";
+ };
+};
+
+&iris {
+ status = "okay";
+};
+
+&pcie0 {
+ pinctrl-0 = <&pcie0_default_state>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&pcie0_phy {
+ vdda-phy-supply = <&vreg_l6a>;
+ vdda-pll-supply = <&vreg_l5a>;
+
+ status = "okay";
+};
+
+&pcie1 {
+ pinctrl-0 = <&pcie1_default_state>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&pcie1_phy {
+ vdda-phy-supply = <&vreg_l6a>;
+ vdda-pll-supply = <&vreg_l5a>;
+
+ status = "okay";
+};
+
+&pcieport0 {
+ reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+};
+
+&pcieport1 {
+ reset-gpios = <&tlmm 23 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
+};
+
+&qupv3_id_0 {
+ firmware-name = "qcom/qcs8300/qupv3fw.elf";
+
+ status = "okay";
+};
+
+&qupv3_id_1 {
+ firmware-name = "qcom/qcs8300/qupv3fw.elf";
+
+ status = "okay";
+};
+
+&remoteproc_adsp {
+ firmware-name = "qcom/qcs8300/adsp.mbn";
+
+ status = "okay";
+};
+
+&remoteproc_cdsp {
+ firmware-name = "qcom/qcs8300/cdsp0.mbn";
+
+ status = "okay";
+};
+
+&remoteproc_gpdsp {
+ firmware-name = "qcom/qcs8300/gpdsp0.mbn";
+
+ status = "okay";
+};
+
+&serdes0 {
+ phy-supply = <&vreg_l4a>;
+
+ status = "okay";
+};
+
+&spi10 {
+ status = "okay";
+
+ tpm@0 {
+ compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ };
+};
+
+&tlmm {
+
+ pcie0_default_state: pcie0-default-state {
+ wake-pins {
+ pins = "gpio0";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ clkreq-pins {
+ pins = "gpio1";
+ function = "pcie0_clkreq";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ perst-pins {
+ pins = "gpio2";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+
+ expander5_int: expander5-int-state {
+ pins = "gpio3";
+ function = "gpio";
+ bias-pull-up;
+ };
+
+ ethernet0_default: ethernet0-default-state {
+ ethernet0_mdc: ethernet0-mdc-pins {
+ pins = "gpio5";
+ function = "emac0_mdc";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+
+ ethernet0_mdio: ethernet0-mdio-pins {
+ pins = "gpio6";
+ function = "emac0_mdio";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+ };
+
+ expander1_int: expander1-int-state {
+ pins = "gpio16";
+ function = "gpio";
+ bias-pull-up;
+ };
+
+ qup_i2c1_default: qup-i2c1-state {
+ pins = "gpio19", "gpio20";
+ function = "qup0_se1";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ qup_i2c1_default: qup-i2c1-state {
+ pins = "gpio19", "gpio20";
+ function = "qup0_se1";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ pcie1_default_state: pcie1-default-state {
+ wake-pins {
+ pins = "gpio21";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ clkreq-pins {
+ pins = "gpio22";
+ function = "pcie1_clkreq";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ perst-pins {
+ pins = "gpio23";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+
+ expander3_int: expander3-int-state {
+ pins = "gpio24";
+ function = "gpio";
+ bias-pull-up;
+ };
+
+ expander6_int: expander6-int-state {
+ pins = "gpio52";
+ function = "gpio";
+ bias-pull-up;
+ };
+
+ expander0_int: expander0-int-state {
+ pins = "gpio56";
+ function = "gpio";
+ bias-pull-up;
+ };
+
+ qup_i2c15_default: qup-i2c15-state {
+ pins = "gpio91", "gpio92";
+ function = "qup1_se7";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ expander2_int: expander2-int-state {
+ pins = "gpio95";
+ function = "gpio";
+ bias-pull-up;
+ };
+
+ expander4_int: expander4-int-state {
+ pins = "gpio96";
+ function = "gpio";
+ bias-pull-up;
+ };
+};
+
+&uart7 {
+ status = "okay";
+};
+
+&ufs_mem_hc {
+ reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>;
+ vcc-supply = <&vreg_l8a>;
+ vcc-max-microamp = <1100000>;
+ vccq-supply = <&vreg_l4c>;
+ vccq-max-microamp = <1200000>;
+
+ status = "okay";
+};
+
+&ufs_mem_phy {
+ vdda-phy-supply = <&vreg_l4a>;
+ vdda-pll-supply = <&vreg_l5a>;
+
+ status = "okay";
+};
+
+&usb_1 {
+ dr_mode = "peripheral";
+
+ status = "okay";
+};
+
+&usb_1_hsphy {
+ vdda-pll-supply = <&vreg_l7a>;
+ vdda18-supply = <&vreg_l7c>;
+ vdda33-supply = <&vreg_l9a>;
+
+ status = "okay";
+};
+
+&usb_qmpphy {
+ vdda-phy-supply = <&vreg_l7a>;
+ vdda-pll-supply = <&vreg_l5a>;
+
+ status = "okay";
+};
--
2.34.1
^ permalink raw reply related
* Re: [PATCH v5 2/5] media: iris: scale MMCX power domain on SM8250
From: Dmitry Baryshkov @ 2026-03-31 18:46 UTC (permalink / raw)
To: Ulf Hansson
Cc: Dikshita Agarwal, Bjorn Andersson, Michael Turquette,
Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Taniya Das, Jonathan Marek, Rafael J. Wysocki,
Bryan O'Donoghue, Vikash Garodia, Mauro Carvalho Chehab,
Stanimir Varbanov, Abhinav Kumar, Hans Verkuil, Stefan Schmidt,
Konrad Dybcio, Bryan O'Donoghue, Dikshita Agarwal,
linux-arm-msm, linux-clk, devicetree, linux-kernel, linux-pm,
linux-media, Mauro Carvalho Chehab
In-Reply-To: <CAPDyKFrO3DzfG0aW4z4w87j_iWM=3dpvp=2Wgr4MX1Bin5-6ZA@mail.gmail.com>
On Tue, Mar 31, 2026 at 01:33:35PM +0200, Ulf Hansson wrote:
> On Mon, 30 Mar 2026 at 15:06, Dikshita Agarwal
> <dikshita.agarwal@oss.qualcomm.com> wrote:
> >
> >
> >
> > On 3/30/2026 4:45 PM, Dmitry Baryshkov wrote:
> > > On Mon, Mar 30, 2026 at 10:55:02AM +0530, Dikshita Agarwal wrote:
> > >>
> > >>
> > >> On 2/9/2026 7:02 AM, Dmitry Baryshkov wrote:
> > >>> On SM8250 most of the video clocks are powered by the MMCX domain, while
> > >>> the PLL is powered on by the MX domain. Extend the driver to support
> > >>> scaling both power domains, while keeping compatibility with the
> > >>> existing DTs, which define only the MX domain.
> > >>>
> > >>> Fixes: 79865252acb6 ("media: iris: enable video driver probe of SM8250 SoC")
> > >>> Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
> > >>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> > >>> ---
> > >>> drivers/media/platform/qcom/iris/iris_platform_gen1.c | 2 +-
> > >>> drivers/media/platform/qcom/iris/iris_probe.c | 7 +++++++
> > >>> 2 files changed, 8 insertions(+), 1 deletion(-)
> > >>>
> > >>> diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen1.c b/drivers/media/platform/qcom/iris/iris_platform_gen1.c
> > >>> index df8e6bf9430e..aa71f7f53ee3 100644
> > >>> --- a/drivers/media/platform/qcom/iris/iris_platform_gen1.c
> > >>> +++ b/drivers/media/platform/qcom/iris/iris_platform_gen1.c
> > >>> @@ -281,7 +281,7 @@ static const struct bw_info sm8250_bw_table_dec[] = {
> > >>>
> > >>> static const char * const sm8250_pmdomain_table[] = { "venus", "vcodec0" };
> > >>>
> > >>> -static const char * const sm8250_opp_pd_table[] = { "mx" };
> > >>> +static const char * const sm8250_opp_pd_table[] = { "mx", "mmcx" };
> > >>>
> > >>> static const struct platform_clk_data sm8250_clk_table[] = {
> > >>> {IRIS_AXI_CLK, "iface" },
> > >>> diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/platform/qcom/iris/iris_probe.c
> > >>> index 7b612ad37e4f..74ec81e3d622 100644
> > >>> --- a/drivers/media/platform/qcom/iris/iris_probe.c
> > >>> +++ b/drivers/media/platform/qcom/iris/iris_probe.c
> > >>> @@ -64,6 +64,13 @@ static int iris_init_power_domains(struct iris_core *core)
> > >>> return ret;
> > >>>
> > >>> ret = devm_pm_domain_attach_list(core->dev, &iris_opp_pd_data, &core->opp_pmdomain_tbl);
> > >>> + /* backwards compatibility for incomplete ABI SM8250 */
> > >>> + if (ret == -ENODEV &&
> > >>> + of_device_is_compatible(core->dev->of_node, "qcom,sm8250-venus")) {
> > >>> + iris_opp_pd_data.num_pd_names--;
> > >>> + ret = devm_pm_domain_attach_list(core->dev, &iris_opp_pd_data,
> > >>> + &core->opp_pmdomain_tbl);
> > >>> + }
> > >>> if (ret < 0)
> > >>> return ret;
> > >>>
> > >>>
> > >>
> > >> Hitting below compilation error on latest kernel
> > >>
> > >> drivers/media/platform/qcom/iris/iris_probe.c: In function
> > >> ‘iris_init_power_domains’:
> > >> drivers/media/platform/qcom/iris/iris_probe.c:71:46: error: decrement of
> > >> read-only member ‘num_pd_names’
> > >> 71 | iris_opp_pd_data.num_pd_names--;
> > >
> > > See commit 7ad7f43e568b ("pmdomain: de-constify fields struct
> > > dev_pm_domain_attach_data")
>
> The intent was for this patch to be part of v7.0-rc1, but I failed
> with my pull-request to Linus.
>
> Instead this will be part of v7.1-rc1, assuming everything goes as expected.
>
> Is it possible to drop/defer these changes until v7.2?
It would be very sad.
>
> Kind regards
> Uffe
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH v4 3/3] ARM: dts: qcom: msm8960: expressatt: Add camera flash
From: Rudraksha Gupta @ 2026-03-31 18:59 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Linus Walleij, Bjorn Andersson, Konrad Dybcio,
Liam Girdwood, Mark Brown, linux-leds, devicetree, linux-kernel,
linux-arm-msm, phone-devel, David Heidelberg, Konrad Dybcio
In-Reply-To: <xh2un63wi3noruqm6gf2dhayad77kpubalxc4xarmsm6eznvla@g4w2yuxja3c2>
Hello Dmitry,
>> + vreg_flash: regulator-flash {
>> + compatible = "regulator-fixed";
>> + regulator-name = "VREG_FLASH_3P3";
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + gpio = <&pm8921_mpps 4 GPIO_ACTIVE_HIGH>;
>> + enable-active-high;
>> + pinctrl-0 = <&flash_led_unlock>;
>> + pinctrl-names = "default";
>> + };
>> +
>> + led-controller {
> It looks like the nodes are not sorted. Could you please make sure that
> they are sorted alphanumerically (if there is no node address)?
Thanks for your feedback! Could I request this comment/change be noted
in
https://lore.kernel.org/all/20260331-expressatt_fuel_guage-v1-1-23d1d8526b69@gmail.com/
instead? As this seems to be the only comment remaining, it will be
easier for me to reorganize the DTS in the fuel gauge patch series
rather than this one, as the fuel gauge patch series depends on this
one. It also won't spam others in the mailing list who don't care about
the reorganization of the DTS.
Thanks,
Rudraksha
^ permalink raw reply
* Re: [PATCH v5 2/4] iio: adc: ad4691: add initial driver for AD4691 family
From: Andy Shevchenko @ 2026-03-31 19:04 UTC (permalink / raw)
To: Sabau, Radu bogdan
Cc: Andy Shevchenko, Lars-Peter Clausen, Hennerich, Michael,
Jonathan Cameron, David Lechner, Sa, Nuno, Andy Shevchenko,
Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Uwe Kleine-König, Liam Girdwood, Mark Brown, Linus Walleij,
Bartosz Golaszewski, Philipp Zabel, Jonathan Corbet, Shuah Khan,
linux-iio@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-doc@vger.kernel.org
In-Reply-To: <LV9PR03MB841477521DF5AB809D0184FAF753A@LV9PR03MB8414.namprd03.prod.outlook.com>
On Tue, Mar 31, 2026 at 05:05:32PM +0000, Sabau, Radu bogdan wrote:
> > -----Original Message-----
> > From: Andy Shevchenko <andriy.shevchenko@intel.com>
> > Sent: Tuesday, March 31, 2026 11:59 AM
> > On Tue, Mar 31, 2026 at 08:36:42AM +0000, Sabau, Radu bogdan wrote:
> > > > -----Original Message-----
> > > > From: Andy Shevchenko <andy.shevchenko@gmail.com>
> > > > Sent: Monday, March 30, 2026 8:24 PM
...
> > > > > > > +#include <linux/bitfield.h>
> > > > > > > +#include <linux/bitops.h>
> > > > > > > +#include <linux/cleanup.h>
> > > > > > > +#include <linux/delay.h>
> > > > > > > +#include <linux/device.h>
> > > > > >
> > > > > > Hmm... Is it used? Or perhaps you need only
> > > > > > dev_printk.h
> > > > > > device/devres.h
> > > > > > ?
> > > >
> > > > > I have checked this out and it seems device.h doesn't actually need
> > > > > to be included anyway since spi.h directly includes device.h, and since
> > > > > this is a SPI driver that's never going away, it's covered. Will drop it!
> > > >
> > > > No, this is the wrong justification. IWYU principle is about exact
> > > > match between what is used and included in a file (module). spi.h is
> > > > not dev_*() provider and may not be considered for that.
> > > >
> > >
> > > You are right, my justification was incorrect. Under IWYU, relying on
> > > spi.h's transitive pull of device.h is not valid. However, I think device.h
> > > is still needed in this case since struct device is used directly in the code
> > > both as local variables and in the regmap callbacks.
> >
> > Really? I can't see that.
> > (Hint: use of the data type and use of its pointer is a huge difference.)
> >
> > > Also dev_err_probe() is called directly and lives in device.h.
> >
> > No, as I started with my replies. The proper header that provides it is
> > dev_printk.h.
>
> Yep, my bad... device.h can be removed and devres and dev_printk be
> used instead. Sorry for the confusion from my end, I thought I was
> looking at device.h, but was instead looking at dev_printk.h.
No problem. Headers in Linux kernel is a mess. Mostly historically,
maintainers' preferences and neglecting the foreseeing the future of
the dependency hell.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH v8 13/13] ASoC: qcom: q6apm: Add support for early buffer mapping on DSP
From: Mark Brown @ 2026-03-31 19:17 UTC (permalink / raw)
To: Srinivas Kandagatla
Cc: robh, krzk+dt, conor+dt, mohammad.rafi.shaik, linux-sound,
lgirdwood, perex, tiwai, johan, dmitry.baryshkov, konrad.dybcio,
linux-arm-msm, devicetree, linux-kernel, srini, val,
mailingradian
In-Reply-To: <20260330082105.278055-14-srinivas.kandagatla@oss.qualcomm.com>
[-- Attachment #1: Type: text/plain, Size: 891 bytes --]
On Mon, Mar 30, 2026 at 08:21:05AM +0000, Srinivas Kandagatla wrote:
> @@ -416,9 +415,10 @@ static int q6apm_dai_close(struct snd_soc_component *component,
> struct snd_pcm_runtime *runtime = substream->runtime;
> struct q6apm_dai_rtd *prtd = runtime->private_data;
>
> - if (prtd->state) { /* only stop graph that is started */
> + if (prtd->state) {
> + /* only stop graph that is started */
> q6apm_graph_stop(prtd->graph);
> - q6apm_unmap_memory_regions(prtd->graph, substream->stream);
> + q6apm_free_fragments(prtd->graph, substream->stream);
> }
>
> q6apm_graph_close(prtd->graph);
Given that we allocate the fragments before setting state it looks like
there's a window where we might leak them. Please send an incremental
patch for this if you're going to fix it, I've queued things for CI and
will merge tomorrow unless something blows up.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply
* Re: [PATCH ath-next v3 1/6] dt-bindings: net: wireless: add ath12k wifi device IPQ5424
From: Raj Kumar Bhagat @ 2026-03-31 19:23 UTC (permalink / raw)
To: Jeff Johnson, Krzysztof Kozlowski
Cc: Johannes Berg, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jeff Johnson, linux-wireless, devicetree, linux-kernel, ath12k
In-Reply-To: <cf1d8b38-a5d0-46c6-8016-b366637d6c72@oss.qualcomm.com>
On 31-03-2026 21:14, Jeff Johnson wrote:
> On 3/31/2026 7:42 AM, Krzysztof Kozlowski wrote:
>> On 31/03/2026 16:23, Jeff Johnson wrote:
>>> On 3/31/2026 12:24 AM, Krzysztof Kozlowski wrote:
>>>> On Tue, Mar 31, 2026 at 02:09:06AM +0530, Raj Kumar Bhagat wrote:
>>>>> $id: http://devicetree.org/schemas/net/wireless/qcom,ipq5332-wifi.yaml#
>>>>> @@ -17,6 +17,7 @@ properties:
>>>>> compatible:
>>>>> enum:
>>>>> - qcom,ipq5332-wifi
>>>>> + - qcom,ipq5424-wifi
>>>>
>>>> No, use previous patch.
>>>>
>>>> I am annoyed that you keep making changes even for such trivialities and
>>>> require re-review from the community. Previous patch was correct. This
>>>> one doing whatever you want to do in copyrights is too much. You don't
>>>> change copyrights just because you wrote one device model.
>>>
>>> Krzysztof,
>>>
>>> FYI here is the guidance I received from Qualcomm legal (links to internal
>>> documentation, removed -- I've forwarded the entire e-mail to your Qualcomm
>>> mailbox):
>>
>> As I explained already more than once, legal can engage in open source
>> discussions directly. I am not going to discuss with them via proxies.
>>
>>>
>>> ... Repos under copyleft license [...] QTI copyright must be added when we
>>> make significant changes.
>>>
>>> ... Repos under friendly license (BSD, Apache, MIT, ...) [...] QTI copyright
>>> must be added for any changes, not just significant ones.
>>>
>>> ... under the regular QUIC to QTI open-source copyright transitioning [...]
>>> all QUIC Copyright instances should be replaced with year-less QTI OSS Copyright.
>>>
>>> I'll follow up with them on this case where there is a dual-license file.
>>
>> You nicely removed the quote where they ask to follow what the upstream
>> maintainer asks for. So as one of the maintainers I ask not to change
>> it, because it is churn and pointless waste of my time.
>
> Although I feel the latest patch correctly represents Qualcomm legal guidance,
> I'm not going to insist upon the copyright change.
>
Thanks for the discussion,
will use previous DT binding patch (v2) in the next version.
^ permalink raw reply
* Re: [PATCH 3/3] arm64: tegra: Add GTE nodes for Tegra264
From: Dipen Patel @ 2026-03-31 19:33 UTC (permalink / raw)
To: Suneel Garapati, jonathanh, thierry.reding, krzk+dt, conor+dt,
amhetre, sheetal, kkarthik, timestamp, devicetree, linux-tegra,
linux-kernel, robh
In-Reply-To: <20260330170657.185854-4-suneelg@nvidia.com>
On 3/30/26 10:06 AM, Suneel Garapati wrote:
> Add AON GPIO and system LIC GTE instances for Tegra264.
>
> Signed-off-by: Suneel Garapati <suneelg@nvidia.com>
> ---
> arch/arm64/boot/dts/nvidia/tegra264.dtsi | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
> index 7644a41d5f72..9b1aa69d4a79 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
> @@ -3207,6 +3207,15 @@ agic_page5: interrupt-controller@99b0000 {
> };
> };
>
> + hte_lic: hardware-timestamp@8380000 {
> + compatible = "nvidia,tegra264-gte-lic";
> + reg = <0x0 0x08380000 0x0 0x10000>;
> + interrupts = <GIC_SPI 0x00000268 IRQ_TYPE_LEVEL_HIGH>;
> + nvidia,int-threshold = <1>;
> + #timestamp-cells = <1>;
> + status = "disabled";
> + };
> +
> gpcdma: dma-controller@8400000 {
> compatible = "nvidia,tegra264-gpcdma", "nvidia,tegra186-gpcdma";
> reg = <0x0 0x08400000 0x0 0x210000>;
> @@ -3267,6 +3276,16 @@ hsp_top: hsp@8800000 {
> #mbox-cells = <2>;
> };
>
> + hte_aon: hardware-timestamp@c2b0000 {
> + compatible = "nvidia,tegra264-gte-aon";
> + reg = <0x0 0x0c2b0000 0x0 0x10000>;
> + interrupts = <GIC_SPI 0x00000226 IRQ_TYPE_LEVEL_HIGH>;
> + nvidia,int-threshold = <1>;
> + #timestamp-cells = <1>;
> + nvidia,gpio-controller = <&gpio_aon>;
> + status = "disabled";
> + };
> +
> rtc: rtc@c2c0000 {
> compatible = "nvidia,tegra264-rtc", "nvidia,tegra20-rtc";
> reg = <0x0 0x0c2c0000 0x0 0x10000>;
Reviewed-by: Dipen Patel <dipenp@nvidia.com>
^ permalink raw reply
* Re: [PATCH v2 5/6] phy: realtek: usb2: add support for RTL9607C USB2 PHY
From: Vladimir Oltean @ 2026-03-31 19:36 UTC (permalink / raw)
To: Rustam Adilov
Cc: Vinod Koul, Neil Armstrong, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Stanley Chang, linux-phy, devicetree, linux-kernel,
Michael Zavertkin
In-Reply-To: <1884dee6134e1c069e9f68edb2fdcd7f@disroot.org>
On Tue, Mar 31, 2026 at 04:48:08PM +0000, Rustam Adilov wrote:
> I am personally fine with removing the "force_host_disconnect = false" and other
> falses in rtl9607_phy_cfg but i am debating because it wouldn't line up with the rest.
You can also remove the other unnecessary initializations.
^ permalink raw reply
* [PATCH v3 00/15] SDM660 sound card and internal MI2S support
From: Richard Acayan @ 2026-03-31 19:39 UTC (permalink / raw)
To: Srinivas Kandagatla, Liam Girdwood, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela, Takashi Iwai,
Mohammad Rafi Shaik, Konrad Dybcio, linux-sound, linux-arm-msm,
devicetree
Cc: Nickolay Goppen, Adam Skladowski, Vladimir Lypak,
Dmitry Baryshkov, Wesley Cheng, Greg Kroah-Hartman, Johan Hovold,
Kees Cook, Charles Keepax, Kuninori Morimoto, Richard Acayan
This adds support for the SDM660 (formerly "SDM660 internal") sound
card and support for WCD codecs over internal MI2S.
Like on MSM8916 and MSM8953, some SDM660 and SDM670 devices connect to a
digital and analog codec. The connection to the digital codec is through
special "internal" MI2S ports. The digital and analog codecs are used on
the Xiaomi Redmi Note 7 for headset (playback + capture) and earpiece,
and also on the Google Pixel 3a for the headset.
This series does not include devicetree patches.
This series depends on "ASoC: qcom: q6dsp: few fixes and enhancements":
https://lore.kernel.org/r/20260330082105.278055-1-srinivas.kandagatla@oss.qualcomm.com
Changes since v2:
- add missing sign-off (1/15)
- use definition of last dt-bindings dai cell for LPASS_MAX_PORT (6/15)
- move sdm660 support to existing sm8250 driver (11-12/15)
- import WCD codec patches for MSM8953 (3/15, 13-14/15)
Changes from original (https://lore.kernel.org/r/20240731-msm8953-msm8976-asoc-v3-0-163f23c3a28d@gmail.com):
- add back empty line in WCD dt-bindings patch (3/15)
- add Dmitry's review tags (13-14/15)
- rebase onto q6dsp fixes
- rebase onto q6dsp fixes
Changes since v1 (https://lore.kernel.org/r/20260211020302.2674-1-mailingradian@gmail.com):
- rename sound card to drop "internal" (1/11, 10/11)
- use common headphone jack code (9/11, 10/11)
- remove no-op code in sound card driver (10/11)
- remove inaccurate comment about clock consumer/producer (10/11)
- add review tags (3/11, 4/11)
Adam Skladowski (2):
ASoC: dt-bindings: pm8916-wcd-analog-codec: Document pm8950/pm8953
ASoC: msm8916-wcd-analog: add pm8950 codec
Nickolay Goppen (1):
ASoC: dt-bindings: qcom,sm8250: add compatible for sdm660
Richard Acayan (11):
ASoC: dt-bindings: qcom: q6dsp: add internal mi2s support
ASoC: dt-bindings: pm8916-analog-codec: Add PM660L compatible
ASoC: dt-bindings: msm8916-digital-codec: Add SDM660 compatible
ASoC: qdsp6: q6dsp-lpass-ports: add internal mi2s support
ASoC: qdsp6: q6afe: add internal mi2s support
ASoC: qdsp6: q6afe-dai: add internal mi2s support
ASoC: qdsp6: q6routing: add internal mi2s support
ASoC: qdsp6: common: support headphone jacks connected to internal
mi2s
ASoC: qcom: sm8250: add support for INT0_MI2S_RX and INT3_MI2S_TX
ASoC: qcom: sm8250: add SDM660 compatible
ASoC: msm8916-wcd-analog: add quirk for cajon 2.0
Vladimir Lypak (1):
ASoC: msm8916-wcd-analog: add pm8953 codec
.../sound/qcom,msm8916-wcd-digital-codec.yaml | 8 +-
.../sound/qcom,pm8916-wcd-analog-codec.yaml | 11 +-
.../sound/qcom,q6dsp-lpass-ports.yaml | 4 +-
.../bindings/sound/qcom,sm8250.yaml | 1 +
.../sound/qcom,q6dsp-lpass-ports.h | 14 ++
sound/soc/codecs/msm8916-wcd-analog.c | 144 ++++++++++++-
sound/soc/qcom/common.c | 1 +
sound/soc/qcom/common.h | 2 +-
sound/soc/qcom/qdsp6/q6afe-dai.c | 46 ++++
sound/soc/qcom/qdsp6/q6afe.c | 56 +++++
sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c | 200 ++++++++++++++++++
sound/soc/qcom/qdsp6/q6routing.c | 78 ++++++-
sound/soc/qcom/sm8250.c | 17 ++
13 files changed, 570 insertions(+), 12 deletions(-)
--
2.53.0
^ permalink raw reply
* [PATCH v3 01/15] ASoC: dt-bindings: qcom,sm8250: add compatible for sdm660
From: Richard Acayan @ 2026-03-31 19:39 UTC (permalink / raw)
To: Srinivas Kandagatla, Liam Girdwood, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela, Takashi Iwai,
Mohammad Rafi Shaik, Konrad Dybcio, linux-sound, linux-arm-msm,
devicetree
Cc: Nickolay Goppen, Adam Skladowski, Vladimir Lypak,
Dmitry Baryshkov, Wesley Cheng, Greg Kroah-Hartman, Johan Hovold,
Kees Cook, Charles Keepax, Kuninori Morimoto, Richard Acayan
In-Reply-To: <20260331193939.40636-1-mailingradian@gmail.com>
From: Nickolay Goppen <setotau@mainlining.org>
Add compatibles for sdm660 based soundcards.
Signed-off-by: Nickolay Goppen <setotau@mainlining.org>
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
---
Documentation/devicetree/bindings/sound/qcom,sm8250.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml
index 15f38622b98b..63c744524e01 100644
--- a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml
+++ b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml
@@ -44,6 +44,7 @@ properties:
- qcom,qrb5165-rb5-sndcard
- qcom,sc7180-qdsp6-sndcard
- qcom,sc8280xp-sndcard
+ - qcom,sdm660-sndcard
- qcom,sdm845-sndcard
- qcom,sm8250-sndcard
- qcom,sm8450-sndcard
--
2.53.0
^ permalink raw reply related
* [PATCH v3 02/15] ASoC: dt-bindings: qcom: q6dsp: add internal mi2s support
From: Richard Acayan @ 2026-03-31 19:39 UTC (permalink / raw)
To: Srinivas Kandagatla, Liam Girdwood, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela, Takashi Iwai,
Mohammad Rafi Shaik, Konrad Dybcio, linux-sound, linux-arm-msm,
devicetree
Cc: Nickolay Goppen, Adam Skladowski, Vladimir Lypak,
Dmitry Baryshkov, Wesley Cheng, Greg Kroah-Hartman, Johan Hovold,
Kees Cook, Charles Keepax, Kuninori Morimoto, Richard Acayan
In-Reply-To: <20260331193939.40636-1-mailingradian@gmail.com>
The internal MI2S ports are found on devices with the internal sound
card for Snapdragon 660. Add support for them.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
---
.../bindings/sound/qcom,q6dsp-lpass-ports.yaml | 4 ++--
include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h | 14 ++++++++++++++
2 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml b/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml
index 2b27d6c8f58f..d8271f1d9a34 100644
--- a/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml
+++ b/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml
@@ -127,7 +127,7 @@ patternProperties:
contains:
# MI2S DAI ID range PRIMARY_MI2S_RX - QUATERNARY_MI2S_TX and
# QUINARY_MI2S_RX - QUINARY_MI2S_TX and
- # LPI_MI2S_RX_0 - SENARY_MI2S_TX
+ # LPI_MI2S_RX_0 - INT6_MI2S_TX
items:
oneOf:
- minimum: 16
@@ -135,7 +135,7 @@ patternProperties:
- minimum: 127
maximum: 128
- minimum: 137
- maximum: 148
+ maximum: 162
then:
required:
- qcom,sd-lines
diff --git a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
index 45850f2d4342..059f2ea1bd23 100644
--- a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
+++ b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
@@ -152,6 +152,20 @@
#define LPI_MI2S_TX_4 146
#define SENARY_MI2S_RX 147
#define SENARY_MI2S_TX 148
+#define INT0_MI2S_RX 149
+#define INT0_MI2S_TX 150
+#define INT1_MI2S_RX 151
+#define INT1_MI2S_TX 152
+#define INT2_MI2S_RX 153
+#define INT2_MI2S_TX 154
+#define INT3_MI2S_RX 155
+#define INT3_MI2S_TX 156
+#define INT4_MI2S_RX 157
+#define INT4_MI2S_TX 158
+#define INT5_MI2S_RX 159
+#define INT5_MI2S_TX 160
+#define INT6_MI2S_RX 161
+#define INT6_MI2S_TX 162
#define LPASS_CLK_ID_PRI_MI2S_IBIT 1
#define LPASS_CLK_ID_PRI_MI2S_EBIT 2
--
2.53.0
^ permalink raw reply related
* [PATCH v3 03/15] ASoC: dt-bindings: pm8916-wcd-analog-codec: Document pm8950/pm8953
From: Richard Acayan @ 2026-03-31 19:39 UTC (permalink / raw)
To: Srinivas Kandagatla, Liam Girdwood, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela, Takashi Iwai,
Mohammad Rafi Shaik, Konrad Dybcio, linux-sound, linux-arm-msm,
devicetree
Cc: Nickolay Goppen, Adam Skladowski, Vladimir Lypak,
Dmitry Baryshkov, Wesley Cheng, Greg Kroah-Hartman, Johan Hovold,
Kees Cook, Charles Keepax, Kuninori Morimoto, Richard Acayan
In-Reply-To: <20260331193939.40636-1-mailingradian@gmail.com>
From: Adam Skladowski <a39.skl@gmail.com>
Document pm8950 and pm8953 analog audio codecs.
Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
[richard: add back empty line]
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
---
.../bindings/sound/qcom,pm8916-wcd-analog-codec.yaml | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/sound/qcom,pm8916-wcd-analog-codec.yaml b/Documentation/devicetree/bindings/sound/qcom,pm8916-wcd-analog-codec.yaml
index 94e7a1860977..15389645a3e8 100644
--- a/Documentation/devicetree/bindings/sound/qcom,pm8916-wcd-analog-codec.yaml
+++ b/Documentation/devicetree/bindings/sound/qcom,pm8916-wcd-analog-codec.yaml
@@ -14,7 +14,10 @@ description:
properties:
compatible:
- const: qcom,pm8916-wcd-analog-codec
+ enum:
+ - qcom,pm8916-wcd-analog-codec
+ - qcom,pm8950-wcd-analog-codec
+ - qcom,pm8953-wcd-analog-codec
reg:
maxItems: 1
--
2.53.0
^ permalink raw reply related
* [PATCH v3 04/15] ASoC: dt-bindings: pm8916-analog-codec: Add PM660L compatible
From: Richard Acayan @ 2026-03-31 19:39 UTC (permalink / raw)
To: Srinivas Kandagatla, Liam Girdwood, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela, Takashi Iwai,
Mohammad Rafi Shaik, Konrad Dybcio, linux-sound, linux-arm-msm,
devicetree
Cc: Nickolay Goppen, Adam Skladowski, Vladimir Lypak,
Dmitry Baryshkov, Wesley Cheng, Greg Kroah-Hartman, Johan Hovold,
Kees Cook, Charles Keepax, Kuninori Morimoto, Richard Acayan
In-Reply-To: <20260331193939.40636-1-mailingradian@gmail.com>
The PM8916 analog codec is also found on PM660L, typically connected to
the SDM660 internal sound card via the digital codec. Provide a space
for specific compatibles and add the compatible for PM660L.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---
.../sound/qcom,pm8916-wcd-analog-codec.yaml | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/qcom,pm8916-wcd-analog-codec.yaml b/Documentation/devicetree/bindings/sound/qcom,pm8916-wcd-analog-codec.yaml
index 15389645a3e8..074a20cda89f 100644
--- a/Documentation/devicetree/bindings/sound/qcom,pm8916-wcd-analog-codec.yaml
+++ b/Documentation/devicetree/bindings/sound/qcom,pm8916-wcd-analog-codec.yaml
@@ -14,10 +14,16 @@ description:
properties:
compatible:
- enum:
- - qcom,pm8916-wcd-analog-codec
- - qcom,pm8950-wcd-analog-codec
- - qcom,pm8953-wcd-analog-codec
+ oneOf:
+ - items:
+ - enum:
+ - qcom,pm660l-wcd-analog-codec
+ - const: qcom,pm8916-wcd-analog-codec
+
+ - enum:
+ - qcom,pm8916-wcd-analog-codec
+ - qcom,pm8950-wcd-analog-codec
+ - qcom,pm8953-wcd-analog-codec
reg:
maxItems: 1
--
2.53.0
^ permalink raw reply related
* [PATCH v3 05/15] ASoC: dt-bindings: msm8916-digital-codec: Add SDM660 compatible
From: Richard Acayan @ 2026-03-31 19:39 UTC (permalink / raw)
To: Srinivas Kandagatla, Liam Girdwood, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela, Takashi Iwai,
Mohammad Rafi Shaik, Konrad Dybcio, linux-sound, linux-arm-msm,
devicetree
Cc: Nickolay Goppen, Adam Skladowski, Vladimir Lypak,
Dmitry Baryshkov, Wesley Cheng, Greg Kroah-Hartman, Johan Hovold,
Kees Cook, Charles Keepax, Kuninori Morimoto, Richard Acayan
In-Reply-To: <20260331193939.40636-1-mailingradian@gmail.com>
The MSM8916 digital codec is also found on SDM660, typically connected to
the SDM660 internal sound card. Provide a space
for specific compatibles and add the compatible for SDM660.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---
.../bindings/sound/qcom,msm8916-wcd-digital-codec.yaml | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/sound/qcom,msm8916-wcd-digital-codec.yaml b/Documentation/devicetree/bindings/sound/qcom,msm8916-wcd-digital-codec.yaml
index a899c4e7c1c9..33bc23b6176a 100644
--- a/Documentation/devicetree/bindings/sound/qcom,msm8916-wcd-digital-codec.yaml
+++ b/Documentation/devicetree/bindings/sound/qcom,msm8916-wcd-digital-codec.yaml
@@ -14,7 +14,13 @@ description:
properties:
compatible:
- const: qcom,msm8916-wcd-digital-codec
+ oneOf:
+ - items:
+ - enum:
+ - qcom,sdm660-wcd-digital-codec
+ - const: qcom,msm8916-wcd-digital-codec
+
+ - const: qcom,msm8916-wcd-digital-codec
reg:
maxItems: 1
--
2.53.0
^ permalink raw reply related
* [PATCH v3 06/15] ASoC: qdsp6: q6dsp-lpass-ports: add internal mi2s support
From: Richard Acayan @ 2026-03-31 19:39 UTC (permalink / raw)
To: Srinivas Kandagatla, Liam Girdwood, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela, Takashi Iwai,
Mohammad Rafi Shaik, Konrad Dybcio, linux-sound, linux-arm-msm,
devicetree
Cc: Nickolay Goppen, Adam Skladowski, Vladimir Lypak,
Dmitry Baryshkov, Wesley Cheng, Greg Kroah-Hartman, Johan Hovold,
Kees Cook, Charles Keepax, Kuninori Morimoto, Richard Acayan
In-Reply-To: <20260331193939.40636-1-mailingradian@gmail.com>
Add the internal MI2S stream capabilities as specified by the audio
kernel modules and configure the ports as MI2S ports.
Link: https://android.googlesource.com/kernel/msm-extra/+/530cffa4cc977a348753831b163eb9d3302b954a/asoc/msm-dai-q6-v2.c#4597
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
---
sound/soc/qcom/common.h | 2 +-
sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c | 200 +++++++++++++++++++++++
2 files changed, 201 insertions(+), 1 deletion(-)
diff --git a/sound/soc/qcom/common.h b/sound/soc/qcom/common.h
index ee6662885593..be693b53a4fa 100644
--- a/sound/soc/qcom/common.h
+++ b/sound/soc/qcom/common.h
@@ -7,7 +7,7 @@
#include <dt-bindings/sound/qcom,q6afe.h>
#include <sound/soc.h>
-#define LPASS_MAX_PORT (SENARY_MI2S_TX + 1)
+#define LPASS_MAX_PORT (INT6_MI2S_TX + 1)
int qcom_snd_parse_of(struct snd_soc_card *card);
int qcom_snd_wcd_jack_setup(struct snd_soc_pcm_runtime *rtd,
diff --git a/sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c b/sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c
index e5cd82f77b55..7006071f45a0 100644
--- a/sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c
+++ b/sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c
@@ -668,6 +668,205 @@ static struct snd_soc_dai_driver q6dsp_audio_fe_dais[] = {
Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_5),
Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_6),
Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_7),
+ {
+ .playback = {
+ .stream_name = "INT0 MI2S Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
+ SNDRV_PCM_RATE_192000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE |
+ SNDRV_PCM_FMTBIT_S24_3LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 192000,
+ },
+ .id = INT0_MI2S_RX,
+ .name = "INT0_MI2S_RX",
+ }, {
+ .capture = {
+ .stream_name = "INT0 MI2S Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT0_MI2S_TX,
+ .name = "INT0_MI2S_TX",
+ }, {
+ .playback = {
+ .stream_name = "INT1 MI2S Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE |
+ SNDRV_PCM_FMTBIT_S24_3LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT1_MI2S_RX,
+ .name = "INT1_MI2S_RX",
+ }, {
+ .capture = {
+ .stream_name = "INT1 MI2S Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT1_MI2S_TX,
+ .name = "INT1_MI2S_TX",
+ }, {
+ .playback = {
+ .stream_name = "INT2 MI2S Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE |
+ SNDRV_PCM_FMTBIT_S24_3LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT2_MI2S_RX,
+ .name = "INT2_MI2S_RX",
+ }, {
+ .capture = {
+ .stream_name = "INT2 MI2S Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT2_MI2S_TX,
+ .name = "INT2_MI2S_TX",
+ }, {
+ .playback = {
+ .stream_name = "INT3 MI2S Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE |
+ SNDRV_PCM_FMTBIT_S24_3LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT3_MI2S_RX,
+ .name = "INT3_MI2S_RX",
+ }, {
+ .capture = {
+ .stream_name = "INT3 MI2S Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT3_MI2S_TX,
+ .name = "INT3_MI2S_TX",
+ }, {
+ .playback = {
+ .stream_name = "INT4 MI2S Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+ SNDRV_PCM_RATE_192000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE |
+ SNDRV_PCM_FMTBIT_S24_3LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 192000,
+ },
+ .id = INT4_MI2S_RX,
+ .name = "INT4_MI2S_RX",
+ }, {
+ .capture = {
+ .stream_name = "INT4 MI2S Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT4_MI2S_TX,
+ .name = "INT4_MI2S_TX",
+ }, {
+ .playback = {
+ .stream_name = "INT5 MI2S Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE |
+ SNDRV_PCM_FMTBIT_S24_3LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT5_MI2S_RX,
+ .name = "INT5_MI2S_RX",
+ }, {
+ .capture = {
+ .stream_name = "INT5 MI2S Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT5_MI2S_TX,
+ .name = "INT5_MI2S_TX",
+ }, {
+ .playback = {
+ .stream_name = "INT6 MI2S Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE |
+ SNDRV_PCM_FMTBIT_S24_3LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT6_MI2S_RX,
+ .name = "INT6_MI2S_RX",
+ }, {
+ .capture = {
+ .stream_name = "INT6 MI2S Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 8,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .id = INT6_MI2S_TX,
+ .name = "INT6_MI2S_TX",
+ },
};
int q6dsp_audio_ports_of_xlate_dai_name(struct snd_soc_component *component,
@@ -712,6 +911,7 @@ struct snd_soc_dai_driver *q6dsp_audio_ports_set_config(struct device *dev,
case QUINARY_MI2S_RX ... QUINARY_MI2S_TX:
case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX:
case LPI_MI2S_RX_0 ... LPI_MI2S_TX_4:
+ case INT0_MI2S_RX ... INT6_MI2S_TX:
q6dsp_audio_fe_dais[i].ops = cfg->q6i2s_ops;
break;
case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
--
2.53.0
^ permalink raw reply related
* [PATCH v3 07/15] ASoC: qdsp6: q6afe: add internal mi2s support
From: Richard Acayan @ 2026-03-31 19:39 UTC (permalink / raw)
To: Srinivas Kandagatla, Liam Girdwood, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela, Takashi Iwai,
Mohammad Rafi Shaik, Konrad Dybcio, linux-sound, linux-arm-msm,
devicetree
Cc: Nickolay Goppen, Adam Skladowski, Vladimir Lypak,
Dmitry Baryshkov, Wesley Cheng, Greg Kroah-Hartman, Johan Hovold,
Kees Cook, Charles Keepax, Kuninori Morimoto, Richard Acayan
In-Reply-To: <20260331193939.40636-1-mailingradian@gmail.com>
Add the port mappings for internal MI2S, found on the Snapdragon 660
internal sound card.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
---
sound/soc/qcom/qdsp6/q6afe.c | 56 ++++++++++++++++++++++++++++++++++++
1 file changed, 56 insertions(+)
diff --git a/sound/soc/qcom/qdsp6/q6afe.c b/sound/soc/qcom/qdsp6/q6afe.c
index 40237267fda0..52d53bb21b7f 100644
--- a/sound/soc/qcom/qdsp6/q6afe.c
+++ b/sound/soc/qcom/qdsp6/q6afe.c
@@ -132,6 +132,20 @@
#define AFE_PORT_ID_QUINARY_MI2S_TX 0x1017
#define AFE_PORT_ID_SENARY_MI2S_RX 0x1018
#define AFE_PORT_ID_SENARY_MI2S_TX 0x1019
+#define AFE_PORT_ID_INT0_MI2S_RX 0x102e
+#define AFE_PORT_ID_INT0_MI2S_TX 0x102f
+#define AFE_PORT_ID_INT1_MI2S_RX 0x1030
+#define AFE_PORT_ID_INT1_MI2S_TX 0x1031
+#define AFE_PORT_ID_INT2_MI2S_RX 0x1032
+#define AFE_PORT_ID_INT2_MI2S_TX 0x1033
+#define AFE_PORT_ID_INT3_MI2S_RX 0x1034
+#define AFE_PORT_ID_INT3_MI2S_TX 0x1035
+#define AFE_PORT_ID_INT4_MI2S_RX 0x1036
+#define AFE_PORT_ID_INT4_MI2S_TX 0x1037
+#define AFE_PORT_ID_INT5_MI2S_RX 0x1038
+#define AFE_PORT_ID_INT5_MI2S_TX 0x1039
+#define AFE_PORT_ID_INT6_MI2S_RX 0x103a
+#define AFE_PORT_ID_INT6_MI2S_TX 0x103b
/* Start of the range of port IDs for TDM devices. */
#define AFE_PORT_ID_TDM_PORT_RANGE_START 0x9000
@@ -931,6 +945,34 @@ static struct afe_port_map port_maps[AFE_PORT_MAX] = {
[RX_CODEC_DMA_RX_7] = { AFE_PORT_ID_RX_CODEC_DMA_RX_7,
RX_CODEC_DMA_RX_7, 1, 1},
[USB_RX] = { AFE_PORT_ID_USB_RX, USB_RX, 1, 1},
+ [INT0_MI2S_RX] = { AFE_PORT_ID_INT0_MI2S_RX,
+ INT0_MI2S_RX, 1, 1},
+ [INT0_MI2S_TX] = { AFE_PORT_ID_INT0_MI2S_TX,
+ INT0_MI2S_RX, 0, 1},
+ [INT1_MI2S_RX] = { AFE_PORT_ID_INT1_MI2S_RX,
+ INT1_MI2S_RX, 1, 1},
+ [INT1_MI2S_TX] = { AFE_PORT_ID_INT1_MI2S_TX,
+ INT1_MI2S_RX, 0, 1},
+ [INT2_MI2S_RX] = { AFE_PORT_ID_INT2_MI2S_RX,
+ INT2_MI2S_RX, 1, 1},
+ [INT2_MI2S_TX] = { AFE_PORT_ID_INT2_MI2S_TX,
+ INT2_MI2S_RX, 0, 1},
+ [INT3_MI2S_RX] = { AFE_PORT_ID_INT3_MI2S_RX,
+ INT3_MI2S_RX, 1, 1},
+ [INT3_MI2S_TX] = { AFE_PORT_ID_INT3_MI2S_TX,
+ INT3_MI2S_RX, 0, 1},
+ [INT4_MI2S_RX] = { AFE_PORT_ID_INT4_MI2S_RX,
+ INT4_MI2S_RX, 1, 1},
+ [INT4_MI2S_TX] = { AFE_PORT_ID_INT4_MI2S_TX,
+ INT4_MI2S_RX, 0, 1},
+ [INT5_MI2S_RX] = { AFE_PORT_ID_INT5_MI2S_RX,
+ INT5_MI2S_RX, 1, 1},
+ [INT5_MI2S_TX] = { AFE_PORT_ID_INT5_MI2S_TX,
+ INT5_MI2S_RX, 0, 1},
+ [INT6_MI2S_RX] = { AFE_PORT_ID_INT6_MI2S_RX,
+ INT6_MI2S_RX, 1, 1},
+ [INT6_MI2S_TX] = { AFE_PORT_ID_INT6_MI2S_TX,
+ INT6_MI2S_RX, 0, 1},
};
static void q6afe_port_free(struct kref *ref)
@@ -1785,6 +1827,20 @@ struct q6afe_port *q6afe_port_get_from_id(struct device *dev, int id)
case AFE_PORT_ID_QUINARY_MI2S_TX:
case AFE_PORT_ID_SENARY_MI2S_RX:
case AFE_PORT_ID_SENARY_MI2S_TX:
+ case AFE_PORT_ID_INT0_MI2S_RX:
+ case AFE_PORT_ID_INT0_MI2S_TX:
+ case AFE_PORT_ID_INT1_MI2S_RX:
+ case AFE_PORT_ID_INT1_MI2S_TX:
+ case AFE_PORT_ID_INT2_MI2S_RX:
+ case AFE_PORT_ID_INT2_MI2S_TX:
+ case AFE_PORT_ID_INT3_MI2S_RX:
+ case AFE_PORT_ID_INT3_MI2S_TX:
+ case AFE_PORT_ID_INT4_MI2S_RX:
+ case AFE_PORT_ID_INT4_MI2S_TX:
+ case AFE_PORT_ID_INT5_MI2S_RX:
+ case AFE_PORT_ID_INT5_MI2S_TX:
+ case AFE_PORT_ID_INT6_MI2S_RX:
+ case AFE_PORT_ID_INT6_MI2S_TX:
cfg_type = AFE_PARAM_ID_I2S_CONFIG;
break;
case AFE_PORT_ID_PRIMARY_TDM_RX ... AFE_PORT_ID_QUINARY_TDM_TX_7:
--
2.53.0
^ permalink raw reply related
* [PATCH v3 08/15] ASoC: qdsp6: q6afe-dai: add internal mi2s support
From: Richard Acayan @ 2026-03-31 19:39 UTC (permalink / raw)
To: Srinivas Kandagatla, Liam Girdwood, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela, Takashi Iwai,
Mohammad Rafi Shaik, Konrad Dybcio, linux-sound, linux-arm-msm,
devicetree
Cc: Nickolay Goppen, Adam Skladowski, Vladimir Lypak,
Dmitry Baryshkov, Wesley Cheng, Greg Kroah-Hartman, Johan Hovold,
Kees Cook, Charles Keepax, Kuninori Morimoto, Richard Acayan
In-Reply-To: <20260331193939.40636-1-mailingradian@gmail.com>
Add the internal MI2S ports found on the SDM660 internal sound card.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
---
sound/soc/qcom/qdsp6/q6afe-dai.c | 46 ++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/sound/soc/qcom/qdsp6/q6afe-dai.c b/sound/soc/qcom/qdsp6/q6afe-dai.c
index a0d21034a626..34ec3bd3ea8c 100644
--- a/sound/soc/qcom/qdsp6/q6afe-dai.c
+++ b/sound/soc/qcom/qdsp6/q6afe-dai.c
@@ -412,6 +412,7 @@ static int q6afe_dai_prepare(struct snd_pcm_substream *substream,
case SENARY_MI2S_RX ... SENARY_MI2S_TX:
case QUINARY_MI2S_RX ... QUINARY_MI2S_TX:
case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX:
+ case INT0_MI2S_RX ... INT6_MI2S_TX:
rc = q6afe_i2s_port_prepare(dai_data->port[dai->id],
&dai_data->port_config[dai->id].i2s_cfg);
if (rc < 0) {
@@ -665,6 +666,21 @@ static const struct snd_soc_dapm_route q6afe_dapm_routes[] = {
/* USB playback AFE port receives data for playback, hence use the RX port */
{"USB Playback", NULL, "USB_RX"},
+
+ {"INT0 MI2S Playback", NULL, "INT0_MI2S_RX"},
+ {"INT0_MI2S_TX", NULL, "INT0 MI2S Capture"},
+ {"INT1 MI2S Playback", NULL, "INT1_MI2S_RX"},
+ {"INT1_MI2S_TX", NULL, "INT1 MI2S Capture"},
+ {"INT2 MI2S Playback", NULL, "INT2_MI2S_RX"},
+ {"INT2_MI2S_TX", NULL, "INT2 MI2S Capture"},
+ {"INT3 MI2S Playback", NULL, "INT3_MI2S_RX"},
+ {"INT3_MI2S_TX", NULL, "INT3 MI2S Capture"},
+ {"INT4 MI2S Playback", NULL, "INT4_MI2S_RX"},
+ {"INT4_MI2S_TX", NULL, "INT4 MI2S Capture"},
+ {"INT5 MI2S Playback", NULL, "INT5_MI2S_RX"},
+ {"INT5_MI2S_TX", NULL, "INT5 MI2S Capture"},
+ {"INT6 MI2S Playback", NULL, "INT6_MI2S_RX"},
+ {"INT6_MI2S_TX", NULL, "INT6 MI2S Capture"},
};
static int msm_dai_q6_dai_probe(struct snd_soc_dai *dai)
@@ -1011,6 +1027,35 @@ static const struct snd_soc_dapm_widget q6afe_dai_widgets[] = {
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("USB_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
+
+ SND_SOC_DAPM_AIF_IN("INT0_MI2S_RX", "NULL",
+ 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("INT0_MI2S_TX", "NULL",
+ 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("INT1_MI2S_RX", "NULL",
+ 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("INT1_MI2S_TX", "NULL",
+ 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("INT2_MI2S_RX", "NULL",
+ 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("INT2_MI2S_TX", "NULL",
+ 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("INT3_MI2S_RX", "NULL",
+ 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("INT3_MI2S_TX", "NULL",
+ 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("INT4_MI2S_RX", "NULL",
+ 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("INT4_MI2S_TX", "NULL",
+ 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("INT5_MI2S_RX", "NULL",
+ 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("INT5_MI2S_TX", "NULL",
+ 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("INT6_MI2S_RX", "NULL",
+ 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("INT6_MI2S_TX", "NULL",
+ 0, SND_SOC_NOPM, 0, 0),
};
static const struct snd_soc_component_driver q6afe_dai_component = {
@@ -1045,6 +1090,7 @@ static void of_q6afe_parse_dai_data(struct device *dev,
case SENARY_MI2S_RX ... SENARY_MI2S_TX:
case QUINARY_MI2S_RX ... QUINARY_MI2S_TX:
case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX:
+ case INT0_MI2S_RX ... INT6_MI2S_TX:
priv = &data->priv[id];
ret = of_property_read_variable_u32_array(node,
"qcom,sd-lines",
--
2.53.0
^ permalink raw reply related
* [PATCH v3 09/15] ASoC: qdsp6: q6routing: add internal mi2s support
From: Richard Acayan @ 2026-03-31 19:39 UTC (permalink / raw)
To: Srinivas Kandagatla, Liam Girdwood, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela, Takashi Iwai,
Mohammad Rafi Shaik, Konrad Dybcio, linux-sound, linux-arm-msm,
devicetree
Cc: Nickolay Goppen, Adam Skladowski, Vladimir Lypak,
Dmitry Baryshkov, Wesley Cheng, Greg Kroah-Hartman, Johan Hovold,
Kees Cook, Charles Keepax, Kuninori Morimoto, Richard Acayan
In-Reply-To: <20260331193939.40636-1-mailingradian@gmail.com>
Add the ASM-AFE routing for internal MI2S ports.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
---
sound/soc/qcom/qdsp6/q6routing.c | 78 +++++++++++++++++++++++++++++++-
1 file changed, 77 insertions(+), 1 deletion(-)
diff --git a/sound/soc/qcom/qdsp6/q6routing.c b/sound/soc/qcom/qdsp6/q6routing.c
index 7386226046fa..cfb953700f14 100644
--- a/sound/soc/qcom/qdsp6/q6routing.c
+++ b/sound/soc/qcom/qdsp6/q6routing.c
@@ -127,7 +127,14 @@
{ mix_name, "TX_CODEC_DMA_TX_2", "TX_CODEC_DMA_TX_2"}, \
{ mix_name, "TX_CODEC_DMA_TX_3", "TX_CODEC_DMA_TX_3"}, \
{ mix_name, "TX_CODEC_DMA_TX_4", "TX_CODEC_DMA_TX_4"}, \
- { mix_name, "TX_CODEC_DMA_TX_5", "TX_CODEC_DMA_TX_5"}
+ { mix_name, "TX_CODEC_DMA_TX_5", "TX_CODEC_DMA_TX_5"}, \
+ { mix_name, "INT0_MI2S_TX", "INT0_MI2S_TX" }, \
+ { mix_name, "INT1_MI2S_TX", "INT1_MI2S_TX" }, \
+ { mix_name, "INT2_MI2S_TX", "INT2_MI2S_TX" }, \
+ { mix_name, "INT3_MI2S_TX", "INT3_MI2S_TX" }, \
+ { mix_name, "INT4_MI2S_TX", "INT4_MI2S_TX" }, \
+ { mix_name, "INT5_MI2S_TX", "INT5_MI2S_TX" }, \
+ { mix_name, "INT6_MI2S_TX", "INT6_MI2S_TX" }
#define Q6ROUTING_TX_MIXERS(id) \
SOC_SINGLE_EXT("PRI_MI2S_TX", PRIMARY_MI2S_TX, \
@@ -320,6 +327,27 @@
id, 1, 0, msm_routing_get_audio_mixer, \
msm_routing_put_audio_mixer), \
SOC_SINGLE_EXT("TX_CODEC_DMA_TX_5", TX_CODEC_DMA_TX_5, \
+ id, 1, 0, msm_routing_get_audio_mixer, \
+ msm_routing_put_audio_mixer), \
+ SOC_SINGLE_EXT("INT0_MI2S_TX", INT0_MI2S_TX, \
+ id, 1, 0, msm_routing_get_audio_mixer, \
+ msm_routing_put_audio_mixer), \
+ SOC_SINGLE_EXT("INT1_MI2S_TX", INT1_MI2S_TX, \
+ id, 1, 0, msm_routing_get_audio_mixer, \
+ msm_routing_put_audio_mixer), \
+ SOC_SINGLE_EXT("INT2_MI2S_TX", INT2_MI2S_TX, \
+ id, 1, 0, msm_routing_get_audio_mixer, \
+ msm_routing_put_audio_mixer), \
+ SOC_SINGLE_EXT("INT3_MI2S_TX", INT3_MI2S_TX, \
+ id, 1, 0, msm_routing_get_audio_mixer, \
+ msm_routing_put_audio_mixer), \
+ SOC_SINGLE_EXT("INT4_MI2S_TX", INT4_MI2S_TX, \
+ id, 1, 0, msm_routing_get_audio_mixer, \
+ msm_routing_put_audio_mixer), \
+ SOC_SINGLE_EXT("INT5_MI2S_TX", INT5_MI2S_TX, \
+ id, 1, 0, msm_routing_get_audio_mixer, \
+ msm_routing_put_audio_mixer), \
+ SOC_SINGLE_EXT("INT6_MI2S_TX", INT6_MI2S_TX, \
id, 1, 0, msm_routing_get_audio_mixer, \
msm_routing_put_audio_mixer),
@@ -709,6 +737,26 @@ static const struct snd_kcontrol_new rxcodec_dma_rx_6_mixer_controls[] = {
static const struct snd_kcontrol_new rx_codec_dma_rx_7_mixer_controls[] = {
Q6ROUTING_RX_MIXERS(RX_CODEC_DMA_RX_7) };
+static const struct snd_kcontrol_new int0_mi2s_rx_mixer_controls[] = {
+ Q6ROUTING_RX_MIXERS(INT0_MI2S_RX) };
+
+static const struct snd_kcontrol_new int1_mi2s_rx_mixer_controls[] = {
+ Q6ROUTING_RX_MIXERS(INT1_MI2S_RX) };
+
+static const struct snd_kcontrol_new int2_mi2s_rx_mixer_controls[] = {
+ Q6ROUTING_RX_MIXERS(INT2_MI2S_RX) };
+
+static const struct snd_kcontrol_new int3_mi2s_rx_mixer_controls[] = {
+ Q6ROUTING_RX_MIXERS(INT3_MI2S_RX) };
+
+static const struct snd_kcontrol_new int4_mi2s_rx_mixer_controls[] = {
+ Q6ROUTING_RX_MIXERS(INT4_MI2S_RX) };
+
+static const struct snd_kcontrol_new int5_mi2s_rx_mixer_controls[] = {
+ Q6ROUTING_RX_MIXERS(INT5_MI2S_RX) };
+
+static const struct snd_kcontrol_new int6_mi2s_rx_mixer_controls[] = {
+ Q6ROUTING_RX_MIXERS(INT6_MI2S_RX) };
static const struct snd_kcontrol_new mmul1_mixer_controls[] = {
Q6ROUTING_TX_MIXERS(MSM_FRONTEND_DAI_MULTIMEDIA1) };
@@ -938,6 +986,27 @@ static const struct snd_soc_dapm_widget msm_qdsp6_widgets[] = {
SND_SOC_DAPM_MIXER("USB_RX Audio Mixer", SND_SOC_NOPM, 0, 0,
usb_rx_mixer_controls,
ARRAY_SIZE(usb_rx_mixer_controls)),
+ SND_SOC_DAPM_MIXER("INT0_MI2S_RX Audio Mixer", SND_SOC_NOPM, 0, 0,
+ int0_mi2s_rx_mixer_controls,
+ ARRAY_SIZE(int0_mi2s_rx_mixer_controls)),
+ SND_SOC_DAPM_MIXER("INT1_MI2S_RX Audio Mixer", SND_SOC_NOPM, 0, 0,
+ int1_mi2s_rx_mixer_controls,
+ ARRAY_SIZE(int1_mi2s_rx_mixer_controls)),
+ SND_SOC_DAPM_MIXER("INT2_MI2S_RX Audio Mixer", SND_SOC_NOPM, 0, 0,
+ int2_mi2s_rx_mixer_controls,
+ ARRAY_SIZE(int2_mi2s_rx_mixer_controls)),
+ SND_SOC_DAPM_MIXER("INT3_MI2S_RX Audio Mixer", SND_SOC_NOPM, 0, 0,
+ int3_mi2s_rx_mixer_controls,
+ ARRAY_SIZE(int3_mi2s_rx_mixer_controls)),
+ SND_SOC_DAPM_MIXER("INT4_MI2S_RX Audio Mixer", SND_SOC_NOPM, 0, 0,
+ int4_mi2s_rx_mixer_controls,
+ ARRAY_SIZE(int4_mi2s_rx_mixer_controls)),
+ SND_SOC_DAPM_MIXER("INT5_MI2S_RX Audio Mixer", SND_SOC_NOPM, 0, 0,
+ int5_mi2s_rx_mixer_controls,
+ ARRAY_SIZE(int5_mi2s_rx_mixer_controls)),
+ SND_SOC_DAPM_MIXER("INT6_MI2S_RX Audio Mixer", SND_SOC_NOPM, 0, 0,
+ int6_mi2s_rx_mixer_controls,
+ ARRAY_SIZE(int6_mi2s_rx_mixer_controls)),
SND_SOC_DAPM_MIXER("MultiMedia1 Mixer", SND_SOC_NOPM, 0, 0,
mmul1_mixer_controls, ARRAY_SIZE(mmul1_mixer_controls)),
SND_SOC_DAPM_MIXER("MultiMedia2 Mixer", SND_SOC_NOPM, 0, 0,
@@ -1031,6 +1100,13 @@ static const struct snd_soc_dapm_route intercon[] = {
Q6ROUTING_RX_DAPM_ROUTE("RX_CODEC_DMA_RX_6 Audio Mixer", "RX_CODEC_DMA_RX_6"),
Q6ROUTING_RX_DAPM_ROUTE("RX_CODEC_DMA_RX_7 Audio Mixer", "RX_CODEC_DMA_RX_7"),
Q6ROUTING_RX_DAPM_ROUTE("USB_RX Audio Mixer", "USB_RX"),
+ Q6ROUTING_RX_DAPM_ROUTE("INT0_MI2S_RX Audio Mixer", "INT0_MI2S_RX"),
+ Q6ROUTING_RX_DAPM_ROUTE("INT1_MI2S_RX Audio Mixer", "INT1_MI2S_RX"),
+ Q6ROUTING_RX_DAPM_ROUTE("INT2_MI2S_RX Audio Mixer", "INT2_MI2S_RX"),
+ Q6ROUTING_RX_DAPM_ROUTE("INT3_MI2S_RX Audio Mixer", "INT3_MI2S_RX"),
+ Q6ROUTING_RX_DAPM_ROUTE("INT4_MI2S_RX Audio Mixer", "INT4_MI2S_RX"),
+ Q6ROUTING_RX_DAPM_ROUTE("INT5_MI2S_RX Audio Mixer", "INT5_MI2S_RX"),
+ Q6ROUTING_RX_DAPM_ROUTE("INT6_MI2S_RX Audio Mixer", "INT6_MI2S_RX"),
Q6ROUTING_TX_DAPM_ROUTE("MultiMedia1 Mixer"),
Q6ROUTING_TX_DAPM_ROUTE("MultiMedia2 Mixer"),
Q6ROUTING_TX_DAPM_ROUTE("MultiMedia3 Mixer"),
--
2.53.0
^ permalink raw reply related
* [PATCH v3 10/15] ASoC: qdsp6: common: support headphone jacks connected to internal mi2s
From: Richard Acayan @ 2026-03-31 19:39 UTC (permalink / raw)
To: Srinivas Kandagatla, Liam Girdwood, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela, Takashi Iwai,
Mohammad Rafi Shaik, Konrad Dybcio, linux-sound, linux-arm-msm,
devicetree
Cc: Nickolay Goppen, Adam Skladowski, Vladimir Lypak,
Dmitry Baryshkov, Wesley Cheng, Greg Kroah-Hartman, Johan Hovold,
Kees Cook, Charles Keepax, Kuninori Morimoto, Richard Acayan
In-Reply-To: <20260331193939.40636-1-mailingradian@gmail.com>
Internal MI2S ports are connected to a WCD codec which may support
headphones. Register the headphone jack on codecs connected to the
playback port, INT_MI2S_RX.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
---
sound/soc/qcom/common.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/sound/soc/qcom/common.c b/sound/soc/qcom/common.c
index cf1f3a767cee..7e2a8745594d 100644
--- a/sound/soc/qcom/common.c
+++ b/sound/soc/qcom/common.c
@@ -232,6 +232,7 @@ int qcom_snd_wcd_jack_setup(struct snd_soc_pcm_runtime *rtd,
}
switch (cpu_dai->id) {
+ case INT0_MI2S_RX:
case TX_CODEC_DMA_TX_0:
case TX_CODEC_DMA_TX_1:
case TX_CODEC_DMA_TX_2:
--
2.53.0
^ permalink raw reply related
* [PATCH v3 11/15] ASoC: qcom: sm8250: add support for INT0_MI2S_RX and INT3_MI2S_TX
From: Richard Acayan @ 2026-03-31 19:39 UTC (permalink / raw)
To: Srinivas Kandagatla, Liam Girdwood, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela, Takashi Iwai,
Mohammad Rafi Shaik, Konrad Dybcio, linux-sound, linux-arm-msm,
devicetree
Cc: Nickolay Goppen, Adam Skladowski, Vladimir Lypak,
Dmitry Baryshkov, Wesley Cheng, Greg Kroah-Hartman, Johan Hovold,
Kees Cook, Charles Keepax, Kuninori Morimoto, Richard Acayan
In-Reply-To: <20260331193939.40636-1-mailingradian@gmail.com>
The INT0_MI2S_RX and INT3_MI2S_TX ports on SDM660 can be connected to
the digital and analog WCD codecs. They can be supported with the same
logic for other ports, but just need to be explicitly stated. Add
support for these ports.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
---
sound/soc/qcom/sm8250.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/sound/soc/qcom/sm8250.c b/sound/soc/qcom/sm8250.c
index f193d0ba63d0..b8f1c91725df 100644
--- a/sound/soc/qcom/sm8250.c
+++ b/sound/soc/qcom/sm8250.c
@@ -112,6 +112,22 @@ static int sm8250_snd_startup(struct snd_pcm_substream *substream)
snd_soc_dai_set_fmt(cpu_dai, fmt);
snd_soc_dai_set_fmt(codec_dai, codec_dai_fmt);
break;
+ case INT0_MI2S_RX:
+ codec_dai_fmt |= SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_I2S;
+ snd_soc_dai_set_sysclk(cpu_dai,
+ Q6AFE_LPASS_CLK_ID_INT0_MI2S_IBIT,
+ MI2S_BCLK_RATE, SNDRV_PCM_STREAM_PLAYBACK);
+ snd_soc_dai_set_fmt(cpu_dai, fmt);
+ snd_soc_dai_set_fmt(codec_dai, codec_dai_fmt);
+ break;
+ case INT3_MI2S_TX:
+ codec_dai_fmt |= SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_I2S;
+ snd_soc_dai_set_sysclk(cpu_dai,
+ Q6AFE_LPASS_CLK_ID_INT3_MI2S_IBIT,
+ MI2S_BCLK_RATE, SNDRV_PCM_STREAM_PLAYBACK);
+ snd_soc_dai_set_fmt(cpu_dai, fmt);
+ snd_soc_dai_set_fmt(codec_dai, codec_dai_fmt);
+ break;
default:
break;
}
--
2.53.0
^ permalink raw reply related
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