* [PATCH v10 09/22] dt-bindings: media: i2c: max96712: add support for MAX96724F/R
From: Dumitru Ceclan via B4 Relay @ 2026-04-06 20:14 UTC (permalink / raw)
To: Tomi Valkeinen, Mauro Carvalho Chehab, Sakari Ailus,
Laurent Pinchart, Julien Massot, Rob Herring,
Niklas Söderlund, Greg Kroah-Hartman, Cosmin Tanislav
Cc: mitrutzceclan, linux-media, linux-kernel, devicetree,
linux-staging, linux-gpio, Niklas Söderlund, Martin Hecht,
Cosmin Tanislav
In-Reply-To: <20260406-gmsl2-3_serdes-v10-0-645560fedca5@analog.com>
From: Cosmin Tanislav <demonsingur@gmail.com>
MAX96724F/MAX96724R are a lower capability variant of the MAX96724 which
only support a fixed rate of 3Gbps in the forward direction.
Signed-off-by: Cosmin Tanislav <demonsingur@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
Documentation/devicetree/bindings/media/i2c/maxim,max96712.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/i2c/maxim,max96712.yaml b/Documentation/devicetree/bindings/media/i2c/maxim,max96712.yaml
index d2dd72f2e924..161d40acdd28 100644
--- a/Documentation/devicetree/bindings/media/i2c/maxim,max96712.yaml
+++ b/Documentation/devicetree/bindings/media/i2c/maxim,max96712.yaml
@@ -23,12 +23,17 @@ description: |
MAX96712 can be paired with first-generation 3.12Gbps or 1.5Gbps GMSL1
serializers or operate up to 3.12Gbps with GMSL2 serializers in GMSL1 mode.
+ MAX96724F and MAX96724R only support a fixed rate of 3Gbps in the forward
+ direction.
+
properties:
compatible:
items:
- enum:
- maxim,max96712
- maxim,max96724
+ - maxim,max96724f
+ - maxim,max96724r
reg:
description: I2C device address
--
2.51.0
^ permalink raw reply related
* [PATCH v10 08/22] dt-bindings: media: i2c: max96712: add support for POC supplies
From: Dumitru Ceclan via B4 Relay @ 2026-04-06 20:14 UTC (permalink / raw)
To: Tomi Valkeinen, Mauro Carvalho Chehab, Sakari Ailus,
Laurent Pinchart, Julien Massot, Rob Herring,
Niklas Söderlund, Greg Kroah-Hartman, Cosmin Tanislav
Cc: mitrutzceclan, linux-media, linux-kernel, devicetree,
linux-staging, linux-gpio, Niklas Söderlund, Martin Hecht,
Cosmin Tanislav
In-Reply-To: <20260406-gmsl2-3_serdes-v10-0-645560fedca5@analog.com>
From: Cosmin Tanislav <demonsingur@gmail.com>
The GMSL links can carry power to the serializer when using coaxial
cables.
Document this capability.
Signed-off-by: Cosmin Tanislav <demonsingur@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
Documentation/devicetree/bindings/media/i2c/maxim,max96712.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/i2c/maxim,max96712.yaml b/Documentation/devicetree/bindings/media/i2c/maxim,max96712.yaml
index abacc3c874a9..d2dd72f2e924 100644
--- a/Documentation/devicetree/bindings/media/i2c/maxim,max96712.yaml
+++ b/Documentation/devicetree/bindings/media/i2c/maxim,max96712.yaml
@@ -95,6 +95,10 @@ properties:
- required: [port@6]
- required: [port@7]
+patternProperties:
+ '^port[0-3]-poc-supply$':
+ description: Regulator providing Power over Coax for GMSL ports
+
required:
- compatible
- reg
--
2.51.0
^ permalink raw reply related
* [PATCH v10 07/22] dt-bindings: media: i2c: max96712: add support for I2C ATR
From: Dumitru Ceclan via B4 Relay @ 2026-04-06 20:14 UTC (permalink / raw)
To: Tomi Valkeinen, Mauro Carvalho Chehab, Sakari Ailus,
Laurent Pinchart, Julien Massot, Rob Herring,
Niklas Söderlund, Greg Kroah-Hartman, Cosmin Tanislav
Cc: mitrutzceclan, linux-media, linux-kernel, devicetree,
linux-staging, linux-gpio, Niklas Söderlund, Martin Hecht,
Cosmin Tanislav
In-Reply-To: <20260406-gmsl2-3_serdes-v10-0-645560fedca5@analog.com>
From: Cosmin Tanislav <demonsingur@gmail.com>
MAX96712 and MAX96724 have more than one GMSL2 link, and each link is
capable of connecting to a separate serializer. If these serializers
have the same CFG pins configuration, they will also have the same I2C
address, causing conflicts unless the deserializer changes the address
of the connected serializers.
The MAX96712 and MAX96724 support changing the I2C address of the
connected serializers.
Document this capability.
Signed-off-by: Cosmin Tanislav <demonsingur@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
---
.../bindings/media/i2c/maxim,max96712.yaml | 31 ++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/i2c/maxim,max96712.yaml b/Documentation/devicetree/bindings/media/i2c/maxim,max96712.yaml
index 583bbd60157c..abacc3c874a9 100644
--- a/Documentation/devicetree/bindings/media/i2c/maxim,max96712.yaml
+++ b/Documentation/devicetree/bindings/media/i2c/maxim,max96712.yaml
@@ -36,6 +36,30 @@ properties:
enable-gpios: true
+ i2c-alias-pool:
+ maxItems: 4
+
+ i2c-atr:
+ type: object
+ additionalProperties: false
+
+ properties:
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+ patternProperties:
+ '^i2c@[0-3]$':
+ $ref: /schemas/i2c/i2c-controller.yaml#
+ unevaluatedProperties: false
+ properties:
+ reg:
+ items:
+ minimum: 0
+ maximum: 3
+
ports:
$ref: /schemas/graph.yaml#/properties/ports
@@ -78,6 +102,13 @@ required:
additionalProperties: false
+allOf:
+ - $ref: /schemas/i2c/i2c-atr.yaml#
+
+dependentRequired:
+ i2c-atr: [i2c-alias-pool]
+ i2c-alias-pool: [i2c-atr]
+
examples:
- |
#include <dt-bindings/gpio/gpio.h>
--
2.51.0
^ permalink raw reply related
* [PATCH v10 05/22] dt-bindings: media: i2c: max96717: add support for MAX96793
From: Dumitru Ceclan via B4 Relay @ 2026-04-06 20:14 UTC (permalink / raw)
To: Tomi Valkeinen, Mauro Carvalho Chehab, Sakari Ailus,
Laurent Pinchart, Julien Massot, Rob Herring,
Niklas Söderlund, Greg Kroah-Hartman, Cosmin Tanislav
Cc: mitrutzceclan, linux-media, linux-kernel, devicetree,
linux-staging, linux-gpio, Niklas Söderlund, Martin Hecht,
Cosmin Tanislav
In-Reply-To: <20260406-gmsl2-3_serdes-v10-0-645560fedca5@analog.com>
From: Cosmin Tanislav <demonsingur@gmail.com>
MAX96793 is a newer variant of the MAX96717 which also supports GMSL3
links.
Document this compatibility.
Signed-off-by: Cosmin Tanislav <demonsingur@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
---
Documentation/devicetree/bindings/media/i2c/maxim,max96717.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/i2c/maxim,max96717.yaml b/Documentation/devicetree/bindings/media/i2c/maxim,max96717.yaml
index bbb38b3de7df..0d53637a6991 100644
--- a/Documentation/devicetree/bindings/media/i2c/maxim,max96717.yaml
+++ b/Documentation/devicetree/bindings/media/i2c/maxim,max96717.yaml
@@ -29,6 +29,8 @@ description:
MAX9295A only supports pixel mode.
+ MAX96793 also supports GMSL3 mode.
+
properties:
compatible:
oneOf:
@@ -38,6 +40,7 @@ properties:
- items:
- enum:
- maxim,max96717
+ - maxim,max96793
- const: maxim,max96717f
'#gpio-cells':
--
2.51.0
^ permalink raw reply related
* [PATCH v10 06/22] dt-bindings: media: i2c: max96712: use pattern properties for ports
From: Dumitru Ceclan via B4 Relay @ 2026-04-06 20:14 UTC (permalink / raw)
To: Tomi Valkeinen, Mauro Carvalho Chehab, Sakari Ailus,
Laurent Pinchart, Julien Massot, Rob Herring,
Niklas Söderlund, Greg Kroah-Hartman, Cosmin Tanislav
Cc: mitrutzceclan, linux-media, linux-kernel, devicetree,
linux-staging, linux-gpio, Niklas Söderlund, Martin Hecht,
Cosmin Tanislav
In-Reply-To: <20260406-gmsl2-3_serdes-v10-0-645560fedca5@analog.com>
From: Cosmin Tanislav <demonsingur@gmail.com>
The MAX96712 and MAX96724 support up to 4 separate PHYs, depending on
the selected PHY configuration. Use patternProperties to document this.
The input ports are all the same, use patternProperties for them.
Signed-off-by: Cosmin Tanislav <demonsingur@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
.../bindings/media/i2c/maxim,max96712.yaml | 29 ++++++++--------------
1 file changed, 10 insertions(+), 19 deletions(-)
diff --git a/Documentation/devicetree/bindings/media/i2c/maxim,max96712.yaml b/Documentation/devicetree/bindings/media/i2c/maxim,max96712.yaml
index 26f85151afbd..583bbd60157c 100644
--- a/Documentation/devicetree/bindings/media/i2c/maxim,max96712.yaml
+++ b/Documentation/devicetree/bindings/media/i2c/maxim,max96712.yaml
@@ -39,27 +39,15 @@ properties:
ports:
$ref: /schemas/graph.yaml#/properties/ports
- properties:
- port@0:
+ patternProperties:
+ '^port@[0-3]$':
$ref: /schemas/graph.yaml#/properties/port
- description: GMSL Input 0
+ description: GMSL Input ports 0-3
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: GMSL Input 1
-
- port@2:
- $ref: /schemas/graph.yaml#/properties/port
- description: GMSL Input 2
-
- port@3:
- $ref: /schemas/graph.yaml#/properties/port
- description: GMSL Input 3
-
- port@4:
+ '^port@[4-7]$':
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
- description: CSI-2 Output
+ description: CSI-2 Output port 0-3
properties:
endpoint:
@@ -77,8 +65,11 @@ properties:
- data-lanes
- bus-type
- required:
- - port@4
+ anyOf:
+ - required: [port@4]
+ - required: [port@5]
+ - required: [port@6]
+ - required: [port@7]
required:
- compatible
--
2.51.0
^ permalink raw reply related
* [PATCH v10 00/22] media: i2c: add Maxim GMSL2/3 serializer and deserializer drivers
From: Dumitru Ceclan via B4 Relay @ 2026-04-06 20:14 UTC (permalink / raw)
To: Tomi Valkeinen, Mauro Carvalho Chehab, Sakari Ailus,
Laurent Pinchart, Julien Massot, Rob Herring,
Niklas Söderlund, Greg Kroah-Hartman, Cosmin Tanislav
Cc: mitrutzceclan, linux-media, linux-kernel, devicetree,
linux-staging, linux-gpio, Niklas Söderlund, Martin Hecht,
Tomi Valkeinen, Cosmin Tanislav, Vivekananda Dayananda,
Dumitru Ceclan, Cory Keitz
This series adds new drivers for multiple Maxim GMSL2 and GMSL3 devices,
replacing the few GMSL2 drivers already in upstream, and introducing a
common framework that can be used to implement such GMSL chips, which
avoids code duplication while also adding support for previously
unsupported features.
While the normally acceptable and polite way would be to extend the
current mainline drivers, the choice was made here to add a totally new
set of drivers. The current drivers support only a small subset of the
possible features, and only a few devices, so the end result after
extending them would in any case be essentially fully rewritten, new
drivers.
This series depends on support for internal pads, for which a patch has
been added.
The previous version is at:
v9: https://lore.kernel.org/r/20260311-gmsl2-3_serdes-v9-0-41499f09004f@analog.com
Since the previous series, Cosmin has left Analog Devices.
Because included changes from previous version are trivial, his sign-off
and tags were retained.
The following deserializers are supported:
* MAX96712 (already exists in staging)
* MAX96714 (already exists)
* MAX96714F (already exists)
* MAX96714R (GMSL2)
* MAX96716 (GMSL2)
* MAX96724 (already exists as part of existing MAX96712 driver)
* MAX96724F (GMSL2)
* MAX96724R (GMSL2)
* MAX9296A (GMSL2)
* MAX96792A (GMSL3)
The following serializers are supported:
* MAX96717 (already exists)
* MAX9295A (GMSL2)
* MAX96793 (GMSL3)
The following list enumerates new features that are supported by the
common framework and their respective chip-specific drivers:
* Full Streams API support. Most deserializers have support for more
than one link, and more than one PHY. Streams support allows
configuration of routing between these links and PHYs.
* .get_frame_desc() support. Both the serializers and deserializers
implement this to query and provide frame descriptor data. This is
used in features explained in-depth below.
* .get_mbus_config() support. The deserializers implement this to allow
upstream devices to query the link frequency of its pads.
* Address translation with I2C ATR for the serializers.
* I2C ATR translation - some deserializers cannot do muxing since I2C
communication channel masking is not available per-link, and the only
other way to select links is to turn them off, causing link resets.
For such cases, I2C ATR is used to change the address of the
serializers at probe time.
* Automatic GMSL link version negotiation between GMSL3, GMSL2 6Gbps, GMSL2
3Gbps.
* Automatic stream id selection for deserializers which need serializers to
stream on unique stream ids.
* Automatic VC remapping on the deserializers. VCs are picked so that
if they were unique on the sink pad, they will end up as unique on
the source pad they are routed to too, prioritizing using the same
VC ID as the sink pad, to facilitate the possibility of using tunnel
mode.
* Automatic pixel mode / tunnel mode selection. Tunnel mode is used
when VC IDs do not need to be changed and all hardware supports
tunnel mode, otherwise, pixel mode is used. The serializers are
automatically switched between the two by using a private API.
* Automatic double mode selection. In pixel mode, double mode can be
used to pack two pixels into a single data unit, optimizing bandwidth
usage. The serializers are automatically set up to support the double
modes determined by the deserializers using a private API.
* Automatic data padding. In pixel mode, if the data being transferred
uses two different BPPs, data needs to be padded. The serializers
automatically set this up depending on the configured double mode
settings and incoming data types.
* Logging. Both the deserializers and serializers implement the V4L2
.log_status() ops to allow debugging of the internal state and
important chip status registers.
* PHY modes. Deserializer chips commonly have more than a single PHY.
The firmware ports are parsed to determine the modes in which to
configure the PHYs (2x4, 4x2, 1x4+2x2, 2x2+1x4, and variations using
fewer lanes).
* Serializer pinctrl. Serializers implement pinctrl to allow setting
configs which would otherwise be inaccessible through GPIO: TX/RX via
GMSL link, pull-up & pull-down (with strength), open-drain &
push-pull, slew rate, RCLK pin selection.
* TPG with selectable formats, resolutions and framerates for both
serializers and deserializers.
The drivers have been tested on the following hardware combinations, but
further testing is welcome to ensure no / minimal breakage:
* Raspberry Pi 5 + MAX9296A + 2xMAX96717 + 2xIMX219
* Raspberry Pi 5 + MAX96714 + 1xMAX96717 + 1xIMX219
* Raspberry Pi 5 + MAX96716A + 2xMAX96717 + 2xIMX219
* Raspberry Pi 5 + MAX96712 + 4xMAX96717 + 4xIMX219
* Raspberry Pi 5 + MAX96724 + 4xMAX96717 + 4xIMX219
* Raspberry Pi 5 + MAX96792A + 1xMAX96793 + 1xMAX96717 + 2xIMX219
* Raspberry Pi 5 + MAX96792A + 2xMAX96717 + 2xIMX219
* Renesas V4H + MAX96712 + 2xMAX96717 + 2xIMX219
Analog Devices is taking responsibility for the maintenance of these
drivers and common framework, and plans to add support for new
broad-market chips on top of them.
Special thanks go to Tomi Valkeinen <
tomi.valkeinen+renesas@ideasonboard.com>
for testing the drivers, helping debug and coming up with ideas /
implementations for various features.
v10:
* dt-bindings: add control-channel property
* max96724: add configurable control-channel port selection
* max-ser/max-des: fix VIDIOC_SUBDEV_G/S_FMT, detect ~0U format
(v4l2-test-subdevs.cpp:448: s_fmt.format.code == ~0U)
* max-ser/max-des: fix VIDIOC_SUBDEV_G/S_FRAME_INTERVAL fail:
add max_(ser/des)_get_frame_interval returning -ENOTTY
for non-TPG pads and streams
(v4l2-test-subdevs.cpp:302: node->enum_frame_interval_pad != (int)pad)
V9:
* split max_des_ops into *_info and *_ops
* use read_poll_timeout macro in *_wait_for_device()
* return read_poll_timeout error -ETIMEDOUT in *_wait_for_device()
* remove use_atr duplicate from max9296a_chip_info, present in max_des_info
* fix max9296a DPLL register offset
* fix C-PHY DPLL frequency in max9296a and max96724
reported by: Cory Keitz <ckeitz@amazon.com>
* use MAX9296A_COMMON_INFO and MAX9296A_COMMON_OPS to simplify
probe ops init
* fix borked patches in previous version, actually remove MAX96717 and
MAX96714 drivers
V8:
* max96717: use the renamed PIN_CONFIG_OUTPUT to _LEVEL
* max96717: use the renamed set_rv ops from struct gpio_chip
* dt-bindings: set minItems lane-polarities to 2
* dt-bindings: "add myself as maintainer" commits were removed
* max_des & max_ser: use a default format for set_routing
* max_des & max_ser: return ENNOTTY in *_frame_interval for non-TPG pads
V7:
* dt-bindings: max9296a: use full max96717 compatible
* max9296a: make max96714_rlms_reg_sequence static
* explicitly include linux/bitfield.h
* explicitly depend on I2C and PINCTRL
* sort media_entity_operations
* add has_pad_interdep to media_entity_operations
V6:
* max9296a: put rlms sequence in max9296a_chip_info
* max_des: reflow stream id a comment
* max_ser: remove exported symbols not used in other modules
* max_ser: init mode to a supported value
* add default routing
* MAX_SERDES_GMSL_3 -> MAX_SERDES_GMSL_3_12GBPS
* guard reg_read/write with CONFIG_VIDEO_ADV_DEBUG
* put exported symbols in MAXIM_SERDES namespace
V5:
* dt-bindings: max96717: restrict RCLKOUT to pins 2 & 4
* dt-bindings: max96717: remove confusing rclksel pinconf property
* dt-bindings: max96717: remove maxim,gmsl-tx/rx pinconf property
* dt-bindings: max96717: remove gmsl prefix from maxim,gmsl-tx-id/rx-id
* dt-bindings: max96717: remove minimum: 0
* dt-bindings: max96717: better document slew-rate
* dt-bindings: max96717: better document maxim,jitter-compensation
* dt-bindings: max96717: better document maxim,tx-id/rx-id
* max_serdes: add default TPG values
* max_serdes: remove MAX_MIPI_FMT macro
* max_serdes: EXPORT_SYMBOL -> EXPORT_SYMBOL_GPL
* max_serdes: remove EXPORT_SYMBOL_GPL from symbols not used in other
modules
* max_serdes: rename symbols/macros/types to have max_serdes prefix
* max_serdes: slim down TPG functions
* max_des: fix may be used uninitialized errors
* max_des: fix misplaced TPG validation
* max_des: fix setting pipe PHY in tunnel mode for chips that support
both set_pipe_phy() and set_pipe_tunnel_phy()
* max_des: move doubled_bpp/sink_bpps variables to usage place
* max_des: do not dynamically control PHY enable, letting lanes be in
LP-11 when not streaming
* max_des: refactor get/set_pipe_stream_id() logic
* max_des: remove explicit ret = 0
* max_ser: make VC remaps not pipe-specific, allocate dynamically
* max9296a: add missing 1080p30 TPG entry
* max9296a: move BIT() left shift into macro
* max9296a: move BIT() ternary into macro
* max9296a: reuse max_des_ops for chip-specific ops\
* max9296a: document and compress RLMS register writes
* max96717: restrict RCLKOUT to pins 2 & 4 because of hardware
capabilities
* max96717: add support for XTAL/1, XTAL/2, XTAL/4 clocks
* max96717: set RX_EN/TX_EN automatically
* max96717: reorder custom pinconf flags
* max96717: drop OF dependency
* drop of_match_ptr
* re-do some indentation
* implement TPG pattern control
* remove pr_info() usage
* inline lane polarity val = 0
* inline returns
* rewrite some Kconfig docs
* split up patches for easier review
V4:
* max_des: fix infinite version loop
* max_des: fix pipe link id when there are more pipes than links
* max_des: implement setting pipe link
* max_des: do not pass routing to phy update
* max_des: move GMSL version strings to max_serdes
* max_des: split finding existing VC remap from adding a new one
* max_des: add tracking for in-use pipes
* max_des: skip unused pipes when finding / setting pixel/tunnel mode
* max_des: simplify remap code
* max_des: split set_pipe_phy() into set_pipe_tunnel_phy()
* max_ser: clean up i2c_xlates printing
* max_ser: fix changing serializer address
* max_ser: move non-continuous mode check into max96717 driver
* max96724: use regmap_set_bits for STREAM_SEL_ALL
* max96724: match surrounding indent for MAX96724_PHY1_ALT_CLOCK
* max96724: fix setting invalid PHY to 1 when PHY 0 is in 4-lane mode
* max96724: remove support for setting pipe phy from max96712
* max96724: fix setting double mode on pipes 4-7
* max96724: drop powerdown gpios
* max96717: use gpio_chip's set_rv
* max9296a: switch versions to unsigned int
* max9296a: remove parantheses from MAX9296A_MIPI_PHY18/20
* max9296a: fix printing of PHY packet counts
* max9296a: fix phy_hw_ids size
* remove usage of cammel case in defines
* move field_get/prep to max_serdes.h
* rework stream id setup
* rework tunnel/pixel mode finding
* rework bpps retrieval
* pass whole subdev state around
* add helper for retrieving a route's hw components / frame desc
* update pipe enable based on active routes
* add support for tunnel-only chips and VC remaps in tunnel mode
* simplify max_get_streams_masks()
* add support for TPG
V3:
* dt-bindings: drop reflow text patches
* dt-bindings: max96717: move pinctrl configuration into main file
* dt-bindings: max96717: allow a single level of pins configuration
* dt-bindings: max96717: use regex for matching pins nodes
* dt-bindings: max96717: drop extra allOf in pinctrl configuration
* dt-bindings: max96717: fix i2c-atr channel name regex
* dt-bindings: max96717: limit pinctrl functions to gpio / rclkout
* dt-bindings: max96717: limit pins for gpio / rclkout
* dt-bindings: max96717: add description for bias-pull-up/down
* dt-bindings: max96717: require pins and function properties
* dt-bindings: max96717: turn single compatible strings into an enum
* dt-bindings: max9296a: include indices in port descriptions
* dt-bindings: max9296a: remove property-less schema from input ports
* dt-bindings: max9296a: use ATR for MAX96716A too, removing MUX entirely
* dt-bindings: max96712: include indices in port descriptions
* dt-bindings: max96712: deprecate enable-gpios in favor of powerdown-gpios
* dt-bindings: max96712: switch from MUX to ATR
* dt-bindings: max96714: add support for MAX96714R
* max_des: fix POC NULL check
* max_des: remove index var in POC enable
* max_des: fix writing empty remaps
* max_des: skip mode setting in tunnel mode
* max_des: remove a duplicate source->sd NULL check
* max_des: set pipe tunnel mode even for disabled links
* max_ser: apply TX ID changes irrespective of serializer ID
* max9296a: fix typo in BACKTOP22
* max9296a: make register macros more consistent
* max9296a: switch MAX96716 from MUX to ATR
* max9296a: deduplicate max9296a_phy_id() logic
* max9296a: use proper PHY id in remaps
* max9296a: fix DPLL reset clear
* max9296a: limit MAX96714F to GMSL2 3Gbps
* max9296a: add support for MAX96714R
* max9296a: do not write GMSL3 link select registers in GMSL2 devices
* max9296a: use field_prep when setting RX_RATE
* max9296a: simplify setting SEL_STREAM for MAX96714
* max9296a: max96716_set_pipe_phy -> max96716a_set_pipe_phy
* max9296a: fix off-by-one in lane polarity when using
polarity_on_physical_lanes
* max96724: fix typo in BACKTOP22
* max96724: switch from MUX to ATR
* max96724: add support for powerdown GPIO
* max96724: remove support for tunneling from MAX96712
* max96724: only set tunnel-related bits when in tunnel mode
* max96724: add support for MAX96724F/R
* max96724: oneshot reset links after link selection
* remove GMSL2 version defaults, set all supported versions explicitly
* reorder GMSL versions to start from 0
* add support for GMSL2 3Gbps
* support GMSL version finding for devices using MUX / GATE
* add support for deserializers which don't have individual control
of each link's GMSL version
* add support for deserializers that need unique stream ids across all
serializers
* select_link_version -> set_link_version
* select_resets_link -> use_atr
V2:
* add missing compatible for MAX96717F
* fix embarrassing dt-bindings mistakes
* move MAX9296A/MAX96716/MAX96792A to a separate file as they have two
links / PHYs, and adding those conditionally seems impossible
---
To: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
To: Mauro Carvalho Chehab <mchehab@kernel.org>
To: Sakari Ailus <sakari.ailus@linux.intel.com>
To: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Julien Massot <julien.massot@collabora.com>
To: Rob Herring <robh@kernel.org>
To: Niklas Söderlund <niklas.soderlund@ragnatech.se>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: Cosmin Tanislav <cosmin.tanislav@analog.com>
Cc: mitrutzceclan@gmail.com
Cc: linux-media@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-staging@lists.linux.dev
Cc: linux-gpio@vger.kernel.org
Cc: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Cc: Martin Hecht <Martin.Hecht@avnet.eu>
---
Cosmin Tanislav (20):
dt-bindings: media: i2c: max96717: add support for I2C ATR
dt-bindings: media: i2c: max96717: add support for pinctrl/pinconf
dt-bindings: media: i2c: max96717: add support for MAX9295A
dt-bindings: media: i2c: max96717: add support for MAX96793
dt-bindings: media: i2c: max96712: use pattern properties for ports
dt-bindings: media: i2c: max96712: add support for I2C ATR
dt-bindings: media: i2c: max96712: add support for POC supplies
dt-bindings: media: i2c: max96712: add support for MAX96724F/R
dt-bindings: media: i2c: max96714: add support for MAX96714R
dt-bindings: media: i2c: add MAX9296A, MAX96716A, MAX96792A
media: i2c: add Maxim GMSL2/3 serializer and deserializer framework
media: i2c: add Maxim GMSL2/3 serializer framework
media: i2c: add Maxim GMSL2/3 deserializer framework
media: i2c: maxim-serdes: add MAX96717 driver
media: i2c: maxim-serdes: add MAX96724 driver
media: i2c: maxim-serdes: add MAX9296A driver
arm64: defconfig: disable deprecated MAX96712 driver
staging: media: remove MAX96712 driver
media: i2c: remove MAX96717 driver
media: i2c: remove MAX96714 driver
Dumitru Ceclan (1):
dt-bindings: media: i2c: max96712: add control-channel-port property
Sakari Ailus (1):
media: mc: Add INTERNAL pad flag
.../bindings/media/i2c/maxim,max9296a.yaml | 242 ++
.../bindings/media/i2c/maxim,max96712.yaml | 73 +-
.../bindings/media/i2c/maxim,max96714.yaml | 5 +-
.../bindings/media/i2c/maxim,max96717.yaml | 154 +-
.../userspace-api/media/mediactl/media-types.rst | 9 +
MAINTAINERS | 10 +-
arch/arm64/configs/defconfig | 1 -
drivers/media/i2c/Kconfig | 34 +-
drivers/media/i2c/Makefile | 3 +-
drivers/media/i2c/max96714.c | 1017 -------
drivers/media/i2c/max96717.c | 1102 -------
drivers/media/i2c/maxim-serdes/Kconfig | 60 +
drivers/media/i2c/maxim-serdes/Makefile | 6 +
drivers/media/i2c/maxim-serdes/max9296a.c | 1358 +++++++++
drivers/media/i2c/maxim-serdes/max96717.c | 1686 ++++++++++
drivers/media/i2c/maxim-serdes/max96724.c | 1261 ++++++++
drivers/media/i2c/maxim-serdes/max_des.c | 3205 ++++++++++++++++++++
drivers/media/i2c/maxim-serdes/max_des.h | 156 +
drivers/media/i2c/maxim-serdes/max_ser.c | 2155 +++++++++++++
drivers/media/i2c/maxim-serdes/max_ser.h | 147 +
drivers/media/i2c/maxim-serdes/max_serdes.c | 413 +++
drivers/media/i2c/maxim-serdes/max_serdes.h | 183 ++
drivers/media/mc/mc-entity.c | 15 +-
drivers/staging/media/Kconfig | 2 -
drivers/staging/media/Makefile | 1 -
drivers/staging/media/max96712/Kconfig | 14 -
drivers/staging/media/max96712/Makefile | 2 -
drivers/staging/media/max96712/max96712.c | 487 ---
include/uapi/linux/media.h | 1 +
29 files changed, 11116 insertions(+), 2686 deletions(-)
---
base-commit: a15a902a91b78f1544760fb52ef0151f83815f81
change-id: 20251107-gmsl2-3_serdes-3f2b885209c3
Best regards,
--
Dumitru Ceclan <dumitru.ceclan@analog.com>
^ permalink raw reply
* [PATCH v10 04/22] dt-bindings: media: i2c: max96717: add support for MAX9295A
From: Dumitru Ceclan via B4 Relay @ 2026-04-06 20:14 UTC (permalink / raw)
To: Tomi Valkeinen, Mauro Carvalho Chehab, Sakari Ailus,
Laurent Pinchart, Julien Massot, Rob Herring,
Niklas Söderlund, Greg Kroah-Hartman, Cosmin Tanislav
Cc: mitrutzceclan, linux-media, linux-kernel, devicetree,
linux-staging, linux-gpio, Niklas Söderlund, Martin Hecht,
Cosmin Tanislav
In-Reply-To: <20260406-gmsl2-3_serdes-v10-0-645560fedca5@analog.com>
From: Cosmin Tanislav <demonsingur@gmail.com>
MAX9295A is an older variant of the MAX96717 which does not support
tunnel mode.
Document the compatibility.
Signed-off-by: Cosmin Tanislav <demonsingur@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
---
Documentation/devicetree/bindings/media/i2c/maxim,max96717.yaml | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/media/i2c/maxim,max96717.yaml b/Documentation/devicetree/bindings/media/i2c/maxim,max96717.yaml
index d507cad18edc..bbb38b3de7df 100644
--- a/Documentation/devicetree/bindings/media/i2c/maxim,max96717.yaml
+++ b/Documentation/devicetree/bindings/media/i2c/maxim,max96717.yaml
@@ -24,12 +24,17 @@ description:
The GMSL2 serial link operates at a fixed rate of 3Gbps or 6Gbps in the
forward direction and 187.5Mbps in the reverse direction.
+
MAX96717F only supports a fixed rate of 3Gbps in the forward direction.
+ MAX9295A only supports pixel mode.
+
properties:
compatible:
oneOf:
- - const: maxim,max96717f
+ - enum:
+ - maxim,max9295a
+ - maxim,max96717f
- items:
- enum:
- maxim,max96717
--
2.51.0
^ permalink raw reply related
* [PATCH v10 02/22] dt-bindings: media: i2c: max96717: add support for I2C ATR
From: Dumitru Ceclan via B4 Relay @ 2026-04-06 20:14 UTC (permalink / raw)
To: Tomi Valkeinen, Mauro Carvalho Chehab, Sakari Ailus,
Laurent Pinchart, Julien Massot, Rob Herring,
Niklas Söderlund, Greg Kroah-Hartman, Cosmin Tanislav
Cc: mitrutzceclan, linux-media, linux-kernel, devicetree,
linux-staging, linux-gpio, Niklas Söderlund, Martin Hecht,
Cosmin Tanislav
In-Reply-To: <20260406-gmsl2-3_serdes-v10-0-645560fedca5@analog.com>
From: Cosmin Tanislav <demonsingur@gmail.com>
MAX96717 is capable of address translation for the connected I2C slaves.
Add support for I2C ATR while keeping I2C gate for compatibility to
support this usecase.
Signed-off-by: Cosmin Tanislav <demonsingur@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
---
.../bindings/media/i2c/maxim,max96717.yaml | 39 ++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/i2c/maxim,max96717.yaml b/Documentation/devicetree/bindings/media/i2c/maxim,max96717.yaml
index d1e8ba6e368e..976f6dd2c164 100644
--- a/Documentation/devicetree/bindings/media/i2c/maxim,max96717.yaml
+++ b/Documentation/devicetree/bindings/media/i2c/maxim,max96717.yaml
@@ -91,6 +91,30 @@ properties:
incoming GMSL2 link. Therefore, it supports an i2c-gate
subnode to configure a sensor.
+ i2c-alias-pool:
+ maxItems: 2
+
+ i2c-atr:
+ type: object
+ additionalProperties: false
+
+ properties:
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+ patternProperties:
+ '^i2c@[01]$':
+ $ref: /schemas/i2c/i2c-controller.yaml#
+ unevaluatedProperties: false
+ properties:
+ reg:
+ items:
+ minimum: 0
+ maximum: 1
+
required:
- compatible
- reg
@@ -98,6 +122,21 @@ required:
additionalProperties: false
+allOf:
+ - $ref: /schemas/i2c/i2c-atr.yaml#
+
+ - anyOf:
+ - oneOf:
+ - required: [i2c-atr]
+ - required: [i2c-gate]
+
+ - not:
+ required: [i2c-atr, i2c-gate]
+
+dependentRequired:
+ i2c-atr: [i2c-alias-pool]
+ i2c-alias-pool: [i2c-atr]
+
examples:
- |
#include <dt-bindings/gpio/gpio.h>
--
2.51.0
^ permalink raw reply related
* [PATCH v10 03/22] dt-bindings: media: i2c: max96717: add support for pinctrl/pinconf
From: Dumitru Ceclan via B4 Relay @ 2026-04-06 20:14 UTC (permalink / raw)
To: Tomi Valkeinen, Mauro Carvalho Chehab, Sakari Ailus,
Laurent Pinchart, Julien Massot, Rob Herring,
Niklas Söderlund, Greg Kroah-Hartman, Cosmin Tanislav
Cc: mitrutzceclan, linux-media, linux-kernel, devicetree,
linux-staging, linux-gpio, Niklas Söderlund, Martin Hecht,
Cosmin Tanislav
In-Reply-To: <20260406-gmsl2-3_serdes-v10-0-645560fedca5@analog.com>
From: Cosmin Tanislav <demonsingur@gmail.com>
MAX96717 is capable of configuring various pin properties.
Add pinctrl/pinconf properties to support this usecase.
Signed-off-by: Cosmin Tanislav <demonsingur@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
---
.../bindings/media/i2c/maxim,max96717.yaml | 105 +++++++++++++++++++++
1 file changed, 105 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/i2c/maxim,max96717.yaml b/Documentation/devicetree/bindings/media/i2c/maxim,max96717.yaml
index 976f6dd2c164..d507cad18edc 100644
--- a/Documentation/devicetree/bindings/media/i2c/maxim,max96717.yaml
+++ b/Documentation/devicetree/bindings/media/i2c/maxim,max96717.yaml
@@ -120,6 +120,111 @@ required:
- reg
- ports
+patternProperties:
+ '-pins$':
+ type: object
+ additionalProperties: false
+
+ properties:
+ function:
+ enum: [gpio, rclkout]
+
+ pins: true
+ drive-open-drain: true
+ drive-push-pull: true
+ bias-disable: true
+ output-disable: true
+ output-enable: true
+ output-low: true
+ output-high: true
+ input-enable: true
+
+ slew-rate:
+ description: |
+ Slew rate.
+ Rise and fall times represent the time needed for a GPIO to go
+ from 20% to 80% of VDDIO.
+ 0 - Fastest
+ rise: 1.0ns @ 1.8V, 0.6ns @ 3.3V,
+ fall: 0.8ns @ 1.8V, 0.5ns @ 3.3V
+ 1 - Fast
+ rise: 2.1ns @ 1.8V, 1.1ns @ 3.3V,
+ fall: 2.0ns @ 1.8V, 1.1ns @ 3.3V
+ 2 - Slow
+ rise: 4.0ns @ 1.8V, 2.3ns @3.3V,
+ fall: 10.0ns @ 1.8V, 5.0ns @3.3V
+ 3 - Slowest
+ rise: 9.0ns @ 1.8V, 5.0ns @3.3V,
+ fall: 10.0ns @ 1.8V, 5.0ns @3.3V
+ maximum: 3
+
+ bias-pull-up:
+ oneOf:
+ - type: boolean
+ description: Enable regular 40kOhm pull-up
+ - enum: [ 40000, 1000000 ]
+ description: Enable either the 40kOhm or the 1MOhm pull-up
+
+ bias-pull-down:
+ oneOf:
+ - type: boolean
+ description: Enable regular 40kOhm pull-down
+ - enum: [ 40000, 1000000 ]
+ description: Enable either the 40kOhm or the 1MOhm pull-down
+
+ maxim,jitter-compensation:
+ type: boolean
+ description: |
+ Enables jitter compensation.
+ Jitter compensation is used to minimize the jitter of the
+ signals transmitted from the deserializer to the serializer
+ by adding a fixed delay to every transition on the serializer
+ side. This can be used for pulse generation where timing is
+ critical.
+
+ maxim,tx-id:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Enable transmission of the pin state from the serializer to
+ the deserializer using the specified identifier.
+ maximum: 31
+
+ maxim,rx-id:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Enable transmission of the pin state from the deserializer to
+ the serializer using the specified identifier.
+ maximum: 31
+
+ required:
+ - pins
+ - function
+
+ allOf:
+ - $ref: /schemas/pinctrl/pincfg-node.yaml#
+ - $ref: /schemas/pinctrl/pinmux-node.yaml#
+
+ - if:
+ properties:
+ function:
+ const: gpio
+ then:
+ properties:
+ pins:
+ items:
+ enum: [mfp0, mfp1, mfp2, mfp3, mfp4, mfp5, mfp6, mfp7,
+ mfp8, mfp9, mfp10]
+
+ - if:
+ properties:
+ function:
+ const: rclkout
+ then:
+ properties:
+ pins:
+ items:
+ enum: [mfp2, mfp4]
+
additionalProperties: false
allOf:
--
2.51.0
^ permalink raw reply related
* [PATCH v10 01/22] media: mc: Add INTERNAL pad flag
From: Dumitru Ceclan via B4 Relay @ 2026-04-06 20:14 UTC (permalink / raw)
To: Tomi Valkeinen, Mauro Carvalho Chehab, Sakari Ailus,
Laurent Pinchart, Julien Massot, Rob Herring,
Niklas Söderlund, Greg Kroah-Hartman, Cosmin Tanislav
Cc: mitrutzceclan, linux-media, linux-kernel, devicetree,
linux-staging, linux-gpio, Niklas Söderlund, Martin Hecht,
Tomi Valkeinen
In-Reply-To: <20260406-gmsl2-3_serdes-v10-0-645560fedca5@analog.com>
From: Sakari Ailus <sakari.ailus@linux.intel.com>
Internal sink pads will be used as routing endpoints in V4L2 [GS]_ROUTING
IOCTLs, to indicate that the stream begins in the entity. Internal sink
pads are pads that have both SINK and INTERNAL flags set.
Also prevent creating links to pads that have been flagged as internal and
initialising SOURCE pads with INTERNAL flag set.
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
.../userspace-api/media/mediactl/media-types.rst | 9 +++++++++
drivers/media/mc/mc-entity.c | 15 ++++++++++++---
include/uapi/linux/media.h | 1 +
3 files changed, 22 insertions(+), 3 deletions(-)
diff --git a/Documentation/userspace-api/media/mediactl/media-types.rst b/Documentation/userspace-api/media/mediactl/media-types.rst
index 6332e8395263..200c37a1da26 100644
--- a/Documentation/userspace-api/media/mediactl/media-types.rst
+++ b/Documentation/userspace-api/media/mediactl/media-types.rst
@@ -361,6 +361,7 @@ Types and flags used to represent the media graph elements
.. _MEDIA-PAD-FL-SINK:
.. _MEDIA-PAD-FL-SOURCE:
.. _MEDIA-PAD-FL-MUST-CONNECT:
+.. _MEDIA-PAD-FL-INTERNAL:
.. flat-table:: Media pad flags
:header-rows: 0
@@ -381,6 +382,14 @@ Types and flags used to represent the media graph elements
enabled links even when this flag isn't set; the absence of the flag
doesn't imply there is none.
+ * - ``MEDIA_PAD_FL_INTERNAL``
+ - The internal flag indicates an internal pad that has no external
+ connections. As they are internal to entities, internal pads shall not
+ be connected with links.
+
+ The internal flag may currently be present only in a sink pad where it
+ indicates that the :ref:``stream <media-glossary-stream>`` originates
+ from within the entity.
One and only one of ``MEDIA_PAD_FL_SINK`` and ``MEDIA_PAD_FL_SOURCE``
must be set for every pad.
diff --git a/drivers/media/mc/mc-entity.c b/drivers/media/mc/mc-entity.c
index 9519a537bfa2..df20356fa98b 100644
--- a/drivers/media/mc/mc-entity.c
+++ b/drivers/media/mc/mc-entity.c
@@ -209,11 +209,16 @@ int media_entity_pads_init(struct media_entity *entity, u16 num_pads,
mutex_lock(&mdev->graph_mutex);
media_entity_for_each_pad(entity, iter) {
+ const u32 pad_flags = iter->flags & (MEDIA_PAD_FL_SINK |
+ MEDIA_PAD_FL_SOURCE |
+ MEDIA_PAD_FL_INTERNAL);
+
iter->entity = entity;
iter->index = i++;
- if (hweight32(iter->flags & (MEDIA_PAD_FL_SINK |
- MEDIA_PAD_FL_SOURCE)) != 1) {
+ if (pad_flags != MEDIA_PAD_FL_SINK &&
+ pad_flags != (MEDIA_PAD_FL_SINK | MEDIA_PAD_FL_INTERNAL) &&
+ pad_flags != MEDIA_PAD_FL_SOURCE) {
ret = -EINVAL;
break;
}
@@ -1118,7 +1123,8 @@ int media_get_pad_index(struct media_entity *entity, u32 pad_type,
for (i = 0; i < entity->num_pads; i++) {
if ((entity->pads[i].flags &
- (MEDIA_PAD_FL_SINK | MEDIA_PAD_FL_SOURCE)) != pad_type)
+ (MEDIA_PAD_FL_SINK | MEDIA_PAD_FL_SOURCE |
+ MEDIA_PAD_FL_INTERNAL)) != pad_type)
continue;
if (entity->pads[i].sig_type == sig_type)
@@ -1148,6 +1154,9 @@ media_create_pad_link(struct media_entity *source, u16 source_pad,
return -EINVAL;
if (WARN_ON(!(sink->pads[sink_pad].flags & MEDIA_PAD_FL_SINK)))
return -EINVAL;
+ if (WARN_ON(source->pads[source_pad].flags & MEDIA_PAD_FL_INTERNAL) ||
+ WARN_ON(sink->pads[sink_pad].flags & MEDIA_PAD_FL_INTERNAL))
+ return -EINVAL;
link = media_add_link(&source->links);
if (link == NULL)
diff --git a/include/uapi/linux/media.h b/include/uapi/linux/media.h
index 1c80b1d6bbaf..80cfd12a43fc 100644
--- a/include/uapi/linux/media.h
+++ b/include/uapi/linux/media.h
@@ -208,6 +208,7 @@ struct media_entity_desc {
#define MEDIA_PAD_FL_SINK (1U << 0)
#define MEDIA_PAD_FL_SOURCE (1U << 1)
#define MEDIA_PAD_FL_MUST_CONNECT (1U << 2)
+#define MEDIA_PAD_FL_INTERNAL (1U << 3)
struct media_pad_desc {
__u32 entity; /* entity ID */
--
2.51.0
^ permalink raw reply related
* Re: [PATCH v3 3/3] iio: adc: qcom-pm8xxx-xoadc: add support for reading channel labels
From: Andy Shevchenko @ 2026-04-06 19:46 UTC (permalink / raw)
To: Antony Kurniawan Soemardi
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jonathan Cameron, David Lechner, Nuno Sá,
Andy Shevchenko, linux-arm-msm, devicetree, linux-kernel,
linux-iio, phone-devel, Dmitry Baryshkov
In-Reply-To: <20260405-pm8xxx-xoadc-label-v3-3-9fe179c283ec@smankusors.com>
On Sun, Apr 05, 2026 at 04:52:21PM +0000, Antony Kurniawan Soemardi wrote:
> Implement the .read_label callback to allow userspace to identify ADC
> channels via the "label" property in the device tree. The name field in
> pm8xxx_chan_info is renamed to label to better reflect its purpose. If
> no label is provided in the device tree, it defaults to the hardware
> datasheet name.
> The change has been tested on Sony Xperia SP (PM8921).
...
> +static int pm8xxx_read_label(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan, char *label)
> +{
> + struct pm8xxx_xoadc *adc = iio_priv(indio_dev);
> + struct pm8xxx_chan_info *ch = pm8xxx_get_channel(adc, chan->address);
When you have a validation the better style is to split definition and
assignment. This makes code robust against (theoretically) possible changes
that might reuse the same variable for something else.
> + if (!ch)
> + return -EINVAL;
> + return sysfs_emit(label, "%s\n", ch->label);
> +}
Again, no need to resend now, just make it in the next version if that version
is asked for.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH v3 2/3] iio: adc: qcom-pm8xxx-xoadc: remove redundant error logs when reading values
From: Andy Shevchenko @ 2026-04-06 19:44 UTC (permalink / raw)
To: Antony Kurniawan Soemardi
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jonathan Cameron, David Lechner, Nuno Sá,
Andy Shevchenko, linux-arm-msm, devicetree, linux-kernel,
linux-iio, phone-devel
In-Reply-To: <20260405-pm8xxx-xoadc-label-v3-2-9fe179c283ec@smankusors.com>
On Sun, Apr 05, 2026 at 04:52:18PM +0000, Antony Kurniawan Soemardi wrote:
> Drop dev_err() logging for -EINVAL and -ETIMEDOUT cases and rely on
> return values to report errors, reducing unnecessary log noise.
...
> ret = wait_for_completion_timeout(&adc->complete,
> VADC_CONV_TIME_MAX_US);
> if (!ret) {
> - dev_err(adc->dev, "conversion timed out\n");
> ret = -ETIMEDOUT;
> goto unlock;
> }
In case you need a new version, the above can be replaced with a better
alternative (assuming the ret is defined as not boolean and it is so):
if (!wait_for_...(...)) {
ret = ...;
goto ...
}
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH] arm64: dts: qcom: fix temp-alarm probe failure for PMH0104 on Glymur
From: Dmitry Baryshkov @ 2026-04-06 19:31 UTC (permalink / raw)
To: Kamal Wadhwa
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jishnu Prakash, Jyothi Kumar Seerapu, Maulik Shah,
Pankaj Patil, Raviteja Laggyshetty, Sibi Sankar, linux-arm-msm,
devicetree, linux-kernel, Manaf Meethalavalappu Pallikunhi
In-Reply-To: <20260406-glymur-pmh0104-temp-alarm-fix-v1-1-4441b7b01f85@oss.qualcomm.com>
On Mon, Apr 06, 2026 at 07:05:55PM +0530, Kamal Wadhwa wrote:
> The temp-alarm driver probe is failing for the pmh0104 PMICs on glymur.
>
> [ 3.999713] spmi-temp-alarm c426000.spmi:pmic@8:temp-alarm@a00: error -ENODEV: failed to register sensor
> [ 4.015066] spmi-temp-alarm c426000.spmi:pmic@9:temp-alarm@a00: error -ENODEV: failed to register sensor
> [ 4.033908] spmi-temp-alarm c437000.spmi:pmic@b:temp-alarm@a00: error -ENODEV: failed to register sensor
>
> This happens because thermal zone associated with the temp alarm was
> defined under the thermal zones parent node which had a typo (used `_` in
> place of `-`). Correct the typo to fix probe failure.
>
> Fixes: 41b6e8db400c ("arm64: dts: qcom: Introduce Glymur base dtsi")
> Signed-off-by: Kamal Wadhwa <kamal.wadhwa@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/pmh0104-glymur.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH v4 5/7] remoteproc: core: set recovery_disabled when doing rproc_add()
From: Dmitry Baryshkov @ 2026-04-06 19:29 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Jingyi Wang, Bartosz Golaszewski, aiqun.yu, tingwei.zhang,
trilok.soni, yijie.yang, linux-arm-msm, linux-remoteproc,
devicetree, linux-kernel, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Manivannan Sadhasivam,
Luca Weiss, Konrad Dybcio
In-Reply-To: <adPLDWz6_QmBa8w1@baldur>
On Mon, Apr 06, 2026 at 10:04:03AM -0500, Bjorn Andersson wrote:
> On Thu, Mar 19, 2026 at 01:44:48PM +0800, Jingyi Wang wrote:
> >
> >
> > On 3/19/2026 1:23 PM, Dmitry Baryshkov wrote:
> > >
> > > Isn't this patch necessary for SoCCP bringup? If not, why did you
> > > include it into the series?
> > >
> > yes, will squash to soccp patch in next versoin.
>
> I'm sorry, but that doesn't make sense to me.
>
> The SoCCP patch adds support for attaching SoCCP. This change tries to
> address a generic problem shared across all remoteproc drivers (that
> does attach?).
>
> I think you should interpret Dmitry's comment as "why is this part of
> this series, please fix this problem in a separate series".
Exactly.
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH v3 3/3] arm64: dts: qcom: kaanpaali: Add USB support for QRD platform
From: Dmitry Baryshkov @ 2026-04-06 19:28 UTC (permalink / raw)
To: Krishna Kurapati
Cc: Konrad Dybcio, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-arm-msm, devicetree, linux-kernel,
Ronak Raheja, Jingyi Wang
In-Reply-To: <20260406174613.3388987-4-krishna.kurapati@oss.qualcomm.com>
On Mon, Apr 06, 2026 at 11:16:13PM +0530, Krishna Kurapati wrote:
> From: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
>
> Enable USB support on Kaanapali QRD variant. Enable USB controller in
> device mode till glink node is added.
>
> Signed-off-by: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/kaanapali-qrd.dts | 27 ++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH v3 2/3] arm64: dts: qcom: kaanpaali: Add USB support for MTP platform
From: Dmitry Baryshkov @ 2026-04-06 19:28 UTC (permalink / raw)
To: Krishna Kurapati
Cc: Konrad Dybcio, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-arm-msm, devicetree, linux-kernel,
Ronak Raheja, Jingyi Wang
In-Reply-To: <20260406174613.3388987-3-krishna.kurapati@oss.qualcomm.com>
On Mon, Apr 06, 2026 at 11:16:12PM +0530, Krishna Kurapati wrote:
> From: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
>
> Enable USB support on Kaanapali MTP variant. Enable USB controller in
> device mode till glink node is added.
>
> Signed-off-by: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/kaanapali-mtp.dts | 27 ++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH v3 1/3] arm64: dts: qcom: kaanapali: Add USB support for Kaanapali SoC
From: Dmitry Baryshkov @ 2026-04-06 19:27 UTC (permalink / raw)
To: Krishna Kurapati
Cc: Konrad Dybcio, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-arm-msm, devicetree, linux-kernel,
Ronak Raheja, Jingyi Wang
In-Reply-To: <20260406174613.3388987-2-krishna.kurapati@oss.qualcomm.com>
On Mon, Apr 06, 2026 at 11:16:11PM +0530, Krishna Kurapati wrote:
> From: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
>
> Add the base USB devicetree definitions for Kaanapali platform. The overall
> chipset contains a single DWC3 USB3 controller (rev. 200a), SS QMP PHY
> (rev. v8) and M31 eUSB2 PHY.
>
> Signed-off-by: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/kaanapali.dtsi | 154 ++++++++++++++++++++++++
> 1 file changed, 154 insertions(+)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH 1/2] arm64: dts: qcom: kodiak: Add iface clock for ice sdhc
From: Dmitry Baryshkov @ 2026-04-06 19:13 UTC (permalink / raw)
To: Kuldeep Singh
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-arm-msm, devicetree, linux-kernel
In-Reply-To: <20260406-ice_emmc_clock_addition-v1-1-e7b237bf7a69@oss.qualcomm.com>
On Mon, Apr 06, 2026 at 10:00:36PM +0530, Kuldeep Singh wrote:
> Qualcomm in-line crypto engine (ICE) platform driver specifies and votes
> for its own resources. Before accessing ICE hardware during probe, to
> avoid potential unclocked register access issues (when clk_ignore_unused
> is not passed on the kernel command line), in addition to the 'core'
> clock the 'iface' clock should also be turned on by the driver.
>
> As bindings allow to specify 2 clocks, add iface clock now.
>
> Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/kodiak.dtsi | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> index dda4697a61b7..5e6b659e8719 100644
> --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
> +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> @@ -1082,7 +1082,8 @@ sdhc_ice: crypto@7c8000 {
> compatible = "qcom,sc7280-inline-crypto-engine",
> "qcom,inline-crypto-engine";
> reg = <0x0 0x007c8000 0x0 0x18000>;
> - clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>;
> + clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
> + clock-names = "core", "iface";
Inside the schema the clocks have maxItems:1. Please update the schema:
Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
> };
>
> gpi_dma0: dma-controller@900000 {
>
> --
> 2.34.1
>
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH v3 2/3] thermal: spacemit: k1: Add thermal sensor support
From: Anand Moon @ 2026-04-06 18:45 UTC (permalink / raw)
To: Shuwei Wu
Cc: Rafael J. Wysocki, Daniel Lezcano, Zhang Rui, Lukasz Luba,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Yixun Lan,
Philipp Zabel, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Alexandre Ghiti, linux-pm, devicetree, linux-riscv, spacemit,
linux-kernel
In-Reply-To: <20260119-patchv2-k1-thermal-v3-2-3d82c9ebe8a4@163.com>
Hi Shuwei,
On Mon, 19 Jan 2026 at 08:13, Shuwei Wu <shuweiwoo@163.com> wrote:
>
> The thermal sensor on K1 supports monitoring five temperature zones.
> The driver registers these sensors with the thermal framework
> and supports standard operations:
> - Reading temperature (millidegree Celsius)
> - Setting high/low thresholds for interrupts
>
> Signed-off-by: Shuwei Wu <shuweiwoo@163.com>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Thanks
-Anand
^ permalink raw reply
* Re: [PATCH v4 2/2] iio: dac: ad5706r: Add support for AD5706R DAC
From: Andy Shevchenko @ 2026-04-06 18:32 UTC (permalink / raw)
To: Torreno, Alexis Czezar
Cc: Lars-Peter Clausen, Hennerich, Michael, Jonathan Cameron,
David Lechner, Sa, Nuno, Andy Shevchenko, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-iio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
In-Reply-To: <PH0PR03MB63516A449873005315ACFF02F15DA@PH0PR03MB6351.namprd03.prod.outlook.com>
On Mon, Apr 06, 2026 at 07:04:44AM +0000, Torreno, Alexis Czezar wrote:
> > On Wed, Apr 01, 2026 at 06:20:04PM +0800, Alexis Czezar Torreno wrote:
...
> > > +static int ad5706r_regmap_write(void *context, const void *data,
> > > +size_t count) {
> > > + struct ad5706r_state *st = context;
> > > + unsigned int num_bytes;
> >
> > Currently only 1 and 2 bytes are supported, right? Any updates are planned on
> > this in the future?
>
> Yes only 1 and 2 bytes, no future extension. Should I make num_bytes a 'u8'?
>
> > > + u16 reg;
> > > + cmd = AD5706R_RD_MASK | (reg & AD5706R_ADDR_MASK);
> > > + put_unaligned_be16(cmd, st->tx_buf);
> >
> > > + memset(st->tx_buf + 2, 0, num_bytes);
> >
> > I would use &st->tx_buf[2] here and below for the sake of consistency with
> > put_unaligned_*().
>
> Will edit for consistnency.
>
> > > + ret = spi_sync_transfer(st->spi, &xfer, 1);
> > > + if (ret)
> > > + return ret;
> > > +
> > > + /* Ignore the first two bytes (echo during command) */
> > > + if (num_bytes == AD5706R_SINGLE_BYTE_LEN)
> > > + put_unaligned_be16(st->rx_buf[2], val_buf);
> >
> > The comment wants to explain why it's required to put 2 bytes anyway.
>
> Will add clearer comments for this
>
> > > + else
> > > + memcpy(val_buf, st->rx_buf + 2, num_bytes);
> >
> > However with the above question in mind, if it's all about 1 or 2 bytes, can't we
> > simply use the same approach everywhere, like put_unaligned_*()?
>
> For consistency, put_unaligned_*() can work.
>
> Although since rx_buf is u8, this line:
>
> memcpy(val_buf, &st->rx_buf[2], num_bytes);
>
> Will look like this for 2 bytes:
>
> x = get_unaligned_be16( &st->rx_buf[2] )
> put_unaligned_be16( x, val_buf )
>
> I suppose the mem* commands looks cleaner
We optimise it a bit, so what you are going to have is something like
if (num_bytes == 1)
x = &st->rx_buf[2];
else if (num_bytes == 2)
x = get_unaligned...(...);
else
return -EINVAL;
put_unaligned...(...);
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* [PATCH v4 6/6] phy: realtek: Make configs available for MACH_REALTEK_RTL
From: Rustam Adilov @ 2026-04-06 18:12 UTC (permalink / raw)
To: Vinod Koul, Neil Armstrong, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Stanley Chang, linux-phy, devicetree, linux-kernel
Cc: Rustam Adilov
In-Reply-To: <20260406181228.25892-1-adilov@disroot.org>
Add the MACH_REALTEK_RTL to the if statement to make the config
options available for Realtek RTL SoCs as well.
Signed-off-by: Rustam Adilov <adilov@disroot.org>
---
drivers/phy/realtek/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/realtek/Kconfig b/drivers/phy/realtek/Kconfig
index 75ac7e7c31ae..76f9215d8b94 100644
--- a/drivers/phy/realtek/Kconfig
+++ b/drivers/phy/realtek/Kconfig
@@ -3,7 +3,7 @@
# Phy drivers for Realtek platforms
#
-if ARCH_REALTEK || COMPILE_TEST
+if ARCH_REALTEK || MACH_REALTEK_RTL || COMPILE_TEST
config PHY_RTK_RTD_USB2PHY
tristate "Realtek RTD USB2 PHY Transceiver Driver"
@@ -29,4 +29,4 @@ config PHY_RTK_RTD_USB3PHY
DWC3 USB IP. This driver will do the PHY initialization
of the parameters.
-endif # ARCH_REALTEK || COMPILE_TEST
+endif # ARCH_REALTEK || MACH_REALTEK_RTL || COMPILE_TEST
--
2.53.0
^ permalink raw reply related
* [PATCH v4 5/6] phy: realtek: usb2: add support for RTL9607C USB2 PHY
From: Rustam Adilov @ 2026-04-06 18:12 UTC (permalink / raw)
To: Vinod Koul, Neil Armstrong, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Stanley Chang, linux-phy, devicetree, linux-kernel
Cc: Rustam Adilov, Michael Zavertkin
In-Reply-To: <20260406181228.25892-1-adilov@disroot.org>
Add support for the usb2 phy of RTL9607C series based SoCs.
Add the macros and phy config struct for rtl9607.
RTL9607C requires to clear a "force host disconnect" bit in the
specific register (which is at an offset from reg_wrap_vstatus)
before proceeding with phy parameter writes.
Add the bool variable to the driver data struct and hide this whole
procedure under the if statement that checks this new variable.
Add the appropriate little endian read and write functions for rtl9607
and assign them to its phy config struct.
Co-developed-by: Michael Zavertkin <misha.zavertkin@mail.ru>
Signed-off-by: Michael Zavertkin <misha.zavertkin@mail.ru>
Signed-off-by: Rustam Adilov <adilov@disroot.org>
---
drivers/phy/realtek/phy-rtk-usb2.c | 57 ++++++++++++++++++++++++++++++
1 file changed, 57 insertions(+)
diff --git a/drivers/phy/realtek/phy-rtk-usb2.c b/drivers/phy/realtek/phy-rtk-usb2.c
index 64fd42513b86..9311cf09521b 100644
--- a/drivers/phy/realtek/phy-rtk-usb2.c
+++ b/drivers/phy/realtek/phy-rtk-usb2.c
@@ -26,6 +26,12 @@
#define PHY_VCTRL_SHIFT 8
#define PHY_REG_DATA_MASK 0xff
+#define PHY_9607_VSTS_BUSY BIT(17)
+#define PHY_9607_NEW_REG_REQ BIT(13)
+
+#define PHY_9607_FORCE_DISCONNECT_REG 0x10
+#define PHY_9607_FORCE_DISCONNECT_BIT BIT(5)
+
#define GET_LOW_NIBBLE(addr) ((addr) & 0x0f)
#define GET_HIGH_NIBBLE(addr) (((addr) & 0xf0) >> 4)
@@ -109,6 +115,7 @@ struct phy_cfg {
u32 (*read)(void __iomem *reg);
void (*write)(u32 val, void __iomem *reg);
+ bool force_host_disconnect;
};
struct phy_parameter {
@@ -146,6 +153,18 @@ static void rtk_usb2phy_write(u32 val, void __iomem *reg)
writel(val, reg);
}
+static u32 rtk_usb2phy_read_le(void __iomem *reg)
+{
+ return le32_to_cpu(readl(reg));
+}
+
+static void rtk_usb2phy_write_le(u32 val, void __iomem *reg)
+{
+ u32 tmp = cpu_to_le32(val);
+
+ writel(tmp, reg);
+}
+
/* mapping 0xE0 to 0 ... 0xE7 to 7, 0xF0 to 8 ,,, 0xF7 to 15 */
static inline int page_addr_to_array_index(u8 addr)
{
@@ -609,6 +628,16 @@ static int do_rtk_phy_init(struct rtk_phy *rtk_phy, int index)
goto do_toggle;
}
+ if (phy_cfg->force_host_disconnect) {
+ /* disable force-host-disconnect */
+ u32 temp = readl(phy_reg->reg_wrap_vstatus + PHY_9607_FORCE_DISCONNECT_REG);
+
+ temp &= ~PHY_9607_FORCE_DISCONNECT_BIT;
+ writel(temp, phy_reg->reg_wrap_vstatus + PHY_9607_FORCE_DISCONNECT_REG);
+
+ msleep(10);
+ }
+
/* Set page 0 */
phy_data_page = phy_cfg->page0;
rtk_phy_set_page(phy_reg, 0);
@@ -1374,6 +1403,33 @@ static const struct phy_cfg rtd1315e_phy_cfg = {
.write = rtk_usb2phy_write,
};
+static const struct phy_cfg rtl9607_phy_cfg = {
+ .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE,
+ .page0 = { [0] = {0xe0, 0x95},
+ [4] = {0xe4, 0x6a},
+ [12] = {0xf3, 0x31}, },
+ .page1_size = MAX_USB_PHY_PAGE1_DATA_SIZE,
+ .page1 = { [0] = {0xe0, 0x26}, },
+ .page2_size = MAX_USB_PHY_PAGE2_DATA_SIZE,
+ .page2 = { [7] = {0xe7, 0x33}, },
+ .num_phy = 1,
+ .check_efuse_version = CHECK_EFUSE_V2,
+ .efuse_dc_driving_rate = EFUS_USB_DC_CAL_RATE,
+ .dc_driving_mask = 0x1f,
+ .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE,
+ .dc_disconnect_mask = 0xf,
+ .usb_dc_disconnect_at_page0 = true,
+ .do_toggle = true,
+ .driving_updated_for_dev_dis = 0x8,
+ .is_double_sensitivity_mode = true,
+ .vstatus_offset = 0xc,
+ .vstatus_busy = PHY_9607_VSTS_BUSY,
+ .new_reg_req = PHY_9607_NEW_REG_REQ,
+ .read = rtk_usb2phy_read_le,
+ .write = rtk_usb2phy_write_le,
+ .force_host_disconnect = true,
+};
+
static const struct of_device_id usbphy_rtk_dt_match[] = {
{ .compatible = "realtek,rtd1295-usb2phy", .data = &rtd1295_phy_cfg },
{ .compatible = "realtek,rtd1312c-usb2phy", .data = &rtd1312c_phy_cfg },
@@ -1384,6 +1440,7 @@ static const struct of_device_id usbphy_rtk_dt_match[] = {
{ .compatible = "realtek,rtd1395-usb2phy-2port", .data = &rtd1395_phy_cfg_2port },
{ .compatible = "realtek,rtd1619-usb2phy", .data = &rtd1619_phy_cfg },
{ .compatible = "realtek,rtd1619b-usb2phy", .data = &rtd1619b_phy_cfg },
+ { .compatible = "realtek,rtl9607-usb2phy", .data = &rtl9607_phy_cfg },
{},
};
MODULE_DEVICE_TABLE(of, usbphy_rtk_dt_match);
--
2.53.0
^ permalink raw reply related
* [PATCH v4 4/6] phy: realtek: usb2: introduce reset controller struct
From: Rustam Adilov @ 2026-04-06 18:12 UTC (permalink / raw)
To: Vinod Koul, Neil Armstrong, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Stanley Chang, linux-phy, devicetree, linux-kernel
Cc: Rustam Adilov, Michael Zavertkin
In-Reply-To: <20260406181228.25892-1-adilov@disroot.org>
In RTL9607C, there is so called "IP Enable Controller" which resemble
reset controller with reset lines and is used for various things like
USB, PCIE, GMAC and such.
Introduce the reset_control struct to this driver to handle deasserting
usb2 phy reset line.
Make use of the function devm_reset_control_array_get_optional_exclusive()
function to get the reset controller and since existing RTD SoCs don't
specify the resets we can have a cleaner code.
Co-developed-by: Michael Zavertkin <misha.zavertkin@mail.ru>
Signed-off-by: Michael Zavertkin <misha.zavertkin@mail.ru>
Signed-off-by: Rustam Adilov <adilov@disroot.org>
---
drivers/phy/realtek/phy-rtk-usb2.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/phy/realtek/phy-rtk-usb2.c b/drivers/phy/realtek/phy-rtk-usb2.c
index 0facd5f02e2d..64fd42513b86 100644
--- a/drivers/phy/realtek/phy-rtk-usb2.c
+++ b/drivers/phy/realtek/phy-rtk-usb2.c
@@ -17,6 +17,7 @@
#include <linux/sys_soc.h>
#include <linux/mfd/syscon.h>
#include <linux/phy/phy.h>
+#include <linux/reset.h>
#include <linux/usb.h>
/* GUSB2PHYACCn register */
@@ -130,6 +131,7 @@ struct rtk_phy {
struct phy_cfg *phy_cfg;
int num_phy;
struct phy_parameter *phy_parameter;
+ struct reset_control *phy_rst;
struct dentry *debug_dir;
};
@@ -592,6 +594,15 @@ static int do_rtk_phy_init(struct rtk_phy *rtk_phy, int index)
phy_parameter = &((struct phy_parameter *)rtk_phy->phy_parameter)[index];
phy_reg = &phy_parameter->phy_reg;
+ if (rtk_phy->phy_rst) {
+ int ret = reset_control_deassert(rtk_phy->phy_rst);
+
+ if (ret)
+ return ret;
+
+ msleep(5);
+ }
+
if (phy_cfg->use_default_parameter) {
dev_dbg(rtk_phy->dev, "%s phy#%d use default parameter\n",
__func__, index);
@@ -1059,6 +1070,11 @@ static int rtk_usb2phy_probe(struct platform_device *pdev)
rtk_phy->num_phy = phy_cfg->num_phy;
+ rtk_phy->phy_rst = devm_reset_control_array_get_optional_exclusive(dev);
+ if (IS_ERR(rtk_phy->phy_rst))
+ return dev_err_probe(dev, PTR_ERR(rtk_phy->phy_rst),
+ "usb2 phy resets are not working\n");
+
ret = parse_phy_data(rtk_phy);
if (ret)
goto err;
--
2.53.0
^ permalink raw reply related
* [PATCH v4 3/6] dt-bindings: phy: realtek,usb2phy.yaml: extend for resets and RTL9607C support
From: Rustam Adilov @ 2026-04-06 18:12 UTC (permalink / raw)
To: Vinod Koul, Neil Armstrong, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Stanley Chang, linux-phy, devicetree, linux-kernel
Cc: Rustam Adilov, Krzysztof Kozlowski
In-Reply-To: <20260406181228.25892-1-adilov@disroot.org>
Add the "realtek,rtl9607-usb2phy" compatible for USB2 PHY on the RTL9607C
SoC series.
Add a resets property to properties to describe the usb2phy reset line.
In RTL9607C, USB2 PHY reset line is from "IP Enable controller" which is
multipurpose and handle activating various SoC peripherals.
It is unclear whether RTD SoCs have something similar to that so set
the resets to false for these devices.
RTL9607C requires the "resets" to be specified so add the corresponding
if check for the "realtek,rtl9607-usb2phy" compatible.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Rustam Adilov <adilov@disroot.org>
---
.../bindings/phy/realtek,usb2phy.yaml | 25 ++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml b/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml
index 9911ada39ee7..7b50833c8e19 100644
--- a/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml
+++ b/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml
@@ -11,7 +11,8 @@ maintainers:
- Stanley Chang <stanley_chang@realtek.com>
description: |
- Realtek USB 2.0 PHY support the digital home center (DHC) RTD series SoCs.
+ Realtek USB 2.0 PHY support the digital home center (DHC) RTD and
+ RTL9607C series SoCs.
The USB 2.0 PHY driver is designed to support the XHCI controller. The SoCs
support multiple XHCI controllers. One PHY device node maps to one XHCI
controller.
@@ -57,6 +58,12 @@ description: |
XHCI controller#1 -- usb2phy -- phy#0
XHCI controller#2 -- usb2phy -- phy#0
+ RTL9607C SoCs USB
+ The USB architecture includes OHCI and EHCI controllers.
+ Both of them map to one USB2.0 PHY.
+ OHCI controller#0 -- usb2phy -- phy#0
+ EHCI controller#0 -- usb2phy -- phy#0
+
properties:
compatible:
enum:
@@ -69,6 +76,7 @@ properties:
- realtek,rtd1395-usb2phy-2port
- realtek,rtd1619-usb2phy
- realtek,rtd1619b-usb2phy
+ - realtek,rtl9607-usb2phy
reg:
items:
@@ -130,6 +138,9 @@ properties:
minimum: -8
maximum: 8
+ resets:
+ maxItems: 1
+
required:
- compatible
- reg
@@ -157,6 +168,18 @@ allOf:
then:
properties:
realtek,driving-level-compensate: false
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - realtek,rtl9607-usb2phy
+ then:
+ required:
+ - resets
+ else:
+ properties:
+ resets: false
additionalProperties: false
--
2.53.0
^ permalink raw reply related
* [PATCH v4 2/6] phy: realtek: usb2: introduce read and write functions to driver data
From: Rustam Adilov @ 2026-04-06 18:12 UTC (permalink / raw)
To: Vinod Koul, Neil Armstrong, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Stanley Chang, linux-phy, devicetree, linux-kernel
Cc: Rustam Adilov, Michael Zavertkin
In-Reply-To: <20260406181228.25892-1-adilov@disroot.org>
RTL9607C is a big endian SoC but has little endian USB host controller and
thus, reads and writes to the reg_gusb2phyacc0 should go through
le32_to_cpu and cpu_to_le32 functions respectively. This doesn't apply to
vstatus register though.
The reason is readl/writel functions, despite the supposed little endian
byte swap, still operate with native endian. The __raw_{read,write} are
also native endianness. And so wrapping them around le32 makes a proper
byte swap from big endian to little endian.
To handle this situation, introduce read and write functions to the driver
data and create a default variation of read and write function for the
current RTD SoCs.
Adjust all instances of utmi_wait_register function to now include the read
function as one of its arguments.
Assign the existing phy configuration for RTD SoCs to the default read
and write functions.
Co-developed-by: Michael Zavertkin <misha.zavertkin@mail.ru>
Signed-off-by: Michael Zavertkin <misha.zavertkin@mail.ru>
Signed-off-by: Rustam Adilov <adilov@disroot.org>
---
drivers/phy/realtek/phy-rtk-usb2.c | 63 ++++++++++++++++++++++++------
1 file changed, 50 insertions(+), 13 deletions(-)
diff --git a/drivers/phy/realtek/phy-rtk-usb2.c b/drivers/phy/realtek/phy-rtk-usb2.c
index f5d2f0c3376a..0facd5f02e2d 100644
--- a/drivers/phy/realtek/phy-rtk-usb2.c
+++ b/drivers/phy/realtek/phy-rtk-usb2.c
@@ -67,6 +67,9 @@ struct phy_reg {
int vstatus_offset;
int vstatus_busy;
int new_reg_req;
+
+ u32 (*read)(void __iomem *reg);
+ void (*write)(u32 val, void __iomem *reg);
};
struct phy_data {
@@ -102,6 +105,9 @@ struct phy_cfg {
int vstatus_offset;
int vstatus_busy;
int new_reg_req;
+
+ u32 (*read)(void __iomem *reg);
+ void (*write)(u32 val, void __iomem *reg);
};
struct phy_parameter {
@@ -128,6 +134,16 @@ struct rtk_phy {
struct dentry *debug_dir;
};
+static u32 rtk_usb2phy_read(void __iomem *reg)
+{
+ return readl(reg);
+}
+
+static void rtk_usb2phy_write(u32 val, void __iomem *reg)
+{
+ writel(val, reg);
+}
+
/* mapping 0xE0 to 0 ... 0xE7 to 7, 0xF0 to 8 ,,, 0xF7 to 15 */
static inline int page_addr_to_array_index(u8 addr)
{
@@ -144,12 +160,13 @@ static inline u8 array_index_to_page_addr(int index)
#define PHY_IO_TIMEOUT_USEC (50000)
#define PHY_IO_DELAY_US (100)
-static inline int utmi_wait_register(void __iomem *reg, u32 mask, u32 result)
+static inline int utmi_wait_register(u32 (*read)(void __iomem *reg), void __iomem *reg, u32 mask,
+ u32 result)
{
int ret;
unsigned int val;
- ret = read_poll_timeout(readl, val, ((val & mask) == result),
+ ret = read_poll_timeout(read, val, ((val & mask) == result),
PHY_IO_DELAY_US, PHY_IO_TIMEOUT_USEC, false, reg);
if (ret) {
pr_err("%s can't program USB phy\n", __func__);
@@ -168,25 +185,25 @@ static char rtk_phy_read(struct phy_reg *phy_reg, char addr)
addr -= OFFEST_PHY_READ;
/* polling until VBusy == 0 */
- ret = utmi_wait_register(reg_gusb2phyacc0, phy_reg->vstatus_busy, 0);
+ ret = utmi_wait_register(phy_reg->read, reg_gusb2phyacc0, phy_reg->vstatus_busy, 0);
if (ret)
return (char)ret;
/* VCtrl = low nibble of addr, and set PHY_NEW_REG_REQ */
val = phy_reg->new_reg_req | (GET_LOW_NIBBLE(addr) << PHY_VCTRL_SHIFT);
- writel(val, reg_gusb2phyacc0);
- ret = utmi_wait_register(reg_gusb2phyacc0, phy_reg->vstatus_busy, 0);
+ phy_reg->write(val, reg_gusb2phyacc0);
+ ret = utmi_wait_register(phy_reg->read, reg_gusb2phyacc0, phy_reg->vstatus_busy, 0);
if (ret)
return (char)ret;
/* VCtrl = high nibble of addr, and set PHY_NEW_REG_REQ */
val = phy_reg->new_reg_req | (GET_HIGH_NIBBLE(addr) << PHY_VCTRL_SHIFT);
- writel(val, reg_gusb2phyacc0);
- ret = utmi_wait_register(reg_gusb2phyacc0, phy_reg->vstatus_busy, 0);
+ phy_reg->write(val, reg_gusb2phyacc0);
+ ret = utmi_wait_register(phy_reg->read, reg_gusb2phyacc0, phy_reg->vstatus_busy, 0);
if (ret)
return (char)ret;
- val = readl(reg_gusb2phyacc0);
+ val = phy_reg->read(reg_gusb2phyacc0);
return (char)(val & PHY_REG_DATA_MASK);
}
@@ -202,23 +219,23 @@ static int rtk_phy_write(struct phy_reg *phy_reg, char addr, char data)
/* write data to VStatusOut2 (data output to phy) */
writel((u32)data << shift_bits, reg_wrap_vstatus + phy_reg->vstatus_offset);
- ret = utmi_wait_register(reg_gusb2phyacc0, phy_reg->vstatus_busy, 0);
+ ret = utmi_wait_register(phy_reg->read, reg_gusb2phyacc0, phy_reg->vstatus_busy, 0);
if (ret)
return ret;
/* VCtrl = low nibble of addr, set PHY_NEW_REG_REQ */
val = phy_reg->new_reg_req | (GET_LOW_NIBBLE(addr) << PHY_VCTRL_SHIFT);
- writel(val, reg_gusb2phyacc0);
- ret = utmi_wait_register(reg_gusb2phyacc0, phy_reg->vstatus_busy, 0);
+ phy_reg->write(val, reg_gusb2phyacc0);
+ ret = utmi_wait_register(phy_reg->read, reg_gusb2phyacc0, phy_reg->vstatus_busy, 0);
if (ret)
return ret;
/* VCtrl = high nibble of addr, set PHY_NEW_REG_REQ */
val = phy_reg->new_reg_req | (GET_HIGH_NIBBLE(addr) << PHY_VCTRL_SHIFT);
- writel(val, reg_gusb2phyacc0);
- ret = utmi_wait_register(reg_gusb2phyacc0, phy_reg->vstatus_busy, 0);
+ phy_reg->write(val, reg_gusb2phyacc0);
+ ret = utmi_wait_register(phy_reg->read, reg_gusb2phyacc0, phy_reg->vstatus_busy, 0);
if (ret)
return ret;
@@ -984,6 +1001,8 @@ static int parse_phy_data(struct rtk_phy *rtk_phy)
phy_parameter->phy_reg.vstatus_offset = phy_cfg->vstatus_offset;
phy_parameter->phy_reg.vstatus_busy = phy_cfg->vstatus_busy;
phy_parameter->phy_reg.new_reg_req = phy_cfg->new_reg_req;
+ phy_parameter->phy_reg.read = phy_cfg->read;
+ phy_parameter->phy_reg.write = phy_cfg->write;
if (of_property_read_bool(np, "realtek,inverse-hstx-sync-clock"))
phy_parameter->inverse_hstx_sync_clock = true;
@@ -1098,6 +1117,8 @@ static const struct phy_cfg rtd1295_phy_cfg = {
.vstatus_offset = 0,
.vstatus_busy = PHY_VSTS_BUSY,
.new_reg_req = PHY_NEW_REG_REQ,
+ .read = rtk_usb2phy_read,
+ .write = rtk_usb2phy_write,
};
static const struct phy_cfg rtd1395_phy_cfg = {
@@ -1125,6 +1146,8 @@ static const struct phy_cfg rtd1395_phy_cfg = {
.vstatus_offset = 0,
.vstatus_busy = PHY_VSTS_BUSY,
.new_reg_req = PHY_NEW_REG_REQ,
+ .read = rtk_usb2phy_read,
+ .write = rtk_usb2phy_write,
};
static const struct phy_cfg rtd1395_phy_cfg_2port = {
@@ -1152,6 +1175,8 @@ static const struct phy_cfg rtd1395_phy_cfg_2port = {
.vstatus_offset = 0,
.vstatus_busy = PHY_VSTS_BUSY,
.new_reg_req = PHY_NEW_REG_REQ,
+ .read = rtk_usb2phy_read,
+ .write = rtk_usb2phy_write,
};
static const struct phy_cfg rtd1619_phy_cfg = {
@@ -1177,6 +1202,8 @@ static const struct phy_cfg rtd1619_phy_cfg = {
.vstatus_offset = 0,
.vstatus_busy = PHY_VSTS_BUSY,
.new_reg_req = PHY_NEW_REG_REQ,
+ .read = rtk_usb2phy_read,
+ .write = rtk_usb2phy_write,
};
static const struct phy_cfg rtd1319_phy_cfg = {
@@ -1206,6 +1233,8 @@ static const struct phy_cfg rtd1319_phy_cfg = {
.vstatus_offset = 0,
.vstatus_busy = PHY_VSTS_BUSY,
.new_reg_req = PHY_NEW_REG_REQ,
+ .read = rtk_usb2phy_read,
+ .write = rtk_usb2phy_write,
};
static const struct phy_cfg rtd1312c_phy_cfg = {
@@ -1234,6 +1263,8 @@ static const struct phy_cfg rtd1312c_phy_cfg = {
.vstatus_offset = 0,
.vstatus_busy = PHY_VSTS_BUSY,
.new_reg_req = PHY_NEW_REG_REQ,
+ .read = rtk_usb2phy_read,
+ .write = rtk_usb2phy_write,
};
static const struct phy_cfg rtd1619b_phy_cfg = {
@@ -1262,6 +1293,8 @@ static const struct phy_cfg rtd1619b_phy_cfg = {
.vstatus_offset = 0,
.vstatus_busy = PHY_VSTS_BUSY,
.new_reg_req = PHY_NEW_REG_REQ,
+ .read = rtk_usb2phy_read,
+ .write = rtk_usb2phy_write,
};
static const struct phy_cfg rtd1319d_phy_cfg = {
@@ -1290,6 +1323,8 @@ static const struct phy_cfg rtd1319d_phy_cfg = {
.vstatus_offset = 0,
.vstatus_busy = PHY_VSTS_BUSY,
.new_reg_req = PHY_NEW_REG_REQ,
+ .read = rtk_usb2phy_read,
+ .write = rtk_usb2phy_write,
};
static const struct phy_cfg rtd1315e_phy_cfg = {
@@ -1319,6 +1354,8 @@ static const struct phy_cfg rtd1315e_phy_cfg = {
.vstatus_offset = 0,
.vstatus_busy = PHY_VSTS_BUSY,
.new_reg_req = PHY_NEW_REG_REQ,
+ .read = rtk_usb2phy_read,
+ .write = rtk_usb2phy_write,
};
static const struct of_device_id usbphy_rtk_dt_match[] = {
--
2.53.0
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