* Re: [PATCH v3] dt-bindings: gpio: cavium,thunder-8890: Remove DT binding
From: Bartosz Golaszewski @ 2026-04-09 8:38 UTC (permalink / raw)
To: robh, Shi Hao
Cc: Bartosz Golaszewski, brgl, krzk+dt, conor+dt, rric, linux-gpio,
devicetree, linux-kernel
In-Reply-To: <20260408093313.17025-1-i.shihao.999@gmail.com>
On Wed, 08 Apr 2026 15:03:13 +0530, Shi Hao wrote:
> Remove the cavium,thunder-8890 GPIO binding as there are no active
> use cases. A previous attempt was made to convert the binding to DT
> schema, but since the binding is unused, remove it instead.
>
>
I tweaked the commit message as suggested by Krzysztof and queued this.
[1/1] dt-bindings: gpio: cavium,thunder-8890: Remove DT binding
https://git.kernel.org/brgl/c/5bcd451286176202f4ba84b89fd98c7ea74f33a2
Best regards,
--
Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
^ permalink raw reply
* Re: [PATCH 1/2] dt-bindings: arm: qcom,ids: add SOC IDs for IPQ9650 family
From: Krzysztof Kozlowski @ 2026-04-09 8:42 UTC (permalink / raw)
To: Kathiravan Thirumoorthy
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-arm-msm, devicetree, linux-kernel
In-Reply-To: <20260408-ipq9650_soc_ids-v1-1-e76faac33f77@oss.qualcomm.com>
On Wed, Apr 08, 2026 at 03:28:34PM +0530, Kathiravan Thirumoorthy wrote:
> Add SoC IDs for Qualcomm's IPQ9650 family.
I don't see board compatibles being posted, so this could be the place
where you briefly describe the SoCs, including differences between them.
>
> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
> ---
> include/dt-bindings/arm/qcom,ids.h | 6 ++++++
> 1 file changed, 6 insertions(+)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH 3/4] arm64: dts: qcom: sdm845-lg-{judyln, judyp}: Reference memory region in fb
From: David Heidelberg @ 2026-04-09 8:43 UTC (permalink / raw)
To: Paul Sajna, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jeff Johnson, Dmitry Baryshkov
Cc: linux-arm-msm, devicetree, linux-kernel, phone-devel,
~postmarketos/upstreaming, Konrad Dybcio
In-Reply-To: <20260408-judyln-followup-v1-3-823467519b59@postmarketos.org>
On 09/04/2026 04:41, Paul Sajna wrote:
> To prevent duplicating the framebuffer address and size point out the
> existing framebuffer memory region instead of specifying the address
> manually.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Signed-off-by: Paul Sajna <sajattack@postmarketos.org>
> ---
Reviewed-by: David Heidelberg <david@ixit.cz>
^ permalink raw reply
* Re: [PATCH 0/2] Utilize pinctrl-single for bcm7038-style chips
From: Linus Walleij @ 2026-04-09 8:43 UTC (permalink / raw)
To: Florian Fainelli
Cc: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Tony Lindgren, Haojian Zhuang, open list:PIN CONTROL SUBSYSTEM,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:PIN CONTROLLER - SINGLE,
open list:PIN CONTROLLER - SINGLE
In-Reply-To: <20260407235611.550515-1-florian.fainelli@broadcom.com>
On Wed, Apr 8, 2026 at 1:56 AM Florian Fainelli
<florian.fainelli@broadcom.com> wrote:
> This patch set allows Broadcom STB chips with the BCM7038-style
> pinmux/configuration blocks to use pinctrl-single. This does not
> preclude us from making use of a more sophisticated driver in the
> future, should we need to.
OK that's one way to do it. I wonder if this approach also works for
BCMBCA given Haojian's comments on my previous patch attempts.
drivers/pinctrl/bcm/pinctrl-bcm4908.c would then be phased over
to pinctrl-single, or does the MSB/LSB register layout create a
problem? If we always write 0 into MSB I guess we could just add
some quirk...
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 4/4] arm64: dts: qcom: sdm845-lg: Enable qcom,snoc-host-cap-skip-quirk
From: David Heidelberg @ 2026-04-09 8:44 UTC (permalink / raw)
To: Paul Sajna, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jeff Johnson, Dmitry Baryshkov
Cc: linux-arm-msm, devicetree, linux-kernel, phone-devel,
~postmarketos/upstreaming
In-Reply-To: <20260408-judyln-followup-v1-4-823467519b59@postmarketos.org>
On 09/04/2026 04:41, Paul Sajna wrote:
> The WCN3990 firmware for judyln does not respond to the request for
> host capabilities. Add the devicetree quirk to skip this request.
>
> Signed-off-by: Paul Sajna <sajattack@postmarketos.org>
> ---
> arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi
> index 86cf4eb44084..e0c3566761bf 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi
> @@ -694,5 +694,7 @@ &wifi {
> vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
> vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
>
> + qcom,snoc-host-cap-skip-quirk;
> +
> status = "okay";
> };
>
Reviewed-by: David Heidelberg <david@ixit.cz>
^ permalink raw reply
* Re: [PATCH 0/2] Utilize pinctrl-single for bcm7038-style chips
From: Linus Walleij @ 2026-04-09 8:44 UTC (permalink / raw)
To: Florian Fainelli
Cc: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Tony Lindgren, Haojian Zhuang, open list:PIN CONTROL SUBSYSTEM,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:PIN CONTROLLER - SINGLE,
open list:PIN CONTROLLER - SINGLE
In-Reply-To: <20260407235611.550515-1-florian.fainelli@broadcom.com>
On Wed, Apr 8, 2026 at 1:56 AM Florian Fainelli
<florian.fainelli@broadcom.com> wrote:
> This patch set allows Broadcom STB chips with the BCM7038-style
> pinmux/configuration blocks to use pinctrl-single. This does not
> preclude us from making use of a more sophisticated driver in the
> future, should we need to.
Patches applied for v7.1!
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH] dt-bindings: sram: Allow multiple-word prefixes to sram subnode
From: Krzysztof Kozlowski @ 2026-04-09 8:45 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, devicetree,
linux-kernel, Luca Weiss, Konrad Dybcio
In-Reply-To: <20260408-topic-sram_dtbindings_misc-v1-1-00556167e136@oss.qualcomm.com>
On Wed, Apr 08, 2026 at 03:28:13PM +0200, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>
> Currently, foo-sram is allowed, but foo-bar-sram is not.
>
> Allow it so that more complex names aren't unnecessarily simplified.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> ---
> Documentation/devicetree/bindings/sram/sram.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml
> index c451140962c8..b65c2ff846f1 100644
> --- a/Documentation/devicetree/bindings/sram/sram.yaml
> +++ b/Documentation/devicetree/bindings/sram/sram.yaml
> @@ -65,7 +65,7 @@ properties:
> type: boolean
>
> patternProperties:
> - "^([a-z0-9]*-)?sram(-section)?@[a-f0-9]+$":
> + "^([a-z0-9]*-|)+sram(-section)?@[a-f0-9]+$":
'|)' is an odd syntax, not really intuitive. Why this cannot be:
([a-z0-9]+-)*
?
(replacing also * -> + inside)
> type: object
> description:
> Each child of the sram node specifies a region of reserved memory.
>
> ---
> base-commit: f3e6330d7fe42b204af05a2dbc68b379e0ad179e
> change-id: 20260408-topic-sram_dtbindings_misc-5e8834f63d51
>
> Best regards,
> --
> Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>
^ permalink raw reply
* Re: [PATCH v5 2/2] dt-bindings: pinctrl: pinctrl-max77620: convert to DT schema
From: Linus Walleij @ 2026-04-09 8:47 UTC (permalink / raw)
To: Svyatoslav Ryhel
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Liam Girdwood,
Mark Brown, linux-gpio, devicetree, linux-kernel
In-Reply-To: <20260406075114.25672-3-clamor95@gmail.com>
On Mon, Apr 6, 2026 at 9:51 AM Svyatoslav Ryhel <clamor95@gmail.com> wrote:
> Convert pinctrl-max77620 devicetree bindings for the MAX77620 PMIC from
> TXT to YAML format. This patch does not change any functionality; the
> bindings remain the same.
>
> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Patch applied to the pinctrl tree for v7.1 in accordance with Rob's
instructions.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 1/2] dt-bindings: arm: fsl: Add SolidRun i.MX8DXL SoM and HummingBoard
From: Krzysztof Kozlowski @ 2026-04-09 8:48 UTC (permalink / raw)
To: Josua Mayer
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Yazan Shhady, Mikhail Anikin, Alexander Dahl, devicetree,
linux-kernel, imx, linux-arm-kernel
In-Reply-To: <20260408-imx8dxl-sr-som-v1-1-ce5a39acd713@solid-run.com>
On Wed, Apr 08, 2026 at 08:38:36PM +0200, Josua Mayer wrote:
> Add binding for the SolidRun i.MX8DXL based System on Module, and the
> reference HummingBoard Telematics.
>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
> ---
> Documentation/devicetree/bindings/arm/fsl.yaml | 7 +++++++
> 1 file changed, 7 insertions(+)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH 14/19] drm/panel: jadard-jd9365da-h3: support Waveshare DSI panels
From: Linus Walleij @ 2026-04-09 8:50 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Cong Yang, Ondrej Jirman,
Javier Martinez Canillas, Jagan Teki, Liam Girdwood, Mark Brown,
Bartosz Golaszewski, dri-devel, devicetree, linux-kernel,
linux-gpio
In-Reply-To: <z3obsnbmdvvlzs3cxm57osbax4ivg2zq2zk6xgp37n4hni7y6i@smwn362nhn6a>
On Thu, Apr 9, 2026 at 2:49 AM Dmitry Baryshkov
<dmitry.baryshkov@oss.qualcomm.com> wrote:
> > But there is also one more thing, this looks like a big "jam table"
> > with just register+value tuples, so construct something like:
> >
> > struct jadard_jam_tbl_entry {
> > u8 reg;
> > u8 val;
> > };
> >
> > static const struct jadard_jam_tbl_entry jd_3_4_c_init_jam[] = {
> > {0x00, 0x00}, {0x01, 0x41}, ...};
> >
> > (Ideas taken from drivers/net/dsa/realtek/rtl8366rb.c, take a look
> > for code and all, you get the picture.)
>
> Few months ago the code was moved exactly in the opposite direction. We
> added all _multi() functions and made shure that the code is as
> efficient as the register tables. On the other hand, having it as a code
> allows better control. E.g. handling 2/4 lane case would require extra
> hacks to the register tables, while the code handles that without extra
> hacks and without loosing effectiveness.
OK then sorry for the fuzz!
Reviewed-by: Linus Walleij <linusw@kernel.org>
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH v5 0/5] Add binding and driver for Kaanapali SoCCP
From: Jingyi Wang @ 2026-04-09 8:52 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Manivannan Sadhasivam,
Luca Weiss, Bartosz Golaszewski, Konrad Dybcio
Cc: aiqun.yu, tingwei.zhang, trilok.soni, yijie.yang, linux-arm-msm,
linux-remoteproc, devicetree, linux-kernel, Jingyi Wang,
Krzysztof Kozlowski, Gokul Krishna Krishnakumar, Dmitry Baryshkov
Add initial support for SoCCP on Qualcomm Kaanapali platform. SoC Control
Processor (SoCCP) is loaded by bootloader on Kaanapali. PAS loader will
check the state of the subsystem, and set the status "attached" if ping
the subsystem successfully. As the interrupts are redefined differently
for Kaanapali SoCCP, list for the interrupt properties are moved out of
pas-common.
When we return fail in the rproc attach op, current remoteproc core cannot
handle it correctly for further recovery/firmware loading, which should be
generic problem shared across all remoteproc drivers that do attach and
not mandatory for normal bring up, a separate series is used for resolving
this:
https://lore.kernel.org/all/20260409-rproc-attach-issue-v1-0-088a1c348e7a@oss.qualcomm.com/
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
Changes in v5:
- squash "qcom,smem-states" patch with the change changing pas-common
- drop the patch that set recovery_disabled
- remove the 5 seconds timeout in qcom_pas_attach and related logic
- patch rebase and add reviewed-by tag
- Link to v4: https://lore.kernel.org/all/20260310-knp-soccp-v4-0-0a91575e0e7e@oss.qualcomm.com/
Changes in v4:
- drop adsp/cdsp binding that have been applied
- move interrupt list out of pas-common yaml
- add constraint for smem-states in each file
- "wake-ack" interrupt and "wakeup"/"sleep" smem state have been deprecated in design, drop these
- coding style fixup
- add a patch to disable recovery during rproc_add to make sure rproc_report_crash can be called correctly during qcom_pas_attach
- update the handling for irq_get_irqchip_state -ENODEV in attach path
- skip qcom_q6v5_unprepare if the state is RPROC_ATTACHED
- Link to v3: https://lore.kernel.org/all/20251223-knp-remoteproc-v3-0-5b09885c55a5@oss.qualcomm.com
Changes in v3:
- Drop Glymur ADSP/CDSP binding
- Extend the "interrupts" and "interrupt-names" properties in the pas-common
- add missing IPCC_MPROC_SOCCP definition
- fix complie err caused by qcom_q6v5_wcss.c
- code clean up for late attach feature
- call rproc_report_crash() instead of set RPROC_CRASHED state
- fix q6v5.running and q6v5.handover_issued state handling
- if wait_for_completion_timeout return 0, set RPROC_OFFLINE for PAS loader
- Only ping the subsystem if ready_state is set
- Link to v2: https://lore.kernel.org/r/20251029-knp-remoteproc-v2-0-6c81993b52ea@oss.qualcomm.com
Changes in v2:
- Drop MPSS change
- pick Glymur changes from https://lore.kernel.org/linux-arm-msm/20250924183726.509202-1-sibi.sankar@oss.qualcomm.com
- Drop redundant adsp bindings - Dmitry
- Clarify Kaanapali CDSP compatible in commit msg - Krzysztof
- include pas-common.yaml in soccp yaml and extend the common part - Krzysztof
- Clear early_boot flag in the adsp stop callback - Dmitry
- Use .mbn in soccp driver node - Konrad
- Link to v1: https://lore.kernel.org/r/20250924-knp-remoteproc-v1-0-611bf7be8329@oss.qualcomm.com
---
Jingyi Wang (5):
dt-bindings: remoteproc: qcom: cleanup qcom,adsp.yaml
dt-bindings: remoteproc: qcom: move interrupts and interrupt-names list out of pas-common
dt-bindings: remoteproc: qcom: Document pas for SoCCP on Kaanapali and Glymur platforms
remoteproc: qcom: pas: Add late attach support for subsystems
remoteproc: qcom_q6v5_pas: Add SoCCP node on Kaanapali
.../devicetree/bindings/remoteproc/qcom,adsp.yaml | 82 +++++------
.../remoteproc/qcom,kaanapali-soccp-pas.yaml | 154 +++++++++++++++++++++
.../bindings/remoteproc/qcom,milos-pas.yaml | 26 +++-
.../bindings/remoteproc/qcom,pas-common.yaml | 22 +--
.../bindings/remoteproc/qcom,qcs404-pas.yaml | 22 ++-
.../bindings/remoteproc/qcom,sa8775p-pas.yaml | 22 ++-
.../bindings/remoteproc/qcom,sc7180-pas.yaml | 28 ++++
.../bindings/remoteproc/qcom,sc8280xp-pas.yaml | 28 ++++
.../bindings/remoteproc/qcom,sdx55-pas.yaml | 24 +++-
.../bindings/remoteproc/qcom,sm6115-pas.yaml | 28 ++++
.../bindings/remoteproc/qcom,sm6350-pas.yaml | 28 ++++
.../bindings/remoteproc/qcom,sm6375-pas.yaml | 28 ++++
.../bindings/remoteproc/qcom,sm8150-pas.yaml | 28 ++++
.../bindings/remoteproc/qcom,sm8350-pas.yaml | 28 ++++
.../bindings/remoteproc/qcom,sm8550-pas.yaml | 28 ++++
drivers/remoteproc/qcom_q6v5.c | 69 +++++++++
drivers/remoteproc/qcom_q6v5.h | 6 +
drivers/remoteproc/qcom_q6v5_pas.c | 98 ++++++++++++-
18 files changed, 671 insertions(+), 78 deletions(-)
---
base-commit: db7efce4ae23ad5e42f5f55428f529ff62b86fab
change-id: 20260409-knp-soccp-28e989506791
Best regards,
--
Jingyi Wang <jingyi.wang@oss.qualcomm.com>
^ permalink raw reply
* [PATCH v5 1/5] dt-bindings: remoteproc: qcom: cleanup qcom,adsp.yaml
From: Jingyi Wang @ 2026-04-09 8:52 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Manivannan Sadhasivam,
Luca Weiss, Bartosz Golaszewski, Konrad Dybcio
Cc: aiqun.yu, tingwei.zhang, trilok.soni, yijie.yang, linux-arm-msm,
linux-remoteproc, devicetree, linux-kernel, Jingyi Wang,
Krzysztof Kozlowski
In-Reply-To: <20260409-knp-soccp-v5-0-805a492124da@oss.qualcomm.com>
Items in qcom,adsp.yaml has common clock and interrupt properties, move
these out of the allOf section to avoid list the compatible repeatly.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
.../devicetree/bindings/remoteproc/qcom,adsp.yaml | 64 +++++-----------------
1 file changed, 14 insertions(+), 50 deletions(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml
index 16a245fe2738..a270834605da 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml
@@ -32,6 +32,14 @@ properties:
reg:
maxItems: 1
+ clocks:
+ items:
+ - description: XO clock
+
+ clock-names:
+ items:
+ - const: xo
+
cx-supply: true
px-supply:
@@ -49,6 +57,12 @@ properties:
maxItems: 1
description: Firmware name for the Hexagon core
+ interrupts:
+ maxItems: 5
+
+ interrupt-names:
+ maxItems: 5
+
required:
- compatible
- memory-region
@@ -57,56 +71,6 @@ unevaluatedProperties: false
allOf:
- $ref: /schemas/remoteproc/qcom,pas-common.yaml#
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,msm8226-adsp-pil
- - qcom,msm8953-adsp-pil
- - qcom,msm8974-adsp-pil
- - qcom,msm8996-adsp-pil
- - qcom,msm8996-slpi-pil
- - qcom,msm8998-adsp-pas
- - qcom,msm8998-slpi-pas
- - qcom,sdm660-adsp-pas
- - qcom,sdm660-cdsp-pas
- - qcom,sdm845-adsp-pas
- - qcom,sdm845-cdsp-pas
- - qcom,sdm845-slpi-pas
- then:
- properties:
- clocks:
- items:
- - description: XO clock
- clock-names:
- items:
- - const: xo
-
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,msm8226-adsp-pil
- - qcom,msm8953-adsp-pil
- - qcom,msm8974-adsp-pil
- - qcom,msm8996-adsp-pil
- - qcom,msm8996-slpi-pil
- - qcom,msm8998-adsp-pas
- - qcom,msm8998-slpi-pas
- - qcom,sdm660-adsp-pas
- - qcom,sdm660-cdsp-pas
- - qcom,sdm845-adsp-pas
- - qcom,sdm845-cdsp-pas
- - qcom,sdm845-slpi-pas
- then:
- properties:
- interrupts:
- maxItems: 5
- interrupt-names:
- maxItems: 5
-
- if:
properties:
compatible:
--
2.34.1
^ permalink raw reply related
* [PATCH v5 2/5] dt-bindings: remoteproc: qcom: move interrupts and interrupt-names list out of pas-common
From: Jingyi Wang @ 2026-04-09 8:52 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Manivannan Sadhasivam,
Luca Weiss, Bartosz Golaszewski, Konrad Dybcio
Cc: aiqun.yu, tingwei.zhang, trilok.soni, yijie.yang, linux-arm-msm,
linux-remoteproc, devicetree, linux-kernel, Jingyi Wang,
Krzysztof Kozlowski
In-Reply-To: <20260409-knp-soccp-v5-0-805a492124da@oss.qualcomm.com>
Move interrupts and interrupt-names list out of pas-common since they
will be redefined differently for Kaanapali SoCCP.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
.../devicetree/bindings/remoteproc/qcom,adsp.yaml | 14 ++++++++++++--
.../bindings/remoteproc/qcom,milos-pas.yaml | 18 ++++++++++++++----
.../bindings/remoteproc/qcom,pas-common.yaml | 16 ++--------------
.../bindings/remoteproc/qcom,qcs404-pas.yaml | 14 ++++++++++++--
.../bindings/remoteproc/qcom,sa8775p-pas.yaml | 14 ++++++++++++--
.../bindings/remoteproc/qcom,sc7180-pas.yaml | 20 ++++++++++++++++++++
.../bindings/remoteproc/qcom,sc8280xp-pas.yaml | 20 ++++++++++++++++++++
.../bindings/remoteproc/qcom,sdx55-pas.yaml | 16 ++++++++++++++--
.../bindings/remoteproc/qcom,sm6115-pas.yaml | 20 ++++++++++++++++++++
.../bindings/remoteproc/qcom,sm6350-pas.yaml | 20 ++++++++++++++++++++
.../bindings/remoteproc/qcom,sm6375-pas.yaml | 20 ++++++++++++++++++++
.../bindings/remoteproc/qcom,sm8150-pas.yaml | 20 ++++++++++++++++++++
.../bindings/remoteproc/qcom,sm8350-pas.yaml | 20 ++++++++++++++++++++
.../bindings/remoteproc/qcom,sm8550-pas.yaml | 20 ++++++++++++++++++++
14 files changed, 226 insertions(+), 26 deletions(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml
index a270834605da..16c35e15ee1b 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml
@@ -58,10 +58,20 @@ properties:
description: Firmware name for the Hexagon core
interrupts:
- maxItems: 5
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
interrupt-names:
- maxItems: 5
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
required:
- compatible
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,milos-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,milos-pas.yaml
index e5cce0d05fc6..d22d50c1e1ea 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,milos-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,milos-pas.yaml
@@ -34,12 +34,22 @@ properties:
- const: xo
interrupts:
- minItems: 6
- maxItems: 6
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
+ - description: Shutdown acknowledge interrupt
interrupt-names:
- minItems: 6
- maxItems: 6
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
+ - const: shutdown-ack
qcom,qmp:
$ref: /schemas/types.yaml#/definitions/phandle
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml
index 68c17bf18987..dc5a9981c12c 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml
@@ -26,23 +26,11 @@ properties:
interrupts:
minItems: 5
- items:
- - description: Watchdog interrupt
- - description: Fatal interrupt
- - description: Ready interrupt
- - description: Handover interrupt
- - description: Stop acknowledge interrupt
- - description: Shutdown acknowledge interrupt
+ maxItems: 6
interrupt-names:
minItems: 5
- items:
- - const: wdog
- - const: fatal
- - const: ready
- - const: handover
- - const: stop-ack
- - const: shutdown-ack
+ maxItems: 6
iommus:
maxItems: 1
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml
index ad45fd00ae34..5854b3d2041d 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml
@@ -32,10 +32,20 @@ properties:
- const: xo
interrupts:
- maxItems: 5
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
interrupt-names:
- maxItems: 5
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
power-domains: false
power-domain-names: false
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sa8775p-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sa8775p-pas.yaml
index bcd2bcf96e24..7f287e55896e 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sa8775p-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sa8775p-pas.yaml
@@ -59,10 +59,20 @@ properties:
- description: Memory region for main Firmware authentication
interrupts:
- maxItems: 5
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
interrupt-names:
- maxItems: 5
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
required:
- compatible
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml
index 66b455d0a8e3..cb0a61fc301d 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml
@@ -48,6 +48,26 @@ properties:
maxItems: 1
description: Firmware name for the Hexagon core
+ interrupts:
+ minItems: 5
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
+ - description: Shutdown acknowledge interrupt
+
+ interrupt-names:
+ minItems: 5
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
+ - const: shutdown-ack
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml
index 8227527c1d77..fef9d7c39f3c 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml
@@ -45,6 +45,26 @@ properties:
maxItems: 1
description: Firmware name for the Hexagon core
+ interrupts:
+ minItems: 5
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
+ - description: Shutdown acknowledge interrupt
+
+ interrupt-names:
+ minItems: 5
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
+ - const: shutdown-ack
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml
index 8c4abde74915..2bbd427c6ea4 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml
@@ -30,10 +30,22 @@ properties:
- const: xo
interrupts:
- minItems: 6
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
+ - description: Shutdown acknowledge interrupt
interrupt-names:
- minItems: 6
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
+ - const: shutdown-ack
power-domains:
items:
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml
index eeb6a8aafeb9..987fac433fae 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml
@@ -51,6 +51,26 @@ properties:
maxItems: 1
description: Firmware name for the Hexagon core
+ interrupts:
+ minItems: 5
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
+ - description: Shutdown acknowledge interrupt
+
+ interrupt-names:
+ minItems: 5
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
+ - const: shutdown-ack
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml
index c1a3cc308bdb..53ffb1ccd199 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml
@@ -45,6 +45,26 @@ properties:
maxItems: 1
description: Firmware name for the Hexagon core
+ interrupts:
+ minItems: 5
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
+ - description: Shutdown acknowledge interrupt
+
+ interrupt-names:
+ minItems: 5
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
+ - const: shutdown-ack
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm6375-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm6375-pas.yaml
index 7286b2baa19f..6823a2a8d74e 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm6375-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm6375-pas.yaml
@@ -39,6 +39,26 @@ properties:
maxItems: 1
description: Firmware name for the Hexagon core
+ interrupts:
+ minItems: 5
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
+ - description: Shutdown acknowledge interrupt
+
+ interrupt-names:
+ minItems: 5
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
+ - const: shutdown-ack
+
smd-edge: false
required:
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml
index a8cddf7e2fe1..8a1fae095a3b 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml
@@ -61,6 +61,26 @@ properties:
maxItems: 1
description: Firmware name for the Hexagon core
+ interrupts:
+ minItems: 5
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
+ - description: Shutdown acknowledge interrupt
+
+ interrupt-names:
+ minItems: 5
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
+ - const: shutdown-ack
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml
index 6d09823153fc..4ea7518db537 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml
@@ -55,6 +55,26 @@ properties:
maxItems: 1
description: Firmware name for the Hexagon core
+ interrupts:
+ minItems: 5
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
+ - description: Shutdown acknowledge interrupt
+
+ interrupt-names:
+ minItems: 5
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
+ - const: shutdown-ack
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
index 1e4db0c9fcf9..74df49b5fbe9 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
@@ -73,6 +73,26 @@ properties:
- description: DSM Memory region 2
- description: Memory region for Qlink Logging
+ interrupts:
+ minItems: 5
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
+ - description: Shutdown acknowledge interrupt
+
+ interrupt-names:
+ minItems: 5
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
+ - const: shutdown-ack
+
required:
- compatible
- reg
--
2.34.1
^ permalink raw reply related
* [PATCH v5 3/5] dt-bindings: remoteproc: qcom: Document pas for SoCCP on Kaanapali and Glymur platforms
From: Jingyi Wang @ 2026-04-09 8:52 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Manivannan Sadhasivam,
Luca Weiss, Bartosz Golaszewski, Konrad Dybcio
Cc: aiqun.yu, tingwei.zhang, trilok.soni, yijie.yang, linux-arm-msm,
linux-remoteproc, devicetree, linux-kernel, Jingyi Wang,
Krzysztof Kozlowski
In-Reply-To: <20260409-knp-soccp-v5-0-805a492124da@oss.qualcomm.com>
Document the component used to boot SoCCP on Kaanapali SoC and add
compatible for Glymur SoCCP which could fallback to Kaanapali. Extend
the "qcom,smem-states", "qcom,smem-state-names" in the pas-common
and add maxItems constraints for SMEM properties in the documents
that reference to pas-common.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
.../devicetree/bindings/remoteproc/qcom,adsp.yaml | 8 ++
.../remoteproc/qcom,kaanapali-soccp-pas.yaml | 154 +++++++++++++++++++++
.../bindings/remoteproc/qcom,milos-pas.yaml | 8 ++
.../bindings/remoteproc/qcom,pas-common.yaml | 6 +-
.../bindings/remoteproc/qcom,qcs404-pas.yaml | 8 ++
.../bindings/remoteproc/qcom,sa8775p-pas.yaml | 8 ++
.../bindings/remoteproc/qcom,sc7180-pas.yaml | 8 ++
.../bindings/remoteproc/qcom,sc8280xp-pas.yaml | 8 ++
.../bindings/remoteproc/qcom,sdx55-pas.yaml | 8 ++
.../bindings/remoteproc/qcom,sm6115-pas.yaml | 8 ++
.../bindings/remoteproc/qcom,sm6350-pas.yaml | 8 ++
.../bindings/remoteproc/qcom,sm6375-pas.yaml | 8 ++
.../bindings/remoteproc/qcom,sm8150-pas.yaml | 8 ++
.../bindings/remoteproc/qcom,sm8350-pas.yaml | 8 ++
.../bindings/remoteproc/qcom,sm8550-pas.yaml | 8 ++
15 files changed, 263 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml
index 16c35e15ee1b..7e8ecae8e6cb 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml
@@ -73,6 +73,14 @@ properties:
- const: handover
- const: stop-ack
+ qcom,smem-states:
+ maxItems: 1
+ description: States used by the AP to signal the Hexagon core
+
+ qcom,smem-state-names:
+ maxItems: 1
+ description: The names of the state bits used for SMP2P output
+
required:
- compatible
- memory-region
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,kaanapali-soccp-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,kaanapali-soccp-pas.yaml
new file mode 100644
index 000000000000..ce18460a949f
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,kaanapali-soccp-pas.yaml
@@ -0,0 +1,154 @@
+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/remoteproc/qcom,kaanapali-soccp-pas.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Kaanapali SoCCP Peripheral Authentication Service
+
+maintainers:
+ - Jingyi Wang <jingyi.wang@oss.qualcomm.com>
+
+description:
+ The SoC Control Processor (SoCCP) is a small RISC-V MCU that controls USB
+ Type-C, battery charging and various other functions on Qualcomm SoCs, somewhat
+ analogous to traditional PC Embedded Controllers. This document describes
+ the Peripheral Authentication Service that loads and boots firmware for SoCCP.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - qcom,glymur-soccp-pas
+ - const: qcom,kaanapali-soccp-pas
+ - enum:
+ - qcom,kaanapali-soccp-pas
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: XO clock
+
+ clock-names:
+ items:
+ - const: xo
+
+ power-domains:
+ items:
+ - description: CX power domain
+ - description: MX power domain
+
+ power-domain-names:
+ items:
+ - const: cx
+ - const: mx
+
+ firmware-name:
+ items:
+ - description: Firmware name of the SoC Control Processor
+ - description: Firmware name of the SoCCP Devicetree
+
+ memory-region:
+ items:
+ - description: Memory region for main Firmware authentication
+ - description: Memory region for Devicetree Firmware authentication
+
+ interrupts:
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
+ - description: Pong interrupt
+
+ interrupt-names:
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
+ - const: pong
+
+ qcom,smem-states:
+ minItems: 2
+ description: States used by the AP to signal the SoC Control Processor
+
+ qcom,smem-state-names:
+ minItems: 2
+ description: The names of the state bits used for SMP2P output
+
+required:
+ - compatible
+ - reg
+ - memory-region
+ - power-domains
+ - power-domain-names
+
+allOf:
+ - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,rpmh.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/mailbox/qcom-ipcc.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+ #define IPCC_MPROC_SOCCP
+
+ remoteproc@d00000 {
+ compatible = "qcom,kaanapali-soccp-pas";
+ reg = <0x00d00000 0x200000>;
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ interrupts-extended = <&intc GIC_SPI 167 IRQ_TYPE_EDGE_RISING>,
+ <&soccp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&soccp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&soccp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&soccp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&soccp_smp2p_in 9 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog",
+ "fatal",
+ "ready",
+ "handover",
+ "stop-ack",
+ "pong";
+
+ memory-region = <&soccp_mem>,
+ <&soccp_dtb_mem_mem>;
+
+ firmware-name = "qcom/kaanapali/soccp.mbn",
+ "qcom/kaanapali/soccp_dtb.mbn";
+
+ power-domains = <&rpmhpd RPMHPD_CX>,
+ <&rpmhpd RPMHPD_MX>;
+ power-domain-names = "cx",
+ "mx";
+
+ qcom,smem-states = <&soccp_smp2p_out 0>,
+ <&soccp_smp2p_out 8>;
+ qcom,smem-state-names = "stop",
+ "ping";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_MPROC_SOCCP
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_MPROC_SOCCP
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "soccp";
+ qcom,remote-pid = <19>;
+
+ /* ... */
+ };
+ };
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,milos-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,milos-pas.yaml
index d22d50c1e1ea..99d7337e58ec 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,milos-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,milos-pas.yaml
@@ -69,6 +69,14 @@ properties:
- description: Memory region for core Firmware authentication
- description: Memory region for Devicetree Firmware authentication
+ qcom,smem-states:
+ maxItems: 1
+ description: States used by the AP to signal the Hexagon core
+
+ qcom,smem-state-names:
+ maxItems: 1
+ description: The names of the state bits used for SMP2P output
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml
index dc5a9981c12c..e81ef400555a 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml
@@ -46,13 +46,17 @@ properties:
qcom,smem-states:
$ref: /schemas/types.yaml#/definitions/phandle-array
description: States used by the AP to signal the Hexagon core
+ minItems: 1
items:
- - description: Stop the modem
+ - description: Stop the remoteproc
+ - description: ping the remoteproc
qcom,smem-state-names:
description: The names of the state bits used for SMP2P output
+ minItems: 1
items:
- const: stop
+ - const: ping
smd-edge:
$ref: /schemas/remoteproc/qcom,smd-edge.yaml#
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml
index 5854b3d2041d..bf9bf1af9ff1 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml
@@ -59,6 +59,14 @@ properties:
maxItems: 1
description: Firmware name for the Hexagon core
+ qcom,smem-states:
+ maxItems: 1
+ description: States used by the AP to signal the Hexagon core
+
+ qcom,smem-state-names:
+ maxItems: 1
+ description: The names of the state bits used for SMP2P output
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sa8775p-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sa8775p-pas.yaml
index 7f287e55896e..dda2d144b720 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sa8775p-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sa8775p-pas.yaml
@@ -74,6 +74,14 @@ properties:
- const: handover
- const: stop-ack
+ qcom,smem-states:
+ maxItems: 1
+ description: States used by the AP to signal the Hexagon core
+
+ qcom,smem-state-names:
+ maxItems: 1
+ description: The names of the state bits used for SMP2P output
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml
index cb0a61fc301d..b20780e5e26b 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml
@@ -68,6 +68,14 @@ properties:
- const: stop-ack
- const: shutdown-ack
+ qcom,smem-states:
+ maxItems: 1
+ description: States used by the AP to signal the Hexagon core
+
+ qcom,smem-state-names:
+ maxItems: 1
+ description: The names of the state bits used for SMP2P output
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml
index fef9d7c39f3c..4bbe4a986c7c 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml
@@ -65,6 +65,14 @@ properties:
- const: stop-ack
- const: shutdown-ack
+ qcom,smem-states:
+ maxItems: 1
+ description: States used by the AP to signal the Hexagon core
+
+ qcom,smem-state-names:
+ maxItems: 1
+ description: The names of the state bits used for SMP2P output
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml
index 2bbd427c6ea4..8c16b01c53e4 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml
@@ -71,6 +71,14 @@ properties:
maxItems: 1
description: Firmware name for the Hexagon core
+ qcom,smem-states:
+ maxItems: 1
+ description: States used by the AP to signal the Hexagon core
+
+ qcom,smem-state-names:
+ maxItems: 1
+ description: The names of the state bits used for SMP2P output
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml
index 987fac433fae..454ba82bd6f1 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml
@@ -71,6 +71,14 @@ properties:
- const: stop-ack
- const: shutdown-ack
+ qcom,smem-states:
+ maxItems: 1
+ description: States used by the AP to signal the Hexagon core
+
+ qcom,smem-state-names:
+ maxItems: 1
+ description: The names of the state bits used for SMP2P output
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml
index 53ffb1ccd199..42e02c64347a 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml
@@ -65,6 +65,14 @@ properties:
- const: stop-ack
- const: shutdown-ack
+ qcom,smem-states:
+ maxItems: 1
+ description: States used by the AP to signal the Hexagon core
+
+ qcom,smem-state-names:
+ maxItems: 1
+ description: The names of the state bits used for SMP2P output
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm6375-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm6375-pas.yaml
index 6823a2a8d74e..274f87880e2e 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm6375-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm6375-pas.yaml
@@ -61,6 +61,14 @@ properties:
smd-edge: false
+ qcom,smem-states:
+ maxItems: 1
+ description: States used by the AP to signal the Hexagon core
+
+ qcom,smem-state-names:
+ maxItems: 1
+ description: The names of the state bits used for SMP2P output
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml
index 8a1fae095a3b..5a7c5f8c92d1 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml
@@ -81,6 +81,14 @@ properties:
- const: stop-ack
- const: shutdown-ack
+ qcom,smem-states:
+ maxItems: 1
+ description: States used by the AP to signal the Hexagon core
+
+ qcom,smem-state-names:
+ maxItems: 1
+ description: The names of the state bits used for SMP2P output
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml
index 4ea7518db537..72d0db5698c5 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml
@@ -75,6 +75,14 @@ properties:
- const: stop-ack
- const: shutdown-ack
+ qcom,smem-states:
+ maxItems: 1
+ description: States used by the AP to signal the Hexagon core
+
+ qcom,smem-state-names:
+ maxItems: 1
+ description: The names of the state bits used for SMP2P output
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
index 74df49b5fbe9..0b44141d31ee 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
@@ -93,6 +93,14 @@ properties:
- const: stop-ack
- const: shutdown-ack
+ qcom,smem-states:
+ maxItems: 1
+ description: States used by the AP to signal the Hexagon core
+
+ qcom,smem-state-names:
+ maxItems: 1
+ description: The names of the state bits used for SMP2P output
+
required:
- compatible
- reg
--
2.34.1
^ permalink raw reply related
* [PATCH v5 4/5] remoteproc: qcom: pas: Add late attach support for subsystems
From: Jingyi Wang @ 2026-04-09 8:52 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Manivannan Sadhasivam,
Luca Weiss, Bartosz Golaszewski, Konrad Dybcio
Cc: aiqun.yu, tingwei.zhang, trilok.soni, yijie.yang, linux-arm-msm,
linux-remoteproc, devicetree, linux-kernel, Jingyi Wang,
Gokul Krishna Krishnakumar
In-Reply-To: <20260409-knp-soccp-v5-0-805a492124da@oss.qualcomm.com>
Subsystems can be brought out of reset by entities such as bootloaders.
As the irq enablement could be later than subsystem bring up, the state
of subsystem should be checked by reading SMP2P bits and performing ping
test.
A new qcom_pas_attach() function is introduced. if a crash state is
detected for the subsystem, rproc_report_crash() is called. If the
subsystem is ready and the ping is successful, it will be marked as
"attached". If ready irq is not received, it could be the early boot
feature is not supported by other entities. In this case, the state will
be marked as RPROC_OFFLINE so that the PAS driver can load the firmware
and start the remoteproc.
Co-developed-by: Gokul Krishna Krishnakumar <gokul.krishnakumar@oss.qualcomm.com>
Signed-off-by: Gokul Krishna Krishnakumar <gokul.krishnakumar@oss.qualcomm.com>
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
drivers/remoteproc/qcom_q6v5.c | 69 ++++++++++++++++++++++++++++++++
drivers/remoteproc/qcom_q6v5.h | 6 +++
drivers/remoteproc/qcom_q6v5_pas.c | 80 ++++++++++++++++++++++++++++++++++++--
3 files changed, 152 insertions(+), 3 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5.c b/drivers/remoteproc/qcom_q6v5.c
index 58d5b85e58cd..52247c17c38a 100644
--- a/drivers/remoteproc/qcom_q6v5.c
+++ b/drivers/remoteproc/qcom_q6v5.c
@@ -20,6 +20,7 @@
#define Q6V5_LOAD_STATE_MSG_LEN 64
#define Q6V5_PANIC_DELAY_MS 200
+#define Q6V5_PING_TIMEOUT_MS 500
static int q6v5_load_state_toggle(struct qcom_q6v5 *q6v5, bool enable)
{
@@ -234,6 +235,74 @@ unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5)
}
EXPORT_SYMBOL_GPL(qcom_q6v5_panic);
+static irqreturn_t q6v5_pong_interrupt(int irq, void *data)
+{
+ struct qcom_q6v5 *q6v5 = data;
+
+ complete(&q6v5->ping_done);
+
+ return IRQ_HANDLED;
+}
+
+int qcom_q6v5_ping_subsystem(struct qcom_q6v5 *q6v5)
+{
+ int ret;
+ int ping_failed = 0;
+
+ reinit_completion(&q6v5->ping_done);
+
+ /* Set master kernel Ping bit */
+ ret = qcom_smem_state_update_bits(q6v5->ping_state,
+ BIT(q6v5->ping_bit), BIT(q6v5->ping_bit));
+ if (ret) {
+ dev_err(q6v5->dev, "Failed to update ping bits\n");
+ return ret;
+ }
+
+ ret = wait_for_completion_timeout(&q6v5->ping_done, msecs_to_jiffies(Q6V5_PING_TIMEOUT_MS));
+ if (!ret) {
+ ping_failed = -ETIMEDOUT;
+ dev_err(q6v5->dev, "Failed to get back pong\n");
+ }
+
+ /* Clear ping bit master kernel */
+ ret = qcom_smem_state_update_bits(q6v5->ping_state, BIT(q6v5->ping_bit), 0);
+ if (ret) {
+ dev_err(q6v5->dev, "Failed to clear master kernel bits\n");
+ return ret;
+ }
+
+ return ping_failed;
+}
+EXPORT_SYMBOL_GPL(qcom_q6v5_ping_subsystem);
+
+int qcom_q6v5_ping_subsystem_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev)
+{
+ int ret = -ENODEV;
+
+ q6v5->ping_state = devm_qcom_smem_state_get(&pdev->dev, "ping", &q6v5->ping_bit);
+ if (IS_ERR(q6v5->ping_state)) {
+ dev_err(&pdev->dev, "Failed to acquire smem state %ld\n",
+ PTR_ERR(q6v5->ping_state));
+ return PTR_ERR(q6v5->ping_state);
+ }
+
+ init_completion(&q6v5->ping_done);
+
+ q6v5->pong_irq = platform_get_irq_byname(pdev, "pong");
+ if (q6v5->pong_irq < 0)
+ return q6v5->pong_irq;
+
+ ret = devm_request_threaded_irq(&pdev->dev, q6v5->pong_irq, NULL,
+ q6v5_pong_interrupt, IRQF_TRIGGER_RISING | IRQF_ONESHOT,
+ "q6v5 pong", q6v5);
+ if (ret)
+ dev_err(&pdev->dev, "Failed to acquire pong IRQ\n");
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(qcom_q6v5_ping_subsystem_init);
+
/**
* qcom_q6v5_init() - initializer of the q6v5 common struct
* @q6v5: handle to be initialized
diff --git a/drivers/remoteproc/qcom_q6v5.h b/drivers/remoteproc/qcom_q6v5.h
index 5a859c41896e..5025ffc4dbe8 100644
--- a/drivers/remoteproc/qcom_q6v5.h
+++ b/drivers/remoteproc/qcom_q6v5.h
@@ -17,22 +17,26 @@ struct qcom_q6v5 {
struct rproc *rproc;
struct qcom_smem_state *state;
+ struct qcom_smem_state *ping_state;
struct qmp *qmp;
struct icc_path *path;
unsigned stop_bit;
+ unsigned int ping_bit;
int wdog_irq;
int fatal_irq;
int ready_irq;
int handover_irq;
int stop_irq;
+ int pong_irq;
bool handover_issued;
struct completion start_done;
struct completion stop_done;
+ struct completion ping_done;
int crash_reason;
@@ -52,5 +56,7 @@ int qcom_q6v5_unprepare(struct qcom_q6v5 *q6v5);
int qcom_q6v5_request_stop(struct qcom_q6v5 *q6v5, struct qcom_sysmon *sysmon);
int qcom_q6v5_wait_for_start(struct qcom_q6v5 *q6v5, int timeout);
unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5);
+int qcom_q6v5_ping_subsystem(struct qcom_q6v5 *q6v5);
+int qcom_q6v5_ping_subsystem_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev);
#endif
diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
index da27d1d3c9da..34b54cf832d0 100644
--- a/drivers/remoteproc/qcom_q6v5_pas.c
+++ b/drivers/remoteproc/qcom_q6v5_pas.c
@@ -60,6 +60,7 @@ struct qcom_pas_data {
int region_assign_count;
bool region_assign_shared;
int region_assign_vmid;
+ bool early_boot;
};
struct qcom_pas {
@@ -423,9 +424,15 @@ static int qcom_pas_stop(struct rproc *rproc)
qcom_pas_unmap_carveout(rproc, pas->mem_phys, pas->mem_size);
- handover = qcom_q6v5_unprepare(&pas->q6v5);
- if (handover)
- qcom_pas_handover(&pas->q6v5);
+ /*
+ * qcom_q6v5_prepare is not called in qcom_pas_attach, skip unprepare to
+ * avoid mismatch.
+ */
+ if (pas->rproc->state != RPROC_ATTACHED) {
+ handover = qcom_q6v5_unprepare(&pas->q6v5);
+ if (handover)
+ qcom_pas_handover(&pas->q6v5);
+ }
if (pas->smem_host_id)
ret = qcom_smem_bust_hwspin_lock_by_host(pas->smem_host_id);
@@ -510,6 +517,63 @@ static unsigned long qcom_pas_panic(struct rproc *rproc)
return qcom_q6v5_panic(&pas->q6v5);
}
+static int qcom_pas_attach(struct rproc *rproc)
+{
+ int ret;
+ struct qcom_pas *pas = rproc->priv;
+ bool ready_state;
+ bool crash_state;
+
+ pas->q6v5.running = true;
+ ret = irq_get_irqchip_state(pas->q6v5.fatal_irq,
+ IRQCHIP_STATE_LINE_LEVEL, &crash_state);
+
+ if (ret)
+ goto disable_running;
+
+ if (crash_state) {
+ dev_err(pas->dev, "Subsystem has crashed before driver probe\n");
+ rproc_report_crash(rproc, RPROC_FATAL_ERROR);
+ ret = -EINVAL;
+ goto disable_running;
+ }
+
+ ret = irq_get_irqchip_state(pas->q6v5.ready_irq,
+ IRQCHIP_STATE_LINE_LEVEL, &ready_state);
+
+ if (ret)
+ goto disable_running;
+
+ if (unlikely(!ready_state)) {
+ /*
+ * The bootloader may not support early boot, mark the state as
+ * RPROC_OFFLINE so that the PAS driver can load the firmware and
+ * start the remoteproc.
+ */
+ dev_err(pas->dev, "Failed to get subsystem ready interrupt\n");
+ pas->rproc->state = RPROC_OFFLINE;
+ ret = -EINVAL;
+ goto disable_running;
+ }
+
+ ret = qcom_q6v5_ping_subsystem(&pas->q6v5);
+
+ if (ret) {
+ dev_err(pas->dev, "Failed to ping subsystem, assuming device crashed\n");
+ rproc_report_crash(rproc, RPROC_FATAL_ERROR);
+ goto disable_running;
+ }
+
+ pas->q6v5.handover_issued = true;
+
+ return 0;
+
+disable_running:
+ pas->q6v5.running = false;
+
+ return ret;
+}
+
static const struct rproc_ops qcom_pas_ops = {
.unprepare = qcom_pas_unprepare,
.start = qcom_pas_start,
@@ -518,6 +582,7 @@ static const struct rproc_ops qcom_pas_ops = {
.parse_fw = qcom_pas_parse_firmware,
.load = qcom_pas_load,
.panic = qcom_pas_panic,
+ .attach = qcom_pas_attach,
};
static const struct rproc_ops qcom_pas_minidump_ops = {
@@ -855,6 +920,15 @@ static int qcom_pas_probe(struct platform_device *pdev)
pas->pas_ctx->use_tzmem = rproc->has_iommu;
pas->dtb_pas_ctx->use_tzmem = rproc->has_iommu;
+
+ if (desc->early_boot) {
+ ret = qcom_q6v5_ping_subsystem_init(&pas->q6v5, pdev);
+ if (ret)
+ dev_warn(&pdev->dev, "Falling back to firmware load\n");
+ else
+ pas->rproc->state = RPROC_DETACHED;
+ }
+
ret = rproc_add(rproc);
if (ret)
goto remove_ssr_sysmon;
--
2.34.1
^ permalink raw reply related
* [PATCH v5 5/5] remoteproc: qcom_q6v5_pas: Add SoCCP node on Kaanapali
From: Jingyi Wang @ 2026-04-09 8:52 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Manivannan Sadhasivam,
Luca Weiss, Bartosz Golaszewski, Konrad Dybcio
Cc: aiqun.yu, tingwei.zhang, trilok.soni, yijie.yang, linux-arm-msm,
linux-remoteproc, devicetree, linux-kernel, Jingyi Wang,
Dmitry Baryshkov
In-Reply-To: <20260409-knp-soccp-v5-0-805a492124da@oss.qualcomm.com>
The SoC Control Processor (SoCCP) is small RISC-V MCU that controls
USB Type-C, battery charging and various other functions on Qualcomm SoCs.
It provides a solution for control-plane processing, reducing per-subsystem
microcontroller reinvention. Add support for SoCCP PAS loader on Kaanapali
platform.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
drivers/remoteproc/qcom_q6v5_pas.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
index 34b54cf832d0..1c81f22438cc 100644
--- a/drivers/remoteproc/qcom_q6v5_pas.c
+++ b/drivers/remoteproc/qcom_q6v5_pas.c
@@ -1604,8 +1604,26 @@ static const struct qcom_pas_data sm8750_mpss_resource = {
.region_assign_vmid = QCOM_SCM_VMID_MSS_MSA,
};
+static const struct qcom_pas_data kaanapali_soccp_resource = {
+ .crash_reason_smem = 656,
+ .firmware_name = "soccp.mbn",
+ .dtb_firmware_name = "soccp_dtb.mbn",
+ .pas_id = 51,
+ .dtb_pas_id = 0x41,
+ .proxy_pd_names = (char*[]){
+ "cx",
+ "mx",
+ NULL
+ },
+ .ssr_name = "soccp",
+ .sysmon_name = "soccp",
+ .auto_boot = true,
+ .early_boot = true,
+};
+
static const struct of_device_id qcom_pas_of_match[] = {
{ .compatible = "qcom,eliza-adsp-pas", .data = &sm8550_adsp_resource },
+ { .compatible = "qcom,kaanapali-soccp-pas", .data = &kaanapali_soccp_resource },
{ .compatible = "qcom,milos-adsp-pas", .data = &sm8550_adsp_resource },
{ .compatible = "qcom,milos-cdsp-pas", .data = &milos_cdsp_resource },
{ .compatible = "qcom,milos-mpss-pas", .data = &sm8450_mpss_resource },
--
2.34.1
^ permalink raw reply related
* Re: [PATCH v2 0/2] pinctrl: qcom: Introduce Pinctrl for Hawi SoC
From: Linus Walleij @ 2026-04-09 8:53 UTC (permalink / raw)
To: Mukesh Ojha
Cc: Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-msm, linux-gpio, devicetree, linux-kernel,
Konrad Dybcio
In-Reply-To: <20260408-hawi-pinctrl-v2-0-fd7f681f5e05@oss.qualcomm.com>
On Wed, Apr 8, 2026 at 4:16 PM Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> wrote:
> Introduce Top Level Mode Multiplexer dt-binding and driver for upcoming
> Qualcomm Hawi SoC.
All was reviewed quickly so patches applied for kernel v7.1,
because why not.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH v4 00/12] ASoC: rsnd: Add RZ/G3E audio driver support
From: John Madieu @ 2026-04-09 9:02 UTC (permalink / raw)
To: Kuninori Morimoto, Mark Brown, Liam Girdwood, Geert Uytterhoeven
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela,
Takashi Iwai, Magnus Damm, Philipp Zabel, Claudiu Beznea,
Biju Das, john.madieu, linux-sound, linux-renesas-soc, devicetree,
linux-kernel, John Madieu
Add audio support for the Renesas RZ/G3E SoC to the R-Car Sound
driver. The RZ/G3E audio subsystem is based on R-Car Sound IP but
has several differences requiring dedicated handling:
- SSI operates exclusively in BUSIF mode (no PIO)
- 2-4 BUSIF channels per SSI (layout differs from R-Car)
- Separate register regions for SCU, ADG, SSIU, SSI accessed by name
- Per-SSI ADG and SSIF supply clocks
- Dedicated audmacpp clock/reset for Audio DMAC peri-peri
- Per-SSI and per-module reset controllers via CPG
Changes:
v4:
- Add reset_control_assert() in rsnd_mod_quit() for symmetry with
deassert in rsnd_mod_init() (Mark Brown)
- Fix RSND_SOC_MASK to (0xF << 4) to avoid overlap with RSND_RZ_MASK.
Add nibble layout comment documenting the flag bit allocation
- Move audmapp_clk and audmapp_rstc from struct rsnd_priv
into struct rsnd_dma_ctrl
- Replace raw [3][2][3] DMA address array with named
structs (rsnd_dma_addr_dir, rsnd_dma_addr_map) for self-documenting
table initializers
- Move busif_status_count from file-static into new
struct rsnd_ssiu_ctrl, following the rsnd_dma_ctrl pattern.
Remove duplicate priv variable. Properly propagate reset errors
via dev_err_probe()
- Clarify commit message regarding PIO mode still being available on
R-Car
- Collapse dev_err_probe() and rsnd_mod_init() calls to single lines
- Move per-SSI ADG and SSIF supply clock prepare/unprepare
into rsnd_adg_clk_control() instead of separate functions, eliminating
hw_params prepare leak concern. Return proper errors on clk_enable()
failure
- Move shared SCU clocks from file-statics into new
struct rsnd_src_ctrl, following the rsnd_dma_ctrl pattern. Keep
original declaration order for struct device_node *node
- Merge rsnd_adg_mod_get() helper directly into this
patch instead of a separate preparatory patch. Distribute
suspend/resume declarations into their respective IP sections in rsnd.h
- Drop former patch 12/14 "Add rsnd_adg_mod_get() for PM support":
merged into patch 12/12
- Drop former patch 13/14 "Export rsnd_ssiu_mod_get() for PM support":
function was unused
v3:
- Split out from v2 series [1] to ASoC-specific patchset.
v2:
- Split of rsnd.yaml into common and R-Car-specific schemas
- Introduce RZ/G3E sound binding as a standalone schema
- Addressed Kuninori'comments, details are in individual patches
[1] https://lore.kernel.org/all/20260402090524.9137-1-john.madieu.xa@bp.renesas.com/
John Madieu (12):
ASoC: dt-bindings: renesas,rsnd: Split into generic and SoC-specific
parts
ASoC: dt-bindings: Add RZ/G3E (R9A09G047) sound binding
ASoC: rsnd: Add reset controller support to rsnd_mod
ASoC: rsnd: Add RZ/G3E SoC probing and register map
ASoC: rsnd: Add audmacpp clock and reset support for RZ/G3E
ASoC: rsnd: Add RZ/G3E DMA address calculation support
ASoC: rsnd: ssui: Add RZ/G3E SSIU BUSIF support
ASoC: rsnd: Add SSI reset support for RZ/G3E platforms
ASoC: rsnd: Add ADG reset support for RZ/G3E
ASoC: rsnd: adg: Add per-SSI ADG and SSIF supply clock management
ASoC: rsnd: src: Add SRC reset and clock support for RZ/G3E
ASoC: rsnd: Add system suspend/resume support
.../sound/renesas,r9a09g047-sound.yaml | 371 ++++++++++++++++++
.../bindings/sound/renesas,rsnd-common.yaml | 196 +++++++++
.../bindings/sound/renesas,rsnd.yaml | 319 ++++-----------
sound/soc/renesas/rcar/adg.c | 125 +++++-
sound/soc/renesas/rcar/cmd.c | 2 +-
sound/soc/renesas/rcar/core.c | 61 ++-
sound/soc/renesas/rcar/ctu.c | 22 +-
sound/soc/renesas/rcar/dma.c | 274 ++++++++++---
sound/soc/renesas/rcar/dvc.c | 22 +-
sound/soc/renesas/rcar/gen.c | 180 +++++++++
sound/soc/renesas/rcar/mix.c | 22 +-
sound/soc/renesas/rcar/rsnd.h | 51 ++-
sound/soc/renesas/rcar/src.c | 85 +++-
sound/soc/renesas/rcar/ssi.c | 33 +-
sound/soc/renesas/rcar/ssiu.c | 83 +++-
15 files changed, 1518 insertions(+), 328 deletions(-)
create mode 100644 Documentation/devicetree/bindings/sound/renesas,r9a09g047-sound.yaml
create mode 100644 Documentation/devicetree/bindings/sound/renesas,rsnd-common.yaml
--
2.25.1
^ permalink raw reply
* [PATCH v4 01/12] ASoC: dt-bindings: renesas,rsnd: Split into generic and SoC-specific parts
From: John Madieu @ 2026-04-09 9:02 UTC (permalink / raw)
To: Kuninori Morimoto, Mark Brown, Liam Girdwood, Geert Uytterhoeven
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela,
Takashi Iwai, Magnus Damm, Philipp Zabel, Claudiu Beznea,
Biju Das, john.madieu, linux-sound, linux-renesas-soc, devicetree,
linux-kernel, John Madieu
In-Reply-To: <20260409090302.2243305-1-john.madieu.xa@bp.renesas.com>
The current renesas,rsnd.yaml binding file handles all supported SoCs
in a single schema, resulting in deeply nested if/else/then constructs
that become increasingly difficult to maintain. Each new SoC addition
amplifies this complexity, making reviews harder and diffs noisier than
they need to be.
Refactor the binding by extracting the common properties shared across
all SoCs into a dedicated renesas,rsnd-common.yaml schema, and keeping
only SoC-specific constraints (required nodes, port counts, clock names,
etc.) in per-SoC or per-family files that $ref the common part.
This prepares the ground for upcoming SoCs such as the RZ/G3E, which
introduces a different set of audio resources compared to existing
R-Car Gen variants. With the split in place, adding RZ/G3E support
becomes a self-contained change that neither bloats a monolithic schema
nor buries new constraints inside ever-deeper conditional blocks.
No functional change in validation behaviour for existing device trees.
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
---
Changes:
v4: No changes
v3: No changes
v2:
- Split of rsnd.yaml into common and R-Car-specific schemas
.../bindings/sound/renesas,rsnd-common.yaml | 196 +++++++++++
.../bindings/sound/renesas,rsnd.yaml | 319 +++++-------------
2 files changed, 274 insertions(+), 241 deletions(-)
create mode 100644 Documentation/devicetree/bindings/sound/renesas,rsnd-common.yaml
diff --git a/Documentation/devicetree/bindings/sound/renesas,rsnd-common.yaml b/Documentation/devicetree/bindings/sound/renesas,rsnd-common.yaml
new file mode 100644
index 000000000000..ec6bf644d1a4
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/renesas,rsnd-common.yaml
@@ -0,0 +1,196 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/renesas,rsnd-common.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas R-Car/RZ Sound Common Properties
+
+maintainers:
+ - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+
+description:
+ Common property and subnode definitions shared by Renesas R-Car and RZ
+ sound controller bindings.
+
+select: false
+
+properties:
+ compatible: true
+
+ reg: true
+
+ reg-names: true
+
+ "#sound-dai-cells":
+ description:
+ Must be 0 for a single-DAI system and 1 for a multi-DAI system.
+ enum: [0, 1]
+
+ "#clock-cells":
+ description:
+ Must be 0 when the system has audio_clkout and 1 when it has
+ audio_clkout0/1/2/3.
+ enum: [0, 1]
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ clock-frequency:
+ description: Audio clock output frequency for audio_clkout0/1/2/3.
+
+ clkout-lr-asynchronous:
+ description: audio_clkoutn is asynchronous with lr-clock.
+ $ref: /schemas/types.yaml#/definitions/flag
+
+ power-domains: true
+
+ resets: true
+
+ reset-names: true
+
+ clocks: true
+
+ clock-names: true
+
+ port:
+ $ref: audio-graph-port.yaml#/definitions/port-base
+ unevaluatedProperties: false
+ patternProperties:
+ "^endpoint(@[0-9a-f]+)?$":
+ $ref: audio-graph-port.yaml#/definitions/endpoint-base
+ properties:
+ playback:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ capture:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ unevaluatedProperties: false
+
+ rcar_sound,dvc:
+ description: DVC subnode.
+ type: object
+ patternProperties:
+ "^dvc-[0-1]$":
+ type: object
+ additionalProperties: false
+ properties:
+ dmas: true
+ dma-names: true
+ required:
+ - dmas
+ - dma-names
+ additionalProperties: false
+
+ rcar_sound,mix:
+ description: MIX subnode.
+ type: object
+ patternProperties:
+ "^mix-[0-1]$":
+ type: object
+ additionalProperties: false
+ additionalProperties: false
+
+ rcar_sound,ctu:
+ description: CTU subnode.
+ type: object
+ patternProperties:
+ "^ctu-[0-7]$":
+ type: object
+ additionalProperties: false
+ additionalProperties: false
+
+ rcar_sound,src:
+ description: SRC subnode.
+ type: object
+ patternProperties:
+ "^src-[0-9]$":
+ type: object
+ additionalProperties: false
+ properties:
+ interrupts:
+ maxItems: 1
+ dmas: true
+ dma-names: true
+ additionalProperties: false
+
+ rcar_sound,ssiu:
+ description: SSIU subnode.
+ type: object
+ patternProperties:
+ "^ssiu-[0-9]+$":
+ type: object
+ additionalProperties: false
+ properties:
+ dmas: true
+ dma-names: true
+ required:
+ - dmas
+ - dma-names
+ additionalProperties: false
+
+ rcar_sound,ssi:
+ description: SSI subnode.
+ type: object
+ patternProperties:
+ "^ssi-[0-9]$":
+ type: object
+ additionalProperties: false
+ properties:
+ interrupts:
+ maxItems: 1
+ dmas: true
+ dma-names: true
+ shared-pin:
+ description: Shared clock pin.
+ $ref: /schemas/types.yaml#/definitions/flag
+ pio-transfer:
+ description: PIO transfer mode.
+ $ref: /schemas/types.yaml#/definitions/flag
+ no-busif:
+ description: BUSIF is not used for the mem-to-SSI via DMA case.
+ $ref: /schemas/types.yaml#/definitions/flag
+ required:
+ - interrupts
+ additionalProperties: false
+
+patternProperties:
+ 'rcar_sound,dai(@[0-9a-f]+)?$':
+ description: DAI subnode.
+ type: object
+ patternProperties:
+ "^dai([0-9]+)?$":
+ type: object
+ additionalProperties: false
+ properties:
+ playback:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ capture:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ anyOf:
+ - required:
+ - playback
+ - required:
+ - capture
+ additionalProperties: false
+
+ 'ports(@[0-9a-f]+)?$':
+ $ref: audio-graph-port.yaml#/definitions/port-base
+ unevaluatedProperties: false
+ patternProperties:
+ '^port(@[0-9a-f]+)?$':
+ $ref: "#/properties/port"
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - clock-names
+
+allOf:
+ - $ref: dai-common.yaml#
+
+additionalProperties: true
diff --git a/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml b/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml
index e8a2acb92646..0d989922a5b4 100644
--- a/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml
+++ b/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml
@@ -9,8 +9,11 @@ title: Renesas R-Car Sound Driver
maintainers:
- Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-properties:
+description:
+ Binding for Renesas R-Car Gen1/Gen2/Gen3/Gen4 and RZ/G1/G2 sound
+ controllers using the standard RSND layout.
+properties:
compatible:
oneOf:
# for Gen1 SoC
@@ -67,34 +70,6 @@ properties:
minItems: 1
maxItems: 5
- "#sound-dai-cells":
- description: |
- it must be 0 if your system is using single DAI
- it must be 1 if your system is using multi DAIs
- This is used on simple-audio-card
- enum: [0, 1]
-
- "#clock-cells":
- description: |
- it must be 0 if your system has audio_clkout
- it must be 1 if your system has audio_clkout0/1/2/3
- enum: [0, 1]
-
- "#address-cells":
- const: 1
-
- "#size-cells":
- const: 0
-
- clock-frequency:
- description: for audio_clkout0/1/2/3
-
- clkout-lr-asynchronous:
- description: audio_clkoutn is asynchronizes with lr-clock.
- $ref: /schemas/types.yaml#/definitions/flag
-
- power-domains: true
-
resets:
minItems: 1
maxItems: 11
@@ -109,181 +84,45 @@ properties:
maxItems: 31
clock-names:
- description: List of necessary clock names.
- # details are defined below
-
- # ports is below
- port:
- $ref: audio-graph-port.yaml#/definitions/port-base
- unevaluatedProperties: false
- patternProperties:
- "^endpoint(@[0-9a-f]+)?":
- $ref: audio-graph-port.yaml#/definitions/endpoint-base
- properties:
- playback:
- $ref: /schemas/types.yaml#/definitions/phandle-array
- capture:
- $ref: /schemas/types.yaml#/definitions/phandle-array
- unevaluatedProperties: false
-
- rcar_sound,dvc:
- description: DVC subnode.
- type: object
- patternProperties:
- "^dvc-[0-1]$":
- type: object
- additionalProperties: false
-
- properties:
- dmas:
- maxItems: 1
- dma-names:
- const: tx
- required:
- - dmas
- - dma-names
- additionalProperties: false
-
- rcar_sound,mix:
- description: MIX subnode.
- type: object
- patternProperties:
- "^mix-[0-1]$":
- type: object
- additionalProperties: false
- additionalProperties: false
-
- rcar_sound,ctu:
- description: CTU subnode.
- type: object
- patternProperties:
- "^ctu-[0-7]$":
- type: object
- additionalProperties: false
- additionalProperties: false
-
- rcar_sound,src:
- description: SRC subnode.
- type: object
- patternProperties:
- "^src-[0-9]$":
- type: object
- additionalProperties: false
-
- properties:
- interrupts:
- maxItems: 1
- dmas:
- maxItems: 2
- dma-names:
- allOf:
- - items:
- enum:
- - tx
- - rx
- additionalProperties: false
-
- rcar_sound,ssiu:
- description: SSIU subnode.
- type: object
- patternProperties:
- "^ssiu-[0-9]+$":
- type: object
- additionalProperties: false
-
- properties:
- dmas:
- maxItems: 2
- dma-names:
- allOf:
- - items:
- enum:
- - tx
- - rx
- required:
- - dmas
- - dma-names
- additionalProperties: false
-
- rcar_sound,ssi:
- description: SSI subnode.
- type: object
- patternProperties:
- "^ssi-[0-9]$":
- type: object
- additionalProperties: false
-
- properties:
- interrupts:
- maxItems: 1
- dmas:
- minItems: 2
- maxItems: 4
- dma-names:
- allOf:
- - items:
- enum:
- - tx
- - rx
- - txu # if no ssiu node
- - rxu # if no ssiu node
-
- shared-pin:
- description: shared clock pin
- $ref: /schemas/types.yaml#/definitions/flag
- pio-transfer:
- description: PIO transfer mode
- $ref: /schemas/types.yaml#/definitions/flag
- no-busif:
- description: BUSIF is not used when [mem -> SSI] via DMA case
- $ref: /schemas/types.yaml#/definitions/flag
- required:
- - interrupts
- additionalProperties: false
+ description: List of clock names.
+ minItems: 1
+ maxItems: 31
+
+ "#sound-dai-cells": true
+
+ "#clock-cells": true
+
+ "#address-cells": true
+
+ "#size-cells": true
+
+ clock-frequency: true
+
+ clkout-lr-asynchronous: true
+
+ power-domains: true
+
+ port: true
+
+ rcar_sound,dvc: true
+
+ rcar_sound,mix: true
+
+ rcar_sound,ctu: true
+
+ rcar_sound,src: true
+
+ rcar_sound,ssiu: true
+
+ rcar_sound,ssi: true
patternProperties:
- # For DAI base
- 'rcar_sound,dai(@[0-9a-f]+)?$':
- description: DAI subnode.
- type: object
- patternProperties:
- "^dai([0-9]+)?$":
- type: object
- additionalProperties: false
-
- properties:
- playback:
- $ref: /schemas/types.yaml#/definitions/phandle-array
- capture:
- $ref: /schemas/types.yaml#/definitions/phandle-array
- anyOf:
- - required:
- - playback
- - required:
- - capture
- additionalProperties: false
-
- 'ports(@[0-9a-f]+)?$':
- $ref: audio-graph-port.yaml#/definitions/port-base
- unevaluatedProperties: false
- patternProperties:
- '^port(@[0-9a-f]+)?$':
- $ref: "#/properties/port"
-
-required:
- - compatible
- - reg
- - reg-names
- - clocks
- - clock-names
+ 'rcar_sound,dai(@[0-9a-f]+)?$': true
+ 'ports(@[0-9a-f]+)?$': true
allOf:
- - $ref: dai-common.yaml#
+ - $ref: renesas,rsnd-common.yaml#
- # --------------------
- # reg/reg-names
- # --------------------
- # for Gen1
- if:
properties:
compatible:
@@ -295,11 +134,10 @@ allOf:
maxItems: 3
reg-names:
items:
- enum:
- - sru
- - ssi
- - adg
- # for Gen2/Gen3
+ - const: sru
+ - const: ssi
+ - const: adg
+
- if:
properties:
compatible:
@@ -310,16 +148,34 @@ allOf:
then:
properties:
reg:
- minItems: 5
+ maxItems: 5
reg-names:
items:
- enum:
- - scu
- - adg
- - ssiu
- - ssi
- - audmapp
- # for Gen4
+ - const: scu
+ - const: adg
+ - const: ssiu
+ - const: ssi
+ - const: audmapp
+ resets:
+ maxItems: 11
+ reset-names:
+ items:
+ oneOf:
+ - const: ssi-all
+ - pattern: '^ssi\.[0-9]$'
+ clocks:
+ maxItems: 31
+ clock-names:
+ items:
+ oneOf:
+ - const: ssi-all
+ - pattern: '^ssi\.[0-9]$'
+ - pattern: '^src\.[0-9]$'
+ - pattern: '^mix\.[0-1]$'
+ - pattern: '^ctu\.[0-1]$'
+ - pattern: '^dvc\.[0-1]$'
+ - pattern: '^clk_(a|b|c|i)$'
+
- if:
properties:
compatible:
@@ -336,38 +192,19 @@ allOf:
- ssiu
- ssi
- sdmc
-
- # --------------------
- # clock-names
- # --------------------
- - if:
- properties:
- compatible:
- contains:
- const: renesas,rcar_sound-gen4
- then:
- properties:
- clock-names:
- maxItems: 3
+ resets:
+ maxItems: 2
+ reset-names:
items:
- enum:
- - ssi.0
- - ssiu.0
- - clkin
- else:
- properties:
+ - const: ssiu.0
+ - const: ssi.0
+ clocks:
+ maxItems: 3
clock-names:
- minItems: 1
- maxItems: 31
items:
- oneOf:
- - const: ssi-all
- - pattern: '^ssi\.[0-9]$'
- - pattern: '^src\.[0-9]$'
- - pattern: '^mix\.[0-1]$'
- - pattern: '^ctu\.[0-1]$'
- - pattern: '^dvc\.[0-1]$'
- - pattern: '^clk_(a|b|c|i)$'
+ - const: ssiu.0
+ - const: ssi.0
+ - const: clkin
unevaluatedProperties: false
--
2.25.1
^ permalink raw reply related
* [PATCH v4 02/12] ASoC: dt-bindings: Add RZ/G3E (R9A09G047) sound binding
From: John Madieu @ 2026-04-09 9:02 UTC (permalink / raw)
To: Kuninori Morimoto, Mark Brown, Liam Girdwood, Geert Uytterhoeven
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela,
Takashi Iwai, Magnus Damm, Philipp Zabel, Claudiu Beznea,
Biju Das, john.madieu, linux-sound, linux-renesas-soc, devicetree,
linux-kernel, John Madieu
In-Reply-To: <20260409090302.2243305-1-john.madieu.xa@bp.renesas.com>
The RZ/G3E shares the same audio IP as the R-Car variants but differs
in several aspects: it supports up to 5 DMA controllers per audio
channel, requires additional clocks (47 total including per-SSI ADG
clocks, SCU domain clocks and SSIF supply) and additional reset lines
(14 total including SCU, ADG and Audio DMAC peri-peri resets).
Add a dedicated devicetree binding for the RZ/G3E sound controller.
The binding references the common renesas,rsnd-common.yaml schema for
shared property and subnode definitions.
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
---
Changes:
v4: No changes
v3: No changes
v2:
- Introduce RZ/G3E sound binding as a standalone schema
.../sound/renesas,r9a09g047-sound.yaml | 371 ++++++++++++++++++
1 file changed, 371 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/renesas,r9a09g047-sound.yaml
diff --git a/Documentation/devicetree/bindings/sound/renesas,r9a09g047-sound.yaml b/Documentation/devicetree/bindings/sound/renesas,r9a09g047-sound.yaml
new file mode 100644
index 000000000000..1dfe9bab3382
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/renesas,r9a09g047-sound.yaml
@@ -0,0 +1,371 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/renesas,r9a09g047-sound.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas RZ/G3E Sound Controller
+
+maintainers:
+ - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+ - John Madieu <john.madieu.xa@bp.renesas.com>
+
+description:
+ The RZ/G3E (R9A09G047) integrates an R-Car compatible sound controller
+ with extended DMA channel support (up to 5 DMACs per direction), additional
+ clock domains, and additional reset lines compared to the R-Car Gen2/Gen3
+ variants.
+
+allOf:
+ - $ref: renesas,rsnd-common.yaml#
+
+properties:
+ compatible:
+ const: renesas,r9a09g047-sound
+
+ reg:
+ maxItems: 5
+
+ reg-names:
+ items:
+ - const: scu
+ - const: adg
+ - const: ssiu
+ - const: ssi
+ - const: audmapp
+
+ clocks:
+ maxItems: 47
+
+ clock-names:
+ items:
+ - const: ssi-all
+ - const: ssi.9
+ - const: ssi.8
+ - const: ssi.7
+ - const: ssi.6
+ - const: ssi.5
+ - const: ssi.4
+ - const: ssi.3
+ - const: ssi.2
+ - const: ssi.1
+ - const: ssi.0
+ - const: src.9
+ - const: src.8
+ - const: src.7
+ - const: src.6
+ - const: src.5
+ - const: src.4
+ - const: src.3
+ - const: src.2
+ - const: src.1
+ - const: src.0
+ - const: mix.1
+ - const: mix.0
+ - const: ctu.1
+ - const: ctu.0
+ - const: dvc.0
+ - const: dvc.1
+ - const: clk_a
+ - const: clk_b
+ - const: clk_c
+ - const: clk_i
+ - const: ssif_supply
+ - const: scu
+ - const: scu_x2
+ - const: scu_supply
+ - const: adg.ssi.9
+ - const: adg.ssi.8
+ - const: adg.ssi.7
+ - const: adg.ssi.6
+ - const: adg.ssi.5
+ - const: adg.ssi.4
+ - const: adg.ssi.3
+ - const: adg.ssi.2
+ - const: adg.ssi.1
+ - const: adg.ssi.0
+ - const: audmapp
+ - const: adg
+
+ resets:
+ maxItems: 14
+
+ reset-names:
+ items:
+ - const: ssi-all
+ - const: ssi.9
+ - const: ssi.8
+ - const: ssi.7
+ - const: ssi.6
+ - const: ssi.5
+ - const: ssi.4
+ - const: ssi.3
+ - const: ssi.2
+ - const: ssi.1
+ - const: ssi.0
+ - const: scu
+ - const: adg
+ - const: audmapp
+
+ rcar_sound,dvc:
+ description: DVC subnode.
+ type: object
+ patternProperties:
+ "^dvc-[0-1]$":
+ type: object
+ additionalProperties: false
+ properties:
+ dmas:
+ maxItems: 5
+ dma-names:
+ maxItems: 5
+ allOf:
+ - items:
+ enum:
+ - tx
+ required:
+ - dmas
+ - dma-names
+ additionalProperties: false
+
+ rcar_sound,src:
+ description: SRC subnode.
+ type: object
+ patternProperties:
+ "^src-[0-9]$":
+ type: object
+ additionalProperties: false
+ properties:
+ interrupts:
+ maxItems: 1
+ dmas:
+ maxItems: 10
+ dma-names:
+ maxItems: 10
+ allOf:
+ - items:
+ enum:
+ - tx
+ - rx
+ additionalProperties: false
+
+ rcar_sound,ssiu:
+ description: SSIU subnode.
+ type: object
+ patternProperties:
+ "^ssiu-[0-9]+$":
+ type: object
+ additionalProperties: false
+ properties:
+ dmas:
+ maxItems: 10
+ dma-names:
+ maxItems: 10
+ allOf:
+ - items:
+ enum:
+ - tx
+ - rx
+ required:
+ - dmas
+ - dma-names
+ additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - clock-names
+ - resets
+ - reset-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ snd_rzg3e: sound@13c00000 {
+ #sound-dai-cells = <1>;
+ #clock-cells = <0>;
+ compatible = "renesas,r9a09g047-sound";
+ reg = <0x13c00000 0x10000>,
+ <0x13c20000 0x10000>,
+ <0x13c30000 0x1000>,
+ <0x13c31000 0x1f000>,
+ <0x13c50000 0x10000>;
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+ clocks = <&cpg 245>,
+ <&cpg 394>, <&cpg 393>,
+ <&cpg 392>, <&cpg 391>,
+ <&cpg 390>, <&cpg 389>,
+ <&cpg 388>, <&cpg 387>,
+ <&cpg 386>, <&cpg 385>,
+ <&cpg 381>, <&cpg 380>,
+ <&cpg 379>, <&cpg 378>,
+ <&cpg 377>, <&cpg 376>,
+ <&cpg 375>, <&cpg 374>,
+ <&cpg 373>, <&cpg 372>,
+ <&cpg 371>, <&cpg 370>,
+ <&cpg 371>, <&cpg 370>,
+ <&cpg 368>, <&cpg 369>,
+ <&audio_clk_a>, <&audio_clk_b>,
+ <&audio_clk_c>, <&audio_clk_i>,
+ <&cpg 384>,
+ <&cpg 246>, <&cpg 247>,
+ <&cpg 382>,
+ <&cpg 361>, <&cpg 360>,
+ <&cpg 359>, <&cpg 358>,
+ <&cpg 357>, <&cpg 356>,
+ <&cpg 355>, <&cpg 354>,
+ <&cpg 353>, <&cpg 352>,
+ <&cpg 248>, <&cpg 249>;
+
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8",
+ "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4",
+ "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "src.9", "src.8",
+ "src.7", "src.6",
+ "src.5", "src.4",
+ "src.3", "src.2",
+ "src.1", "src.0",
+ "mix.1", "mix.0",
+ "ctu.1", "ctu.0",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b",
+ "clk_c", "clk_i",
+ "ssif_supply",
+ "scu", "scu_x2",
+ "scu_supply",
+ "adg.ssi.9", "adg.ssi.8",
+ "adg.ssi.7", "adg.ssi.6",
+ "adg.ssi.5", "adg.ssi.4",
+ "adg.ssi.3", "adg.ssi.2",
+ "adg.ssi.1", "adg.ssi.0",
+ "audmapp", "adg";
+
+ power-domains = <&cpg>;
+
+ resets = <&cpg 225>,
+ <&cpg 235>, <&cpg 234>, <&cpg 233>, <&cpg 232>,
+ <&cpg 231>, <&cpg 230>, <&cpg 229>, <&cpg 228>,
+ <&cpg 227>, <&cpg 226>,
+ <&cpg 236>, <&cpg 238>, <&cpg 237>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "scu", "adg", "audmapp";
+
+ rcar_sound,ssi {
+ ssi0: ssi-0 {
+ interrupts = <GIC_SPI 889 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ ssi3: ssi-3 {
+ interrupts = <GIC_SPI 892 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ ssi4: ssi-4 {
+ interrupts = <GIC_SPI 893 IRQ_TYPE_LEVEL_HIGH>;
+ shared-pin;
+ };
+ };
+
+ rcar_sound,ssiu {
+ ssiu30: ssiu-12 {
+ dmas = <&dmac0 0x1d79>, <&dmac0 0x1d7a>,
+ <&dmac1 0x1d79>, <&dmac1 0x1d7a>,
+ <&dmac2 0x1d79>, <&dmac2 0x1d7a>,
+ <&dmac3 0x1d79>, <&dmac3 0x1d7a>,
+ <&dmac4 0x1d79>, <&dmac4 0x1d7a>;
+ dma-names = "tx", "rx", "tx", "rx", "tx", "rx",
+ "tx", "rx", "tx", "rx";
+ };
+ ssiu40: ssiu-16 {
+ dmas = <&dmac0 0x1d81>, <&dmac0 0x1d82>,
+ <&dmac1 0x1d81>, <&dmac1 0x1d82>,
+ <&dmac2 0x1d81>, <&dmac2 0x1d82>,
+ <&dmac3 0x1d81>, <&dmac3 0x1d82>,
+ <&dmac4 0x1d81>, <&dmac4 0x1d82>;
+ dma-names = "tx", "rx", "tx", "rx", "tx", "rx",
+ "tx", "rx", "tx", "rx";
+ };
+ };
+
+ rcar_sound,src {
+ src0: src-0 {
+ interrupts = <GIC_SPI 902 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&dmac0 0x1d9f>, <&dmac0 0x1da9>,
+ <&dmac1 0x1d9f>, <&dmac1 0x1da9>,
+ <&dmac2 0x1d9f>, <&dmac2 0x1da9>,
+ <&dmac3 0x1d9f>, <&dmac3 0x1da9>,
+ <&dmac4 0x1d9f>, <&dmac4 0x1da9>;
+ dma-names = "rx", "tx", "rx", "tx", "rx", "tx",
+ "rx", "tx", "rx", "tx";
+ };
+ src1: src-1 {
+ interrupts = <GIC_SPI 903 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&dmac0 0x1da0>, <&dmac0 0x1daa>,
+ <&dmac1 0x1da0>, <&dmac1 0x1daa>,
+ <&dmac2 0x1da0>, <&dmac2 0x1daa>,
+ <&dmac3 0x1da0>, <&dmac3 0x1daa>,
+ <&dmac4 0x1da0>, <&dmac4 0x1daa>;
+ dma-names = "rx", "tx", "rx", "tx", "rx", "tx",
+ "rx", "tx", "rx", "tx";
+ };
+ };
+
+ rcar_sound,dvc {
+ dvc0: dvc-0 {
+ dmas = <&dmac0 0x1db3>,
+ <&dmac1 0x1db3>,
+ <&dmac2 0x1db3>,
+ <&dmac3 0x1db3>,
+ <&dmac4 0x1db3>;
+ dma-names = "tx", "tx", "tx", "tx", "tx";
+ };
+ dvc1: dvc-1 {
+ dmas = <&dmac0 0x1db4>,
+ <&dmac1 0x1db4>,
+ <&dmac2 0x1db4>,
+ <&dmac3 0x1db4>,
+ <&dmac4 0x1db4>;
+ dma-names = "tx", "tx", "tx", "tx", "tx";
+ };
+ };
+
+ rcar_sound,dai {
+ dai0 {
+ playback = <&ssi3>, <&src1>, <&dvc1>;
+ capture = <&ssi4>, <&src0>, <&dvc0>;
+ };
+ };
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ rsnd_port0: port@0 {
+ reg = <0>;
+ rsnd_endpoint0: endpoint {
+ remote-endpoint = <&codec_endpoint>;
+ dai-format = "i2s";
+ bitclock-master = <&rsnd_endpoint0>;
+ frame-master = <&rsnd_endpoint0>;
+ playback = <&ssi3>, <&src1>, <&dvc1>;
+ capture = <&ssi4>, <&src0>, <&dvc0>;
+ };
+ };
+ };
+ };
+
+ codec {
+ port {
+ codec_endpoint: endpoint {
+ remote-endpoint = <&rsnd_endpoint0>;
+ };
+ };
+ };
--
2.25.1
^ permalink raw reply related
* [PATCH v4 03/12] ASoC: rsnd: Add reset controller support to rsnd_mod
From: John Madieu @ 2026-04-09 9:02 UTC (permalink / raw)
To: Kuninori Morimoto, Mark Brown, Liam Girdwood, Geert Uytterhoeven
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela,
Takashi Iwai, Magnus Damm, Philipp Zabel, Claudiu Beznea,
Biju Das, john.madieu, linux-sound, linux-renesas-soc, devicetree,
linux-kernel, John Madieu
In-Reply-To: <20260409090302.2243305-1-john.madieu.xa@bp.renesas.com>
The RZ/G3E SoC requires per-module reset control for the audio subsystem.
Add reset controller support to struct rsnd_mod and update rsnd_mod_init()
to accept and handle a reset_control parameter and mirror it in
rsnd_mod_quit().
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
---
v4:
- Add reset_control_assert() in rsnd_mod_quit() for symmetry with
deassert in rsnd_mod_init()
v3: No changes
v2: No changes
sound/soc/renesas/rcar/adg.c | 2 +-
sound/soc/renesas/rcar/cmd.c | 2 +-
sound/soc/renesas/rcar/core.c | 16 +++++++++++++++-
sound/soc/renesas/rcar/ctu.c | 2 +-
sound/soc/renesas/rcar/dma.c | 4 ++--
sound/soc/renesas/rcar/dvc.c | 2 +-
sound/soc/renesas/rcar/mix.c | 2 +-
sound/soc/renesas/rcar/rsnd.h | 3 +++
sound/soc/renesas/rcar/src.c | 2 +-
sound/soc/renesas/rcar/ssi.c | 2 +-
sound/soc/renesas/rcar/ssiu.c | 2 +-
11 files changed, 28 insertions(+), 11 deletions(-)
diff --git a/sound/soc/renesas/rcar/adg.c b/sound/soc/renesas/rcar/adg.c
index 8641b73d1f77..0105c60a144e 100644
--- a/sound/soc/renesas/rcar/adg.c
+++ b/sound/soc/renesas/rcar/adg.c
@@ -780,7 +780,7 @@ int rsnd_adg_probe(struct rsnd_priv *priv)
return -ENOMEM;
ret = rsnd_mod_init(priv, &adg->mod, &adg_ops,
- NULL, 0, 0);
+ NULL, NULL, 0, 0);
if (ret)
return ret;
diff --git a/sound/soc/renesas/rcar/cmd.c b/sound/soc/renesas/rcar/cmd.c
index 8d9a1e345a22..13beef389797 100644
--- a/sound/soc/renesas/rcar/cmd.c
+++ b/sound/soc/renesas/rcar/cmd.c
@@ -171,7 +171,7 @@ int rsnd_cmd_probe(struct rsnd_priv *priv)
for_each_rsnd_cmd(cmd, priv, i) {
int ret = rsnd_mod_init(priv, rsnd_mod_get(cmd),
- &rsnd_cmd_ops, NULL,
+ &rsnd_cmd_ops, NULL, NULL,
RSND_MOD_CMD, i);
if (ret)
return ret;
diff --git a/sound/soc/renesas/rcar/core.c b/sound/soc/renesas/rcar/core.c
index 69fb19964a71..28467e45acab 100644
--- a/sound/soc/renesas/rcar/core.c
+++ b/sound/soc/renesas/rcar/core.c
@@ -90,6 +90,7 @@
*
*/
+#include <linux/delay.h>
#include <linux/pm_runtime.h>
#include <linux/of_graph.h>
#include "rsnd.h"
@@ -196,18 +197,29 @@ int rsnd_mod_init(struct rsnd_priv *priv,
struct rsnd_mod *mod,
struct rsnd_mod_ops *ops,
struct clk *clk,
+ struct reset_control *rstc,
enum rsnd_mod_type type,
int id)
{
- int ret = clk_prepare(clk);
+ int ret;
+ ret = clk_prepare_enable(clk);
if (ret)
return ret;
+ ret = reset_control_deassert(rstc);
+ if (ret) {
+ clk_disable_unprepare(clk);
+ return ret;
+ }
+
+ clk_disable(clk);
+
mod->id = id;
mod->ops = ops;
mod->type = type;
mod->clk = clk;
+ mod->rstc = rstc;
mod->priv = priv;
return 0;
@@ -217,6 +229,8 @@ void rsnd_mod_quit(struct rsnd_mod *mod)
{
clk_unprepare(mod->clk);
mod->clk = NULL;
+ reset_control_assert(mod->rstc);
+ mod->rstc = NULL;
}
void rsnd_mod_interrupt(struct rsnd_mod *mod,
diff --git a/sound/soc/renesas/rcar/ctu.c b/sound/soc/renesas/rcar/ctu.c
index bd4c61f9fb3c..81bba6a1af6e 100644
--- a/sound/soc/renesas/rcar/ctu.c
+++ b/sound/soc/renesas/rcar/ctu.c
@@ -360,7 +360,7 @@ int rsnd_ctu_probe(struct rsnd_priv *priv)
}
ret = rsnd_mod_init(priv, rsnd_mod_get(ctu), &rsnd_ctu_ops,
- clk, RSND_MOD_CTU, i);
+ clk, NULL, RSND_MOD_CTU, i);
if (ret)
goto rsnd_ctu_probe_done;
diff --git a/sound/soc/renesas/rcar/dma.c b/sound/soc/renesas/rcar/dma.c
index 2035ce06fe4c..68c859897e68 100644
--- a/sound/soc/renesas/rcar/dma.c
+++ b/sound/soc/renesas/rcar/dma.c
@@ -803,7 +803,7 @@ static int rsnd_dma_alloc(struct rsnd_dai_stream *io, struct rsnd_mod *mod,
*dma_mod = rsnd_mod_get(dma);
- ret = rsnd_mod_init(priv, *dma_mod, ops, NULL,
+ ret = rsnd_mod_init(priv, *dma_mod, ops, NULL, NULL,
type, dma_id);
if (ret < 0)
return ret;
@@ -879,5 +879,5 @@ int rsnd_dma_probe(struct rsnd_priv *priv)
priv->dma = dmac;
/* dummy mem mod for debug */
- return rsnd_mod_init(NULL, &mem, &mem_ops, NULL, 0, 0);
+ return rsnd_mod_init(NULL, &mem, &mem_ops, NULL, NULL, 0, 0);
}
diff --git a/sound/soc/renesas/rcar/dvc.c b/sound/soc/renesas/rcar/dvc.c
index 988cbddbc611..bf7146ceb5f6 100644
--- a/sound/soc/renesas/rcar/dvc.c
+++ b/sound/soc/renesas/rcar/dvc.c
@@ -364,7 +364,7 @@ int rsnd_dvc_probe(struct rsnd_priv *priv)
}
ret = rsnd_mod_init(priv, rsnd_mod_get(dvc), &rsnd_dvc_ops,
- clk, RSND_MOD_DVC, i);
+ clk, NULL, RSND_MOD_DVC, i);
if (ret)
goto rsnd_dvc_probe_done;
diff --git a/sound/soc/renesas/rcar/mix.c b/sound/soc/renesas/rcar/mix.c
index aea74e703305..566e9b2a488c 100644
--- a/sound/soc/renesas/rcar/mix.c
+++ b/sound/soc/renesas/rcar/mix.c
@@ -328,7 +328,7 @@ int rsnd_mix_probe(struct rsnd_priv *priv)
}
ret = rsnd_mod_init(priv, rsnd_mod_get(mix), &rsnd_mix_ops,
- clk, RSND_MOD_MIX, i);
+ clk, NULL, RSND_MOD_MIX, i);
if (ret)
goto rsnd_mix_probe_done;
diff --git a/sound/soc/renesas/rcar/rsnd.h b/sound/soc/renesas/rcar/rsnd.h
index 04c70690f7a2..cd7e7df62298 100644
--- a/sound/soc/renesas/rcar/rsnd.h
+++ b/sound/soc/renesas/rcar/rsnd.h
@@ -15,6 +15,7 @@
#include <linux/list.h>
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/reset.h>
#include <linux/sh_dma.h>
#include <linux/workqueue.h>
#include <sound/soc.h>
@@ -353,6 +354,7 @@ struct rsnd_mod {
struct rsnd_mod_ops *ops;
struct rsnd_priv *priv;
struct clk *clk;
+ struct reset_control *rstc;
u32 status;
};
/*
@@ -420,6 +422,7 @@ int rsnd_mod_init(struct rsnd_priv *priv,
struct rsnd_mod *mod,
struct rsnd_mod_ops *ops,
struct clk *clk,
+ struct reset_control *rstc,
enum rsnd_mod_type type,
int id);
void rsnd_mod_quit(struct rsnd_mod *mod);
diff --git a/sound/soc/renesas/rcar/src.c b/sound/soc/renesas/rcar/src.c
index 6a3dbc84f474..8b58cc20e7a8 100644
--- a/sound/soc/renesas/rcar/src.c
+++ b/sound/soc/renesas/rcar/src.c
@@ -766,7 +766,7 @@ int rsnd_src_probe(struct rsnd_priv *priv)
}
ret = rsnd_mod_init(priv, rsnd_mod_get(src),
- &rsnd_src_ops, clk, RSND_MOD_SRC, i);
+ &rsnd_src_ops, clk, NULL, RSND_MOD_SRC, i);
if (ret)
goto rsnd_src_probe_done;
diff --git a/sound/soc/renesas/rcar/ssi.c b/sound/soc/renesas/rcar/ssi.c
index 0420041e282c..c06cebb36170 100644
--- a/sound/soc/renesas/rcar/ssi.c
+++ b/sound/soc/renesas/rcar/ssi.c
@@ -1225,7 +1225,7 @@ int rsnd_ssi_probe(struct rsnd_priv *priv)
ops = &rsnd_ssi_dma_ops;
ret = rsnd_mod_init(priv, rsnd_mod_get(ssi), ops, clk,
- RSND_MOD_SSI, i);
+ NULL, RSND_MOD_SSI, i);
if (ret)
goto rsnd_ssi_probe_done;
diff --git a/sound/soc/renesas/rcar/ssiu.c b/sound/soc/renesas/rcar/ssiu.c
index 244fb833292a..0cfa84fe5ea8 100644
--- a/sound/soc/renesas/rcar/ssiu.c
+++ b/sound/soc/renesas/rcar/ssiu.c
@@ -586,7 +586,7 @@ int rsnd_ssiu_probe(struct rsnd_priv *priv)
}
ret = rsnd_mod_init(priv, rsnd_mod_get(ssiu),
- ops, NULL, RSND_MOD_SSIU, i);
+ ops, NULL, NULL, RSND_MOD_SSIU, i);
if (ret)
return ret;
}
--
2.25.1
^ permalink raw reply related
* [PATCH v4 04/12] ASoC: rsnd: Add RZ/G3E SoC probing and register map
From: John Madieu @ 2026-04-09 9:02 UTC (permalink / raw)
To: Kuninori Morimoto, Mark Brown, Liam Girdwood, Geert Uytterhoeven
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela,
Takashi Iwai, Magnus Damm, Philipp Zabel, Claudiu Beznea,
Biju Das, john.madieu, linux-sound, linux-renesas-soc, devicetree,
linux-kernel, John Madieu
In-Reply-To: <20260409090302.2243305-1-john.madieu.xa@bp.renesas.com>
RZ/G3E audio subsystem has a different register layout compared to
R-Car Gen2/Gen3/Gen4, as described below:
- Different base address organization (SCU, ADG, SSIU, SSI as
separate regions accessed by name)
- Additional registers: AUDIO_CLK_SEL3, SSI_MODE3, SSI_CONTROL2
- Different register offsets within each region
Add RZ/G3E SoC's audio subsystem register layouts and probe support.
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
---
Changes:
v4:
- Fix RSND_SOC_MASK to (0xF << 4) to avoid overlap with RSND_RZ_MASK
- Add comment documenting flag nibble layout
v3: No changes
v2: No changes
sound/soc/renesas/rcar/core.c | 1 +
sound/soc/renesas/rcar/gen.c | 180 ++++++++++++++++++++++++++++++++++
sound/soc/renesas/rcar/rsnd.h | 26 ++++-
3 files changed, 204 insertions(+), 3 deletions(-)
diff --git a/sound/soc/renesas/rcar/core.c b/sound/soc/renesas/rcar/core.c
index 28467e45acab..4544791f3883 100644
--- a/sound/soc/renesas/rcar/core.c
+++ b/sound/soc/renesas/rcar/core.c
@@ -107,6 +107,7 @@ static const struct of_device_id rsnd_of_match[] = {
{ .compatible = "renesas,rcar_sound-gen4", .data = (void *)RSND_GEN4 },
/* Special Handling */
{ .compatible = "renesas,rcar_sound-r8a77990", .data = (void *)(RSND_GEN3 | RSND_SOC_E) },
+ { .compatible = "renesas,r9a09g047-sound", .data = (void *)(RSND_RZ3 | RSND_RZG3E) },
{},
};
MODULE_DEVICE_TABLE(of, rsnd_of_match);
diff --git a/sound/soc/renesas/rcar/gen.c b/sound/soc/renesas/rcar/gen.c
index d1f20cde66be..05d5f656fb01 100644
--- a/sound/soc/renesas/rcar/gen.c
+++ b/sound/soc/renesas/rcar/gen.c
@@ -464,6 +464,184 @@ static int rsnd_gen1_probe(struct rsnd_priv *priv)
return ret_adg | ret_ssi;
}
+/*
+ * RZ/G3E Generation
+ */
+static int rsnd_rzg3e_probe(struct rsnd_priv *priv)
+{
+ static const struct rsnd_regmap_field_conf conf_ssiu[] = {
+ RSND_GEN_S_REG(SSI_MODE1, 0x804),
+ RSND_GEN_S_REG(SSI_MODE2, 0x808),
+ RSND_GEN_S_REG(SSI_MODE3, 0x80c),
+ RSND_GEN_S_REG(SSI_CONTROL, 0x810),
+ RSND_GEN_S_REG(SSI_CONTROL2, 0x814),
+ RSND_GEN_S_REG(SSI_SYS_STATUS0, 0x840),
+ RSND_GEN_S_REG(SSI_SYS_STATUS1, 0x844),
+ RSND_GEN_S_REG(SSI_SYS_STATUS2, 0x848),
+ RSND_GEN_S_REG(SSI_SYS_STATUS3, 0x84c),
+ RSND_GEN_S_REG(SSI_SYS_INT_ENABLE0, 0x850),
+ RSND_GEN_S_REG(SSI_SYS_INT_ENABLE1, 0x854),
+ RSND_GEN_S_REG(SSI_SYS_INT_ENABLE2, 0x858),
+ RSND_GEN_S_REG(SSI_SYS_INT_ENABLE3, 0x85c),
+ RSND_GEN_M_REG(SSI_BUSIF0_MODE, 0x0, 0x80),
+ RSND_GEN_M_REG(SSI_BUSIF0_ADINR, 0x4, 0x80),
+ RSND_GEN_M_REG(SSI_BUSIF0_DALIGN, 0x8, 0x80),
+ RSND_GEN_M_REG(SSI_BUSIF1_MODE, 0x20, 0x80),
+ RSND_GEN_M_REG(SSI_BUSIF1_ADINR, 0x24, 0x80),
+ RSND_GEN_M_REG(SSI_BUSIF1_DALIGN, 0x28, 0x80),
+ RSND_GEN_M_REG(SSI_BUSIF2_MODE, 0x40, 0x80),
+ RSND_GEN_M_REG(SSI_BUSIF2_ADINR, 0x44, 0x80),
+ RSND_GEN_M_REG(SSI_BUSIF2_DALIGN, 0x48, 0x80),
+ RSND_GEN_M_REG(SSI_BUSIF3_MODE, 0x60, 0x80),
+ RSND_GEN_M_REG(SSI_BUSIF3_ADINR, 0x64, 0x80),
+ RSND_GEN_M_REG(SSI_BUSIF3_DALIGN, 0x68, 0x80),
+ RSND_GEN_M_REG(SSI_MODE, 0xc, 0x80),
+ RSND_GEN_M_REG(SSI_CTRL, 0x10, 0x80),
+ RSND_GEN_M_REG(SSI_INT_ENABLE, 0x18, 0x80),
+ RSND_GEN_S_REG(SSI9_BUSIF0_MODE, 0x480),
+ RSND_GEN_S_REG(SSI9_BUSIF0_ADINR, 0x484),
+ RSND_GEN_S_REG(SSI9_BUSIF0_DALIGN, 0x488),
+ RSND_GEN_S_REG(SSI9_BUSIF1_MODE, 0x4a0),
+ RSND_GEN_S_REG(SSI9_BUSIF1_ADINR, 0x4a4),
+ RSND_GEN_S_REG(SSI9_BUSIF1_DALIGN, 0x4a8),
+ RSND_GEN_S_REG(SSI9_BUSIF2_MODE, 0x4c0),
+ RSND_GEN_S_REG(SSI9_BUSIF2_ADINR, 0x4c4),
+ RSND_GEN_S_REG(SSI9_BUSIF2_DALIGN, 0x4c8),
+ RSND_GEN_S_REG(SSI9_BUSIF3_MODE, 0x4e0),
+ RSND_GEN_S_REG(SSI9_BUSIF3_ADINR, 0x4e4),
+ RSND_GEN_S_REG(SSI9_BUSIF3_DALIGN, 0x4e8),
+ };
+ static const struct rsnd_regmap_field_conf conf_scu[] = {
+ RSND_GEN_M_REG(SRC_I_BUSIF_MODE, 0x0, 0x20),
+ RSND_GEN_M_REG(SRC_O_BUSIF_MODE, 0x4, 0x20),
+ RSND_GEN_M_REG(SRC_BUSIF_DALIGN, 0x8, 0x20),
+ RSND_GEN_M_REG(SRC_ROUTE_MODE0, 0xc, 0x20),
+ RSND_GEN_M_REG(SRC_CTRL, 0x10, 0x20),
+ RSND_GEN_M_REG(SRC_INT_ENABLE0, 0x18, 0x20),
+ RSND_GEN_M_REG(CMD_BUSIF_MODE, 0x184, 0x20),
+ RSND_GEN_M_REG(CMD_BUSIF_DALIGN, 0x188, 0x20),
+ RSND_GEN_M_REG(CMD_ROUTE_SLCT, 0x18c, 0x20),
+ RSND_GEN_M_REG(CMD_CTRL, 0x190, 0x20),
+ RSND_GEN_S_REG(SCU_SYS_STATUS0, 0x1c8),
+ RSND_GEN_S_REG(SCU_SYS_INT_EN0, 0x1cc),
+ RSND_GEN_S_REG(SCU_SYS_STATUS1, 0x1d0),
+ RSND_GEN_S_REG(SCU_SYS_INT_EN1, 0x1d4),
+ RSND_GEN_M_REG(SRC_SWRSR, 0x200, 0x40),
+ RSND_GEN_M_REG(SRC_SRCIR, 0x204, 0x40),
+ RSND_GEN_M_REG(SRC_ADINR, 0x214, 0x40),
+ RSND_GEN_M_REG(SRC_IFSCR, 0x21c, 0x40),
+ RSND_GEN_M_REG(SRC_IFSVR, 0x220, 0x40),
+ RSND_GEN_M_REG(SRC_SRCCR, 0x224, 0x40),
+ RSND_GEN_M_REG(SRC_BSDSR, 0x22c, 0x40),
+ RSND_GEN_M_REG(SRC_BSISR, 0x238, 0x40),
+ RSND_GEN_M_REG(CTU_SWRSR, 0x500, 0x100),
+ RSND_GEN_M_REG(CTU_CTUIR, 0x504, 0x100),
+ RSND_GEN_M_REG(CTU_ADINR, 0x508, 0x100),
+ RSND_GEN_M_REG(CTU_CPMDR, 0x510, 0x100),
+ RSND_GEN_M_REG(CTU_SCMDR, 0x514, 0x100),
+ RSND_GEN_M_REG(CTU_SV00R, 0x518, 0x100),
+ RSND_GEN_M_REG(CTU_SV01R, 0x51c, 0x100),
+ RSND_GEN_M_REG(CTU_SV02R, 0x520, 0x100),
+ RSND_GEN_M_REG(CTU_SV03R, 0x524, 0x100),
+ RSND_GEN_M_REG(CTU_SV04R, 0x528, 0x100),
+ RSND_GEN_M_REG(CTU_SV05R, 0x52c, 0x100),
+ RSND_GEN_M_REG(CTU_SV06R, 0x530, 0x100),
+ RSND_GEN_M_REG(CTU_SV07R, 0x534, 0x100),
+ RSND_GEN_M_REG(CTU_SV10R, 0x538, 0x100),
+ RSND_GEN_M_REG(CTU_SV11R, 0x53c, 0x100),
+ RSND_GEN_M_REG(CTU_SV12R, 0x540, 0x100),
+ RSND_GEN_M_REG(CTU_SV13R, 0x544, 0x100),
+ RSND_GEN_M_REG(CTU_SV14R, 0x548, 0x100),
+ RSND_GEN_M_REG(CTU_SV15R, 0x54c, 0x100),
+ RSND_GEN_M_REG(CTU_SV16R, 0x550, 0x100),
+ RSND_GEN_M_REG(CTU_SV17R, 0x554, 0x100),
+ RSND_GEN_M_REG(CTU_SV20R, 0x558, 0x100),
+ RSND_GEN_M_REG(CTU_SV21R, 0x55c, 0x100),
+ RSND_GEN_M_REG(CTU_SV22R, 0x560, 0x100),
+ RSND_GEN_M_REG(CTU_SV23R, 0x564, 0x100),
+ RSND_GEN_M_REG(CTU_SV24R, 0x568, 0x100),
+ RSND_GEN_M_REG(CTU_SV25R, 0x56c, 0x100),
+ RSND_GEN_M_REG(CTU_SV26R, 0x570, 0x100),
+ RSND_GEN_M_REG(CTU_SV27R, 0x574, 0x100),
+ RSND_GEN_M_REG(CTU_SV30R, 0x578, 0x100),
+ RSND_GEN_M_REG(CTU_SV31R, 0x57c, 0x100),
+ RSND_GEN_M_REG(CTU_SV32R, 0x580, 0x100),
+ RSND_GEN_M_REG(CTU_SV33R, 0x584, 0x100),
+ RSND_GEN_M_REG(CTU_SV34R, 0x588, 0x100),
+ RSND_GEN_M_REG(CTU_SV35R, 0x58c, 0x100),
+ RSND_GEN_M_REG(CTU_SV36R, 0x590, 0x100),
+ RSND_GEN_M_REG(CTU_SV37R, 0x594, 0x100),
+ RSND_GEN_M_REG(MIX_SWRSR, 0xd00, 0x40),
+ RSND_GEN_M_REG(MIX_MIXIR, 0xd04, 0x40),
+ RSND_GEN_M_REG(MIX_ADINR, 0xd08, 0x40),
+ RSND_GEN_M_REG(MIX_MIXMR, 0xd10, 0x40),
+ RSND_GEN_M_REG(MIX_MVPDR, 0xd14, 0x40),
+ RSND_GEN_M_REG(MIX_MDBAR, 0xd18, 0x40),
+ RSND_GEN_M_REG(MIX_MDBBR, 0xd1c, 0x40),
+ RSND_GEN_M_REG(MIX_MDBCR, 0xd20, 0x40),
+ RSND_GEN_M_REG(MIX_MDBDR, 0xd24, 0x40),
+ RSND_GEN_M_REG(MIX_MDBER, 0xd28, 0x40),
+ RSND_GEN_M_REG(DVC_SWRSR, 0xe00, 0x100),
+ RSND_GEN_M_REG(DVC_DVUIR, 0xe04, 0x100),
+ RSND_GEN_M_REG(DVC_ADINR, 0xe08, 0x100),
+ RSND_GEN_M_REG(DVC_DVUCR, 0xe10, 0x100),
+ RSND_GEN_M_REG(DVC_ZCMCR, 0xe14, 0x100),
+ RSND_GEN_M_REG(DVC_VRCTR, 0xe18, 0x100),
+ RSND_GEN_M_REG(DVC_VRPDR, 0xe1c, 0x100),
+ RSND_GEN_M_REG(DVC_VRDBR, 0xe20, 0x100),
+ RSND_GEN_M_REG(DVC_VOL0R, 0xe28, 0x100),
+ RSND_GEN_M_REG(DVC_VOL1R, 0xe2c, 0x100),
+ RSND_GEN_M_REG(DVC_VOL2R, 0xe30, 0x100),
+ RSND_GEN_M_REG(DVC_VOL3R, 0xe34, 0x100),
+ RSND_GEN_M_REG(DVC_VOL4R, 0xe38, 0x100),
+ RSND_GEN_M_REG(DVC_VOL5R, 0xe3c, 0x100),
+ RSND_GEN_M_REG(DVC_VOL6R, 0xe40, 0x100),
+ RSND_GEN_M_REG(DVC_VOL7R, 0xe44, 0x100),
+ RSND_GEN_M_REG(DVC_DVUER, 0xe48, 0x100),
+ };
+ static const struct rsnd_regmap_field_conf conf_adg[] = {
+ RSND_GEN_S_REG(BRRA, 0x00),
+ RSND_GEN_S_REG(BRRB, 0x04),
+ RSND_GEN_S_REG(BRGCKR, 0x08),
+ RSND_GEN_S_REG(AUDIO_CLK_SEL0, 0x0c),
+ RSND_GEN_S_REG(AUDIO_CLK_SEL1, 0x10),
+ RSND_GEN_S_REG(AUDIO_CLK_SEL2, 0x14),
+ RSND_GEN_S_REG(AUDIO_CLK_SEL3, 0x18),
+ RSND_GEN_S_REG(DIV_EN, 0x30),
+ RSND_GEN_S_REG(SRCIN_TIMSEL0, 0x34),
+ RSND_GEN_S_REG(SRCIN_TIMSEL1, 0x38),
+ RSND_GEN_S_REG(SRCIN_TIMSEL2, 0x3c),
+ RSND_GEN_S_REG(SRCIN_TIMSEL3, 0x40),
+ RSND_GEN_S_REG(SRCIN_TIMSEL4, 0x44),
+ RSND_GEN_S_REG(SRCOUT_TIMSEL0, 0x48),
+ RSND_GEN_S_REG(SRCOUT_TIMSEL1, 0x4c),
+ RSND_GEN_S_REG(SRCOUT_TIMSEL2, 0x50),
+ RSND_GEN_S_REG(SRCOUT_TIMSEL3, 0x54),
+ RSND_GEN_S_REG(SRCOUT_TIMSEL4, 0x58),
+ RSND_GEN_S_REG(CMDOUT_TIMSEL, 0x5c),
+ };
+ static const struct rsnd_regmap_field_conf conf_ssi[] = {
+ RSND_GEN_M_REG(SSICR, 0x00, 0x40),
+ RSND_GEN_M_REG(SSISR, 0x04, 0x40),
+ RSND_GEN_M_REG(SSIWSR, 0x20, 0x40),
+ };
+ int ret;
+
+ ret = rsnd_gen_regmap_init(priv, 10, RSND_BASE_SCU, "scu", conf_scu);
+ if (ret < 0)
+ return ret;
+
+ ret = rsnd_gen_regmap_init(priv, 1, RSND_BASE_ADG, "adg", conf_adg);
+ if (ret < 0)
+ return ret;
+
+ ret = rsnd_gen_regmap_init(priv, 10, RSND_BASE_SSIU, "ssiu", conf_ssiu);
+ if (ret < 0)
+ return ret;
+
+ return rsnd_gen_regmap_init(priv, 10, RSND_BASE_SSI, "ssi", conf_ssi);
+}
+
/*
* Gen
*/
@@ -487,6 +665,8 @@ int rsnd_gen_probe(struct rsnd_priv *priv)
ret = rsnd_gen2_probe(priv);
else if (rsnd_is_gen4(priv))
ret = rsnd_gen4_probe(priv);
+ else if (rsnd_is_rzg3e(priv))
+ ret = rsnd_rzg3e_probe(priv);
if (ret < 0)
dev_err(dev, "unknown generation R-Car sound device\n");
diff --git a/sound/soc/renesas/rcar/rsnd.h b/sound/soc/renesas/rcar/rsnd.h
index cd7e7df62298..7b50e0456cca 100644
--- a/sound/soc/renesas/rcar/rsnd.h
+++ b/sound/soc/renesas/rcar/rsnd.h
@@ -143,13 +143,16 @@ enum rsnd_reg {
AUDIO_CLK_SEL0,
AUDIO_CLK_SEL1,
AUDIO_CLK_SEL2,
+ AUDIO_CLK_SEL3,
/* SSIU */
SSI_MODE,
SSI_MODE0,
SSI_MODE1,
SSI_MODE2,
+ SSI_MODE3,
SSI_CONTROL,
+ SSI_CONTROL2,
SSI_CTRL,
SSI_BUSIF0_MODE,
SSI_BUSIF1_MODE,
@@ -622,14 +625,28 @@ struct rsnd_priv {
struct platform_device *pdev;
spinlock_t lock;
unsigned long flags;
+
+ /*
+ * Flags layout: 0x....DCBA
+ *
+ * A (bits 3: 0): R-Car generation (Gen1/Gen2/Gen3/Gen4)
+ * B (bits 7: 4): R-Car SoC variant (e.g. SOC_E for E1/E2/E3)
+ * C (bits 11: 8): RZ series generation
+ * D (bits 15:12): RZ series SoC identifier (e.g. RZG3E)
+ *
+ * Bits 16+ are used for capability flags.
+ */
#define RSND_GEN_MASK (0xF << 0)
#define RSND_GEN1 (1 << 0)
#define RSND_GEN2 (2 << 0)
#define RSND_GEN3 (3 << 0)
#define RSND_GEN4 (4 << 0)
-#define RSND_SOC_MASK (0xFF << 4)
-#define RSND_SOC_E (1 << 4) /* E1/E2/E3 */
-
+#define RSND_SOC_MASK (0xF << 4) /* nibble B */
+#define RSND_SOC_E (1 << 4) /* E1/E2/E3 */
+#define RSND_RZ_MASK (0xF << 8) /* nibble C */
+#define RSND_RZ3 (3 << 8)
+#define RSND_RZ_ID_MASK (0xF << 12) /* nibble D */
+#define RSND_RZG3E (1 << 12)
/*
* below value will be filled on rsnd_gen_probe()
*/
@@ -708,6 +725,9 @@ struct rsnd_priv {
#define rsnd_is_gen3_e3(priv) (((priv)->flags & \
(RSND_GEN_MASK | RSND_SOC_MASK)) == \
(RSND_GEN3 | RSND_SOC_E))
+#define rsnd_is_rzg3e(priv) (((priv)->flags & \
+ (RSND_RZ_MASK | RSND_RZ_ID_MASK)) == \
+ (RSND_RZ3 | RSND_RZG3E))
#define rsnd_flags_has(p, f) ((p)->flags & (f))
#define rsnd_flags_set(p, f) ((p)->flags |= (f))
--
2.25.1
^ permalink raw reply related
* [PATCH v4 05/12] ASoC: rsnd: Add audmacpp clock and reset support for RZ/G3E
From: John Madieu @ 2026-04-09 9:02 UTC (permalink / raw)
To: Kuninori Morimoto, Mark Brown, Liam Girdwood, Geert Uytterhoeven
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela,
Takashi Iwai, Magnus Damm, Philipp Zabel, Claudiu Beznea,
Biju Das, john.madieu, linux-sound, linux-renesas-soc, devicetree,
linux-kernel, John Madieu
In-Reply-To: <20260409090302.2243305-1-john.madieu.xa@bp.renesas.com>
RZ/G3E requires additional audmapp clock and reset lines for
Audio DMA-PP operation.
Add global audmacpp clock/reset management in rsnd_dma_probe()
using optional APIs to remain transparent to other platforms.
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
---
Changes:
v4:
- Move audmapp_clk and audmapp_rstc from struct rsnd_priv into
struct rsnd_dma_ctrl
v3: No changes
v2: No changes
sound/soc/renesas/rcar/dma.c | 17 +++++++++++++++++
sound/soc/renesas/rcar/rsnd.h | 1 +
2 files changed, 18 insertions(+)
diff --git a/sound/soc/renesas/rcar/dma.c b/sound/soc/renesas/rcar/dma.c
index 68c859897e68..feab42e3202d 100644
--- a/sound/soc/renesas/rcar/dma.c
+++ b/sound/soc/renesas/rcar/dma.c
@@ -47,6 +47,9 @@ struct rsnd_dma_ctrl {
phys_addr_t ppres;
int dmaen_num;
int dmapp_num;
+ /* RZ/G3E: Audio DMAC peri-peri clock and reset */
+ struct clk *audmapp_clk;
+ struct reset_control *audmapp_rstc;
};
#define rsnd_priv_to_dmac(p) ((struct rsnd_dma_ctrl *)(p)->dma)
@@ -864,6 +867,20 @@ int rsnd_dma_probe(struct rsnd_priv *priv)
if (rsnd_is_gen4(priv))
goto audmapp_end;
+ /* for RZ/G3E */
+ dmac->audmapp_rstc =
+ devm_reset_control_get_optional_exclusive_deasserted(dev, "audmapp");
+ if (IS_ERR(dmac->audmapp_rstc)) {
+ return dev_err_probe(dev, PTR_ERR(dmac->audmapp_rstc),
+ "failed to get audmapp reset\n");
+ }
+
+ dmac->audmapp_clk = devm_clk_get_optional_enabled(dev, "audmapp");
+ if (IS_ERR(dmac->audmapp_clk)) {
+ return dev_err_probe(dev, PTR_ERR(dmac->audmapp_clk),
+ "failed to get audmapp clock\n");
+ }
+
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "audmapp");
if (!res) {
dev_err(dev, "lack of audmapp in DT\n");
diff --git a/sound/soc/renesas/rcar/rsnd.h b/sound/soc/renesas/rcar/rsnd.h
index 7b50e0456cca..28ed90ffe0ab 100644
--- a/sound/soc/renesas/rcar/rsnd.h
+++ b/sound/soc/renesas/rcar/rsnd.h
@@ -623,6 +623,7 @@ void rsnd_adg_clk_dbg_info(struct rsnd_priv *priv, struct seq_file *m);
struct rsnd_priv {
struct platform_device *pdev;
+
spinlock_t lock;
unsigned long flags;
--
2.25.1
^ permalink raw reply related
* [PATCH v4 06/12] ASoC: rsnd: Add RZ/G3E DMA address calculation support
From: John Madieu @ 2026-04-09 9:02 UTC (permalink / raw)
To: Kuninori Morimoto, Mark Brown, Liam Girdwood, Geert Uytterhoeven
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela,
Takashi Iwai, Magnus Damm, Philipp Zabel, Claudiu Beznea,
Biju Das, john.madieu, linux-sound, linux-renesas-soc, devicetree,
linux-kernel, John Madieu
In-Reply-To: <20260409090302.2243305-1-john.madieu.xa@bp.renesas.com>
RZ/G3E has different DMA register base addresses and offset
calculations compared to R-Car platforms.
Add dedicated rsnd_rzg3e_dma_addr() function with dispatch from
rsnd_dma_addr(), following the existing per-generation pattern.
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
---
v4:
- Replace raw [3][2][3] DMA address array with named structs
rsnd_dma_addr_dir and rsnd_dma_addr_map. Use designated initializers
in both rsnd_gen2_dma_addr() and rsnd_rzg3e_dma_addr()
v3: No changes
v2: No changes
sound/soc/renesas/rcar/dma.c | 233 +++++++++++++++++++++++++++--------
1 file changed, 182 insertions(+), 51 deletions(-)
diff --git a/sound/soc/renesas/rcar/dma.c b/sound/soc/renesas/rcar/dma.c
index feab42e3202d..e3278ff7e2f0 100644
--- a/sound/soc/renesas/rcar/dma.c
+++ b/sound/soc/renesas/rcar/dma.c
@@ -481,6 +481,69 @@ static struct rsnd_mod_ops rsnd_dmapp_ops = {
DEBUG_INFO
};
+struct rsnd_dma_addr {
+ dma_addr_t out_addr;
+ dma_addr_t in_addr;
+};
+
+struct rsnd_dma_addr_dir {
+ struct rsnd_dma_addr capture[3];
+ struct rsnd_dma_addr playback[3];
+};
+
+struct rsnd_dma_addr_map {
+ struct rsnd_dma_addr_dir src;
+ struct rsnd_dma_addr_dir ssi;
+ struct rsnd_dma_addr_dir ssiu;
+};
+
+static dma_addr_t
+rsnd_dma_addr_lookup(struct rsnd_dai_stream *io,
+ struct rsnd_mod *mod,
+ struct rsnd_priv *priv,
+ const struct rsnd_dma_addr_map *map,
+ int is_play, int is_from)
+{
+ struct device *dev = rsnd_priv_to_dev(priv);
+ int is_ssi = !!(rsnd_io_to_mod_ssi(io) == mod) ||
+ !!(rsnd_io_to_mod_ssiu(io) == mod);
+ int use_src = !!rsnd_io_to_mod_src(io);
+ int use_cmd = !!rsnd_io_to_mod_dvc(io) ||
+ !!rsnd_io_to_mod_mix(io) ||
+ !!rsnd_io_to_mod_ctu(io);
+ int id = rsnd_mod_id(mod);
+ const struct rsnd_dma_addr_dir *dir;
+ const struct rsnd_dma_addr *addr;
+
+ /* it shouldn't happen */
+ if (use_cmd && !use_src)
+ dev_err(dev, "DVC is selected without SRC\n");
+
+ /* use SSIU or SSI? */
+ if (is_ssi && rsnd_ssi_use_busif(io))
+ is_ssi++;
+
+ dev_dbg(dev, "dma%d addr : is_ssi=%d use_src=%d use_cmd=%d\n",
+ id, is_ssi, use_src, use_cmd);
+
+ switch (is_ssi) {
+ case 2:
+ dir = &map->ssiu;
+ break;
+ case 1:
+ dir = &map->ssi;
+ break;
+ default:
+ dir = &map->src;
+ break;
+ }
+
+ addr = is_play ? &dir->playback[use_src + use_cmd]
+ : &dir->capture[use_src + use_cmd];
+
+ return is_from ? addr->out_addr : addr->in_addr;
+}
+
/*
* Common DMAC Interface
*/
@@ -499,7 +562,16 @@ static struct rsnd_mod_ops rsnd_dmapp_ops = {
* SSIU: 0xec541000 / 0xec100000 / 0xec100000 / 0xec400000 / 0xec400000
* SCU : 0xec500000 / 0xec000000 / 0xec004000 / 0xec300000 / 0xec304000
* CMD : 0xec500000 / / 0xec008000 0xec308000
+ *
+ * ex) G3E case
+ * mod / DMAC in / DMAC out / DMAC PP in / DMAC pp out
+ * SSI : 0x13C31000 / 0x13C40000 / 0x13C40000
+ * SSIU: 0x13C31000 / 0x13C40000 / 0x13C40000 / 0xEC400000 / 0xEC400000
+ * SCU : 0x13C00000 / 0x13C10000 / 0x13C14000 / 0xEC300000 / 0xEC304000
+ * CMD : 0x13C00000 / / 0x13C18000 0xEC308000
*/
+
+/* R-Car DMA address macros */
#define RDMA_SSI_I_N(addr, i) (addr ##_reg - 0x00300000 + (0x40 * i) + 0x8)
#define RDMA_SSI_O_N(addr, i) (addr ##_reg - 0x00300000 + (0x40 * i) + 0xc)
@@ -520,54 +592,51 @@ static struct rsnd_mod_ops rsnd_dmapp_ops = {
static dma_addr_t
rsnd_gen2_dma_addr(struct rsnd_dai_stream *io,
- struct rsnd_mod *mod,
- int is_play, int is_from)
+ struct rsnd_mod *mod, int is_play, int is_from)
{
struct rsnd_priv *priv = rsnd_io_to_priv(io);
struct device *dev = rsnd_priv_to_dev(priv);
phys_addr_t ssi_reg = rsnd_gen_get_phy_addr(priv, RSND_BASE_SSI);
phys_addr_t src_reg = rsnd_gen_get_phy_addr(priv, RSND_BASE_SCU);
- int is_ssi = !!(rsnd_io_to_mod_ssi(io) == mod) ||
- !!(rsnd_io_to_mod_ssiu(io) == mod);
- int use_src = !!rsnd_io_to_mod_src(io);
- int use_cmd = !!rsnd_io_to_mod_dvc(io) ||
- !!rsnd_io_to_mod_mix(io) ||
- !!rsnd_io_to_mod_ctu(io);
- int id = rsnd_mod_id(mod);
+ int id = rsnd_mod_id(mod);
int busif = rsnd_mod_id_sub(rsnd_io_to_mod_ssiu(io));
- struct dma_addr {
- dma_addr_t out_addr;
- dma_addr_t in_addr;
- } dma_addrs[3][2][3] = {
- /* SRC */
- /* Capture */
- {{{ 0, 0 },
- { RDMA_SRC_O_N(src, id), RDMA_SRC_I_P(src, id) },
- { RDMA_CMD_O_N(src, id), RDMA_SRC_I_P(src, id) } },
- /* Playback */
- {{ 0, 0, },
- { RDMA_SRC_O_P(src, id), RDMA_SRC_I_N(src, id) },
- { RDMA_CMD_O_P(src, id), RDMA_SRC_I_N(src, id) } }
+ const struct rsnd_dma_addr_map map = {
+ .src = {
+ .capture = {
+ { 0, 0 },
+ { RDMA_SRC_O_N(src, id), RDMA_SRC_I_P(src, id) },
+ { RDMA_CMD_O_N(src, id), RDMA_SRC_I_P(src, id) },
+ },
+ .playback = {
+ { 0, 0 },
+ { RDMA_SRC_O_P(src, id), RDMA_SRC_I_N(src, id) },
+ { RDMA_CMD_O_P(src, id), RDMA_SRC_I_N(src, id) },
+ },
},
- /* SSI */
- /* Capture */
- {{{ RDMA_SSI_O_N(ssi, id), 0 },
- { RDMA_SSIU_O_P(ssi, id, busif), 0 },
- { RDMA_SSIU_O_P(ssi, id, busif), 0 } },
- /* Playback */
- {{ 0, RDMA_SSI_I_N(ssi, id) },
- { 0, RDMA_SSIU_I_P(ssi, id, busif) },
- { 0, RDMA_SSIU_I_P(ssi, id, busif) } }
+ .ssi = {
+ .capture = {
+ { RDMA_SSI_O_N(ssi, id), 0 },
+ { RDMA_SSIU_O_P(ssi, id, busif), 0 },
+ { RDMA_SSIU_O_P(ssi, id, busif), 0 },
+ },
+ .playback = {
+ { 0, RDMA_SSI_I_N(ssi, id) },
+ { 0, RDMA_SSIU_I_P(ssi, id, busif) },
+ { 0, RDMA_SSIU_I_P(ssi, id, busif) },
+ },
+ },
+ .ssiu = {
+ .capture = {
+ { RDMA_SSIU_O_N(ssi, id, busif), 0 },
+ { RDMA_SSIU_O_P(ssi, id, busif), 0 },
+ { RDMA_SSIU_O_P(ssi, id, busif), 0 },
+ },
+ .playback = {
+ { 0, RDMA_SSIU_I_N(ssi, id, busif) },
+ { 0, RDMA_SSIU_I_P(ssi, id, busif) },
+ { 0, RDMA_SSIU_I_P(ssi, id, busif) },
+ },
},
- /* SSIU */
- /* Capture */
- {{{ RDMA_SSIU_O_N(ssi, id, busif), 0 },
- { RDMA_SSIU_O_P(ssi, id, busif), 0 },
- { RDMA_SSIU_O_P(ssi, id, busif), 0 } },
- /* Playback */
- {{ 0, RDMA_SSIU_I_N(ssi, id, busif) },
- { 0, RDMA_SSIU_I_P(ssi, id, busif) },
- { 0, RDMA_SSIU_I_P(ssi, id, busif) } } },
};
/*
@@ -577,20 +646,80 @@ rsnd_gen2_dma_addr(struct rsnd_dai_stream *io,
* out of calculation rule
*/
if ((id == 9) && (busif >= 4))
- dev_err(dev, "This driver doesn't support SSI%d-%d, so far",
- id, busif);
+ dev_err(dev,
+ "This driver doesn't support SSI%d-%d, so far", id, busif);
- /* it shouldn't happen */
- if (use_cmd && !use_src)
- dev_err(dev, "DVC is selected without SRC\n");
+ return rsnd_dma_addr_lookup(io, mod, priv, &map, is_play, is_from);
+}
- /* use SSIU or SSI ? */
- if (is_ssi && rsnd_ssi_use_busif(io))
- is_ssi++;
+/* RZ/G3E DMA address macros */
+#define RDMA_SSI_I_N_G3E(addr, i) (addr ##_reg + 0x0000F000 + (0x1000 * i))
+#define RDMA_SSI_O_N_G3E(addr, i) (addr ##_reg + 0x0000F000 + (0x1000 * i))
+
+#define RDMA_SSIU_I_N_G3E(addr, i, j) (addr ##_reg + 0x0000F000 + (0x1000 * (i)) + (((j) / 4) * 0xA000) + (((j) % 4) * 0x400) - (0x4000 * ((i) / 9) * ((j) / 4)))
+#define RDMA_SSIU_O_N_G3E(addr, i, j) RDMA_SSIU_I_N_G3E(addr, i, j)
+
+#define RDMA_SSIU_I_P_G3E(addr, i, j) (addr ##_reg + 0xD87CF000 + (0x1000 * (i)) + (((j) / 4) * 0xA000) + (((j) % 4) * 0x400) - (0x4000 * ((i) / 9) * ((j) / 4)))
+#define RDMA_SSIU_O_P_G3E(addr, i, j) RDMA_SSIU_I_P_G3E(addr, i, j)
+
+#define RDMA_SRC_I_N_G3E(addr, i) (addr ##_reg + 0x00010000 + (0x400 * i))
+#define RDMA_SRC_O_N_G3E(addr, i) (addr ##_reg + 0x00014000 + (0x400 * i))
+
+#define RDMA_SRC_I_P_G3E(addr, i) (addr ##_reg + 0xD8700000 + (0x400 * i))
+#define RDMA_SRC_O_P_G3E(addr, i) (addr ##_reg + 0xD8704000 + (0x400 * i))
+
+#define RDMA_CMD_O_N_G3E(addr, i) (addr ##_reg + 0x00018000 + (0x400 * i))
+#define RDMA_CMD_O_P_G3E(addr, i) (addr ##_reg + 0xD8708000 + (0x400 * i))
+
+static dma_addr_t
+rsnd_rzg3e_dma_addr(struct rsnd_dai_stream *io,
+ struct rsnd_mod *mod, int is_play, int is_from)
+{
+ struct rsnd_priv *priv = rsnd_io_to_priv(io);
+ phys_addr_t ssi_reg = rsnd_gen_get_phy_addr(priv, RSND_BASE_SSI);
+ phys_addr_t src_reg = rsnd_gen_get_phy_addr(priv, RSND_BASE_SCU);
+ int id = rsnd_mod_id(mod);
+ int busif = rsnd_mod_id_sub(rsnd_io_to_mod_ssiu(io));
+ const struct rsnd_dma_addr_map map = {
+ .src = {
+ .capture = {
+ { 0, 0 },
+ { RDMA_SRC_O_N_G3E(src, id), RDMA_SRC_I_P_G3E(src, id) },
+ { RDMA_CMD_O_N_G3E(src, id), RDMA_SRC_I_P_G3E(src, id) },
+ },
+ .playback = {
+ { 0, 0 },
+ { RDMA_SRC_O_P_G3E(src, id), RDMA_SRC_I_N_G3E(src, id) },
+ { RDMA_CMD_O_P_G3E(src, id), RDMA_SRC_I_N_G3E(src, id) },
+ },
+ },
+ .ssi = {
+ .capture = {
+ { RDMA_SSI_O_N_G3E(ssi, id), 0 },
+ { RDMA_SSIU_O_P_G3E(ssi, id, busif), 0 },
+ { RDMA_SSIU_O_P_G3E(ssi, id, busif), 0 },
+ },
+ .playback = {
+ { 0, RDMA_SSI_I_N_G3E(ssi, id) },
+ { 0, RDMA_SSIU_I_P_G3E(ssi, id, busif) },
+ { 0, RDMA_SSIU_I_P_G3E(ssi, id, busif) },
+ },
+ },
+ .ssiu = {
+ .capture = {
+ { RDMA_SSIU_O_N_G3E(ssi, id, busif), 0 },
+ { RDMA_SSIU_O_P_G3E(ssi, id, busif), 0 },
+ { RDMA_SSIU_O_P_G3E(ssi, id, busif), 0 },
+ },
+ .playback = {
+ { 0, RDMA_SSIU_I_N_G3E(ssi, id, busif) },
+ { 0, RDMA_SSIU_I_P_G3E(ssi, id, busif) },
+ { 0, RDMA_SSIU_I_P_G3E(ssi, id, busif) },
+ },
+ }
+ };
- return (is_from) ?
- dma_addrs[is_ssi][is_play][use_src + use_cmd].out_addr :
- dma_addrs[is_ssi][is_play][use_src + use_cmd].in_addr;
+ return rsnd_dma_addr_lookup(io, mod, priv, &map, is_play, is_from);
}
/*
@@ -639,6 +768,8 @@ static dma_addr_t rsnd_dma_addr(struct rsnd_dai_stream *io,
return 0;
else if (rsnd_is_gen4(priv))
return rsnd_gen4_dma_addr(io, mod, is_play, is_from);
+ else if (rsnd_is_rzg3e(priv))
+ return rsnd_rzg3e_dma_addr(io, mod, is_play, is_from);
else
return rsnd_gen2_dma_addr(io, mod, is_play, is_from);
}
--
2.25.1
^ permalink raw reply related
* [PATCH v4 07/12] ASoC: rsnd: ssui: Add RZ/G3E SSIU BUSIF support
From: John Madieu @ 2026-04-09 9:02 UTC (permalink / raw)
To: Kuninori Morimoto, Mark Brown, Liam Girdwood, Geert Uytterhoeven
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Jaroslav Kysela,
Takashi Iwai, Magnus Damm, Philipp Zabel, Claudiu Beznea,
Biju Das, john.madieu, linux-sound, linux-renesas-soc, devicetree,
linux-kernel, John Madieu
In-Reply-To: <20260409090302.2243305-1-john.madieu.xa@bp.renesas.com>
Add support for the SSIU found on the Renesas RZ/G3E SoC, which
provides a different BUSIF layout compared to earlier generations:
- SSI0-SSI4: 4 BUSIF instances each (BUSIF0-3)
- SSI5-SSI8: 1 BUSIF instance each (BUSIF0 only)
- SSI9: 4 BUSIF instances (BUSIF0-3)
- Total: 28 BUSIFs
RZ/G3E also differs from Gen2/Gen3 implementations in that only two
pairs of BUSIF error-status registers are available instead of four,
and the SSI always operates in BUSIF mode with no PIO fallback.
Rather than scattering SoC-specific checks across functional code,
introduce an extra capability flags in the match data:
- RSND_SSIU_BUSIF_STATUS_COUNT_2: only two BUSIF error-status
register pairs are present. Used in rsnd_ssiu_busif_err_irq_ctrl()
and rsnd_ssiu_busif_err_status_clear() to limit register iteration.
Future SoCs sharing these constraints can set the flags without
requiring code changes.
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
---
v4:
- Move busif_status_count from rsnd_priv into new struct rsnd_ssiu_ctrl,
following the rsnd_dma_ctrl pattern for shared non-per-instance module
resources
- Properly propagate reset control errors via dev_err_probe() instead
of silencing them
- Update changelog to accurately describe rsnd_is_rzg3e() usage for
SoC-specific register handling
v3: No changes
v2: No changes
sound/soc/renesas/rcar/core.c | 3 +-
sound/soc/renesas/rcar/rsnd.h | 2 ++
sound/soc/renesas/rcar/ssiu.c | 63 +++++++++++++++++++++++++----------
3 files changed, 49 insertions(+), 19 deletions(-)
diff --git a/sound/soc/renesas/rcar/core.c b/sound/soc/renesas/rcar/core.c
index 4544791f3883..cb31af8a34d4 100644
--- a/sound/soc/renesas/rcar/core.c
+++ b/sound/soc/renesas/rcar/core.c
@@ -107,7 +107,8 @@ static const struct of_device_id rsnd_of_match[] = {
{ .compatible = "renesas,rcar_sound-gen4", .data = (void *)RSND_GEN4 },
/* Special Handling */
{ .compatible = "renesas,rcar_sound-r8a77990", .data = (void *)(RSND_GEN3 | RSND_SOC_E) },
- { .compatible = "renesas,r9a09g047-sound", .data = (void *)(RSND_RZ3 | RSND_RZG3E) },
+ { .compatible = "renesas,r9a09g047-sound", .data = (void *)(RSND_RZ3 | RSND_RZG3E |
+ RSND_SSIU_BUSIF_STATUS_COUNT_2) },
{},
};
MODULE_DEVICE_TABLE(of, rsnd_of_match);
diff --git a/sound/soc/renesas/rcar/rsnd.h b/sound/soc/renesas/rcar/rsnd.h
index 28ed90ffe0ab..5cf35a1f3e45 100644
--- a/sound/soc/renesas/rcar/rsnd.h
+++ b/sound/soc/renesas/rcar/rsnd.h
@@ -648,6 +648,7 @@ struct rsnd_priv {
#define RSND_RZ3 (3 << 8)
#define RSND_RZ_ID_MASK (0xF << 12) /* nibble D */
#define RSND_RZG3E (1 << 12)
+#define RSND_SSIU_BUSIF_STATUS_COUNT_2 BIT(16) /* Only 2 BUSIF error-status register pairs */
/*
* below value will be filled on rsnd_gen_probe()
*/
@@ -666,6 +667,7 @@ struct rsnd_priv {
/*
* below value will be filled on rsnd_ssi_probe()
*/
+ void *ssiu_ctrl;
void *ssi;
int ssi_nr;
diff --git a/sound/soc/renesas/rcar/ssiu.c b/sound/soc/renesas/rcar/ssiu.c
index 0cfa84fe5ea8..f483389868d2 100644
--- a/sound/soc/renesas/rcar/ssiu.c
+++ b/sound/soc/renesas/rcar/ssiu.c
@@ -29,31 +29,39 @@ struct rsnd_ssiu {
i++)
/*
- * SSI Gen2 Gen3 Gen4
- * 0 BUSIF0-3 BUSIF0-7 BUSIF0-7
- * 1 BUSIF0-3 BUSIF0-7
- * 2 BUSIF0-3 BUSIF0-7
- * 3 BUSIF0 BUSIF0-7
- * 4 BUSIF0 BUSIF0-7
- * 5 BUSIF0 BUSIF0
- * 6 BUSIF0 BUSIF0
- * 7 BUSIF0 BUSIF0
- * 8 BUSIF0 BUSIF0
- * 9 BUSIF0-3 BUSIF0-7
- * total 22 52 8
+ * SSI Gen2 Gen3 Gen4 RZ/G3E
+ * 0 BUSIF0-3 BUSIF0-7 BUSIF0-7 BUSIF0-3
+ * 1 BUSIF0-3 BUSIF0-7 BUSIF0-3
+ * 2 BUSIF0-3 BUSIF0-7 BUSIF0-3
+ * 3 BUSIF0 BUSIF0-7 BUSIF0-3
+ * 4 BUSIF0 BUSIF0-7 BUSIF0-3
+ * 5 BUSIF0 BUSIF0 BUSIF0
+ * 6 BUSIF0 BUSIF0 BUSIF0
+ * 7 BUSIF0 BUSIF0 BUSIF0
+ * 8 BUSIF0 BUSIF0 BUSIF0
+ * 9 BUSIF0-3 BUSIF0-7 BUSIF0-3
+ * total 22 52 8 28
*/
static const int gen2_id[] = { 0, 4, 8, 12, 13, 14, 15, 16, 17, 18 };
static const int gen3_id[] = { 0, 8, 16, 24, 32, 40, 41, 42, 43, 44 };
static const int gen4_id[] = { 0 };
+static const int rzg3e_id[] = { 0, 4, 8, 12, 16, 20, 21, 22, 23, 24 };
+
+struct rsnd_ssiu_ctrl {
+ unsigned int busif_status_count;
+};
+
+#define rsnd_priv_to_ssiu_ctrl(priv) \
+ ((struct rsnd_ssiu_ctrl *)(priv)->ssiu_ctrl)
/* enable busif buffer over/under run interrupt. */
#define rsnd_ssiu_busif_err_irq_enable(mod) rsnd_ssiu_busif_err_irq_ctrl(mod, 1)
#define rsnd_ssiu_busif_err_irq_disable(mod) rsnd_ssiu_busif_err_irq_ctrl(mod, 0)
static void rsnd_ssiu_busif_err_irq_ctrl(struct rsnd_mod *mod, int enable)
{
+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
int id = rsnd_mod_id(mod);
int shift, offset;
- int i;
switch (id) {
case 0:
@@ -72,7 +80,7 @@ static void rsnd_ssiu_busif_err_irq_ctrl(struct rsnd_mod *mod, int enable)
return;
}
- for (i = 0; i < 4; i++) {
+ for (unsigned int i = 0; i < rsnd_priv_to_ssiu_ctrl(priv)->busif_status_count; i++) {
enum rsnd_reg reg = SSI_SYS_INT_ENABLE((i * 2) + offset);
u32 val = 0xf << (shift * 4);
u32 sys_int_enable = rsnd_mod_read(mod, reg);
@@ -87,10 +95,10 @@ static void rsnd_ssiu_busif_err_irq_ctrl(struct rsnd_mod *mod, int enable)
bool rsnd_ssiu_busif_err_status_clear(struct rsnd_mod *mod)
{
+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
bool error = false;
int id = rsnd_mod_id(mod);
int shift, offset;
- int i;
switch (id) {
case 0:
@@ -109,7 +117,7 @@ bool rsnd_ssiu_busif_err_status_clear(struct rsnd_mod *mod)
goto out;
}
- for (i = 0; i < 4; i++) {
+ for (unsigned int i = 0; i < rsnd_priv_to_ssiu_ctrl(priv)->busif_status_count; i++) {
u32 reg = SSI_SYS_STATUS(i * 2) + offset;
u32 status = rsnd_mod_read(mod, reg);
u32 val = 0xf << (shift * 4);
@@ -160,7 +168,8 @@ static int rsnd_ssiu_init(struct rsnd_mod *mod,
/*
* SSI_MODE0
*/
- rsnd_mod_bset(mod, SSI_MODE0, (1 << id), !use_busif << id);
+ if (!rsnd_is_rzg3e(priv))
+ rsnd_mod_bset(mod, SSI_MODE0, (1 << id), !use_busif << id);
/*
* SSI_MODE1 / SSI_MODE2
@@ -510,6 +519,8 @@ int rsnd_ssiu_probe(struct rsnd_priv *priv)
{
struct device *dev = rsnd_priv_to_dev(priv);
struct device_node *node __free(device_node) = rsnd_ssiu_of_node(priv);
+ struct reset_control *rstc;
+ struct rsnd_ssiu_ctrl *ctrl;
struct rsnd_ssiu *ssiu;
struct rsnd_mod_ops *ops;
const int *list = NULL;
@@ -534,8 +545,15 @@ int rsnd_ssiu_probe(struct rsnd_priv *priv)
if (!ssiu)
return -ENOMEM;
+ ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
+ if (!ctrl)
+ return -ENOMEM;
+
+ ctrl->busif_status_count = rsnd_flags_has(priv, RSND_SSIU_BUSIF_STATUS_COUNT_2) ? 2 : 4;
+
priv->ssiu = ssiu;
priv->ssiu_nr = nr;
+ priv->ssiu_ctrl = ctrl;
if (rsnd_is_gen1(priv))
ops = &rsnd_ssiu_ops_gen1;
@@ -558,12 +576,21 @@ int rsnd_ssiu_probe(struct rsnd_priv *priv)
} else if (rsnd_is_gen4(priv)) {
list = gen4_id;
nr = ARRAY_SIZE(gen4_id);
+ } else if (rsnd_is_rzg3e(priv)) {
+ list = rzg3e_id;
+ nr = ARRAY_SIZE(rzg3e_id);
} else {
dev_err(dev, "unknown SSIU\n");
return -ENODEV;
}
}
+ /* Acquire shared reset once for all SSIU modules */
+ rstc = devm_reset_control_get_optional_shared(dev, "ssi-all");
+ if (IS_ERR(rstc))
+ return dev_err_probe(dev, PTR_ERR(rstc),
+ "failed to get ssi-all reset\n");
+
for_each_rsnd_ssiu(ssiu, priv, i) {
int ret;
@@ -586,7 +613,7 @@ int rsnd_ssiu_probe(struct rsnd_priv *priv)
}
ret = rsnd_mod_init(priv, rsnd_mod_get(ssiu),
- ops, NULL, NULL, RSND_MOD_SSIU, i);
+ ops, NULL, rstc, RSND_MOD_SSIU, i);
if (ret)
return ret;
}
--
2.25.1
^ permalink raw reply related
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