* Re: [PATCH v2 4/4] MAINTAINERS: Add entry for QST QMC5883P magnetometer driver
From: David Lechner @ 2026-04-10 19:32 UTC (permalink / raw)
To: Hardik Phalet, Greg Kroah-Hartman
Cc: Jonathan Cameron, Nuno Sá, Andy Shevchenko, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Brigham Campbell, Shuah Khan,
linux-iio, devicetree, linux-kernel, linux-staging
In-Reply-To: <20260409210639.3197576-5-hardik.phalet@pm.me>
On 4/9/26 4:07 PM, Hardik Phalet wrote:
> Add a MAINTAINERS entry for the QST QMC5883P staging IIO driver,
> covering the driver source and its device tree binding.
>
> Signed-off-by: Hardik Phalet <hardik.phalet@pm.me>
> ---
> MAINTAINERS | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index a92290fffa16..d0b9bfceb283 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -20274,6 +20274,13 @@ F: Documentation/networking/device_drivers/ethernet/freescale/dpaa2/overview.rst
> F: drivers/bus/fsl-mc/
> F: include/uapi/linux/fsl_mc.h
>
> +QST QMC5883P MAGNETOMETER DRIVER
> +M: Hardik Phalet <hardik.phalet@pm.me>
> +L: linux-iio@vger.kernel.org
> +S: Maintained
> +F: Documentation/devicetree/bindings/iio/magnetometer/qst,qmc5883p.yaml
> +F: drivers/staging/iio/magnetometer/
> +
> QT1010 MEDIA DRIVER
> L: linux-media@vger.kernel.org
> S: Orphan
This should be split up and added in the patches that actually
add the F: files. Most of it will go with the dt-bingings patch
and the one line added later with the driver.
^ permalink raw reply
* Re: [PATCH v2 0/4] Add QST QMC5883P magnetometer driver
From: David Lechner @ 2026-04-10 19:26 UTC (permalink / raw)
To: Hardik Phalet, Greg Kroah-Hartman
Cc: Jonathan Cameron, Nuno Sá, Andy Shevchenko, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Brigham Campbell, Shuah Khan,
linux-iio, devicetree, linux-kernel, linux-staging
In-Reply-To: <20260409210639.3197576-1-hardik.phalet@pm.me>
On 4/9/26 4:07 PM, Hardik Phalet wrote:
For a series this be, please wait at least a week for more feedback
before submitting the next revision.
> This series adds initial Linux support for the QST QMC5883P, a 3-axis
> anisotropic magneto-resistive (AMR) magnetometer with a 16-bit ADC that
> communicates over I2C. To my knowledge there is no existing upstream
> driver for this device.
>
> The driver supports:
> - Raw magnetic field readings on X, Y, and Z axes
> - Four selectable full-scale ranges (±2 G, ±8 G, ±12 G, ±30 G)
> - Configurable output data rate (10, 50, 100, 200 Hz)
> - Configurable oversampling ratio (1, 2, 4, 8)
> - Configurable downsampling ratio (1, 2, 4, 8) via a custom sysfs
What is the difference between oversampling and downsampling? I think
we have used some filter attribute for downsampling/decimation in some
other drivers so maybe that could be a good fit?
> attribute
> - Runtime PM with a 2 s autosuspend delay
> - System suspend/resume via pm_runtime_force_suspend/resume
>
> Regmap with an rbtree cache is used throughout. CTRL_1 and CTRL_2
> bit fields are accessed via regmap_field to avoid read-modify-write
> races. The STATUS register is marked precious so regmap never reads
> it speculatively and clears the DRDY/OVFL bits unexpectedly.
>
> The init sequence on probe is: soft reset → wait 1 ms → deassert
> reset → configure SET/RESET control → apply default ODR/OSR/DSR/RNG
> → enter normal mode. This ordering was determined empirically on
> hardware to produce reliable, non-zero axis readings.
>
> The driver is placed under drivers/staging/iio/magnetometer/ with a
> TODO file tracking the remaining work before it can graduate:
> - Triggered buffer support (iio_triggered_buffer_setup)
> - DRDY interrupt support
> - Self-test implementation
These are not reasons to have the driver in staging. It is fine
to have a driver that doesn't implement all functionality. We should
be able to add those features without breaking anything.
^ permalink raw reply
* [PATCH 35/35] arm64: dts: qcom: talos: Drop unused second PDC reg entry
From: Mukesh Ojha @ 2026-04-10 18:41 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC driver only maps the first register region (APSS DRV) via
of_address_to_resource(node, 0, ...). The second reg entry was never
accessed by the driver and can be removed.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/talos.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi
index 4b038fb22071..e825ee1b957d 100644
--- a/arch/arm64/boot/dts/qcom/talos.dtsi
+++ b/arch/arm64/boot/dts/qcom/talos.dtsi
@@ -4080,8 +4080,7 @@ dispcc: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,qcs615-pdc", "qcom,pdc";
- reg = <0x0 0x0b220000 0x0 0x10000>,
- <0x0 0x17c000f0 0x0 0x64>;
+ reg = <0x0 0x0b220000 0x0 0x10000>;
qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>;
interrupt-parent = <&intc>;
#interrupt-cells = <2>;
--
2.53.0
^ permalink raw reply related
* [PATCH 34/35] arm64: dts: qcom: sdx75: Drop unused second PDC reg entry
From: Mukesh Ojha @ 2026-04-10 18:41 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC driver only maps the first register region (APSS DRV) via
of_address_to_resource(node, 0, ...). The second reg entry was never
accessed by the driver and can be removed.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sdx75.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
index 82a8107f2f1c..e740e123c1e4 100644
--- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
@@ -1100,8 +1100,7 @@ usb_1_dwc3_ss: endpoint {
pdc: interrupt-controller@b220000 {
compatible = "qcom,sdx75-pdc", "qcom,pdc";
- reg = <0x0 0xb220000 0x0 0x10000>,
- <0x0 0x174000f0 0x0 0x64>;
+ reg = <0x0 0xb220000 0x0 0x10000>;
qcom,pdc-ranges = <0 147 52>,
<52 266 32>,
<84 500 59>;
--
2.53.0
^ permalink raw reply related
* [PATCH 33/35] arm64: dts: qcom: sc8280xp: Drop unused second PDC reg entry
From: Mukesh Ojha @ 2026-04-10 18:41 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC driver only maps the first register region (APSS DRV) via
of_address_to_resource(node, 0, ...). The second reg entry was never
accessed by the driver and can be removed.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index 2c6e48495d20..59354f2474c9 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -5095,7 +5095,7 @@ dispcc0: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,sc8280xp-pdc", "qcom,pdc";
- reg = <0 0x0b220000 0 0x10000>, <0 0x17c000f0 0 0x60>;
+ reg = <0 0x0b220000 0 0x10000>;
qcom,pdc-ranges = <0 480 40>,
<40 140 14>,
<54 263 1>,
--
2.53.0
^ permalink raw reply related
* [PATCH 32/35] arm64: dts: qcom: monaco: Drop unused second PDC reg entry
From: Mukesh Ojha @ 2026-04-10 18:41 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC driver only maps the first register region (APSS DRV) via
of_address_to_resource(node, 0, ...). The second reg entry was never
accessed by the driver and can be removed.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/monaco.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
index 84b22866d2f3..cf71b559b094 100644
--- a/arch/arm64/boot/dts/qcom/monaco.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
@@ -5744,8 +5744,7 @@ dispcc: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,qcs8300-pdc", "qcom,pdc";
- reg = <0x0 0xb220000 0x0 0x10000>,
- <0x0 0x17c000f0 0x0 0x64>;
+ reg = <0x0 0xb220000 0x0 0x10000>;
interrupt-parent = <&intc>;
#interrupt-cells = <2>;
interrupt-controller;
--
2.53.0
^ permalink raw reply related
* [PATCH 31/35] arm64: dts: qcom: milos: Drop unused second PDC reg entry
From: Mukesh Ojha @ 2026-04-10 18:41 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC driver only maps the first register region (APSS DRV) via
of_address_to_resource(node, 0, ...). The second reg entry was never
accessed by the driver and can be removed.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/milos.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/milos.dtsi b/arch/arm64/boot/dts/qcom/milos.dtsi
index 71941e6f49bf..a3c2ac8ca675 100644
--- a/arch/arm64/boot/dts/qcom/milos.dtsi
+++ b/arch/arm64/boot/dts/qcom/milos.dtsi
@@ -1564,8 +1564,7 @@ dispcc: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,milos-pdc", "qcom,pdc";
- reg = <0x0 0x0b220000 0x0 0x10000>,
- <0x0 0x174000f0 0x0 0x64>;
+ reg = <0x0 0x0b220000 0x0 0x10000>;
interrupt-parent = <&intc>;
qcom,pdc-ranges = <0 480 40>, <40 140 11>, <51 527 47>,
--
2.53.0
^ permalink raw reply related
* [PATCH 30/35] arm64: dts: qcom: lemans: Drop unused second PDC reg entry
From: Mukesh Ojha @ 2026-04-10 18:41 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC driver only maps the first register region (APSS DRV) via
of_address_to_resource(node, 0, ...). The second reg entry was never
accessed by the driver and can be removed.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/lemans.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index 1724df115873..e48c8ef7d8a1 100644
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -5536,8 +5536,7 @@ dispcc0: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,sa8775p-pdc", "qcom,pdc";
- reg = <0x0 0x0b220000 0x0 0x10000>,
- <0x0 0x17c000f0 0x0 0x64>;
+ reg = <0x0 0x0b220000 0x0 0x10000>;
qcom,pdc-ranges = <0 480 40>,
<40 140 14>,
<54 263 1>,
--
2.53.0
^ permalink raw reply related
* [PATCH 29/35] arm64: dts: qcom: kaanapali: Drop unused second PDC reg entry
From: Mukesh Ojha @ 2026-04-10 18:41 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC driver only maps the first register region (APSS DRV) via
of_address_to_resource(node, 0, ...). The second reg entry was never
accessed by the driver and can be removed.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/kaanapali.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
index 9ef57ad0ca71..7cc4ff48b3f5 100644
--- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi
+++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
@@ -960,8 +960,7 @@ opp-202000000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,kaanapali-pdc", "qcom,pdc";
- reg = <0x0 0x0b220000 0x0 0x10000>,
- <0x0 0x179600f0 0x0 0xf4>;
+ reg = <0x0 0x0b220000 0x0 0x10000>;
qcom,pdc-ranges = <0 745 38>,
<40 785 11>,
--
2.53.0
^ permalink raw reply related
* [PATCH 28/35] arm64: dts: qcom: qdu1000: Fix PDC reg size to single APSS DRV region
From: Mukesh Ojha @ 2026-04-10 18:41 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC reg size was 0x30000, covering three DRV regions. Linux only
needs the APSS DRV region which is a single 0x10000 window. Reduce
the size to 0x10000 to describe only the region actually used.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/qdu1000.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
index cdfe40da5d33..4962c27d5d46 100644
--- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
+++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
@@ -1054,7 +1054,7 @@ usb_1_dwc3_ss: endpoint {
pdc: interrupt-controller@b220000 {
compatible = "qcom,qdu1000-pdc", "qcom,pdc";
- reg = <0x0 0xb220000 0x0 0x30000>, <0x0 0x174000f0 0x0 0x64>;
+ reg = <0x0 0xb220000 0x0 0x10000>, <0x0 0x174000f0 0x0 0x64>;
qcom,pdc-ranges = <0 480 12>, <14 494 24>, <40 520 54>,
<94 609 31>, <125 63 1>;
#interrupt-cells = <2>;
--
2.53.0
^ permalink raw reply related
* [PATCH 27/35] arm64: dts: qcom: milos: Fix PDC reg size to single APSS DRV region
From: Mukesh Ojha @ 2026-04-10 18:41 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC reg size was 0x30000, covering three DRV regions. Linux only
needs the APSS DRV region which is a single 0x10000 window. Reduce
the size to 0x10000 to describe only the region actually used.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/milos.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/milos.dtsi b/arch/arm64/boot/dts/qcom/milos.dtsi
index e1a51d43943f..71941e6f49bf 100644
--- a/arch/arm64/boot/dts/qcom/milos.dtsi
+++ b/arch/arm64/boot/dts/qcom/milos.dtsi
@@ -1564,7 +1564,7 @@ dispcc: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,milos-pdc", "qcom,pdc";
- reg = <0x0 0x0b220000 0x0 0x30000>,
+ reg = <0x0 0x0b220000 0x0 0x10000>,
<0x0 0x174000f0 0x0 0x64>;
interrupt-parent = <&intc>;
--
2.53.0
^ permalink raw reply related
* [PATCH 26/35] arm64: dts: qcom: sdx75: Fix PDC reg size to single APSS DRV region
From: Mukesh Ojha @ 2026-04-10 18:41 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC reg size was 0x30000, covering three DRV regions. Linux only
needs the APSS DRV region which is a single 0x10000 window. Reduce
the size to 0x10000 to describe only the region actually used.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sdx75.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
index eff4c9055d66..82a8107f2f1c 100644
--- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
@@ -1100,7 +1100,7 @@ usb_1_dwc3_ss: endpoint {
pdc: interrupt-controller@b220000 {
compatible = "qcom,sdx75-pdc", "qcom,pdc";
- reg = <0x0 0xb220000 0x0 0x30000>,
+ reg = <0x0 0xb220000 0x0 0x10000>,
<0x0 0x174000f0 0x0 0x64>;
qcom,pdc-ranges = <0 147 52>,
<52 266 32>,
--
2.53.0
^ permalink raw reply related
* [PATCH 25/35] arm64: dts: qcom: sa8775p: Fix PDC reg size to single APSS DRV region
From: Mukesh Ojha @ 2026-04-10 18:41 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC reg size was 0x30000, covering three DRV regions. Linux only
needs the APSS DRV region which is a single 0x10000 window. Reduce
the size to 0x10000 to describe only the region actually used.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/lemans.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index 808827b83553..1724df115873 100644
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -5536,7 +5536,7 @@ dispcc0: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,sa8775p-pdc", "qcom,pdc";
- reg = <0x0 0x0b220000 0x0 0x30000>,
+ reg = <0x0 0x0b220000 0x0 0x10000>,
<0x0 0x17c000f0 0x0 0x64>;
qcom,pdc-ranges = <0 480 40>,
<40 140 14>,
--
2.53.0
^ permalink raw reply related
* [PATCH 24/35] arm64: dts: qcom: qcs8300: Fix PDC reg size to single APSS DRV region
From: Mukesh Ojha @ 2026-04-10 18:41 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC reg size was 0x30000, covering three DRV regions. Linux only
needs the APSS DRV region which is a single 0x10000 window. Reduce
the size to 0x10000 to describe only the region actually used.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/monaco.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
index 0cb9fd154b68..84b22866d2f3 100644
--- a/arch/arm64/boot/dts/qcom/monaco.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
@@ -5744,7 +5744,7 @@ dispcc: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,qcs8300-pdc", "qcom,pdc";
- reg = <0x0 0xb220000 0x0 0x30000>,
+ reg = <0x0 0xb220000 0x0 0x10000>,
<0x0 0x17c000f0 0x0 0x64>;
interrupt-parent = <&intc>;
#interrupt-cells = <2>;
--
2.53.0
^ permalink raw reply related
* [PATCH 23/35] arm64: dts: qcom: qcs615: Fix PDC reg size to single APSS DRV region
From: Mukesh Ojha @ 2026-04-10 18:41 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC reg size was 0x30000, covering three DRV regions. Linux only
needs the APSS DRV region which is a single 0x10000 window. Reduce
the size to 0x10000 to describe only the region actually used.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/talos.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi
index 75716b4a58d6..4b038fb22071 100644
--- a/arch/arm64/boot/dts/qcom/talos.dtsi
+++ b/arch/arm64/boot/dts/qcom/talos.dtsi
@@ -4080,7 +4080,7 @@ dispcc: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,qcs615-pdc", "qcom,pdc";
- reg = <0x0 0x0b220000 0x0 0x30000>,
+ reg = <0x0 0x0b220000 0x0 0x10000>,
<0x0 0x17c000f0 0x0 0x64>;
qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>;
interrupt-parent = <&intc>;
--
2.53.0
^ permalink raw reply related
* [PATCH 22/35] arm64: dts: qcom: sar2130p: Fix PDC reg size to single APSS DRV region
From: Mukesh Ojha @ 2026-04-10 18:40 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC reg size was 0x30000, covering three DRV regions. Linux only
needs the APSS DRV region which is a single 0x10000 window. Reduce
the size to 0x10000 to describe only the region actually used.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sar2130p.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sar2130p.dtsi b/arch/arm64/boot/dts/qcom/sar2130p.dtsi
index d65ad0df6865..c4d48f657e5d 100644
--- a/arch/arm64/boot/dts/qcom/sar2130p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sar2130p.dtsi
@@ -2417,7 +2417,7 @@ dispcc: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,sar2130p-pdc", "qcom,pdc";
- reg = <0x0 0x0b220000 0x0 0x30000>, <0x0 0x174000f0 0x0 0x64>;
+ reg = <0x0 0x0b220000 0x0 0x10000>, <0x0 0x174000f0 0x0 0x64>;
qcom,pdc-ranges = <0 480 94>,
<94 609 31>,
<125 63 1>,
--
2.53.0
^ permalink raw reply related
* [PATCH 21/35] arm64: dts: qcom: sm6350: Fix PDC reg size to single APSS DRV region
From: Mukesh Ojha @ 2026-04-10 18:40 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC reg size was 0x30000, covering three DRV regions. Linux only
needs the APSS DRV region which is a single 0x10000 window. Reduce
the size to 0x10000 to describe only the region actually used.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 9f9b9f9af0da..3b78835ca41b 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -2489,7 +2489,7 @@ dispcc: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,sm6350-pdc", "qcom,pdc";
- reg = <0x0 0x0b220000 0x0 0x30000>, <0x0 0x17c000f0 0x0 0x64>;
+ reg = <0x0 0x0b220000 0x0 0x10000>, <0x0 0x17c000f0 0x0 0x64>;
qcom,pdc-ranges = <0 480 94>, <94 609 31>,
<125 63 1>, <126 655 12>, <138 139 15>;
#interrupt-cells = <2>;
--
2.53.0
^ permalink raw reply related
* [PATCH 20/35] arm64: dts: qcom: x1e80100: Fix PDC reg size to single APSS DRV region
From: Mukesh Ojha @ 2026-04-10 18:40 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC reg size was 0x30000, covering three DRV regions. Linux only
needs the APSS DRV region which is a single 0x10000 window. Reduce
the size to 0x10000 to describe only the region actually used.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/hamoa.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
index 4b0784af4bd3..d8b171fb0fbc 100644
--- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
+++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
@@ -6014,7 +6014,7 @@ dispcc: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,x1e80100-pdc", "qcom,pdc";
- reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
+ reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;
qcom,pdc-ranges = <0 480 42>, <42 251 5>,
<47 522 52>, <99 609 32>,
--
2.53.0
^ permalink raw reply related
* [PATCH 19/35] arm64: dts: qcom: sm4450: Fix PDC reg size to single APSS DRV region
From: Mukesh Ojha @ 2026-04-10 18:40 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC reg size was 0x30000, covering three DRV regions. Linux only
needs the APSS DRV region which is a single 0x10000 window. Reduce
the size to 0x10000 to describe only the region actually used.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm4450.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi
index d217d922811e..b84dd1a8311b 100644
--- a/arch/arm64/boot/dts/qcom/sm4450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi
@@ -464,7 +464,7 @@ dispcc: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,sm4450-pdc", "qcom,pdc";
- reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
+ reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;
qcom,pdc-ranges = <0 480 94>, <94 494 31>,
<125 63 1>;
#interrupt-cells = <2>;
--
2.53.0
^ permalink raw reply related
* [PATCH 18/35] arm64: dts: qcom: sm8650: Fix PDC reg size to single APSS DRV region
From: Mukesh Ojha @ 2026-04-10 18:40 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC reg size was 0x30000, covering three DRV regions. Linux only
needs the APSS DRV region which is a single 0x10000 window. Reduce
the size to 0x10000 to describe only the region actually used.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 357e43b90740..349e19b429f2 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -5987,7 +5987,7 @@ dispcc: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,sm8650-pdc", "qcom,pdc";
- reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
+ reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;
interrupt-parent = <&intc>;
--
2.53.0
^ permalink raw reply related
* [PATCH 17/35] arm64: dts: qcom: sm8550: Fix PDC reg size to single APSS DRV region
From: Mukesh Ojha @ 2026-04-10 18:40 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC reg size was 0x30000, covering three DRV regions. Linux only
needs the APSS DRV region which is a single 0x10000 window. Reduce
the size to 0x10000 to describe only the region actually used.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index e3f93f4f412d..975382cf4066 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -4222,7 +4222,7 @@ usb_1_dwc3_ss: endpoint {
pdc: interrupt-controller@b220000 {
compatible = "qcom,sm8550-pdc", "qcom,pdc";
- reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
+ reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;
qcom,pdc-ranges = <0 480 94>, <94 609 31>,
<125 63 1>, <126 716 12>,
<138 251 5>;
--
2.53.0
^ permalink raw reply related
* [PATCH 16/35] arm64: dts: qcom: sm8450: Fix PDC reg size to single APSS DRV region
From: Mukesh Ojha @ 2026-04-10 18:40 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC reg size was 0x30000, covering three DRV regions. Linux only
needs the APSS DRV region which is a single 0x10000 window. Reduce
the size to 0x10000 to describe only the region actually used.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 920a2d1c04d0..8aa60aa524a6 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -3728,7 +3728,7 @@ dispcc: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,sm8450-pdc", "qcom,pdc";
- reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
+ reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;
qcom,pdc-ranges = <0 480 12>, <14 494 24>, <40 520 54>,
<94 609 31>, <125 63 1>, <126 716 12>;
#interrupt-cells = <2>;
--
2.53.0
^ permalink raw reply related
* [PATCH 15/35] arm64: dts: qcom: sm8350: Fix PDC reg size to single APSS DRV region
From: Mukesh Ojha @ 2026-04-10 18:40 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC reg size was 0x30000, covering three DRV regions. Linux only
needs the APSS DRV region which is a single 0x10000 window. Reduce
the size to 0x10000 to describe only the region actually used.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 5c8fe213f5e4..a183212b12c2 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -3172,7 +3172,7 @@ dispcc: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,sm8350-pdc", "qcom,pdc";
- reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>;
+ reg = <0 0x0b220000 0 0x10000>, <0 0x17c000f0 0 0x60>;
qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>, <55 306 4>,
<59 312 3>, <62 374 2>, <64 434 2>, <66 438 3>,
<69 86 1>, <70 520 54>, <124 609 31>, <155 63 1>,
--
2.53.0
^ permalink raw reply related
* [PATCH 14/35] arm64: dts: qcom: sm8250: Fix PDC reg size to single APSS DRV region
From: Mukesh Ojha @ 2026-04-10 18:40 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC reg size was 0x30000, covering three DRV regions. Linux only
needs the APSS DRV region which is a single 0x10000 window. Reduce
the size to 0x10000 to describe only the region actually used.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index c7dffa440074..e6dfaf47fa41 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -5048,7 +5048,7 @@ dispcc: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,sm8250-pdc", "qcom,pdc";
- reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>;
+ reg = <0 0x0b220000 0 0x10000>, <0 0x17c000f0 0 0x60>;
qcom,pdc-ranges = <0 480 94>, <94 609 31>,
<125 63 1>, <126 716 12>;
#interrupt-cells = <2>;
--
2.53.0
^ permalink raw reply related
* [PATCH 13/35] arm64: dts: qcom: sc8280xp: Fix PDC reg size to single APSS DRV region
From: Mukesh Ojha @ 2026-04-10 18:40 UTC (permalink / raw)
To: Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: cros-qcom-dts-watchers, linux-arm-msm, linux-kernel, devicetree,
Mukesh Ojha
In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com>
The PDC reg size was 0x30000, covering three DRV regions. Linux only
needs the APSS DRV region which is a single 0x10000 window. Reduce
the size to 0x10000 to describe only the region actually used.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index 706eb1309d3f..2c6e48495d20 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -5095,7 +5095,7 @@ dispcc0: clock-controller@af00000 {
pdc: interrupt-controller@b220000 {
compatible = "qcom,sc8280xp-pdc", "qcom,pdc";
- reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>;
+ reg = <0 0x0b220000 0 0x10000>, <0 0x17c000f0 0 0x60>;
qcom,pdc-ranges = <0 480 40>,
<40 140 14>,
<54 263 1>,
--
2.53.0
^ permalink raw reply related
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