* [PATCH v2 3/3] misc: Remove old APDS990x driver
From: Svyatoslav Ryhel @ 2026-04-19 8:31 UTC (permalink / raw)
To: Jonathan Cameron, David Lechner, Nuno Sá, Andy Shevchenko,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Jonathan Corbet,
Shuah Khan, Arnd Bergmann, Greg Kroah-Hartman, Svyatoslav Ryhel,
Randy Dunlap
Cc: linux-iio, devicetree, linux-kernel, linux-doc
In-Reply-To: <20260419083125.35572-1-clamor95@gmail.com>
The Avago APDS9900/9901 ALS/Proximity sensor is now supported by tsl2772
IIO driver so there is no need to keep this old implementation. Remove it.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
Documentation/misc-devices/apds990x.rst | 128 ---
drivers/misc/Kconfig | 10 -
drivers/misc/Makefile | 1 -
drivers/misc/apds990x.c | 1284 -----------------------
include/linux/platform_data/apds990x.h | 65 --
5 files changed, 1488 deletions(-)
delete mode 100644 Documentation/misc-devices/apds990x.rst
delete mode 100644 drivers/misc/apds990x.c
delete mode 100644 include/linux/platform_data/apds990x.h
diff --git a/Documentation/misc-devices/apds990x.rst b/Documentation/misc-devices/apds990x.rst
deleted file mode 100644
index e2f75577f731..000000000000
--- a/Documentation/misc-devices/apds990x.rst
+++ /dev/null
@@ -1,128 +0,0 @@
-.. SPDX-License-Identifier: GPL-2.0
-
-======================
-Kernel driver apds990x
-======================
-
-Supported chips:
-Avago APDS990X
-
-Data sheet:
-Not freely available
-
-Author:
-Samu Onkalo <samu.p.onkalo@nokia.com>
-
-Description
------------
-
-APDS990x is a combined ambient light and proximity sensor. ALS and proximity
-functionality are highly connected. ALS measurement path must be running
-while the proximity functionality is enabled.
-
-ALS produces raw measurement values for two channels: Clear channel
-(infrared + visible light) and IR only. However, threshold comparisons happen
-using clear channel only. Lux value and the threshold level on the HW
-might vary quite much depending the spectrum of the light source.
-
-Driver makes necessary conversions to both directions so that user handles
-only lux values. Lux value is calculated using information from the both
-channels. HW threshold level is calculated from the given lux value to match
-with current type of the lightning. Sometimes inaccuracy of the estimations
-lead to false interrupt, but that doesn't harm.
-
-ALS contains 4 different gain steps. Driver automatically
-selects suitable gain step. After each measurement, reliability of the results
-is estimated and new measurement is triggered if necessary.
-
-Platform data can provide tuned values to the conversion formulas if
-values are known. Otherwise plain sensor default values are used.
-
-Proximity side is little bit simpler. There is no need for complex conversions.
-It produces directly usable values.
-
-Driver controls chip operational state using pm_runtime framework.
-Voltage regulators are controlled based on chip operational state.
-
-SYSFS
------
-
-
-chip_id
- RO - shows detected chip type and version
-
-power_state
- RW - enable / disable chip. Uses counting logic
-
- 1 enables the chip
- 0 disables the chip
-lux0_input
- RO - measured lux value
-
- sysfs_notify called when threshold interrupt occurs
-
-lux0_sensor_range
- RO - lux0_input max value.
-
- Actually never reaches since sensor tends
- to saturate much before that. Real max value varies depending
- on the light spectrum etc.
-
-lux0_rate
- RW - measurement rate in Hz
-
-lux0_rate_avail
- RO - supported measurement rates
-
-lux0_calibscale
- RW - calibration value.
-
- Set to neutral value by default.
- Output results are multiplied with calibscale / calibscale_default
- value.
-
-lux0_calibscale_default
- RO - neutral calibration value
-
-lux0_thresh_above_value
- RW - HI level threshold value.
-
- All results above the value
- trigs an interrupt. 65535 (i.e. sensor_range) disables the above
- interrupt.
-
-lux0_thresh_below_value
- RW - LO level threshold value.
-
- All results below the value
- trigs an interrupt. 0 disables the below interrupt.
-
-prox0_raw
- RO - measured proximity value
-
- sysfs_notify called when threshold interrupt occurs
-
-prox0_sensor_range
- RO - prox0_raw max value (1023)
-
-prox0_raw_en
- RW - enable / disable proximity - uses counting logic
-
- - 1 enables the proximity
- - 0 disables the proximity
-
-prox0_reporting_mode
- RW - trigger / periodic.
-
- In "trigger" mode the driver tells two possible
- values: 0 or prox0_sensor_range value. 0 means no proximity,
- 1023 means proximity. This causes minimal number of interrupts.
- In "periodic" mode the driver reports all values above
- prox0_thresh_above. This causes more interrupts, but it can give
- _rough_ estimate about the distance.
-
-prox0_reporting_mode_avail
- RO - accepted values to prox0_reporting_mode (trigger, periodic)
-
-prox0_thresh_above_value
- RW - threshold level which trigs proximity events.
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 8cbd71a0dc35..051cf2c44b90 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -392,16 +392,6 @@ config SENSORS_BH1770
To compile this driver as a module, choose M here: the
module will be called bh1770glc. If unsure, say N here.
-config SENSORS_APDS990X
- tristate "APDS990X combined als and proximity sensors"
- depends on I2C
- help
- Say Y here if you want to build a driver for Avago APDS990x
- combined ambient light and proximity sensor chip.
-
- To compile this driver as a module, choose M here: the
- module will be called apds990x. If unsure, say N here.
-
config HMC6352
tristate "Honeywell HMC6352 compass"
depends on I2C
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 62c3d03206e9..bfad6982591c 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -20,7 +20,6 @@ obj-$(CONFIG_RPMB) += rpmb-core.o
obj-$(CONFIG_QCOM_COINCELL) += qcom-coincell.o
obj-$(CONFIG_QCOM_FASTRPC) += fastrpc.o
obj-$(CONFIG_SENSORS_BH1770) += bh1770glc.o
-obj-$(CONFIG_SENSORS_APDS990X) += apds990x.o
obj-$(CONFIG_ENCLOSURE_SERVICES) += enclosure.o
obj-$(CONFIG_KGDB_TESTS) += kgdbts.o
obj-$(CONFIG_SGI_XP) += sgi-xp/
diff --git a/drivers/misc/apds990x.c b/drivers/misc/apds990x.c
deleted file mode 100644
index b69c3a1c94d1..000000000000
--- a/drivers/misc/apds990x.c
+++ /dev/null
@@ -1,1284 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * This file is part of the APDS990x sensor driver.
- * Chip is combined proximity and ambient light sensor.
- *
- * Copyright (C) 2010 Nokia Corporation and/or its subsidiary(-ies).
- *
- * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/i2c.h>
-#include <linux/interrupt.h>
-#include <linux/mutex.h>
-#include <linux/regulator/consumer.h>
-#include <linux/pm_runtime.h>
-#include <linux/delay.h>
-#include <linux/wait.h>
-#include <linux/slab.h>
-#include <linux/platform_data/apds990x.h>
-
-/* Register map */
-#define APDS990X_ENABLE 0x00 /* Enable of states and interrupts */
-#define APDS990X_ATIME 0x01 /* ALS ADC time */
-#define APDS990X_PTIME 0x02 /* Proximity ADC time */
-#define APDS990X_WTIME 0x03 /* Wait time */
-#define APDS990X_AILTL 0x04 /* ALS interrupt low threshold low byte */
-#define APDS990X_AILTH 0x05 /* ALS interrupt low threshold hi byte */
-#define APDS990X_AIHTL 0x06 /* ALS interrupt hi threshold low byte */
-#define APDS990X_AIHTH 0x07 /* ALS interrupt hi threshold hi byte */
-#define APDS990X_PILTL 0x08 /* Proximity interrupt low threshold low byte */
-#define APDS990X_PILTH 0x09 /* Proximity interrupt low threshold hi byte */
-#define APDS990X_PIHTL 0x0a /* Proximity interrupt hi threshold low byte */
-#define APDS990X_PIHTH 0x0b /* Proximity interrupt hi threshold hi byte */
-#define APDS990X_PERS 0x0c /* Interrupt persistence filters */
-#define APDS990X_CONFIG 0x0d /* Configuration */
-#define APDS990X_PPCOUNT 0x0e /* Proximity pulse count */
-#define APDS990X_CONTROL 0x0f /* Gain control register */
-#define APDS990X_REV 0x11 /* Revision Number */
-#define APDS990X_ID 0x12 /* Device ID */
-#define APDS990X_STATUS 0x13 /* Device status */
-#define APDS990X_CDATAL 0x14 /* Clear ADC low data register */
-#define APDS990X_CDATAH 0x15 /* Clear ADC high data register */
-#define APDS990X_IRDATAL 0x16 /* IR ADC low data register */
-#define APDS990X_IRDATAH 0x17 /* IR ADC high data register */
-#define APDS990X_PDATAL 0x18 /* Proximity ADC low data register */
-#define APDS990X_PDATAH 0x19 /* Proximity ADC high data register */
-
-/* Control */
-#define APDS990X_MAX_AGAIN 3
-
-/* Enable register */
-#define APDS990X_EN_PIEN (0x1 << 5)
-#define APDS990X_EN_AIEN (0x1 << 4)
-#define APDS990X_EN_WEN (0x1 << 3)
-#define APDS990X_EN_PEN (0x1 << 2)
-#define APDS990X_EN_AEN (0x1 << 1)
-#define APDS990X_EN_PON (0x1 << 0)
-#define APDS990X_EN_DISABLE_ALL 0
-
-/* Status register */
-#define APDS990X_ST_PINT (0x1 << 5)
-#define APDS990X_ST_AINT (0x1 << 4)
-
-/* I2C access types */
-#define APDS990x_CMD_TYPE_MASK (0x03 << 5)
-#define APDS990x_CMD_TYPE_RB (0x00 << 5) /* Repeated byte */
-#define APDS990x_CMD_TYPE_INC (0x01 << 5) /* Auto increment */
-#define APDS990x_CMD_TYPE_SPE (0x03 << 5) /* Special function */
-
-#define APDS990x_ADDR_SHIFT 0
-#define APDS990x_CMD 0x80
-
-/* Interrupt ack commands */
-#define APDS990X_INT_ACK_ALS 0x6
-#define APDS990X_INT_ACK_PS 0x5
-#define APDS990X_INT_ACK_BOTH 0x7
-
-/* ptime */
-#define APDS990X_PTIME_DEFAULT 0xff /* Recommended conversion time 2.7ms*/
-
-/* wtime */
-#define APDS990X_WTIME_DEFAULT 0xee /* ~50ms wait time */
-
-#define APDS990X_TIME_TO_ADC 1024 /* One timetick as ADC count value */
-
-/* Persistence */
-#define APDS990X_APERS_SHIFT 0
-#define APDS990X_PPERS_SHIFT 4
-
-/* Supported ID:s */
-#define APDS990X_ID_0 0x0
-#define APDS990X_ID_4 0x4
-#define APDS990X_ID_29 0x29
-
-/* pgain and pdiode settings */
-#define APDS_PGAIN_1X 0x0
-#define APDS_PDIODE_IR 0x2
-
-#define APDS990X_LUX_OUTPUT_SCALE 10
-
-/* Reverse chip factors for threshold calculation */
-struct reverse_factors {
- u32 afactor;
- int cf1;
- int irf1;
- int cf2;
- int irf2;
-};
-
-struct apds990x_chip {
- struct apds990x_platform_data *pdata;
- struct i2c_client *client;
- struct mutex mutex; /* avoid parallel access */
- struct regulator_bulk_data regs[2];
- wait_queue_head_t wait;
-
- int prox_en;
- bool prox_continuous_mode;
- bool lux_wait_fresh_res;
-
- /* Chip parameters */
- struct apds990x_chip_factors cf;
- struct reverse_factors rcf;
- u16 atime; /* als integration time */
- u16 arate; /* als reporting rate */
- u16 a_max_result; /* Max possible ADC value with current atime */
- u8 again_meas; /* Gain used in last measurement */
- u8 again_next; /* Next calculated gain */
- u8 pgain;
- u8 pdiode;
- u8 pdrive;
- u8 lux_persistence;
- u8 prox_persistence;
-
- u32 lux_raw;
- u32 lux;
- u16 lux_clear;
- u16 lux_ir;
- u16 lux_calib;
- u32 lux_thres_hi;
- u32 lux_thres_lo;
-
- u32 prox_thres;
- u16 prox_data;
- u16 prox_calib;
-
- char chipname[10];
- u8 revision;
-};
-
-#define APDS_CALIB_SCALER 8192
-#define APDS_LUX_NEUTRAL_CALIB_VALUE (1 * APDS_CALIB_SCALER)
-#define APDS_PROX_NEUTRAL_CALIB_VALUE (1 * APDS_CALIB_SCALER)
-
-#define APDS_PROX_DEF_THRES 600
-#define APDS_PROX_HYSTERESIS 50
-#define APDS_LUX_DEF_THRES_HI 101
-#define APDS_LUX_DEF_THRES_LO 100
-#define APDS_DEFAULT_PROX_PERS 1
-
-#define APDS_TIMEOUT 2000
-#define APDS_STARTUP_DELAY 25000 /* us */
-#define APDS_RANGE 65535
-#define APDS_PROX_RANGE 1023
-#define APDS_LUX_GAIN_LO_LIMIT 100
-#define APDS_LUX_GAIN_LO_LIMIT_STRICT 25
-
-#define TIMESTEP 87 /* 2.7ms is about 87 / 32 */
-#define TIME_STEP_SCALER 32
-
-#define APDS_LUX_AVERAGING_TIME 50 /* tolerates 50/60Hz ripple */
-#define APDS_LUX_DEFAULT_RATE 200
-
-static const u8 again[] = {1, 8, 16, 120}; /* ALS gain steps */
-
-/* Following two tables must match i.e 10Hz rate means 1 as persistence value */
-static const u16 arates_hz[] = {10, 5, 2, 1};
-static const u8 apersis[] = {1, 2, 4, 5};
-
-/* Regulators */
-static const char reg_vcc[] = "Vdd";
-static const char reg_vled[] = "Vled";
-
-static int apds990x_read_byte(struct apds990x_chip *chip, u8 reg, u8 *data)
-{
- struct i2c_client *client = chip->client;
- s32 ret;
-
- reg &= ~APDS990x_CMD_TYPE_MASK;
- reg |= APDS990x_CMD | APDS990x_CMD_TYPE_RB;
-
- ret = i2c_smbus_read_byte_data(client, reg);
- *data = ret;
- return (int)ret;
-}
-
-static int apds990x_read_word(struct apds990x_chip *chip, u8 reg, u16 *data)
-{
- struct i2c_client *client = chip->client;
- s32 ret;
-
- reg &= ~APDS990x_CMD_TYPE_MASK;
- reg |= APDS990x_CMD | APDS990x_CMD_TYPE_INC;
-
- ret = i2c_smbus_read_word_data(client, reg);
- *data = ret;
- return (int)ret;
-}
-
-static int apds990x_write_byte(struct apds990x_chip *chip, u8 reg, u8 data)
-{
- struct i2c_client *client = chip->client;
- s32 ret;
-
- reg &= ~APDS990x_CMD_TYPE_MASK;
- reg |= APDS990x_CMD | APDS990x_CMD_TYPE_RB;
-
- ret = i2c_smbus_write_byte_data(client, reg, data);
- return (int)ret;
-}
-
-static int apds990x_write_word(struct apds990x_chip *chip, u8 reg, u16 data)
-{
- struct i2c_client *client = chip->client;
- s32 ret;
-
- reg &= ~APDS990x_CMD_TYPE_MASK;
- reg |= APDS990x_CMD | APDS990x_CMD_TYPE_INC;
-
- ret = i2c_smbus_write_word_data(client, reg, data);
- return (int)ret;
-}
-
-static int apds990x_mode_on(struct apds990x_chip *chip)
-{
- /* ALS is mandatory, proximity optional */
- u8 reg = APDS990X_EN_AIEN | APDS990X_EN_PON | APDS990X_EN_AEN |
- APDS990X_EN_WEN;
-
- if (chip->prox_en)
- reg |= APDS990X_EN_PIEN | APDS990X_EN_PEN;
-
- return apds990x_write_byte(chip, APDS990X_ENABLE, reg);
-}
-
-static u16 apds990x_lux_to_threshold(struct apds990x_chip *chip, u32 lux)
-{
- u32 thres;
- u32 cpl;
- u32 ir;
-
- if (lux == 0)
- return 0;
- else if (lux == APDS_RANGE)
- return APDS_RANGE;
-
- /*
- * Reported LUX value is a combination of the IR and CLEAR channel
- * values. However, interrupt threshold is only for clear channel.
- * This function approximates needed HW threshold value for a given
- * LUX value in the current lightning type.
- * IR level compared to visible light varies heavily depending on the
- * source of the light
- *
- * Calculate threshold value for the next measurement period.
- * Math: threshold = lux * cpl where
- * cpl = atime * again / (glass_attenuation * device_factor)
- * (count-per-lux)
- *
- * First remove calibration. Division by four is to avoid overflow
- */
- lux = lux * (APDS_CALIB_SCALER / 4) / (chip->lux_calib / 4);
-
- /* Multiplication by 64 is to increase accuracy */
- cpl = ((u32)chip->atime * (u32)again[chip->again_next] *
- APDS_PARAM_SCALE * 64) / (chip->cf.ga * chip->cf.df);
-
- thres = lux * cpl / 64;
- /*
- * Convert IR light from the latest result to match with
- * new gain step. This helps to adapt with the current
- * source of light.
- */
- ir = (u32)chip->lux_ir * (u32)again[chip->again_next] /
- (u32)again[chip->again_meas];
-
- /*
- * Compensate count with IR light impact
- * IAC1 > IAC2 (see apds990x_get_lux for formulas)
- */
- if (chip->lux_clear * APDS_PARAM_SCALE >=
- chip->rcf.afactor * chip->lux_ir)
- thres = (chip->rcf.cf1 * thres + chip->rcf.irf1 * ir) /
- APDS_PARAM_SCALE;
- else
- thres = (chip->rcf.cf2 * thres + chip->rcf.irf2 * ir) /
- APDS_PARAM_SCALE;
-
- if (thres >= chip->a_max_result)
- thres = chip->a_max_result - 1;
- return thres;
-}
-
-static inline int apds990x_set_atime(struct apds990x_chip *chip, u32 time_ms)
-{
- u8 reg_value;
-
- chip->atime = time_ms;
- /* Formula is specified in the data sheet */
- reg_value = 256 - ((time_ms * TIME_STEP_SCALER) / TIMESTEP);
- /* Calculate max ADC value for given integration time */
- chip->a_max_result = (u16)(256 - reg_value) * APDS990X_TIME_TO_ADC;
- return apds990x_write_byte(chip, APDS990X_ATIME, reg_value);
-}
-
-/* Called always with mutex locked */
-static int apds990x_refresh_pthres(struct apds990x_chip *chip, int data)
-{
- int ret, lo, hi;
-
- /* If the chip is not in use, don't try to access it */
- if (pm_runtime_suspended(&chip->client->dev))
- return 0;
-
- if (data < chip->prox_thres) {
- lo = 0;
- hi = chip->prox_thres;
- } else {
- lo = chip->prox_thres - APDS_PROX_HYSTERESIS;
- if (chip->prox_continuous_mode)
- hi = chip->prox_thres;
- else
- hi = APDS_RANGE;
- }
-
- ret = apds990x_write_word(chip, APDS990X_PILTL, lo);
- ret |= apds990x_write_word(chip, APDS990X_PIHTL, hi);
- return ret;
-}
-
-/* Called always with mutex locked */
-static int apds990x_refresh_athres(struct apds990x_chip *chip)
-{
- int ret;
- /* If the chip is not in use, don't try to access it */
- if (pm_runtime_suspended(&chip->client->dev))
- return 0;
-
- ret = apds990x_write_word(chip, APDS990X_AILTL,
- apds990x_lux_to_threshold(chip, chip->lux_thres_lo));
- ret |= apds990x_write_word(chip, APDS990X_AIHTL,
- apds990x_lux_to_threshold(chip, chip->lux_thres_hi));
-
- return ret;
-}
-
-/* Called always with mutex locked */
-static void apds990x_force_a_refresh(struct apds990x_chip *chip)
-{
- /* This will force ALS interrupt after the next measurement. */
- apds990x_write_word(chip, APDS990X_AILTL, APDS_LUX_DEF_THRES_LO);
- apds990x_write_word(chip, APDS990X_AIHTL, APDS_LUX_DEF_THRES_HI);
-}
-
-/* Called always with mutex locked */
-static void apds990x_force_p_refresh(struct apds990x_chip *chip)
-{
- /* This will force proximity interrupt after the next measurement. */
- apds990x_write_word(chip, APDS990X_PILTL, APDS_PROX_DEF_THRES - 1);
- apds990x_write_word(chip, APDS990X_PIHTL, APDS_PROX_DEF_THRES);
-}
-
-/* Called always with mutex locked */
-static int apds990x_calc_again(struct apds990x_chip *chip)
-{
- int curr_again = chip->again_meas;
- int next_again = chip->again_meas;
- int ret = 0;
-
- /* Calculate suitable als gain */
- if (chip->lux_clear == chip->a_max_result)
- next_again -= 2; /* ALS saturated. Decrease gain by 2 steps */
- else if (chip->lux_clear > chip->a_max_result / 2)
- next_again--;
- else if (chip->lux_clear < APDS_LUX_GAIN_LO_LIMIT_STRICT)
- next_again += 2; /* Too dark. Increase gain by 2 steps */
- else if (chip->lux_clear < APDS_LUX_GAIN_LO_LIMIT)
- next_again++;
-
- /* Limit gain to available range */
- if (next_again < 0)
- next_again = 0;
- else if (next_again > APDS990X_MAX_AGAIN)
- next_again = APDS990X_MAX_AGAIN;
-
- /* Let's check can we trust the measured result */
- if (chip->lux_clear == chip->a_max_result)
- /* Result can be totally garbage due to saturation */
- ret = -ERANGE;
- else if (next_again != curr_again &&
- chip->lux_clear < APDS_LUX_GAIN_LO_LIMIT_STRICT)
- /*
- * Gain is changed and measurement result is very small.
- * Result can be totally garbage due to underflow
- */
- ret = -ERANGE;
-
- chip->again_next = next_again;
- apds990x_write_byte(chip, APDS990X_CONTROL,
- (chip->pdrive << 6) |
- (chip->pdiode << 4) |
- (chip->pgain << 2) |
- (chip->again_next << 0));
-
- /*
- * Error means bad result -> re-measurement is needed. The forced
- * refresh uses fastest possible persistence setting to get result
- * as soon as possible.
- */
- if (ret < 0)
- apds990x_force_a_refresh(chip);
- else
- apds990x_refresh_athres(chip);
-
- return ret;
-}
-
-/* Called always with mutex locked */
-static int apds990x_get_lux(struct apds990x_chip *chip, int clear, int ir)
-{
- int iac, iac1, iac2; /* IR adjusted counts */
- u32 lpc; /* Lux per count */
-
- /* Formulas:
- * iac1 = CF1 * CLEAR_CH - IRF1 * IR_CH
- * iac2 = CF2 * CLEAR_CH - IRF2 * IR_CH
- */
- iac1 = (chip->cf.cf1 * clear - chip->cf.irf1 * ir) / APDS_PARAM_SCALE;
- iac2 = (chip->cf.cf2 * clear - chip->cf.irf2 * ir) / APDS_PARAM_SCALE;
-
- iac = max(iac1, iac2);
- iac = max(iac, 0);
-
- lpc = APDS990X_LUX_OUTPUT_SCALE * (chip->cf.df * chip->cf.ga) /
- (u32)(again[chip->again_meas] * (u32)chip->atime);
-
- return (iac * lpc) / APDS_PARAM_SCALE;
-}
-
-static int apds990x_ack_int(struct apds990x_chip *chip, u8 mode)
-{
- struct i2c_client *client = chip->client;
- s32 ret;
- u8 reg = APDS990x_CMD | APDS990x_CMD_TYPE_SPE;
-
- switch (mode & (APDS990X_ST_AINT | APDS990X_ST_PINT)) {
- case APDS990X_ST_AINT:
- reg |= APDS990X_INT_ACK_ALS;
- break;
- case APDS990X_ST_PINT:
- reg |= APDS990X_INT_ACK_PS;
- break;
- default:
- reg |= APDS990X_INT_ACK_BOTH;
- break;
- }
-
- ret = i2c_smbus_read_byte_data(client, reg);
- return (int)ret;
-}
-
-static irqreturn_t apds990x_irq(int irq, void *data)
-{
- struct apds990x_chip *chip = data;
- u8 status;
-
- apds990x_read_byte(chip, APDS990X_STATUS, &status);
- apds990x_ack_int(chip, status);
-
- mutex_lock(&chip->mutex);
- if (!pm_runtime_suspended(&chip->client->dev)) {
- if (status & APDS990X_ST_AINT) {
- apds990x_read_word(chip, APDS990X_CDATAL,
- &chip->lux_clear);
- apds990x_read_word(chip, APDS990X_IRDATAL,
- &chip->lux_ir);
- /* Store used gain for calculations */
- chip->again_meas = chip->again_next;
-
- chip->lux_raw = apds990x_get_lux(chip,
- chip->lux_clear,
- chip->lux_ir);
-
- if (apds990x_calc_again(chip) == 0) {
- /* Result is valid */
- chip->lux = chip->lux_raw;
- chip->lux_wait_fresh_res = false;
- wake_up(&chip->wait);
- sysfs_notify(&chip->client->dev.kobj,
- NULL, "lux0_input");
- }
- }
-
- if ((status & APDS990X_ST_PINT) && chip->prox_en) {
- u16 clr_ch;
-
- apds990x_read_word(chip, APDS990X_CDATAL, &clr_ch);
- /*
- * If ALS channel is saturated at min gain,
- * proximity gives false posivite values.
- * Just ignore them.
- */
- if (chip->again_meas == 0 &&
- clr_ch == chip->a_max_result)
- chip->prox_data = 0;
- else
- apds990x_read_word(chip,
- APDS990X_PDATAL,
- &chip->prox_data);
-
- apds990x_refresh_pthres(chip, chip->prox_data);
- if (chip->prox_data < chip->prox_thres)
- chip->prox_data = 0;
- else if (!chip->prox_continuous_mode)
- chip->prox_data = APDS_PROX_RANGE;
- sysfs_notify(&chip->client->dev.kobj,
- NULL, "prox0_raw");
- }
- }
- mutex_unlock(&chip->mutex);
- return IRQ_HANDLED;
-}
-
-static int apds990x_configure(struct apds990x_chip *chip)
-{
- /* It is recommended to use disabled mode during these operations */
- apds990x_write_byte(chip, APDS990X_ENABLE, APDS990X_EN_DISABLE_ALL);
-
- /* conversion and wait times for different state machince states */
- apds990x_write_byte(chip, APDS990X_PTIME, APDS990X_PTIME_DEFAULT);
- apds990x_write_byte(chip, APDS990X_WTIME, APDS990X_WTIME_DEFAULT);
- apds990x_set_atime(chip, APDS_LUX_AVERAGING_TIME);
-
- apds990x_write_byte(chip, APDS990X_CONFIG, 0);
-
- /* Persistence levels */
- apds990x_write_byte(chip, APDS990X_PERS,
- (chip->lux_persistence << APDS990X_APERS_SHIFT) |
- (chip->prox_persistence << APDS990X_PPERS_SHIFT));
-
- apds990x_write_byte(chip, APDS990X_PPCOUNT, chip->pdata->ppcount);
-
- /* Start with relatively small gain */
- chip->again_meas = 1;
- chip->again_next = 1;
- apds990x_write_byte(chip, APDS990X_CONTROL,
- (chip->pdrive << 6) |
- (chip->pdiode << 4) |
- (chip->pgain << 2) |
- (chip->again_next << 0));
- return 0;
-}
-
-static int apds990x_detect(struct apds990x_chip *chip)
-{
- struct i2c_client *client = chip->client;
- int ret;
- u8 id;
-
- ret = apds990x_read_byte(chip, APDS990X_ID, &id);
- if (ret < 0) {
- dev_err(&client->dev, "ID read failed\n");
- return ret;
- }
-
- ret = apds990x_read_byte(chip, APDS990X_REV, &chip->revision);
- if (ret < 0) {
- dev_err(&client->dev, "REV read failed\n");
- return ret;
- }
-
- switch (id) {
- case APDS990X_ID_0:
- case APDS990X_ID_4:
- case APDS990X_ID_29:
- snprintf(chip->chipname, sizeof(chip->chipname), "APDS-990x");
- break;
- default:
- ret = -ENODEV;
- break;
- }
- return ret;
-}
-
-#ifdef CONFIG_PM
-static int apds990x_chip_on(struct apds990x_chip *chip)
-{
- int err = regulator_bulk_enable(ARRAY_SIZE(chip->regs),
- chip->regs);
- if (err < 0)
- return err;
-
- usleep_range(APDS_STARTUP_DELAY, 2 * APDS_STARTUP_DELAY);
-
- /* Refresh all configs in case of regulators were off */
- chip->prox_data = 0;
- apds990x_configure(chip);
- apds990x_mode_on(chip);
- return 0;
-}
-#endif
-
-static int apds990x_chip_off(struct apds990x_chip *chip)
-{
- apds990x_write_byte(chip, APDS990X_ENABLE, APDS990X_EN_DISABLE_ALL);
- regulator_bulk_disable(ARRAY_SIZE(chip->regs), chip->regs);
- return 0;
-}
-
-static ssize_t apds990x_lux_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- struct apds990x_chip *chip = dev_get_drvdata(dev);
- ssize_t ret;
- u32 result;
- long time_left;
-
- if (pm_runtime_suspended(dev))
- return -EIO;
-
- time_left = wait_event_interruptible_timeout(chip->wait,
- !chip->lux_wait_fresh_res,
- msecs_to_jiffies(APDS_TIMEOUT));
- if (!time_left)
- return -EIO;
-
- mutex_lock(&chip->mutex);
- result = (chip->lux * chip->lux_calib) / APDS_CALIB_SCALER;
- if (result > (APDS_RANGE * APDS990X_LUX_OUTPUT_SCALE))
- result = APDS_RANGE * APDS990X_LUX_OUTPUT_SCALE;
-
- ret = sprintf(buf, "%d.%d\n",
- result / APDS990X_LUX_OUTPUT_SCALE,
- result % APDS990X_LUX_OUTPUT_SCALE);
- mutex_unlock(&chip->mutex);
- return ret;
-}
-
-static DEVICE_ATTR(lux0_input, S_IRUGO, apds990x_lux_show, NULL);
-
-static ssize_t apds990x_lux_range_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- return sprintf(buf, "%u\n", APDS_RANGE);
-}
-
-static DEVICE_ATTR(lux0_sensor_range, S_IRUGO, apds990x_lux_range_show, NULL);
-
-static ssize_t apds990x_lux_calib_format_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- return sprintf(buf, "%u\n", APDS_CALIB_SCALER);
-}
-
-static DEVICE_ATTR(lux0_calibscale_default, S_IRUGO,
- apds990x_lux_calib_format_show, NULL);
-
-static ssize_t apds990x_lux_calib_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- struct apds990x_chip *chip = dev_get_drvdata(dev);
-
- return sprintf(buf, "%u\n", chip->lux_calib);
-}
-
-static ssize_t apds990x_lux_calib_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t len)
-{
- struct apds990x_chip *chip = dev_get_drvdata(dev);
- unsigned long value;
- int ret;
-
- ret = kstrtoul(buf, 0, &value);
- if (ret)
- return ret;
-
- chip->lux_calib = value;
-
- return len;
-}
-
-static DEVICE_ATTR(lux0_calibscale, S_IRUGO | S_IWUSR, apds990x_lux_calib_show,
- apds990x_lux_calib_store);
-
-static ssize_t apds990x_rate_avail(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- int i;
- int pos = 0;
-
- for (i = 0; i < ARRAY_SIZE(arates_hz); i++)
- pos += sprintf(buf + pos, "%d ", arates_hz[i]);
- sprintf(buf + pos - 1, "\n");
- return pos;
-}
-
-static ssize_t apds990x_rate_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- struct apds990x_chip *chip = dev_get_drvdata(dev);
-
- return sprintf(buf, "%d\n", chip->arate);
-}
-
-static int apds990x_set_arate(struct apds990x_chip *chip, int rate)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(arates_hz); i++)
- if (rate >= arates_hz[i])
- break;
-
- if (i == ARRAY_SIZE(arates_hz))
- return -EINVAL;
-
- /* Pick up corresponding persistence value */
- chip->lux_persistence = apersis[i];
- chip->arate = arates_hz[i];
-
- /* If the chip is not in use, don't try to access it */
- if (pm_runtime_suspended(&chip->client->dev))
- return 0;
-
- /* Persistence levels */
- return apds990x_write_byte(chip, APDS990X_PERS,
- (chip->lux_persistence << APDS990X_APERS_SHIFT) |
- (chip->prox_persistence << APDS990X_PPERS_SHIFT));
-}
-
-static ssize_t apds990x_rate_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t len)
-{
- struct apds990x_chip *chip = dev_get_drvdata(dev);
- unsigned long value;
- int ret;
-
- ret = kstrtoul(buf, 0, &value);
- if (ret)
- return ret;
-
- mutex_lock(&chip->mutex);
- ret = apds990x_set_arate(chip, value);
- mutex_unlock(&chip->mutex);
-
- if (ret < 0)
- return ret;
- return len;
-}
-
-static DEVICE_ATTR(lux0_rate_avail, S_IRUGO, apds990x_rate_avail, NULL);
-
-static DEVICE_ATTR(lux0_rate, S_IRUGO | S_IWUSR, apds990x_rate_show,
- apds990x_rate_store);
-
-static ssize_t apds990x_prox_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- ssize_t ret;
- struct apds990x_chip *chip = dev_get_drvdata(dev);
-
- if (pm_runtime_suspended(dev) || !chip->prox_en)
- return -EIO;
-
- mutex_lock(&chip->mutex);
- ret = sprintf(buf, "%d\n", chip->prox_data);
- mutex_unlock(&chip->mutex);
- return ret;
-}
-
-static DEVICE_ATTR(prox0_raw, S_IRUGO, apds990x_prox_show, NULL);
-
-static ssize_t apds990x_prox_range_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- return sprintf(buf, "%u\n", APDS_PROX_RANGE);
-}
-
-static DEVICE_ATTR(prox0_sensor_range, S_IRUGO, apds990x_prox_range_show, NULL);
-
-static ssize_t apds990x_prox_enable_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- struct apds990x_chip *chip = dev_get_drvdata(dev);
-
- return sprintf(buf, "%d\n", chip->prox_en);
-}
-
-static ssize_t apds990x_prox_enable_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t len)
-{
- struct apds990x_chip *chip = dev_get_drvdata(dev);
- unsigned long value;
- int ret;
-
- ret = kstrtoul(buf, 0, &value);
- if (ret)
- return ret;
-
- mutex_lock(&chip->mutex);
-
- if (!chip->prox_en)
- chip->prox_data = 0;
-
- if (value)
- chip->prox_en++;
- else if (chip->prox_en > 0)
- chip->prox_en--;
-
- if (!pm_runtime_suspended(dev))
- apds990x_mode_on(chip);
- mutex_unlock(&chip->mutex);
- return len;
-}
-
-static DEVICE_ATTR(prox0_raw_en, S_IRUGO | S_IWUSR, apds990x_prox_enable_show,
- apds990x_prox_enable_store);
-
-static const char *reporting_modes[] = {"trigger", "periodic"};
-
-static ssize_t apds990x_prox_reporting_mode_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- struct apds990x_chip *chip = dev_get_drvdata(dev);
-
- return sprintf(buf, "%s\n",
- reporting_modes[!!chip->prox_continuous_mode]);
-}
-
-static ssize_t apds990x_prox_reporting_mode_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t len)
-{
- struct apds990x_chip *chip = dev_get_drvdata(dev);
- int ret;
-
- ret = sysfs_match_string(reporting_modes, buf);
- if (ret < 0)
- return ret;
-
- chip->prox_continuous_mode = ret;
- return len;
-}
-
-static DEVICE_ATTR(prox0_reporting_mode, S_IRUGO | S_IWUSR,
- apds990x_prox_reporting_mode_show,
- apds990x_prox_reporting_mode_store);
-
-static ssize_t apds990x_prox_reporting_avail_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- return sprintf(buf, "%s %s\n", reporting_modes[0], reporting_modes[1]);
-}
-
-static DEVICE_ATTR(prox0_reporting_mode_avail, S_IRUGO | S_IWUSR,
- apds990x_prox_reporting_avail_show, NULL);
-
-
-static ssize_t apds990x_lux_thresh_above_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- struct apds990x_chip *chip = dev_get_drvdata(dev);
-
- return sprintf(buf, "%d\n", chip->lux_thres_hi);
-}
-
-static ssize_t apds990x_lux_thresh_below_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- struct apds990x_chip *chip = dev_get_drvdata(dev);
-
- return sprintf(buf, "%d\n", chip->lux_thres_lo);
-}
-
-static ssize_t apds990x_set_lux_thresh(struct apds990x_chip *chip, u32 *target,
- const char *buf)
-{
- unsigned long thresh;
- int ret;
-
- ret = kstrtoul(buf, 0, &thresh);
- if (ret)
- return ret;
-
- if (thresh > APDS_RANGE)
- return -EINVAL;
-
- mutex_lock(&chip->mutex);
- *target = thresh;
- /*
- * Don't update values in HW if we are still waiting for
- * first interrupt to come after device handle open call.
- */
- if (!chip->lux_wait_fresh_res)
- apds990x_refresh_athres(chip);
- mutex_unlock(&chip->mutex);
- return ret;
-
-}
-
-static ssize_t apds990x_lux_thresh_above_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t len)
-{
- struct apds990x_chip *chip = dev_get_drvdata(dev);
- int ret = apds990x_set_lux_thresh(chip, &chip->lux_thres_hi, buf);
-
- if (ret < 0)
- return ret;
- return len;
-}
-
-static ssize_t apds990x_lux_thresh_below_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t len)
-{
- struct apds990x_chip *chip = dev_get_drvdata(dev);
- int ret = apds990x_set_lux_thresh(chip, &chip->lux_thres_lo, buf);
-
- if (ret < 0)
- return ret;
- return len;
-}
-
-static DEVICE_ATTR(lux0_thresh_above_value, S_IRUGO | S_IWUSR,
- apds990x_lux_thresh_above_show,
- apds990x_lux_thresh_above_store);
-
-static DEVICE_ATTR(lux0_thresh_below_value, S_IRUGO | S_IWUSR,
- apds990x_lux_thresh_below_show,
- apds990x_lux_thresh_below_store);
-
-static ssize_t apds990x_prox_threshold_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- struct apds990x_chip *chip = dev_get_drvdata(dev);
-
- return sprintf(buf, "%d\n", chip->prox_thres);
-}
-
-static ssize_t apds990x_prox_threshold_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t len)
-{
- struct apds990x_chip *chip = dev_get_drvdata(dev);
- unsigned long value;
- int ret;
-
- ret = kstrtoul(buf, 0, &value);
- if (ret)
- return ret;
-
- if ((value > APDS_RANGE) || (value == 0) ||
- (value < APDS_PROX_HYSTERESIS))
- return -EINVAL;
-
- mutex_lock(&chip->mutex);
- chip->prox_thres = value;
-
- apds990x_force_p_refresh(chip);
- mutex_unlock(&chip->mutex);
- return len;
-}
-
-static DEVICE_ATTR(prox0_thresh_above_value, S_IRUGO | S_IWUSR,
- apds990x_prox_threshold_show,
- apds990x_prox_threshold_store);
-
-static ssize_t apds990x_power_state_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- return sprintf(buf, "%d\n", !pm_runtime_suspended(dev));
-}
-
-static ssize_t apds990x_power_state_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t len)
-{
- struct apds990x_chip *chip = dev_get_drvdata(dev);
- unsigned long value;
- int ret;
-
- ret = kstrtoul(buf, 0, &value);
- if (ret)
- return ret;
-
- if (value) {
- pm_runtime_get_sync(dev);
- mutex_lock(&chip->mutex);
- chip->lux_wait_fresh_res = true;
- apds990x_force_a_refresh(chip);
- apds990x_force_p_refresh(chip);
- mutex_unlock(&chip->mutex);
- } else {
- if (!pm_runtime_suspended(dev))
- pm_runtime_put(dev);
- }
- return len;
-}
-
-static DEVICE_ATTR(power_state, S_IRUGO | S_IWUSR,
- apds990x_power_state_show,
- apds990x_power_state_store);
-
-static ssize_t apds990x_chip_id_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- struct apds990x_chip *chip = dev_get_drvdata(dev);
-
- return sprintf(buf, "%s %d\n", chip->chipname, chip->revision);
-}
-
-static DEVICE_ATTR(chip_id, S_IRUGO, apds990x_chip_id_show, NULL);
-
-static struct attribute *sysfs_attrs_ctrl[] = {
- &dev_attr_lux0_calibscale.attr,
- &dev_attr_lux0_calibscale_default.attr,
- &dev_attr_lux0_input.attr,
- &dev_attr_lux0_sensor_range.attr,
- &dev_attr_lux0_rate.attr,
- &dev_attr_lux0_rate_avail.attr,
- &dev_attr_lux0_thresh_above_value.attr,
- &dev_attr_lux0_thresh_below_value.attr,
- &dev_attr_prox0_raw_en.attr,
- &dev_attr_prox0_raw.attr,
- &dev_attr_prox0_sensor_range.attr,
- &dev_attr_prox0_thresh_above_value.attr,
- &dev_attr_prox0_reporting_mode.attr,
- &dev_attr_prox0_reporting_mode_avail.attr,
- &dev_attr_chip_id.attr,
- &dev_attr_power_state.attr,
- NULL
-};
-
-static const struct attribute_group apds990x_attribute_group[] = {
- {.attrs = sysfs_attrs_ctrl },
-};
-
-static int apds990x_probe(struct i2c_client *client)
-{
- struct apds990x_chip *chip;
- int err;
-
- chip = kzalloc_obj(*chip);
- if (!chip)
- return -ENOMEM;
-
- i2c_set_clientdata(client, chip);
- chip->client = client;
-
- init_waitqueue_head(&chip->wait);
- mutex_init(&chip->mutex);
- chip->pdata = client->dev.platform_data;
-
- if (chip->pdata == NULL) {
- dev_err(&client->dev, "platform data is mandatory\n");
- err = -EINVAL;
- goto fail1;
- }
-
- if (chip->pdata->cf.ga == 0) {
- /* set uncovered sensor default parameters */
- chip->cf.ga = 1966; /* 0.48 * APDS_PARAM_SCALE */
- chip->cf.cf1 = 4096; /* 1.00 * APDS_PARAM_SCALE */
- chip->cf.irf1 = 9134; /* 2.23 * APDS_PARAM_SCALE */
- chip->cf.cf2 = 2867; /* 0.70 * APDS_PARAM_SCALE */
- chip->cf.irf2 = 5816; /* 1.42 * APDS_PARAM_SCALE */
- chip->cf.df = 52;
- } else {
- chip->cf = chip->pdata->cf;
- }
-
- /* precalculate inverse chip factors for threshold control */
- chip->rcf.afactor =
- (chip->cf.irf1 - chip->cf.irf2) * APDS_PARAM_SCALE /
- (chip->cf.cf1 - chip->cf.cf2);
- chip->rcf.cf1 = APDS_PARAM_SCALE * APDS_PARAM_SCALE /
- chip->cf.cf1;
- chip->rcf.irf1 = chip->cf.irf1 * APDS_PARAM_SCALE /
- chip->cf.cf1;
- chip->rcf.cf2 = APDS_PARAM_SCALE * APDS_PARAM_SCALE /
- chip->cf.cf2;
- chip->rcf.irf2 = chip->cf.irf2 * APDS_PARAM_SCALE /
- chip->cf.cf2;
-
- /* Set something to start with */
- chip->lux_thres_hi = APDS_LUX_DEF_THRES_HI;
- chip->lux_thres_lo = APDS_LUX_DEF_THRES_LO;
- chip->lux_calib = APDS_LUX_NEUTRAL_CALIB_VALUE;
-
- chip->prox_thres = APDS_PROX_DEF_THRES;
- chip->pdrive = chip->pdata->pdrive;
- chip->pdiode = APDS_PDIODE_IR;
- chip->pgain = APDS_PGAIN_1X;
- chip->prox_calib = APDS_PROX_NEUTRAL_CALIB_VALUE;
- chip->prox_persistence = APDS_DEFAULT_PROX_PERS;
- chip->prox_continuous_mode = false;
-
- chip->regs[0].supply = reg_vcc;
- chip->regs[1].supply = reg_vled;
-
- err = regulator_bulk_get(&client->dev,
- ARRAY_SIZE(chip->regs), chip->regs);
- if (err < 0) {
- dev_err(&client->dev, "Cannot get regulators\n");
- goto fail1;
- }
-
- err = regulator_bulk_enable(ARRAY_SIZE(chip->regs), chip->regs);
- if (err < 0) {
- dev_err(&client->dev, "Cannot enable regulators\n");
- goto fail2;
- }
-
- usleep_range(APDS_STARTUP_DELAY, 2 * APDS_STARTUP_DELAY);
-
- err = apds990x_detect(chip);
- if (err < 0) {
- dev_err(&client->dev, "APDS990X not found\n");
- goto fail3;
- }
-
- pm_runtime_set_active(&client->dev);
-
- apds990x_configure(chip);
- apds990x_set_arate(chip, APDS_LUX_DEFAULT_RATE);
- apds990x_mode_on(chip);
-
- pm_runtime_enable(&client->dev);
-
- if (chip->pdata->setup_resources) {
- err = chip->pdata->setup_resources();
- if (err) {
- err = -EINVAL;
- goto fail4;
- }
- }
-
- err = sysfs_create_group(&chip->client->dev.kobj,
- apds990x_attribute_group);
- if (err < 0) {
- dev_err(&chip->client->dev, "Sysfs registration failed\n");
- goto fail5;
- }
-
- err = request_threaded_irq(client->irq, NULL,
- apds990x_irq,
- IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW |
- IRQF_ONESHOT,
- "apds990x", chip);
- if (err) {
- dev_err(&client->dev, "could not get IRQ %d\n",
- client->irq);
- goto fail6;
- }
- return err;
-fail6:
- sysfs_remove_group(&chip->client->dev.kobj,
- &apds990x_attribute_group[0]);
-fail5:
- if (chip->pdata && chip->pdata->release_resources)
- chip->pdata->release_resources();
-fail4:
- pm_runtime_disable(&client->dev);
-fail3:
- regulator_bulk_disable(ARRAY_SIZE(chip->regs), chip->regs);
-fail2:
- regulator_bulk_free(ARRAY_SIZE(chip->regs), chip->regs);
-fail1:
- kfree(chip);
- return err;
-}
-
-static void apds990x_remove(struct i2c_client *client)
-{
- struct apds990x_chip *chip = i2c_get_clientdata(client);
-
- free_irq(client->irq, chip);
- sysfs_remove_group(&chip->client->dev.kobj,
- apds990x_attribute_group);
-
- if (chip->pdata && chip->pdata->release_resources)
- chip->pdata->release_resources();
-
- if (!pm_runtime_suspended(&client->dev))
- apds990x_chip_off(chip);
-
- pm_runtime_disable(&client->dev);
- pm_runtime_set_suspended(&client->dev);
-
- regulator_bulk_free(ARRAY_SIZE(chip->regs), chip->regs);
-
- kfree(chip);
-}
-
-#ifdef CONFIG_PM_SLEEP
-static int apds990x_suspend(struct device *dev)
-{
- struct i2c_client *client = to_i2c_client(dev);
- struct apds990x_chip *chip = i2c_get_clientdata(client);
-
- apds990x_chip_off(chip);
- return 0;
-}
-
-static int apds990x_resume(struct device *dev)
-{
- struct i2c_client *client = to_i2c_client(dev);
- struct apds990x_chip *chip = i2c_get_clientdata(client);
-
- /*
- * If we were enabled at suspend time, it is expected
- * everything works nice and smoothly. Chip_on is enough
- */
- apds990x_chip_on(chip);
-
- return 0;
-}
-#endif
-
-#ifdef CONFIG_PM
-static int apds990x_runtime_suspend(struct device *dev)
-{
- struct i2c_client *client = to_i2c_client(dev);
- struct apds990x_chip *chip = i2c_get_clientdata(client);
-
- apds990x_chip_off(chip);
- return 0;
-}
-
-static int apds990x_runtime_resume(struct device *dev)
-{
- struct i2c_client *client = to_i2c_client(dev);
- struct apds990x_chip *chip = i2c_get_clientdata(client);
-
- apds990x_chip_on(chip);
- return 0;
-}
-
-#endif
-
-static const struct i2c_device_id apds990x_id[] = {
- { "apds990x" },
- {}
-};
-
-MODULE_DEVICE_TABLE(i2c, apds990x_id);
-
-static const struct dev_pm_ops apds990x_pm_ops = {
- SET_SYSTEM_SLEEP_PM_OPS(apds990x_suspend, apds990x_resume)
- SET_RUNTIME_PM_OPS(apds990x_runtime_suspend,
- apds990x_runtime_resume,
- NULL)
-};
-
-static struct i2c_driver apds990x_driver = {
- .driver = {
- .name = "apds990x",
- .pm = &apds990x_pm_ops,
- },
- .probe = apds990x_probe,
- .remove = apds990x_remove,
- .id_table = apds990x_id,
-};
-
-module_i2c_driver(apds990x_driver);
-
-MODULE_DESCRIPTION("APDS990X combined ALS and proximity sensor");
-MODULE_AUTHOR("Samu Onkalo, Nokia Corporation");
-MODULE_LICENSE("GPL v2");
diff --git a/include/linux/platform_data/apds990x.h b/include/linux/platform_data/apds990x.h
deleted file mode 100644
index 37684f68c04f..000000000000
--- a/include/linux/platform_data/apds990x.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * This file is part of the APDS990x sensor driver.
- * Chip is combined proximity and ambient light sensor.
- *
- * Copyright (C) 2010 Nokia Corporation and/or its subsidiary(-ies).
- *
- * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
- */
-
-#ifndef __APDS990X_H__
-#define __APDS990X_H__
-
-
-#define APDS_IRLED_CURR_12mA 0x3
-#define APDS_IRLED_CURR_25mA 0x2
-#define APDS_IRLED_CURR_50mA 0x1
-#define APDS_IRLED_CURR_100mA 0x0
-
-/**
- * struct apds990x_chip_factors - defines effect of the cover window
- * @ga: Total glass attenuation
- * @cf1: clear channel factor 1 for raw to lux conversion
- * @irf1: IR channel factor 1 for raw to lux conversion
- * @cf2: clear channel factor 2 for raw to lux conversion
- * @irf2: IR channel factor 2 for raw to lux conversion
- * @df: device factor for conversion formulas
- *
- * Structure for tuning ALS calculation to match with environment.
- * Values depend on the material above the sensor and the sensor
- * itself. If the GA is zero, driver will use uncovered sensor default values
- * format: decimal value * APDS_PARAM_SCALE except df which is plain integer.
- */
-struct apds990x_chip_factors {
- int ga;
- int cf1;
- int irf1;
- int cf2;
- int irf2;
- int df;
-};
-#define APDS_PARAM_SCALE 4096
-
-/**
- * struct apds990x_platform_data - platform data for apsd990x.c driver
- * @cf: chip factor data
- * @pdrive: IR-led driving current
- * @ppcount: number of IR pulses used for proximity estimation
- * @setup_resources: interrupt line setup call back function
- * @release_resources: interrupt line release call back function
- *
- * Proximity detection result depends heavily on correct ppcount, pdrive
- * and cover window.
- *
- */
-
-struct apds990x_platform_data {
- struct apds990x_chip_factors cf;
- u8 pdrive;
- u8 ppcount;
- int (*setup_resources)(void);
- int (*release_resources)(void);
-};
-
-#endif
--
2.51.0
^ permalink raw reply related
* Re: [PATCH v2 3/3] misc: Remove old APDS990x driver
From: Greg Kroah-Hartman @ 2026-04-19 8:42 UTC (permalink / raw)
To: Svyatoslav Ryhel
Cc: Jonathan Cameron, David Lechner, Nuno Sá, Andy Shevchenko,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Jonathan Corbet,
Shuah Khan, Arnd Bergmann, Randy Dunlap, linux-iio, devicetree,
linux-kernel, linux-doc
In-Reply-To: <20260419083125.35572-4-clamor95@gmail.com>
On Sun, Apr 19, 2026 at 11:31:24AM +0300, Svyatoslav Ryhel wrote:
> The Avago APDS9900/9901 ALS/Proximity sensor is now supported by tsl2772
> IIO driver so there is no need to keep this old implementation. Remove it.
>
> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> ---
> Documentation/misc-devices/apds990x.rst | 128 ---
> drivers/misc/Kconfig | 10 -
> drivers/misc/Makefile | 1 -
> drivers/misc/apds990x.c | 1284 -----------------------
> include/linux/platform_data/apds990x.h | 65 --
> 5 files changed, 1488 deletions(-)
> delete mode 100644 Documentation/misc-devices/apds990x.rst
> delete mode 100644 drivers/misc/apds990x.c
> delete mode 100644 include/linux/platform_data/apds990x.h
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
^ permalink raw reply
* [PATCH v2 0/5] media: lm3560: convert to use OF bindings
From: Svyatoslav Ryhel @ 2026-04-19 9:34 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Sakari Ailus, Mauro Carvalho Chehab,
Svyatoslav Ryhel
Cc: linux-leds, devicetree, linux-kernel, linux-media
Add missing HWEN input pin and IN supply. Fix v4l2 subdev registration.
Remove platform data and switch to OF device tree bindings.
---
Changes in v2:
- vendor properties swapped with generic LED properties
- added mutex lock usage optimization
- power supply and enable gpio commits squashed into PM
configuration since they are both required in making
proper on/off sequence.
---
Svyatoslav Ryhel (5):
dt-bindings: leds: Document TI LM3560 Synchronous Boost Flash Driver
media: i2c: lm3560: Fix v4l2 subdev registration
media: i2c: lm3560: Optimize mutex lock usage
media: i2c: lm3560: Convert to use OF bindings
media: i2c: lm3560: Add support for PM features
.../devicetree/bindings/leds/ti,lm3560.yaml | 131 +++++++++
drivers/media/i2c/lm3560.c | 262 ++++++++++++++----
include/media/i2c/lm3560.h | 15 -
3 files changed, 340 insertions(+), 68 deletions(-)
create mode 100644 Documentation/devicetree/bindings/leds/ti,lm3560.yaml
--
2.51.0
^ permalink raw reply
* [PATCH v2 1/5] dt-bindings: leds: Document TI LM3560 Synchronous Boost Flash Driver
From: Svyatoslav Ryhel @ 2026-04-19 9:34 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Sakari Ailus, Mauro Carvalho Chehab,
Svyatoslav Ryhel
Cc: linux-leds, devicetree, linux-kernel, linux-media
In-Reply-To: <20260419093412.40796-1-clamor95@gmail.com>
Document TI LM3560 Synchronous Boost Flash Driver used for camera flash
LEDs.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
.../devicetree/bindings/leds/ti,lm3560.yaml | 131 ++++++++++++++++++
1 file changed, 131 insertions(+)
create mode 100644 Documentation/devicetree/bindings/leds/ti,lm3560.yaml
diff --git a/Documentation/devicetree/bindings/leds/ti,lm3560.yaml b/Documentation/devicetree/bindings/leds/ti,lm3560.yaml
new file mode 100644
index 000000000000..c6c553ad23f9
--- /dev/null
+++ b/Documentation/devicetree/bindings/leds/ti,lm3560.yaml
@@ -0,0 +1,131 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/leds/ti,lm3560.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: TI LM3560 Synchronous Boost Flash Driver
+
+maintainers:
+ - Svyatoslav Ryhel <clamor95@gmail.com>
+
+description:
+ The LM3560 is a 2-MHz fixed frequency synchronous boost converter with two
+ 1000-mA constant current drivers for high-current white LEDs. The dual high-
+ side current sources allow for grounded cathode LED operation and can be
+ tied together for providing flash currents at up to 2 A through a single LED.
+ An adaptive regulation method ensures the current for each LED remains in
+ regulation and maximizes efficiency.
+
+allOf:
+ - $ref: /schemas/leds/common.yaml
+
+properties:
+ compatible:
+ enum:
+ - ti,lm3559
+ - ti,lm3560
+
+ reg:
+ maxItems: 1
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+ enable-gpios:
+ description: GPIO connected to the HWEN pin.
+ maxItems: 1
+
+ vin-supply:
+ description: Supply connected to the IN line.
+
+ flash-max-timeout-us:
+ minimum: 32000
+ maximum: 1024000
+ default: 32000
+
+ ti,peak-current-microamp:
+ description:
+ The LM3560 features 4 selectable current limits 1.6A, 2.3A, 3A, and 3.6A.
+ When the current limit is reached, the LM3560 stops switching for the
+ remainder of the switching cycle.
+ enum: [16000000, 23000000, 30000000, 36000000]
+ default: 16000000
+
+patternProperties:
+ '^led@[01]$':
+ description: LED control bank nodes.
+ $ref: /schemas/leds/common.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ reg:
+ description: Control bank selection (0 = bank A, 1 = bank B).
+ maximum: 1
+
+ flash-max-microamp:
+ minimum: 62500
+ maximum: 1000000
+
+ led-max-microamp:
+ minimum: 31250
+ maximum: 250000
+
+ required:
+ - reg
+ - flash-max-microamp
+ - led-max-microamp
+
+required:
+ - compatible
+ - reg
+ - '#address-cells'
+ - '#size-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led-controller@53 {
+ compatible = "ti,lm3560";
+ reg = <0x53>;
+
+ enable-gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
+ vin-supply = <&vdd_3v3_sys>;
+
+ flash-max-timeout-us = <1024000>;
+ ti,peak-current-microamp = <16000000>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+
+ label = "white::flash";
+ linux,default-trigger = "flash";
+
+ flash-max-microamp = <562500>;
+ led-max-microamp = <156250>;
+ };
+
+ led@1 {
+ reg = <1>;
+
+ label = "yellow::flash";
+ linux,default-trigger = "flash";
+
+ flash-max-microamp = <562500>;
+ led-max-microamp = <156250>;
+ };
+ };
+ };
--
2.51.0
^ permalink raw reply related
* [PATCH v2 2/5] media: i2c: lm3560: Fix v4l2 subdev registration
From: Svyatoslav Ryhel @ 2026-04-19 9:34 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Sakari Ailus, Mauro Carvalho Chehab,
Svyatoslav Ryhel
Cc: linux-leds, devicetree, linux-kernel, linux-media
In-Reply-To: <20260419093412.40796-1-clamor95@gmail.com>
The existing driver does not call media subdev registration, making it
invisible to the media framework. Since the LM3560 supports two
independent LEDs, register each LED as a separate media entity.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
drivers/media/i2c/lm3560.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/media/i2c/lm3560.c b/drivers/media/i2c/lm3560.c
index f4cc844f4e3c..085a0ef70e39 100644
--- a/drivers/media/i2c/lm3560.c
+++ b/drivers/media/i2c/lm3560.c
@@ -364,8 +364,15 @@ static int lm3560_subdev_init(struct lm3560_flash *flash,
goto err_out;
flash->subdev_led[led_no].entity.function = MEDIA_ENT_F_FLASH;
- return rval;
+ rval = v4l2_async_register_subdev(&flash->subdev_led[led_no]);
+ if (rval < 0) {
+ dev_err(flash->dev, "failed to register V4L2 subdev");
+ goto error_out_media;
+ }
+ return rval;
+error_out_media:
+ media_entity_cleanup(&flash->subdev_led[led_no].entity);
err_out:
v4l2_ctrl_handler_free(&flash->ctrls_led[led_no]);
return rval;
--
2.51.0
^ permalink raw reply related
* [PATCH v2 3/5] media: i2c: lm3560: Optimize mutex lock usage
From: Svyatoslav Ryhel @ 2026-04-19 9:34 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Sakari Ailus, Mauro Carvalho Chehab,
Svyatoslav Ryhel
Cc: linux-leds, devicetree, linux-kernel, linux-media
In-Reply-To: <20260419093412.40796-1-clamor95@gmail.com>
Pass the device's own mutex lock to the control handler so that the media
framework can handle control access instead of managing it manually. The
lock must be common to both sub-devices, so the individual sub-device
locks will not work here.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
drivers/media/i2c/lm3560.c | 18 +++++-------------
1 file changed, 5 insertions(+), 13 deletions(-)
diff --git a/drivers/media/i2c/lm3560.c b/drivers/media/i2c/lm3560.c
index 085a0ef70e39..5cd22c2fbb64 100644
--- a/drivers/media/i2c/lm3560.c
+++ b/drivers/media/i2c/lm3560.c
@@ -162,14 +162,12 @@ static int lm3560_get_ctrl(struct v4l2_ctrl *ctrl, enum lm3560_led_id led_no)
struct lm3560_flash *flash = to_lm3560_flash(ctrl, led_no);
int rval = -EINVAL;
- mutex_lock(&flash->lock);
-
if (ctrl->id == V4L2_CID_FLASH_FAULT) {
s32 fault = 0;
unsigned int reg_val;
rval = regmap_read(flash->regmap, REG_FLAG, ®_val);
if (rval < 0)
- goto out;
+ return rval;
if (reg_val & FAULT_SHORT_CIRCUIT)
fault |= V4L2_FLASH_FAULT_SHORT_CIRCUIT;
if (reg_val & FAULT_OVERTEMP)
@@ -179,8 +177,6 @@ static int lm3560_get_ctrl(struct v4l2_ctrl *ctrl, enum lm3560_led_id led_no)
ctrl->cur.val = fault;
}
-out:
- mutex_unlock(&flash->lock);
return rval;
}
@@ -190,8 +186,6 @@ static int lm3560_set_ctrl(struct v4l2_ctrl *ctrl, enum lm3560_led_id led_no)
u8 tout_bits;
int rval = -EINVAL;
- mutex_lock(&flash->lock);
-
switch (ctrl->id) {
case V4L2_CID_FLASH_LED_MODE:
flash->led_mode = ctrl->val;
@@ -202,14 +196,12 @@ static int lm3560_set_ctrl(struct v4l2_ctrl *ctrl, enum lm3560_led_id led_no)
case V4L2_CID_FLASH_STROBE_SOURCE:
rval = regmap_update_bits(flash->regmap,
REG_CONFIG1, 0x04, (ctrl->val) << 2);
- if (rval < 0)
- goto err_out;
break;
case V4L2_CID_FLASH_STROBE:
if (flash->led_mode != V4L2_FLASH_LED_MODE_FLASH) {
rval = -EBUSY;
- goto err_out;
+ break;
}
flash->led_mode = V4L2_FLASH_LED_MODE_FLASH;
rval = lm3560_mode_ctrl(flash);
@@ -218,7 +210,7 @@ static int lm3560_set_ctrl(struct v4l2_ctrl *ctrl, enum lm3560_led_id led_no)
case V4L2_CID_FLASH_STROBE_STOP:
if (flash->led_mode != V4L2_FLASH_LED_MODE_FLASH) {
rval = -EBUSY;
- goto err_out;
+ break;
}
flash->led_mode = V4L2_FLASH_LED_MODE_NONE;
rval = lm3560_mode_ctrl(flash);
@@ -239,8 +231,6 @@ static int lm3560_set_ctrl(struct v4l2_ctrl *ctrl, enum lm3560_led_id led_no)
break;
}
-err_out:
- mutex_unlock(&flash->lock);
return rval;
}
@@ -332,6 +322,8 @@ static int lm3560_init_controls(struct lm3560_flash *flash,
return hdl->error;
flash->subdev_led[led_no].ctrl_handler = hdl;
+ flash->subdev_led[led_no].ctrl_handler->lock = &flash->lock;
+
return 0;
}
--
2.51.0
^ permalink raw reply related
* [PATCH v2 4/5] media: i2c: lm3560: Convert to use OF bindings
From: Svyatoslav Ryhel @ 2026-04-19 9:34 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Sakari Ailus, Mauro Carvalho Chehab,
Svyatoslav Ryhel
Cc: linux-leds, devicetree, linux-kernel, linux-media
In-Reply-To: <20260419093412.40796-1-clamor95@gmail.com>
Since there are no users of this driver via platform data, remove platform
data and switch to using device tree bindings.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
drivers/media/i2c/lm3560.c | 112 ++++++++++++++++++++++++++-----------
include/media/i2c/lm3560.h | 15 -----
2 files changed, 79 insertions(+), 48 deletions(-)
diff --git a/drivers/media/i2c/lm3560.c b/drivers/media/i2c/lm3560.c
index 5cd22c2fbb64..022a6a76befb 100644
--- a/drivers/media/i2c/lm3560.c
+++ b/drivers/media/i2c/lm3560.c
@@ -13,7 +13,9 @@
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/slab.h>
+#include <linux/mod_devicetable.h>
#include <linux/mutex.h>
+#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/videodev2.h>
#include <media/i2c/lm3560.h>
@@ -43,22 +45,30 @@ enum led_enable {
* struct lm3560_flash
*
* @dev: pointer to &struct device
- * @pdata: platform data
* @regmap: reg. map for i2c
* @lock: muxtex for serial access.
* @led_mode: V4L2 LED mode
* @ctrls_led: V4L2 controls
* @subdev_led: V4L2 subdev
+ * @peak: peak current
+ * @max_flash_timeout: flash timeout
+ * @max_flash_brt: flash mode led brightness
+ * @max_torch_brt: torch mode led brightness
*/
struct lm3560_flash {
struct device *dev;
- struct lm3560_platform_data *pdata;
struct regmap *regmap;
struct mutex lock;
enum v4l2_flash_led_mode led_mode;
struct v4l2_ctrl_handler ctrls_led[LM3560_LED_MAX];
struct v4l2_subdev subdev_led[LM3560_LED_MAX];
+
+ enum lm3560_peak_current peak;
+ u32 max_flash_timeout;
+
+ u32 max_flash_brt[LM3560_LED_MAX];
+ u32 max_torch_brt[LM3560_LED_MAX];
};
#define to_lm3560_flash(_ctrl, _no) \
@@ -269,8 +279,8 @@ static int lm3560_init_controls(struct lm3560_flash *flash,
enum lm3560_led_id led_no)
{
struct v4l2_ctrl *fault;
- u32 max_flash_brt = flash->pdata->max_flash_brt[led_no];
- u32 max_torch_brt = flash->pdata->max_torch_brt[led_no];
+ u32 max_flash_brt = flash->max_flash_brt[led_no];
+ u32 max_torch_brt = flash->max_torch_brt[led_no];
struct v4l2_ctrl_handler *hdl = &flash->ctrls_led[led_no];
const struct v4l2_ctrl_ops *ops = &lm3560_led_ctrl_ops[led_no];
@@ -295,9 +305,9 @@ static int lm3560_init_controls(struct lm3560_flash *flash,
/* flash strobe timeout */
v4l2_ctrl_new_std(hdl, ops, V4L2_CID_FLASH_TIMEOUT,
LM3560_FLASH_TOUT_MIN,
- flash->pdata->max_flash_timeout,
+ flash->max_flash_timeout,
LM3560_FLASH_TOUT_STEP,
- flash->pdata->max_flash_timeout);
+ flash->max_flash_timeout);
/* flash brt */
v4l2_ctrl_new_std(hdl, ops, V4L2_CID_FLASH_INTENSITY,
@@ -339,15 +349,18 @@ static const struct regmap_config lm3560_regmap = {
};
static int lm3560_subdev_init(struct lm3560_flash *flash,
- enum lm3560_led_id led_no, char *led_name)
+ enum lm3560_led_id led_no,
+ struct fwnode_handle *fwnode)
{
struct i2c_client *client = to_i2c_client(flash->dev);
int rval;
v4l2_i2c_subdev_init(&flash->subdev_led[led_no], client, &lm3560_ops);
flash->subdev_led[led_no].flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
- strscpy(flash->subdev_led[led_no].name, led_name,
- sizeof(flash->subdev_led[led_no].name));
+ snprintf(flash->subdev_led[led_no].name,
+ sizeof(flash->subdev_led[led_no].name),
+ "lm3560-led%d", led_no);
+ flash->subdev_led[led_no].fwnode = fwnode;
rval = lm3560_init_controls(flash, led_no);
if (rval)
goto err_out;
@@ -377,7 +390,7 @@ static int lm3560_init_device(struct lm3560_flash *flash)
/* set peak current */
rval = regmap_update_bits(flash->regmap,
- REG_FLASH_TOUT, 0x60, flash->pdata->peak);
+ REG_FLASH_TOUT, 0x60, flash->peak);
if (rval < 0)
return rval;
/* output disable */
@@ -393,8 +406,9 @@ static int lm3560_init_device(struct lm3560_flash *flash)
static int lm3560_probe(struct i2c_client *client)
{
struct lm3560_flash *flash;
- struct lm3560_platform_data *pdata = dev_get_platdata(&client->dev);
- int rval;
+ struct fwnode_handle *node;
+ u32 peak_ua;
+ int rval, reg;
flash = devm_kzalloc(&client->dev, sizeof(*flash), GFP_KERNEL);
if (flash == NULL)
@@ -406,36 +420,60 @@ static int lm3560_probe(struct i2c_client *client)
return rval;
}
- /* if there is no platform data, use chip default value */
- if (pdata == NULL) {
- pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
- if (pdata == NULL)
- return -ENODEV;
- pdata->peak = LM3560_PEAK_3600mA;
- pdata->max_flash_timeout = LM3560_FLASH_TOUT_MAX;
- /* led 1 */
- pdata->max_flash_brt[LM3560_LED0] = LM3560_FLASH_BRT_MAX;
- pdata->max_torch_brt[LM3560_LED0] = LM3560_TORCH_BRT_MAX;
- /* led 2 */
- pdata->max_flash_brt[LM3560_LED1] = LM3560_FLASH_BRT_MAX;
- pdata->max_torch_brt[LM3560_LED1] = LM3560_TORCH_BRT_MAX;
- }
- flash->pdata = pdata;
flash->dev = &client->dev;
mutex_init(&flash->lock);
- rval = lm3560_subdev_init(flash, LM3560_LED0, "lm3560-led0");
- if (rval < 0)
- return rval;
+ flash->peak = LM3560_PEAK_1600mA;
+ rval = device_property_read_u32(flash->dev,
+ "ti,peak-current-microamp", &peak_ua);
+ if (!rval) {
+ switch (peak_ua) {
+ case 16000000:
+ flash->peak = LM3560_PEAK_1600mA;
+ break;
+ case 23000000:
+ flash->peak = LM3560_PEAK_2300mA;
+ break;
+ case 30000000:
+ flash->peak = LM3560_PEAK_3000mA;
+ break;
+ case 36000000:
+ flash->peak = LM3560_PEAK_3600mA;
+ break;
+ default:
+ return -EINVAL;
+ }
+ }
- rval = lm3560_subdev_init(flash, LM3560_LED1, "lm3560-led1");
- if (rval < 0)
- return rval;
+ flash->max_flash_timeout = LM3560_FLASH_TOUT_MIN * 1000;
+ device_property_read_u32(flash->dev, "flash-max-timeout-us",
+ &flash->max_flash_timeout);
+ flash->max_flash_timeout /= 1000;
rval = lm3560_init_device(flash);
if (rval < 0)
return rval;
+ device_for_each_child_node(flash->dev, node) {
+ fwnode_property_read_u32(node, "reg", ®);
+
+ if (reg == LM3560_LED0 || reg == LM3560_LED1) {
+ flash->max_flash_brt[reg] = LM3560_FLASH_BRT_MIN;
+ fwnode_property_read_u32(node, "flash-max-microamp",
+ &flash->max_flash_brt[reg]);
+
+ flash->max_torch_brt[reg] = LM3560_TORCH_BRT_MIN;
+ fwnode_property_read_u32(node, "led-max-microamp",
+ &flash->max_torch_brt[reg]);
+
+ rval = lm3560_subdev_init(flash, reg, node);
+ if (rval < 0)
+ return dev_err_probe(flash->dev, rval,
+ "failed to register led%d\n",
+ reg);
+ }
+ }
+
i2c_set_clientdata(client, flash);
return 0;
@@ -453,6 +491,13 @@ static void lm3560_remove(struct i2c_client *client)
}
}
+static const struct of_device_id lm3560_of_match[] = {
+ { .compatible = "ti,lm3559" },
+ { .compatible = "ti,lm3560" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, lm3560_of_match);
+
static const struct i2c_device_id lm3560_id_table[] = {
{ LM3559_NAME },
{ LM3560_NAME },
@@ -465,6 +510,7 @@ static struct i2c_driver lm3560_i2c_driver = {
.driver = {
.name = LM3560_NAME,
.pm = NULL,
+ .of_match_table = lm3560_of_match,
},
.probe = lm3560_probe,
.remove = lm3560_remove,
diff --git a/include/media/i2c/lm3560.h b/include/media/i2c/lm3560.h
index 770d8c72c94a..b56c1ff8fd49 100644
--- a/include/media/i2c/lm3560.h
+++ b/include/media/i2c/lm3560.h
@@ -66,19 +66,4 @@ enum lm3560_peak_current {
LM3560_PEAK_3600mA = 0x60
};
-/* struct lm3560_platform_data
- *
- * @peak : peak current
- * @max_flash_timeout: flash timeout
- * @max_flash_brt: flash mode led brightness
- * @max_torch_brt: torch mode led brightness
- */
-struct lm3560_platform_data {
- enum lm3560_peak_current peak;
-
- u32 max_flash_timeout;
- u32 max_flash_brt[LM3560_LED_MAX];
- u32 max_torch_brt[LM3560_LED_MAX];
-};
-
#endif /* __LM3560_H__ */
--
2.51.0
^ permalink raw reply related
* [PATCH v2 5/5] media: i2c: lm3560: Add support for PM features
From: Svyatoslav Ryhel @ 2026-04-19 9:34 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Sakari Ailus, Mauro Carvalho Chehab,
Svyatoslav Ryhel
Cc: linux-leds, devicetree, linux-kernel, linux-media
In-Reply-To: <20260419093412.40796-1-clamor95@gmail.com>
Add support for power management features to better control the LM3560
within the media framework. To achieve the desired PM support, the HWEN
GPIO and VIN power supply were added and configured into power on/off
sequences. Media device deregistration helpers were grouped into a
separate function to simplify the probe/remove process. Added PM
operations along with the PM configuration setup.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
drivers/media/i2c/lm3560.c | 135 +++++++++++++++++++++++++++++++++----
1 file changed, 123 insertions(+), 12 deletions(-)
diff --git a/drivers/media/i2c/lm3560.c b/drivers/media/i2c/lm3560.c
index 022a6a76befb..8f5156a80a99 100644
--- a/drivers/media/i2c/lm3560.c
+++ b/drivers/media/i2c/lm3560.c
@@ -11,12 +11,15 @@
#include <linux/delay.h>
#include <linux/module.h>
+#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/mod_devicetable.h>
#include <linux/mutex.h>
+#include <linux/pm_runtime.h>
#include <linux/property.h>
#include <linux/regmap.h>
+#include <linux/regulator/consumer.h>
#include <linux/videodev2.h>
#include <media/i2c/lm3560.h>
#include <media/v4l2-ctrls.h>
@@ -47,6 +50,8 @@ enum led_enable {
* @dev: pointer to &struct device
* @regmap: reg. map for i2c
* @lock: muxtex for serial access.
+ * @hwen_gpio: line connected to HWEN pin
+ * @vin_supply: line connected to IN supply (2.5V - 5.5V)
* @led_mode: V4L2 LED mode
* @ctrls_led: V4L2 controls
* @subdev_led: V4L2 subdev
@@ -60,6 +65,9 @@ struct lm3560_flash {
struct regmap *regmap;
struct mutex lock;
+ struct gpio_desc *hwen_gpio;
+ struct regulator *vin_supply;
+
enum v4l2_flash_led_mode led_mode;
struct v4l2_ctrl_handler ctrls_led[LM3560_LED_MAX];
struct v4l2_subdev subdev_led[LM3560_LED_MAX];
@@ -172,12 +180,17 @@ static int lm3560_get_ctrl(struct v4l2_ctrl *ctrl, enum lm3560_led_id led_no)
struct lm3560_flash *flash = to_lm3560_flash(ctrl, led_no);
int rval = -EINVAL;
+ if (!pm_runtime_get_if_in_use(flash->dev))
+ return 0;
+
if (ctrl->id == V4L2_CID_FLASH_FAULT) {
s32 fault = 0;
unsigned int reg_val;
rval = regmap_read(flash->regmap, REG_FLAG, ®_val);
- if (rval < 0)
+ if (rval < 0) {
+ pm_runtime_put(flash->dev);
return rval;
+ }
if (reg_val & FAULT_SHORT_CIRCUIT)
fault |= V4L2_FLASH_FAULT_SHORT_CIRCUIT;
if (reg_val & FAULT_OVERTEMP)
@@ -187,6 +200,8 @@ static int lm3560_get_ctrl(struct v4l2_ctrl *ctrl, enum lm3560_led_id led_no)
ctrl->cur.val = fault;
}
+ pm_runtime_put(flash->dev);
+
return rval;
}
@@ -196,6 +211,9 @@ static int lm3560_set_ctrl(struct v4l2_ctrl *ctrl, enum lm3560_led_id led_no)
u8 tout_bits;
int rval = -EINVAL;
+ if (!pm_runtime_get_if_in_use(flash->dev))
+ return 0;
+
switch (ctrl->id) {
case V4L2_CID_FLASH_LED_MODE:
flash->led_mode = ctrl->val;
@@ -241,6 +259,8 @@ static int lm3560_set_ctrl(struct v4l2_ctrl *ctrl, enum lm3560_led_id led_no)
break;
}
+ pm_runtime_put(flash->dev);
+
return rval;
}
@@ -403,6 +423,60 @@ static int lm3560_init_device(struct lm3560_flash *flash)
return rval;
}
+static void lm3560_power_off(struct lm3560_flash *flash)
+{
+ gpiod_set_value_cansleep(flash->hwen_gpio, 0);
+ regulator_disable(flash->vin_supply);
+}
+
+static int lm3560_power_on(struct lm3560_flash *flash)
+{
+ int rval;
+
+ rval = regulator_enable(flash->vin_supply);
+ if (rval < 0) {
+ dev_err(flash->dev, "failed to enable vin power supply\n");
+ return rval;
+ }
+
+ gpiod_set_value_cansleep(flash->hwen_gpio, 1);
+
+ rval = lm3560_init_device(flash);
+ if (rval < 0) {
+ lm3560_power_off(flash);
+ return rval;
+ }
+
+ return 0;
+}
+
+static int __maybe_unused lm3560_pm_runtime_resume(struct device *dev)
+{
+ struct lm3560_flash *flash = dev_get_drvdata(dev);
+
+ return lm3560_power_on(flash);
+}
+
+static int __maybe_unused lm3560_pm_runtime_suspend(struct device *dev)
+{
+ struct lm3560_flash *flash = dev_get_drvdata(dev);
+
+ lm3560_power_off(flash);
+
+ return 0;
+}
+
+static void lm3560_subdev_cleanup(struct lm3560_flash *flash)
+{
+ unsigned int i;
+
+ for (i = LM3560_LED0; i < LM3560_LED_MAX; i++) {
+ v4l2_device_unregister_subdev(&flash->subdev_led[i]);
+ v4l2_ctrl_handler_free(&flash->ctrls_led[i]);
+ media_entity_cleanup(&flash->subdev_led[i].entity);
+ }
+}
+
static int lm3560_probe(struct i2c_client *client)
{
struct lm3560_flash *flash;
@@ -423,6 +497,17 @@ static int lm3560_probe(struct i2c_client *client)
flash->dev = &client->dev;
mutex_init(&flash->lock);
+ flash->hwen_gpio = devm_gpiod_get_optional(&client->dev, "enable",
+ GPIOD_OUT_LOW);
+ if (IS_ERR(flash->hwen_gpio))
+ return dev_err_probe(&client->dev, PTR_ERR(flash->hwen_gpio),
+ "failed to get hwen gpio\n");
+
+ flash->vin_supply = devm_regulator_get(&client->dev, "vin");
+ if (IS_ERR(flash->vin_supply))
+ return dev_err_probe(&client->dev, PTR_ERR(flash->vin_supply),
+ "failed to get vin-supply\n");
+
flash->peak = LM3560_PEAK_1600mA;
rval = device_property_read_u32(flash->dev,
"ti,peak-current-microamp", &peak_ua);
@@ -450,10 +535,13 @@ static int lm3560_probe(struct i2c_client *client)
&flash->max_flash_timeout);
flash->max_flash_timeout /= 1000;
- rval = lm3560_init_device(flash);
+ rval = lm3560_power_on(flash);
if (rval < 0)
return rval;
+ pm_runtime_set_active(flash->dev);
+ pm_runtime_enable(flash->dev);
+
device_for_each_child_node(flash->dev, node) {
fwnode_property_read_u32(node, "reg", ®);
@@ -467,30 +555,53 @@ static int lm3560_probe(struct i2c_client *client)
&flash->max_torch_brt[reg]);
rval = lm3560_subdev_init(flash, reg, node);
- if (rval < 0)
- return dev_err_probe(flash->dev, rval,
- "failed to register led%d\n",
- reg);
+ if (rval < 0) {
+ dev_err(flash->dev,
+ "failed to register led%d\n", reg);
+ goto error_clean;
+ }
}
}
i2c_set_clientdata(client, flash);
+ pm_runtime_set_autosuspend_delay(flash->dev, 1000);
+ pm_runtime_use_autosuspend(flash->dev);
+ pm_runtime_idle(flash->dev);
+
return 0;
+
+error_clean:
+ pm_runtime_disable(flash->dev);
+ pm_runtime_set_suspended(flash->dev);
+ lm3560_subdev_cleanup(flash);
+ lm3560_power_off(flash);
+
+ return rval;
}
static void lm3560_remove(struct i2c_client *client)
{
struct lm3560_flash *flash = i2c_get_clientdata(client);
- unsigned int i;
- for (i = LM3560_LED0; i < LM3560_LED_MAX; i++) {
- v4l2_device_unregister_subdev(&flash->subdev_led[i]);
- v4l2_ctrl_handler_free(&flash->ctrls_led[i]);
- media_entity_cleanup(&flash->subdev_led[i].entity);
+ lm3560_subdev_cleanup(flash);
+
+ /*
+ * Disable runtime PM. In case runtime PM is disabled in the kernel,
+ * make sure to turn power off manually.
+ */
+ pm_runtime_disable(&client->dev);
+ if (!pm_runtime_status_suspended(&client->dev)) {
+ lm3560_power_off(flash);
+ pm_runtime_set_suspended(&client->dev);
}
}
+static const struct dev_pm_ops lm3560_pm_ops = {
+ SET_RUNTIME_PM_OPS(lm3560_pm_runtime_suspend,
+ lm3560_pm_runtime_resume, NULL)
+};
+
static const struct of_device_id lm3560_of_match[] = {
{ .compatible = "ti,lm3559" },
{ .compatible = "ti,lm3560" },
@@ -509,7 +620,7 @@ MODULE_DEVICE_TABLE(i2c, lm3560_id_table);
static struct i2c_driver lm3560_i2c_driver = {
.driver = {
.name = LM3560_NAME,
- .pm = NULL,
+ .pm = &lm3560_pm_ops,
.of_match_table = lm3560_of_match,
},
.probe = lm3560_probe,
--
2.51.0
^ permalink raw reply related
* [PATCH] phy: qualcomm: qmp-combo: update DP PHY PLL programming on Glymur
From: Mahadevan P @ 2026-04-19 10:15 UTC (permalink / raw)
To: Vinod Koul, Neil Armstrong, Wesley Cheng, Abel Vesa,
Dmitry Baryshkov, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-phy, linux-kernel, devicetree, Ritesh Kumar,
Mahadevan P
The existing DP PHY PLL and AUX configuration for the Glymur platform
does not fully follow the Hardware Programming Guide requirements for
DP over Type-C, which results in DP link bring-up failures.
Update the DP PHY programming sequence and PLL-related register
settings to align with the latest HPG recommendations. With this
change, DP link training completes successfully on Glymur-based
platforms.
Fixes: d10736db98d2 ("phy: qualcomm: qmp-combo: Add DP offsets and settings for Glymur platforms")
Signed-off-by: Ritesh Kumar <ritesh.kumar@oss.qualcomm.com>
Signed-off-by: Mahadevan P <mahadevan.p@oss.qualcomm.com>
---
Tested on a Glymur CRD platform with two DisplayPorts over USB Type-C:
- Link training completes successfully
- Display comes up at expected resolutions
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 213 +++++++++++++++------
drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v8.h | 2 +
2 files changed, 154 insertions(+), 61 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 93f1aa10d400..bb5e4091fd0c 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -283,8 +283,8 @@ static const unsigned int qmp_v8_n3_usb43dpphy_regs_layout[QPHY_LAYOUT_SIZE] = {
[QPHY_DP_AON_TOGGLE_ENABLE] = QPHY_V8_PCS_AON_DP_AON_TOGGLE_ENABLE,
[QPHY_COM_RESETSM_CNTRL] = QSERDES_V8_COM_RESETSM_CNTRL,
- [QPHY_COM_C_READY_STATUS] = QSERDES_V8_COM_C_READY_STATUS,
- [QPHY_COM_CMN_STATUS] = QSERDES_V8_COM_CMN_STATUS,
+ [QPHY_COM_C_READY_STATUS] = QSERDES_V8_COM_C_READY_STATUS_N3,
+ [QPHY_COM_CMN_STATUS] = QSERDES_V8_COM_CMN_STATUS_N3,
[QPHY_COM_BIAS_EN_CLKBUFLR_EN] = QSERDES_V8_COM_BIAS_EN_CLKBUFLR_EN,
[QPHY_DP_PHY_STATUS] = QSERDES_V8_DP_PHY_STATUS,
@@ -1386,10 +1386,10 @@ static const struct qmp_phy_init_tbl qmp_v6_n4_dp_serdes_tbl[] = {
};
static const struct qmp_phy_init_tbl qmp_v8_dp_serdes_tbl[] = {
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SSC_STEP_SIZE2_MODE0, 0x00),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SSC_STEP_SIZE2_MODE0, 0x02),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CP_CTRL_MODE0, 0x06),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_PLL_RCTRL_MODE1, 0x10),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_PLL_CCTRL_MODE1, 0x01),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_PLL_RCTRL_MODE0, 0x16),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_PLL_CCTRL_MODE0, 0x36),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CORECLK_DIV_MODE0, 0x0a),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_DIV_FRAC_START1_MODE0, 0x00),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_INTEGLOOP_GAIN0_MODE0, 0x3f),
@@ -1404,12 +1404,13 @@ static const struct qmp_phy_init_tbl qmp_v8_dp_serdes_tbl[] = {
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SYSCLK_BUF_ENABLE, 0x06),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_PLL_IVCO, 0x07),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SYSCLK_EN_SEL, 0x3b),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_RESETSM_CNTRL, 0x20),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_LOCK_CMP_EN, 0x00),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_VCO_TUNE_CTRL, 0x00),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_VCO_TUNE_MAP, 0x00),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CLK_SELECT, 0x30),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CORE_CLK_EN, 0x00),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CMN_CONFIG_1, 0x56),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CMN_CONFIG_1, 0x16),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SVS_MODE_CLK_SEL, 0x15),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CMN_MODE_CONTD1, 0x24),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_DCC_CAL_1, 0x40),
@@ -1445,26 +1446,26 @@ static const struct qmp_phy_init_tbl qmp_v6_n4_dp_tx_tbl[] = {
};
static const struct qmp_phy_init_tbl qmp_v8_n3p_dp_tx_tbl[] = {
- QMP_PHY_INIT_CFG(QSERDES_V8_LALB_TRANSMITTER_EN_CTRL, 0x3f),
+ QMP_PHY_INIT_CFG(QSERDES_V8_LALB_TRANSMITTER_EN_CTRL, 0x1a),
QMP_PHY_INIT_CFG(QSERDES_V8_LALB_VMODE_CTRL1, 0x40),
QMP_PHY_INIT_CFG(QSERDES_V8_LALB_ANA_INTERFACE_SELECT1, 0x07),
QMP_PHY_INIT_CFG(QSERDES_V8_LALB_ANA_INTERFACE_SELECT2, 0x18),
QMP_PHY_INIT_CFG(QSERDES_V8_LALB_PCS_INTERFACE_SELECT1, 0x50),
QMP_PHY_INIT_CFG(QSERDES_V8_LALB_LANE_MODE_1, 0x0d),
- QMP_PHY_INIT_CFG(QSERDES_V8_LALB_CLKBUF_ENABLE, 0x07),
- QMP_PHY_INIT_CFG(QSERDES_V8_LALB_RESET_TSYNC_EN_CTRL, 0x0a),
+ QMP_PHY_INIT_CFG(QSERDES_V8_LALB_CLKBUF_ENABLE, 0x87),
+ QMP_PHY_INIT_CFG(QSERDES_V8_LALB_RESET_TSYNC_EN_CTRL, 0x0f),
QMP_PHY_INIT_CFG(QSERDES_V8_LALB_TX_LVL_UPDATE_CTRL, 0x0f),
QMP_PHY_INIT_CFG(QSERDES_V8_LALB_TRAN_DRVR_EMP_EN, 0x5f),
- QMP_PHY_INIT_CFG(QSERDES_V8_LALB_TX0_EMP_POST1_LVL, 0x20),
- QMP_PHY_INIT_CFG(QSERDES_V8_LALB_TX1_EMP_POST1_LVL, 0x20),
+ QMP_PHY_INIT_CFG(QSERDES_V8_LALB_TX0_EMP_POST1_LVL, 0x2b),
+ QMP_PHY_INIT_CFG(QSERDES_V8_LALB_TX1_EMP_POST1_LVL, 0x2b),
QMP_PHY_INIT_CFG(QSERDES_V8_LALB_TX0_PRE1_EMPH, 0x20),
QMP_PHY_INIT_CFG(QSERDES_V8_LALB_TX1_PRE1_EMPH, 0x20),
QMP_PHY_INIT_CFG(QSERDES_V8_LALB_TX0_DRV_LVL, 0x00),
QMP_PHY_INIT_CFG(QSERDES_V8_LALB_TX1_DRV_LVL, 0x00),
- QMP_PHY_INIT_CFG(QSERDES_V8_LALB_HIGHZ_DRVR_EN, 0x30),
+ QMP_PHY_INIT_CFG(QSERDES_V8_LALB_HIGHZ_DRVR_EN, 0x3f),
QMP_PHY_INIT_CFG(QSERDES_V8_LALB_LANE_MODE_2, 0x50),
QMP_PHY_INIT_CFG(QSERDES_V8_LALB_LANE_MODE_3, 0x51),
- QMP_PHY_INIT_CFG(QSERDES_V8_LALB_TX_DCC_ANA_CTRL2, 0x00),
+ QMP_PHY_INIT_CFG(QSERDES_V8_LALB_TX_DCC_ANA_CTRL2, 0x0c),
QMP_PHY_INIT_CFG(QSERDES_V8_LALB_TX0_RESTRIM_CAL_CTRL, 0x20),
QMP_PHY_INIT_CFG(QSERDES_V8_LALB_TX1_RESTRIM_CAL_CTRL, 0x02),
QMP_PHY_INIT_CFG(QSERDES_V8_LALB_TX0_RESTRIM_POST_CAL_OFFSET, 0x10),
@@ -1589,11 +1590,12 @@ static const struct qmp_phy_init_tbl qmp_v6_n4_dp_serdes_tbl_hbr3[] = {
static const struct qmp_phy_init_tbl qmp_v8_dp_serdes_tbl_rbr[] = {
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_HSCLK_SEL_1, 0x05),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0x7a),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x02),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0x8d),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x27),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SSC_STEP_SIZE1_MODE0, 0x83),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_LOCK_CMP1_MODE0, 0x37),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_LOCK_CMP2_MODE0, 0x04),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SSC_STEP_SIZE2_MODE0, 0x02),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_LOCK_CMP1_MODE0, 0x1c),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_LOCK_CMP2_MODE0, 0x02),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_DEC_START_MODE0, 0x54),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_DIV_FRAC_START2_MODE0, 0x00),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_DIV_FRAC_START3_MODE0, 0x06),
@@ -1601,16 +1603,17 @@ static const struct qmp_phy_init_tbl qmp_v8_dp_serdes_tbl_rbr[] = {
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_VCO_TUNE2_MODE0, 0x00),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIN_VCOCAL_HSCLK_SEL_1, 0x05),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CMN_MODE_CONTD3, 0x07),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CLK_FWD_CONFIG_1, 0x30),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_IP_CTRL_AND_DP_SEL, 0xa4),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CLK_FWD_CONFIG_1, 0x3f),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_IP_CTRL_AND_DP_SEL, 0xa7),
};
static const struct qmp_phy_init_tbl qmp_v8_dp_serdes_tbl_hbr[] = {
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_HSCLK_SEL_1, 0x04),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0x21),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x04),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0xf6),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x20),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SSC_STEP_SIZE1_MODE0, 0x18),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_LOCK_CMP1_MODE0, 0x07),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SSC_STEP_SIZE2_MODE0, 0x02),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_LOCK_CMP1_MODE0, 0x08),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_LOCK_CMP2_MODE0, 0x07),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_DEC_START_MODE0, 0x46),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_DIV_FRAC_START2_MODE0, 0x00),
@@ -1627,7 +1630,8 @@ static const struct qmp_phy_init_tbl qmp_v8_dp_serdes_tbl_hbr2[] = {
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_HSCLK_SEL_1, 0x03),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0xf6),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x20),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SSC_STEP_SIZE1_MODE0, 0x0),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SSC_STEP_SIZE1_MODE0, 0x18),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SSC_STEP_SIZE2_MODE0, 0x02),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_PLL_RCTRL_MODE0, 0x16),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_PLL_CCTRL_MODE0, 0x36),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_LOCK_CMP1_MODE0, 0x10),
@@ -1637,9 +1641,9 @@ static const struct qmp_phy_init_tbl qmp_v8_dp_serdes_tbl_hbr2[] = {
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_DIV_FRAC_START3_MODE0, 0x05),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_VCO_TUNE1_MODE0, 0xae),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_VCO_TUNE2_MODE0, 0x02),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIN_VCOCAL_HSCLK_SEL_1, 0x00),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_IP_CTRL_AND_DP_SEL, 0xbf),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIAS_EN_CLKBUFLR_EN, 0x1c),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIN_VCOCAL_HSCLK_SEL_1, 0x03),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_IP_CTRL_AND_DP_SEL, 0xab),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIAS_EN_CLKBUFLR_EN, 0x17),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_RESETSM_CNTRL, 0x20),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CMN_MODE_CONTD3, 0x03),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CLK_FWD_CONFIG_1, 0x3f),
@@ -1647,8 +1651,8 @@ static const struct qmp_phy_init_tbl qmp_v8_dp_serdes_tbl_hbr2[] = {
static const struct qmp_phy_init_tbl qmp_v8_dp_serdes_tbl_hbr3[] = {
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_HSCLK_SEL_1, 0x02),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0x63),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x0c),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0x14),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x25),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SSC_STEP_SIZE1_MODE0, 0x5b),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SSC_STEP_SIZE2_MODE0, 0x02),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CP_CTRL_MODE0, 0x06),
@@ -1656,7 +1660,7 @@ static const struct qmp_phy_init_tbl qmp_v8_dp_serdes_tbl_hbr3[] = {
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_PLL_CCTRL_MODE0, 0x36),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CORECLK_DIV_MODE0, 0x0a),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_LOCK_CMP1_MODE0, 0x17),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_LOCK_CMP1_MODE0, 0x18),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_LOCK_CMP2_MODE0, 0x15),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_DEC_START_MODE0, 0x4f),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_DIV_FRAC_START1_MODE0, 0x00),
@@ -1675,19 +1679,19 @@ static const struct qmp_phy_init_tbl qmp_v8_dp_serdes_tbl_hbr3[] = {
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SYS_CLK_CTRL, 0x02),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SYSCLK_BUF_ENABLE, 0x06),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_PLL_IVCO, 0x07),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SYSCLK_EN_SEL, 0x04),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SYSCLK_EN_SEL, 0x3b),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_VCO_TUNE_CTRL, 0x00),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_VCO_TUNE_MAP, 0x00),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CLK_SELECT, 0x30),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CORE_CLK_EN, 0x00),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CMN_CONFIG_1, 0x16),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_SVS_MODE_CLK_SEL, 0x15),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CLK_FWD_CONFIG_1, 0x30),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIAS_EN_CLKBUFLR_EN, 0x10),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CLK_FWD_CONFIG_1, 0x3f),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIAS_EN_CLKBUFLR_EN, 0x17),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CMN_MODE_CONTD3, 0x05),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_CMN_MODE_CONTD1, 0x24),
QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_BIN_VCOCAL_HSCLK_SEL_1, 0x02),
- QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_IP_CTRL_AND_DP_SEL, 0x84),
+ QMP_PHY_INIT_CFG(QSERDES_V8_USB43_COM_IP_CTRL_AND_DP_SEL, 0x87),
};
static const struct qmp_phy_init_tbl sc8280xp_usb43dp_serdes_tbl[] = {
@@ -3145,6 +3149,30 @@ static int qmp_combo_configure_dp_swing(struct qmp_combo *qmp)
return 0;
}
+static bool qmp_v8_combo_configure_dp_mode(struct qmp_combo *qmp)
+{
+ bool reverse = (qmp->orientation == TYPEC_ORIENTATION_REVERSE);
+ const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts;
+ u32 val;
+
+ val = DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN |
+ DP_PHY_PD_CTL_LANE_0_1_PWRDN | DP_PHY_PD_CTL_LANE_2_3_PWRDN |
+ DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN;
+
+ if (dp_opts->lanes == 1 || dp_opts->lanes == 2) {
+ if (reverse)
+ val &= ~DP_PHY_PD_CTL_LANE_2_3_PWRDN;
+ else
+ val &= ~DP_PHY_PD_CTL_LANE_0_1_PWRDN;
+ }
+
+ writel(val, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL);
+
+ writel(0x5c, qmp->dp_dp_phy + QSERDES_DP_PHY_MODE);
+
+ return reverse;
+}
+
static void qmp_v3_configure_dp_tx(struct qmp_combo *qmp)
{
const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts;
@@ -3324,16 +3352,70 @@ static void qmp_v4_dp_aux_init(struct qmp_combo *qmp)
qmp->dp_dp_phy + QSERDES_V4_DP_PHY_AUX_INTERRUPT_MASK);
}
+static int qmp_v8_helper_configure_dp_phy(struct qmp_combo *qmp)
+{
+ const struct qmp_phy_cfg *cfg = qmp->cfg;
+ u32 status;
+ int ret;
+
+ writel(0x0f, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG_1);
+
+ qmp_v8_combo_configure_dp_mode(qmp);
+
+ writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1);
+ writel(0xa4, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2);
+
+ writel(0x05, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_TX0_TX1_LANE_CTL);
+ writel(0x05, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_TX2_TX3_LANE_CTL);
+
+ ret = qmp->cfg->configure_dp_clocks(qmp);
+ if (ret)
+ return ret;
+
+ writel(0x01, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG);
+ writel(0x05, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG);
+ writel(0x01, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG);
+ writel(0x09, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG);
+
+ writel(0x20, qmp->dp_serdes + cfg->regs[QPHY_COM_RESETSM_CNTRL]);
+
+ if (readl_poll_timeout(qmp->dp_serdes + cfg->regs[QPHY_COM_C_READY_STATUS],
+ status,
+ ((status & BIT(0)) > 0),
+ 500,
+ 10000))
+ return -ETIMEDOUT;
+
+ if (readl_poll_timeout(qmp->dp_serdes + cfg->regs[QPHY_COM_CMN_STATUS],
+ status,
+ ((status & BIT(0)) > 0),
+ 500,
+ 10000))
+ return -ETIMEDOUT;
+
+ if (readl_poll_timeout(qmp->dp_serdes + cfg->regs[QPHY_COM_CMN_STATUS],
+ status,
+ ((status & BIT(1)) > 0),
+ 500,
+ 10000))
+ return -ETIMEDOUT;
+
+ return 0;
+}
+
static void qmp_v8_dp_aux_init(struct qmp_combo *qmp)
{
const struct qmp_phy_cfg *cfg = qmp->cfg;
- writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_PSR_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN |
- DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN,
- qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL);
+ writel(0x3f, qmp->dp_serdes + QSERDES_V8_USB43_COM_CLK_FWD_CONFIG_1);
+
+ writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN |
+ DP_PHY_PD_CTL_LANE_0_1_PWRDN | DP_PHY_PD_CTL_LANE_2_3_PWRDN |
+ DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN,
+ qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL);
/* Turn on BIAS current for PHY/PLL */
- writel(0x1c, qmp->dp_serdes + cfg->regs[QPHY_COM_BIAS_EN_CLKBUFLR_EN]);
+ writel(0x17, qmp->dp_serdes + cfg->regs[QPHY_COM_BIAS_EN_CLKBUFLR_EN]);
writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG0);
writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1);
@@ -3361,8 +3443,8 @@ static void qmp_v4_configure_dp_tx(struct qmp_combo *qmp)
writel(0x27, qmp->dp_tx + cfg->regs[QPHY_TX_TX_DRV_LVL]);
writel(0x27, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_DRV_LVL]);
- writel(0x20, qmp->dp_tx + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]);
- writel(0x20, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]);
+ writel(0x2b, qmp->dp_tx + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]);
+ writel(0x2b, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]);
qmp_combo_configure_dp_swing(qmp);
}
@@ -3370,48 +3452,41 @@ static void qmp_v4_configure_dp_tx(struct qmp_combo *qmp)
static int qmp_v8_configure_dp_clocks(struct qmp_combo *qmp)
{
const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts;
- u32 phy_vco_div;
unsigned long pixel_freq;
- const struct qmp_phy_cfg *cfg = qmp->cfg;
switch (dp_opts->link_rate) {
case 1620:
- phy_vco_div = 0x4;
pixel_freq = 1620000000UL / 2;
break;
case 2700:
- phy_vco_div = 0x2;
pixel_freq = 2700000000UL / 2;
break;
case 5400:
- phy_vco_div = 0x4;
pixel_freq = 5400000000UL / 4;
break;
case 8100:
- phy_vco_div = 0x3;
pixel_freq = 8100000000UL / 6;
break;
default:
/* Other link rates aren't supported */
return -EINVAL;
}
- writel(phy_vco_div, qmp->dp_dp_phy + cfg->regs[QPHY_DP_PHY_VCO_DIV]);
/* disable core reset tsync */
writel(0x09, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG);
- writel(0x04, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_AUXLESS_SETUP_CYC);
- writel(0x08, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_AUXLESS_SILENCE_CYC);
+ writel(0x09, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_AUXLESS_SETUP_CYC);
+ writel(0x11, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_AUXLESS_SILENCE_CYC);
writel(0x08, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_LFPS_CYC);
- writel(0x11, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_LFPS_PERIOD);
+ writel(0x33, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_LFPS_PERIOD);
writel(0x3e, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_TSYNC_OVRD);
writel(0x05, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_TX2_TX3_LANE_CTL);
writel(0x05, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_TX0_TX1_LANE_CTL);
writel(0x01, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_AUXLESS_CFG1);
- writel(0x11, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_LFPS_PERIOD);
+ writel(0x33, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_LFPS_PERIOD);
writel(0x1f, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_LN0_DRV_LVL);
- writel(0x1f, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_LN1_DRV_LVL);
+ writel(0x02, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_LN1_DRV_LVL);
clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000);
clk_set_rate(qmp->dp_pixel_hw.clk, pixel_freq);
@@ -3558,7 +3633,7 @@ static int qmp_v8_configure_dp_phy(struct qmp_combo *qmp)
u32 status;
int ret;
- ret = qmp_v456_configure_dp_phy(qmp);
+ ret = qmp_v8_helper_configure_dp_phy(qmp);
if (ret < 0)
return ret;
@@ -3570,13 +3645,13 @@ static int qmp_v8_configure_dp_phy(struct qmp_combo *qmp)
} else if (dp_opts->lanes == 2) {
bias0_en = reverse ? 0x3f : 0x15;
bias1_en = reverse ? 0x15 : 0x3f;
- drvr0_en = 0x10;
- drvr1_en = 0x10;
+ drvr0_en = 0x30;
+ drvr1_en = 0x30;
} else {
bias0_en = 0x3f;
bias1_en = 0x3f;
- drvr0_en = 0x34;
- drvr1_en = 0x34;
+ drvr0_en = 0x30;
+ drvr1_en = 0x30;
}
writel(drvr0_en, qmp->dp_tx + cfg->regs[QPHY_TX_HIGHZ_DRVR_EN]);
@@ -3584,6 +3659,14 @@ static int qmp_v8_configure_dp_phy(struct qmp_combo *qmp)
writel(drvr1_en, qmp->dp_tx2 + cfg->regs[QPHY_TX_HIGHZ_DRVR_EN]);
writel(bias1_en, qmp->dp_tx2 + cfg->regs[QPHY_TX_TRANSCEIVER_BIAS_EN]);
+ writel(0x03, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_TSYNC_OVRD);
+ writel(0x23, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_TSYNC_OVRD);
+ writel(0x22, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_TSYNC_OVRD);
+
+ writel(0x0a, qmp->dp_tx + QSERDES_V8_LALB_RESET_TSYNC_EN_CTRL);
+ writel(0x0a, qmp->dp_tx2 + QSERDES_V8_LALB_RESET_TSYNC_EN_CTRL);
+
+ writel(0x3e, qmp->dp_dp_phy + QSERDES_V8_DP_PHY_TSYNC_OVRD);
writel(0x08, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG);
udelay(100);
writel(0x09, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG);
@@ -3591,16 +3674,24 @@ static int qmp_v8_configure_dp_phy(struct qmp_combo *qmp)
if (readl_poll_timeout(qmp->dp_dp_phy + cfg->regs[QPHY_DP_PHY_STATUS],
status,
- ((status & BIT(1)) > 0),
+ ((status & BIT(0)) > 0),
500,
10000))
return -ETIMEDOUT;
- writel(0x00, qmp->dp_tx + cfg->regs[QPHY_TX_TX_DRV_LVL]);
- writel(0x00, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_DRV_LVL]);
+ if (readl_poll_timeout(qmp->dp_serdes + cfg->regs[QPHY_COM_CMN_STATUS],
+ status,
+ ((status & BIT(0)) > 0),
+ 500,
+ 10000))
+ return -ETIMEDOUT;
- writel(0x2b, qmp->dp_tx + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]);
- writel(0x2b, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]);
+ if (readl_poll_timeout(qmp->dp_serdes + cfg->regs[QPHY_COM_CMN_STATUS],
+ status,
+ ((status & BIT(1)) > 0),
+ 500,
+ 10000))
+ return -ETIMEDOUT;
return 0;
}
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v8.h b/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v8.h
index d8ac4c4a2c31..b35b486cfa56 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v8.h
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v8.h
@@ -71,5 +71,7 @@
#define QSERDES_V8_COM_ADDITIONAL_MISC 0x1b4
#define QSERDES_V8_COM_CMN_STATUS 0x2c8
#define QSERDES_V8_COM_C_READY_STATUS 0x2f0
+#define QSERDES_V8_COM_CMN_STATUS_N3 0x314
+#define QSERDES_V8_COM_C_READY_STATUS_N3 0x33c
#endif
---
base-commit: 1c7cc4904160c6fc6377564140062d68a3dc93a0
change-id: 20260414-glymur_dp-ffea83a75969
Best regards,
--
Mahadevan P <mahadevan.p@oss.qualcomm.com>
^ permalink raw reply related
* Re: [PATCH] arm: dts: allwinner: t113s mangopi: enable watchdog for reboot
From: Jernej Škrabec @ 2026-04-19 10:38 UTC (permalink / raw)
To: Andre Przywara
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Samuel Holland, Michal Piekos, devicetree, linux-arm-kernel,
linux-sunxi, linux-kernel
In-Reply-To: <20260418135519.16e41490@ryzen.lan>
Dne sobota, 18. april 2026 ob 13:55:19 Srednjeevropski poletni čas je Andre Przywara napisal(a):
> On Fri, 17 Apr 2026 20:19:20 +0200
> Jernej Škrabec <jernej.skrabec@gmail.com> wrote:
>
> > Hi,
> >
> > Dne nedelja, 12. april 2026 ob 19:42:10 Srednjeevropski poletni čas je Michal Piekos napisal(a):
> > > Reboot hangs on MangoPi MQ-R T113s because no restart handler is
> > > available.
> > >
> > > Enable the SoC watchdog whose driver registers a restart handler.
> > >
> > > Tested on MangoPi MQ-R T113s.
> > >
> > > Signed-off-by: Michal Piekos <michal.piekos@mmpsystems.pl>
> > > ---
> > > arch/arm/boot/dts/allwinner/sun8i-t113s-mangopi-mq-r-t113.dts | 4 ++++
> > > 1 file changed, 4 insertions(+)
> > >
> > > diff --git a/arch/arm/boot/dts/allwinner/sun8i-t113s-mangopi-mq-r-t113.dts b/arch/arm/boot/dts/allwinner/sun8i-t113s-mangopi-mq-r-t113.dts
> > > index 8b3a75383816..f0232a5e903b 100644
> > > --- a/arch/arm/boot/dts/allwinner/sun8i-t113s-mangopi-mq-r-t113.dts
> > > +++ b/arch/arm/boot/dts/allwinner/sun8i-t113s-mangopi-mq-r-t113.dts
> > > @@ -33,3 +33,7 @@ rtl8189ftv: wifi@1 {
> > > interrupt-names = "host-wake";
> > > };
> > > };
> > > +
> > > +&wdt {
> > > + status = "okay";
> > > +};
> >
> > Move this to sun8i-t113s.dtsi. All t113 boards have the same issue.
> > Watchdog should be always enabled on ARM.
>
> We actually have that line in U-Boot:
> https://github.com/u-boot/u-boot/blob/master/arch/arm/dts/sunxi-u-boot.dtsi#L22-L27
>
> IIRC, the idea was that it is *firmware* that chooses the watchdog, so
> the generic DT should not be the place to set this.
Why would firmware need to select watchdog? We only had issue on H6
with it, so I kind of get it for that, but in general, all ARM based SoCs
have it enabled by default which is IMO how it should be.
Best regards,
Jernej
>
> If people use $fdtcontroladdr as the DT source, everything falls in
> place neatly, no need for changes or runtime patching.
>
> Cheers,
> Andre
>
^ permalink raw reply
* Re: [PATCH v3 4/4] clk: rockchip: rk3588: add GATE_GRF clocks for I2S MCLK output to IO
From: Heiko Stuebner @ 2026-04-19 10:56 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Daniele Briguglio
Cc: Nicolas Frattaroli, linux-clk, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel, Daniele Briguglio, Ricardo Pardini
In-Reply-To: <20260320-rk3588-mclk-gate-grf-v3-4-980338eacd2c@superkali.me>
Hi Daniele,
Am Freitag, 20. März 2026, 11:34:16 Mitteleuropäische Sommerzeit schrieb Daniele Briguglio:
> The I2S MCLK outputs on RK3588 are gated by bits in the SYS_GRF
> register SOC_CON6 (offset 0x318). These gates control whether the
> internal CRU MCLK signals reach the external IO pins connected to
> audio codecs.
>
> The kernel should explicitly manage these gates so that audio
> functionality does not depend on bootloader register state. This is
> analogous to what was done for RK3576 SAI MCLK outputs [1].
>
> Register the SYS_GRF as an auxiliary GRF with grf_type_sys in the
> early clock init, and add GATE_GRF entries for all four I2S MCLK
> output gates:
>
> - I2S0_8CH_MCLKOUT_TO_IO (bit 0)
> - I2S1_8CH_MCLKOUT_TO_IO (bit 1)
> - I2S2_2CH_MCLKOUT_TO_IO (bit 2)
> - I2S3_2CH_MCLKOUT_TO_IO (bit 7)
>
> Board DTS files that need MCLK on an IO pin can reference these
> clocks, e.g.:
>
> clocks = <&cru I2S0_8CH_MCLKOUT_TO_IO>;
>
> Tested on the Youyeetoo YY3588 (RK3588) with an ES8388 codec on I2S0.
>
> [1] https://lore.kernel.org/r/20250305-rk3576-sai-v1-2-64e6cf863e9a@collabora.com/
>
> Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Tested-by: Ricardo Pardini <ricardo@pardini.net>
> Signed-off-by: Daniele Briguglio <hello@superkali.me>
> ---
> drivers/clk/rockchip/clk-rk3588.c | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/drivers/clk/rockchip/clk-rk3588.c b/drivers/clk/rockchip/clk-rk3588.c
> index 1694223f4f84..2cc85fb5b2cc 100644
> --- a/drivers/clk/rockchip/clk-rk3588.c
> +++ b/drivers/clk/rockchip/clk-rk3588.c
> @@ -5,11 +5,14 @@
> */
>
> #include <linux/clk-provider.h>
> +#include <linux/mfd/syscon.h>
> #include <linux/of.h>
> +#include <linux/slab.h>
> #include <linux/of_address.h>
> #include <linux/platform_device.h>
> #include <linux/syscore_ops.h>
> #include <dt-bindings/clock/rockchip,rk3588-cru.h>
> +#include <soc/rockchip/rk3588_grf.h>
> #include "clk.h"
>
> #define RK3588_GRF_SOC_STATUS0 0x600
> @@ -892,6 +895,8 @@ static struct rockchip_clk_branch rk3588_early_clk_branches[] __initdata = {
> RK3588_CLKGATE_CON(8), 0, GFLAGS),
> MUX(I2S2_2CH_MCLKOUT, "i2s2_2ch_mclkout", i2s2_2ch_mclkout_p, CLK_SET_RATE_PARENT,
> RK3588_CLKSEL_CON(30), 2, 1, MFLAGS),
> + GATE_GRF(I2S2_2CH_MCLKOUT_TO_IO, "i2s2_2ch_mclkout_to_io", "i2s2_2ch_mclkout",
> + 0, RK3588_SYSGRF_SOC_CON6, 2, GFLAGS, grf_type_sys),
>
> COMPOSITE(CLK_I2S3_2CH_SRC, "clk_i2s3_2ch_src", gpll_aupll_p, 0,
> RK3588_CLKSEL_CON(30), 8, 1, MFLAGS, 3, 5, DFLAGS,
> @@ -907,6 +912,8 @@ static struct rockchip_clk_branch rk3588_early_clk_branches[] __initdata = {
> RK3588_CLKGATE_CON(8), 4, GFLAGS),
> MUX(I2S3_2CH_MCLKOUT, "i2s3_2ch_mclkout", i2s3_2ch_mclkout_p, CLK_SET_RATE_PARENT,
> RK3588_CLKSEL_CON(32), 2, 1, MFLAGS),
> + GATE_GRF(I2S3_2CH_MCLKOUT_TO_IO, "i2s3_2ch_mclkout_to_io", "i2s3_2ch_mclkout",
> + 0, RK3588_SYSGRF_SOC_CON6, 7, GFLAGS, grf_type_sys),
> GATE(PCLK_ACDCDIG, "pclk_acdcdig", "pclk_audio_root", 0,
> RK3588_CLKGATE_CON(7), 11, GFLAGS),
> GATE(HCLK_I2S0_8CH, "hclk_i2s0_8ch", "hclk_audio_root", 0,
> @@ -935,6 +942,8 @@ static struct rockchip_clk_branch rk3588_early_clk_branches[] __initdata = {
> RK3588_CLKGATE_CON(7), 10, GFLAGS),
> MUX(I2S0_8CH_MCLKOUT, "i2s0_8ch_mclkout", i2s0_8ch_mclkout_p, CLK_SET_RATE_PARENT,
> RK3588_CLKSEL_CON(28), 2, 2, MFLAGS),
> + GATE_GRF(I2S0_8CH_MCLKOUT_TO_IO, "i2s0_8ch_mclkout_to_io", "i2s0_8ch_mclkout",
> + 0, RK3588_SYSGRF_SOC_CON6, 0, GFLAGS, grf_type_sys),
>
> GATE(HCLK_PDM1, "hclk_pdm1", "hclk_audio_root", 0,
> RK3588_CLKGATE_CON(9), 6, GFLAGS),
> @@ -2220,6 +2229,8 @@ static struct rockchip_clk_branch rk3588_early_clk_branches[] __initdata = {
> RK3588_PMU_CLKGATE_CON(2), 13, GFLAGS),
> MUX(I2S1_8CH_MCLKOUT, "i2s1_8ch_mclkout", i2s1_8ch_mclkout_p, CLK_SET_RATE_PARENT,
> RK3588_PMU_CLKSEL_CON(9), 2, 2, MFLAGS),
> + GATE_GRF(I2S1_8CH_MCLKOUT_TO_IO, "i2s1_8ch_mclkout_to_io", "i2s1_8ch_mclkout",
> + 0, RK3588_SYSGRF_SOC_CON6, 1, GFLAGS, grf_type_sys),
> GATE(PCLK_PMU1, "pclk_pmu1", "pclk_pmu0_root", CLK_IS_CRITICAL,
> RK3588_PMU_CLKGATE_CON(1), 0, GFLAGS),
> GATE(CLK_DDR_FAIL_SAFE, "clk_ddr_fail_safe", "clk_pmu0", CLK_IGNORE_UNUSED,
> @@ -2439,6 +2450,8 @@ static struct rockchip_clk_branch rk3588_clk_branches[] = {
> static void __init rk3588_clk_early_init(struct device_node *np)
> {
> struct rockchip_clk_provider *ctx;
> + struct rockchip_aux_grf *sys_grf_e;
> + struct regmap *sys_grf;
> unsigned long clk_nr_clks, max_clk_id1, max_clk_id2;
> void __iomem *reg_base;
>
> @@ -2479,6 +2492,17 @@ static void __init rk3588_clk_early_init(struct device_node *np)
> &rk3588_cpub1clk_data, rk3588_cpub1clk_rates,
> ARRAY_SIZE(rk3588_cpub1clk_rates));
>
> + /* Register SYS_GRF for I2S MCLK output to IO gate clocks */
> + sys_grf = syscon_regmap_lookup_by_compatible("rockchip,rk3588-sys-grf");
> + if (!IS_ERR(sys_grf)) {
> + sys_grf_e = kzalloc_obj(*sys_grf_e);
> + if (sys_grf_e) {
> + sys_grf_e->grf = sys_grf;
> + sys_grf_e->type = grf_type_sys;
> + hash_add(ctx->aux_grf_table, &sys_grf_e->node, grf_type_sys);
> + }
> + }
> +
sorry, took me a bit to articulate, what "issue" I have with this, which
is only that it open-codes adding GRFs. I.e. over time this likely won't
be the only place this might happen, so I envision a more central
function in the rockchip clock code, aka something like:
(1)
rockchip_clk_add_grf(struct rockchip_clk_provider *ctx,
struct regmap *grf, enum rockchip_grf_type type)
I'm still unsure, if we want the sycon lookup also in there, like:
(2)
rockchip_clk_add_grf(struct rockchip_clk_provider *ctx,
const char *compat, enum rockchip_grf_type type)
but then we would end up having to also define if it's optional, so I
guess variant (1) is the nicer one, as it at least abstracts away all
the struct rockchip_aux_grf handling from the clock driver itself.
Heiko
> rockchip_clk_register_branches(ctx, rk3588_early_clk_branches,
> ARRAY_SIZE(rk3588_early_clk_branches));
>
>
>
^ permalink raw reply
* Re: [PATCH v2 2/3] iio: tsl2772: add support for Avago APDS9900/9901 ALS/Proximity sensor
From: Jonathan Cameron @ 2026-04-19 11:29 UTC (permalink / raw)
To: Svyatoslav Ryhel
Cc: David Lechner, Nuno Sá, Andy Shevchenko, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jonathan Corbet, Shuah Khan,
Arnd Bergmann, Greg Kroah-Hartman, Randy Dunlap, linux-iio,
devicetree, linux-kernel, linux-doc
In-Reply-To: <20260419083125.35572-3-clamor95@gmail.com>
On Sun, 19 Apr 2026 11:31:23 +0300
Svyatoslav Ryhel <clamor95@gmail.com> wrote:
> The Avago APDS990x has the same register set as the TAOS/AMS TSL2772 so
> just add the correct bindings and the appropriate LUX table derived from
> the values in the datasheet. Driver was tested on the LG Optimus Vu P895.
>
> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Hi Svyatoslav,
Just one small thing.
Experience has given me a strong aversion to the use of wildcards
in naming within drivers. They go wrong too often because companies
can seem to resist using similar names for very different parts.
> ---
> drivers/iio/light/tsl2772.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/drivers/iio/light/tsl2772.c b/drivers/iio/light/tsl2772.c
> index c8f15ba95267..8dab34bf00ca 100644
> --- a/drivers/iio/light/tsl2772.c
> +++ b/drivers/iio/light/tsl2772.c
> @@ -127,6 +127,7 @@ enum {
> tmd2672,
> tsl2772,
> tmd2772,
> + apds990x,
As above, just name this after one of the supported parts. apds9900
That doesn't stop you using it for multiple compatible devices.
Same applies for all the uses of x as a wildcard.
thanks,
Jonathan
> apds9930,
> };
^ permalink raw reply
* [PATCH v4 2/5] clk: rockchip: allow grf_type_sys lookup in aux_grf_table
From: Daniele Briguglio @ 2026-04-19 11:43 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Heiko Stuebner
Cc: Nicolas Frattaroli, linux-clk, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel, Daniele Briguglio
In-Reply-To: <20260419-rk3588-mclk-gate-grf-v4-0-513a42dd1dcc@superkali.me>
Remove the grf_type_sys exclusion from the auxiliary GRF table lookup
in rockchip_clk_register_branches(). Previously, branches with
grf_type_sys always used ctx->grf directly, bypassing the aux_grf_table.
This is a problem on SoCs like RK3588 where ctx->grf points to the
PHP_GRF (set via the CRU's rockchip,grf phandle), but GATE_GRF clock
entries need to access the SYS_GRF instead.
With this change, grf_type_sys branches first check the aux_grf_table,
and fall back to ctx->grf if no entry is found. This is backwards
compatible: on SoCs that do not register grf_type_sys in the
aux_grf_table, the behavior is unchanged.
Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Daniele Briguglio <hello@superkali.me>
---
drivers/clk/rockchip/clk.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c
index e8b3b0b9a4f8..911e6b610618 100644
--- a/drivers/clk/rockchip/clk.c
+++ b/drivers/clk/rockchip/clk.c
@@ -509,10 +509,9 @@ void rockchip_clk_register_branches(struct rockchip_clk_provider *ctx,
clk = NULL;
/* for GRF-dependent branches, choose the right grf first */
- if ((list->branch_type == branch_grf_mux ||
- list->branch_type == branch_grf_gate ||
- list->branch_type == branch_grf_mmc) &&
- list->grf_type != grf_type_sys) {
+ if (list->branch_type == branch_grf_mux ||
+ list->branch_type == branch_grf_gate ||
+ list->branch_type == branch_grf_mmc) {
hash_for_each_possible(ctx->aux_grf_table, agrf, node, list->grf_type) {
if (agrf->type == list->grf_type) {
grf = agrf->grf;
--
2.53.0
^ permalink raw reply related
* [PATCH v4 3/5] clk: rockchip: add helper to register auxiliary GRFs
From: Daniele Briguglio @ 2026-04-19 11:43 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Heiko Stuebner
Cc: Nicolas Frattaroli, linux-clk, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel, Daniele Briguglio
In-Reply-To: <20260419-rk3588-mclk-gate-grf-v4-0-513a42dd1dcc@superkali.me>
Add rockchip_clk_add_grf() as a helper to register an auxiliary GRF
into the clock provider's aux_grf_table. This encapsulates the
struct rockchip_aux_grf allocation and hashtable insertion, so SoC
clock drivers do not need to open-code it.
Suggested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Daniele Briguglio <hello@superkali.me>
---
drivers/clk/rockchip/clk.c | 18 ++++++++++++++++++
drivers/clk/rockchip/clk.h | 3 +++
2 files changed, 21 insertions(+)
diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c
index 911e6b610618..ee8c79b938d3 100644
--- a/drivers/clk/rockchip/clk.c
+++ b/drivers/clk/rockchip/clk.c
@@ -429,6 +429,24 @@ void rockchip_clk_of_add_provider(struct device_node *np,
}
EXPORT_SYMBOL_GPL(rockchip_clk_of_add_provider);
+int rockchip_clk_add_grf(struct rockchip_clk_provider *ctx,
+ struct regmap *grf,
+ enum rockchip_grf_type type)
+{
+ struct rockchip_aux_grf *aux_grf;
+
+ aux_grf = kzalloc_obj(*aux_grf);
+ if (!aux_grf)
+ return -ENOMEM;
+
+ aux_grf->grf = grf;
+ aux_grf->type = type;
+ hash_add(ctx->aux_grf_table, &aux_grf->node, type);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(rockchip_clk_add_grf);
+
void rockchip_clk_register_plls(struct rockchip_clk_provider *ctx,
struct rockchip_pll_clock *list,
unsigned int nr_pll, int grf_lock_offset)
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index cf0f5f11c34b..9e3503e2ffc2 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -1329,6 +1329,9 @@ struct rockchip_clk_provider *rockchip_clk_init_early(struct device_node *np,
void rockchip_clk_finalize(struct rockchip_clk_provider *ctx);
void rockchip_clk_of_add_provider(struct device_node *np,
struct rockchip_clk_provider *ctx);
+int rockchip_clk_add_grf(struct rockchip_clk_provider *ctx,
+ struct regmap *grf,
+ enum rockchip_grf_type type);
unsigned long rockchip_clk_find_max_clk_id(struct rockchip_clk_branch *list,
unsigned int nr_clk);
void rockchip_clk_register_branches(struct rockchip_clk_provider *ctx,
--
2.53.0
^ permalink raw reply related
* [PATCH v4 4/5] soc: rockchip: rk3588: add SYS_GRF SOC_CON6 register offset
From: Daniele Briguglio @ 2026-04-19 11:43 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Heiko Stuebner
Cc: Nicolas Frattaroli, linux-clk, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel, Daniele Briguglio
In-Reply-To: <20260419-rk3588-mclk-gate-grf-v4-0-513a42dd1dcc@superkali.me>
Add the RK3588_SYSGRF_SOC_CON6 register offset to the RK3588 GRF
header. This register contains the I2S MCLK output to IO gate bits,
needed by the clock driver.
Signed-off-by: Daniele Briguglio <hello@superkali.me>
Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
include/soc/rockchip/rk3588_grf.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/soc/rockchip/rk3588_grf.h b/include/soc/rockchip/rk3588_grf.h
index 02a7b2432d99..db0092fc66ad 100644
--- a/include/soc/rockchip/rk3588_grf.h
+++ b/include/soc/rockchip/rk3588_grf.h
@@ -19,4 +19,6 @@
/* Whether the LPDDR5 is in 2:1 (= 0) or 4:1 (= 1) CKR a.k.a. DQS mode */
#define RK3588_PMUGRF_OS_REG6_LP5_CKR BIT(0)
+#define RK3588_SYSGRF_SOC_CON6 0x0318
+
#endif /* __SOC_RK3588_GRF_H */
--
2.53.0
^ permalink raw reply related
* [PATCH v4 5/5] clk: rockchip: rk3588: add GATE_GRF clocks for I2S MCLK output to IO
From: Daniele Briguglio @ 2026-04-19 11:43 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Heiko Stuebner
Cc: Nicolas Frattaroli, linux-clk, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel, Daniele Briguglio, Ricardo Pardini
In-Reply-To: <20260419-rk3588-mclk-gate-grf-v4-0-513a42dd1dcc@superkali.me>
The I2S MCLK outputs on RK3588 are gated by bits in the SYS_GRF
register SOC_CON6 (offset 0x318). These gates control whether the
internal CRU MCLK signals reach the external IO pins connected to
audio codecs.
The kernel should explicitly manage these gates so that audio
functionality does not depend on bootloader register state. This is
analogous to what was done for RK3576 SAI MCLK outputs [1].
Register the SYS_GRF as an auxiliary GRF with grf_type_sys using
rockchip_clk_add_grf(), and add GATE_GRF entries for all four I2S
MCLK output gates:
- I2S0_8CH_MCLKOUT_TO_IO (bit 0)
- I2S1_8CH_MCLKOUT_TO_IO (bit 1)
- I2S2_2CH_MCLKOUT_TO_IO (bit 2)
- I2S3_2CH_MCLKOUT_TO_IO (bit 7)
Board DTS files that need MCLK on an IO pin can reference these
clocks, e.g.:
clocks = <&cru I2S0_8CH_MCLKOUT_TO_IO>;
Tested on the Youyeetoo YY3588 (RK3588) with an ES8388 codec on I2S0.
[1] https://lore.kernel.org/r/20250305-rk3576-sai-v1-2-64e6cf863e9a@collabora.com/
Tested-by: Ricardo Pardini <ricardo@pardini.net>
Signed-off-by: Daniele Briguglio <hello@superkali.me>
---
drivers/clk/rockchip/clk-rk3588.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/clk/rockchip/clk-rk3588.c b/drivers/clk/rockchip/clk-rk3588.c
index 1694223f4f84..2ba9976654cf 100644
--- a/drivers/clk/rockchip/clk-rk3588.c
+++ b/drivers/clk/rockchip/clk-rk3588.c
@@ -5,11 +5,13 @@
*/
#include <linux/clk-provider.h>
+#include <linux/mfd/syscon.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/syscore_ops.h>
#include <dt-bindings/clock/rockchip,rk3588-cru.h>
+#include <soc/rockchip/rk3588_grf.h>
#include "clk.h"
#define RK3588_GRF_SOC_STATUS0 0x600
@@ -892,6 +894,8 @@ static struct rockchip_clk_branch rk3588_early_clk_branches[] __initdata = {
RK3588_CLKGATE_CON(8), 0, GFLAGS),
MUX(I2S2_2CH_MCLKOUT, "i2s2_2ch_mclkout", i2s2_2ch_mclkout_p, CLK_SET_RATE_PARENT,
RK3588_CLKSEL_CON(30), 2, 1, MFLAGS),
+ GATE_GRF(I2S2_2CH_MCLKOUT_TO_IO, "i2s2_2ch_mclkout_to_io", "i2s2_2ch_mclkout",
+ 0, RK3588_SYSGRF_SOC_CON6, 2, GFLAGS, grf_type_sys),
COMPOSITE(CLK_I2S3_2CH_SRC, "clk_i2s3_2ch_src", gpll_aupll_p, 0,
RK3588_CLKSEL_CON(30), 8, 1, MFLAGS, 3, 5, DFLAGS,
@@ -907,6 +911,8 @@ static struct rockchip_clk_branch rk3588_early_clk_branches[] __initdata = {
RK3588_CLKGATE_CON(8), 4, GFLAGS),
MUX(I2S3_2CH_MCLKOUT, "i2s3_2ch_mclkout", i2s3_2ch_mclkout_p, CLK_SET_RATE_PARENT,
RK3588_CLKSEL_CON(32), 2, 1, MFLAGS),
+ GATE_GRF(I2S3_2CH_MCLKOUT_TO_IO, "i2s3_2ch_mclkout_to_io", "i2s3_2ch_mclkout",
+ 0, RK3588_SYSGRF_SOC_CON6, 7, GFLAGS, grf_type_sys),
GATE(PCLK_ACDCDIG, "pclk_acdcdig", "pclk_audio_root", 0,
RK3588_CLKGATE_CON(7), 11, GFLAGS),
GATE(HCLK_I2S0_8CH, "hclk_i2s0_8ch", "hclk_audio_root", 0,
@@ -935,6 +941,8 @@ static struct rockchip_clk_branch rk3588_early_clk_branches[] __initdata = {
RK3588_CLKGATE_CON(7), 10, GFLAGS),
MUX(I2S0_8CH_MCLKOUT, "i2s0_8ch_mclkout", i2s0_8ch_mclkout_p, CLK_SET_RATE_PARENT,
RK3588_CLKSEL_CON(28), 2, 2, MFLAGS),
+ GATE_GRF(I2S0_8CH_MCLKOUT_TO_IO, "i2s0_8ch_mclkout_to_io", "i2s0_8ch_mclkout",
+ 0, RK3588_SYSGRF_SOC_CON6, 0, GFLAGS, grf_type_sys),
GATE(HCLK_PDM1, "hclk_pdm1", "hclk_audio_root", 0,
RK3588_CLKGATE_CON(9), 6, GFLAGS),
@@ -2220,6 +2228,8 @@ static struct rockchip_clk_branch rk3588_early_clk_branches[] __initdata = {
RK3588_PMU_CLKGATE_CON(2), 13, GFLAGS),
MUX(I2S1_8CH_MCLKOUT, "i2s1_8ch_mclkout", i2s1_8ch_mclkout_p, CLK_SET_RATE_PARENT,
RK3588_PMU_CLKSEL_CON(9), 2, 2, MFLAGS),
+ GATE_GRF(I2S1_8CH_MCLKOUT_TO_IO, "i2s1_8ch_mclkout_to_io", "i2s1_8ch_mclkout",
+ 0, RK3588_SYSGRF_SOC_CON6, 1, GFLAGS, grf_type_sys),
GATE(PCLK_PMU1, "pclk_pmu1", "pclk_pmu0_root", CLK_IS_CRITICAL,
RK3588_PMU_CLKGATE_CON(1), 0, GFLAGS),
GATE(CLK_DDR_FAIL_SAFE, "clk_ddr_fail_safe", "clk_pmu0", CLK_IGNORE_UNUSED,
@@ -2439,6 +2449,7 @@ static struct rockchip_clk_branch rk3588_clk_branches[] = {
static void __init rk3588_clk_early_init(struct device_node *np)
{
struct rockchip_clk_provider *ctx;
+ struct regmap *sys_grf;
unsigned long clk_nr_clks, max_clk_id1, max_clk_id2;
void __iomem *reg_base;
@@ -2479,6 +2490,11 @@ static void __init rk3588_clk_early_init(struct device_node *np)
&rk3588_cpub1clk_data, rk3588_cpub1clk_rates,
ARRAY_SIZE(rk3588_cpub1clk_rates));
+ /* Register SYS_GRF for I2S MCLK output to IO gate clocks */
+ sys_grf = syscon_regmap_lookup_by_compatible("rockchip,rk3588-sys-grf");
+ if (!IS_ERR(sys_grf))
+ rockchip_clk_add_grf(ctx, sys_grf, grf_type_sys);
+
rockchip_clk_register_branches(ctx, rk3588_early_clk_branches,
ARRAY_SIZE(rk3588_early_clk_branches));
--
2.53.0
^ permalink raw reply related
* Re: [PATCH v1 1/2] dt-bindings: iio: adc: avia-hx711: add avia,hx710b compatible
From: Jonathan Cameron @ 2026-04-19 11:47 UTC (permalink / raw)
To: Andreas Klinger
Cc: David Lechner, Piyush Patle, robh, krzk+dt, conor+dt, nuno.sa,
andy, linux-iio, devicetree, linux-kernel
In-Reply-To: <aeRlftUuHrTgz9OF@mail.your-server.de>
On Sun, 19 Apr 2026 07:17:50 +0200
Andreas Klinger <ak@it-klinger.de> wrote:
> Hi,
>
> David Lechner <dlechner@baylibre.com> schrieb am Sa, 18. Apr 16:46:
> > On 4/18/26 12:05 PM, Piyush Patle wrote:
>
> [...]
>
> > >
> > > Specifications about the driver can be found at:
> > > http://www.aviaic.com/ENProducts.aspx
> > > @@ -23,11 +33,12 @@ properties:
> > > compatible:
> > > enum:
> > > - avia,hx711
> > > + - avia,hx710b
> > >
> > > sck-gpios:
> > > description:
> > > Definition of the GPIO for the clock (output). In the datasheet it is
> > > - named PD_SCK
> > > + named PD_SCK.
> >
> > Save the cleanups for a separate patch to keep the adding HX710B changes clear.
> >
> > I'm guessing the existing binding for HX711 is quite old because it is quite
> > incomplete.
> >
> > It has avdd-supply, but is missing vsup-supply and dvdd-supply.
> >
> > It should probably also have a way to describe how the rate pin is wired.
> >
> > And it should have a clocks property instead of clock-frequency.
>
> The real meaning is a wait time until the DOUT is stable. As a submitted the
> driver many years ago my suggestion of a wait time property was not accepted
> because it would have introduced a new property which didn't exit in those days.
> The suggestion was to name it clock-frequency because it already existed. This
> clock-frequency made the driver also a little bit more complicated because at
> the end we needed a waiting time and not a frequency.
>
> Today i see there is as "wait-delay" property already introduced at other
> bindings. This would also simplify the driver a bit.
>
> @robh@kernel.org, @krzk+dt@kernel.org, @conor+dt@kernel.org:
> Would this change in the binding be acceptable?
>
> If yes, i could prepare a driver and binding patch separate of this patchset to
> clean it up.
You would need to maintain backwards compatiblity with the old binding.
Might be fine to deprecate it.
Jonathan
>
> > It would make sense to have two clocks, on for XI/XO and one for PD_SCK.
> > The second one being optional because of sck-gpios.
> >
> > HX710B has many fewer pins, so we will need an:
> >
> > allOf:
> > - if:
> > properties:
> > compatible:
> > const: avia,hx710b
> >
> > section that sets anything for pins that chip doesn't have to false, like
> > vsup-supply.
> >
> > HX710B also has a vref-supply that HX711 doesn't have. (Unless these are the
> > same thing by a different name?)
> >
> >
> > > maxItems: 1
> > >
> > > dout-gpios:
> > > @@ -43,6 +54,9 @@ properties:
> > > Definition of the regulator used as analog supply
> > >
> > > clock-frequency:
> > > + description:
> > > + Bit-bang clock frequency on PD_SCK. Keep the PD_SCK high time below
> > > + the chip power-down threshold.
> >
> > I suspect that this was meant to be the crystal frequency (XI/XO), not PD_SCK
> > since sck-gpios already exists for PD_SCK
>
> see above
>
> [...]
>
> Best regards,
>
> Andreas
>
^ permalink raw reply
* Re: [PATCH v2 2/3] iio: tsl2772: add support for Avago APDS9900/9901 ALS/Proximity sensor
From: Svyatoslav Ryhel @ 2026-04-19 11:50 UTC (permalink / raw)
To: Jonathan Cameron
Cc: David Lechner, Nuno Sá, Andy Shevchenko, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jonathan Corbet, Shuah Khan,
Arnd Bergmann, Greg Kroah-Hartman, Randy Dunlap, linux-iio,
devicetree, linux-kernel, linux-doc
In-Reply-To: <20260419122950.67355f4c@jic23-huawei>
нд, 19 квіт. 2026 р. о 14:30 Jonathan Cameron <jic23@kernel.org> пише:
>
> On Sun, 19 Apr 2026 11:31:23 +0300
> Svyatoslav Ryhel <clamor95@gmail.com> wrote:
>
> > The Avago APDS990x has the same register set as the TAOS/AMS TSL2772 so
> > just add the correct bindings and the appropriate LUX table derived from
> > the values in the datasheet. Driver was tested on the LG Optimus Vu P895.
> >
> > Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> Hi Svyatoslav,
>
> Just one small thing.
>
> Experience has given me a strong aversion to the use of wildcards
> in naming within drivers. They go wrong too often because companies
> can seem to resist using similar names for very different parts.
>
Noted.
> > ---
> > drivers/iio/light/tsl2772.c | 16 ++++++++++++++++
> > 1 file changed, 16 insertions(+)
> >
> > diff --git a/drivers/iio/light/tsl2772.c b/drivers/iio/light/tsl2772.c
> > index c8f15ba95267..8dab34bf00ca 100644
> > --- a/drivers/iio/light/tsl2772.c
> > +++ b/drivers/iio/light/tsl2772.c
> > @@ -127,6 +127,7 @@ enum {
> > tmd2672,
> > tsl2772,
> > tmd2772,
> > + apds990x,
>
> As above, just name this after one of the supported parts. apds9900
> That doesn't stop you using it for multiple compatible devices.
>
> Same applies for all the uses of x as a wildcard.
>
If this is the only thing keeping you from picking this patchset may I
resend with apds990x fixed right away?
> thanks,
>
> Jonathan
>
> > apds9930,
> > };
>
^ permalink raw reply
* [PATCH v4 1/5] dt-bindings: clock: rockchip,rk3588-cru: add I2S MCLK output to IO clock IDs
From: Daniele Briguglio @ 2026-04-19 11:43 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Heiko Stuebner
Cc: Nicolas Frattaroli, linux-clk, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel, Daniele Briguglio,
Krzysztof Kozlowski
In-Reply-To: <20260419-rk3588-mclk-gate-grf-v4-0-513a42dd1dcc@superkali.me>
Add clock identifiers for the four I2S MCLK output to IO gate clocks
on RK3588, needed by board DTS files where the codec requires MCLK
from the SoC on an external IO pin.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Daniele Briguglio <hello@superkali.me>
---
include/dt-bindings/clock/rockchip,rk3588-cru.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/include/dt-bindings/clock/rockchip,rk3588-cru.h b/include/dt-bindings/clock/rockchip,rk3588-cru.h
index 0c7d3ca2d5bc..7528034cff56 100644
--- a/include/dt-bindings/clock/rockchip,rk3588-cru.h
+++ b/include/dt-bindings/clock/rockchip,rk3588-cru.h
@@ -734,6 +734,10 @@
#define PCLK_AV1_PRE 719
#define HCLK_SDIO_PRE 720
#define PCLK_VO1GRF 721
+#define I2S0_8CH_MCLKOUT_TO_IO 722
+#define I2S1_8CH_MCLKOUT_TO_IO 723
+#define I2S2_2CH_MCLKOUT_TO_IO 724
+#define I2S3_2CH_MCLKOUT_TO_IO 725
/* scmi-clocks indices */
--
2.53.0
^ permalink raw reply related
* [PATCH v4 0/5] clk: rockchip: rk3588: add I2S MCLK output gate clocks
From: Daniele Briguglio @ 2026-04-19 11:43 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Heiko Stuebner
Cc: Nicolas Frattaroli, linux-clk, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel, Daniele Briguglio,
Krzysztof Kozlowski, Ricardo Pardini
On RK3588, the four I2S master clock (MCLK) outputs to external IO
pins are gated by bits in SYS_GRF SOC_CON6 (offset 0x0318). These
are set-to-disable gates with hiword mask semantics.
The TRM documents the reset value of these bits as 0 (gate open),
but in practice the Rockchip firmware (BL31) may set them during
early boot, preventing the MCLK signal from reaching external audio
codecs. The kernel should manage these gates explicitly so that
audio functionality does not depend on bootloader register state.
This series adds GATE_GRF clock entries for all four I2S MCLK output
gates, following the same approach used for the RK3576 SAI MCLK
output gates [1]. Board DTS files that need MCLK on an IO pin can
reference these clocks (e.g. clocks = <&cru I2S0_8CH_MCLKOUT_TO_IO>),
ensuring the output gate is opened when the clock is enabled.
Patch 1 adds the four clock ID bindings.
Patch 2 removes the grf_type_sys exclusion from the aux_grf_table
lookup, which prevented SYS_GRF-based GATE_GRF entries from
being resolved on RK3588 (where ctx->grf points to PHP_GRF).
Patch 3 introduces rockchip_clk_add_grf(), a helper to register
auxiliary GRFs, so SoC drivers don't open-code the aux_grf
allocation and hashtable insertion.
Patch 4 adds the RK3588_SYSGRF_SOC_CON6 register define.
Patch 5 adds the four GATE_GRF clock entries and registers the
SYS_GRF via the new helper.
clk-rk3576.c currently open-codes the same GRF registration pattern
twice and is an obvious candidate for conversion to the new helper,
but that refactor is left as a separate follow-up to keep this
series focused.
Tested on a Youyeetoo YY3588 (RK3588) board with an ES8388 audio
codec connected to I2S0, and independently on a Mekotronics R58X-Pro
(ES8388) by Ricardo Pardini.
[1] https://lore.kernel.org/r/20250305-rk3576-sai-v1-2-64e6cf863e9a@collabora.com/
Changes in v4:
- Introduced rockchip_clk_add_grf() helper and used it in clk-rk3588.c
instead of open-coding the aux_grf registration (Heiko)
- Dropped Reviewed-by from patch 5 since the code was refactored
Changes in v3:
- Added separate patch for RK3588_SYSGRF_SOC_CON6 register define
in rk3588_grf.h, replacing magic 0x0318 (Nicolas)
- Dropped Reported-by/Closes tags from the driver patch (Nicolas)
- Added Tested-by from Ricardo Pardini (Mekotronics R58X-Pro)
Changes in v2:
- Patch 1: shortened commit message (Krzysztof)
- Driver patch: added missing #include <linux/slab.h> for kzalloc_obj
(kernel test robot)
Signed-off-by: Daniele Briguglio <hello@superkali.me>
---
Daniele Briguglio (5):
dt-bindings: clock: rockchip,rk3588-cru: add I2S MCLK output to IO clock IDs
clk: rockchip: allow grf_type_sys lookup in aux_grf_table
clk: rockchip: add helper to register auxiliary GRFs
soc: rockchip: rk3588: add SYS_GRF SOC_CON6 register offset
clk: rockchip: rk3588: add GATE_GRF clocks for I2S MCLK output to IO
drivers/clk/rockchip/clk-rk3588.c | 16 ++++++++++++++++
drivers/clk/rockchip/clk.c | 25 +++++++++++++++++++++----
drivers/clk/rockchip/clk.h | 3 +++
include/dt-bindings/clock/rockchip,rk3588-cru.h | 4 ++++
include/soc/rockchip/rk3588_grf.h | 2 ++
5 files changed, 46 insertions(+), 4 deletions(-)
---
base-commit: b84a0ebe421ca56995ff78b66307667b62b3a900
change-id: 20260316-rk3588-mclk-gate-grf-c4b180438fc0
Best regards,
--
Daniele Briguglio <hello@superkali.me>
^ permalink raw reply
* [PATCH v3 1/2] dt-bindings: rng: mtk-rng: add SMC-based TRNG variants
From: Daniel Golle @ 2026-04-19 12:05 UTC (permalink / raw)
To: Olivia Mackall, Herbert Xu, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Matthias Brugger, AngeloGioacchino Del Regno,
Sean Wang, Daniel Golle, linux-crypto, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek
Add compatible strings for MediaTek SoCs where the hardware random number
generator is accessed via a vendor-defined Secure Monitor Call (SMC)
rather than direct MMIO register access:
- mediatek,mt7981-rng
- mediatek,mt7987-rng
- mediatek,mt7988-rng
These variants require no reg, clocks, or clock-names properties since
the RNG hardware is managed by ARM Trusted Firmware-A.
Relax the $nodename pattern to also allow 'rng' in addition to the
existing 'rng@...' pattern.
Add a second example showing the minimal SMC variant binding.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
v3:
* drop not: in compatible conditional
* add reg/clocks/clock-names: false for mt7981-rng
* add else: requiring reg/clocks/clock-names for others
v2: express compatibilities with fallback
.../devicetree/bindings/rng/mtk-rng.yaml | 32 ++++++++++++++++---
1 file changed, 28 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/rng/mtk-rng.yaml b/Documentation/devicetree/bindings/rng/mtk-rng.yaml
index 7e8dc62e5d3a6..8fe6c209ab1e5 100644
--- a/Documentation/devicetree/bindings/rng/mtk-rng.yaml
+++ b/Documentation/devicetree/bindings/rng/mtk-rng.yaml
@@ -11,12 +11,13 @@ maintainers:
properties:
$nodename:
- pattern: "^rng@[0-9a-f]+$"
+ pattern: "^rng(@[0-9a-f]+)?$"
compatible:
oneOf:
- enum:
- mediatek,mt7623-rng
+ - mediatek,mt7981-rng
- items:
- enum:
- mediatek,mt7622-rng
@@ -25,6 +26,11 @@ properties:
- mediatek,mt8365-rng
- mediatek,mt8516-rng
- const: mediatek,mt7623-rng
+ - items:
+ - enum:
+ - mediatek,mt7987-rng
+ - mediatek,mt7988-rng
+ - const: mediatek,mt7981-rng
reg:
maxItems: 1
@@ -38,9 +44,23 @@ properties:
required:
- compatible
- - reg
- - clocks
- - clock-names
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: mediatek,mt7981-rng
+ then:
+ properties:
+ reg: false
+ clocks: false
+ clock-names: false
+ else:
+ required:
+ - reg
+ - clocks
+ - clock-names
additionalProperties: false
@@ -53,3 +73,7 @@ examples:
clocks = <&infracfg CLK_INFRA_TRNG>;
clock-names = "rng";
};
+ - |
+ rng {
+ compatible = "mediatek,mt7981-rng";
+ };
--
2.53.0
^ permalink raw reply related
* [PATCH v3 2/2] hwrng: mtk - add support for hw access via SMCC
From: Daniel Golle @ 2026-04-19 12:05 UTC (permalink / raw)
To: Olivia Mackall, Herbert Xu, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Matthias Brugger, AngeloGioacchino Del Regno,
Sean Wang, Daniel Golle, linux-crypto, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek
In-Reply-To: <585fc832e4e5d3656bd25ecee6bafb636993104a.1776600269.git.daniel@makrotopia.org>
Newer versions of ARM TrustedFirmware-A on MediaTek's ARMv8 SoCs no longer
allow accessing the TRNG from outside of the trusted firmware.
Instead, a vendor-defined custom Secure Monitor Call can be used to
acquire random bytes.
Add support for newer SoCs (MT7981, MT7987, MT7988).
As TF-A for the MT7986 may either follow the old or the new
convention, the best bet is to test if firmware blocks direct access
to the hwrng and if so, expect the SMCC interface to be usable.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
v3: unchanged
v2: unchanged
drivers/char/hw_random/mtk-rng.c | 127 ++++++++++++++++++++++++++-----
1 file changed, 106 insertions(+), 21 deletions(-)
diff --git a/drivers/char/hw_random/mtk-rng.c b/drivers/char/hw_random/mtk-rng.c
index 5808d09d12c45..8f5856b59ad66 100644
--- a/drivers/char/hw_random/mtk-rng.c
+++ b/drivers/char/hw_random/mtk-rng.c
@@ -3,6 +3,7 @@
* Driver for Mediatek Hardware Random Number Generator
*
* Copyright (C) 2017 Sean Wang <sean.wang@mediatek.com>
+ * Copyright (C) 2026 Daniel Golle <daniel@makrotopia.org>
*/
#define MTK_RNG_DEV KBUILD_MODNAME
@@ -17,6 +18,8 @@
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
+#include <linux/arm-smccc.h>
+#include <linux/soc/mediatek/mtk_sip_svc.h>
/* Runtime PM autosuspend timeout: */
#define RNG_AUTOSUSPEND_TIMEOUT 100
@@ -30,6 +33,11 @@
#define RNG_DATA 0x08
+/* Driver feature flags */
+#define MTK_RNG_SMC BIT(0)
+
+#define MTK_SIP_KERNEL_GET_RND MTK_SIP_SMC_CMD(0x550)
+
#define to_mtk_rng(p) container_of(p, struct mtk_rng, rng)
struct mtk_rng {
@@ -37,6 +45,7 @@ struct mtk_rng {
struct clk *clk;
struct hwrng rng;
struct device *dev;
+ unsigned long flags;
};
static int mtk_rng_init(struct hwrng *rng)
@@ -103,6 +112,56 @@ static int mtk_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
return retval || !wait ? retval : -EIO;
}
+static int mtk_rng_read_smc(struct hwrng *rng, void *buf, size_t max,
+ bool wait)
+{
+ struct arm_smccc_res res;
+ int retval = 0;
+
+ while (max >= sizeof(u32)) {
+ arm_smccc_smc(MTK_SIP_KERNEL_GET_RND, 0, 0, 0, 0, 0, 0, 0,
+ &res);
+ if (res.a0)
+ break;
+
+ *(u32 *)buf = res.a1;
+ retval += sizeof(u32);
+ buf += sizeof(u32);
+ max -= sizeof(u32);
+ }
+
+ return retval || !wait ? retval : -EIO;
+}
+
+static bool mtk_rng_hw_accessible(struct mtk_rng *priv)
+{
+ u32 val;
+ int err;
+
+ err = clk_prepare_enable(priv->clk);
+ if (err)
+ return false;
+
+ val = readl(priv->base + RNG_CTRL);
+ val |= RNG_EN;
+ writel(val, priv->base + RNG_CTRL);
+
+ val = readl(priv->base + RNG_CTRL);
+
+ if (val & RNG_EN) {
+ /* HW is accessible, clean up: disable RNG and clock */
+ writel(val & ~RNG_EN, priv->base + RNG_CTRL);
+ clk_disable_unprepare(priv->clk);
+ return true;
+ }
+
+ /*
+ * If TF-A blocks direct access, the register reads back as 0.
+ * Leave the clock enabled as TF-A needs it.
+ */
+ return false;
+}
+
static int mtk_rng_probe(struct platform_device *pdev)
{
int ret;
@@ -114,23 +173,42 @@ static int mtk_rng_probe(struct platform_device *pdev)
priv->dev = &pdev->dev;
priv->rng.name = pdev->name;
-#ifndef CONFIG_PM
- priv->rng.init = mtk_rng_init;
- priv->rng.cleanup = mtk_rng_cleanup;
-#endif
- priv->rng.read = mtk_rng_read;
priv->rng.quality = 900;
-
- priv->clk = devm_clk_get(&pdev->dev, "rng");
- if (IS_ERR(priv->clk)) {
- ret = PTR_ERR(priv->clk);
- dev_err(&pdev->dev, "no clock for device: %d\n", ret);
- return ret;
+ priv->flags = (unsigned long)device_get_match_data(&pdev->dev);
+
+ if (!(priv->flags & MTK_RNG_SMC)) {
+ priv->clk = devm_clk_get(&pdev->dev, "rng");
+ if (IS_ERR(priv->clk)) {
+ ret = PTR_ERR(priv->clk);
+ dev_err(&pdev->dev, "no clock for device: %d\n", ret);
+ return ret;
+ }
+
+ priv->base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(priv->base))
+ return PTR_ERR(priv->base);
+
+ if (IS_ENABLED(CONFIG_HAVE_ARM_SMCCC) &&
+ of_device_is_compatible(pdev->dev.of_node,
+ "mediatek,mt7986-rng") &&
+ !mtk_rng_hw_accessible(priv)) {
+ priv->flags |= MTK_RNG_SMC;
+ dev_info(&pdev->dev,
+ "HW RNG not MMIO accessible, using SMC\n");
+ }
}
- priv->base = devm_platform_ioremap_resource(pdev, 0);
- if (IS_ERR(priv->base))
- return PTR_ERR(priv->base);
+ if (priv->flags & MTK_RNG_SMC) {
+ if (!IS_ENABLED(CONFIG_HAVE_ARM_SMCCC))
+ return -ENODEV;
+ priv->rng.read = mtk_rng_read_smc;
+ } else {
+#ifndef CONFIG_PM
+ priv->rng.init = mtk_rng_init;
+ priv->rng.cleanup = mtk_rng_cleanup;
+#endif
+ priv->rng.read = mtk_rng_read;
+ }
ret = devm_hwrng_register(&pdev->dev, &priv->rng);
if (ret) {
@@ -139,12 +217,15 @@ static int mtk_rng_probe(struct platform_device *pdev)
return ret;
}
- dev_set_drvdata(&pdev->dev, priv);
- pm_runtime_set_autosuspend_delay(&pdev->dev, RNG_AUTOSUSPEND_TIMEOUT);
- pm_runtime_use_autosuspend(&pdev->dev);
- ret = devm_pm_runtime_enable(&pdev->dev);
- if (ret)
- return ret;
+ if (!(priv->flags & MTK_RNG_SMC)) {
+ dev_set_drvdata(&pdev->dev, priv);
+ pm_runtime_set_autosuspend_delay(&pdev->dev,
+ RNG_AUTOSUSPEND_TIMEOUT);
+ pm_runtime_use_autosuspend(&pdev->dev);
+ ret = devm_pm_runtime_enable(&pdev->dev);
+ if (ret)
+ return ret;
+ }
dev_info(&pdev->dev, "registered RNG driver\n");
@@ -181,8 +262,11 @@ static const struct dev_pm_ops mtk_rng_pm_ops = {
#endif /* CONFIG_PM */
static const struct of_device_id mtk_rng_match[] = {
- { .compatible = "mediatek,mt7986-rng" },
{ .compatible = "mediatek,mt7623-rng" },
+ { .compatible = "mediatek,mt7981-rng", .data = (void *)MTK_RNG_SMC },
+ { .compatible = "mediatek,mt7986-rng" },
+ { .compatible = "mediatek,mt7987-rng", .data = (void *)MTK_RNG_SMC },
+ { .compatible = "mediatek,mt7988-rng", .data = (void *)MTK_RNG_SMC },
{},
};
MODULE_DEVICE_TABLE(of, mtk_rng_match);
@@ -200,4 +284,5 @@ module_platform_driver(mtk_rng_driver);
MODULE_DESCRIPTION("Mediatek Random Number Generator Driver");
MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
+MODULE_AUTHOR("Daniel Golle <daniel@makrotopia.org>");
MODULE_LICENSE("GPL");
--
2.53.0
^ permalink raw reply related
* [PATCH 0/4] Add hstimer support for H616 and T113-S3
From: Michal Piekos @ 2026-04-19 12:46 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Chen-Yu Tsai, Jernej Skrabec, Samuel Holland,
Maxime Ripard
Cc: linux-kernel, devicetree, linux-arm-kernel, linux-sunxi,
Michal Piekos
Add support for Allwinner H616 high speed timer in sun5i hstimer driver
and describe corresponding nodes in dts for H616 and T113-S3.
H616 uses same model as existing driver except register shift compared
to older variants.
Added register layout abstraction in the driver, extended the binding
with new compatibles and wired up dts nodes for H616 and T113-S3 which
uses H616 as fallback compatible.
Signed-off-by: Michal Piekos <michal.piekos@mmpsystems.pl>
---
Michal Piekos (4):
dt-bindings: timer: allwinner,sun5i-a13-hstimer: add H616 and T113-S3
clocksource/drivers/sun5i: add H616 hstimer support
arm64: dts: allwinner: h616: add hstimer node
arm: dts: allwinner: t113s: add hstimer node
.../timer/allwinner,sun5i-a13-hstimer.yaml | 8 +++-
arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi | 12 +++++
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 9 ++++
drivers/clocksource/timer-sun5i.c | 56 +++++++++++++++++++---
4 files changed, 78 insertions(+), 7 deletions(-)
---
base-commit: faeab166167f5787719eb8683661fd41a3bb1514
change-id: 20260413-h616-t113s-hstimer-62939948f91c
Best regards,
--
Michal Piekos <michal.piekos@mmpsystems.pl>
^ permalink raw reply
* [PATCH 2/4] clocksource/drivers/sun5i: add H616 hstimer support
From: Michal Piekos @ 2026-04-19 12:46 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Chen-Yu Tsai, Jernej Skrabec, Samuel Holland,
Maxime Ripard
Cc: linux-kernel, devicetree, linux-arm-kernel, linux-sunxi,
Michal Piekos
In-Reply-To: <20260419-h616-t113s-hstimer-v1-0-1af74ebef7c5@mmpsystems.pl>
H616 high speed timer differs from existing timer-sun5i by register base
offset.
Add selectable register layout structures.
Add H616 compatible string to OF match table.
Signed-off-by: Michal Piekos <michal.piekos@mmpsystems.pl>
---
drivers/clocksource/timer-sun5i.c | 56 ++++++++++++++++++++++++++++++++++-----
1 file changed, 50 insertions(+), 6 deletions(-)
diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-sun5i.c
index f827d3f98f60..125abc11c3c3 100644
--- a/drivers/clocksource/timer-sun5i.c
+++ b/drivers/clocksource/timer-sun5i.c
@@ -21,18 +21,52 @@
#define TIMER_IRQ_EN_REG 0x00
#define TIMER_IRQ_EN(val) BIT(val)
#define TIMER_IRQ_ST_REG 0x04
-#define TIMER_CTL_REG(val) (0x20 * (val) + 0x10)
#define TIMER_CTL_ENABLE BIT(0)
#define TIMER_CTL_RELOAD BIT(1)
-#define TIMER_CTL_CLK_PRES(val) (((val) & 0x7) << 4)
#define TIMER_CTL_ONESHOT BIT(7)
-#define TIMER_INTVAL_LO_REG(val) (0x20 * (val) + 0x14)
-#define TIMER_INTVAL_HI_REG(val) (0x20 * (val) + 0x18)
-#define TIMER_CNTVAL_LO_REG(val) (0x20 * (val) + 0x1c)
-#define TIMER_CNTVAL_HI_REG(val) (0x20 * (val) + 0x20)
+#define TIMER_CTL_CLK_PRES(val) (((val) & 0x7) << 4)
+#define TIMER_CTL_REG(val) \
+ (soc_base->stride * (val) + soc_base->ctl_base)
+#define TIMER_INTVAL_LO_REG(val) \
+ (soc_base->stride * (val) + soc_base->intval_lo_base)
+#define TIMER_INTVAL_HI_REG(val) \
+ (soc_base->stride * (val) + soc_base->intval_hi_base)
+#define TIMER_CNTVAL_LO_REG(val) \
+ (soc_base->stride * (val) + soc_base->cntval_lo_base)
+#define TIMER_CNTVAL_HI_REG(val) \
+ (soc_base->stride * (val) + soc_base->cntval_hi_base)
#define TIMER_SYNC_TICKS 3
+struct sunxi_timer_base {
+ u32 ctl_base;
+ u32 intval_lo_base;
+ u32 intval_hi_base;
+ u32 cntval_lo_base;
+ u32 cntval_hi_base;
+ u32 stride;
+};
+
+static const struct sunxi_timer_base sun5i_base = {
+ .ctl_base = 0x10,
+ .intval_lo_base = 0x14,
+ .intval_hi_base = 0x18,
+ .cntval_lo_base = 0x1c,
+ .cntval_hi_base = 0x20,
+ .stride = 0x20
+};
+
+static const struct sunxi_timer_base sun50i_base = {
+ .ctl_base = 0x20,
+ .intval_lo_base = 0x24,
+ .intval_hi_base = 0x28,
+ .cntval_lo_base = 0x2c,
+ .cntval_hi_base = 0x30,
+ .stride = 0x20
+};
+
+static const struct sunxi_timer_base *soc_base;
+
struct sun5i_timer {
void __iomem *base;
struct clk *clk;
@@ -238,6 +272,7 @@ static int sun5i_setup_clockevent(struct platform_device *pdev,
static int sun5i_timer_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
+ struct device_node *node = dev_of_node(&pdev->dev);
struct sun5i_timer *st;
struct reset_control *rstc;
void __iomem *timer_base;
@@ -251,6 +286,14 @@ static int sun5i_timer_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, st);
+ if (!node)
+ return -EINVAL;
+
+ if (of_device_is_compatible(node, "allwinner,sun50i-h616-hstimer"))
+ soc_base = &sun50i_base;
+ else
+ soc_base = &sun5i_base;
+
timer_base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(timer_base)) {
dev_err(dev, "Can't map registers\n");
@@ -314,6 +357,7 @@ static void sun5i_timer_remove(struct platform_device *pdev)
static const struct of_device_id sun5i_timer_of_match[] = {
{ .compatible = "allwinner,sun5i-a13-hstimer" },
{ .compatible = "allwinner,sun7i-a20-hstimer" },
+ { .compatible = "allwinner,sun50i-h616-hstimer" },
{},
};
MODULE_DEVICE_TABLE(of, sun5i_timer_of_match);
--
2.43.0
^ permalink raw reply related
* [PATCH 1/4] dt-bindings: timer: allwinner,sun5i-a13-hstimer: add H616 and T113-S3
From: Michal Piekos @ 2026-04-19 12:46 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Chen-Yu Tsai, Jernej Skrabec, Samuel Holland,
Maxime Ripard
Cc: linux-kernel, devicetree, linux-arm-kernel, linux-sunxi,
Michal Piekos
In-Reply-To: <20260419-h616-t113s-hstimer-v1-0-1af74ebef7c5@mmpsystems.pl>
H616 is compatible with the existing sun5i binding, but
require its own compatible string to differentiate register offsets.
T113-S3 uses same offsets as H616.
Add allwinner,sun50i-h616-hstimer
Add allwinner,sun8i-t113s-hstimer with fallback to
allwinner,sun50i-h616-hstimer
Extend schema condition for interrupts to cover H616 compatible variant.
Signed-off-by: Michal Piekos <michal.piekos@mmpsystems.pl>
---
.../devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml
index f1853daec2f9..bb60a85dc34b 100644
--- a/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml
+++ b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml
@@ -15,9 +15,13 @@ properties:
oneOf:
- const: allwinner,sun5i-a13-hstimer
- const: allwinner,sun7i-a20-hstimer
+ - const: allwinner,sun50i-h616-hstimer
- items:
- const: allwinner,sun6i-a31-hstimer
- const: allwinner,sun7i-a20-hstimer
+ - items:
+ - const: allwinner,sun8i-t113s-hstimer
+ - const: allwinner,sun50i-h616-hstimer
reg:
maxItems: 1
@@ -45,7 +49,9 @@ required:
if:
properties:
compatible:
- const: allwinner,sun5i-a13-hstimer
+ enum:
+ - allwinner,sun5i-a13-hstimer
+ - allwinner,sun50i-h616-hstimer
then:
properties:
--
2.43.0
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox