* Re: [PATCH net-next v2 1/2] dt-bindings: net: pse-pd: add bindings for Realtek/Broadcom PSE MCU
From: Rob Herring @ 2026-06-15 21:29 UTC (permalink / raw)
To: Jonas Jelonek
Cc: Oleksij Rempel, Kory Maincent, Andrew Lunn, David S . Miller,
Eric Dumazet, Jakub Kicinski, Paolo Abeni, Krzysztof Kozlowski,
Conor Dooley, netdev, devicetree, linux-kernel, Daniel Golle,
Bjørn Mork
In-Reply-To: <20260612132944.460646-2-jelonek.jonas@gmail.com>
On Fri, Jun 12, 2026 at 01:29:41PM +0000, Jonas Jelonek wrote:
> Add a binding for the microcontroller (MCU) that fronts the PSE silicon
> on a range of managed switches. The host talks only to the MCU, over
> I2C/SMBus or UART, using a fixed message-based protocol; the PSE chips
> behind it never appear on the bus.
>
> The compatible identifies the PSE-MCU protocol dialect
> (realtek,pse-mcu-rtk or realtek,pse-mcu-bcm), not a specific part: the
> node describes the MCU - whose silicon is a general-purpose
> microcontroller that varies across boards - and the 'realtek' vendor
> prefix reflects the platform these MCUs are found on (Realtek-based PoE
> switches), following the google,cros-ec-* pattern rather than naming the
> MCU silicon. The '-rtk'/'-bcm' suffix selects the Realtek or Broadcom
> dialect within that one family. The specific PSE chip is detected at
> runtime and is not described here.
>
> A single compatible per dialect covers both the I2C/SMBus and UART
> attachments: the wire protocol is identical across them and the transport
> is expressed by the node's parent bus, so it is not encoded in the
> compatible.
>
> Both dialects share one protocol family and one device tree contract, so
> they are documented in a single binding under one vendor prefix. The
> 'realtek' prefix is used because this MCU front-end is found almost
> exclusively on Realtek-based switches; the Broadcom dialect is expressed
> as the realtek,pse-mcu-bcm compatible within the same family.
>
> Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
> ---
> .../bindings/net/pse-pd/realtek,pse-mcu.yaml | 154 ++++++++++++++++++
> 1 file changed, 154 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/pse-pd/realtek,pse-mcu.yaml
>
> diff --git a/Documentation/devicetree/bindings/net/pse-pd/realtek,pse-mcu.yaml b/Documentation/devicetree/bindings/net/pse-pd/realtek,pse-mcu.yaml
> new file mode 100644
> index 000000000000..2fb729dcb41f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/pse-pd/realtek,pse-mcu.yaml
> @@ -0,0 +1,154 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/pse-pd/realtek,pse-mcu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Realtek/Broadcom PSE MCU
> +
> +maintainers:
> + - Jonas Jelonek <jelonek.jonas@gmail.com>
> +
> +description: |
> + Microcontroller (MCU) that fronts the PSE hardware on switches using
> + Realtek (RTL8238B, RTL8239, RTL8239C) or Broadcom (BCM59111, BCM59121)
> + PSE chips. The MCU exposes a small message-based protocol over either
> + I2C/SMBus or UART; the actual PSE silicon is not accessed directly. The
> + Realtek and Broadcom variants share this device tree contract but use
> + different protocol opcodes, selected by the compatible.
> +
> + The compatible identifies the PSE-MCU protocol dialect, not a specific
> + part. The device described here is the MCU, whose own silicon varies
> + across boards and is incidental to the protocol. The MCU is not
> + made by Realtek or Broadcom; the 'realtek' vendor prefix reflects the
> + platform these MCUs are found on (Realtek-based PoE switches) and the
> + '-rtk'/'-bcm' suffix selects the Realtek or Broadcom protocol dialect.
> + The specific PSE chip behind the MCU is not described in the device
> + tree either; it is detected at runtime by querying the MCU.
> +
> + A single compatible per dialect covers both the I2C/SMBus and UART
> + attachments: the wire protocol is identical across them and the
> + transport is already expressed by the node's parent bus, so it is not
> + encoded in the compatible. Transport-specific properties differ
> + accordingly - the I2C attachment carries 'reg' (and, for Realtek,
> + 'realtek,i2c-protocol'), while the UART attachment carries the serial
> + peripheral properties such as 'current-speed'.
> +
> +properties:
> + compatible:
> + enum:
> + - realtek,pse-mcu-rtk
The "rtk" feels redundant.
> + - realtek,pse-mcu-bcm
"brcm" is the standard vendor prefix, so use that instead of "bcm".
Though who defined the protocol in this case? Realtek or Broadcom? In
the latter case, I'd argue that "brcm" should be the vendor prefix.
> +
> + reg:
> + maxItems: 1
> +
> + power-supply:
> + description: Regulator supplying the PoE power rail.
> +
> + enable-gpios:
> + maxItems: 1
> +
> + realtek,i2c-protocol:
> + $ref: /schemas/types.yaml#/definitions/string
> + enum: [ i2c, smbus ]
> + description: |
> + Wire framing the MCU firmware expects on the I2C bus. "smbus" means
> + reads carry a leading command byte (0x00) and a repeated start; "i2c"
> + means bare 12-byte writes and reads with no command prefix. Only
> + applies to the Realtek I2C attachment.
I tend to think this should be distinguished by the compatible string.
That would simplify the schema given it only applies to one of the
compatible strings.
Rob
^ permalink raw reply
* Re: [PATCH v8 00/10] clk: realtek: Add RTD1625 clock support
From: Brian Masney @ 2026-06-15 21:28 UTC (permalink / raw)
To: Yu-Chun Lin
Cc: mturquette, sboyd, robh, krzk+dt, conor+dt, p.zabel, cylee12,
afaerber, jyanchou, devicetree, linux-clk, linux-kernel,
linux-arm-kernel, linux-realtek-soc, james.tai, cy.huang,
stanley_chang
In-Reply-To: <20260610080824.255063-1-eleanor.lin@realtek.com>
Hi Yu-Chun,
On Wed, Jun 10, 2026 at 04:08:14PM +0800, Yu-Chun Lin wrote:
> Hello,
>
> This patch series adds clock support for Realtek's RTD1625 platform.
> The series includes:
> 1. Device Tree: Add clock controller nodes.
> 2. Infrastructure: reset controller, basic clocks, PLLs, gate clocks, mux
> clocks, and MMC-tuned PLLs.
> 3. Platform drivers: two clock controller drivers for RTD1625-CRT and
> RTD1625-ISO.
>
> Best regards,
> Yu-Chun Lin
Sashiko has some legitimate feedback about this patch set:
https://sashiko.dev/#/patchset/20260610080824.255063-1-eleanor.lin%40realtek.com
Can you go through that and post a new version? I'll review the next
version manually in more detail.
Brian
^ permalink raw reply
* Re: [PATCH] dt-bindings: i2c: i2c-mux-pinctrl: change maintainer
From: Andi Shyti @ 2026-06-15 21:15 UTC (permalink / raw)
To: Thierry Reding
Cc: Wolfram Sang, linux-i2c, Thierry Reding, Peter Rosin, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, devicetree
In-Reply-To: <ajBGibftf679T6P4@arch.a226c7d-lcedt>
Hi Thierry,
> > maintainers:
> > - - Wolfram Sang <wsa@kernel.org>
> > + - Thierry Reding <treding@nvidia.com>
> >
> > description: |
> > This binding describes an I2C bus multiplexer that uses pin multiplexing to route the I2C
>
> By default I used to list the subsystem maintainer as the bindings
> maintainer if the binding wasn't Tegra-specific, or in this case the
> original author wasn't active anymore.
>
> I'm fine being listed as the maintainer for this if you don't want to,
> but I prefer to use the thierry.reding@kernel.org email address for
> communication.
Just to be clear, are you saying that in this file you want your
kernel.org e-mail or are you referring to generic communication?
Andi
> With that:
>
> Acked-by: Thierry Reding <treding@nvidia.com>
^ permalink raw reply
* Re: [PATCH v9 4/9] dt-bindings: display: imx: Add i.MX94 DCIF
From: Rob Herring (Arm) @ 2026-06-15 21:04 UTC (permalink / raw)
To: Laurentiu Palcu
Cc: Conor Dooley, Simona Vetter, Fabio Estevam, David Airlie,
Luca Ceresoli, linux-arm-kernel, dri-devel, imx, linux-kernel,
Krzysztof Kozlowski, Maxime Ripard, Maarten Lankhorst,
Thomas Zimmermann, Pengutronix Kernel Team, devicetree, Frank Li,
Philipp Zabel, linux-clk, Sascha Hauer, Ying Liu
In-Reply-To: <20260612-dcif-upstreaming-v9-4-8d0ff89aa3c5@oss.nxp.com>
On Fri, 12 Jun 2026 14:58:35 +0300, Laurentiu Palcu wrote:
> DCIF is the i.MX94 Display Controller Interface which is used to
> drive a TFT LCD panel or connects to a display interface depending
> on the chip configuration.
>
> Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> ---
> .../bindings/display/imx/nxp,imx94-dcif.yaml | 90 ++++++++++++++++++++++
> 1 file changed, 90 insertions(+)
>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v3] dt-bindings: pinctrl: qcom,pmic-gpio: Add Qualcomm PMK7750
From: Rob Herring (Arm) @ 2026-06-15 21:02 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: linux-arm-msm, Abel Vesa, devicetree, linux-gpio,
Krzysztof Kozlowski, Conor Dooley, Linus Walleij, Bjorn Andersson,
linux-kernel
In-Reply-To: <20260612090426.23403-2-krzysztof.kozlowski@oss.qualcomm.com>
On Fri, 12 Jun 2026 11:04:27 +0200, Krzysztof Kozlowski wrote:
> Document Qualcomm PMK7750 GPIO used with Eliza SoC. PMIC is almost the
> same as PMK8550, thus compatible with it.
>
> Cc: Abel Vesa <abel.vesa@oss.qualcomm.com>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
>
> ---
>
> Changes in v3:
> 1. Drop stale pmk7750 from main enum lisrt (the big one) - leftover of
> previous version
>
> Changes in v2:
> 1. Add fallback compatible.
> ---
> .../bindings/pinctrl/qcom,pmic-gpio.yaml | 151 +++++++++---------
> 1 file changed, 78 insertions(+), 73 deletions(-)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v3] dt-bindings: interrupt-controller: ti,irq-crossbar: Convert to DT schema
From: Rob Herring (Arm) @ 2026-06-15 21:01 UTC (permalink / raw)
To: Bhargav Joshi
Cc: simona.toaca, Krzysztof Kozlowski, m-chawdhry, daniel.baluta,
Thomas Gleixner, Sricharan R, linux-kernel, devicetree,
Conor Dooley, goledhruva
In-Reply-To: <20260612-crossbar-v3-1-266747bc2e86@gmail.com>
On Fri, 12 Jun 2026 02:42:29 +0530, Bhargav Joshi wrote:
> Convert TI irq-crossbar binding from text format to DT schema.
>
> As part of conversion following changes are made:
> - Add '#interrupt-cells' as a required property which was missing in
> text binding
> - As irq-crossbar is interrupt-controller. Move binding from
> bindings/arm/omap to bindings/interrupt-controller
>
> Signed-off-by: Bhargav Joshi <j.bhargav.u@gmail.com>
> ---
> Changes in v3:
> - Fixed typo in property description
> - Link to v2: https://lore.kernel.org/r/20260611-crossbar-v2-1-231d4f88298e@gmail.com
>
> Changes in v2:
> - Dropped property name change and driver updates.
> - Link to v1: https://lore.kernel.org/r/20260606-crossbar-v1-0-f67f7cb9ee50@gmail.com
> ---
> .../devicetree/bindings/arm/omap/crossbar.txt | 55 -------------
> .../interrupt-controller/ti,irq-crossbar.yaml | 96 ++++++++++++++++++++++
> 2 files changed, 96 insertions(+), 55 deletions(-)
>
Applied, thanks!
^ permalink raw reply
* Re: [PATCH net-next v5 05/15] net: ethernet: oa_tc6: Move constant definitions to header file
From: Jakub Kicinski @ 2026-06-15 20:55 UTC (permalink / raw)
To: Selvamani Rajagopal via B4 Relay
Cc: Selvamani.Rajagopal, Andrew Lunn, Piergiorgio Beruto,
Heiner Kallweit, Russell King, David S. Miller, Eric Dumazet,
Paolo Abeni, Andrew Lunn, Parthiban Veerasooran, Richard Cochran,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Simon Horman,
Jonathan Corbet, Shuah Khan, netdev, linux-kernel, devicetree,
linux-doc, Jerry Ray
In-Reply-To: <20260614-s2500-mac-phy-support-v5-5-89874b72f725@onsemi.com>
On Sun, 14 Jun 2026 10:00:21 -0700 Selvamani Rajagopal via B4 Relay
wrote:
> To help other source files within the module share the
> constant definitions, they are moved to a header file.
>
> The memory map selector(MMS) values that are defined in
> in Table 6 of OPEN Alliance 10BASE-T1x Serial Interface
> specification and currently used are added.
If you're adding kdoc on functions the return value must be documented
(unless it's void of course):
Warning: drivers/net/ethernet/oa_tc6/oa_tc6_ptp.c:34 No description found for return value of 'oa_tc6_ptp_register'
Warning: drivers/net/ethernet/oa_tc6/oa_tc6_tstamp.c:143 function parameter 'stats' not described in 'oa_tc6_get_ts_stats'
Warning: drivers/net/ethernet/oa_tc6/oa_tc6_tstamp.c:185 No description found for return value of 'oa_tc6_get_ts_info'
Please note that net-next is closed during the merge window, please
wait with the repost per: https://netdev.bots.linux.dev/net-next.html
--
pw-bot: cr
^ permalink raw reply
* Re: [PATCH v2] riscv: dts: spacemit: k1-orangepi-rv2: Add cpu scaling
From: sashiko-bot @ 2026-06-15 20:41 UTC (permalink / raw)
To: Vincent Legoll; +Cc: conor+dt, robh, devicetree
In-Reply-To: <20260615-k1-cpufreq-orangepi-rv2-v2-1-237f006e580b@gmail.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] The `buck1` CPU supply regulator has a dangerously high maximum voltage constraint of 3.45V, risking permanent CPU damage under DVFS.
- [Low] The patch includes `k1-opp.dtsi`, which does not exist in the source tree, leading to a fatal device tree build error.
--
commit 6c23623ea2ead11420af84821e27659f9fd1622e
Author: Vincent Legoll <vincent.legoll@gmail.com>
riscv: dts: spacemit: k1-orangepi-rv2: Add cpu scaling
This commit enables CPU DVFS on the OrangePi RV2 by including an OPP
device tree file and binding the CPU supply to a regulator.
> diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> index 7c49bce427f30..2c2542e02d6a8 100644
> --- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> +++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> @@ -7,6 +7,7 @@
> /dts-v1/;
>
> #include "k1.dtsi"
> +#include "k1-opp.dtsi"
[Severity: Low]
Does the k1-opp.dtsi file exist in the source tree? Including a missing file
will cause the device tree compiler to fail with a no such file or directory
error, immediately breaking the build.
> #include "k1-pinctrl.dtsi"
>
> / {
[ ... ]
> @@ -80,6 +81,38 @@ &combo_phy {
> status = "okay";
> };
>
> +&cpu_0 {
> + cpu-supply = <&buck1_0v9>;
> +};
[ ... ]
> @@ -162,7 +195,7 @@ pmic@41 {
> dldoin2-supply = <&buck5>;
>
> regulators {
> - buck1 {
> + buck1_0v9: buck1 {
> regulator-min-microvolt = <500000>;
> regulator-max-microvolt = <3450000>;
[Severity: High]
Is this maximum voltage constraint safe for the CPU under DVFS? The
regulator allows up to 3.45V, and by actively binding it to the CPU as
cpu-supply in this patch, cpufreq or the regulator framework could request
voltages much higher than the typical ~0.9V core voltage. Could this risk
permanent overvoltage damage to the CPU if an invalid OPP table or userspace
override occurs?
> regulator-ramp-delay = <5000>;
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260615-k1-cpufreq-orangepi-rv2-v2-1-237f006e580b@gmail.com?part=1
^ permalink raw reply
* Re: [PATCH 2/3] dt-bindings: mfd: s2mu005-pmic: drop compatible property for multi-led node
From: sashiko-bot @ 2026-06-15 20:40 UTC (permalink / raw)
To: Kaustabh Chakraborty; +Cc: robh, devicetree, conor+dt
In-Reply-To: <20260616-s2mu005-pmic-supplement-v1-2-41e84518b711@disroot.org>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The commit removes the `compatible` property from the `multi-led` node schema but leaves it in the `examples` section, causing `dt_binding_check` to fail.
--
commit 0e7f716b7cd2059b3923af518e9775e3715e58df
Author: Kaustabh Chakraborty <kauschluss@disroot.org>
dt-bindings: mfd: s2mu005-pmic: drop compatible property for multi-led node
The multi-led node is very trivial in description and also has no
sub-nodes. A compatible string property for such nodes is not preferred
by upstream. Remove said node from the schema. While at it, also add a
description following its other sibling nodes.
Link: https://lore.kernel.org/all/d2f4cb7d-5c3e-4b9a-86ca-04262cbb9775@kernel.org
> diff --git a/Documentation/devicetree/bindings/mfd/samsung,s2mu005-pmic.yaml b/Documentation/devicetree/bindings/mfd/samsung,s2mu005-pmic.yaml
> index 8354422e39b1e..f62fe7a05147e 100644
> --- a/Documentation/devicetree/bindings/mfd/samsung,s2mu005-pmic.yaml
> +++ b/Documentation/devicetree/bindings/mfd/samsung,s2mu005-pmic.yaml
> @@ -38,17 +38,10 @@ properties:
> Child node describing MUIC device.
>
> multi-led:
> - type: object
> + $ref: /schemas/leds/leds-class-multicolor.yaml#
>
> - allOf:
> - - $ref: /schemas/leds/leds-class-multicolor.yaml#
> -
> - properties:
> - compatible:
> - const: samsung,s2mu005-rgb
> -
> - required:
> - - compatible
> + description:
> + Child node describing the RGB status LED.
>
> unevaluatedProperties: false
[Severity: Low]
With the compatible property dropped from the schema but unevaluatedProperties
remaining false, will this cause a regression during dt_binding_check?
The examples section in this file still defines the compatible string:
examples:
...
multi-led {
compatible = "samsung,s2mu005-rgb";
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_INDICATOR;
linux,default-trigger = "pattern";
};
Should the compatible string be removed from the multi-led node in the examples
block as well to prevent an unevaluated property error?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260616-s2mu005-pmic-supplement-v1-0-41e84518b711@disroot.org?part=2
^ permalink raw reply
* [PATCH v2] riscv: dts: spacemit: k1-orangepi-rv2: Add cpu scaling
From: Vincent Legoll @ 2026-06-15 20:34 UTC (permalink / raw)
To: Shuwei Wu, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Yixun Lan
Cc: devicetree, linux-riscv, spacemit, linux-kernel, Vincent Legoll
Enable CPU DVFS on OrangePi RV2
Signed-off-by: Vincent Legoll <vincent.legoll@gmail.com>
---
Tested on a 2GB RAM OrangePi RV2 board, patch applied over
spacemit/for-next + Shuwei Wu's V3 series.
On Void linux (musl libc):
uname -a
Linux opirv2 7.1.0-rc1-00043-gb860bca13be4 #14 SMP PREEMPT Sat Jun 13
11:02:13 CEST 2026 riscv64 GNU/Linux
awk --version | head -1
GNU Awk 5.3.2, API 4.0
echo userspace > /sys/devices/system/cpu/cpufreq/policy0/scaling_governor
echo 1600000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed
time awk 'BEGIN{for(i=0;i<1000000;i++){}}'
real 0m0.300s
user 0m0.299s
sys 0m0.001s
echo 1228800 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed
time awk 'BEGIN{for(i=0;i<1000000;i++){}}'
real 0m0.432s
user 0m0.429s
sys 0m0.004s
echo 1000000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed
time awk 'BEGIN{for(i=0;i<1000000;i++){}}'
real 0m0.476s
user 0m0.476s
sys 0m0.001s
echo 819000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed
time awk 'BEGIN{for(i=0;i<1000000;i++){}}'
real 0m0.582s
user 0m0.581s
sys 0m0.001s
echo 614400 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed
time awk 'BEGIN{for(i=0;i<1000000;i++){}}'
real 0m0.778s
user 0m0.773s
sys 0m0.005s
Changes in v2:
- Fix indentation with TABs
Feedback from Yixun Lan (dlan)
- sort includes in alphabetical order
- use b4
- Link to v1: https://patch.msgid.link/f031e13e-d9f5-414a-b90e-a3d5a60b8d05@online.fr
---
arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts | 35 +++++++++++++++++++++++-
1 file changed, 34 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
index 7c49bce427f3..2c2542e02d6a 100644
--- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
@@ -7,6 +7,7 @@
/dts-v1/;
#include "k1.dtsi"
+#include "k1-opp.dtsi"
#include "k1-pinctrl.dtsi"
/ {
@@ -80,6 +81,38 @@ &combo_phy {
status = "okay";
};
+&cpu_0 {
+ cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_1 {
+ cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_2 {
+ cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_3 {
+ cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_4 {
+ cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_5 {
+ cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_6 {
+ cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_7 {
+ cpu-supply = <&buck1_0v9>;
+};
+
&emmc {
bus-width = <8>;
mmc-hs400-1_8v;
@@ -162,7 +195,7 @@ pmic@41 {
dldoin2-supply = <&buck5>;
regulators {
- buck1 {
+ buck1_0v9: buck1 {
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3450000>;
regulator-ramp-delay = <5000>;
---
base-commit: 32cb211965ea0ba0ab8568959f006c7fa10e9f23
change-id: 20260615-k1-cpufreq-orangepi-rv2-5ece985163cd
Best regards,
--
Vincent Legoll <vincent.legoll@gmail.com>
^ permalink raw reply related
* Re: [PATCH v11 0/3] Add eDP support for RK3576
From: Damon Ding @ 2026-06-15 12:33 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, heiko
Cc: sebastian.reichel, nicolas.frattaroli, alchark, detlev.casanova,
cristian.ciocaltea, michael.riesch, andy.yan, devicetree,
linux-arm-kernel, linux-rockchip, linux-kernel
In-Reply-To: <20260605022305.3058853-1-damon.ding@rock-chips.com>
Hi all,
Gentle ping on this patch series.
Best regards,
Damon
On 6/5/2026 10:23 AM, Damon Ding wrote:
> Picked from:
> https://lore.kernel.org/all/20260601065100.1103873-1-damon.ding@rock-chips.com/
>
> Patch 1-2 are to add missing clock "hclk" for RK3588 eDP nodes.
> Patch 3 is to add the RK3576 eDP node.
>
> Damon Ding (3):
> arm64: dts: rockchip: Add missing hclk for RK3588 eDP0
> arm64: dts: rockchip: Add missing hclk for RK3588 eDP1
> arm64: dts: rockchip: Add eDP node for RK3576
>
> arch/arm64/boot/dts/rockchip/rk3576.dtsi | 28 +++++++++++++++++++
> arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 4 +--
> .../arm64/boot/dts/rockchip/rk3588-extra.dtsi | 4 +--
> 3 files changed, 32 insertions(+), 4 deletions(-)
>
> ---
>
> Changes in v2:
> - Split out separate patches to add the "hclk" clock reference.
> - Split out separate patches to enable the "hclk" clock.
> - Add Reviewed-by tag.
>
> Changes in v3:
> - Add a patch to expand descriptions for clocks of the eDP node.
> - Add Reviewed-by tag.
>
> Changes in v4:
> - Modify commit msg.
>
> Changes in v5:
> - Enforce the correct third clock name on a per-compatible basis.
> - Modify the commit msg simultaneously.
> - Add Acked-by tag.
>
> Changes in v6:
> - Expand more detail commit msg about using hclk instead of grf clock.
>
> Changes in v7:
> - List all valid clock names at the top level, and constrain the clock
> count for each platform with minItems/maxItems in allOf.
>
> Changes in v8:
> - Fix indentation to 10 for enum in clock-names property.
>
> Changes in v9:
> - Restore the explicit clock-names for RK3399 and RK3588 eDP dt-bindings.
>
> Changes in v10:
> - Use automatic cleanup to fix OF node reference leak reported by
> Sashiko.
>
> Changes in v11:
> - Pick and rebase DT related patches.
>
^ permalink raw reply
* [PATCH 3/3] leds: rgb: s2m: use multi-led node of mfd as source node
From: Kaustabh Chakraborty @ 2026-06-15 20:26 UTC (permalink / raw)
To: André Draszik, Lee Jones, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Pavel Machek
Cc: linux-kernel, linux-samsung-soc, devicetree, linux-leds,
Kaustabh Chakraborty
In-Reply-To: <20260616-s2mu005-pmic-supplement-v1-0-41e84518b711@disroot.org>
With the provided compatible string, the driver is able to use the
respective node to initialize following the properties in said node.
However, the compatible node is removed from the devicetree schema.
Follow the same in the driver. The soruce node must be, as per schema, a
sub-node named "multi-led" in the parent MFD node. Initialize the LED
driver into the sub-system by fetching it from the parent node.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
---
drivers/leds/rgb/leds-s2m-rgb.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/leds/rgb/leds-s2m-rgb.c b/drivers/leds/rgb/leds-s2m-rgb.c
index d239f54eee901..aa7e739213568 100644
--- a/drivers/leds/rgb/leds-s2m-rgb.c
+++ b/drivers/leds/rgb/leds-s2m-rgb.c
@@ -366,6 +366,7 @@ static int s2m_rgb_probe(struct platform_device *pdev)
struct sec_pmic_dev *pmic_drvdata = dev_get_drvdata(dev->parent);
struct s2m_rgb *rgb;
struct led_init_data init_data = {};
+ struct device_node *multi_led_node __free(device_node) = NULL;
int ret;
rgb = devm_kzalloc(dev, sizeof(*rgb), GFP_KERNEL);
@@ -392,7 +393,11 @@ static int s2m_rgb_probe(struct platform_device *pdev)
if (ret)
return dev_err_probe(dev, ret, "failed to create mutex lock\n");
- init_data.fwnode = of_fwnode_handle(dev->of_node);
+ multi_led_node = of_get_child_by_name(dev->parent->of_node, "multi-led");
+ if (!multi_led_node)
+ return dev_err_probe(dev, -ENODEV, "RGB LED node required but not found\n");
+
+ init_data.fwnode = of_fwnode_handle(multi_led_node);
ret = devm_led_classdev_multicolor_register_ext(dev, &rgb->mc, &init_data);
if (ret)
return dev_err_probe(dev, ret, "failed to create LED device\n");
@@ -406,12 +411,6 @@ static const struct platform_device_id s2m_rgb_id_table[] = {
};
MODULE_DEVICE_TABLE(platform, s2m_rgb_id_table);
-static const struct of_device_id s2m_rgb_of_match_table[] = {
- { .compatible = "samsung,s2mu005-rgb", .data = (void *)S2MU005 },
- { /* sentinel */ },
-};
-MODULE_DEVICE_TABLE(of, s2m_rgb_of_match_table);
-
static struct platform_driver s2m_rgb_driver = {
.driver = {
.name = "s2m-rgb",
--
2.53.0
^ permalink raw reply related
* [PATCH 2/3] dt-bindings: mfd: s2mu005-pmic: drop compatible property for multi-led node
From: Kaustabh Chakraborty @ 2026-06-15 20:26 UTC (permalink / raw)
To: André Draszik, Lee Jones, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Pavel Machek
Cc: linux-kernel, linux-samsung-soc, devicetree, linux-leds,
Kaustabh Chakraborty, Krzysztof Kozlowski
In-Reply-To: <20260616-s2mu005-pmic-supplement-v1-0-41e84518b711@disroot.org>
The multi-led node is very trivial in description and also has no
sub-nodes. A compatible string property for such nodes is not preferred
by upstream. Remove said node from the schema. While at it, also add a
description following its other sibling nodes.
Link: https://lore.kernel.org/all/d2f4cb7d-5c3e-4b9a-86ca-04262cbb9775@kernel.org
Suggested-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
---
.../devicetree/bindings/mfd/samsung,s2mu005-pmic.yaml | 13 +++----------
1 file changed, 3 insertions(+), 10 deletions(-)
diff --git a/Documentation/devicetree/bindings/mfd/samsung,s2mu005-pmic.yaml b/Documentation/devicetree/bindings/mfd/samsung,s2mu005-pmic.yaml
index 8354422e39b1e..f62fe7a05147e 100644
--- a/Documentation/devicetree/bindings/mfd/samsung,s2mu005-pmic.yaml
+++ b/Documentation/devicetree/bindings/mfd/samsung,s2mu005-pmic.yaml
@@ -38,17 +38,10 @@ properties:
Child node describing MUIC device.
multi-led:
- type: object
+ $ref: /schemas/leds/leds-class-multicolor.yaml#
- allOf:
- - $ref: /schemas/leds/leds-class-multicolor.yaml#
-
- properties:
- compatible:
- const: samsung,s2mu005-rgb
-
- required:
- - compatible
+ description:
+ Child node describing the RGB status LED.
unevaluatedProperties: false
--
2.53.0
^ permalink raw reply related
* [PATCH 1/3] dt-bindings: mfd: s2mu005-pmic: reorder reg and interrupts properties
From: Kaustabh Chakraborty @ 2026-06-15 20:26 UTC (permalink / raw)
To: André Draszik, Lee Jones, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Pavel Machek
Cc: linux-kernel, linux-samsung-soc, devicetree, linux-leds,
Kaustabh Chakraborty, Krzysztof Kozlowski
In-Reply-To: <20260616-s2mu005-pmic-supplement-v1-0-41e84518b711@disroot.org>
As per convention, and as also reiterated by maintainers [1], the
properties in schema is to be ordered similar to how its done in
devicetree sources; starting from compatible and reg. Re-order the
properties in this schema accordingly.
Link: https://lore.kernel.org/all/0240eb13-6c56-4879-8db7-b990a220a78f@kernel.org [1]
Suggested-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
---
.../devicetree/bindings/mfd/samsung,s2mu005-pmic.yaml | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/mfd/samsung,s2mu005-pmic.yaml b/Documentation/devicetree/bindings/mfd/samsung,s2mu005-pmic.yaml
index aff68c035b38e..8354422e39b1e 100644
--- a/Documentation/devicetree/bindings/mfd/samsung,s2mu005-pmic.yaml
+++ b/Documentation/devicetree/bindings/mfd/samsung,s2mu005-pmic.yaml
@@ -21,14 +21,17 @@ properties:
compatible:
const: samsung,s2mu005-pmic
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
flash:
$ref: /schemas/leds/samsung,s2mu005-flash.yaml#
description:
Child node describing flash LEDs.
- interrupts:
- maxItems: 1
-
muic:
$ref: /schemas/extcon/samsung,s2mu005-muic.yaml#
description:
@@ -49,9 +52,6 @@ properties:
unevaluatedProperties: false
- reg:
- maxItems: 1
-
required:
- compatible
- reg
--
2.53.0
^ permalink raw reply related
* [PATCH 0/3] Additional fixes for "Support for Samsung S2MU005 PMIC and its sub-devices"
From: Kaustabh Chakraborty @ 2026-06-15 20:26 UTC (permalink / raw)
To: André Draszik, Lee Jones, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Pavel Machek
Cc: linux-kernel, linux-samsung-soc, devicetree, linux-leds,
Kaustabh Chakraborty, Krzysztof Kozlowski
This series is a result of discussions from [1] and comments spawned
under it. When this was being discussed, a thread from v6, the v7 was
already posted in the list. The fixes were scheduled for v8, but the
concerned patches were already merged.
And unfortunately, I as per my plans was out-of-office for vacation, so
I couldn't follow up immediately. Sorry for that.
I understand that as the kernel is nearing the v7.1 release, and its
following merge window for v7.2-rc1, the maintainers would be busier
than usual. Apologies again for disrupting any normal procedures. But if
it makes to v7.2-rc1, along with the original series, that would be
nice.
This series has two distinct fixes: (a) to reorder the properties, and
(b) to remove the compatible node. The latter needs driver intervention,
thus this is also posted to the LED maintainers (Lee, ... et al?)
So, the following patches can independently go through different trees:
(a) patch #1, goes through devicetree tree
(b) patch #2 and #3, go through leds tree
[1] https://lore.kernel.org/all/20260515-justly-recite-6028f4bfb24a@spud
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
---
Kaustabh Chakraborty (3):
dt-bindings: mfd: s2mu005-pmic: reorder reg and interrupts properties
dt-bindings: mfd: s2mu005-pmic: drop compatible property for multi-led node
leds: rgb: s2m: use multi-led node of mfd as source node
.../bindings/mfd/samsung,s2mu005-pmic.yaml | 25 ++++++++--------------
drivers/leds/rgb/leds-s2m-rgb.c | 13 ++++++-----
2 files changed, 15 insertions(+), 23 deletions(-)
---
base-commit: 8d6dbbbe3ba62de0a63e962ee004afb848c8e3ac
change-id: 20260616-s2mu005-pmic-supplement-82dcef999c8a
Best regards,
--
Kaustabh Chakraborty <kauschluss@disroot.org>
^ permalink raw reply
* Re: [PATCH v2] hw_random: timeriomem-rng: add configurable read width and data mask
From: sashiko-bot @ 2026-06-15 20:26 UTC (permalink / raw)
To: Jad Keskes; +Cc: robh, devicetree, conor+dt
In-Reply-To: <20260615201339.1264676-1-inasj268@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] This problem wasn't introduced by this patch, but an improper teardown sequence allows a concurrent reader to restart the timer after it was cancelled, leading to a Use-After-Free and potential Deadlock.
--
commit f3fa66cce2c0ad3af71293c86473cf060b400645
Author: Jad Keskes <inasj268@gmail.com>
hw_random: timeriomem-rng: add configurable read width and data mask
This commit adds support for reading 8, 16, or 32 bits from the hardware
random number generator. It applies an optional mask to the data and
configures these properties via device tree or platform data.
> diff --git a/drivers/char/hw_random/timeriomem-rng.c b/drivers/char/hw_random/timeriomem-rng.c
> index e61f063932090..4557326618c90 100644
> --- a/drivers/char/hw_random/timeriomem-rng.c
> +++ b/drivers/char/hw_random/timeriomem-rng.c
[ ... ]
> @@ -71,11 +76,28 @@ static int timeriomem_rng_read(struct hwrng *hwrng, void *data,
> usleep_range(period_us,
> period_us + max(1, period_us / 100));
>
> - *(u32 *)data = readl(priv->io_base);
> - retval += sizeof(u32);
> - data += sizeof(u32);
> - max -= sizeof(u32);
> - } while (wait && max > sizeof(u32));
> + switch (priv->width) {
> + case 8: {
> + u8 val = readb(priv->io_base) & priv->mask;
> + *(u8 *)data = val;
> + break;
> + }
[ ... ]
> + }
> +
> + retval += chunk;
> + data += chunk;
> + max -= chunk;
> + } while (wait && max > chunk);
[Severity: High]
This isn't a bug introduced by this patch, but does the current driver
teardown sequence allow a concurrent reader to cause a use-after-free
or deadlock?
Because the driver uses devm_hwrng_register(), the hwrng is unregistered by
devres after timeriomem_rng_remove() completes.
If timeriomem_rng_remove() calls hrtimer_cancel(&priv->timer) while a reader
is inside timeriomem_rng_read() (for example, sleeping between reads), the
devres cleanup will subsequently call hwrng_unregister() which blocks
waiting for the active reader to finish.
However, the reader will eventually finish its loop and unconditionally run
the following at the end of timeriomem_rng_read():
hrtimer_forward_now(&priv->timer, priv->period);
hrtimer_restart(&priv->timer);
Can this sequence restart the timer after it was cancelled by the remove
function, allowing the timer to eventually fire and dereference the freed
priv pointer?
Additionally, if a reader is waiting in wait_for_completion(&priv->completion)
when the timer is cancelled, could this prevent the timer from firing,
leaving the reader hanging in TASK_UNINTERRUPTIBLE and causing the
subsequent hwrng_unregister() to deadlock?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201339.1264676-1-inasj268@gmail.com?part=1
^ permalink raw reply
* [PATCH v2] hw_random: timeriomem-rng: add configurable read width and data mask
From: Jad Keskes @ 2026-06-15 20:13 UTC (permalink / raw)
To: Olivia Mackall, Herbert Xu
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Alexander Clouter,
linux-crypto, devicetree, linux-kernel, Jad Keskes
The TODO for supporting read sizes other than 32 bits and masking has
been sitting in this driver since 2009. Implement it.
Add width (8, 16, or 32 bits) and mask properties to the platform data
and device tree bindings. The read loop dispatches on width using
readb/readw/readl so a configured 8-bit access doesn't trigger a bus
error on hardware that rejects 32-bit reads to that address. The mask
is ANDed with the value before storing.
These are platform properties, not runtime policy -- width depends on
SoC integration, mask reflects which output bits carry entropy.
The alignment check in probe is updated to verify the resource is
aligned to the configured width instead of hardcoding 4-byte alignment.
Signed-off-by: Jad Keskes <inasj268@gmail.com>
---
v2:
- Remove old timeriomem_rng.yaml to avoid dt_binding_check conflict
- Use IS_ALIGNED() instead of modulo for 32-bit PAE safety
.../bindings/rng/timeriomem-rng.yaml | 76 ++++++++++++++++++
.../bindings/rng/timeriomem_rng.yaml | 48 ------------
drivers/char/hw_random/timeriomem-rng.c | 78 +++++++++++++++----
include/linux/timeriomem-rng.h | 12 +++
4 files changed, 153 insertions(+), 61 deletions(-)
create mode 100644 Documentation/devicetree/bindings/rng/timeriomem-rng.yaml
delete mode 100644 Documentation/devicetree/bindings/rng/timeriomem_rng.yaml
diff --git a/Documentation/devicetree/bindings/rng/timeriomem-rng.yaml b/Documentation/devicetree/bindings/rng/timeriomem-rng.yaml
new file mode 100644
index 000000000000..0d8460e9f916
--- /dev/null
+++ b/Documentation/devicetree/bindings/rng/timeriomem-rng.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rng/timeriomem-rng.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Timer IOMEM Hardware Random Number Generator
+
+description: |
+ This binding covers platforms that have a single IO memory address which
+ provides periodic random data. The driver reads from the address at a
+ fixed interval, returning a configurable-width value masked to the desired
+ bits.
+
+maintainers:
+ - Alexander Clouter <alex@digriz.org.uk>
+
+properties:
+ compatible:
+ enum:
+ - timeriomem_rng
+
+ reg:
+ maxItems: 1
+
+ period:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Interval in microseconds between reads. New random data is expected to
+ be available at this rate.
+
+ quality:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ default: 0
+ description:
+ Estimated entropy per 1024 bits of data, in the same scale as the
+ kernel's hwrng core (0-1024).
+
+ width:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ default: 32
+ enum: [8, 16, 32]
+ description:
+ Access width in bits. Determines whether the read is performed as
+ an 8-bit, 16-bit, or 32-bit bus access.
+
+ mask:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ default: 0xFFFFFFFF
+ description:
+ Mask applied to the value read from the register. Bits set to 0 in
+ the mask are cleared in the output data. Default (no mask) passes
+ all bits through.
+
+required:
+ - compatible
+ - reg
+ - period
+
+additionalProperties: false
+
+examples:
+ - |
+ rng@f0001000 {
+ compatible = "timeriomem_rng";
+ reg = <0xf0001000 0x4>;
+ period = <100000>;
+ };
+
+ rng@f0002000 {
+ compatible = "timeriomem_rng";
+ reg = <0xf0002000 0x1>;
+ period = <50000>;
+ width = <8>;
+ mask = <0xFF>;
+ };
diff --git a/Documentation/devicetree/bindings/rng/timeriomem_rng.yaml b/Documentation/devicetree/bindings/rng/timeriomem_rng.yaml
deleted file mode 100644
index 4754174e9849..000000000000
--- a/Documentation/devicetree/bindings/rng/timeriomem_rng.yaml
+++ /dev/null
@@ -1,48 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/rng/timeriomem_rng.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: TimerIO Random Number Generator
-
-maintainers:
- - Krzysztof Kozlowski <krzk@kernel.org>
-
-properties:
- compatible:
- const: timeriomem_rng
-
- period:
- $ref: /schemas/types.yaml#/definitions/uint32
- description: wait time in microseconds to use between samples
-
- quality:
- $ref: /schemas/types.yaml#/definitions/uint32
- default: 0
- description:
- Estimated number of bits of true entropy per 1024 bits read from the rng.
- Defaults to zero which causes the kernel's default quality to be used
- instead. Note that the default quality is usually zero which disables
- using this rng to automatically fill the kernel's entropy pool.
-
- reg:
- maxItems: 1
- description:
- Base address to sample from. Currently 'reg' must be at least four bytes
- wide and 32-bit aligned.
-
-required:
- - compatible
- - period
- - reg
-
-additionalProperties: false
-
-examples:
- - |
- rng@44 {
- compatible = "timeriomem_rng";
- reg = <0x44 0x04>;
- period = <1000000>;
- };
diff --git a/drivers/char/hw_random/timeriomem-rng.c b/drivers/char/hw_random/timeriomem-rng.c
index e61f06393209..4557326618c9 100644
--- a/drivers/char/hw_random/timeriomem-rng.c
+++ b/drivers/char/hw_random/timeriomem-rng.c
@@ -14,7 +14,9 @@
* has to do is provide the address and 'wait time' that new data becomes
* available.
*
- * TODO: add support for reading sizes other than 32bits and masking
+ * The read width (8, 16, or 32 bits) and an optional data mask can be
+ * configured through platform data or device tree properties. Default is
+ * 32-bit reads with no mask.
*/
#include <linux/completion.h>
@@ -34,6 +36,8 @@ struct timeriomem_rng_private {
void __iomem *io_base;
ktime_t period;
unsigned int present:1;
+ unsigned int width;
+ u32 mask;
struct hrtimer timer;
struct completion completion;
@@ -48,6 +52,7 @@ static int timeriomem_rng_read(struct hwrng *hwrng, void *data,
container_of(hwrng, struct timeriomem_rng_private, rng_ops);
int retval = 0;
int period_us = ktime_to_us(priv->period);
+ int chunk = priv->width / 8;
/*
* There may not have been enough time for new data to be generated
@@ -71,11 +76,28 @@ static int timeriomem_rng_read(struct hwrng *hwrng, void *data,
usleep_range(period_us,
period_us + max(1, period_us / 100));
- *(u32 *)data = readl(priv->io_base);
- retval += sizeof(u32);
- data += sizeof(u32);
- max -= sizeof(u32);
- } while (wait && max > sizeof(u32));
+ switch (priv->width) {
+ case 8: {
+ u8 val = readb(priv->io_base) & priv->mask;
+ *(u8 *)data = val;
+ break;
+ }
+ case 16: {
+ u16 val = readw(priv->io_base) & priv->mask;
+ *(u16 *)data = val;
+ break;
+ }
+ case 32: {
+ u32 val = readl(priv->io_base) & priv->mask;
+ *(u32 *)data = val;
+ break;
+ }
+ }
+
+ retval += chunk;
+ data += chunk;
+ max -= chunk;
+ } while (wait && max > chunk);
/*
* Block any new callers until the RNG has had time to generate new
@@ -125,11 +147,8 @@ static int timeriomem_rng_probe(struct platform_device *pdev)
if (IS_ERR(priv->io_base))
return PTR_ERR(priv->io_base);
- if (res->start % 4 != 0 || resource_size(res) < 4) {
- dev_err(&pdev->dev,
- "address must be at least four bytes wide and 32-bit aligned\n");
- return -EINVAL;
- }
+ priv->width = 32;
+ priv->mask = 0xFFFFFFFF;
if (pdev->dev.of_node) {
int i;
@@ -145,9 +164,42 @@ static int timeriomem_rng_probe(struct platform_device *pdev)
if (!of_property_read_u32(pdev->dev.of_node,
"quality", &i))
priv->rng_ops.quality = i;
+
+ of_property_read_u32(pdev->dev.of_node,
+ "width", &priv->width);
+ of_property_read_u32(pdev->dev.of_node,
+ "mask", &priv->mask);
} else {
period = pdata->period;
priv->rng_ops.quality = pdata->quality;
+
+ if (pdata->width_set)
+ priv->width = pdata->width;
+ if (pdata->mask_set)
+ priv->mask = pdata->mask;
+ }
+
+ if (priv->width == 0)
+ priv->width = 32;
+
+ switch (priv->width) {
+ case 8:
+ case 16:
+ case 32:
+ break;
+ default:
+ dev_err(&pdev->dev, "invalid width %u, must be 8, 16, or 32\n",
+ priv->width);
+ return -EINVAL;
+ }
+
+ if (!IS_ALIGNED(res->start, priv->width / 8) ||
+ resource_size(res) < priv->width / 8) {
+ dev_err(&pdev->dev,
+ "address must be at least %u-bit aligned (%u byte%s)\n",
+ priv->width, priv->width / 8,
+ priv->width / 8 > 1 ? "s" : "");
+ return -EINVAL;
}
priv->period = us_to_ktime(period);
@@ -167,8 +219,8 @@ static int timeriomem_rng_probe(struct platform_device *pdev)
return err;
}
- dev_info(&pdev->dev, "32bits from 0x%p @ %dus\n",
- priv->io_base, period);
+ dev_info(&pdev->dev, "%ubit from %p @ %dus\n",
+ priv->width, priv->io_base, period);
return 0;
}
diff --git a/include/linux/timeriomem-rng.h b/include/linux/timeriomem-rng.h
index 672df7fbf6c1..b4202ad2f507 100644
--- a/include/linux/timeriomem-rng.h
+++ b/include/linux/timeriomem-rng.h
@@ -16,6 +16,18 @@ struct timeriomem_rng_data {
/* bits of entropy per 1024 bits read */
unsigned int quality;
+
+ /* read width (8, 16, or 32), 0 means 32 */
+ unsigned int width;
+
+ /* set to true if width is explicitly provided */
+ bool width_set;
+
+ /* mask applied to raw read value */
+ u32 mask;
+
+ /* set to true if mask is explicitly provided */
+ bool mask_set;
};
#endif /* _LINUX_TIMERIOMEM_RNG_H */
--
2.54.0
^ permalink raw reply related
* Re: [PATCH 3/3] backlight: lp8864: Convert from LED to backlight class driver
From: Andrew Davis @ 2026-06-15 19:51 UTC (permalink / raw)
To: A. Sverdlin, linux-leds
Cc: Lee Jones, Daniel Thompson, Jingoo Han, Pavel Machek, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Helge Deller, dri-devel,
devicetree, linux-kernel, linux-fbdev
In-Reply-To: <20260615120353.3409035-4-alexander.sverdlin@siemens.com>
On 6/15/26 7:03 AM, A. Sverdlin wrote:
> From: Alexander Sverdlin <alexander.sverdlin@siemens.com>
>
> Move the TI LP8864/LP8866 driver from drivers/leds/ to
> drivers/video/backlight/
Why move it? You can register a backlight device from any directory.
> and convert it to register a backlight class
> device as its primary interface.
>
What do you mean by "primary"? You should be able to register with
both frameworks and have the driver interop between as needed.
> The motivation is a use case on a hot-pluggable segment of an I2C bus.
> The generic led-backlight driver (drivers/video/backlight/led_bl.c) is a
> platform driver and as such inherently non-hotpluggable.
That isn't strictly true, there is platform_device_{del,unregister}(), so
whatever your mechanism for removing the I2C device would be, the same
could be done to the led_bl device before then removing the I2C device.
We don't want to have to move every LED driver that could possibly
be used as a backlight to the backlight framework, the led_bl.c
handles adapting LED->backlight as needed. So what you really need
here is to de-couple led_bl.c from DT so it can better handle dynamic
add/remove. Then this LED driver simply could register a "led-backlight"
platform driver to handle the backlight interface, and remove the
backlight device when it itself (the LED device) is removed.
Andrew
It cannot react
> to dynamic appearance/disappearance of the underlying I2C device. By
> making the LP8864 driver directly register a backlight class device, it
> becomes a native I2C driver that properly supports hot-plug/unplug
> events on the I2C bus.
>
> Key changes:
> - Register a backlight class device using
> devm_backlight_device_register() as the primary interface
> - Implement backlight_ops (update_status, get_brightness)
> - The hardware 16-bit brightness register (0x0000-0xFFFF) is directly
> exposed as the backlight brightness range
> - Support DT properties "default-brightness" and "max-brightness"
> from the backlight common binding
> - Include BL_CORE_SUSPENDRESUME for proper power management integration
> - Preserve backward-compatible LED class device registration: if the
> "led" child node is present in the DT, an LED class device is also
> registered (same as the original driver behavior)
> - Preserve the CONFIG_LEDS_LP8864 Kconfig symbol name so that existing
> kernel configurations are not affected
> - Update MAINTAINERS to reflect the new file location
>
> This will be noticeable for applications which already used the LP8864
> as a backend for the generic led-backlight platform driver, as a
> backlight device will now appear directly in addition to the LED class
> device. However, no in-tree device-trees reference this driver, so
> there is no mainline impact.
>
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
> ---
> MAINTAINERS | 2 +-
> drivers/leds/Kconfig | 12 --
> drivers/leds/Makefile | 1 -
> drivers/video/backlight/Kconfig | 15 +++
> drivers/video/backlight/Makefile | 1 +
> .../backlight/lp8864_bl.c} | 111 ++++++++++++++----
> 6 files changed, 106 insertions(+), 36 deletions(-)
> rename drivers/{leds/leds-lp8864.c => video/backlight/lp8864_bl.c} (70%)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index dbd4552236e64..250e8b1ed4bb5 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -26481,7 +26481,7 @@ M: Alexander Sverdlin <alexander.sverdlin@siemens.com>
> L: linux-leds@vger.kernel.org
> S: Maintained
> F: Documentation/devicetree/bindings/leds/backlight/ti,lp8864.yaml
> -F: drivers/leds/leds-lp8864.c
> +F: drivers/video/backlight/lp8864_bl.c
>
> TEXAS INSTRUMENTS' SYSTEM CONTROL INTERFACE (TISCI) PROTOCOL DRIVER
> M: Nishanth Menon <nm@ti.com>
> diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
> index f4a0a3c8c8705..990cb9ef18c1e 100644
> --- a/drivers/leds/Kconfig
> +++ b/drivers/leds/Kconfig
> @@ -529,18 +529,6 @@ config LEDS_LP8860
> on the LP8860 4 channel LED driver using the I2C communication
> bus.
>
> -config LEDS_LP8864
> - tristate "LED support for the TI LP8864/LP8866 4/6 channel LED drivers"
> - depends on LEDS_CLASS && I2C && OF
> - select REGMAP_I2C
> - help
> - If you say yes here you get support for the TI LP8864-Q1,
> - LP8864S-Q1, LP8866-Q1, LP8866S-Q1 4/6 channel LED backlight
> - drivers with I2C interface.
> -
> - To compile this driver as a module, choose M here: the
> - module will be called leds-lp8864.
> -
> config LEDS_CLEVO_MAIL
> tristate "Mail LED on Clevo notebook"
> depends on LEDS_CLASS && BROKEN
> diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
> index 8fdb45d5b4393..5e624a48aa2a5 100644
> --- a/drivers/leds/Makefile
> +++ b/drivers/leds/Makefile
> @@ -59,7 +59,6 @@ obj-$(CONFIG_LEDS_LP55XX_COMMON) += leds-lp55xx-common.o
> obj-$(CONFIG_LEDS_LP8501) += leds-lp8501.o
> obj-$(CONFIG_LEDS_LP8788) += leds-lp8788.o
> obj-$(CONFIG_LEDS_LP8860) += leds-lp8860.o
> -obj-$(CONFIG_LEDS_LP8864) += leds-lp8864.o
> obj-$(CONFIG_LEDS_LT3593) += leds-lt3593.o
> obj-$(CONFIG_LEDS_MAX5970) += leds-max5970.o
> obj-$(CONFIG_LEDS_MAX77650) += leds-max77650.o
> diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
> index a7a3fbaf7c29e..82ecd7e46236d 100644
> --- a/drivers/video/backlight/Kconfig
> +++ b/drivers/video/backlight/Kconfig
> @@ -514,6 +514,21 @@ config BACKLIGHT_LED
> If you have a LCD backlight adjustable by LED class driver, say Y
> to enable this driver.
>
> +config LEDS_LP8864
> + tristate "Backlight driver for TI LP8864/LP8866 4/6 channel LED drivers"
> + depends on I2C && OF
> + select REGMAP_I2C
> + select NEW_LEDS
> + select LEDS_CLASS
> + help
> + If you say yes here you get support for the TI LP8864-Q1,
> + LP8864S-Q1, LP8866-Q1, LP8866S-Q1 4/6 channel LED backlight
> + drivers with I2C interface. The driver registers a backlight
> + class device and optionally an LED class device.
> +
> + To compile this driver as a module, choose M here: the
> + module will be called lp8864_bl.
> +
> endif # BACKLIGHT_CLASS_DEVICE
>
> endmenu
> diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
> index 794820a98ed49..6a7287d01d81b 100644
> --- a/drivers/video/backlight/Makefile
> +++ b/drivers/video/backlight/Makefile
> @@ -62,3 +62,4 @@ obj-$(CONFIG_BACKLIGHT_WM831X) += wm831x_bl.o
> obj-$(CONFIG_BACKLIGHT_ARCXCNN) += arcxcnn_bl.o
> obj-$(CONFIG_BACKLIGHT_RAVE_SP) += rave-sp-backlight.o
> obj-$(CONFIG_BACKLIGHT_LED) += led_bl.o
> +obj-$(CONFIG_LEDS_LP8864) += lp8864_bl.o
> diff --git a/drivers/leds/leds-lp8864.c b/drivers/video/backlight/lp8864_bl.c
> similarity index 70%
> rename from drivers/leds/leds-lp8864.c
> rename to drivers/video/backlight/lp8864_bl.c
> index d05211b970c94..67b28f7daedd2 100644
> --- a/drivers/leds/leds-lp8864.c
> +++ b/drivers/video/backlight/lp8864_bl.c
> @@ -1,12 +1,13 @@
> // SPDX-License-Identifier: GPL-2.0-only
> /*
> - * TI LP8864/LP8866 4/6 Channel LED Driver
> + * TI LP8864/LP8866 4/6 Channel LED Backlight Driver
> *
> - * Copyright (C) 2024 Siemens AG
> + * Copyright (C) 2024-2026 Siemens AG
> *
> * Based on LP8860 driver by Dan Murphy <dmurphy@ti.com>
> */
>
> +#include <linux/backlight.h>
> #include <linux/gpio/consumer.h>
> #include <linux/i2c.h>
> #include <linux/init.h>
> @@ -27,6 +28,8 @@
> #define LP8864_LED_STATUS 0x12
> #define LP8864_LED_STATUS_WR_MASK GENMASK(14, 9) /* Writeable bits in the LED_STATUS reg */
>
> +#define LP8864_MAX_BRIGHTNESS 0xffff
> +
> /* Textual meaning for status bits, starting from bit 1 */
> static const char *const lp8864_supply_status_msg[] = {
> "Vin under-voltage fault",
> @@ -71,13 +74,15 @@ static const char *const lp8864_led_status_msg[] = {
> /**
> * struct lp8864
> * @client: Pointer to the I2C client
> - * @led_dev: led class device pointer
> + * @led_dev: optional led class device pointer
> + * @bl: backlight device pointer
> * @regmap: Devices register map
> * @led_status_mask: Helps to report LED fault only once
> */
> struct lp8864 {
> struct i2c_client *client;
> - struct led_classdev led_dev;
> + struct led_classdev *led_dev;
> + struct backlight_device *bl;
> struct regmap *regmap;
> u16 led_status_mask;
> };
> @@ -157,28 +162,59 @@ static int lp8864_fault_check(struct lp8864 *priv)
> return ret;
> }
>
> -static int lp8864_brightness_set(struct led_classdev *led_cdev,
> - enum led_brightness brt_val)
> +static int lp8864_brightness_set(struct lp8864 *priv, unsigned int brightness)
> {
> - struct lp8864 *priv = container_of(led_cdev, struct lp8864, led_dev);
> - /* Scale 0..LED_FULL into 16-bit HW brightness */
> - unsigned int val = brt_val * 0xffff / LED_FULL;
> int ret;
>
> ret = lp8864_fault_check(priv);
> if (ret)
> return ret;
>
> - ret = regmap_write(priv->regmap, LP8864_BRT_CONTROL, val);
> + ret = regmap_write(priv->regmap, LP8864_BRT_CONTROL, brightness);
> if (ret)
> dev_err(&priv->client->dev, "Failed to write brightness value\n");
>
> return ret;
> }
>
> -static enum led_brightness lp8864_brightness_get(struct led_classdev *led_cdev)
> +static int lp8864_backlight_update_status(struct backlight_device *bl)
> +{
> + return lp8864_brightness_set(bl_get_data(bl), backlight_get_brightness(bl));
> +}
> +
> +static int lp8864_backlight_get_brightness(struct backlight_device *bl)
> {
> - struct lp8864 *priv = container_of(led_cdev, struct lp8864, led_dev);
> + struct lp8864 *priv = bl_get_data(bl);
> + unsigned int val;
> + int ret;
> +
> + ret = regmap_read(priv->regmap, LP8864_BRT_CONTROL, &val);
> + if (ret) {
> + dev_err(&priv->client->dev, "Failed to read brightness value\n");
> + return ret;
> + }
> +
> + return val;
> +}
> +
> +static const struct backlight_ops lp8864_backlight_ops = {
> + .options = BL_CORE_SUSPENDRESUME,
> + .update_status = lp8864_backlight_update_status,
> + .get_brightness = lp8864_backlight_get_brightness,
> +};
> +
> +static int lp8864_led_brightness_set(struct led_classdev *led_cdev,
> + enum led_brightness brt_val)
> +{
> + struct lp8864 *priv = dev_get_drvdata(led_cdev->dev->parent);
> +
> + /* Scale 0..LED_FULL into 16-bit HW brightness */
> + return lp8864_brightness_set(priv, brt_val * 0xffff / LED_FULL);
> +}
> +
> +static enum led_brightness lp8864_led_brightness_get(struct led_classdev *led_cdev)
> +{
> + struct lp8864 *priv = dev_get_drvdata(led_cdev->dev->parent);
> unsigned int val;
> int ret;
>
> @@ -212,18 +248,15 @@ static int lp8864_probe(struct i2c_client *client)
> struct device_node *np = dev_of_node(&client->dev);
> struct device_node *child_node;
> struct led_init_data init_data = {};
> + struct backlight_device *bl;
> + struct backlight_properties props;
> struct gpio_desc *enable_gpio;
> + u32 val;
>
> priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
> if (!priv)
> return -ENOMEM;
>
> - child_node = of_get_next_available_child(np, NULL);
> - if (!child_node) {
> - dev_err(&client->dev, "No LED function defined\n");
> - return -EINVAL;
> - }
> -
> ret = devm_regulator_get_enable_optional(&client->dev, "vled");
> if (ret && ret != -ENODEV)
> return dev_err_probe(&client->dev, ret, "Failed to enable vled regulator\n");
> @@ -238,8 +271,7 @@ static int lp8864_probe(struct i2c_client *client)
> return ret;
>
> priv->client = client;
> - priv->led_dev.brightness_set_blocking = lp8864_brightness_set;
> - priv->led_dev.brightness_get = lp8864_brightness_get;
> + i2c_set_clientdata(client, priv);
>
> priv->regmap = devm_regmap_init_i2c(client, &lp8864_regmap_config);
> if (IS_ERR(priv->regmap))
> @@ -258,11 +290,46 @@ static int lp8864_probe(struct i2c_client *client)
> if (ret)
> return ret;
>
> + /* Register backlight class device */
> + memset(&props, 0, sizeof(props));
> + props.type = BACKLIGHT_RAW;
> + props.max_brightness = LP8864_MAX_BRIGHTNESS;
> + props.brightness = LP8864_MAX_BRIGHTNESS;
> + props.scale = BACKLIGHT_SCALE_LINEAR;
> +
> + if (!device_property_read_u32(&client->dev, "max-brightness", &val))
> + props.max_brightness = val;
> +
> + if (!device_property_read_u32(&client->dev, "default-brightness", &val))
> + props.brightness = val;
> +
> + bl = devm_backlight_device_register(&client->dev, "lp8864-backlight",
> + &client->dev, priv,
> + &lp8864_backlight_ops, &props);
> + if (IS_ERR(bl))
> + return dev_err_probe(&client->dev, PTR_ERR(bl),
> + "Failed to register backlight device\n");
> +
> + priv->bl = bl;
> + backlight_update_status(bl);
> +
> + /* Register LED class device if "led" child node is present */
> + child_node = of_get_available_child_by_name(np, "led");
> + if (!child_node)
> + return 0;
> +
> + priv->led_dev = devm_kzalloc(&client->dev, sizeof(*priv->led_dev), GFP_KERNEL);
> + if (!priv->led_dev)
> + return -ENOMEM;
> +
> + priv->led_dev->brightness_set_blocking = lp8864_led_brightness_set;
> + priv->led_dev->brightness_get = lp8864_led_brightness_get;
> +
> init_data.fwnode = of_fwnode_handle(child_node);
> init_data.devicename = "lp8864";
> init_data.default_label = ":display_cluster";
>
> - ret = devm_led_classdev_register_ext(&client->dev, &priv->led_dev, &init_data);
> + ret = devm_led_classdev_register_ext(&client->dev, priv->led_dev, &init_data);
> if (ret)
> dev_err(&client->dev, "Failed to register LED device (%pe)\n", ERR_PTR(ret));
>
> @@ -291,6 +358,6 @@ static struct i2c_driver lp8864_driver = {
> };
> module_i2c_driver(lp8864_driver);
>
> -MODULE_DESCRIPTION("Texas Instruments LP8864/LP8866 LED driver");
> +MODULE_DESCRIPTION("Texas Instruments LP8864/LP8866 LED Backlight driver");
> MODULE_AUTHOR("Alexander Sverdlin <alexander.sverdlin@siemens.com>");
> MODULE_LICENSE("GPL");
^ permalink raw reply
* Re: [PATCH v1 1/2] dt-bindings: spi: snps,dw-apb-ssi: Add support for snps,dwc-ssi-2.00a
From: Changhuang Liang @ 2026-06-15 11:15 UTC (permalink / raw)
To: Conor Dooley
Cc: Conor Dooley, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Mark Brown, linux-spi@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
In-Reply-To: <20260615-regretful-unviable-3a6a65f48d9b@wendy>
Hi, Conor
> On Mon, Jun 15, 2026 at 10:49:07AM +0000, Changhuang Liang wrote:
> > Hi, Conor
> >
> > > On Sat, Jun 13, 2026 at 03:38:46AM +0000, Changhuang Liang wrote:
> > > > Hi, Conor
> > > >
> > > > Thanks for the review.
> > > >
> > > > > On Fri, Jun 12, 2026 at 05:58:55AM -0700, Changhuang Liang wrote:
> > > > > > Add a new compatible string "snps,dwc-ssi-2.00a" for the
> > > > > > Synopsys DesignWare SSI controller version 2.00a.
> > > > >
> > > > > Two things. Firstly, driver patch suggests a fallback to 1.01a
> > > > > is possible. Why haven't you added one?
> > > >
> > > > Will support fallback.
> > > >
> > > > > Secondly, I am going to expect that when your starfive user for
> > > > > this appears in my inbox that it has a device-specific
> > > > > compatible, so you may as well add that now.
> > > >
> > > > Our standard SPI control is completely based on the Synopsys
> > > > DesignWare
> > > SSI controller version 2.00a.
> > > > However, for the controller that accesses the flash, a set of
> > > > modifications has been made based on the Synopsys DesignWare SSI
> > > controller version 2.00a, and the driver part also requires specific
> adaptation.
> > > >
> > > > Therefore, on the JHB100 SoC, the initial device tree source I
> > > > have planned
> > > looks like this:
> > > >
> > > > spi0: spi@17f20000 {
> > > > compatible = "snps,dwc-ssi-2.00a";
> > > > reg = <0x0 0x17f20000 0x0 0x10000>; };
> > > >
> > > > sfc0: spi@18000000 {
> > > > compatible = "starfive,jhb100-spi";
> > > > reg = <0x0 0x18000000 0x0 0x10000>; };
> > > >
> > > > Thus, I plan to add a new "starfive,jhb100-spi" compatible string
> > > > for the
> > > controller that accesses the flash.
> > > > For now, I intend to keep these as two separate series.
> > >
> > > No, if you have two integrations of the designware IP with different
> > > programming models on the jhb100 I expect to see two different
> > > soc-specific compatibles used. I don't want to see bare synopsys
> > > compatibles on the platforms I am looking after.
> >
> > Okay, I will change it to the following:
> >
> > spi0: spi@17f20000 {
> > compatible = " starfive,jhb100-spi";
>
> This one is compatible with "snps,dwc-ssi-2.00a" and "snps,dwc-ssi-1.00a", so
> it should probably have those as fallbacks. The latter for sure, the former if
> you know there's some non-discoverable differences between 2.00a and
> 1.00a hardware.
>
'm not sure about the hardware differences between 2.00a and 1.00a at the moment either.
I'll use the following method first:
compatible = "starfive,jhb100-spi", "snps,dwc-ssi-2.00a", "snps,dwc-ssi-1.01a"
> Cheers,
> Conor.
>
> > reg = <0x0 0x17f20000 0x0 0x10000>; };
> >
> > sfc0: spi@18000000 {
> > compatible = "starfive,jhb100-sfc";
> > reg = <0x0 0x18000000 0x0 0x10000>; };
> >
> > Best Regards,
> > Changhuang
> >
Best Regards,
Changhuang
^ permalink raw reply
* Re: [PATCH] hw_random: timeriomem-rng: add configurable read width and data mask
From: sashiko-bot @ 2026-06-15 19:25 UTC (permalink / raw)
To: Jad Keskes; +Cc: robh, conor+dt, devicetree
In-Reply-To: <20260615170922.1132642-1-inasj268@gmail.com>
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
New issues:
- [Medium] The patch introduces a new device tree binding schema file but leaves the old schema intact, causing validation conflicts.
- [Low] Using the modulo operator `%` on a `resource_size_t` variable causes an undefined reference link error on 32-bit platforms.
Pre-existing issues:
- [High] The driver cancels the timer in `remove()` but relies on `devm` cleanup to unregister the hwrng device, creating a teardown race condition that leads to use-after-free or deadlock.
--
commit 57d226c081fc616a1deb344ec82199ee7e9c1059
Author: Jad Keskes <inasj268@gmail.com>
hw_random: timeriomem-rng: add configurable read width and data mask
The TODO for supporting read sizes other than 32 bits and masking has
been sitting in this driver since 2009. Implement it.
> diff --git a/Documentation/devicetree/bindings/rng/timeriomem-rng.yaml b/Documentation/devicetree/bindings/rng/timeriomem-rng.yaml
> new file mode 100644
> index 0000000000000..0d8460e9f9163
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/rng/timeriomem-rng.yaml
> @@ -0,0 +1,76 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/rng/timeriomem-rng.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Timer IOMEM Hardware Random Number Generator
[Severity: Medium]
Will this new device tree binding schema file conflict with the existing
schema?
The patch introduces this new schema but does not appear to replace or remove
the existing timeriomem_rng.yaml file. Since both schemas match the same
compatible = "timeriomem_rng" string and the old schema specifies
additionalProperties: false, any device tree node including the newly added
width or mask properties might pass this new schema but fail the old schema's
validation, which would break dt_binding_check.
> diff --git a/drivers/char/hw_random/timeriomem-rng.c b/drivers/char/hw_random/timeriomem-rng.c
> index e61f063932090..9308988521473 100644
> --- a/drivers/char/hw_random/timeriomem-rng.c
> +++ b/drivers/char/hw_random/timeriomem-rng.c
[ ... ]
> @@ -71,11 +76,28 @@ static int timeriomem_rng_read(struct hwrng *hwrng, void *data,
> usleep_range(period_us,
> period_us + max(1, period_us / 100));
>
> - *(u32 *)data = readl(priv->io_base);
> - retval += sizeof(u32);
> - data += sizeof(u32);
> - max -= sizeof(u32);
> - } while (wait && max > sizeof(u32));
> + switch (priv->width) {
> + case 8: {
> + u8 val = readb(priv->io_base) & priv->mask;
> + *(u8 *)data = val;
> + break;
> + }
> + case 16: {
> + u16 val = readw(priv->io_base) & priv->mask;
> + *(u16 *)data = val;
> + break;
> + }
> + case 32: {
> + u32 val = readl(priv->io_base) & priv->mask;
> + *(u32 *)data = val;
> + break;
> + }
> + }
> +
> + retval += chunk;
> + data += chunk;
> + max -= chunk;
> + } while (wait && max > chunk);
[Severity: High]
This is a pre-existing issue, but does the driver have a teardown race
condition between remove() and devres cleanup?
In timeriomem_rng_remove(), hrtimer_cancel() is explicitly called to stop the
timer. However, because the RNG device was registered with
devm_hwrng_register() during probe, it remains accessible to userspace and the
hwrng core until the devres cleanups run strictly after remove() returns.
If a concurrent read is blocked on wait_for_completion() when the timer is
cancelled, it could hang indefinitely, deadlocking the reader thread and the
subsequent hwrng_unregister() call in devres cleanup.
Alternatively, if a reader completes its wait and unconditionally calls
hrtimer_restart() in timeriomem_rng_read() after the cancellation, the timer
might be re-armed:
drivers/char/hw_random/timeriomem-rng.c:timeriomem_rng_read() {
...
priv->present = 0;
reinit_completion(&priv->completion);
hrtimer_forward_now(&priv->timer, priv->period);
hrtimer_restart(&priv->timer);
...
}
When the devres cleanup later unregisters the RNG and frees the priv
structure, this re-armed timer will eventually fire, potentially dereferencing
a freed pointer.
[ ... ]
> @@ -145,9 +164,42 @@ static int timeriomem_rng_probe(struct platform_device *pdev)
> if (!of_property_read_u32(pdev->dev.of_node,
> "quality", &i))
> priv->rng_ops.quality = i;
> +
> + of_property_read_u32(pdev->dev.of_node,
> + "width", &priv->width);
> + of_property_read_u32(pdev->dev.of_node,
> + "mask", &priv->mask);
> } else {
> period = pdata->period;
> priv->rng_ops.quality = pdata->quality;
> +
> + if (pdata->width_set)
> + priv->width = pdata->width;
> + if (pdata->mask_set)
> + priv->mask = pdata->mask;
> + }
> +
> + if (priv->width == 0)
> + priv->width = 32;
> +
> + switch (priv->width) {
> + case 8:
> + case 16:
> + case 32:
> + break;
> + default:
> + dev_err(&pdev->dev, "invalid width %u, must be 8, 16, or 32\n",
> + priv->width);
> + return -EINVAL;
> + }
> +
> + if (res->start % (priv->width / 8) != 0 ||
> + resource_size(res) < priv->width / 8) {
[Severity: Low]
Does using the modulo operator here cause an undefined reference to __umoddi3
on 32-bit platforms?
The variable res->start is of type resource_size_t, which can be a 64-bit
integer on 32-bit platforms with PAE enabled (CONFIG_PHYS_ADDR_T_64BIT=y).
Since the divisor (priv->width / 8) is a runtime value rather than a
compile-time constant, the compiler might emit a call to __umoddi3 for the
64-bit division, which leads to a linker error on 32-bit architectures.
Could IS_ALIGNED() or div_u64() be used instead?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260615170922.1132642-1-inasj268@gmail.com?part=1
^ permalink raw reply
* Re: [PATCH v3 4/4] phy: qcom: qmp-usbc: Add support for "phy" reset used on Shikra
From: Krishna Kurapati @ 2026-06-15 19:03 UTC (permalink / raw)
To: Xiangxu Yin
Cc: linux-arm-msm, linux-phy, devicetree, linux-kernel,
Pratham Pratap, Neil Armstrong, Vinod Koul, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio,
Johan Hovold, Loic Poulain, Kathiravan Thirumoorthy,
Dmitry Baryshkov, Abel Vesa
In-Reply-To: <d2098b36-c514-44e8-99b9-2213c4d52752@oss.qualcomm.com>
On 5/27/2026 11:57 AM, Xiangxu Yin wrote:
>
> On 5/27/2026 2:44 AM, Pratham Pratap wrote:
>> From: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
>>
>> Shikra uses three resets (dp/ phy/ phy_phy). Add the extra "phy" reset
>> needed for operation of QMP Phy on Shikra.
>>
>> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
>> Signed-off-by: Pratham Pratap <pratham.pratap@oss.qualcomm.com>
>> ---
>> drivers/phy/qualcomm/phy-qcom-qmp-usbc.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c b/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c
>> index c342479a3798..067e7f6e5642 100644
>> --- a/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c
>> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c
>> @@ -513,7 +513,7 @@ static const char * const usb3phy_reset_l[] = {
>> };
>>
>> static const char * const usb3dpphy_reset_l[] = {
>> - "phy_phy", "dp_phy",
>> + "phy_phy", "dp_phy", "phy",
>> };
>>
>
>
> usb3dpphy_reset_l is shared with qcs615_usb3dp_phy_cfg, but I didn't find any optional-reset handling in qmp_usbc_reset_init().
> talos.dtsi only defines two resets for qcom,qcs615-qmp-usb3-dp-phy, so adding "phy" here unconditionally will break probe on QCS615.
> Please create a separate reset list for Shikra instead.
>
>
ACK, will create a new match_data cfg for Shikra instead of reusing the
talos one.
Regards,
Krishna,
>> static const struct regulator_bulk_data qmp_phy_msm8998_vreg_l[] = {
^ permalink raw reply
* Re: [PATCH v3 2/4] dt-bindings: phy: qcom,qcs615-qmp-usb3-dp-phy: Add support for Shikra
From: Krishna Kurapati @ 2026-06-15 19:02 UTC (permalink / raw)
To: Krzysztof Kozlowski, Pratham Pratap
Cc: Neil Armstrong, Vinod Koul, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson, Konrad Dybcio, Xiangxu Yin,
Johan Hovold, Loic Poulain, Kathiravan Thirumoorthy,
Dmitry Baryshkov, Abel Vesa, linux-arm-msm, linux-phy, devicetree,
linux-kernel
In-Reply-To: <20260527-lucky-porcelain-bullfrog-185f1d@quoll>
On 5/27/2026 3:16 PM, Krzysztof Kozlowski wrote:
> On Wed, May 27, 2026 at 12:13:59AM +0530, Pratham Pratap wrote:
>> From: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
>>
>> Declare the USB QMP Phy present on Shikra SoC. On this SoC, although
>> there are DP registers, the required internal pins have been removed
>> and hence DP wouldn't be operational.
>>
>> Shikra needs 3 resets (dp/ phy/ phy_phy) to be asserted and de-asserted
>> as per hardware recommendation. Extend the bindings to accommodate the
>> additional reset.
>>
>> Use QCS615 as a fallback since the software interface is compatible with
>> Shikra.
>>
>> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
>> Signed-off-by: Pratham Pratap <pratham.pratap@oss.qualcomm.com>
>> ---
>> .../bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml | 13 ++++++++++---
>> 1 file changed, 10 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml
>> index efb465c71c1b..65ae4c6e09db 100644
>> --- a/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml
>> +++ b/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml
>> @@ -16,8 +16,12 @@ description:
>>
>> properties:
>> compatible:
>> - enum:
>> - - qcom,qcs615-qmp-usb3-dp-phy
>> + oneOf:
>> + - items:
>> + - enum:
>> + - qcom,shikra-qmp-usb3-dp-phy
>> + - const: qcom,qcs615-qmp-usb3-dp-phy
>> + - const: qcom,qcs615-qmp-usb3-dp-phy
>>
>> reg:
>> maxItems: 1
>> @@ -33,12 +37,15 @@ properties:
>> - const: pipe
>>
>> resets:
>> - maxItems: 2
>> + minItems: 2
>> + maxItems: 3
>
> So QCS615 has three resets now? This needs to be explained in the commit
> msg. Or fixed with constraints, see writing bindings.
>
Ok, will separate out for Shikra and keep only two for Talos.
>>
>> reset-names:
>> + minItems: 2
>> items:
>> - const: phy_phy
>> - const: dp_phy
>> + - const: phy
>
> Not phy_phy_phy? Joking aside, you already have a phy - "phy_phy" - so
> this is not correct name. I don't know what is the correct name, though.
> Please consult device manual.
>
The resets needed on Shikra are:
GCC_USB3PHY_PHY_PRIM_SP0_BCR
GCC_USB3_DP_PHY_PRIM_BCR
GCC_USB3_PHY_PRIM_SP0_BCR
Hence named the third one as "phy".
Regards,
Krishna,
^ permalink raw reply
* Re: [PATCH v2 1/6] dt-bindings: clock: qcom: gcc-sm8450: Add missing power-domains property
From: sashiko-bot @ 2026-06-15 19:02 UTC (permalink / raw)
To: Neil Armstrong; +Cc: conor+dt, robh, devicetree
In-Reply-To: <20260615-topic-sm8x50-tie-gcc-to-cx-v2-1-6b5752dd4747@linaro.org>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Missing `#include <dt-bindings/power/qcom,rpmhpd.h>` in the DT binding example block leads to `make dt_binding_check` syntax error.
--
commit d4a5f7a86b8e17c69572dda7a1449210ed6871bc
Author: Neil Armstrong <neil.armstrong@linaro.org>
dt-bindings: clock: qcom: gcc-sm8450: Add missing power-domains property
This commit adds the missing power-domains property to the SM8450 GCC clock
binding schema. It declares CX as a power domain of the GCC so that votes on
provided GDSCs can be correctly propagated to CX.
> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml
> index 3169ac05e1d8a..7e3713cfd4985 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml
[ ... ]
> @@ -66,6 +71,7 @@ examples:
> reg = <0x00100000 0x001f4200>;
> clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>;
> clock-names = "bi_tcxo", "sleep_clk";
> + power-domains = <&rpmhpd RPMHPD_CX>;
[Severity: Low]
Does this example need an include for dt-bindings/power/qcom,rpmhpd.h added
to the file so the RPMHPD_CX macro is properly defined?
Without the header, the C preprocessor cannot expand the macro. When the
generated device tree source is passed to dtc during make dt_binding_check,
the unexpanded token will cause a syntax error and break the validation build.
> #clock-cells = <1>;
> #reset-cells = <1>;
> #power-domain-cells = <1>;
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260615-topic-sm8x50-tie-gcc-to-cx-v2-0-6b5752dd4747@linaro.org?part=1
^ permalink raw reply
* [PATCH v4] ASoC: dt-bindings: mtk-btcvsd-snd: Convert to DT Schema
From: Luca Leonardo Scorcia @ 2026-06-15 18:57 UTC (permalink / raw)
To: linux-mediatek
Cc: Luca Leonardo Scorcia, Liam Girdwood, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, linux-sound, devicetree, linux-kernel,
linux-arm-kernel
Convert the mtk-btcvsd-snd.txt DT binding to DT Schema format.
Signed-off-by: Luca Leonardo Scorcia <l.scorcia@gmail.com>
---
Changes in v4:
- Removed minItems, maxItems properties from reg node
- Removed the reg-names property
- Adjusted the example
Changes in v3 [3]:
Sorry about the spam. A second round of dt_binding_check + dtbs_check
led me to additional improvements:
- Use reg-names in place of a non-informative description property
- Simplify the reg property in the example
Changes in v2 [2]:
- Fixed issues from make dt_binding_check
- Set myself as maintainer for the binding
Initial version [1].
[1] https://lore.kernel.org/20260420204514.1640995-1-l.scorcia@gmail.com/
[2] https://lore.kernel.org/20260421154619.227039-1-l.scorcia@gmail.com/
[3] https://lore.kernel.org/linux-mediatek/20260421193858.347258-1-l.scorcia@gmail.com/
.../sound/mediatek,mtk-btcvsd-snd.yaml | 59 +++++++++++++++++++
.../bindings/sound/mtk-btcvsd-snd.txt | 24 --------
2 files changed, 59 insertions(+), 24 deletions(-)
create mode 100644 Documentation/devicetree/bindings/sound/mediatek,mtk-btcvsd-snd.yaml
delete mode 100644 Documentation/devicetree/bindings/sound/mtk-btcvsd-snd.txt
diff --git a/Documentation/devicetree/bindings/sound/mediatek,mtk-btcvsd-snd.yaml b/Documentation/devicetree/bindings/sound/mediatek,mtk-btcvsd-snd.yaml
new file mode 100644
index 000000000000..1b7451655476
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/mediatek,mtk-btcvsd-snd.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/mediatek,mtk-btcvsd-snd.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek ALSA BT SCO CVSD/MSBC
+
+maintainers:
+ - Luca Leonardo Scorcia <l.scorcia@gmail.com>
+
+properties:
+ compatible:
+ const: mediatek,mtk-btcvsd-snd
+
+ reg:
+ items:
+ - description: PKV region
+ - description: SRAM_BANK2 region
+
+ interrupts:
+ items:
+ - description: BT-SCO interrupt
+
+ mediatek,infracfg:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: The phandle of the infracfg controller
+
+ mediatek,offset:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description: Array of register offsets and masks
+ items:
+ - description: infra_misc_offset
+ - description: infra_conn_bt_cvsd_mask
+ - description: cvsd_mcu_read_offset
+ - description: cvsd_mcu_write_offset
+ - description: cvsd_packet_indicator_offset
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - mediatek,infracfg
+ - mediatek,offset
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ mtk-btcvsd-snd@18000000 {
+ compatible = "mediatek,mtk-btcvsd-snd";
+ reg = <0x18000000 0x1000>,
+ <0x18080000 0x8000>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_LOW>;
+ mediatek,infracfg = <&infrasys>;
+ mediatek,offset = <0xf00 0x800 0xfd0 0xfd4 0xfd8>;
+ };
diff --git a/Documentation/devicetree/bindings/sound/mtk-btcvsd-snd.txt b/Documentation/devicetree/bindings/sound/mtk-btcvsd-snd.txt
deleted file mode 100644
index 679e44839b48..000000000000
--- a/Documentation/devicetree/bindings/sound/mtk-btcvsd-snd.txt
+++ /dev/null
@@ -1,24 +0,0 @@
-Mediatek ALSA BT SCO CVSD/MSBC Driver
-
-Required properties:
-- compatible = "mediatek,mtk-btcvsd-snd";
-- reg: register location and size of PKV and SRAM_BANK2
-- interrupts: should contain BTSCO interrupt
-- mediatek,infracfg: the phandles of INFRASYS
-- mediatek,offset: Array contains of register offset and mask
- infra_misc_offset,
- infra_conn_bt_cvsd_mask,
- cvsd_mcu_read_offset,
- cvsd_mcu_write_offset,
- cvsd_packet_indicator_offset
-
-Example:
-
- mtk-btcvsd-snd@18000000 {
- compatible = "mediatek,mtk-btcvsd-snd";
- reg=<0 0x18000000 0 0x1000>,
- <0 0x18080000 0 0x8000>;
- interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_LOW>;
- mediatek,infracfg = <&infrasys>;
- mediatek,offset = <0xf00 0x800 0xfd0 0xfd4 0xfd8>;
- };
--
2.43.0
^ permalink raw reply related
* Re: [PATCH v11 4/6] dt-bindings: pinctrl: s32g2-siul2: describe GPIO and EIRQ resources
From: Rob Herring (Arm) @ 2026-06-15 18:49 UTC (permalink / raw)
To: Khristine Andreea Barbulescu
Cc: Linus Walleij, Rafael J. Wysocki, Eric Chanudet, Christophe Lizzi,
NXP S32 Linux Team, Larisa Grigore, Vincent Guittot,
Pengutronix Kernel Team, linux-kernel, Alberto Ruiz,
Matthias Brugger, Sascha Hauer, linux-arm-kernel,
Greg Kroah-Hartman, Fabio Estevam, Krzysztof Kozlowski,
Ghennadi Procopciuc, Dong Aisheng, Chester Lin, imx, Lee Jones,
linux-gpio, Enric Balletbo, Shawn Guo, Bartosz Golaszewski,
devicetree, Conor Dooley, Jacky Bai, Srinivas Kandagatla
In-Reply-To: <20260610132116.1998140-5-khristineandreea.barbulescu@oss.nxp.com>
On Wed, 10 Jun 2026 15:21:14 +0200, Khristine Andreea Barbulescu wrote:
> Extend the S32G2 SIUL2 pinctrl binding to describe the GPIO data and
> external interrupt resources present in the same SIUL2 hardware block.
>
> Besides the MSCR and IMCR registers used for pin multiplexing and pad
> configuration, SIUL2 also contains PGPDO and PGPDI registers
> for GPIO data and EIRQ registers for external interrupt control.
>
> Add GPIO controller properties because the SIUL2 block also provides
> GPIO functionality, and gpio-ranges are needed to describe the
> mapping between GPIO lines and pin controller pins.
>
> Document the interrupt controller properties. The SIUL2 block
> contains EIRQ hardware as part of the same register space. IRQ support
> itself will be added in a follow-up patch series.
>
> Update the example accordingly to show the complete SIUL2 register
> layout, including the GPIO data and EIRQ register windows.
>
> Signed-off-by: Khristine Andreea Barbulescu <khristineandreea.barbulescu@oss.nxp.com>
> ---
> .../pinctrl/nxp,s32g2-siul2-pinctrl.yaml | 90 +++++++++++++++++--
> 1 file changed, 84 insertions(+), 6 deletions(-)
>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply
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