[RFC PATCH 0/3] power: sequencing: qcom-wcn: support SW_CTRL wake IRQ

[RFC PATCH 0/3] power: sequencing: qcom-wcn: support SW_CTRL wake IRQ

[Linghui Wu]

Some WCN3990-family designs connect the SW_CTRL output to a GPIO on the
application processor. On Shikra, the WCN3988 SW_CTRL signal is connected
to GPIO88 and is used through the MGPI/AOSS hardware path to request the
required RF clocks.

Qualcomm downstream kernels configure this path through
msm_gpio_mpm_wake_set(), but upstream does not provide an equivalent API.
This series models SW_CTRL as a dedicated wake IRQ. Requesting the GPIO IRQ
resource enables POWER_SAVE_WAKEUP_ENABLE in Qualcomm TLMM when
WAKEUP_PRESENT is advertised, while the PM core keeps the IRQ disabled
during normal operation and arms it for system suspend.

This is an RFC because the intended hardware and software model still
needs confirmation. In particular, please advise whether SW_CTRL should
be represented as an AP wake source using dev_pm_set_dedicated_wake_irq(),
or whether Linux only needs an interface to explicitly configure the
TLMM/MGPI power-save path.

The series documents the named wakeup interrupt for the WCN PMU binding,
implements dedicated wake IRQ handling in the Qualcomm WCN power
sequencer, and enables it on the Shikra CQM, CQS and IQS EVKs. On this
base, CQM and CQS share shikra-cqm-som.dtsi, while IQS uses
shikra-iqs-som.dtsi.

Testing:
- scripts/checkpatch.pl --strict: passed
- dt-binding-check: passed
- dtb-check: passed
- sparse-check: passed
- Shikra CQM, CQS and IQS DTB builds: passed
- QIPL validation of the equivalent qcom-6.18.y implementation: passed

An earlier experiment confirmed that requesting GPIO88 as an IRQ changes
TLMM_GPIO_INTR_CFG88 from 0x942 to 0x9c2, setting
POWER_SAVE_WAKEUP_ENABLE.

Linghui Wu (3):
  dt-bindings: power: sequencing: qcom-wcn: document wakeup-source
  power: sequencing: qcom-wcn: support SW_CTRL wake IRQ
  arm64: dts: qcom: shikra: enable WCN SW_CTRL wakeup

 .../bindings/regulator/qcom,wcn3990-pmu.yaml  | 22 ++++++++++++++
 arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi  |  4 +++
 arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi  |  4 +++
 drivers/power/sequencing/pwrseq-qcom-wcn.c    | 30 +++++++++++++++++++
 4 files changed, 60 insertions(+)


base-commit: a90ee4305c4a5df72c11b31dacfdc76e00fcf78a
-- 
2.43.0

[RFC PATCH 1/3] dt-bindings: power: sequencing: qcom-wcn: document wakeup-source

[Linghui Wu]

Some WCN3990-family designs connect SW_CTRL to an interrupt capable of
waking the application processor.

Document the dedicated "wakeup" interrupt and wakeup-source property for
the WCN PMU node.

Signed-off-by: Linghui Wu <linghui.wu@oss.qualcomm.com>
---
 .../bindings/regulator/qcom,wcn3990-pmu.yaml  | 22 +++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml b/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml
index 9a7abc878b8..00cd8b6c27d 100644
--- a/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml
+++ b/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml
@@ -42,6 +42,20 @@ properties:
     maxItems: 1
     description: GPIO line indicating the state of the clock supply to the BT module
 
+  interrupts:
+    maxItems: 1
+    description: SW_CTRL wake interrupt, asserted when the WCN chip is active
+
+  interrupt-names:
+    const: wakeup
+
+  wakeup-source:
+    type: boolean
+    description:
+      Mark the PMU as a wakeup source. Requires the "wakeup" interrupt to be
+      present. When set, the SW_CTRL IRQ is used to wake the application
+      processor from system suspend.
+
   clocks:
     maxItems: 1
     description: Reference clock handle
@@ -67,6 +81,14 @@ required:
   - vddrf-supply
   - vddch0-supply
 
+dependencies:
+  wakeup-source:
+    required:
+      - interrupt-names
+    anyOf:
+      - required: [interrupts]
+      - required: [interrupts-extended]
+
 additionalProperties: false
 
 examples:
-- 
2.43.0

[RFC PATCH 2/3] power: sequencing: qcom-wcn: support SW_CTRL wake IRQ

[Linghui Wu]

Some WCN3990-family designs route SW_CTRL to an interrupt capable of
waking the application processor. Requesting the IRQ resource also enables
the Qualcomm TLMM power-save wakeup path when WAKEUP_PRESENT is advertised.

When the PMU is marked as a wakeup source, retrieve the dedicated "wakeup"
interrupt and register it as a dedicated wake IRQ. Keep it disabled during
normal operation and let the PM core arm it for system suspend.

Signed-off-by: Linghui Wu <linghui.wu@oss.qualcomm.com>
---
 drivers/power/sequencing/pwrseq-qcom-wcn.c | 30 ++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/drivers/power/sequencing/pwrseq-qcom-wcn.c b/drivers/power/sequencing/pwrseq-qcom-wcn.c
index d41793e1fcd..e052187ffb9 100644
--- a/drivers/power/sequencing/pwrseq-qcom-wcn.c
+++ b/drivers/power/sequencing/pwrseq-qcom-wcn.c
@@ -11,6 +11,8 @@
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/platform_device.h>
+#include <linux/pm_wakeirq.h>
+#include <linux/pm_wakeup.h>
 #include <linux/property.h>
 #include <linux/regulator/consumer.h>
 #include <linux/pwrseq/provider.h>
@@ -454,11 +456,17 @@ static int pwrseq_qcom_wcn3990_match(struct pwrseq_device *pwrseq,
 	return pwrseq_qcom_wcn_match_regulator(pwrseq, dev, "vdd-1.8-xo-supply");
 }
 
+static void pwrseq_qcom_wcn_clear_wake_irq(void *data)
+{
+	dev_pm_clear_wake_irq(data);
+}
+
 static int pwrseq_qcom_wcn_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct pwrseq_qcom_wcn_ctx *ctx;
 	struct pwrseq_config config;
+	int wake_irq;
 	int i, ret;
 
 	ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
@@ -496,6 +504,28 @@ static int pwrseq_qcom_wcn_probe(struct platform_device *pdev)
 		return dev_err_probe(dev, PTR_ERR(ctx->bt_gpio),
 				     "Failed to get the Bluetooth enable GPIO\n");
 
+	if (device_property_read_bool(dev, "wakeup-source")) {
+		wake_irq = platform_get_irq_byname(pdev, "wakeup");
+		if (wake_irq < 0)
+			return dev_err_probe(dev, wake_irq,
+					     "Failed to get the SW_CTRL wake IRQ\n");
+
+		ret = devm_device_init_wakeup(dev);
+		if (ret)
+			return dev_err_probe(dev, ret,
+					     "Failed to enable wakeup\n");
+
+		ret = dev_pm_set_dedicated_wake_irq(dev, wake_irq);
+		if (ret)
+			return dev_err_probe(dev, ret,
+					     "Failed to set the SW_CTRL wake IRQ\n");
+
+		ret = devm_add_action_or_reset(dev,
+					       pwrseq_qcom_wcn_clear_wake_irq, dev);
+		if (ret)
+			return ret;
+	}
+
 	/*
 	 * FIXME: This should actually be GPIOD_OUT_LOW, but doing so would
 	 * cause the WLAN power to be toggled, resulting in PCIe link down.
-- 
2.43.0

[RFC PATCH 3/3] arm64: dts: qcom: shikra: enable WCN SW_CTRL wakeup

[Linghui Wu]

Configure the WCN power sequencer SW_CTRL signal as a named wake IRQ and
mark it as a wakeup source. The CQM SOM DTSI is shared by the CQM and CQS
EVKs, while the IQS EVK uses the IQS SOM DTSI.

Signed-off-by: Linghui Wu <linghui.wu@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi | 4 ++++
 arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi b/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
index 8ac42ff625a..c08fe15a91c 100644
--- a/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
 
 #include "shikra.dtsi"
@@ -39,6 +40,9 @@ wcn3988-pmu {
 		pinctrl-names = "default";
 
 		swctrl-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>;
+		interrupts-extended = <&tlmm 88 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "wakeup";
+		wakeup-source;
 
 		vddio-supply = <&pm4125_l7>;
 		vddxo-supply = <&pm4125_l13>;
diff --git a/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi b/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
index 4ff97945274..e16eeb15a23 100644
--- a/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
 
 #include "shikra.dtsi"
@@ -46,6 +47,9 @@ wcn3988-pmu {
 		pinctrl-names = "default";
 
 		swctrl-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>;
+		interrupts-extended = <&tlmm 88 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "wakeup";
+		wakeup-source;
 
 		vddio-supply = <&pm8150_s4>;
 		vddxo-supply = <&pm8150_l12>;
-- 
2.43.0

Re: [RFC PATCH 3/3] arm64: dts: qcom: shikra: enable WCN SW_CTRL wakeup

[Konrad Dybcio]

On 10/14/26 2:19 PM, Linghui Wu wrote:
> Configure the WCN power sequencer SW_CTRL signal as a named wake IRQ and
> mark it as a wakeup source. The CQM SOM DTSI is shared by the CQM and CQS
> EVKs, while the IQS EVK uses the IQS SOM DTSI.

You already have a reference to that pin. You can do something like
gpiod_to_irq()

Konrad

Re: [RFC PATCH 0/3] power: sequencing: qcom-wcn: support SW_CTRL wake IRQ

[Konrad Dybcio]

On 10/14/26 2:19 PM, Linghui Wu wrote:
> Some WCN3990-family designs connect the SW_CTRL output to a GPIO on the
> application processor. On Shikra, the WCN3988 SW_CTRL signal is connected
> to GPIO88 and is used through the MGPI/AOSS hardware path to request the
> required RF clocks.
> 
> Qualcomm downstream kernels configure this path through
> msm_gpio_mpm_wake_set(), but upstream does not provide an equivalent API.

This information is not useful to the reader who doesn't follow the
Qualcomm downstream kernels.

> This series models SW_CTRL as a dedicated wake IRQ. Requesting the GPIO IRQ
> resource enables POWER_SAVE_WAKEUP_ENABLE in Qualcomm TLMM when
> WAKEUP_PRESENT is advertised, while the PM core keeps the IRQ disabled
> during normal operation and arms it for system suspend.

This starts off good, but zooms in too much on the specifics, instead
of the functional outcome.

> This is an RFC because the intended hardware and software model still
> needs confirmation. In particular, please advise whether SW_CTRL should
> be represented as an AP wake source using dev_pm_set_dedicated_wake_irq(),
> or whether Linux only needs an interface to explicitly configure the
> TLMM/MGPI power-save path.

You threw a lot of Qualcomm TLAs at potentially non-Qualcomm reviewers,
so it's not really possible for them to give you this advice.

> The series documents the named wakeup interrupt for the WCN PMU binding,
> implements dedicated wake IRQ handling in the Qualcomm WCN power
> sequencer, and enables it on the Shikra CQM, CQS and IQS EVKs. On this
> base, CQM and CQS share shikra-cqm-som.dtsi, while IQS uses
> shikra-iqs-som.dtsi.

The second sentence brings no value.

> Testing:
> - scripts/checkpatch.pl --strict: passed
> - dt-binding-check: passed
> - dtb-check: passed
> - sparse-check: passed
> - Shikra CQM, CQS and IQS DTB builds: passed

The above cases are implicitly expected and shouldn't be listed out.
> - QIPL validation of the equivalent qcom-6.18.y implementation: passed

This is a useless test on a year-old kernel with a million patches on top
that doesn't reflect whether the change works on the target tree (which
is approximately linux-next/master). You must test your changes on the
base that you intend the patch to be applied to.

> An earlier experiment confirmed that requesting GPIO88 as an IRQ changes
> TLMM_GPIO_INTR_CFG88 from 0x942 to 0x9c2, setting
> POWER_SAVE_WAKEUP_ENABLE.
> 
> Linghui Wu (3):
>   dt-bindings: power: sequencing: qcom-wcn: document wakeup-source
>   power: sequencing: qcom-wcn: support SW_CTRL wake IRQ
>   arm64: dts: qcom: shikra: enable WCN SW_CTRL wakeup
> 
>  .../bindings/regulator/qcom,wcn3990-pmu.yaml  | 22 ++++++++++++++
>  arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi  |  4 +++
>  arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi  |  4 +++
>  drivers/power/sequencing/pwrseq-qcom-wcn.c    | 30 +++++++++++++++++++
>  4 files changed, 60 insertions(+)
> 
> 
> base-commit: a90ee4305c4a5df72c11b31dacfdc76e00fcf78a

You must base your changes on linux-next, otherwise your base is
effectively 3 months behind the current developments.

Konrad

[RFC PATCH v2 0/3] power: sequencing: qcom-wcn: support SW_CTRL wake IRQ

[Linghui Wu]

Some WCN3990-family devices use the SW_CTRL GPIO to indicate that
resources must remain available while the application processor is
suspended.

Teach the Qualcomm WCN power-sequencing driver to use the existing
SW_CTRL GPIO as a dedicated wake IRQ when the power sequencer is marked
as a wakeup source. The PM core keeps the IRQ disabled during normal
operation and arms it for system suspend.

The series documents wakeup-source for the WCN PMU binding and enables
it for the Shikra CQM, CQS and IQS EVKs.

The series is based on next-20261014 and has only been build tested
because a Shikra setup capable of booting linux-next is not currently
available.

Changes in v2:
- Derive the wake IRQ from the existing SW_CTRL GPIO with gpiod_to_irq().
- Drop the separate interrupt description from the binding and DTS.
- Focus the description on the functional behavior.
- Rebase onto next-20261014.

Linghui Wu (3):
  dt-bindings: power: sequencing: qcom-wcn: document wakeup-source
  power: sequencing: qcom-wcn: support SW_CTRL wake IRQ
  arm64: dts: qcom: shikra: enable WCN SW_CTRL wakeup

 .../bindings/regulator/qcom,wcn3990-pmu.yaml  |  6 ++++
 arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi  |  1 +
 arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi  |  1 +
 drivers/power/sequencing/pwrseq-qcom-wcn.c    | 36 +++++++++++++++++++
 4 files changed, 44 insertions(+)


base-commit: d419d682257d813f6cb7a28e42b35d0edf4ad038
-- 
2.43.0

[RFC PATCH v2 1/3] dt-bindings: power: sequencing: qcom-wcn: document wakeup-source

[Linghui Wu]

The SW_CTRL GPIO can be used as a wake signal on platforms where the WCN
device must wake the application processor.

Document wakeup-source and require the existing swctrl-gpios property
when it is present.

Signed-off-by: Linghui Wu <linghui.wu@oss.qualcomm.com>
---
 .../devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml     | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml b/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml
index 9a7abc878b83..f0372e28c99e 100644
--- a/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml
+++ b/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml
@@ -42,6 +42,8 @@ properties:
     maxItems: 1
     description: GPIO line indicating the state of the clock supply to the BT module
 
+  wakeup-source: true
+
   clocks:
     maxItems: 1
     description: Reference clock handle
@@ -67,6 +69,10 @@ required:
   - vddrf-supply
   - vddch0-supply
 
+dependentRequired:
+  wakeup-source:
+    - swctrl-gpios
+
 additionalProperties: false
 
 examples:
-- 
2.43.0

[RFC PATCH v2 2/3] power: sequencing: qcom-wcn: support SW_CTRL wake IRQ

[Linghui Wu]

Some WCN3990-family devices use SW_CTRL to signal that resources must
remain available while the application processor is suspended.

When the PMU is marked as a wakeup source, request the existing SW_CTRL
GPIO as an input, map it to an IRQ and register it as a dedicated wake
IRQ. The PM core then keeps the IRQ disabled during normal operation and
arms it for system suspend.

Signed-off-by: Linghui Wu <linghui.wu@oss.qualcomm.com>
---
 drivers/power/sequencing/pwrseq-qcom-wcn.c | 36 ++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/drivers/power/sequencing/pwrseq-qcom-wcn.c b/drivers/power/sequencing/pwrseq-qcom-wcn.c
index 636dd7e63891..69b7eb565996 100644
--- a/drivers/power/sequencing/pwrseq-qcom-wcn.c
+++ b/drivers/power/sequencing/pwrseq-qcom-wcn.c
@@ -11,6 +11,8 @@
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/platform_device.h>
+#include <linux/pm_wakeirq.h>
+#include <linux/pm_wakeup.h>
 #include <linux/property.h>
 #include <linux/regulator/consumer.h>
 #include <linux/pwrseq/provider.h>
@@ -484,11 +486,18 @@ static int pwrseq_qcom_wcn3990_match(struct pwrseq_device *pwrseq,
 	return pwrseq_qcom_wcn_match_regulator(pwrseq, dev, "vdd-1.8-xo-supply");
 }
 
+static void pwrseq_qcom_wcn_clear_wake_irq(void *data)
+{
+	dev_pm_clear_wake_irq(data);
+}
+
 static int pwrseq_qcom_wcn_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct pwrseq_qcom_wcn_ctx *ctx;
+	struct gpio_desc *swctrl_gpio;
 	struct pwrseq_config config;
+	int wake_irq;
 	int i, ret;
 
 	ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
@@ -526,6 +535,33 @@ static int pwrseq_qcom_wcn_probe(struct platform_device *pdev)
 		return dev_err_probe(dev, PTR_ERR(ctx->bt_gpio),
 				     "Failed to get the Bluetooth enable GPIO\n");
 
+	if (device_property_read_bool(dev, "wakeup-source")) {
+		swctrl_gpio = devm_gpiod_get(dev, "swctrl", GPIOD_IN);
+		if (IS_ERR(swctrl_gpio))
+			return dev_err_probe(dev, PTR_ERR(swctrl_gpio),
+					     "Failed to get the SW_CTRL GPIO\n");
+
+		wake_irq = gpiod_to_irq(swctrl_gpio);
+		if (wake_irq < 0)
+			return dev_err_probe(dev, wake_irq,
+					     "Failed to get the SW_CTRL wake IRQ\n");
+
+		ret = devm_device_init_wakeup(dev);
+		if (ret)
+			return dev_err_probe(dev, ret,
+					     "Failed to enable wakeup\n");
+
+		ret = dev_pm_set_dedicated_wake_irq(dev, wake_irq);
+		if (ret)
+			return dev_err_probe(dev, ret,
+					     "Failed to set the SW_CTRL wake IRQ\n");
+
+		ret = devm_add_action_or_reset(dev,
+					       pwrseq_qcom_wcn_clear_wake_irq, dev);
+		if (ret)
+			return ret;
+	}
+
 	ctx->wlan_gpio = devm_gpiod_get_optional(dev, "wlan-enable",
 						 GPIOD_OUT_LOW);
 	if (IS_ERR(ctx->wlan_gpio))
-- 
2.43.0

[RFC PATCH v2 3/3] arm64: dts: qcom: shikra: enable WCN SW_CTRL wakeup

[Linghui Wu]

The WCN3988 SW_CTRL signal can wake the application processor on the
Shikra CQM, CQS and IQS EVKs.

Mark the WCN power sequencer as a wakeup source so the driver uses the
existing SW_CTRL GPIO as a dedicated wake IRQ.

Signed-off-by: Linghui Wu <linghui.wu@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi | 1 +
 arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi b/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
index 95eb7255fb22..c7b894b6126c 100644
--- a/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
@@ -102,6 +102,7 @@ wcn3988-pmu {
 		pinctrl-names = "default";
 
 		swctrl-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>;
+		wakeup-source;
 
 		vddio-supply = <&pm4125_l7>;
 		vddxo-supply = <&pm4125_l13>;
diff --git a/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi b/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
index ebc3052d57a9..5edcabd9dae1 100644
--- a/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
@@ -85,6 +85,7 @@ wcn3988-pmu {
 		pinctrl-names = "default";
 
 		swctrl-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>;
+		wakeup-source;
 
 		vddio-supply = <&pm8150_s4>;
 		vddxo-supply = <&pm8150_l12>;
-- 
2.43.0

Re: [RFC PATCH v2 0/3] power: sequencing: qcom-wcn: support SW_CTRL wake IRQ

[Konrad Dybcio]

On 10/15/26 6:12 AM, Linghui Wu wrote:
> Some WCN3990-family devices use the SW_CTRL GPIO to indicate that
> resources must remain available while the application processor is
> suspended.
> 
> Teach the Qualcomm WCN power-sequencing driver to use the existing
> SW_CTRL GPIO as a dedicated wake IRQ when the power sequencer is marked
> as a wakeup source. The PM core keeps the IRQ disabled during normal
> operation and arms it for system suspend.
> 
> The series documents wakeup-source for the WCN PMU binding and enables
> it for the Shikra CQM, CQS and IQS EVKs.
> 
> The series is based on next-20261014 and has only been build tested
> because a Shikra setup capable of booting linux-next is not currently
> available.

$ git log --oneline arch/arm64/boot/dts/qcom/*shikra* | wc -l
41

$ ls arch/arm64/boot/dts/qcom/*shikra*.dts* -l | wc -l
9

Why are we carrying all of this code then?

Konrad

Re: [RFC PATCH v2 1/3] dt-bindings: power: sequencing: qcom-wcn: document wakeup-source

[Konrad Dybcio]

On 10/15/26 6:12 AM, Linghui Wu wrote:
> The SW_CTRL GPIO can be used as a wake signal on platforms where the WCN
> device must wake the application processor.

"must"?

> 
> Document wakeup-source and require the existing swctrl-gpios property
> when it is present.

It's a little strange that the property lands on the power sequencer
and not on the WLAN node itself - although presumably it makes some
sense given the latter may be dynamically discovered in the general
case

Konrad

Re: [RFC PATCH 1/3] dt-bindings: power: sequencing: qcom-wcn: document wakeup-source

[Bartosz Golaszewski]

On Wed, 14 Oct 2026 14:19:08 +0200, Linghui Wu
<linghui.wu@oss.qualcomm.com> said:
> Some WCN3990-family designs connect SW_CTRL to an interrupt capable of
> waking the application processor.
>
> Document the dedicated "wakeup" interrupt and wakeup-source property for
> the WCN PMU node.
>
> Signed-off-by: Linghui Wu <linghui.wu@oss.qualcomm.com>
> ---

The commit subject should say: "dt-bindings: regulator: ...". There's no such
thing as power sequencing as far as DT bindings are concerned.

Bart

[PATCH v3 0/3] power: sequencing: qcom-wcn: support SW_CTRL wake IRQ

[Linghui Wu]

Some WCN3990-family devices use the SW_CTRL GPIO to indicate that
resources need to remain available while the application processor is
suspended.

Teach the Qualcomm WCN power-sequencing driver to use the existing
SW_CTRL GPIO as a dedicated wake IRQ when the power sequencer is marked
as a wakeup source. The PM core keeps the IRQ disabled during normal
operation and arms it for system suspend.

The series documents wakeup-source for the WCN PMU binding and enables
it for the Shikra CQM, CQS and IQS EVKs.

The series has been runtime-tested on qcom-next and kernel 6.18.y on
Shikra hardware.

Changes in v2:
- Derive the wake IRQ from the existing SW_CTRL GPIO with gpiod_to_irq().
- Drop the separate interrupt description from the binding and DTS.
- Focus the description on the functional behavior.
- Rebase onto next-20261014.

Changes in v3:
- Use the "dt-bindings: regulator:" prefix for the binding patch.
- Drop the RFC marker.
- Replace the "must" wording in the wake behavior description.
- Report runtime validation on qcom-next and kernel 6.18.y.

Linghui Wu (3):
  dt-bindings: regulator: qcom,wcn3990-pmu: document wakeup-source
  power: sequencing: qcom-wcn: support SW_CTRL wake IRQ
  arm64: dts: qcom: shikra: enable WCN SW_CTRL wakeup

 .../bindings/regulator/qcom,wcn3990-pmu.yaml  |  6 ++++
 arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi  |  1 +
 arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi  |  1 +
 drivers/power/sequencing/pwrseq-qcom-wcn.c    | 36 +++++++++++++++++++
 4 files changed, 44 insertions(+)


base-commit: d419d682257d813f6cb7a28e42b35d0edf4ad038
-- 
2.43.0

[PATCH v3 1/3] dt-bindings: regulator: qcom,wcn3990-pmu: document

[Linghui Wu]

The SW_CTRL GPIO can be used as a wake signal on platforms where the WCN
device needs to wake the application processor.

Document wakeup-source and require the existing swctrl-gpios property
when wakeup-source is present.

Signed-off-by: Linghui Wu <linghui.wu@oss.qualcomm.com>
---
 .../devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml     | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml b/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml
index 9a7abc878b83..f0372e28c99e 100644
--- a/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml
+++ b/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml
@@ -42,6 +42,8 @@ properties:
     maxItems: 1
     description: GPIO line indicating the state of the clock supply to the BT module
 
+  wakeup-source: true
+
   clocks:
     maxItems: 1
     description: Reference clock handle
@@ -67,6 +69,10 @@ required:
   - vddrf-supply
   - vddch0-supply
 
+dependentRequired:
+  wakeup-source:
+    - swctrl-gpios
+
 additionalProperties: false
 
 examples:
-- 
2.43.0

[PATCH v3 2/3] power: sequencing: qcom-wcn: support SW_CTRL wake

[Linghui Wu]

Some WCN3990-family devices use SW_CTRL to signal that resources need
remain available while the application processor is suspended.

When the PMU is marked as a wakeup source, request the existing SW_CTRL
GPIO as an input, map it to an IRQ and register it as a dedicated wake
IRQ. The PM core then keeps the IRQ disabled during normal operation and
arms it for system suspend.

Signed-off-by: Linghui Wu <linghui.wu@oss.qualcomm.com>
---
 drivers/power/sequencing/pwrseq-qcom-wcn.c | 36 ++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/drivers/power/sequencing/pwrseq-qcom-wcn.c b/drivers/power/sequencing/pwrseq-qcom-wcn.c
index 636dd7e63891..69b7eb565996 100644
--- a/drivers/power/sequencing/pwrseq-qcom-wcn.c
+++ b/drivers/power/sequencing/pwrseq-qcom-wcn.c
@@ -11,6 +11,8 @@
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/platform_device.h>
+#include <linux/pm_wakeirq.h>
+#include <linux/pm_wakeup.h>
 #include <linux/property.h>
 #include <linux/regulator/consumer.h>
 #include <linux/pwrseq/provider.h>
@@ -484,11 +486,18 @@ static int pwrseq_qcom_wcn3990_match(struct pwrseq_device *pwrseq,
 	return pwrseq_qcom_wcn_match_regulator(pwrseq, dev, "vdd-1.8-xo-supply");
 }
 
+static void pwrseq_qcom_wcn_clear_wake_irq(void *data)
+{
+	dev_pm_clear_wake_irq(data);
+}
+
 static int pwrseq_qcom_wcn_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct pwrseq_qcom_wcn_ctx *ctx;
+	struct gpio_desc *swctrl_gpio;
 	struct pwrseq_config config;
+	int wake_irq;
 	int i, ret;
 
 	ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
@@ -526,6 +535,33 @@ static int pwrseq_qcom_wcn_probe(struct platform_device *pdev)
 		return dev_err_probe(dev, PTR_ERR(ctx->bt_gpio),
 				     "Failed to get the Bluetooth enable GPIO\n");
 
+	if (device_property_read_bool(dev, "wakeup-source")) {
+		swctrl_gpio = devm_gpiod_get(dev, "swctrl", GPIOD_IN);
+		if (IS_ERR(swctrl_gpio))
+			return dev_err_probe(dev, PTR_ERR(swctrl_gpio),
+					     "Failed to get the SW_CTRL GPIO\n");
+
+		wake_irq = gpiod_to_irq(swctrl_gpio);
+		if (wake_irq < 0)
+			return dev_err_probe(dev, wake_irq,
+					     "Failed to get the SW_CTRL wake IRQ\n");
+
+		ret = devm_device_init_wakeup(dev);
+		if (ret)
+			return dev_err_probe(dev, ret,
+					     "Failed to enable wakeup\n");
+
+		ret = dev_pm_set_dedicated_wake_irq(dev, wake_irq);
+		if (ret)
+			return dev_err_probe(dev, ret,
+					     "Failed to set the SW_CTRL wake IRQ\n");
+
+		ret = devm_add_action_or_reset(dev,
+					       pwrseq_qcom_wcn_clear_wake_irq, dev);
+		if (ret)
+			return ret;
+	}
+
 	ctx->wlan_gpio = devm_gpiod_get_optional(dev, "wlan-enable",
 						 GPIOD_OUT_LOW);
 	if (IS_ERR(ctx->wlan_gpio))
-- 
2.43.0

[PATCH v3 3/3] arm64: dts: qcom: shikra: enable WCN SW_CTRL

[Linghui Wu]

The WCN3988 SW_CTRL signal can wake the application processor on the
Shikra CQM, CQS and IQS EVKs.

Mark the WCN power sequencer as a wakeup source so the driver uses the
existing SW_CTRL GPIO as a dedicated wake IRQ.

Signed-off-by: Linghui Wu <linghui.wu@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi | 1 +
 arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi b/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
index 95eb7255fb22..c7b894b6126c 100644
--- a/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
@@ -102,6 +102,7 @@ wcn3988-pmu {
 		pinctrl-names = "default";
 
 		swctrl-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>;
+		wakeup-source;
 
 		vddio-supply = <&pm4125_l7>;
 		vddxo-supply = <&pm4125_l13>;
diff --git a/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi b/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
index ebc3052d57a9..5edcabd9dae1 100644
--- a/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
@@ -85,6 +85,7 @@ wcn3988-pmu {
 		pinctrl-names = "default";
 
 		swctrl-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>;
+		wakeup-source;
 
 		vddio-supply = <&pm8150_s4>;
 		vddxo-supply = <&pm8150_l12>;
-- 
2.43.0

Re: [PATCH v3 2/3] power: sequencing: qcom-wcn: support SW_CTRL wake

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] power: sequencing: missing wake IRQ trigger type in pwrseq_qcom_wcn_probe()
--

commit 67f02e162090cebd2a43e112d0d0073d05afbfee
Author: Linghui Wu <linghui.wu@oss.qualcomm.com>

power: sequencing: qcom-wcn: support SW_CTRL wake

When the WCN PMU is marked with the wakeup-source property, this commit
requests the SW_CTRL GPIO as an input, maps it to an IRQ, and registers
it as a dedicated wake IRQ.

> diff --git a/drivers/power/sequencing/pwrseq-qcom-wcn.c b/drivers/power/sequencing/pwrseq-qcom-wcn.c
> index 636dd7e638917..69b7eb565996e 100644
> --- a/drivers/power/sequencing/pwrseq-qcom-wcn.c
> +++ b/drivers/power/sequencing/pwrseq-qcom-wcn.c

[ ... ]

> @@ -526,6 +535,33 @@ static int pwrseq_qcom_wcn_probe(struct platform_device *pdev)
>  		return dev_err_probe(dev, PTR_ERR(ctx->bt_gpio),
>  				     "Failed to get the Bluetooth enable GPIO\n");
>  
> +	if (device_property_read_bool(dev, "wakeup-source")) {
> +		swctrl_gpio = devm_gpiod_get(dev, "swctrl", GPIOD_IN);
> +		if (IS_ERR(swctrl_gpio))
> +			return dev_err_probe(dev, PTR_ERR(swctrl_gpio),
> +					     "Failed to get the SW_CTRL GPIO\n");
> +
> +		wake_irq = gpiod_to_irq(swctrl_gpio);
> +		if (wake_irq < 0)
> +			return dev_err_probe(dev, wake_irq,
> +					     "Failed to get the SW_CTRL wake IRQ\n");
> +
> +		ret = devm_device_init_wakeup(dev);
> +		if (ret)
> +			return dev_err_probe(dev, ret,
> +					     "Failed to enable wakeup\n");
> +
> +		ret = dev_pm_set_dedicated_wake_irq(dev, wake_irq);

[Severity: High]
Does wake_irq need an IRQ trigger type configured via irq_set_irq_type()
before calling dev_pm_set_dedicated_wake_irq()?

In pwrseq_qcom_wcn_probe(), gpiod_to_irq() maps swctrl_gpio through
gpiochip_to_irq() in drivers/gpio/gpiolib.c with IRQ_TYPE_NONE:

    spec.fwnode = domain->fwnode;
    spec.param_count = 2;
    spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
    spec.param[1] = IRQ_TYPE_NONE;

    return irq_create_fwspec_mapping(&spec);

Then dev_pm_set_dedicated_wake_irq() calls
__dev_pm_set_dedicated_wake_irq() in drivers/base/power/wakeirq.c, which
requests the threaded IRQ without any IRQF_TRIGGER_* flags:

    err = request_threaded_irq(irq, NULL, handle_threaded_wake_irq,
                               IRQF_ONESHOT | IRQF_NO_AUTOEN,
                               wirq->name, wirq);

In __setup_irq() in kernel/irq/manage.c, because both new->flags and
irqd_get_trigger_type() have trigger type 0 (IRQ_TYPE_NONE),
__irq_set_trigger() is never called:

    if (!shared) {
        /* Setup the type (level, edge polarity) if configured: */
        if (new->flags & IRQF_TRIGGER_MASK) {
            ret = __irq_set_trigger(desc,
                                    new->flags & IRQF_TRIGGER_MASK);

            if (ret)
                goto out_unlock;
        }

On Qualcomm TLMM in drivers/pinctrl/qcom/pinctrl-msm.c, msm_gpio_init()
initializes GPIO IRQs with IRQ_TYPE_NONE and handle_bad_irq:

    girq->default_type = IRQ_TYPE_NONE;
    girq->handler = handle_bad_irq;

Without .irq_set_type() being invoked, the hardware trigger registers in
TLMM/PDC/MPM or SPMI PMIC GPIO are not programmed, and the flow handler on
TLMM remains handle_bad_irq when dev_pm_arm_wake_irq() enables wake_irq
during system suspend.

Other callers combining gpiod_to_irq() with
dev_pm_set_dedicated_wake_irq(), such as pci_configure_wake_irq() in
drivers/pci/of.c and stm32_add_pcie_port() in
drivers/pci/controller/dwc/pcie-stm32.c, call irq_set_irq_type() first.

> +		if (ret)
> +			return dev_err_probe(dev, ret,
> +					     "Failed to set the SW_CTRL wake IRQ\n");
> +
> +		ret = devm_add_action_or_reset(dev,
> +					       pwrseq_qcom_wcn_clear_wake_irq, dev);
> +		if (ret)
> +			return ret;
> +	}

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261019093911.3199891-1-linghui.wu@oss.qualcomm.com?part=2

Re: [PATCH v3 3/3] arm64: dts: qcom: shikra: enable WCN SW_CTRL

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] arm64: dts: qcom: shikra: unconfigured trigger type on wcn3988-pmu wake IRQ
--

commit 0d919d176f5987f0cfa1c7fc5b73e582dabc0bf6
Author: Linghui Wu <linghui.wu@oss.qualcomm.com>

arm64: dts: qcom: shikra: enable WCN SW_CTRL

This commit marks the wcn3988-pmu node as a wakeup source on the Shikra
CQM, CQS, and IQS SOMs so the power sequencing driver registers the
SW_CTRL GPIO as a dedicated wake IRQ.

> diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi b/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
> index 95eb7255fb227..c7b894b6126c1 100644
> --- a/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
> +++ b/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
> @@ -102,6 +102,7 @@ wcn3988-pmu {
>  		pinctrl-names = "default";
>  
>  		swctrl-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>;
> +		wakeup-source;
>  
>  		vddio-supply = <&pm4125_l7>;
>  		vddxo-supply = <&pm4125_l13>;
> diff --git a/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi b/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
> index ebc3052d57a99..5edcabd9dae17 100644
> --- a/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
> +++ b/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
> @@ -85,6 +85,7 @@ wcn3988-pmu {
>  		pinctrl-names = "default";
>  
>  		swctrl-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>;
> +		wakeup-source;

[Severity: High]
Does enabling wakeup-source on wcn3988-pmu leave the TLMM GPIO 88 wake IRQ
without a configured trigger type and stuck on handle_bad_irq?

When wakeup-source is present, pwrseq_qcom_wcn_probe() in
drivers/power/sequencing/pwrseq-qcom-wcn.c maps swctrl-gpios to an IRQ and
registers it as a dedicated wake IRQ:

    wake_irq = gpiod_to_irq(swctrl_gpio);
    if (wake_irq < 0)
            return dev_err_probe(dev, wake_irq,
                                 "Failed to get the SW_CTRL wake IRQ\n");

    ret = devm_device_init_wakeup(dev);
    if (ret)
            return dev_err_probe(dev, ret,
                                 "Failed to enable wakeup\n");

    ret = dev_pm_set_dedicated_wake_irq(dev, wake_irq);

In drivers/pinctrl/qcom/pinctrl-msm.c, msm_gpio_init() initializes the GPIO
IRQ chip with no default trigger type and handle_bad_irq:

    girq->default_type = IRQ_TYPE_NONE;
    girq->handler = handle_bad_irq;

Because tlmm uses a hierarchical IRQ domain with wakeup-parent = <&mpm>,
gpiod_to_irq() -> gpiochip_to_irq() creates the mapping with IRQ_TYPE_NONE.
Then dev_pm_set_dedicated_wake_irq() -> __dev_pm_set_dedicated_wake_irq()
in drivers/base/power/wakeirq.c requests the IRQ without any
IRQF_TRIGGER_* flags:

    err = request_threaded_irq(irq, NULL, handle_threaded_wake_irq,
                               IRQF_ONESHOT | IRQF_NO_AUTOEN,
                               wirq->name, wirq);

In __setup_irq(), because neither the request flags nor the existing
irq_data specifies any trigger bits, __irq_set_trigger() is skipped and
neither msm_gpio_irq_set_type() nor qcom_mpm_set_type() is called. As a
result, the TLMM and MPM trigger registers remain unconfigured and
desc->handle_irq stays set to handle_bad_irq instead of handle_level_irq
or handle_edge_irq.

Should the trigger type be configured before or when registering the wake
IRQ, or specified via an interrupts property?

>  
>  		vddio-supply = <&pm8150_s4>;
>  		vddxo-supply = <&pm8150_l12>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261019093911.3199891-1-linghui.wu@oss.qualcomm.com?part=3