* [PATCH] arm64: dts: ti: k3-j722s-evm: Enable HDMI display
@ 2026-10-27 4:22 Mrigendra Chaubey
2026-10-27 4:29 ` sashiko-bot
0 siblings, 1 reply; 2+ messages in thread
From: Mrigendra Chaubey @ 2026-10-27 4:22 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: devicetree, linux-kernel
From: Jayesh Choudhary <j-choudhary@ti.com>
The EVM drives its HDMI port from DSS1 VP0 over DPI through a SiI9022
bridge on MAIN I2C1. The bridge reset, its interrupt and the DDC/HPD
level-shifter enable are lines of a TCA6416 expander on the same bus.
Add the expander, the bridge, the HDMI connector and the DPI pinmux,
and enable DSS1 with VP0 clocked directly from the HDMI PLL.
Keep the bridge out of reset using a GPIO hog rather than reset-gpios:
after a reset pulse the SiI9022 NAKs its first I2C transfer, so the
sii902x probe fails with -EREMOTEIO.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Signed-off-by: Yashas D <y-d@ti.com>
[mrigendra.chaubey: squashed ti-linux-6.18.y commits 65b8b66908be and
589e383cef77; carried over the DSS1 ports node and dss1_pins_default
from the AM62P DSS series; dropped the unused OLDI reset hog,
EXTPCLKIN pin and bridge audio properties; added bus-width and
documented the reset hog. Tested on J722SXH01EVM.]
Signed-off-by: Mrigendra Chaubey <mrigendra.chaubey@gmail.com>
---
Depends on patches 4, 5 and 14 of the AM62P display series v3:
https://lore.kernel.org/all/20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com/
Also depends on patches 1-3, reposted as patches 1-3 of:
https://lore.kernel.org/all/20260903-tidss-pre-beagley-v1-0-93928baa8b12@ideasonboard.com/
Tested on J722SXH01EVM with Linux v6.18.58 and an HDMI display
connected; sii902x and tidss probed successfully. Builds and passes
dtbs_check on next-20261026 with the prerequisite patches applied.
arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 172 ++++++++++++++++++++++++
1 file changed, 172 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
index c6486cf5a0..90c5151f52 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
@@ -220,6 +220,18 @@ transceiver2: can-phy2 {
standby-gpios = <&exp1 17 GPIO_ACTIVE_HIGH>;
};
+ hdmi0: connector-hdmi {
+ compatible = "hdmi-connector";
+ label = "hdmi";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&sii9022_out>;
+ };
+ };
+ };
+
csi01_mux: mux-controller-0 {
compatible = "gpio-mux";
#mux-state-cells = <1>;
@@ -260,6 +272,14 @@ J722S_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (B22) I2C0_SDA */
bootph-all;
};
+ main_i2c1_pins_default: main-i2c1-default-pins {
+ pinctrl-single,pins = <
+ J722S_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C24) I2C1_SCL */
+ J722S_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (A22) I2C1_SDA */
+ >;
+ bootph-all;
+ };
+
main_i2c2_pins_default: main-i2c2-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (P22) GPMC0_CSn2.I2C2_SCL */
@@ -366,6 +386,45 @@ J722S_IOPAD(0x030, PIN_INPUT, 7) /* (K23) GPIO0_12 */
>;
};
+ main_gpio0_ioexp_intr_pins_default: main-gpio0-ioexp-intr-default-pins {
+ pinctrl-single,pins = <
+ J722S_IOPAD(0x0110, PIN_INPUT, 7) /* (G27) MMC2_DAT1.GPIO0_67 */
+ >;
+ };
+
+ dss1_pins_default: dss1-default-pins {
+ pinctrl-single,pins = <
+ J722S_IOPAD(0x0100, PIN_OUTPUT, 0) /* (AB23) VOUT0_VSYNC */
+ J722S_IOPAD(0x00f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */
+ J722S_IOPAD(0x0104, PIN_OUTPUT, 0) /* (AC26) VOUT0_PCLK */
+ J722S_IOPAD(0x00fc, PIN_OUTPUT, 0) /* (AC27) VOUT0_DE */
+ J722S_IOPAD(0x00b8, PIN_OUTPUT, 0) /* (W27) VOUT0_DATA0 */
+ J722S_IOPAD(0x00bc, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA1 */
+ J722S_IOPAD(0x00c0, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA2 */
+ J722S_IOPAD(0x00c4, PIN_OUTPUT, 0) /* (W23) VOUT0_DATA3 */
+ J722S_IOPAD(0x00c8, PIN_OUTPUT, 0) /* (W22) VOUT0_DATA4 */
+ J722S_IOPAD(0x00cc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA5 */
+ J722S_IOPAD(0x00d0, PIN_OUTPUT, 0) /* (Y26) VOUT0_DATA6 */
+ J722S_IOPAD(0x00d4, PIN_OUTPUT, 0) /* (Y27) VOUT0_DATA7 */
+ J722S_IOPAD(0x00d8, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA8 */
+ J722S_IOPAD(0x00dc, PIN_OUTPUT, 0) /* (AA27) VOUT0_DATA9 */
+ J722S_IOPAD(0x00e0, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA10 */
+ J722S_IOPAD(0x00e4, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA11 */
+ J722S_IOPAD(0x00e8, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA12 */
+ J722S_IOPAD(0x00ec, PIN_OUTPUT, 0) /* (AA22) VOUT0_DATA13 */
+ J722S_IOPAD(0x00f0, PIN_OUTPUT, 0) /* (AB26) VOUT0_DATA14 */
+ J722S_IOPAD(0x00f4, PIN_OUTPUT, 0) /* (AB27) VOUT0_DATA15 */
+ J722S_IOPAD(0x005c, PIN_OUTPUT, 1) /* (U27) GPMC0_AD8.VOUT0_DATA16 */
+ J722S_IOPAD(0x0060, PIN_OUTPUT, 1) /* (U26) GPMC0_AD9.VOUT0_DATA17 */
+ J722S_IOPAD(0x0064, PIN_OUTPUT, 1) /* (V27) GPMC0_AD10.VOUT0_DATA18 */
+ J722S_IOPAD(0x0068, PIN_OUTPUT, 1) /* (V25) GPMC0_AD11.VOUT0_DATA19 */
+ J722S_IOPAD(0x006c, PIN_OUTPUT, 1) /* (V26) GPMC0_AD12.VOUT0_DATA20 */
+ J722S_IOPAD(0x0070, PIN_OUTPUT, 1) /* (V24) GPMC0_AD13.VOUT0_DATA21 */
+ J722S_IOPAD(0x0074, PIN_OUTPUT, 1) /* (V22) GPMC0_AD14.VOUT0_DATA22 */
+ J722S_IOPAD(0x0078, PIN_OUTPUT, 1) /* (V23) GPMC0_AD15.VOUT0_DATA23 */
+ >;
+ };
+
};
&cpsw3g {
@@ -627,6 +686,84 @@ tlv320aic3106: audio-codec@1b {
};
};
+&main_i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c1_pins_default>;
+ clock-frequency = <100000>;
+ status = "okay";
+
+ exp2: gpio@20 {
+ compatible = "ti,tca6416";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "DSI_Mux_SEL_2", "GPIO_eDP_ENABLE",
+ "DP0_PWR_SW_EN", "GPIO_OLDI_RSTn",
+ "GPIO_HDMI_RSTn", "HDMI_LS_OE",
+ "", "",
+ "DSI_GPIO0", "DSI_GPIO1",
+ "DSI_EDID", "IO_eDP_IRQ",
+ "OLDI_INT#", "HDMI_INTn",
+ "", "";
+ interrupt-parent = <&main_gpio0>;
+ interrupts = <67 IRQ_TYPE_EDGE_FALLING>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_gpio0_ioexp_intr_pins_default>;
+ bootph-all;
+
+ p04-hog {
+ /*
+ * P04 - GPIO_HDMI_RSTn: keep the SiI9022 out of reset. Not
+ * reset-gpios: after a reset pulse the bridge NAKs its first
+ * I2C transfer, which fails the sii902x probe with -EREMOTEIO.
+ */
+ gpio-hog;
+ gpios = <4 GPIO_ACTIVE_LOW>;
+ output-low;
+ line-name = "GPIO_HDMI_RSTn";
+ };
+
+ p05-hog {
+ /* P05 - HDMI_LS_OE: enable the DDC/HPD level shifter */
+ gpio-hog;
+ gpios = <5 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "HDMI_LS_OE";
+ };
+ };
+
+ sii9022: bridge-hdmi@3b {
+ compatible = "sil,sii9022";
+ reg = <0x3b>;
+ interrupt-parent = <&exp2>;
+ interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ sii9022_in: endpoint {
+ bus-width = <24>;
+ remote-endpoint = <&dss1_dpi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ sii9022_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+ };
+ };
+ };
+};
+
&main_i2c2 {
status = "okay";
pinctrl-names = "default";
@@ -844,4 +981,39 @@ &mcu_i2c0 {
status = "okay";
};
+&dss1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&dss1_pins_default>;
+
+ /*
+ * VP0 ("vp1" clock) drives DPI, not OLDI: take its pixel clock directly
+ * instead of through the SoC default OLDI /7 divider.
+ */
+ clocks = <&k3_clks 232 8>,
+ <&k3_clks 232 0>,
+ <&k3_clks 232 4>;
+
+ assigned-clocks = <&k3_clks 241 0>, /* DSS1-VP0 */
+ <&k3_clks 240 0>, /* DSS1-VP1 */
+ <&k3_clks 245 0>; /* DPI Output */
+ assigned-clock-parents = <&k3_clks 241 2>, /* PLL 17 HDMI */
+ <&k3_clks 240 1>, /* PLL 18 DSI */
+ <&k3_clks 245 2>; /* DSS1-DPI0 */
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* DSS1-VP0: DPI -> SiI9022 -> HDMI */
+ port@0 {
+ reg = <0>;
+
+ dss1_dpi0_out: endpoint {
+ remote-endpoint = <&sii9022_in>;
+ };
+ };
+ };
+};
+
#include "k3-j722s-ti-ipc-firmware.dtsi"
--
2.43.0
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH] arm64: dts: ti: k3-j722s-evm: Enable HDMI display
2026-10-27 4:22 [PATCH] arm64: dts: ti: k3-j722s-evm: Enable HDMI display Mrigendra Chaubey
@ 2026-10-27 4:29 ` sashiko-bot
0 siblings, 0 replies; 2+ messages in thread
From: sashiko-bot @ 2026-10-27 4:29 UTC (permalink / raw)
To: Mrigendra Chaubey; +Cc: devicetree, robh, conor+dt
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] arm64: dts: ti: unresolved dss1 label reference in k3-j722s-evm.dts
--
commit 91b798e074e4955950640ee6d66d8481cca226d2
Author: Jayesh Choudhary <j-choudhary@ti.com>
arm64: dts: ti: k3-j722s-evm: Enable HDMI display
This commit adds the TCA6416 I/O expander, SiI9022 HDMI bridge, HDMI
connector, and DPI pinmux to k3-j722s-evm.dts, and enables the DSS1 node
to drive HDMI output from VP0.
> diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
> index e66330c71593a..bcf8088c9bf07 100644
> --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
[ ... ]
> @@ -854,4 +991,39 @@ &mcu_i2c0 {
> status = "okay";
> };
>
> +&dss1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&dss1_pins_default>;
[Severity: Low]
Does this break building k3-j722s-evm.dtb when CONFIG_ARCH_K3 is enabled in
this tree?
In arch/arm64/boot/dts/ti/Makefile, k3-j722s-evm.dtb is built unconditionally
for CONFIG_ARCH_K3:
dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb
Although cbass_main in arch/arm64/boot/dts/ti/k3-j722s.dtsi maps the bus
range for DSS1:
<0x00 0x30220000 0x00 0x30220000 0x00 0x00010000>, /* DSS1 */
none of the included .dtsi files (such as k3-am62p-j722s-common-main.dtsi or
k3-j722s-main.dtsi) define the dss1 node or label yet, because the
prerequisite AM62P/J722S DSS series noted in the patch commentary is not
applied in this tree. As a result, referencing &dss1 here causes dtc to fail
with an unresolved label error during a dtbs build.
Should the prerequisite patch defining the dss1 node be applied before this
change?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261027042231.499107-1-mrigendra.chaubey@gmail.com?part=1
^ permalink raw reply [flat|nested] 2+ messages in thread
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