* [PATCH] arm64: dts: qcom: monaco-monza-som: Add ADC thermal channels
@ 2026-10-28 14:17 Loic Poulain
2026-10-28 14:23 ` Konrad Dybcio
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Loic Poulain @ 2026-10-28 14:17 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Loic Poulain
Add ADC5 GEN3 thermistor channels to pmm8620au_0 and pmm8650au_1 ADC
nodes for thermal monitoring on the Monaco Monza SoM:
- pmm8620au_0: XO, UFS/eMMC, and SoC thermistors (AMUX1, AMUX5, AMUX6)
- pmm8650au_1: SDRAM thermistor (AMUX6)
All channels use 100K pull-up.
Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi | 40 ++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi b/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi
index 36af1ad2105d5b3e5674fa59f5648c77ccfe7d11..dc2ef7e5b061354eca4e4fee90906e205ccac1a4 100644
--- a/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi
@@ -227,6 +227,46 @@ &pcie1_phy {
status = "okay";
};
+&pmm8620au_0_adc {
+ channel@44 {
+ reg = <ADC5_GEN3_AMUX1_THM_100K_PU(0)>;
+ label = "pmm8620au_0_xo_therm";
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ qcom,adc-tm;
+ };
+
+ channel@48 {
+ reg = <ADC5_GEN3_AMUX5_THM_100K_PU(0)>;
+ label = "pmm8620au_0_ufs_emmc_therm";
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ qcom,adc-tm;
+ };
+
+ channel@49 {
+ reg = <ADC5_GEN3_AMUX6_THM_100K_PU(0)>;
+ label = "pmm8620au_0_soc_therm";
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ qcom,adc-tm;
+ };
+};
+
+&pmm8650au_1_adc {
+ channel@249 {
+ reg = <ADC5_GEN3_AMUX6_THM_100K_PU(2)>;
+ label = "pmm8620au_1_sdram_therm";
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ qcom,adc-tm;
+ };
+};
+
&qupv3_id_0 {
firmware-name = "qcom/qcs8300/qupv3fw.elf";
---
base-commit: f1ac44c32cba88ad65dcecd4a279661d14e93651
change-id: 20261028-monza-therm-44fbef42f89b
Best regards,
--
Loic Poulain <loic.poulain@oss.qualcomm.com>
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] arm64: dts: qcom: monaco-monza-som: Add ADC thermal channels
2026-10-28 14:17 [PATCH] arm64: dts: qcom: monaco-monza-som: Add ADC thermal channels Loic Poulain
@ 2026-10-28 14:23 ` Konrad Dybcio
2026-10-28 14:32 ` sashiko-bot
2026-10-28 15:38 ` Abel Vesa
2 siblings, 0 replies; 4+ messages in thread
From: Konrad Dybcio @ 2026-10-28 14:23 UTC (permalink / raw)
To: Loic Poulain, Bjorn Andersson, Konrad Dybcio, Abel Vesa,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
On 10/28/26 3:17 PM, Loic Poulain wrote:
> Add ADC5 GEN3 thermistor channels to pmm8620au_0 and pmm8650au_1 ADC
> nodes for thermal monitoring on the Monaco Monza SoM:
>
> - pmm8620au_0: XO, UFS/eMMC, and SoC thermistors (AMUX1, AMUX5, AMUX6)
> - pmm8650au_1: SDRAM thermistor (AMUX6)
>
> All channels use 100K pull-up.
>
> Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: dts: qcom: monaco-monza-som: Add ADC thermal channels
2026-10-28 14:17 [PATCH] arm64: dts: qcom: monaco-monza-som: Add ADC thermal channels Loic Poulain
2026-10-28 14:23 ` Konrad Dybcio
@ 2026-10-28 14:32 ` sashiko-bot
2026-10-28 15:38 ` Abel Vesa
2 siblings, 0 replies; 4+ messages in thread
From: sashiko-bot @ 2026-10-28 14:32 UTC (permalink / raw)
To: Loic Poulain; +Cc: devicetree, robh, conor+dt
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] arm64: dts: qcom: monaco-monza-som: qcom,adc-tm channels lack thermal zones
- [Low] arm64: dts: qcom: wrong PMIC prefix in pmm8650au_1_adc SDRAM therm label
--
commit 561733e4e2720685d27dd79350db7cc51662ba15
Author: Loic Poulain <loic.poulain@oss.qualcomm.com>
arm64: dts: qcom: monaco-monza-som: Add ADC thermal channels
This commit adds ADC5 GEN3 thermistor channels to the pmm8620au_0_adc and
pmm8650au_1_adc nodes in monaco-monza-som.dtsi for thermal monitoring on
the Monaco Monza SoM.
> diff --git a/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi b/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi
> index 36af1ad2105d5..dc2ef7e5b0613 100644
> --- a/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi
> +++ b/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi
> @@ -227,6 +227,46 @@ &pcie1_phy {
> status = "okay";
> };
>
> +&pmm8620au_0_adc {
> + channel@44 {
> + reg = <ADC5_GEN3_AMUX1_THM_100K_PU(0)>;
> + label = "pmm8620au_0_xo_therm";
> + qcom,ratiometric;
> + qcom,hw-settle-time = <200>;
> + qcom,pre-scaling = <1 1>;
> + qcom,adc-tm;
> + };
> +
> + channel@48 {
> + reg = <ADC5_GEN3_AMUX5_THM_100K_PU(0)>;
> + label = "pmm8620au_0_ufs_emmc_therm";
> + qcom,ratiometric;
> + qcom,hw-settle-time = <200>;
> + qcom,pre-scaling = <1 1>;
> + qcom,adc-tm;
> + };
> +
> + channel@49 {
> + reg = <ADC5_GEN3_AMUX6_THM_100K_PU(0)>;
> + label = "pmm8620au_0_soc_therm";
> + qcom,ratiometric;
> + qcom,hw-settle-time = <200>;
> + qcom,pre-scaling = <1 1>;
> + qcom,adc-tm;
> + };
> +};
> +
> +&pmm8650au_1_adc {
> + channel@249 {
> + reg = <ADC5_GEN3_AMUX6_THM_100K_PU(2)>;
> + label = "pmm8620au_1_sdram_therm";
[Severity: Low]
Should this label be "pmm8650au_1_sdram_therm" instead of
"pmm8620au_1_sdram_therm" to match the parent &pmm8650au_1_adc node and the
existing channels in arch/arm64/boot/dts/qcom/monaco-pmics.dtsi ("pmm8650au_1_die_temp"
and "pmm8650au_1_vph_pwr")?
> + qcom,ratiometric;
> + qcom,hw-settle-time = <200>;
> + qcom,pre-scaling = <1 1>;
> + qcom,adc-tm;
> + };
> +};
[Severity: Medium]
All four channels set qcom,adc-tm, which causes adc5_gen3_probe() ->
adc5_gen3_get_fw_channel_data() -> adc5_gen3_add_aux_tm_device() in
drivers/iio/adc/qcom-spmi-adc5-gen3.c to instantiate the
qcom_spmi_adc5_gen3.adc5_tm_gen3 auxiliary devices and register
adctm5_gen3_isr() on SDAM0.
When adc_tm5_probe() -> adc_tm5_register_tzd() in
drivers/thermal/qcom/qcom-spmi-adc-tm5-gen3.c runs:
for (int i = 0; i < adc_tm5->nchannels; i++) {
channel = ADC5_GEN3_V_CHAN(adc_tm5->chan_props[i].common_props);
tzd = devm_thermal_of_zone_register(adc_tm5->dev, channel,
&adc_tm5->chan_props[i],
&adc_tm_ops);
devm_thermal_of_zone_register() calls of_thermal_zone_find() in
drivers/thermal/thermal_of.c:
count = of_count_phandle_with_args(child, "thermal-sensors",
"#thermal-sensor-cells");
if (count <= 0) {
pr_err("%pOFP: missing thermal sensor\n", child);
return ERR_PTR(-EINVAL);
}
However, neither pmm8620au_0_adc nor pmm8650au_1_adc in
arch/arm64/boot/dts/qcom/monaco-pmics.dtsi or
arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi defines
#thermal-sensor-cells = <1>, and no thermal-zones entries reference these
ADC channels. As a result, devm_thermal_of_zone_register() returns -ENODEV
for all four channels (or -EINVAL if a downstream board references the ADC
nodes in thermal-sensors without #thermal-sensor-cells), leaving hardware
threshold monitoring unconfigured while still running adctm5_gen3_isr() on
SDAM0 interrupts.
Should pmm8620au_0_adc and pmm8650au_1_adc define #thermal-sensor-cells = <1>
along with corresponding thermal-zones entries, or should qcom,adc-tm be
omitted until thermal zones are wired up?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261028-monza-therm-v1-1-dfe4759c15bd@oss.qualcomm.com?part=1
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] arm64: dts: qcom: monaco-monza-som: Add ADC thermal channels
2026-10-28 14:17 [PATCH] arm64: dts: qcom: monaco-monza-som: Add ADC thermal channels Loic Poulain
2026-10-28 14:23 ` Konrad Dybcio
2026-10-28 14:32 ` sashiko-bot
@ 2026-10-28 15:38 ` Abel Vesa
2 siblings, 0 replies; 4+ messages in thread
From: Abel Vesa @ 2026-10-28 15:38 UTC (permalink / raw)
To: Loic Poulain
Cc: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-msm, devicetree,
linux-kernel
On 26-10-28 15:17:18, Loic Poulain wrote:
> Add ADC5 GEN3 thermistor channels to pmm8620au_0 and pmm8650au_1 ADC
> nodes for thermal monitoring on the Monaco Monza SoM:
>
> - pmm8620au_0: XO, UFS/eMMC, and SoC thermistors (AMUX1, AMUX5, AMUX6)
> - pmm8650au_1: SDRAM thermistor (AMUX6)
>
> All channels use 100K pull-up.
>
> Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
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2026-10-28 14:17 [PATCH] arm64: dts: qcom: monaco-monza-som: Add ADC thermal channels Loic Poulain
2026-10-28 14:23 ` Konrad Dybcio
2026-10-28 14:32 ` sashiko-bot
2026-10-28 15:38 ` Abel Vesa
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