Re: [PATCH v3 3/6] arm64: dts: qcom: lemans: Move platform resources into lemans-embedded.dtsi

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] arm64: dts: qcom: lemans: Stripped compatible from gmu and bwmon base nodes
--

commit edcbb96f9884f5698a7680bbdeb712898fc65efc
Author: Shawn Guo <shengchao.guo@oss.qualcomm.com>

arm64: dts: qcom: lemans: Move platform resources into lemans-embedded.dtsi

This commit moves platform resources such as clocks, regulators,
interconnects, pinctrls, and PHYs from lemans.dtsi into
lemans-embedded.dtsi so that lemans.dtsi can be shared with the GearVM
variant.

> diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
> index 7547042d8e851..821c86409c5da 100644
> --- a/arch/arm64/boot/dts/qcom/lemans.dtsi
> +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi

[ ... ]

> @@ -4662,49 +3089,9 @@ gpu: gpu@3d00000 {
>  			gpu_zap_shader: zap-shader {
>  				memory-region = <&pil_gpu_mem>;
>  			};
> -
> -			gpu_opp_table: opp-table {
> -				compatible = "operating-points-v2";
> -
> -				opp-405000000 {
> -					opp-hz = /bits/ 64 <405000000>;
> -					opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
> -					opp-peak-kBps = <5285156>;
> -					opp-supported-hw = <0x3>;
> -				};
> -
> -				opp-530000000 {
> -					opp-hz = /bits/ 64 <530000000>;
> -					opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
> -					opp-peak-kBps = <12484375>;
> -					opp-supported-hw = <0x2>;
> -				};
> -
> -				opp-676000000 {
> -					opp-hz = /bits/ 64 <676000000>;
> -					opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
> -					opp-peak-kBps = <8171875>;
> -					opp-supported-hw = <0x1>;
> -				};
> -
> -				opp-778000000 {
> -					opp-hz = /bits/ 64 <778000000>;
> -					opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
> -					opp-peak-kBps = <10687500>;
> -					opp-supported-hw = <0x1>;
> -				};
> -
> -				opp-800000000 {
> -					opp-hz = /bits/ 64 <800000000>;
> -					opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
> -					opp-peak-kBps = <12484375>;
> -					opp-supported-hw = <0x1>;
> -				};
> -			};
>  		};
>  
>  		gmu: gmu@3d6a000 {
> -			compatible = "qcom,adreno-gmu-663.0", "qcom,adreno-gmu";
>  			reg = <0x0 0x03d6a000 0x0 0x34000>,
>  			      <0x0 0x03de0000 0x0 0x10000>,
>  			      <0x0 0x0b290000 0x0 0x10000>;

[ ... ]

> @@ -4793,30 +3123,9 @@ adreno_smmu: iommu@3da0000 {
>  				     <GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH>;
>  		};
>  
> -		serdes0: phy@8901000 {
> -			compatible = "qcom,sa8775p-dwmac-sgmii-phy";
> -			reg = <0x0 0x08901000 0x0 0xe10>;
> -			clocks = <&gcc GCC_SGMI_CLKREF_EN>;
> -			clock-names = "sgmi_ref";
> -			#phy-cells = <0>;
> -			status = "disabled";
> -		};
> -
> -		serdes1: phy@8902000 {
> -			compatible = "qcom,sa8775p-dwmac-sgmii-phy";
> -			reg = <0x0 0x08902000 0x0 0xe10>;
> -			clocks = <&gcc GCC_SGMI_CLKREF_EN>;
> -			clock-names = "sgmi_ref";
> -			#phy-cells = <0>;
> -			status = "disabled";
> -		};
> -
> -		pmu@9091000 {
> -			compatible = "qcom,sa8775p-llcc-bwmon", "qcom,sc7280-llcc-bwmon";
> +		llcc_bwmon: pmu@9091000 {
>  			reg = <0x0 0x9091000 0x0 0x1000>;
>  			interrupts = <GIC_SPI 620 IRQ_TYPE_LEVEL_HIGH>;
> -			interconnects = <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY
> -					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>;
>  
>  			operating-points-v2 = <&llcc_bwmon_opp_table>;
>  
> @@ -4865,12 +3174,9 @@ opp-9 {
>  			};
>  		};
>  
> -		pmu@90b5400 {
> -			compatible = "qcom,sa8775p-cpu-bwmon", "qcom,sdm845-bwmon";
> +		cpu_bwmon0: pmu@90b5400 {
>  			reg = <0x0 0x90b5400 0x0 0x600>;
>  			interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
> -			interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
> -					 &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>;
>  
>  			operating-points-v2 = <&cpu_bwmon_opp_table>;
>  
> @@ -4893,15 +3199,11 @@ opp-3 {
>  					opp-peak-kBps = <16265000>;
>  				};
>  			};
> -
>  		};
>  
> -		pmu@90b6400 {
> -			compatible = "qcom,sa8775p-cpu-bwmon", "qcom,sdm845-bwmon";
> +		cpu_bwmon1: pmu@90b6400 {
>  			reg = <0x0 0x90b6400 0x0 0x600>;
>  			interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
> -			interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
> -					 &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>;
>  
>  			operating-points-v2 = <&cpu_bwmon_opp_table>;
>  		};

[Severity: Medium]
As reported by Sashiko on v2 [1], moving the compatible property out of
gmu@3d6a000 (gmu), pmu@9091000 (llcc_bwmon), pmu@90b5400 (cpu_bwmon0), and
pmu@90b6400 (cpu_bwmon1) in arch/arm64/boot/dts/qcom/lemans.dtsi into
arch/arm64/boot/dts/qcom/lemans-embedded.dtsi leaves these four nodes
enabled under soc@0 (compatible = "simple-bus") with reg, interrupts, and
iommus or operating-points-v2 properties, but without a compatible string.

Neither the subsequent commit "arm64: dts: qcom: Add device tree for Lemans
GearVM variant" (lemans-gearvm.dtsi) nor commit "arm64: dts: qcom: lemans:
Enable lemans-sa8255p-ride board support" (lemans-sa8255p-ride.dts) adds
compatible strings to or deletes these nodes, leaving four enabled
simple-bus child nodes without a compatible property in non-embedded DTBs
such as lemans-sa8255p-ride.dtb and causing dtbs_check schema validation
failures under simple-bus.yaml.

Should the compatible properties remain in lemans.dtsi (with status =
"disabled" if disabled by default), or should the complete nodes be moved
into lemans-embedded.dtsi if they are exclusive to the Embedded variant
like epss_l3_cl0 and epss_l3_cl1?

[1] https://lore.kernel.org/r/20261015023711.721837-4-shengchao.guo@oss.qualcomm.com

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261031131042.1200862-1-shengchao.guo@oss.qualcomm.com?part=3