[PATCH 0/3] arm64: dts: rockchip: Add NanoPi M6V2 board

[PATCH 0/3] arm64: dts: rockchip: Add NanoPi M6V2 board

[Joachim Eastwood via B4 Relay]

This short patch series add support for the NanoPi M6V2. The board is
very similar to the original M6 with only a few differences.

Differences:
* New audio CODEC (Everest ES8389)
* New Ethernet PHY (MotorComm YT8531C)
* 1 extra user button
* Misc connector changes on the board

Patch 1 documents the NanoPi M6V2 board compatibility string.
Patch 2 changes the Eth phy to a generic compatible in DT.
Patch 3 adds the NanoPi M6V2 device tree.

Patch 2 is tested on M6 which has a RTL8211F phy and MV2 with YT8531C.
Note that R6C and R6S also have RTL8211F phys so this test should
cover those as well.

Note that this patch set doesn't depend on the "NanoPi 6 series fixes
and improvements" patch set. The patch sets can be applied in any order
without any conflicts.

Link to schematic:
https://wiki.friendlyelec.com/wiki/images/b/b6/NanoPi_M6V2_2603_SCH.pdf

Based on v7.4-rc1.

Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
---
Joachim Eastwood (3):
      dt-bindings: arm: rockchip: add FriendlyElec NanoPi M6V2
      arm64: dts: rockchip: rk3588s-nanopi: switch to generic eth phy compatible
      arm64: dts: rockchip: add support for NanoPi M6 board

 .../devicetree/bindings/arm/rockchip.yaml          |  1 +
 arch/arm64/boot/dts/rockchip/Makefile              |  1 +
 .../boot/dts/rockchip/rk3588s-nanopi-m6v2.dts      | 90 ++++++++++++++++++++++
 arch/arm64/boot/dts/rockchip/rk3588s-nanopi.dtsi   |  2 +-
 4 files changed, 93 insertions(+), 1 deletion(-)
---
base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4
change-id: 20261014-nanopi-m6v2-c6d0708951e7

Best regards,
--  
Joachim Eastwood <joachim.eastwood@gmail.com>

[PATCH 1/3] dt-bindings: arm: rockchip: add FriendlyElec NanoPi M6V2

[Joachim Eastwood via B4 Relay]

From: Joachim Eastwood <joachim.eastwood@gmail.com>

Add device tree binding documentation for FriendlyElec NanoPi M6V2,
a single-board computer based on the Rockchip RK3588S SoC. This board
is an updated version of the original M6 board with a few changes.

Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
---
 Documentation/devicetree/bindings/arm/rockchip.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index a24949b163cff..70d78f7f8c559 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -392,6 +392,7 @@ properties:
         items:
           - enum:
               - friendlyarm,nanopi-m6
+              - friendlyarm,nanopi-m6v2
               - friendlyarm,nanopi-r6c
               - friendlyarm,nanopi-r6s
           - const: rockchip,rk3588s

-- 
2.56.0

[PATCH 2/3] arm64: dts: rockchip: rk3588s-nanopi: switch to generic eth phy compatible

[Joachim Eastwood via B4 Relay]

From: Joachim Eastwood <joachim.eastwood@gmail.com>

Use generic Ethernet phy compatible for all NanoPi 6 boards. This allows
us to easily support the new MotorComm YT8531C phy used on NanoPi M6V2.

Note that the Rockchip vendor DTS has used the generic compatible for a
long time.

Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
---
 arch/arm64/boot/dts/rockchip/rk3588s-nanopi.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi.dtsi
index 22b0cdee22b40..4977ccb668f39 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi.dtsi
@@ -269,7 +269,7 @@ &i2s5_8ch {
 
 &mdio1 {
 	rgmii_phy1: ethernet-phy@1 {
-		compatible = "ethernet-phy-id001c.c916";
+		compatible = "ethernet-phy-ieee802.3-c22";
 		reg = <0x1>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&rtl8211f_rst>;

-- 
2.56.0

[PATCH 3/3] arm64: dts: rockchip: add support for NanoPi M6 board

[Joachim Eastwood via B4 Relay]

From: Joachim Eastwood <joachim.eastwood@gmail.com>

The NanoPi M6V2 board is an updated version of the original M6 board
with the following changes.
* New audio CODEC (Everest ES8389)
* New Ethernet PHY (MotorComm YT8531C)
* 1 extra user button
* Misc connector changes on the board

The codec_es_3v3 regulator enable pin is hardwired to the 5V input rail.

See link below for detailed information:
https://wiki.friendlyelec.com/wiki/index.php/NanoPi_M6V2

Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
---
 arch/arm64/boot/dts/rockchip/Makefile              |  1 +
 .../boot/dts/rockchip/rk3588s-nanopi-m6v2.dts      | 90 ++++++++++++++++++++++
 2 files changed, 91 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 442d322a20cf7..46aa42d4c854b 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -238,6 +238,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-indiedroid-nova.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-khadas-edge2.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-lubancat-4.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-m6v1.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-m6v2.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6s.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6c.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-odroid-m2.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6v2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6v2.dts
new file mode 100644
index 0000000000000..2ac00f2de6844
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6v2.dts
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3588s-nanopi-m6.dtsi"
+
+/ {
+	model = "FriendlyElec NanoPi M6V2";
+	compatible = "friendlyarm,nanopi-m6v2", "rockchip,rk3588s";
+
+	analog-sound {
+		compatible = "audio-graph-card";
+		label = "rk3588s-es8389";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&hp_det>;
+		hp-det-gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>;
+
+		dais = <&i2s0_8ch_p0>;
+		routing =
+			"Headphones", "HPOL",
+			"Headphones", "HPOR",
+			"INPUT1", "Microphone Jack",
+			"INPUT2", "Microphone Jack";
+		widgets =
+			"Headphone", "Headphones",
+			"Microphone", "Microphone Jack";
+	};
+
+	codec_es_3v3: regulator-codec-es-3v3 {
+		compatible = "regulator-fixed";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-name = "codec_es_3v3";
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&user_btn>;
+
+		user-button {
+			label = "User";
+			linux,code = <BTN_1>;
+			gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
+			debounce-interval = <50>;
+		};
+	};
+};
+
+&i2c7 {
+	audio-codec@10 {
+		compatible = "everest,es8389";
+		reg = <0x10>;
+		assigned-clocks = <&cru I2S1_8CH_MCLKOUT>;
+		assigned-clock-rates = <12288000>;
+		clocks = <&cru I2S1_8CH_MCLKOUT>;
+		clock-names = "mclk";
+		vddd-supply = <&vcc_1v8_s3>;
+		vdda-supply = <&codec_es_3v3>;
+		#sound-dai-cells = <0>;
+
+		port {
+			es8389_p0: endpoint {
+				remote-endpoint = <&i2s0_8ch_p0_0>;
+			};
+		};
+	};
+};
+
+&i2s0_8ch {
+	i2s0_8ch_p0: port {
+		i2s0_8ch_p0_0: endpoint {
+			dai-format = "i2s";
+			mclk-fs = <256>;
+			remote-endpoint = <&es8389_p0>;
+		};
+	};
+};
+
+&pinctrl {
+	buttons {
+		user_btn: user-btn {
+			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};

-- 
2.56.0

Re: [PATCH 3/3] arm64: dts: rockchip: add support for NanoPi M6 board

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] arm64: dts: rockchip: wrong MCLK clock in rk3588s-nanopi-m6v2 audio-codec
- [Low] arm64: dts: rockchip: commit subject names NanoPi M6 instead of NanoPi M6V2
--

commit b98c017b6747ab0aa87e4af9234cbf5396581d64
Author: Joachim Eastwood <joachim.eastwood@gmail.com>

arm64: dts: rockchip: add support for NanoPi M6 board

This commit adds the device tree for the FriendlyElec NanoPi M6V2 board,
including support for its Everest ES8389 audio codec, regulator, and user
button.

>     arm64: dts: rockchip: add support for NanoPi M6 board
>     
>     The NanoPi M6V2 board is an updated version of the original M6 board
>     with the following changes.
>     * New audio CODEC (Everest ES8389)
>     * New Ethernet PHY (MotorComm YT8531C)
>     * 1 extra user button
>     * Misc connector changes on the board
>     
>     The codec_es_3v3 regulator enable pin is hardwired to the 5V input rail.
>     
>     See link below for detailed information:
>     https://wiki.friendlyelec.com/wiki/index.php/NanoPi_M6V2
>     
>     Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>

[Severity: Low]
This isn't a bug, but commit 2640aea473b4 ("arm64: dts: rockchip: add support
for NanoPi M6 board") already used this exact subject line when adding
rk3588s-nanopi-m6.dtsi and rk3588s-nanopi-m6v1.dts. Since this commit adds
rk3588s-nanopi-m6v2.dts for the FriendlyElec NanoPi M6V2, should the commit
subject say NanoPi M6V2 instead of NanoPi M6?

> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6v2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6v2.dts
> new file mode 100644
> index 0000000000000..2ac00f2de6844
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6v2.dts
> @@ -0,0 +1,90 @@

[ ... ]

> +&i2c7 {
> +	audio-codec@10 {
> +		compatible = "everest,es8389";
> +		reg = <0x10>;
> +		assigned-clocks = <&cru I2S1_8CH_MCLKOUT>;
> +		assigned-clock-rates = <12288000>;
> +		clocks = <&cru I2S1_8CH_MCLKOUT>;
> +		clock-names = "mclk";
> +		vddd-supply = <&vcc_1v8_s3>;
> +		vdda-supply = <&codec_es_3v3>;
> +		#sound-dai-cells = <0>;
> +
> +		port {
> +			es8389_p0: endpoint {
> +				remote-endpoint = <&i2s0_8ch_p0_0>;
> +			};
> +		};
> +	};
> +};
> +
> +&i2s0_8ch {
> +	i2s0_8ch_p0: port {
> +		i2s0_8ch_p0_0: endpoint {
> +			dai-format = "i2s";
> +			mclk-fs = <256>;
> +			remote-endpoint = <&es8389_p0>;
> +		};
> +	};
> +};

[Severity: Medium]
Should audio-codec@10 under i2c7 use <&cru I2S0_8CH_MCLKOUT_TO_IO> (or
I2S0_8CH_MCLKOUT) instead of <&cru I2S1_8CH_MCLKOUT> for assigned-clocks and
clocks?

In arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6v2.dts, the codec endpoint
es8389_p0 is connected to i2s0_8ch_p0_0 under i2s0_8ch, and the included
arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6.dtsi enables i2s0_8ch with the
i2s0_mclk pin muxed:

&i2s0_8ch {
	pinctrl-names = "default";
	pinctrl-0 = <&i2s0_lrck
		     &i2s0_mclk
		     &i2s0_sclk
		     &i2s0_sdi0
		     &i2s0_sdo0>;
	status = "okay";
};

For comparison, audio-codec@1b in
arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6v1.dts uses:

		assigned-clocks = <&cru I2S0_8CH_MCLKOUT_TO_IO>;
		assigned-clock-rates = <12288000>;
		clocks = <&cru I2S0_8CH_MCLKOUT_TO_IO>;

With I2S1_8CH_MCLKOUT specified here, of_clk_set_defaults(),
simple_util_parse_clk(), es8389_probe(), and es8389_set_bias_level() will
configure and gate the unused I2S1 MCLK clock branch rather than the I2S0
MCLK output driving the codec.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261101-nanopi-m6v2-v1-0-e401ea64b394@gmail.com?part=3

Re: [PATCH 2/3] arm64: dts: rockchip: rk3588s-nanopi: switch to generic eth phy compatible

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] arm64: dts: rockchip: per-PHY reset-gpios not deasserted before C22 ID read
--

commit 743d7222bfed74bfab2871d223949437c61ab32b
Author: Joachim Eastwood <joachim.eastwood@gmail.com>

arm64: dts: rockchip: rk3588s-nanopi: switch to generic eth phy compatible

This commit switches the rgmii_phy1 Ethernet PHY node in
rk3588s-nanopi.dtsi from the explicit RTL8211F PHY ID compatible
("ethernet-phy-id001c.c916") to the generic Clause 22 compatible
("ethernet-phy-ieee802.3-c22") to support the MotorComm YT8531C PHY on
NanoPi M6V2.

> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi.dtsi
> index 22b0cdee22b40..4977ccb668f39 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi.dtsi
> @@ -269,7 +269,7 @@ &i2s5_8ch {
>  
>  &mdio1 {
>  	rgmii_phy1: ethernet-phy@1 {
> -		compatible = "ethernet-phy-id001c.c916";
> +		compatible = "ethernet-phy-ieee802.3-c22";

[Severity: High]
Will this cause PHY registration to fail with -ENODEV when the reset GPIO is
still asserted during MDIO probe?

In arch/arm64/boot/dts/rockchip/rk3588s-nanopi.dtsi, rgmii_phy1 defines
per-PHY reset properties on the ethernet-phy@1 child node:

	rgmii_phy1: ethernet-phy@1 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <0x1>;
		pinctrl-names = "default";
		pinctrl-0 = <&rtl8211f_rst>;
		reset-assert-us = <20000>;
		reset-deassert-us = <100000>;
		reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
	};

With "ethernet-phy-ieee802.3-c22", fwnode_get_phy_id() returns -EINVAL, so
fwnode_mdiobus_register_phy() in drivers/net/mdio/fwnode_mdio.c calls
get_phy_device() -> get_phy_c22_id() to read MII_PHYSID1 and MII_PHYSID2 over
MDIO before fwnode_mdiobus_phy_device_register() associates the DT node:

	is_c45 = fwnode_device_is_compatible(child, "ethernet-phy-ieee802.3-c45");
	if (is_c45 || fwnode_get_phy_id(child, &phy_id))
		phy = get_phy_device(bus, addr, is_c45);
	else
		phy = phy_device_create(bus, addr, phy_id, 0, NULL);
	if (IS_ERR(phy)) {
		rc = PTR_ERR(phy);
		goto clean_mii_ts;
	}
	...
	} else if (is_of_node(child)) {
		rc = fwnode_mdiobus_phy_device_register(bus, phy, child, addr);

Per-PHY reset-gpios and pinctrl-0 are only acquired and deasserted later via
fwnode_mdiobus_phy_device_register() -> phy_device_register() in
drivers/net/phy/phy_device.c:

	err = mdiobus_register_device(&phydev->mdio);
	if (err)
		return err;

	/* Deassert the reset signal */
	phy_device_reset(phydev, 0);

If the bootloader leaves gpio3 RK_PB7 asserted at boot, or if the driver is
unbound and rebound (since phy_device_remove() calls phy_device_reset(phydev,
1) to assert the reset line), get_phy_c22_id() reads the PHY ID registers
while the PHY is held in hardware reset and fails with -ENODEV before
reset-gpios can ever be deasserted.

Note that the Rockchip vendor DTS only works with "ethernet-phy-ieee802.3-c22"
because it places legacy snps,reset-gpio on the gmac node, which
stmmac_mdio_reset() deasserts before scanning the MDIO bus.

As documented in Documentation/devicetree/bindings/net/ethernet-phy.yaml,
when a PHY requires a reset to be deasserted before its ID registers can be
read, shouldn't the compatible string keep the explicit "ethernet-phy-id..."
form (or be overridden in the M6V2 board DTS), or should the reset properties
be moved to the mdio1 bus node?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261101-nanopi-m6v2-v1-0-e401ea64b394@gmail.com?part=2

Re: [PATCH 1/3] dt-bindings: arm: rockchip: add FriendlyElec NanoPi M6V2

[Krzysztof Kozlowski]

On Sun, Nov 01, 2026 at 11:00:52PM +0100, Joachim Eastwood wrote:
> Add device tree binding documentation for FriendlyElec NanoPi M6V2,
> a single-board computer based on the Rockchip RK3588S SoC. This board
> is an updated version of the original M6 board with a few changes.
> 
> Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
> ---
>  Documentation/devicetree/bindings/arm/rockchip.yaml | 1 +
>  1 file changed, 1 insertion(+)

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>

Best regards,
Krzysztof