From: sashiko-bot@kernel.org
To: "Changhuang Liang" <changhuang.liang@starfivetech.com>
Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v1 RESEND 1/8] dt-bindings: pinctrl: Add starfive,jhb100-adc0-pinctrl
Date: Tue, 03 Nov 2026 10:29:39 +0000 [thread overview]
Message-ID: <sashiko-outbox-195052@kernel.org> (raw)
In-Reply-To: <20261103102236.96872-2-changhuang.liang@starfivetech.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] dt-bindings: pinctrl: jhb100-adc0: inverted resets item order vs example
--
commit 9d39373a8467ea55e837444aa5a8e524ca666cc8
Author: Changhuang Liang <changhuang.liang@starfivetech.com>
dt-bindings: pinctrl: Add starfive,jhb100-adc0-pinctrl
This commit adds the Device Tree binding schema for the StarFive JHB100
SoC ADC-0 pin controller.
> diff --git a/Documentation/devicetree/bindings/pinctrl/starfive,jhb100-adc0-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/starfive,jhb100-adc0-pinctrl.yaml
> new file mode 100644
> index 0000000000000..5b4b44c5776c1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/starfive,jhb100-adc0-pinctrl.yaml
> @@ -0,0 +1,168 @@
[ ... ]
> + resets:
> + items:
> + - description: ADC0 IOMUX
> + - description: ADC0 core
[ ... ]
> +examples:
> + - |
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + pinctrl_adc0: pinctrl@11bc2800 {
> + compatible = "starfive,jhb100-adc0-pinctrl";
> + reg = <0x0 0x11bc2800 0x0 0x400>;
> + clocks = <&per2crg 67>;
> + resets = <&per2crg 10>,
> + <&per2crg 11>;
[Severity: Low]
Is the order of items in properties.resets inverted relative to the example?
In properties.resets, the first positional reset is documented as ADC0 IOMUX
and the second as ADC0 core. However, the example passes reset 10 followed by
reset 11 from per2crg, and include/dt-bindings/reset/starfive,jhb100-crg.h
defines them in the opposite order:
#define JHB100_PER2RST_ADC0_PRESETN 10
#define JHB100_PER2RST_ADC0_IOMUX_PRESETN 11
While jhb100_pinctrl_probe() currently requests all resets together via
devm_reset_control_array_get_optional_shared(), any consumer indexing the
resets property by position according to the schema would target the wrong
reset line. Should the descriptions in properties.resets or the example be
swapped so they match?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261103102236.96872-1-changhuang.liang@starfivetech.com?part=1
next prev parent reply other threads:[~2026-11-03 10:29 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-03 10:22 [PATCH v1 RESEND 0/8] Add ADC, eMMC and VGA pinctrl for StarFive JHB100 SoC Changhuang Liang
2026-11-03 10:22 ` [PATCH v1 RESEND 1/8] dt-bindings: pinctrl: Add starfive,jhb100-adc0-pinctrl Changhuang Liang
2026-11-03 10:29 ` sashiko-bot [this message]
2026-11-03 10:22 ` [PATCH v1 RESEND 2/8] pinctrl: starfive: Add StarFive JHB100 adc0 controller driver Changhuang Liang
2026-11-03 10:22 ` [PATCH v1 RESEND 3/8] dt-bindings: pinctrl: Add starfive,jhb100-adc1-pinctrl Changhuang Liang
2026-11-03 10:30 ` sashiko-bot
2026-11-03 10:22 ` [PATCH v1 RESEND 4/8] pinctrl: starfive: Add StarFive JHB100 adc1 controller driver Changhuang Liang
2026-11-03 10:22 ` [PATCH v1 RESEND 5/8] dt-bindings: pinctrl: Add starfive,jhb100-emmc-pinctrl Changhuang Liang
2026-11-03 10:22 ` [PATCH v1 RESEND 6/8] pinctrl: starfive: Add StarFive JHB100 emmc controller driver Changhuang Liang
2026-11-03 10:22 ` [PATCH v1 RESEND 7/8] dt-bindings: pinctrl: Add starfive,jhb100-vga-pinctrl Changhuang Liang
2026-11-03 10:22 ` [PATCH v1 RESEND 8/8] pinctrl: starfive: Add StarFive JHB100 vga controller driver Changhuang Liang
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