Re: [PATCH 2/2] arm64: dts: allwinner: h6: orangepi: Enable CPU frequency scaling

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] arm64: dts: allwinner: h6: missing regulator-ramp-delay in orangepi.dtsi
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commit 756d3d30d1a6d15f42bf1d5d2b8437c122fdde4e
Author: Jernej Skrabec <jernej.skrabec@gmail.com>

arm64: dts: allwinner: h6: orangepi: Enable CPU frequency scaling

This commit includes sun50i-h6-cpu-opp.dtsi and sets cpu-supply on cpu0 to
reg_dcdca in sun50i-h6-orangepi.dtsi to enable CPU frequency scaling on the
Orange Pi One Plus and Lite2.

> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
> index 2948369cd659b..b7351b1db97c5 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
> @@ -5,6 +5,7 @@
>  /dts-v1/;
>  
>  #include "sun50i-h6.dtsi"
> +#include "sun50i-h6-cpu-opp.dtsi"
>  #include "sun50i-h6-gpu-opp.dtsi"
>  
>  #include <dt-bindings/gpio/gpio.h>
> @@ -65,6 +66,10 @@ reg_vcc5v: vcc5v {
>  	};
>  };
>  
> +&cpu0 {
> +	cpu-supply = <&reg_dcdca>;
> +};

[Severity: Medium]
Should reg_dcdca (and reg_dcdcc) in sun50i-h6-orangepi.dtsi also specify
regulator-ramp-delay = <2500>; now that voltage scaling is enabled on
reg_dcdca?

In sun50i-h6-orangepi.dtsi, reg_dcdca and reg_dcdcc currently omit
regulator-ramp-delay:

			reg_dcdca: dcdca {
				regulator-always-on;
				regulator-min-microvolt = <810000>;
				regulator-max-microvolt = <1080000>;
				regulator-name = "vdd-cpu";
			};

			reg_dcdcc: dcdcc {
				regulator-enable-ramp-delay = <32000>;
				regulator-min-microvolt = <810000>;
				regulator-max-microvolt = <1080000>;
				regulator-name = "vdd-gpu";
			};

In drivers/regulator/axp20x-regulator.c, the AXP806 DCDCA and DCDCC
descriptors are defined with AXP_DESC_RANGES(), which leaves desc->ramp_delay
at 0 and uses axp20x_ops_range without set_voltage_time or
set_voltage_time_sel callbacks.

When cpufreq-dt (or panfrost devfreq) scales up to a higher OPP via:

  dev_pm_opp_set_rate()
    -> _set_opp()
      -> _opp_config_regulator_single()
        -> _set_opp_voltage()
          -> regulator_set_voltage_triplet()
            -> _regulator_do_set_voltage()
              -> _regulator_set_voltage_time()

_regulator_set_voltage_time() checks:

	if (rdev->constraints->ramp_delay)
		ramp_delay = rdev->constraints->ramp_delay;
	else if (rdev->desc->ramp_delay)
		ramp_delay = rdev->desc->ramp_delay;

Without regulator-ramp-delay in the device tree, _regulator_set_voltage_time()
returns 0, so _regulator_do_set_voltage() skips waiting for the AXP805 buck
converter output voltage to ramp up before _opp_config_clk_single() calls
clk_set_rate() to switch the PLL to the higher frequency.

Other AXP805-based H6 board device trees (including sun50i-h6-orangepi-3.dts
in commit ebae33c3f6cee9, sun50i-h6-beelink-gs1.dts in commit 67533f873ad7e2,
sun50i-h6-pine-h64.dts in commit fe79ea577be81e, and
sun50i-h6-taiqicat-a01.dts) set regulator-ramp-delay = <2500>; on reg_dcdca
and reg_dcdcc.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261104184940.882833-1-jernej.skrabec@gmail.com?part=2