[PATCH] arm64: dts: rockchip: use rgmii-id for LubanCat 4 gmac1

[PATCH] arm64: dts: rockchip: use rgmii-id for LubanCat 4 gmac1

[Pufan Jin]

The LubanCat 4 PCB adds ~2ns of trace delay on both TXC and RXC, but
that alone is not sufficient for reliable RGMII operation.  With
phy-mode = "rgmii" and zero MAC delays the link comes up at 1Gbps but
drops ~90% of the packets; the PHY's internal TX/RX delay is required.

Use phy-mode = "rgmii-id" and keep the MAC's default delays.  With
this configuration a direct link to another 1Gbps NIC passes 2GB in
each direction with iperf3 at ~859-905Mbps, 0% packet loss, and no
CRC or error counters.

Fixes: 6d9430d58714 ("arm64: dts: rockchip: Add EmbedFire LubanCat 4 board")
Signed-off-by: Pufan Jin <cyan2254650260@gmail.com>
---
 arch/arm64/boot/dts/rockchip/rk3588s-lubancat-4.dts | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-lubancat-4.dts b/arch/arm64/boot/dts/rockchip/rk3588s-lubancat-4.dts
index 0d28c6165..a042aa702 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-lubancat-4.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-lubancat-4.dts
@@ -168,12 +168,13 @@ &gmac1 {
 	clock_in_out = "output";
 	phy-handle = <&rgmii_phy1>;
 	/*
-	 * The PCB adds ~2ns of trace delay on both TXC and RXC, so the
-	 * required RGMII clock skew is provided by the board itself.
-	 * Neither the MAC nor the PHY should add any internal delay,
-	 * hence "rgmii" (not "rgmii-id") is correct here.
+	 * The PCB adds ~2ns of trace delay on both TXC and RXC, but that
+	 * alone is not sufficient for reliable RGMII operation: with
+	 * "rgmii" and zero MAC delays the link shows ~90% packet loss.
+	 * The PHY's internal TX/RX delay is required, so use "rgmii-id"
+	 * and keep the MAC's default delays.
 	 */
-	phy-mode = "rgmii";
+	phy-mode = "rgmii-id";
 	pinctrl-0 = <&gmac1_miim
 		     &gmac1_tx_bus2
 		     &gmac1_rx_bus2
-- 
2.56.0

Re: [PATCH] arm64: dts: rockchip: use rgmii-id for LubanCat 4 gmac1

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Low] arm64: dts: rockchip: inaccurate MAC delay comment for rgmii-id
  in gmac1
--

commit 36ad97aa6620e705c8d483b7d079ee580a180c77
Author: Pufan Jin <cyan2254650260@gmail.com>

arm64: dts: rockchip: use rgmii-id for LubanCat 4 gmac1

This commit changes phy-mode for gmac1 on the LubanCat 4 board from
"rgmii" to "rgmii-id" to resolve packet loss on the RGMII link.

> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-lubancat-4.dts b/arch/arm64/boot/dts/rockchip/rk3588s-lubancat-4.dts
> index 0d28c616524fe..a042aa7021ffd 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588s-lubancat-4.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s-lubancat-4.dts
> @@ -168,12 +168,13 @@ &gmac1 {
>  	clock_in_out = "output";
>  	phy-handle = <&rgmii_phy1>;
>  	/*
> -	 * The PCB adds ~2ns of trace delay on both TXC and RXC, so the
> -	 * required RGMII clock skew is provided by the board itself.
> -	 * Neither the MAC nor the PHY should add any internal delay,
> -	 * hence "rgmii" (not "rgmii-id") is correct here.
> +	 * The PCB adds ~2ns of trace delay on both TXC and RXC, but that
> +	 * alone is not sufficient for reliable RGMII operation: with
> +	 * "rgmii" and zero MAC delays the link shows ~90% packet loss.
> +	 * The PHY's internal TX/RX delay is required, so use "rgmii-id"
> +	 * and keep the MAC's default delays.
>  	 */
> -	phy-mode = "rgmii";
> +	phy-mode = "rgmii-id";

[Severity: Low]
Is this comment (and the commit message) accurate about how dwmac-rk
configures MAC delays in "rgmii" versus "rgmii-id" mode?

When tx_delay and rx_delay are omitted from the DT node, rk_gmac_setup()
initializes bsp_priv->tx_delay = 0x30 and bsp_priv->rx_delay = 0x10.
In rk_gmac_powerup(), "rgmii" programs those 0x30/0x10 fallback delays
into the MAC, whereas "rgmii-id" ignores them and forces the MAC delays to
(0, 0):

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c:rk_gmac_powerup() {
    ...
	case PHY_INTERFACE_MODE_RGMII:
		dev_info(dev, "init for RGMII\n");
		if (bsp_priv->ops->set_to_rgmii)
			bsp_priv->ops->set_to_rgmii(bsp_priv,
						    bsp_priv->tx_delay,
						    bsp_priv->rx_delay);
		break;
	case PHY_INTERFACE_MODE_RGMII_ID:
		dev_info(dev, "init for RGMII_ID\n");
		if (bsp_priv->ops->set_to_rgmii)
			bsp_priv->ops->set_to_rgmii(bsp_priv, 0, 0);
		break;
    ...
}

Switching to "rgmii-id" zeroes the MAC delays while enabling the PHY's
internal TX/RX delays, rather than keeping the MAC's default delays.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261109191515.252449-1-cyan2254650260@gmail.com?part=1

Re: [PATCH] arm64: dts: rockchip: use rgmii-id for LubanCat 4 gmac1

[Andrew Lunn]

On Tue, Nov 10, 2026 at 03:15:15AM +0800, Pufan Jin wrote:
> The LubanCat 4 PCB adds ~2ns of trace delay on both TXC and RXC, but
> that alone is not sufficient for reliable RGMII operation.  With
> phy-mode = "rgmii" and zero MAC delays the link comes up at 1Gbps but
> drops ~90% of the packets; the PHY's internal TX/RX delay is required.

Sorry, but this does not make sense. 4ns of delay is 2ns too many.

You need a proper explanation of what is going on here.

    Andrew

Re: [PATCH] arm64: dts: rockchip: use rgmii-id for LubanCat 4 gmac1

[Pufan Jin]

On 2026/11/10 03:55, Andrew Lunn wrote:

> On Tue, Nov 10, 2026 at 03:15:15AM +0800, Pufan Jin wrote:
>> The LubanCat 4 PCB adds ~2ns of trace delay on both TXC and RXC, but
>> that alone is not sufficient for reliable RGMII operation.  With
>> phy-mode = "rgmii" and zero MAC delays the link comes up at 1Gbps but
>> drops ~90% of the packets; the PHY's internal TX/RX delay is required.
> Sorry, but this does not make sense. 4ns of delay is 2ns too many.
>
> You need a proper explanation of what is going on here.
>
>      Andrew

Hi Andrew,

The old comment was wrong. Here is what is actually happening on the
board, with measurements.

Conf A: phy-mode = "rgmii", no tx_delay/rx_delay in the DT.
dwmac-rk programs its defaults tx_delay = 0x30, rx_delay = 0x10; the
PHY's internal delays are disabled. On the board's direct 1Gbps link:

   host -> board ping:  200 sent, 20 received, 90% loss
   board -> host ping:  200 sent, 19 received, 90.5% loss
   mmc_rx_crc_error:    118

Conf B: phy-mode = "rgmii-id".
dwmac-rk programs (0, 0) into the MAC; the PHY inserts its internal
2ns TX/RX delays. On the same direct link:

   host -> board ping:  200/200, 0% loss
   board -> host ping:  200/200, 0% loss
   iperf3 TX:           921 Mbps
   iperf3 RX:           941 Mbps
   mmc_rx_crc_error:    0

The vendor BSP DTS for this board is:

     phy-mode = "rgmii-rxid";
     tx_delay = <0x1b>;
     /* rx_delay = <0x00>; */
     rtl8211f,tx-delay = <0x1b>;

The vendor configures an explicit MAC TX delay and PHY TX/RX delays.
The mainline RTL8211F driver only supports the standard 2ns TX/RX
enable selected by phy-mode; it cannot program the vendor's
fine-grained rtl8211f,tx-delay. With "rgmii-id" the PHY provides the
2ns TX/RX clock delay and the MAC delays are zero, which is the tested
mainline configuration.

The "PCB adds ~2ns" text was never measured and is removed. I will
follow up with a v2 containing the corrected comment and these
measurements.

Pufan