From: sashiko-bot@kernel.org
To: "Ali Rouhi" <arouhi@sitime.com>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH net-next v15 12/13] dpll: sit9531x: add support to get phase offset on the connected input pin
Date: Wed, 11 Nov 2026 20:26:55 +0000 [thread overview]
Message-ID: <sashiko-outbox-209663@kernel.org> (raw)
In-Reply-To: <20261110202607.55744-13-arouhi@sitime.com>
Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Low] dpll: sit9531x: track key_pending in
sit9531x_chan_routed_ref_read()
--
commit 4157ae757748960930773aef1f00d28b5cffb1f4
Author: Oleg Zadorozhnyi <Oleg.Zadorozhnyi@devoxsoftware.com>
dpll: sit9531x: add support to get phase offset on the connected input pin
This commit adds phase_offset_get support for SiT9531x input pins by reading
the phase difference between a PLL and its active reference from the on-chip
time-to-digital converter via the debug registers.
> diff --git a/drivers/dpll/sit9531x/dpll.c b/drivers/dpll/sit9531x/dpll.c
> index e6271ebd47ac1..ba4ac5e7d365d 100644
> --- a/drivers/dpll/sit9531x/dpll.c
> +++ b/drivers/dpll/sit9531x/dpll.c
> @@ -488,6 +488,122 @@ sit9531x_dpll_input_pin_prio_set(const struct dpll_pin *pin, void *pin_priv,
> return 0;
> }
>
> +/*
> + * Report the loop's residual phase error, sampled with the loop closed. The TDC
> + * compares against a signal the PLL drives, so a PLL driving no output returns
> + * -ENODATA.
> + */
> +static int
> +sit9531x_dpll_input_pin_phase_offset_get(const struct dpll_pin *pin,
> + void *pin_priv,
> + const struct dpll_device *dpll,
> + void *dpll_priv, s64 *phase_offset,
> + struct netlink_ext_ack *extack)
> +{
[ ... ]
> + rc = sit9531x_chan_routed_ref_read(sitdev, sitdpll->id, &routed);
> + if (!rc && routed == dpin->id) {
> + rc = sit9531x_phase_offset_read(sitdev, sitdpll->id, &offset);
> + if (!rc)
> + rc = sit9531x_chan_routed_ref_read(sitdev, sitdpll->id,
> + &routed);
> + if (!rc && routed != dpin->id)
> + rc = -ENODATA;
> + } else if (!rc) {
> + rc = -ENODATA;
> + }
[Severity: Low]
Should sit9531x_chan_routed_ref_read() also update chan->key_pending when
re-locking SIT9531X_PLL_REG_DEBUG?
sit9531x_phase_offset_read() updates chan->key_pending when closing the
debug window, but sit9531x_chan_routed_ref_read() unlocks and re-locks the
same register without updating chan->key_pending:
drivers/dpll/sit9531x/core.c:sit9531x_chan_routed_ref_read() {
...
relock:
lock_rc = sit9531x_write_pll_close(sitdev, pll_idx,
SIT9531X_PLL_REG_DEBUG,
SIT9531X_PLL_DEBUG_LOCK);
return rc ? rc : lock_rc;
}
If sit9531x_phase_offset_read() closes the debug window (setting
chan->key_pending to false) and the immediately following
sit9531x_chan_routed_ref_read() fails to re-lock SIT9531X_PLL_REG_DEBUG,
the PLL debug window remains open with chan->key_pending left false, so
sit9531x_tap_back_retry() and sit9531x_tap_pending_retry() will skip
closing it.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261110202607.55744-1-arouhi@sitime.com?part=12
next prev parent reply other threads:[~2026-11-11 20:26 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-10 20:26 [PATCH net-next v15 00/13] dpll: add SiTime SiT9531x DPLL clock driver Ali Rouhi
2026-11-10 20:26 ` [PATCH net-next v15 01/13] dpll: omit pin phase attributes the driver has no value for Ali Rouhi
2026-11-11 15:35 ` Ivan Vecera
2026-11-10 20:26 ` [PATCH net-next v15 02/13] dt-bindings: vendor-prefixes: add SiTime Corporation Ali Rouhi
2026-11-10 20:26 ` [PATCH net-next v15 04/13] dpll: add basic SiTime SiT9531x support Ali Rouhi
2026-11-10 20:26 ` [PATCH net-next v15 03/13] dt-bindings: dpll: add SiTime SiT95316 clock generator Ali Rouhi
2026-11-10 20:26 ` [PATCH net-next v15 06/13] dpll: sit9531x: register DPLL devices and pins Ali Rouhi
2026-11-10 20:26 ` [PATCH net-next v15 05/13] dpll: sit9531x: read DPLL types and pin properties from system firmware Ali Rouhi
2026-11-10 20:26 ` [PATCH net-next v15 07/13] dpll: sit9531x: implement input pin state on a DPLL Ali Rouhi
2026-11-11 20:26 ` sashiko-bot
2026-11-10 20:26 ` [PATCH net-next v15 09/13] dpll: sit9531x: add support to get and set frequency on pins Ali Rouhi
2026-11-10 20:26 ` [PATCH net-next v15 08/13] dpll: sit9531x: add support to get and set priority on input pins Ali Rouhi
2026-11-10 20:26 ` [PATCH net-next v15 10/13] dpll: sit9531x: implement output pin state on a DPLL Ali Rouhi
2026-11-11 20:26 ` sashiko-bot
2026-11-10 20:26 ` [PATCH net-next v15 12/13] dpll: sit9531x: add support to get phase offset on the connected input pin Ali Rouhi
2026-11-11 20:26 ` sashiko-bot [this message]
2026-11-10 20:26 ` [PATCH net-next v15 11/13] dpll: sit9531x: add support to adjust output phase Ali Rouhi
2026-11-11 20:26 ` sashiko-bot
2026-11-10 20:26 ` [PATCH net-next v15 13/13] dpll: sit9531x: model the inter-PLL sync line as a pair of pins Ali Rouhi
2026-11-11 20:26 ` sashiko-bot
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