* [PATCH v7 00/15] dma-fence: Deadline awareness
@ 2023-02-27 19:35 Rob Clark
2023-02-27 19:35 ` [PATCH v7 01/15] dma-buf/dma-fence: Add deadline awareness Rob Clark
2023-02-28 12:42 ` [PATCH v7 00/15] dma-fence: Deadline awareness Bagas Sanjaya
0 siblings, 2 replies; 8+ messages in thread
From: Rob Clark @ 2023-02-27 19:35 UTC (permalink / raw)
To: dri-devel
Cc: freedreno, Daniel Vetter, Christian König,
Michel Dänzer, Tvrtko Ursulin, Rodrigo Vivi, Alex Deucher,
Pekka Paalanen, Simon Ser, Luben Tuikov, Rob Clark, Abhinav Kumar,
Dmitry Baryshkov, Douglas Anderson, Gustavo Padovan, intel-gfx,
moderated list:DMA BUFFER SHARING FRAMEWORK,
open list:DRM DRIVER FOR MSM ADRENO GPU, open list:DOCUMENTATION,
open list, open list:DMA BUFFER SHARING FRAMEWORK, Liu Shixin,
Sean Paul, Stephen Boyd, Vinod Polimera
From: Rob Clark <robdclark@chromium.org>
This series adds a deadline hint to fences, so realtime deadlines
such as vblank can be communicated to the fence signaller for power/
frequency management decisions.
This is partially inspired by a trick i915 does, but implemented
via dma-fence for a couple of reasons:
1) To continue to be able to use the atomic helpers
2) To support cases where display and gpu are different drivers
This iteration adds a dma-fence ioctl to set a deadline (both to
support igt-tests, and compositors which delay decisions about which
client buffer to display), and a sw_sync ioctl to read back the
deadline. IGT tests utilizing these can be found at:
https://gitlab.freedesktop.org/robclark/igt-gpu-tools/-/commits/fence-deadline
v1: https://patchwork.freedesktop.org/series/93035/
v2: Move filtering out of later deadlines to fence implementation
to avoid increasing the size of dma_fence
v3: Add support in fence-array and fence-chain; Add some uabi to
support igt tests and userspace compositors.
v4: Rebase, address various comments, and add syncobj deadline
support, and sync_file EPOLLPRI based on experience with perf/
freq issues with clvk compute workloads on i915 (anv)
v5: Clarify that this is a hint as opposed to a more hard deadline
guarantee, switch to using u64 ns values in UABI (still absolute
CLOCK_MONOTONIC values), drop syncobj related cap and driver
feature flag in favor of allowing count_handles==0 for probing
kernel support.
v6: Re-work vblank helper to calculate time of _start_ of vblank,
and work correctly if the last vblank event was more than a
frame ago. Add (mostly unrelated) drm/msm patch which also
uses the vblank helper. Use dma_fence_chain_contained(). More
verbose syncobj UABI comments. Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT.
v7: Fix kbuild complaints about vblank helper. Add more docs.
Rob Clark (15):
dma-buf/dma-fence: Add deadline awareness
dma-buf/fence-array: Add fence deadline support
dma-buf/fence-chain: Add fence deadline support
dma-buf/dma-resv: Add a way to set fence deadline
dma-buf/sync_file: Add SET_DEADLINE ioctl
dma-buf/sync_file: Support (E)POLLPRI
dma-buf/sw_sync: Add fence deadline support
drm/scheduler: Add fence deadline support
drm/syncobj: Add deadline support for syncobj waits
drm/vblank: Add helper to get next vblank time
drm/atomic-helper: Set fence deadline for vblank
drm/msm: Add deadline based boost support
drm/msm: Add wait-boost support
drm/msm/atomic: Switch to vblank_start helper
drm/i915: Add deadline based boost support
Documentation/driver-api/dma-buf.rst | 6 ++
drivers/dma-buf/dma-fence-array.c | 11 ++++
drivers/dma-buf/dma-fence-chain.c | 12 ++++
drivers/dma-buf/dma-fence.c | 60 ++++++++++++++++++++
drivers/dma-buf/dma-resv.c | 22 ++++++++
drivers/dma-buf/sw_sync.c | 58 +++++++++++++++++++
drivers/dma-buf/sync_debug.h | 2 +
drivers/dma-buf/sync_file.c | 27 +++++++++
drivers/gpu/drm/drm_atomic_helper.c | 36 ++++++++++++
drivers/gpu/drm/drm_syncobj.c | 64 ++++++++++++++++-----
drivers/gpu/drm/drm_vblank.c | 53 +++++++++++++++---
drivers/gpu/drm/i915/i915_request.c | 20 +++++++
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 15 -----
drivers/gpu/drm/msm/msm_atomic.c | 8 ++-
drivers/gpu/drm/msm/msm_drv.c | 12 ++--
drivers/gpu/drm/msm/msm_fence.c | 74 +++++++++++++++++++++++++
drivers/gpu/drm/msm/msm_fence.h | 20 +++++++
drivers/gpu/drm/msm/msm_gem.c | 5 ++
drivers/gpu/drm/msm/msm_kms.h | 8 ---
drivers/gpu/drm/scheduler/sched_fence.c | 46 +++++++++++++++
drivers/gpu/drm/scheduler/sched_main.c | 2 +-
include/drm/drm_vblank.h | 1 +
include/drm/gpu_scheduler.h | 17 ++++++
include/linux/dma-fence.h | 20 +++++++
include/linux/dma-resv.h | 2 +
include/uapi/drm/drm.h | 17 ++++++
include/uapi/drm/msm_drm.h | 14 ++++-
include/uapi/linux/sync_file.h | 26 +++++++++
28 files changed, 603 insertions(+), 55 deletions(-)
--
2.39.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v7 01/15] dma-buf/dma-fence: Add deadline awareness
2023-02-27 19:35 [PATCH v7 00/15] dma-fence: Deadline awareness Rob Clark
@ 2023-02-27 19:35 ` Rob Clark
2023-02-28 9:21 ` Pekka Paalanen
2023-03-01 3:50 ` Bagas Sanjaya
2023-02-28 12:42 ` [PATCH v7 00/15] dma-fence: Deadline awareness Bagas Sanjaya
1 sibling, 2 replies; 8+ messages in thread
From: Rob Clark @ 2023-02-27 19:35 UTC (permalink / raw)
To: dri-devel
Cc: freedreno, Daniel Vetter, Christian König,
Michel Dänzer, Tvrtko Ursulin, Rodrigo Vivi, Alex Deucher,
Pekka Paalanen, Simon Ser, Luben Tuikov, Rob Clark,
Christian König, Sumit Semwal, Jonathan Corbet,
Gustavo Padovan, open list:DMA BUFFER SHARING FRAMEWORK,
moderated list:DMA BUFFER SHARING FRAMEWORK,
open list:DOCUMENTATION, open list
From: Rob Clark <robdclark@chromium.org>
Add a way to hint to the fence signaler of an upcoming deadline, such as
vblank, which the fence waiter would prefer not to miss. This is to aid
the fence signaler in making power management decisions, like boosting
frequency as the deadline approaches and awareness of missing deadlines
so that can be factored in to the frequency scaling.
v2: Drop dma_fence::deadline and related logic to filter duplicate
deadlines, to avoid increasing dma_fence size. The fence-context
implementation will need similar logic to track deadlines of all
the fences on the same timeline. [ckoenig]
v3: Clarify locking wrt. set_deadline callback
v4: Clarify in docs comment that this is a hint
v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT.
v6: More docs
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
Documentation/driver-api/dma-buf.rst | 6 +++
drivers/dma-buf/dma-fence.c | 59 ++++++++++++++++++++++++++++
include/linux/dma-fence.h | 20 ++++++++++
3 files changed, 85 insertions(+)
diff --git a/Documentation/driver-api/dma-buf.rst b/Documentation/driver-api/dma-buf.rst
index 622b8156d212..183e480d8cea 100644
--- a/Documentation/driver-api/dma-buf.rst
+++ b/Documentation/driver-api/dma-buf.rst
@@ -164,6 +164,12 @@ DMA Fence Signalling Annotations
.. kernel-doc:: drivers/dma-buf/dma-fence.c
:doc: fence signalling annotation
+DMA Fence Deadline Hints
+~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. kernel-doc:: drivers/dma-buf/dma-fence.c
+ :doc: deadline hints
+
DMA Fences Functions Reference
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c
index 0de0482cd36e..e103e821d993 100644
--- a/drivers/dma-buf/dma-fence.c
+++ b/drivers/dma-buf/dma-fence.c
@@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct dma_fence **fences, uint32_t count,
}
EXPORT_SYMBOL(dma_fence_wait_any_timeout);
+/**
+ * DOC: deadline hints
+ *
+ * In an ideal world, it would be possible to pipeline a workload sufficiently
+ * that a utilization based device frequency governor could arrive at a minimum
+ * frequency that meets the requirements of the use-case, in order to minimize
+ * power consumption. But in the real world there are many workloads which
+ * defy this ideal. For example, but not limited to:
+ *
+ * * Workloads that ping-pong between device and CPU, with alternating periods
+ * of CPU waiting for device, and device waiting on CPU. This can result in
+ * devfreq and cpufreq seeing idle time in their respective domains and in
+ * result reduce frequency.
+ *
+ * * Workloads that interact with a periodic time based deadline, such as double
+ * buffered GPU rendering vs vblank sync'd page flipping. In this scenario,
+ * missing a vblank deadline results in an *increase* in idle time on the GPU
+ * (since it has to wait an additional vblank period), sending a single to
+ * the GPU's devfreq to reduce frequency, when in fact the opposite is what is
+ * needed.
+ *
+ * To this end, deadline hint(s) can be set on a &dma_fence via &dma_fence_set_deadline.
+ * The deadline hint provides a way for the waiting driver, or userspace, to
+ * convey an appropriate sense of urgency to the signaling driver.
+ *
+ * A deadline hint is given in absolute ktime (CLOCK_MONOTONIC for userspace
+ * facing APIs). The time could either be some point in the future (such as
+ * the vblank based deadline for page-flipping, or the start of a compositor's
+ * composition cycle), or the current time to indicate an immediate deadline
+ * hint (Ie. forward progress cannot be made until this fence is signaled).
+ *
+ * Multiple deadlines may be set on a given fence, even in parallel. See the
+ * documentation for &dma_fence_ops.set_deadline.
+ *
+ * The deadline hint is just that, a hint. The driver that created the fence
+ * may react by increasing frequency, making different scheduling choices, etc.
+ * Or doing nothing at all.
+ */
+
+/**
+ * dma_fence_set_deadline - set desired fence-wait deadline hint
+ * @fence: the fence that is to be waited on
+ * @deadline: the time by which the waiter hopes for the fence to be
+ * signaled
+ *
+ * Give the fence signaler a hint about an upcoming deadline, such as
+ * vblank, by which point the waiter would prefer the fence to be
+ * signaled by. This is intended to give feedback to the fence signaler
+ * to aid in power management decisions, such as boosting GPU frequency
+ * if a periodic vblank deadline is approaching but the fence is not
+ * yet signaled..
+ */
+void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline)
+{
+ if (fence->ops->set_deadline && !dma_fence_is_signaled(fence))
+ fence->ops->set_deadline(fence, deadline);
+}
+EXPORT_SYMBOL(dma_fence_set_deadline);
+
/**
* dma_fence_describe - Dump fence describtion into seq_file
* @fence: the 6fence to describe
diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.h
index 775cdc0b4f24..87c0d846dbb4 100644
--- a/include/linux/dma-fence.h
+++ b/include/linux/dma-fence.h
@@ -257,6 +257,24 @@ struct dma_fence_ops {
*/
void (*timeline_value_str)(struct dma_fence *fence,
char *str, int size);
+
+ /**
+ * @set_deadline:
+ *
+ * Callback to allow a fence waiter to inform the fence signaler of
+ * an upcoming deadline, such as vblank, by which point the waiter
+ * would prefer the fence to be signaled by. This is intended to
+ * give feedback to the fence signaler to aid in power management
+ * decisions, such as boosting GPU frequency.
+ *
+ * This is called without &dma_fence.lock held, it can be called
+ * multiple times and from any context. Locking is up to the callee
+ * if it has some state to manage. If multiple deadlines are set,
+ * the expectation is to track the soonest one.
+ *
+ * This callback is optional.
+ */
+ void (*set_deadline)(struct dma_fence *fence, ktime_t deadline);
};
void dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,
@@ -583,6 +601,8 @@ static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr)
return ret < 0 ? ret : 0;
}
+void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline);
+
struct dma_fence *dma_fence_get_stub(void);
struct dma_fence *dma_fence_allocate_private_stub(void);
u64 dma_fence_context_alloc(unsigned num);
--
2.39.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v7 01/15] dma-buf/dma-fence: Add deadline awareness
2023-02-27 19:35 ` [PATCH v7 01/15] dma-buf/dma-fence: Add deadline awareness Rob Clark
@ 2023-02-28 9:21 ` Pekka Paalanen
2023-02-28 17:32 ` Rob Clark
2023-03-01 3:50 ` Bagas Sanjaya
1 sibling, 1 reply; 8+ messages in thread
From: Pekka Paalanen @ 2023-02-28 9:21 UTC (permalink / raw)
To: Rob Clark
Cc: dri-devel, freedreno, Daniel Vetter, Christian König,
Michel Dänzer, Tvrtko Ursulin, Rodrigo Vivi, Alex Deucher,
Simon Ser, Luben Tuikov, Rob Clark, Christian König,
Sumit Semwal, Jonathan Corbet, Gustavo Padovan,
open list:DMA BUFFER SHARING FRAMEWORK,
moderated list:DMA BUFFER SHARING FRAMEWORK,
open list:DOCUMENTATION, open list
[-- Attachment #1: Type: text/plain, Size: 7330 bytes --]
On Mon, 27 Feb 2023 11:35:07 -0800
Rob Clark <robdclark@gmail.com> wrote:
> From: Rob Clark <robdclark@chromium.org>
>
> Add a way to hint to the fence signaler of an upcoming deadline, such as
> vblank, which the fence waiter would prefer not to miss. This is to aid
> the fence signaler in making power management decisions, like boosting
> frequency as the deadline approaches and awareness of missing deadlines
> so that can be factored in to the frequency scaling.
>
> v2: Drop dma_fence::deadline and related logic to filter duplicate
> deadlines, to avoid increasing dma_fence size. The fence-context
> implementation will need similar logic to track deadlines of all
> the fences on the same timeline. [ckoenig]
> v3: Clarify locking wrt. set_deadline callback
> v4: Clarify in docs comment that this is a hint
> v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT.
> v6: More docs
>
> Signed-off-by: Rob Clark <robdclark@chromium.org>
> Reviewed-by: Christian König <christian.koenig@amd.com>
> ---
> Documentation/driver-api/dma-buf.rst | 6 +++
> drivers/dma-buf/dma-fence.c | 59 ++++++++++++++++++++++++++++
> include/linux/dma-fence.h | 20 ++++++++++
> 3 files changed, 85 insertions(+)
>
> diff --git a/Documentation/driver-api/dma-buf.rst b/Documentation/driver-api/dma-buf.rst
> index 622b8156d212..183e480d8cea 100644
> --- a/Documentation/driver-api/dma-buf.rst
> +++ b/Documentation/driver-api/dma-buf.rst
> @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations
> .. kernel-doc:: drivers/dma-buf/dma-fence.c
> :doc: fence signalling annotation
>
> +DMA Fence Deadline Hints
> +~~~~~~~~~~~~~~~~~~~~~~~~
> +
> +.. kernel-doc:: drivers/dma-buf/dma-fence.c
> + :doc: deadline hints
> +
> DMA Fences Functions Reference
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>
> diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c
> index 0de0482cd36e..e103e821d993 100644
> --- a/drivers/dma-buf/dma-fence.c
> +++ b/drivers/dma-buf/dma-fence.c
> @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct dma_fence **fences, uint32_t count,
> }
> EXPORT_SYMBOL(dma_fence_wait_any_timeout);
>
> +/**
> + * DOC: deadline hints
> + *
> + * In an ideal world, it would be possible to pipeline a workload sufficiently
> + * that a utilization based device frequency governor could arrive at a minimum
> + * frequency that meets the requirements of the use-case, in order to minimize
> + * power consumption. But in the real world there are many workloads which
> + * defy this ideal. For example, but not limited to:
> + *
> + * * Workloads that ping-pong between device and CPU, with alternating periods
> + * of CPU waiting for device, and device waiting on CPU. This can result in
> + * devfreq and cpufreq seeing idle time in their respective domains and in
> + * result reduce frequency.
> + *
> + * * Workloads that interact with a periodic time based deadline, such as double
> + * buffered GPU rendering vs vblank sync'd page flipping. In this scenario,
> + * missing a vblank deadline results in an *increase* in idle time on the GPU
> + * (since it has to wait an additional vblank period), sending a single to
Hi Rob,
s/single/signal/ ?
> + * the GPU's devfreq to reduce frequency, when in fact the opposite is what is
> + * needed.
> + *
> + * To this end, deadline hint(s) can be set on a &dma_fence via &dma_fence_set_deadline.
> + * The deadline hint provides a way for the waiting driver, or userspace, to
> + * convey an appropriate sense of urgency to the signaling driver.
> + *
> + * A deadline hint is given in absolute ktime (CLOCK_MONOTONIC for userspace
> + * facing APIs). The time could either be some point in the future (such as
> + * the vblank based deadline for page-flipping, or the start of a compositor's
> + * composition cycle), or the current time to indicate an immediate deadline
> + * hint (Ie. forward progress cannot be made until this fence is signaled).
As "current time" not a special value, but just an absolute timestamp
like any other, deadlines already in the past must also be accepted?
> + *
> + * Multiple deadlines may be set on a given fence, even in parallel. See the
> + * documentation for &dma_fence_ops.set_deadline.
> + *
> + * The deadline hint is just that, a hint. The driver that created the fence
> + * may react by increasing frequency, making different scheduling choices, etc.
> + * Or doing nothing at all.
> + */
Yes! Thank you for writing this! Well explained.
> +
> +/**
> + * dma_fence_set_deadline - set desired fence-wait deadline hint
> + * @fence: the fence that is to be waited on
> + * @deadline: the time by which the waiter hopes for the fence to be
> + * signaled
> + *
> + * Give the fence signaler a hint about an upcoming deadline, such as
> + * vblank, by which point the waiter would prefer the fence to be
> + * signaled by. This is intended to give feedback to the fence signaler
> + * to aid in power management decisions, such as boosting GPU frequency
> + * if a periodic vblank deadline is approaching but the fence is not
> + * yet signaled..
> + */
> +void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline)
> +{
> + if (fence->ops->set_deadline && !dma_fence_is_signaled(fence))
> + fence->ops->set_deadline(fence, deadline);
> +}
> +EXPORT_SYMBOL(dma_fence_set_deadline);
> +
> /**
> * dma_fence_describe - Dump fence describtion into seq_file
> * @fence: the 6fence to describe
> diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.h
> index 775cdc0b4f24..87c0d846dbb4 100644
> --- a/include/linux/dma-fence.h
> +++ b/include/linux/dma-fence.h
> @@ -257,6 +257,24 @@ struct dma_fence_ops {
> */
> void (*timeline_value_str)(struct dma_fence *fence,
> char *str, int size);
> +
> + /**
> + * @set_deadline:
> + *
> + * Callback to allow a fence waiter to inform the fence signaler of
> + * an upcoming deadline, such as vblank, by which point the waiter
> + * would prefer the fence to be signaled by. This is intended to
> + * give feedback to the fence signaler to aid in power management
> + * decisions, such as boosting GPU frequency.
> + *
> + * This is called without &dma_fence.lock held, it can be called
> + * multiple times and from any context. Locking is up to the callee
> + * if it has some state to manage. If multiple deadlines are set,
> + * the expectation is to track the soonest one.
> + *
> + * This callback is optional.
> + */
> + void (*set_deadline)(struct dma_fence *fence, ktime_t deadline);
> };
>
> void dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,
> @@ -583,6 +601,8 @@ static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr)
> return ret < 0 ? ret : 0;
> }
>
> +void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline);
> +
> struct dma_fence *dma_fence_get_stub(void);
> struct dma_fence *dma_fence_allocate_private_stub(void);
> u64 dma_fence_context_alloc(unsigned num);
This is exactly what I wanted to see. Already
Acked-by: Pekka Paalanen <pekka.paalanen@collabora.com>
Thanks,
pq
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^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v7 00/15] dma-fence: Deadline awareness
2023-02-27 19:35 [PATCH v7 00/15] dma-fence: Deadline awareness Rob Clark
2023-02-27 19:35 ` [PATCH v7 01/15] dma-buf/dma-fence: Add deadline awareness Rob Clark
@ 2023-02-28 12:42 ` Bagas Sanjaya
2023-02-28 15:44 ` Rob Clark
1 sibling, 1 reply; 8+ messages in thread
From: Bagas Sanjaya @ 2023-02-28 12:42 UTC (permalink / raw)
To: Rob Clark, dri-devel
Cc: freedreno, Daniel Vetter, Christian König,
Michel Dänzer, Tvrtko Ursulin, Rodrigo Vivi, Alex Deucher,
Pekka Paalanen, Simon Ser, Luben Tuikov, Rob Clark, Abhinav Kumar,
Dmitry Baryshkov, Douglas Anderson, Gustavo Padovan, intel-gfx,
moderated list:DMA BUFFER SHARING FRAMEWORK,
open list:DRM DRIVER FOR MSM ADRENO GPU, open list:DOCUMENTATION,
open list, open list:DMA BUFFER SHARING FRAMEWORK, Liu Shixin,
Sean Paul, Stephen Boyd, Vinod Polimera
[-- Attachment #1: Type: text/plain, Size: 2319 bytes --]
On Mon, Feb 27, 2023 at 11:35:06AM -0800, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org>
>
> This series adds a deadline hint to fences, so realtime deadlines
> such as vblank can be communicated to the fence signaller for power/
> frequency management decisions.
>
> This is partially inspired by a trick i915 does, but implemented
> via dma-fence for a couple of reasons:
>
> 1) To continue to be able to use the atomic helpers
> 2) To support cases where display and gpu are different drivers
>
> This iteration adds a dma-fence ioctl to set a deadline (both to
> support igt-tests, and compositors which delay decisions about which
> client buffer to display), and a sw_sync ioctl to read back the
> deadline. IGT tests utilizing these can be found at:
>
> https://gitlab.freedesktop.org/robclark/igt-gpu-tools/-/commits/fence-deadline
>
>
> v1: https://patchwork.freedesktop.org/series/93035/
> v2: Move filtering out of later deadlines to fence implementation
> to avoid increasing the size of dma_fence
> v3: Add support in fence-array and fence-chain; Add some uabi to
> support igt tests and userspace compositors.
> v4: Rebase, address various comments, and add syncobj deadline
> support, and sync_file EPOLLPRI based on experience with perf/
> freq issues with clvk compute workloads on i915 (anv)
> v5: Clarify that this is a hint as opposed to a more hard deadline
> guarantee, switch to using u64 ns values in UABI (still absolute
> CLOCK_MONOTONIC values), drop syncobj related cap and driver
> feature flag in favor of allowing count_handles==0 for probing
> kernel support.
> v6: Re-work vblank helper to calculate time of _start_ of vblank,
> and work correctly if the last vblank event was more than a
> frame ago. Add (mostly unrelated) drm/msm patch which also
> uses the vblank helper. Use dma_fence_chain_contained(). More
> verbose syncobj UABI comments. Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT.
> v7: Fix kbuild complaints about vblank helper. Add more docs.
>
I want to apply this series for testing, but it can't be applied cleanly
on current drm-misc tree. On what tree (and commit) is this series based
on?
--
An old man doll... just what I always wanted! - Clara
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^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v7 00/15] dma-fence: Deadline awareness
2023-02-28 12:42 ` [PATCH v7 00/15] dma-fence: Deadline awareness Bagas Sanjaya
@ 2023-02-28 15:44 ` Rob Clark
2023-03-01 2:42 ` Bagas Sanjaya
0 siblings, 1 reply; 8+ messages in thread
From: Rob Clark @ 2023-02-28 15:44 UTC (permalink / raw)
To: Bagas Sanjaya
Cc: dri-devel, freedreno, Daniel Vetter, Christian König,
Michel Dänzer, Tvrtko Ursulin, Rodrigo Vivi, Alex Deucher,
Pekka Paalanen, Simon Ser, Luben Tuikov, Rob Clark, Abhinav Kumar,
Dmitry Baryshkov, Douglas Anderson, Gustavo Padovan, intel-gfx,
moderated list:DMA BUFFER SHARING FRAMEWORK,
open list:DRM DRIVER FOR MSM ADRENO GPU, open list:DOCUMENTATION,
open list, open list:DMA BUFFER SHARING FRAMEWORK, Liu Shixin,
Sean Paul, Stephen Boyd, Vinod Polimera
On Tue, Feb 28, 2023 at 4:43 AM Bagas Sanjaya <bagasdotme@gmail.com> wrote:
>
> On Mon, Feb 27, 2023 at 11:35:06AM -0800, Rob Clark wrote:
> > From: Rob Clark <robdclark@chromium.org>
> >
> > This series adds a deadline hint to fences, so realtime deadlines
> > such as vblank can be communicated to the fence signaller for power/
> > frequency management decisions.
> >
> > This is partially inspired by a trick i915 does, but implemented
> > via dma-fence for a couple of reasons:
> >
> > 1) To continue to be able to use the atomic helpers
> > 2) To support cases where display and gpu are different drivers
> >
> > This iteration adds a dma-fence ioctl to set a deadline (both to
> > support igt-tests, and compositors which delay decisions about which
> > client buffer to display), and a sw_sync ioctl to read back the
> > deadline. IGT tests utilizing these can be found at:
> >
> > https://gitlab.freedesktop.org/robclark/igt-gpu-tools/-/commits/fence-deadline
> >
> >
> > v1: https://patchwork.freedesktop.org/series/93035/
> > v2: Move filtering out of later deadlines to fence implementation
> > to avoid increasing the size of dma_fence
> > v3: Add support in fence-array and fence-chain; Add some uabi to
> > support igt tests and userspace compositors.
> > v4: Rebase, address various comments, and add syncobj deadline
> > support, and sync_file EPOLLPRI based on experience with perf/
> > freq issues with clvk compute workloads on i915 (anv)
> > v5: Clarify that this is a hint as opposed to a more hard deadline
> > guarantee, switch to using u64 ns values in UABI (still absolute
> > CLOCK_MONOTONIC values), drop syncobj related cap and driver
> > feature flag in favor of allowing count_handles==0 for probing
> > kernel support.
> > v6: Re-work vblank helper to calculate time of _start_ of vblank,
> > and work correctly if the last vblank event was more than a
> > frame ago. Add (mostly unrelated) drm/msm patch which also
> > uses the vblank helper. Use dma_fence_chain_contained(). More
> > verbose syncobj UABI comments. Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT.
> > v7: Fix kbuild complaints about vblank helper. Add more docs.
> >
>
> I want to apply this series for testing, but it can't be applied cleanly
> on current drm-misc tree. On what tree (and commit) is this series based
> on?
You can find my branch here:
https://gitlab.freedesktop.org/robclark/msm/-/commits/dma-fence/deadline
BR,
-R
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v7 01/15] dma-buf/dma-fence: Add deadline awareness
2023-02-28 9:21 ` Pekka Paalanen
@ 2023-02-28 17:32 ` Rob Clark
0 siblings, 0 replies; 8+ messages in thread
From: Rob Clark @ 2023-02-28 17:32 UTC (permalink / raw)
To: Pekka Paalanen
Cc: dri-devel, freedreno, Daniel Vetter, Christian König,
Michel Dänzer, Tvrtko Ursulin, Rodrigo Vivi, Alex Deucher,
Simon Ser, Luben Tuikov, Rob Clark, Christian König,
Sumit Semwal, Jonathan Corbet, Gustavo Padovan,
open list:DMA BUFFER SHARING FRAMEWORK,
moderated list:DMA BUFFER SHARING FRAMEWORK,
open list:DOCUMENTATION, open list
On Tue, Feb 28, 2023 at 1:21 AM Pekka Paalanen <ppaalanen@gmail.com> wrote:
>
> On Mon, 27 Feb 2023 11:35:07 -0800
> Rob Clark <robdclark@gmail.com> wrote:
>
> > From: Rob Clark <robdclark@chromium.org>
> >
> > Add a way to hint to the fence signaler of an upcoming deadline, such as
> > vblank, which the fence waiter would prefer not to miss. This is to aid
> > the fence signaler in making power management decisions, like boosting
> > frequency as the deadline approaches and awareness of missing deadlines
> > so that can be factored in to the frequency scaling.
> >
> > v2: Drop dma_fence::deadline and related logic to filter duplicate
> > deadlines, to avoid increasing dma_fence size. The fence-context
> > implementation will need similar logic to track deadlines of all
> > the fences on the same timeline. [ckoenig]
> > v3: Clarify locking wrt. set_deadline callback
> > v4: Clarify in docs comment that this is a hint
> > v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT.
> > v6: More docs
> >
> > Signed-off-by: Rob Clark <robdclark@chromium.org>
> > Reviewed-by: Christian König <christian.koenig@amd.com>
> > ---
> > Documentation/driver-api/dma-buf.rst | 6 +++
> > drivers/dma-buf/dma-fence.c | 59 ++++++++++++++++++++++++++++
> > include/linux/dma-fence.h | 20 ++++++++++
> > 3 files changed, 85 insertions(+)
> >
> > diff --git a/Documentation/driver-api/dma-buf.rst b/Documentation/driver-api/dma-buf.rst
> > index 622b8156d212..183e480d8cea 100644
> > --- a/Documentation/driver-api/dma-buf.rst
> > +++ b/Documentation/driver-api/dma-buf.rst
> > @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations
> > .. kernel-doc:: drivers/dma-buf/dma-fence.c
> > :doc: fence signalling annotation
> >
> > +DMA Fence Deadline Hints
> > +~~~~~~~~~~~~~~~~~~~~~~~~
> > +
> > +.. kernel-doc:: drivers/dma-buf/dma-fence.c
> > + :doc: deadline hints
> > +
> > DMA Fences Functions Reference
> > ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> >
> > diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c
> > index 0de0482cd36e..e103e821d993 100644
> > --- a/drivers/dma-buf/dma-fence.c
> > +++ b/drivers/dma-buf/dma-fence.c
> > @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct dma_fence **fences, uint32_t count,
> > }
> > EXPORT_SYMBOL(dma_fence_wait_any_timeout);
> >
> > +/**
> > + * DOC: deadline hints
> > + *
> > + * In an ideal world, it would be possible to pipeline a workload sufficiently
> > + * that a utilization based device frequency governor could arrive at a minimum
> > + * frequency that meets the requirements of the use-case, in order to minimize
> > + * power consumption. But in the real world there are many workloads which
> > + * defy this ideal. For example, but not limited to:
> > + *
> > + * * Workloads that ping-pong between device and CPU, with alternating periods
> > + * of CPU waiting for device, and device waiting on CPU. This can result in
> > + * devfreq and cpufreq seeing idle time in their respective domains and in
> > + * result reduce frequency.
> > + *
> > + * * Workloads that interact with a periodic time based deadline, such as double
> > + * buffered GPU rendering vs vblank sync'd page flipping. In this scenario,
> > + * missing a vblank deadline results in an *increase* in idle time on the GPU
> > + * (since it has to wait an additional vblank period), sending a single to
>
> Hi Rob,
>
> s/single/signal/ ?
oops, yes
> > + * the GPU's devfreq to reduce frequency, when in fact the opposite is what is
> > + * needed.
> > + *
> > + * To this end, deadline hint(s) can be set on a &dma_fence via &dma_fence_set_deadline.
> > + * The deadline hint provides a way for the waiting driver, or userspace, to
> > + * convey an appropriate sense of urgency to the signaling driver.
> > + *
> > + * A deadline hint is given in absolute ktime (CLOCK_MONOTONIC for userspace
> > + * facing APIs). The time could either be some point in the future (such as
> > + * the vblank based deadline for page-flipping, or the start of a compositor's
> > + * composition cycle), or the current time to indicate an immediate deadline
> > + * hint (Ie. forward progress cannot be made until this fence is signaled).
>
> As "current time" not a special value, but just an absolute timestamp
> like any other, deadlines already in the past must also be accepted?
Yes, well "current time" is already in the past after the next clock
tick, so deadlines already passed should be accepted. I've been
trying to avoid advocating zero as a special value, but I guess
realistically we don't have a rollover problem for a couple hundred
years. In any case, I think `deadline < now` should be allowed (ie.
what if you were preempted in the process of setting a deadline, etc)
I'll try to clarify this in the next version.
BR,
-R
> > + *
> > + * Multiple deadlines may be set on a given fence, even in parallel. See the
> > + * documentation for &dma_fence_ops.set_deadline.
> > + *
> > + * The deadline hint is just that, a hint. The driver that created the fence
> > + * may react by increasing frequency, making different scheduling choices, etc.
> > + * Or doing nothing at all.
> > + */
>
> Yes! Thank you for writing this! Well explained.
>
> > +
> > +/**
> > + * dma_fence_set_deadline - set desired fence-wait deadline hint
> > + * @fence: the fence that is to be waited on
> > + * @deadline: the time by which the waiter hopes for the fence to be
> > + * signaled
> > + *
> > + * Give the fence signaler a hint about an upcoming deadline, such as
> > + * vblank, by which point the waiter would prefer the fence to be
> > + * signaled by. This is intended to give feedback to the fence signaler
> > + * to aid in power management decisions, such as boosting GPU frequency
> > + * if a periodic vblank deadline is approaching but the fence is not
> > + * yet signaled..
> > + */
> > +void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline)
> > +{
> > + if (fence->ops->set_deadline && !dma_fence_is_signaled(fence))
> > + fence->ops->set_deadline(fence, deadline);
> > +}
> > +EXPORT_SYMBOL(dma_fence_set_deadline);
> > +
> > /**
> > * dma_fence_describe - Dump fence describtion into seq_file
> > * @fence: the 6fence to describe
> > diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.h
> > index 775cdc0b4f24..87c0d846dbb4 100644
> > --- a/include/linux/dma-fence.h
> > +++ b/include/linux/dma-fence.h
> > @@ -257,6 +257,24 @@ struct dma_fence_ops {
> > */
> > void (*timeline_value_str)(struct dma_fence *fence,
> > char *str, int size);
> > +
> > + /**
> > + * @set_deadline:
> > + *
> > + * Callback to allow a fence waiter to inform the fence signaler of
> > + * an upcoming deadline, such as vblank, by which point the waiter
> > + * would prefer the fence to be signaled by. This is intended to
> > + * give feedback to the fence signaler to aid in power management
> > + * decisions, such as boosting GPU frequency.
> > + *
> > + * This is called without &dma_fence.lock held, it can be called
> > + * multiple times and from any context. Locking is up to the callee
> > + * if it has some state to manage. If multiple deadlines are set,
> > + * the expectation is to track the soonest one.
> > + *
> > + * This callback is optional.
> > + */
> > + void (*set_deadline)(struct dma_fence *fence, ktime_t deadline);
> > };
> >
> > void dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,
> > @@ -583,6 +601,8 @@ static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr)
> > return ret < 0 ? ret : 0;
> > }
> >
> > +void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline);
> > +
> > struct dma_fence *dma_fence_get_stub(void);
> > struct dma_fence *dma_fence_allocate_private_stub(void);
> > u64 dma_fence_context_alloc(unsigned num);
>
> This is exactly what I wanted to see. Already
> Acked-by: Pekka Paalanen <pekka.paalanen@collabora.com>
>
>
> Thanks,
> pq
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v7 00/15] dma-fence: Deadline awareness
2023-02-28 15:44 ` Rob Clark
@ 2023-03-01 2:42 ` Bagas Sanjaya
0 siblings, 0 replies; 8+ messages in thread
From: Bagas Sanjaya @ 2023-03-01 2:42 UTC (permalink / raw)
To: Rob Clark
Cc: dri-devel, freedreno, Daniel Vetter, Christian König,
Michel Dänzer, Tvrtko Ursulin, Rodrigo Vivi, Alex Deucher,
Pekka Paalanen, Simon Ser, Luben Tuikov, Rob Clark, Abhinav Kumar,
Dmitry Baryshkov, Douglas Anderson, Gustavo Padovan, intel-gfx,
moderated list:DMA BUFFER SHARING FRAMEWORK,
open list:DRM DRIVER FOR MSM ADRENO GPU, open list:DOCUMENTATION,
open list, open list:DMA BUFFER SHARING FRAMEWORK, Liu Shixin,
Sean Paul, Stephen Boyd, Vinod Polimera
On 2/28/23 22:44, Rob Clark wrote:
> You can find my branch here:
>
> https://gitlab.freedesktop.org/robclark/msm/-/commits/dma-fence/deadline
>
Pulled, thanks!
--
An old man doll... just what I always wanted! - Clara
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v7 01/15] dma-buf/dma-fence: Add deadline awareness
2023-02-27 19:35 ` [PATCH v7 01/15] dma-buf/dma-fence: Add deadline awareness Rob Clark
2023-02-28 9:21 ` Pekka Paalanen
@ 2023-03-01 3:50 ` Bagas Sanjaya
1 sibling, 0 replies; 8+ messages in thread
From: Bagas Sanjaya @ 2023-03-01 3:50 UTC (permalink / raw)
To: Rob Clark, dri-devel
Cc: freedreno, Daniel Vetter, Christian König,
Michel Dänzer, Tvrtko Ursulin, Rodrigo Vivi, Alex Deucher,
Pekka Paalanen, Simon Ser, Luben Tuikov, Rob Clark,
Christian König, Sumit Semwal, Jonathan Corbet,
Gustavo Padovan, open list:DMA BUFFER SHARING FRAMEWORK,
moderated list:DMA BUFFER SHARING FRAMEWORK,
open list:DOCUMENTATION, open list
[-- Attachment #1: Type: text/plain, Size: 5909 bytes --]
On Mon, Feb 27, 2023 at 11:35:07AM -0800, Rob Clark wrote:
> diff --git a/Documentation/driver-api/dma-buf.rst b/Documentation/driver-api/dma-buf.rst
> index 622b8156d212..183e480d8cea 100644
> --- a/Documentation/driver-api/dma-buf.rst
> +++ b/Documentation/driver-api/dma-buf.rst
> @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations
> .. kernel-doc:: drivers/dma-buf/dma-fence.c
> :doc: fence signalling annotation
>
> +DMA Fence Deadline Hints
> +~~~~~~~~~~~~~~~~~~~~~~~~
> +
> +.. kernel-doc:: drivers/dma-buf/dma-fence.c
> + :doc: deadline hints
> +
> DMA Fences Functions Reference
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>
> diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c
> index 0de0482cd36e..e103e821d993 100644
> --- a/drivers/dma-buf/dma-fence.c
> +++ b/drivers/dma-buf/dma-fence.c
> @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct dma_fence **fences, uint32_t count,
> }
> EXPORT_SYMBOL(dma_fence_wait_any_timeout);
>
> +/**
> + * DOC: deadline hints
> + *
> + * In an ideal world, it would be possible to pipeline a workload sufficiently
> + * that a utilization based device frequency governor could arrive at a minimum
> + * frequency that meets the requirements of the use-case, in order to minimize
> + * power consumption. But in the real world there are many workloads which
> + * defy this ideal. For example, but not limited to:
> + *
> + * * Workloads that ping-pong between device and CPU, with alternating periods
> + * of CPU waiting for device, and device waiting on CPU. This can result in
> + * devfreq and cpufreq seeing idle time in their respective domains and in
> + * result reduce frequency.
> + *
> + * * Workloads that interact with a periodic time based deadline, such as double
> + * buffered GPU rendering vs vblank sync'd page flipping. In this scenario,
> + * missing a vblank deadline results in an *increase* in idle time on the GPU
> + * (since it has to wait an additional vblank period), sending a single to
> + * the GPU's devfreq to reduce frequency, when in fact the opposite is what is
> + * needed.
> + *
> + * To this end, deadline hint(s) can be set on a &dma_fence via &dma_fence_set_deadline.
> + * The deadline hint provides a way for the waiting driver, or userspace, to
> + * convey an appropriate sense of urgency to the signaling driver.
> + *
> + * A deadline hint is given in absolute ktime (CLOCK_MONOTONIC for userspace
> + * facing APIs). The time could either be some point in the future (such as
> + * the vblank based deadline for page-flipping, or the start of a compositor's
> + * composition cycle), or the current time to indicate an immediate deadline
> + * hint (Ie. forward progress cannot be made until this fence is signaled).
> + *
> + * Multiple deadlines may be set on a given fence, even in parallel. See the
> + * documentation for &dma_fence_ops.set_deadline.
> + *
> + * The deadline hint is just that, a hint. The driver that created the fence
> + * may react by increasing frequency, making different scheduling choices, etc.
> + * Or doing nothing at all.
> + */
> +
> +/**
> + * dma_fence_set_deadline - set desired fence-wait deadline hint
> + * @fence: the fence that is to be waited on
> + * @deadline: the time by which the waiter hopes for the fence to be
> + * signaled
> + *
> + * Give the fence signaler a hint about an upcoming deadline, such as
> + * vblank, by which point the waiter would prefer the fence to be
> + * signaled by. This is intended to give feedback to the fence signaler
> + * to aid in power management decisions, such as boosting GPU frequency
> + * if a periodic vblank deadline is approaching but the fence is not
> + * yet signaled..
> + */
> +void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline)
> +{
> + if (fence->ops->set_deadline && !dma_fence_is_signaled(fence))
> + fence->ops->set_deadline(fence, deadline);
> +}
> +EXPORT_SYMBOL(dma_fence_set_deadline);
> +
> /**
> * dma_fence_describe - Dump fence describtion into seq_file
> * @fence: the 6fence to describe
> diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.h
> index 775cdc0b4f24..87c0d846dbb4 100644
> --- a/include/linux/dma-fence.h
> +++ b/include/linux/dma-fence.h
> @@ -257,6 +257,24 @@ struct dma_fence_ops {
> */
> void (*timeline_value_str)(struct dma_fence *fence,
> char *str, int size);
> +
> + /**
> + * @set_deadline:
> + *
> + * Callback to allow a fence waiter to inform the fence signaler of
> + * an upcoming deadline, such as vblank, by which point the waiter
> + * would prefer the fence to be signaled by. This is intended to
> + * give feedback to the fence signaler to aid in power management
> + * decisions, such as boosting GPU frequency.
> + *
> + * This is called without &dma_fence.lock held, it can be called
> + * multiple times and from any context. Locking is up to the callee
> + * if it has some state to manage. If multiple deadlines are set,
> + * the expectation is to track the soonest one.
> + *
> + * This callback is optional.
> + */
> + void (*set_deadline)(struct dma_fence *fence, ktime_t deadline);
> };
>
> void dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,
> @@ -583,6 +601,8 @@ static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr)
> return ret < 0 ? ret : 0;
> }
>
> +void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline);
> +
> struct dma_fence *dma_fence_get_stub(void);
> struct dma_fence *dma_fence_allocate_private_stub(void);
> u64 dma_fence_context_alloc(unsigned num);
The doc LGTM, thanks!
Reviewed-by: Bagas Sanjaya <bagasdotme@gmail.com>
--
An old man doll... just what I always wanted! - Clara
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 8+ messages in thread
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Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
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2023-02-27 19:35 [PATCH v7 00/15] dma-fence: Deadline awareness Rob Clark
2023-02-27 19:35 ` [PATCH v7 01/15] dma-buf/dma-fence: Add deadline awareness Rob Clark
2023-02-28 9:21 ` Pekka Paalanen
2023-02-28 17:32 ` Rob Clark
2023-03-01 3:50 ` Bagas Sanjaya
2023-02-28 12:42 ` [PATCH v7 00/15] dma-fence: Deadline awareness Bagas Sanjaya
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