From: "Clément Léger" <cleger@rivosinc.com>
To: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org
Cc: "Clément Léger" <cleger@rivosinc.com>,
"Palmer Dabbelt" <palmer@rivosinc.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Jonathan Corbet" <corbet@lwn.net>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Evan Green" <evan@rivosinc.com>,
"Conor Dooley" <conor@kernel.org>
Subject: [PATCH v1 03/13] riscv: hwprobe: export Zv* ISA extensions
Date: Wed, 11 Oct 2023 13:14:28 +0200 [thread overview]
Message-ID: <20231011111438.909552-4-cleger@rivosinc.com> (raw)
In-Reply-To: <20231011111438.909552-1-cleger@rivosinc.com>
Export Zv* ISA extensions that were added in "RISC-V Cryptography
Extensions Volume II" specification[1] through hwprobe. This adds
support for the following instructions:
- Zvbb: Vector Basic Bit-manipulation
- Zvbc: Vector Carryless Multiplication
- Zvkb: Vector Cryptography Bit-manipulation
- Zvkg: Vector GCM/GMAC.
- Zvkned: NIST Suite: Vector AES Block Cipher
- Zvknh[ab]: NIST Suite: Vector SHA-2 Secure Hash
- Zvksed: ShangMi Suite: SM4 Block Cipher
- Zvksh: ShangMi Suite: SM3 Secure Hash
- Zvkn: NIST Algorithm Suite
- Zvknc: NIST Algorithm Suite with carryless multiply
- Zvkng: NIST Algorithm Suite with GCM.
- Zvks: ShangMi Algorithm Suite
- Zvksc: ShangMi Algorithm Suite with carryless multiplication
- Zvksg: ShangMi Algorithm Suite with GCM.
- Zvkt: Vector Data-Independent Execution Latency.
[1] https://drive.google.com/file/d/1gb9OLH-DhbCgWp7VwpPOVrrY6f3oSJLL/view
Signed-off-by: Clément Léger <cleger@rivosinc.com>
---
Documentation/riscv/hwprobe.rst | 48 +++++++++++++++++++++++++++
arch/riscv/include/uapi/asm/hwprobe.h | 16 +++++++++
arch/riscv/kernel/sys_riscv.c | 19 +++++++++++
3 files changed, 83 insertions(+)
diff --git a/Documentation/riscv/hwprobe.rst b/Documentation/riscv/hwprobe.rst
index a52996b22f75..edfed33669ea 100644
--- a/Documentation/riscv/hwprobe.rst
+++ b/Documentation/riscv/hwprobe.rst
@@ -77,6 +77,54 @@ The following keys are defined:
* :c:macro:`RISCV_HWPROBE_EXT_ZBS`: The Zbs extension is supported, as defined
in version 1.0 of the Bit-Manipulation ISA extensions.
+ * :c:macro:`RISCV_HWPROBE_EXT_ZVBB`: The Zvbb extension is supported as
+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
+
+ * :c:macro:`RISCV_HWPROBE_EXT_ZVBC`: The Zvbc extension is supported as
+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
+
+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKB`: The Zvkb extension is supported as
+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
+
+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKG`: The Zvkg extension is supported as
+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
+
+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKN`: The Zvkn extension is supported as
+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
+
+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKNC`: The Zvknc extension is supported as
+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
+
+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKNED`: The Zvkned extension is supported as
+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
+
+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKNG`: The Zvkng extension is supported as
+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
+
+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKNHA`: The Zvknha extension is supported as
+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
+
+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKNHB`: The Zvknhb extension is supported as
+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
+
+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKS`: The Zvks extension is supported as
+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
+
+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKSC`: The Zvksc extension is supported as
+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
+
+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKSED`: The Zvksed extension is supported as
+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
+
+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKSH`: The Zvksh extension is supported as
+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
+
+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKSG`: The Zvksg extension is supported as
+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
+
+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKT`: The Zvkt extension is supported as
+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
+
* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance
information about the selected set of processors.
diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h
index 006bfb48343d..d868eb431cd6 100644
--- a/arch/riscv/include/uapi/asm/hwprobe.h
+++ b/arch/riscv/include/uapi/asm/hwprobe.h
@@ -29,6 +29,22 @@ struct riscv_hwprobe {
#define RISCV_HWPROBE_EXT_ZBA (1 << 3)
#define RISCV_HWPROBE_EXT_ZBB (1 << 4)
#define RISCV_HWPROBE_EXT_ZBS (1 << 5)
+#define RISCV_HWPROBE_EXT_ZVBB (1 << 6)
+#define RISCV_HWPROBE_EXT_ZVBC (1 << 7)
+#define RISCV_HWPROBE_EXT_ZVKB (1 << 8)
+#define RISCV_HWPROBE_EXT_ZVKG (1 << 9)
+#define RISCV_HWPROBE_EXT_ZVKN (1 << 10)
+#define RISCV_HWPROBE_EXT_ZVKNC (1 << 11)
+#define RISCV_HWPROBE_EXT_ZVKNED (1 << 12)
+#define RISCV_HWPROBE_EXT_ZVKNG (1 << 13)
+#define RISCV_HWPROBE_EXT_ZVKNHA (1 << 14)
+#define RISCV_HWPROBE_EXT_ZVKNHB (1 << 15)
+#define RISCV_HWPROBE_EXT_ZVKS (1 << 16)
+#define RISCV_HWPROBE_EXT_ZVKSC (1 << 17)
+#define RISCV_HWPROBE_EXT_ZVKSED (1 << 18)
+#define RISCV_HWPROBE_EXT_ZVKSH (1 << 19)
+#define RISCV_HWPROBE_EXT_ZVKSG (1 << 20)
+#define RISCV_HWPROBE_EXT_ZVKT (1 << 21)
#define RISCV_HWPROBE_KEY_CPUPERF_0 5
#define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0)
#define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0)
diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c
index 5ce593ce07a4..4f5e51c192d5 100644
--- a/arch/riscv/kernel/sys_riscv.c
+++ b/arch/riscv/kernel/sys_riscv.c
@@ -156,6 +156,25 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair,
CHECK_ISA_EXT(ZBA);
CHECK_ISA_EXT(ZBB);
CHECK_ISA_EXT(ZBS);
+
+ if (has_vector()) {
+ CHECK_ISA_EXT(ZVBB);
+ CHECK_ISA_EXT(ZVBC);
+ CHECK_ISA_EXT(ZVKB);
+ CHECK_ISA_EXT(ZVKG);
+ CHECK_ISA_EXT(ZVKN);
+ CHECK_ISA_EXT(ZVKNC);
+ CHECK_ISA_EXT(ZVKNED);
+ CHECK_ISA_EXT(ZVKNG);
+ CHECK_ISA_EXT(ZVKNHA);
+ CHECK_ISA_EXT(ZVKNHB);
+ CHECK_ISA_EXT(ZVKS);
+ CHECK_ISA_EXT(ZVKSC);
+ CHECK_ISA_EXT(ZVKSED);
+ CHECK_ISA_EXT(ZVKSH);
+ CHECK_ISA_EXT(ZVKSG);
+ CHECK_ISA_EXT(ZVKT);
+ }
#undef CHECK_ISA_EXT
}
--
2.42.0
next prev parent reply other threads:[~2023-10-11 11:19 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-11 11:14 [PATCH v1 00/13] riscv: report more ISA extensions through hwprobe Clément Léger
2023-10-11 11:14 ` [PATCH v1 01/13] riscv: fatorize hwprobe ISA extension reporting Clément Léger
2023-10-11 11:37 ` Robert P. J. Day
2023-10-12 13:53 ` Conor Dooley
2023-10-12 16:32 ` Andrew Jones
2023-10-11 11:14 ` [PATCH v1 02/13] riscv: add ISA extension probing for Zv* extensions Clément Léger
2023-10-12 13:17 ` Clément Léger
2023-10-12 14:10 ` Conor Dooley
2023-10-12 15:15 ` Clément Léger
2023-10-12 16:29 ` Conor Dooley
2023-10-11 11:14 ` Clément Léger [this message]
2023-10-11 11:14 ` [PATCH v1 04/13] dt-bindings: riscv: add Zv* ratified crypto ISA extensions description Clément Léger
2023-10-12 13:47 ` Conor Dooley
2023-10-11 11:14 ` [PATCH v1 05/13] riscv: add ISA extension probing for Zfh/Zfhmin Clément Léger
2023-10-11 11:14 ` [PATCH v1 06/13] riscv: hwprobe: export Zfh/Zfhmin ISA extensions Clément Léger
2023-10-11 11:14 ` [PATCH v1 07/13] dt-bindings: riscv: add Zfh/Zfhmin ISA extensions description Clément Léger
2023-10-12 13:49 ` Conor Dooley
2023-10-11 11:14 ` [PATCH v1 08/13] riscv: add ISA extension probing for Zihintntl Clément Léger
2023-10-11 11:14 ` [PATCH v1 09/13] riscv: hwprobe: export Zhintntl ISA extension Clément Léger
2023-10-11 11:14 ` [PATCH v1 10/13] dt-bindings: riscv: add Zihintntl ISA extension description Clément Léger
2023-10-12 13:50 ` Conor Dooley
2023-10-12 13:58 ` Clément Léger
2023-10-11 11:14 ` [PATCH v1 11/13] riscv: add ISA extension probing for Zvfh[min] Clément Léger
2023-10-11 11:14 ` [PATCH v1 12/13] riscv: hwprobe: export Zvfh[min] ISA extensions Clément Léger
2023-10-11 11:14 ` [PATCH v1 13/13] dt-bindings: riscv: add Zvfh[min] ISA extension description Clément Léger
2023-10-12 13:51 ` Conor Dooley
2023-10-12 7:15 ` [PATCH v1 00/13] riscv: report more ISA extensions through hwprobe Clément Léger
2023-10-12 8:21 ` Conor Dooley
2023-10-12 8:25 ` Clément Léger
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