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From: "Clément Léger" <cleger@rivosinc.com>
To: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	Shuah Khan <shuah@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-doc@vger.kernel.org, kvm@vger.kernel.org,
	kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org
Cc: "Clément Léger" <cleger@rivosinc.com>,
	"Samuel Holland" <samuel.holland@sifive.com>,
	"Andrew Jones" <ajones@ventanamicro.com>
Subject: [PATCH v5 06/13] riscv: misaligned: use on_each_cpu() for scalar misaligned access probing
Date: Thu, 17 Apr 2025 14:19:53 +0200	[thread overview]
Message-ID: <20250417122337.547969-7-cleger@rivosinc.com> (raw)
In-Reply-To: <20250417122337.547969-1-cleger@rivosinc.com>

schedule_on_each_cpu() was used without any good reason while documented
as very slow. This call was in the boot path, so better use
on_each_cpu() for scalar misaligned checking. Vector misaligned check
still needs to use schedule_on_each_cpu() since it requires irqs to be
enabled but that's less of a problem since this code is ran in a kthread.
Add a comment to explicit that.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 arch/riscv/kernel/traps_misaligned.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c
index 058a69c30181..fbac0cf1fd30 100644
--- a/arch/riscv/kernel/traps_misaligned.c
+++ b/arch/riscv/kernel/traps_misaligned.c
@@ -610,6 +610,10 @@ bool __init check_vector_unaligned_access_emulated_all_cpus(void)
 {
 	int cpu;
 
+	/*
+	 * While being documented as very slow, schedule_on_each_cpu() is used since
+	 * kernel_vector_begin() expects irqs to be enabled or it will panic()
+	 */
 	schedule_on_each_cpu(check_vector_unaligned_access_emulated);
 
 	for_each_online_cpu(cpu)
@@ -630,7 +634,7 @@ bool __init check_vector_unaligned_access_emulated_all_cpus(void)
 
 static bool unaligned_ctl __read_mostly;
 
-static void check_unaligned_access_emulated(struct work_struct *work __always_unused)
+static void check_unaligned_access_emulated(void *arg __always_unused)
 {
 	int cpu = smp_processor_id();
 	long *mas_ptr = per_cpu_ptr(&misaligned_access_speed, cpu);
@@ -671,7 +675,7 @@ bool __init check_unaligned_access_emulated_all_cpus(void)
 	 * accesses emulated since tasks requesting such control can run on any
 	 * CPU.
 	 */
-	schedule_on_each_cpu(check_unaligned_access_emulated);
+	on_each_cpu(check_unaligned_access_emulated, NULL, 1);
 
 	for_each_online_cpu(cpu)
 		if (per_cpu(misaligned_access_speed, cpu)
-- 
2.49.0


  parent reply	other threads:[~2025-04-17 12:24 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-17 12:19 [PATCH v5 00/13] riscv: add SBI FWFT misaligned exception delegation support Clément Léger
2025-04-17 12:19 ` [PATCH v5 01/13] riscv: sbi: add Firmware Feature (FWFT) SBI extensions definitions Clément Léger
2025-04-17 12:19 ` [PATCH v5 02/13] riscv: sbi: add new SBI error mappings Clément Léger
2025-04-17 12:19 ` [PATCH v5 03/13] riscv: sbi: add FWFT extension interface Clément Léger
2025-04-24 11:00   ` Andrew Jones
2025-04-24 12:32     ` Clément Léger
2025-04-24 12:57       ` Andrew Jones
2025-04-17 12:19 ` [PATCH v5 04/13] riscv: sbi: add SBI FWFT extension calls Clément Léger
2025-04-24 11:06   ` Andrew Jones
2025-04-24 12:35     ` Clément Léger
2025-04-24 12:59       ` Andrew Jones
2025-04-24 13:04         ` Clément Léger
2025-04-17 12:19 ` [PATCH v5 05/13] riscv: misaligned: request misaligned exception from SBI Clément Léger
2025-04-24 11:14   ` Andrew Jones
2025-04-17 12:19 ` Clément Léger [this message]
2025-04-17 12:19 ` [PATCH v5 07/13] riscv: misaligned: use correct CONFIG_ ifdef for misaligned_access_speed Clément Léger
2025-04-17 12:19 ` [PATCH v5 08/13] riscv: misaligned: move emulated access uniformity check in a function Clément Léger
2025-04-17 12:19 ` [PATCH v5 09/13] riscv: misaligned: add a function to check misalign trap delegability Clément Léger
2025-04-17 12:19 ` [PATCH v5 10/13] RISC-V: KVM: add SBI extension init()/deinit() functions Clément Léger
2025-04-17 12:19 ` [PATCH v5 11/13] RISC-V: KVM: add SBI extension reset callback Clément Léger
2025-04-17 12:19 ` [PATCH v5 12/13] RISC-V: KVM: add support for FWFT SBI extension Clément Léger
2025-04-17 12:20 ` [PATCH v5 13/13] RISC-V: KVM: add support for SBI_FWFT_MISALIGNED_DELEG Clément Léger
2025-04-24 11:34   ` Andrew Jones
2025-04-24 12:37     ` Clément Léger

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