* [PATCH v1] arm64: errata: Mitigate TLBI errata on NVIDIA Olympus CPU
@ 2026-06-09 23:40 Shanker Donthineni
2026-06-10 10:00 ` Mark Rutland
2026-06-10 12:14 ` Will Deacon
0 siblings, 2 replies; 4+ messages in thread
From: Shanker Donthineni @ 2026-06-09 23:40 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, linux-arm-kernel, Mark Rutland
Cc: linux-kernel, linux-doc, Shanker Donthineni, Vikram Sethi,
Jason Sequeira, Alok Mooley, Rich Wiley
NVIDIA Olympus cores are affected by the TLBI completion issue tracked as
CVE-2025-10263. The existing ARM64_ERRATUM_4118414 handling already uses
ARM64_WORKAROUND_REPEAT_TLBI to issue an additional broadcast TLBI;DSB
sequence and ensure affected memory write effects are globally observed.
Add MIDR_NVIDIA_OLYMPUS to the repeat-TLBI match list so the same
mitigation is enabled on affected Olympus systems. Also document the
NVIDIA Olympus erratum in the arm64 silicon errata table and list it in
the Kconfig help text.
Signed-off-by: Shanker Donthineni <sdonthineni@nvidia.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
---
Note: This patch depends on the following series as a prerequisite:
https://lore.kernel.org/all/20260609101203.1512409-1-mark.rutland@arm.com/
Documentation/arch/arm64/silicon-errata.rst | 2 ++
arch/arm64/Kconfig | 3 ++-
arch/arm64/kernel/cpu_errata.c | 1 +
3 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst
index a01e916ede17..ad09bbb10da8 100644
--- a/Documentation/arch/arm64/silicon-errata.rst
+++ b/Documentation/arch/arm64/silicon-errata.rst
@@ -298,6 +298,8 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| NVIDIA | Carmel Core | N/A | NVIDIA_CARMEL_CNP_ERRATUM |
+----------------+-----------------+-----------------+-----------------------------+
+| NVIDIA | Olympus core | T410-OLY-1029 | ARM64_ERRATUM_4118414 |
++----------------+-----------------+-----------------+-----------------------------+
| NVIDIA | T241 GICv3/4.x | T241-FABRIC-4 | N/A |
+----------------+-----------------+-----------------+-----------------------------+
| NVIDIA | T241 MPAM | T241-MPAM-1 | N/A |
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 48233b54c482..c65cef81be86 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1155,7 +1155,7 @@ config ARM64_ERRATUM_4193714
If unsure, say Y.
config ARM64_ERRATUM_4118414
- bool "Cortex-*/Neoverse-*/C1-*: Completion of affected memory accesses might not be guaranteed by completion of a TLBI"
+ bool "Cortex-*/Neoverse-*/C1-*/Olympus: Completion of affected memory accesses might not be guaranteed by completion of a TLBI"
default y
select ARM64_WORKAROUND_REPEAT_TLBI
help
@@ -1182,6 +1182,7 @@ config ARM64_ERRATUM_4118414
* ARM Neoverse-V2 erratum 4193787
* ARM Neoverse-V3 erratum 4193784
* ARM Neoverse-V3AE erratum 4193784
+ * NVIDIA Olympus erratum T410-OLY-1029
On affected cores, some memory accesses might not be completed by
broadcast TLB invalidation.
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
index fe6fe5de495b..d597896b0f7f 100644
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -364,6 +364,7 @@ static const struct arm64_cpu_capabilities arm64_repeat_tlbi_list[] = {
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2),
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3),
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3AE),
+ MIDR_ALL_VERSIONS(MIDR_NVIDIA_OLYMPUS),
{}
})),
},
--
2.43.0
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH v1] arm64: errata: Mitigate TLBI errata on NVIDIA Olympus CPU
2026-06-09 23:40 [PATCH v1] arm64: errata: Mitigate TLBI errata on NVIDIA Olympus CPU Shanker Donthineni
@ 2026-06-10 10:00 ` Mark Rutland
2026-06-10 11:28 ` Mark Rutland
2026-06-10 12:14 ` Will Deacon
1 sibling, 1 reply; 4+ messages in thread
From: Mark Rutland @ 2026-06-10 10:00 UTC (permalink / raw)
To: Shanker Donthineni
Cc: Catalin Marinas, Will Deacon, linux-arm-kernel, linux-kernel,
linux-doc, Vikram Sethi, Jason Sequeira, Alok Mooley, Rich Wiley
On Tue, Jun 09, 2026 at 06:40:44PM -0500, Shanker Donthineni wrote:
> NVIDIA Olympus cores are affected by the TLBI completion issue tracked as
> CVE-2025-10263. The existing ARM64_ERRATUM_4118414 handling already uses
> ARM64_WORKAROUND_REPEAT_TLBI to issue an additional broadcast TLBI;DSB
> sequence and ensure affected memory write effects are globally observed.
>
> Add MIDR_NVIDIA_OLYMPUS to the repeat-TLBI match list so the same
> mitigation is enabled on affected Olympus systems. Also document the
> NVIDIA Olympus erratum in the arm64 silicon errata table and list it in
> the Kconfig help text.
>
> Signed-off-by: Shanker Donthineni <sdonthineni@nvidia.com>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> ---
> Note: This patch depends on the following series as a prerequisite:
> https://lore.kernel.org/all/20260609101203.1512409-1-mark.rutland@arm.com/
FWIW:
Acked-by: Mark Rutland <mark.rutland@arm.com>
I'll keep note of this when backporting the other patches; as a
prerequisite we'll also need to pick commit
e185c8a0d842 ("arm64: cputype: Add NVIDIA Olympus definitions")
I have one minor comment below, but that's more for Catalin/Will, and
doesn't require a respin.
> Documentation/arch/arm64/silicon-errata.rst | 2 ++
> arch/arm64/Kconfig | 3 ++-
> arch/arm64/kernel/cpu_errata.c | 1 +
> 3 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst
> index a01e916ede17..ad09bbb10da8 100644
> --- a/Documentation/arch/arm64/silicon-errata.rst
> +++ b/Documentation/arch/arm64/silicon-errata.rst
> @@ -298,6 +298,8 @@ stable kernels.
> +----------------+-----------------+-----------------+-----------------------------+
> | NVIDIA | Carmel Core | N/A | NVIDIA_CARMEL_CNP_ERRATUM |
> +----------------+-----------------+-----------------+-----------------------------+
> +| NVIDIA | Olympus core | T410-OLY-1029 | ARM64_ERRATUM_4118414 |
> ++----------------+-----------------+-----------------+-----------------------------+
> | NVIDIA | T241 GICv3/4.x | T241-FABRIC-4 | N/A |
> +----------------+-----------------+-----------------+-----------------------------+
> | NVIDIA | T241 MPAM | T241-MPAM-1 | N/A |
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 48233b54c482..c65cef81be86 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -1155,7 +1155,7 @@ config ARM64_ERRATUM_4193714
> If unsure, say Y.
>
> config ARM64_ERRATUM_4118414
> - bool "Cortex-*/Neoverse-*/C1-*: Completion of affected memory accesses might not be guaranteed by completion of a TLBI"
> + bool "Cortex-*/Neoverse-*/C1-*/Olympus: Completion of affected memory accesses might not be guaranteed by completion of a TLBI"
As this is getting increasingly long, maybe it's worth reducing this to
"Various" in the title, i.e.
bool "Cortex-*/Neoverse: Completion of affected memory accesses might not be guaranteed by completion of a TLBI"
... but as above, no need to respin for that.
Mark.
> default y
> select ARM64_WORKAROUND_REPEAT_TLBI
> help
> @@ -1182,6 +1182,7 @@ config ARM64_ERRATUM_4118414
> * ARM Neoverse-V2 erratum 4193787
> * ARM Neoverse-V3 erratum 4193784
> * ARM Neoverse-V3AE erratum 4193784
> + * NVIDIA Olympus erratum T410-OLY-1029
>
> On affected cores, some memory accesses might not be completed by
> broadcast TLB invalidation.
> diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
> index fe6fe5de495b..d597896b0f7f 100644
> --- a/arch/arm64/kernel/cpu_errata.c
> +++ b/arch/arm64/kernel/cpu_errata.c
> @@ -364,6 +364,7 @@ static const struct arm64_cpu_capabilities arm64_repeat_tlbi_list[] = {
> MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2),
> MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3),
> MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3AE),
> + MIDR_ALL_VERSIONS(MIDR_NVIDIA_OLYMPUS),
> {}
> })),
> },
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH v1] arm64: errata: Mitigate TLBI errata on NVIDIA Olympus CPU
2026-06-10 10:00 ` Mark Rutland
@ 2026-06-10 11:28 ` Mark Rutland
0 siblings, 0 replies; 4+ messages in thread
From: Mark Rutland @ 2026-06-10 11:28 UTC (permalink / raw)
To: Shanker Donthineni
Cc: Catalin Marinas, Will Deacon, linux-arm-kernel, linux-kernel,
linux-doc, Vikram Sethi, Jason Sequeira, Alok Mooley, Rich Wiley
On Wed, Jun 10, 2026 at 11:00:03AM +0100, Mark Rutland wrote:
> On Tue, Jun 09, 2026 at 06:40:44PM -0500, Shanker Donthineni wrote:
> I have one minor comment below, but that's more for Catalin/Will, and
> doesn't require a respin.
[...]
> As this is getting increasingly long, maybe it's worth reducing this to
> "Various" in the title, i.e.
>
> bool "Cortex-*/Neoverse: Completion of affected memory accesses might not be guaranteed by completion of a TLBI"
Sorry, I messed that up when copy-editing. That should have been:
bool "Various: Completion of affected memory accesses might not be guaranteed by completion of a TLBI"
As above, that doesn't need a respin.
Mark.
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v1] arm64: errata: Mitigate TLBI errata on NVIDIA Olympus CPU
2026-06-09 23:40 [PATCH v1] arm64: errata: Mitigate TLBI errata on NVIDIA Olympus CPU Shanker Donthineni
2026-06-10 10:00 ` Mark Rutland
@ 2026-06-10 12:14 ` Will Deacon
1 sibling, 0 replies; 4+ messages in thread
From: Will Deacon @ 2026-06-10 12:14 UTC (permalink / raw)
To: Catalin Marinas, linux-arm-kernel, Mark Rutland,
Shanker Donthineni
Cc: kernel-team, Will Deacon, linux-kernel, linux-doc, Vikram Sethi,
Jason Sequeira, Alok Mooley, Rich Wiley
On Tue, 09 Jun 2026 18:40:44 -0500, Shanker Donthineni wrote:
> NVIDIA Olympus cores are affected by the TLBI completion issue tracked as
> CVE-2025-10263. The existing ARM64_ERRATUM_4118414 handling already uses
> ARM64_WORKAROUND_REPEAT_TLBI to issue an additional broadcast TLBI;DSB
> sequence and ensure affected memory write effects are globally observed.
>
> Add MIDR_NVIDIA_OLYMPUS to the repeat-TLBI match list so the same
> mitigation is enabled on affected Olympus systems. Also document the
> NVIDIA Olympus erratum in the arm64 silicon errata table and list it in
> the Kconfig help text.
>
> [...]
Applied to arm64 (for-next/errata), thanks!
[1/1] arm64: errata: Mitigate TLBI errata on NVIDIA Olympus CPU
https://git.kernel.org/arm64/c/ec7216f92e4e
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
^ permalink raw reply [flat|nested] 4+ messages in thread
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2026-06-09 23:40 [PATCH v1] arm64: errata: Mitigate TLBI errata on NVIDIA Olympus CPU Shanker Donthineni
2026-06-10 10:00 ` Mark Rutland
2026-06-10 11:28 ` Mark Rutland
2026-06-10 12:14 ` Will Deacon
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