From: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Cc: "Oded Gabbay" <ogabbay@kernel.org>,
"Jonathan Corbet" <corbet@lwn.net>,
"Shuah Khan" <skhan@linuxfoundation.org>,
"Randy Dunlap" <rdunlap@infradead.org>,
"Nathan Chancellor" <nathan@kernel.org>,
"Nick Desaulniers" <ndesaulniers@google.com>,
"Bill Wendling" <morbo@google.com>,
"Justin Stitt" <justinstitt@google.com>,
"Joerg Roedel (AMD)" <joro@8bytes.org>,
"Will Deacon" <will@kernel.org>,
"Robin Murphy" <robin.murphy@arm.com>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Sumit Semwal" <sumit.semwal@linaro.org>,
"Christian König" <christian.koenig@amd.com>,
"Bharath Kumar" <quic_bkumar@quicinc.com>,
"Chenna Kesava Raju" <quic_chennak@quicinc.com>,
srinivas.kandagatla@oss.qualcomm.com,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-doc@vger.kernel.org, linux-arm-msm@vger.kernel.org,
llvm@lists.linux.dev, iommu@lists.linux.dev,
linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org
Subject: Re: [PATCH v2 09/15] accel/qda: Add DMA-backed GEM objects and memory manager integration
Date: Tue, 18 Aug 2026 11:21:55 +0530 [thread overview]
Message-ID: <2d092339-a691-4539-8419-c9606ea35f68@oss.qualcomm.com> (raw)
In-Reply-To: <g3dkltejtlzrrelv77kjteqbkny6vhedyuet7d6b2p7yfix3ys@sop7vjvpdvzb>
On 18-08-2026 09:12, Dmitry Baryshkov wrote:
> On Mon, Aug 17, 2026 at 10:17:44AM +0530, Ekansh Gupta wrote:
>> Introduce DMA-coherent buffer management for the QDA driver, wiring
>> together the GEM subsystem, the IOMMU memory manager, and a DMA
>> allocation backend.
>>
>> qda_gem.c / qda_gem.h
>> Implements the GEM object lifecycle for QDA buffers. Each buffer is
>> represented by a qda_gem_obj which embeds a drm_gem_object and
>> carries the kernel virtual address, DMA address, and a pointer to
>> the IOMMU device that performed the allocation. The .free callback
>> delegates to the memory manager, and the .mmap callback uses
>> dma_mmap_coherent() via the DMA backend.
>>
>> qda_memory_dma.c / qda_memory_dma.h
>> DMA coherent allocation backend. qda_dma_alloc() calls
>> dma_alloc_coherent() on the CB device and encodes the stream ID
>> (SID) in the upper 32 bits of the returned DMA address, following
>> the Qualcomm FastRPC convention for IOMMU address space tagging.
>> qda_dma_free() strips the SID prefix before calling
>> dma_free_coherent().
>>
>> qda_memory_manager.c
>> Adds process-to-device assignment: each DRM file (process) is
>> assigned one IOMMU context bank device for the lifetime of the
>> session. qda_memory_manager_assign_device() first checks whether
>> the process already has a device (reusing it with a refcount
>> increment), then falls back to claiming an unassigned device.
>> qda_memory_manager_alloc() and qda_memory_manager_free() delegate
>> to the DMA backend after resolving the correct CB device for the
>> calling process.
>>
>> qda_drv.c / qda_drv.h
>> qda_file_priv gains an assigned_iommu_dev pointer and a pid field.
>> The .postclose callback decrements the IOMMU device refcount and
>> clears the process assignment when the last reference is dropped.
>
> This provides a nice summary of the patch, which is pretty useless.
I'll fix this for all patches.> Please teach your AI instead to describe
the reasons and the design
> decisions instead of just assessing what the code does. Why do you need
> memory manager? Why can't you use existing GEM helpers?
I'll add more details for this in commit message:
The DSP requires each buffer's DMA address to carry the stream ID of the
context bank that owns it (SID << 32 | IOVA). The memory manager tracks
which CB is assigned to which process and ensures all allocations for a
process go through that device.
`drm_gem_dma_create()` and friends allocate from `dev`, the DRM device
itself. QDA needs to allocate from one of N child CB devices (each with
its own IOMMU domain), selected per-process. There's no existing GEM
helper that takes a per-allocation device argument.
//Ekansh
>
>>
>> Assisted-by: Claude:claude-sonnet-5
>> Signed-off-by: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
>> ---
>> Changes in v2:
>> - Adapt to the dynamically-sized device array introduced in patch 07
>> (kcalloc'd from DT node count, replaces fixed QDA_IOMMU_DEVICES_MAX)
>> - Protect register/unregister with the process_assignment_lock mutex so
>> the device-assignment and device-registration paths are serialised
>> - No functional changes requested by reviewers on this patch
>> ---
>> drivers/accel/qda/Makefile | 2 +
>> drivers/accel/qda/qda_drv.c | 4 +
>> drivers/accel/qda/qda_drv.h | 4 +
>> drivers/accel/qda/qda_gem.c | 134 ++++++++++++++++++
>> drivers/accel/qda/qda_gem.h | 52 +++++++
>> drivers/accel/qda/qda_memory_dma.c | 82 +++++++++++
>> drivers/accel/qda/qda_memory_dma.h | 17 +++
>> drivers/accel/qda/qda_memory_manager.c | 239 ++++++++++++++++++++++++++++++++-
>> drivers/accel/qda/qda_memory_manager.h | 30 +++++
>> 9 files changed, 559 insertions(+), 5 deletions(-)
>>
>
next prev parent reply other threads:[~2026-08-18 5:52 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-17 4:47 [PATCH v2 00/15] accel/qda: Qualcomm DSP Accelerator driver Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 01/15] MAINTAINERS: Add entry for Qualcomm DSP Accelerator (QDA) driver Ekansh Gupta
2026-08-18 19:22 ` Krzysztof Kozlowski
2026-08-19 13:05 ` Ekansh Gupta
2026-08-19 14:16 ` Krzysztof Kozlowski
2026-08-20 4:12 ` Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 02/15] accel/qda: Add QDA driver documentation Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 03/15] accel/qda: Add initial QDA DRM accelerator driver Ekansh Gupta
2026-08-18 19:10 ` Krzysztof Kozlowski
2026-08-19 13:17 ` Ekansh Gupta
2026-08-19 14:18 ` Krzysztof Kozlowski
2026-08-20 8:52 ` Dmitry Baryshkov
2026-08-20 9:07 ` Krzysztof Kozlowski
2026-08-20 10:07 ` Dmitry Baryshkov
2026-08-20 13:31 ` Krzysztof Kozlowski
2026-08-17 4:47 ` [PATCH v2 04/15] accel/qda: Add compute bus for QDA context banks Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 05/15] iommu: Add QDA compute context bank bus to iommu_buses Ekansh Gupta
2026-08-17 7:01 ` Joerg Roedel (AMD)
2026-08-17 13:44 ` Jason Gunthorpe
2026-08-18 5:10 ` Ekansh Gupta
2026-08-18 13:07 ` Jason Gunthorpe
2026-08-20 13:17 ` Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 06/15] accel/qda: Create compute context bank devices on QDA compute bus Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 07/15] accel/qda: Add memory manager for CB devices Ekansh Gupta
2026-08-17 6:52 ` Dmitry Baryshkov
2026-08-18 4:33 ` Ekansh Gupta
2026-08-18 4:44 ` Dmitry Baryshkov
2026-08-17 4:47 ` [PATCH v2 08/15] accel/qda: Add QUERY IOCTL and QDA UAPI header Ekansh Gupta
2026-08-17 6:58 ` Dmitry Baryshkov
2026-08-18 4:40 ` Ekansh Gupta
2026-08-18 4:45 ` Dmitry Baryshkov
2026-08-17 4:47 ` [PATCH v2 09/15] accel/qda: Add DMA-backed GEM objects and memory manager integration Ekansh Gupta
2026-08-18 3:42 ` Dmitry Baryshkov
2026-08-18 5:51 ` Ekansh Gupta [this message]
2026-08-18 3:48 ` Dmitry Baryshkov
2026-08-18 5:52 ` Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 10/15] accel/qda: Add GEM_CREATE and GEM_MMAP_OFFSET IOCTLs Ekansh Gupta
2026-08-18 3:49 ` Dmitry Baryshkov
2026-08-18 5:54 ` Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 11/15] accel/qda: Add PRIME DMA-BUF import support Ekansh Gupta
2026-08-18 3:55 ` Dmitry Baryshkov
2026-08-18 6:25 ` Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 12/15] accel/qda: Add FastRPC invocation support Ekansh Gupta
2026-08-18 4:19 ` Dmitry Baryshkov
2026-08-20 8:35 ` Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 13/15] accel/qda: Add DSP process creation and release Ekansh Gupta
2026-08-17 4:47 ` [PATCH v2 14/15] accel/qda: Add remote memory mapping to DSP address space Ekansh Gupta
2026-08-18 19:13 ` [PATCH v2 00/15] accel/qda: Qualcomm DSP Accelerator driver Krzysztof Kozlowski
2026-08-18 19:21 ` Krzysztof Kozlowski
2026-08-19 13:32 ` Ekansh Gupta
2026-08-19 14:19 ` Krzysztof Kozlowski
2026-08-19 13:26 ` Ekansh Gupta
2026-08-19 14:21 ` Krzysztof Kozlowski
2026-08-19 14:38 ` Rob Clark
2026-08-19 14:40 ` Konrad Dybcio
2026-08-19 14:43 ` Krzysztof Kozlowski
2026-08-19 14:49 ` Rob Clark
2026-08-19 14:53 ` Krzysztof Kozlowski
2026-08-19 15:23 ` Rob Clark
2026-08-19 15:27 ` Krzysztof Kozlowski
2026-08-19 15:48 ` Rob Clark
2026-08-20 6:15 ` Krzysztof Kozlowski
2026-08-20 14:47 ` Rob Clark
2026-08-18 19:18 ` Krzysztof Kozlowski
2026-08-19 13:23 ` Ekansh Gupta
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=2d092339-a691-4539-8419-c9606ea35f68@oss.qualcomm.com \
--to=ekansh.gupta@oss.qualcomm.com \
--cc=airlied@gmail.com \
--cc=christian.koenig@amd.com \
--cc=corbet@lwn.net \
--cc=dmitry.baryshkov@oss.qualcomm.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=iommu@lists.linux.dev \
--cc=joro@8bytes.org \
--cc=justinstitt@google.com \
--cc=linaro-mm-sig@lists.linaro.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-media@vger.kernel.org \
--cc=llvm@lists.linux.dev \
--cc=maarten.lankhorst@linux.intel.com \
--cc=morbo@google.com \
--cc=mripard@kernel.org \
--cc=nathan@kernel.org \
--cc=ndesaulniers@google.com \
--cc=ogabbay@kernel.org \
--cc=quic_bkumar@quicinc.com \
--cc=quic_chennak@quicinc.com \
--cc=rdunlap@infradead.org \
--cc=robin.murphy@arm.com \
--cc=simona@ffwll.ch \
--cc=skhan@linuxfoundation.org \
--cc=srinivas.kandagatla@oss.qualcomm.com \
--cc=sumit.semwal@linaro.org \
--cc=tzimmermann@suse.de \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox