* Re: [PATCH v2] docs: zh_TW: process: localize terminologies and improve fluency in 8.Conclusion
From: Weijie Yuan @ 2026-07-13 10:23 UTC (permalink / raw)
To: 葉宸佑, Dongliang Mu
Cc: Alex Shi, Hu Haowen, Jonathan Corbet, Shuah Khan, Dongliang Mu,
linux-doc, linux-kernel, Yuchen Tian, Alex Shi, Yanteng Si
In-Reply-To: <21179a3c-60d6-40b0-a5b1-594e989ef508@hust.edu.cn>
On Mon, Jul 13, 2026 at 02:35:22PM +0800, 葉宸佑 wrote:
> Hi Dongliang, Weijie,
>
> Thank you both -- this is more support than I expected, and I am glad
> to do this together.
>
> > Chen-Yu, I would like to serve as co-maintainers to help maintain zh_TW.
> > [...]
> > As discussed with Alex before, maybe zh_TW patches can first go to
> > Alex's kernel tree and then push to Jon's tree. I am not sure if you are
> > familar with the maintainer workflow. If not, this solution may be
> > better for you to learn maintainer workflow.
>
> To be honest: no, I am not familiar with the maintainer workflow yet --
> so far I have only been on the contributor side. So routing zh_TW
> patches through Alex's tree first sounds like the right arrangement to
> me, both for reliability and so that I can learn the workflow properly
> before taking on more. Alex, if you are fine with this, thank you in
> advance.
>
> > I suggest that we could try out the provisional plan for about one or
> > two months (depends), and then make a formal change.
>
> Agreed. A trial period before touching MAINTAINERS is fair -- it lets
> the work speak first. I will send the MAINTAINERS patch when you both
> feel the arrangement has proven itself.
Yeah, of course, this is not questioning your abilities at all. Winning
the trust of the community step by step in a gradual manner is
definitely better. This is something I have once again realized while
going through the lore archives of how the Git localization was done. By
reading their historical exchanges (between Junio C Hamano and Jiang
Xin), we might be able to obtain some practical experience and
precautions regarding the process. But this is not something that needs
to be considered at present.
> > https://zh.wikibooks.org/wiki/%E5%A4%A7%E9%99%86%E5%8F%B0%E6%B9%BE%E8%AE%A1%E7%AE%97%E6%9C%BA%E6%9C%AF%E8%AF%AD%E5%AF%B9%E7%85%A7%E8%A1%A8
> >
> > Is it comprehensive? I don't know. Perhaps we could add some specific
> > reference tables related to the Linux Kernel on top of it.
>
> As a native speaker: it is a reasonable general reference, but it is
> not kernel-specific, and some entries are dated or not what people
> actually write in Taiwan today. I would rather build the glossary
> bottom-up from the terms that actually appear in the kernel docs
> (軟體/軟件, 介面/接口, 記憶體, 行程, 核心, 佇列, ...), and use the
> wikibooks table only as a cross-check.
Ah got it, so this is why we need a local to guard a pass ;-)
> I will include the glossary as part of the first terminology series so
> it can be reviewed like any other patch.
Very much appreciated.
> > Perhaps I can handle most of the operation and maintenance tasks of
> > chore, giving Chen-yu more time and concentration to focus on the actual
> > translation work.
>
> That would help a lot, thank you. It also sounds like a natural split:
> you on process and monitoring, me on the translation and the zh_TW
> terminology judgement.
>
> One last thing about the patch that started all this: rather than
> keeping the v2 for 8.Conclusion pending, I would suggest dropping it
> and folding its changes into the terminology series, so the fixes
> land in one consistent batch. Any objection?
I definitely agree. Batching them would be easier to review and
retrospect, and it's better to track on the list.
On Mon, Jul 13, 2026 at 05:03:12PM +0800, 葉宸佑 wrote:
> Here is the inventory I promised, from checktransupdate.py on mainline:
>
> zh_TW: 51 translated files, all out of date
> 221 distinct English commits to catch up with
>
> process/ 14 files
> admin-guide/ 15
> arch/ 12
> dev-tools/ 5
> filesystems/ 3
> cpu-freq/ 1
> index.rst 1
>
> For calibration I ran the same tool on zh_CN: 178 translated files,
> also all out of date, 639 distinct commits behind. So in terms of
> drift from the English originals, zh_TW is not in a categorically
> different state from zh_CN -- the real gap is coverage (51 vs 178
> files), not decay.
> That makes me more optimistic than the "two years of stagnation"
> framing suggests: many zh_TW files are only behind by a typo fix or
> two.
Then I'm exaggerating, oops.
> (The ~3300 documents with no Chinese translation at all are out of
> scope for both locales, so I do not think that is the problem to
> solve first.)
Yes, and I suspect that some of the documents might not actually need to
be translated? I will conduct some more investigations.
> One thing I noticed while reading the script: checktransupdate.py
> tracks the base commit accurately only when the translation commit
> message contains "update to commit HASH" (or "Update the translation
> through commit HASH"); otherwise it falls back to guessing from author
> dates. Adopting that convention for zh_TW commits from now on would
> make the tool's numbers reliable, and it costs nothing. Perhaps that
> could be part of the "more reasonable workflow" Weijie mentioned.
Yes, and that's documented in here,
https://docs.kernel.org/translations/zh_CN/how-to.html
so later zh_TW could consider making one.
> My suggestion for the first step is process/ (14 files): it is where
> new contributors land first, it is small enough to finish as one
> series, and it is where the terminology differences are most visible.
> I would fold the pending 8.Conclusion patch into that series and build
> the glossary from it.
Agreed. The significance of the initial stage for newcomers is
self-evident. Of course, the English documents have undoubtedly been
constantly revised over time. So for these two Chinese documents, this
part is of crucial importance. After all, this is where almost everyone
begins to read, including me. So when I found that there was a Chinese
translation here, I was very happy ;-)
--------------------------------------------------------------------------
On Mon, Jul 13, 2026 at 05:41:31PM +0800, Dongliang Mu wrote:
>
> On 7/13/26 5:03 PM, 葉宸佑 wrote:
> > Here is the inventory I promised, from checktransupdate.py on mainline:
> >
> > zh_TW: 51 translated files, all out of date
> > 221 distinct English commits to catch up with
> >
> > process/ 14 files
> > admin-guide/ 15
> > arch/ 12
> > dev-tools/ 5
> > filesystems/ 3
> > cpu-freq/ 1
> > index.rst 1
> >
> > For calibration I ran the same tool on zh_CN: 178 translated files,
> > also all out of date, 639 distinct commits behind. So in terms of
>
> For many files, the missing commits might not be needed as they might not
> affect the translation (such as typos in English).
>
> Because this new commit style is developed recently by Yanteng and me, many
> translated documenation does not tranform to the corresponding styles.
>
> > drift from the English originals, zh_TW is not in a categorically
> > different state from zh_CN -- the real gap is coverage (51 vs 178
> > files), not decay. That makes me more optimistic than the "two years
> > of stagnation" framing suggests: many zh_TW files are only behind by
> > a typo fix or two.
> >
> > (The ~3300 documents with no Chinese translation at all are out of
> > scope for both locales, so I do not think that is the problem to
> > solve first.)
>
> Yes, we need more volunteers to translate English documents. However,
> translation is not attractive in the LLM era. :(
OK, the AI thing has still inevitably come up ;-)
I can spend an entire afternoon reading the discussion emails and
articles about AI/LLM in the community ;-)
Sidenote:
I noticed that there seems to be renewed discussion in the English
document section about removing the "assisted-by" trailer. It would be
a good idea to make a note of this and see if we need to update any
relevant sections.
However, personally speaking, I still prefer to read the official
website's documents. It was written by the developers, and of course it
is more authoritative than the content produced by AI/LLM. And sometimes
the information provided by the AI/LLM is a bit behind the information
on the official website kernel.org.
> For the todo list, you can check Jon's advice for new languages, e.g.,
> Spanish. Search it from LKML
Thanks, I'll learn about it too.
^ permalink raw reply
* [RFC PATCH v3 0/6] Add support for AMD IOMMU GAPPI
From: Sairaj Kodilkar @ 2026-07-13 10:50 UTC (permalink / raw)
To: Borislav Petkov (AMD), H. Peter Anvin, Joerg Roedel (AMD),
Paul E. McKenney, Andrew Morton, Dapeng Mi, Dave Hansen,
Eric Biggers, Feng Tang, Ingo Molnar, Jakub Kicinski,
Jonathan Corbet, Li RongQing, Marco Elver, Paolo Bonzini,
Randy Dunlap, Robin Murphy, Sairaj Kodilkar, Sean Christopherson,
Shuah Khan, Suravee Suthikulpanit, Thomas Gleixner, Vasant Hegde,
Will Deacon, iommu, kvm, linux-doc, linux-kernel, x86
Introduction
============
On newer generations of AMD processors, IOMMU AVIC/x2AVIC guest-mode interrupt
remapping can use Guest APIC Physical Processor Interrupt (GAPPI) as an
alternative host-notification path when device interrupts target a vCPU that
is not running (IRTE[IsRun] = 0).
With AVIC enabled, the IOMMU posts device interrupts into the guest virtual
APIC backing page. When the vCPU is not running, KVM must additionally be
notified so it can schedule the vCPU.
The legacy notification path is the GA log (GALOG): the IOMMU appends vCPU
tags to a shared GA log buffer and raises a single GA log interrupt. KVM
registers a notifier and scans the buffer to decide which vCPUs to wake.
Under heavy interrupt load this adds latency and can overflow the buffer
because all wakeups funnel through one interrupt and one shared log.
Guest APIC Physical Processor Interrupt (GAPPI), defined in section 2.2.5.4
of the AMD I/O Virtualization Technology (IOMMU) Specification [1], is an
alternative. With GAPPI enabled, the IOMMU still updates the guest vAPIC
backing page IRR, but may deliver a physical APIC interrupt directly to
IRTE[Destination], using IRTE[GATag][7:0] as the vector. This distributes
host wakeup notifications across CPUs instead of centralizing them in a
log buffer.
This series programs guest-mode IRTEs accordingly: IRTE[Destination] carries
the target host physical APIC ID, IRTE[GATag] is set to
POSTED_INTR_WAKEUP_VECTOR, and IRTE[GAPPIDis] / IRTE[GALogIntr] are set
based on whether KVM requests host wakeup. GAPPI is selected at boot via
the amd_iommu=gappi kernel parameter on capable hardware, otherwise the
existing GA log path is unchanged.
SVM/AMD IOMMU interface changes
===============================
The first four patches refactor the SVM/AMD IOMMU interface ahead of GAPPI.
The cpu field is renamed to apicid because it carries the host physical
APIC ID for IRTE[Destination], not a Linux CPU number.
The ga_log_intr boolean is renamed to wakeup_intr (and the synthetic
AVIC_PHYSICAL_ID_ENTRY_GA_LOG_INTR shadow bit to
AVIC_PHYSICAL_ID_ENTRY_WAKEUP_INTR). wakeup_intr describes KVM's intent
(request host wakeup while the vCPU is not running), not a specific hardware
mechanism.
A separate is_running boolean is added to IOMMU interface because GAPPI
requires a valid apicid in IRTE[Destination] even when the vCPU is not running.
The prior encoding (apicid >= 0 means running, apicid == -1 means not running)
no longer works once apicid carries the GAPPI destination while IRTE[IsRun] is
clear. The IOMMU driver keys IRTE[IsRun] and destination programming off this
explicit boolean instead of inferring running state from apicid.
KVM GAPPI wakeup scheme
=======================
SVM follows the Intel posted-interrupt wakeup model already used by VMX.
Each pCPU maintains a list of blocked vCPUs that may be woken by a GAPPI
delivery to that CPU. When a vCPU blocks while waiting for a device
interrupt, SVM enqueues it on the wakeup list of the pCPU on which it was
previously running (gappi_cpu) and passes that pCPU's physical APIC ID to
the IOMMU to program IRTE[Destination]. The rationale is that the vCPU is
likely to run again on the same pCPU, which is common when vCPUs are pinned;
targeting GAPPI notifications there reduces unnecessary VMEXITs from GAPPI
deliveries on other CPUs. When the vCPU is scheduled in again, it is
removed from the list and IRTE[Destination] is updated to the current pCPU.
SVM registers avic_gappi_wakeup_handler() via
kvm_set_posted_intr_wakeup_handler(). On POSTED_INTR_WAKEUP_VECTOR delivery,
the handler walks the local per-CPU list and wakes vCPUs with a pending
LAPIC IRR. The IOMMU has already posted the interrupt into the guest
vAPIC; waking the vCPU lets it observe the pending interrupt and run.
List maintenance is hooked into the existing AVIC vCPU and IRQ affinity
paths: vCPU load/put through avic_update_iommu_vcpu_affinity(), the first
IRQ affined to a non-running vCPU through avic_pi_update_irte() when ir_list
was empty at put time, removal when the last IRTE is detached, and cleanup
on vCPU destroy. All GAPPI-specific logic is gated on amd_iommu_gappi.
Changes since v2
================
https://lore.kernel.org/linux-iommu/20260708091408.12106-1-sarunkod@amd.com/
Patch[1-6]
- Expand commit messages to explain GAPPI, the interface changes, and the
per-CPU wakeup list scheme [Sean].
Patch[1-3]
- Split the monolithic SVM/IOMMU API refactor into four preparatory
patches [Sean]
- Rename posted_intr to wakeup_intr to reflect host wakeup intent, not
guest interrupt posting [Sean]
- Pass vCPU running status with a extra parameter (is_running) instead of
flags.
Patch[4,5]
- Move ga_tag=POSTED_INTR_WAKEUP_VECTOR setting from IOMMU to SVM layer.
Changes since V1:
================
https://lore.kernel.org/all/20260626105906.14577-1-sarunkod@amd.com/
Patch4
- Disable interrupts while holding wakeup list lock inside [sashiko]
avic_add_vcpu_to_gappi_wakeup_list and avic_remove_vcpu_from_gappi_wakeup_list
- Unregister posted_intr_wakeup_handler during module unload [sashiko]
Patch5
- Disable GAPPI feature during kexec and suspend path [sashiko]
------
[1] https://docs.amd.com/v/u/en-US/48882_3.11_IOMMU_PUB
Sairaj Kodilkar (6):
iommu/amd: KVM: SVM: Rename cpu to apicid in IOMMU interface
iommu/amd: KVM: SVM: Rename ga_log_intr to wakeup_intr in IOMMU
interface
iommu/amd: KVM: SVM: Add explicit vCPU running state to IOMMU
interface
iommu/amd: Program guest-mode IRTEs for GAPPI wakeup when IRTE[IsRun]
= 0
KVM: SVM: Add support for AMD IOMMU Guest APIC Physical Processor
Interrupt (GAPPI)
iommu/amd: Provide kernel command line option to enable GAPPI
.../admin-guide/kernel-parameters.txt | 3 +-
arch/x86/include/asm/irq_remapping.h | 5 +-
arch/x86/include/asm/svm.h | 9 +-
arch/x86/kvm/svm/avic.c | 173 ++++++++++++++----
arch/x86/kvm/svm/svm.c | 2 +
arch/x86/kvm/svm/svm.h | 5 +
drivers/iommu/amd/amd_iommu.h | 1 +
drivers/iommu/amd/amd_iommu_types.h | 6 +-
drivers/iommu/amd/init.c | 31 +++-
drivers/iommu/amd/iommu.c | 59 +++---
include/linux/amd-iommu.h | 13 +-
11 files changed, 237 insertions(+), 70 deletions(-)
base-commit: 8cd9520d35a6c38db6567e97dd93b1f11f185dc6
--
2.34.1
^ permalink raw reply
* [RFC PATCH v3 1/6] iommu/amd: KVM: SVM: Rename cpu to apicid in IOMMU interface
From: Sairaj Kodilkar @ 2026-07-13 10:50 UTC (permalink / raw)
To: Borislav Petkov (AMD), H. Peter Anvin, Joerg Roedel (AMD),
Paul E. McKenney, Andrew Morton, Dapeng Mi, Dave Hansen,
Eric Biggers, Feng Tang, Ingo Molnar, Jakub Kicinski,
Jonathan Corbet, Li RongQing, Marco Elver, Paolo Bonzini,
Randy Dunlap, Robin Murphy, Sairaj Kodilkar, Sean Christopherson,
Shuah Khan, Suravee Suthikulpanit, Thomas Gleixner, Vasant Hegde,
Will Deacon, iommu, kvm, linux-doc, linux-kernel, x86
In-Reply-To: <20260713105033.15405-1-sarunkod@amd.com>
The cpu field passed from SVM to the AMD IOMMU driver does not hold a
linux CPU number. It carries the host physical APIC ID used to program
the IRTE Destination field when the target vCPU is running
(IRTE[IsRun] = 1).
Rename the field to apicid everywhere in the IOMMU interface so the
name matches the hardware semantics.
No functional change is intended.
Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com>
---
arch/x86/include/asm/irq_remapping.h | 2 +-
arch/x86/kvm/svm/avic.c | 12 +++++-----
drivers/iommu/amd/iommu.c | 35 ++++++++++++++--------------
include/linux/amd-iommu.h | 8 +++----
4 files changed, 29 insertions(+), 28 deletions(-)
diff --git a/arch/x86/include/asm/irq_remapping.h b/arch/x86/include/asm/irq_remapping.h
index 37b94f484ef3..263f4df429d8 100644
--- a/arch/x86/include/asm/irq_remapping.h
+++ b/arch/x86/include/asm/irq_remapping.h
@@ -35,7 +35,7 @@ struct amd_iommu_pi_data {
u64 vapic_addr; /* Physical address of the vCPU's vAPIC. */
u32 ga_tag;
u32 vector; /* Guest vector of the interrupt */
- int cpu;
+ int apicid;
bool ga_log_intr;
bool is_guest_mode;
void *ir_data;
diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
index cdd5a6dc646f..bccc5d7ed207 100644
--- a/arch/x86/kvm/svm/avic.c
+++ b/arch/x86/kvm/svm/avic.c
@@ -949,9 +949,9 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
*/
entry = svm->avic_physical_id_entry;
if (entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK) {
- pi_data.cpu = entry & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK;
+ pi_data.apicid = entry & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK;
} else {
- pi_data.cpu = -1;
+ pi_data.apicid = -1;
pi_data.ga_log_intr = entry & AVIC_PHYSICAL_ID_ENTRY_GA_LOG_INTR;
}
@@ -1004,7 +1004,7 @@ enum avic_vcpu_action {
AVIC_START_BLOCKING = BIT(1),
};
-static void avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int cpu,
+static void avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int apicid,
enum avic_vcpu_action action)
{
bool ga_log_intr = (action & AVIC_START_BLOCKING);
@@ -1024,9 +1024,9 @@ static void avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int cpu,
void *data = irqfd->irq_bypass_data;
if (!(action & AVIC_TOGGLE_ON_OFF))
- WARN_ON_ONCE(amd_iommu_update_ga(data, cpu, ga_log_intr));
- else if (cpu >= 0)
- WARN_ON_ONCE(amd_iommu_activate_guest_mode(data, cpu, ga_log_intr));
+ WARN_ON_ONCE(amd_iommu_update_ga(data, apicid, ga_log_intr));
+ else if (apicid >= 0)
+ WARN_ON_ONCE(amd_iommu_activate_guest_mode(data, apicid, ga_log_intr));
else
WARN_ON_ONCE(amd_iommu_deactivate_guest_mode(data));
}
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 57dc8fabc7d9..c0cf7799c56e 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -3959,14 +3959,14 @@ static const struct irq_domain_ops amd_ir_domain_ops = {
.deactivate = irq_remapping_deactivate,
};
-static void __amd_iommu_update_ga(struct irte_ga *entry, int cpu,
+static void __amd_iommu_update_ga(struct irte_ga *entry, int apicid,
bool ga_log_intr)
{
- if (cpu >= 0) {
+ if (apicid >= 0) {
entry->lo.fields_vapic.destination =
- APICID_TO_IRTE_DEST_LO(cpu);
+ APICID_TO_IRTE_DEST_LO(apicid);
entry->hi.fields.destination =
- APICID_TO_IRTE_DEST_HI(cpu);
+ APICID_TO_IRTE_DEST_HI(apicid);
entry->lo.fields_vapic.is_run = true;
entry->lo.fields_vapic.ga_log_intr = false;
} else {
@@ -3979,20 +3979,21 @@ static void __amd_iommu_update_ga(struct irte_ga *entry, int cpu,
* Update the pCPU information for an IRTE that is configured to post IRQs to
* a vCPU, without issuing an IOMMU invalidation for the IRTE.
*
- * If the vCPU is associated with a pCPU (@cpu >= 0), configure the Destination
- * with the pCPU's APIC ID, set IsRun, and clear GALogIntr. If the vCPU isn't
- * associated with a pCPU (@cpu < 0), clear IsRun and set/clear GALogIntr based
- * on input from the caller (e.g. KVM only requests GALogIntr when the vCPU is
- * blocking and requires a notification wake event). I.e. treat vCPUs that are
- * associated with a pCPU as running. This API is intended to be used when a
- * vCPU is scheduled in/out (or stops running for any reason), to do a fast
- * update of IsRun, GALogIntr, and (conditionally) Destination.
+ * If the vCPU is associated with a pCPU (@apicid >= 0), configure the
+ * Destination with the pCPU's APIC ID, set IsRun, and clear GALogIntr. If the
+ * vCPU isn't associated with a pCPU (@apicid < 0), clear IsRun and set/clear
+ * GALogIntr based on input from the caller (e.g. KVM only requests GALogIntr
+ * when the vCPU is blocking and requires a notification wake event). I.e.
+ * treat vCPUs that are associated with a pCPU as running. This API is
+ * intended to be used when a vCPU is scheduled in/out (or stops running for
+ * any reason), to do a fast update of IsRun, GALogIntr, and (conditionally)
+ * Destination.
*
* Per the IOMMU spec, the Destination, IsRun, and GATag fields are not cached
* and thus don't require an invalidation to ensure the IOMMU consumes fresh
* information.
*/
-int amd_iommu_update_ga(void *data, int cpu, bool ga_log_intr)
+int amd_iommu_update_ga(void *data, int apicid, bool ga_log_intr)
{
struct amd_ir_data *ir_data = (struct amd_ir_data *)data;
struct irte_ga *entry = (struct irte_ga *) ir_data->entry;
@@ -4006,14 +4007,14 @@ int amd_iommu_update_ga(void *data, int cpu, bool ga_log_intr)
if (!ir_data->iommu)
return -ENODEV;
- __amd_iommu_update_ga(entry, cpu, ga_log_intr);
+ __amd_iommu_update_ga(entry, apicid, ga_log_intr);
return __modify_irte_ga(ir_data->iommu, ir_data->irq_2_irte.devid,
ir_data->irq_2_irte.index, entry);
}
EXPORT_SYMBOL(amd_iommu_update_ga);
-int amd_iommu_activate_guest_mode(void *data, int cpu, bool ga_log_intr)
+int amd_iommu_activate_guest_mode(void *data, int apicid, bool ga_log_intr)
{
struct amd_ir_data *ir_data = (struct amd_ir_data *)data;
struct irte_ga *entry = (struct irte_ga *) ir_data->entry;
@@ -4036,7 +4037,7 @@ int amd_iommu_activate_guest_mode(void *data, int cpu, bool ga_log_intr)
entry->hi.fields.vector = ir_data->ga_vector;
entry->lo.fields_vapic.ga_tag = ir_data->ga_tag;
- __amd_iommu_update_ga(entry, cpu, ga_log_intr);
+ __amd_iommu_update_ga(entry, apicid, ga_log_intr);
return modify_irte_ga(ir_data->iommu, ir_data->irq_2_irte.devid,
ir_data->irq_2_irte.index, entry);
@@ -4107,7 +4108,7 @@ static int amd_ir_set_vcpu_affinity(struct irq_data *data, void *info)
ir_data->ga_vector = pi_data->vector;
ir_data->ga_tag = pi_data->ga_tag;
if (pi_data->is_guest_mode)
- ret = amd_iommu_activate_guest_mode(ir_data, pi_data->cpu,
+ ret = amd_iommu_activate_guest_mode(ir_data, pi_data->apicid,
pi_data->ga_log_intr);
else
ret = amd_iommu_deactivate_guest_mode(ir_data);
diff --git a/include/linux/amd-iommu.h b/include/linux/amd-iommu.h
index edcee9f5335a..2c6232aefafa 100644
--- a/include/linux/amd-iommu.h
+++ b/include/linux/amd-iommu.h
@@ -30,8 +30,8 @@ static inline void amd_iommu_detect(void) { }
/* IOMMU AVIC Function */
extern int amd_iommu_register_ga_log_notifier(int (*notifier)(u32));
-extern int amd_iommu_update_ga(void *data, int cpu, bool ga_log_intr);
-extern int amd_iommu_activate_guest_mode(void *data, int cpu, bool ga_log_intr);
+extern int amd_iommu_update_ga(void *data, int apicid, bool ga_log_intr);
+extern int amd_iommu_activate_guest_mode(void *data, int apicid, bool ga_log_intr);
extern int amd_iommu_deactivate_guest_mode(void *data);
#else /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */
@@ -42,12 +42,12 @@ amd_iommu_register_ga_log_notifier(int (*notifier)(u32))
return 0;
}
-static inline int amd_iommu_update_ga(void *data, int cpu, bool ga_log_intr)
+static inline int amd_iommu_update_ga(void *data, int apicid, bool ga_log_intr)
{
return 0;
}
-static inline int amd_iommu_activate_guest_mode(void *data, int cpu, bool ga_log_intr)
+static inline int amd_iommu_activate_guest_mode(void *data, int apicid, bool ga_log_intr)
{
return 0;
}
--
2.34.1
^ permalink raw reply related
* [RFC PATCH v3 2/6] iommu/amd: KVM: SVM: Rename ga_log_intr to wakeup_intr in IOMMU interface
From: Sairaj Kodilkar @ 2026-07-13 10:50 UTC (permalink / raw)
To: Borislav Petkov (AMD), H. Peter Anvin, Joerg Roedel (AMD),
Paul E. McKenney, Andrew Morton, Dapeng Mi, Dave Hansen,
Eric Biggers, Feng Tang, Ingo Molnar, Jakub Kicinski,
Jonathan Corbet, Li RongQing, Marco Elver, Paolo Bonzini,
Randy Dunlap, Robin Murphy, Sairaj Kodilkar, Sean Christopherson,
Shuah Khan, Suravee Suthikulpanit, Thomas Gleixner, Vasant Hegde,
Will Deacon, iommu, kvm, linux-doc, linux-kernel, x86
In-Reply-To: <20260713105033.15405-1-sarunkod@amd.com>
When AVIC is enabled, device interrupts are posted into the guest virtual
APIC backing page regardless of vCPU running state. When the vCPU is not
running, KVM may additionally need the IOMMU to notify the host so the
vCPU can be woken, historically via the GA log mechanism.
The existing ga_log_intr name is tied to one specific hardware mechanism.
Guest APIC Physical Processor Interrupt (GAPPI) provides an alternative
host-notification path when the vCPU is not running, i.e., IRTE[IsRun] = 0.
The KVM-side intent is the same in both cases: request host wakeup
notification while the vCPU is blocked.
Rename ga_log_intr to wakeup_intr in the IOMMU API to describe KVM's
intent rather than a single hardware knob. The IOMMU driver still maps
wakeup_intr to IRTE[GALogIntr] in this patch; GAPPI support is added in
following patches.
Similarly rename the synthetic AVIC physical ID table shadow bit from
AVIC_PHYSICAL_ID_ENTRY_GA_LOG_INTR to AVIC_PHYSICAL_ID_ENTRY_WAKEUP_INTR.
No functional change is intended.
Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com>
---
arch/x86/include/asm/irq_remapping.h | 2 +-
arch/x86/include/asm/svm.h | 9 +++++----
arch/x86/kvm/svm/avic.c | 26 +++++++++++++-------------
drivers/iommu/amd/iommu.c | 16 ++++++++--------
include/linux/amd-iommu.h | 8 ++++----
5 files changed, 31 insertions(+), 30 deletions(-)
diff --git a/arch/x86/include/asm/irq_remapping.h b/arch/x86/include/asm/irq_remapping.h
index 263f4df429d8..789e3e154600 100644
--- a/arch/x86/include/asm/irq_remapping.h
+++ b/arch/x86/include/asm/irq_remapping.h
@@ -36,7 +36,7 @@ struct amd_iommu_pi_data {
u32 ga_tag;
u32 vector; /* Guest vector of the interrupt */
int apicid;
- bool ga_log_intr;
+ bool wakeup_intr;
bool is_guest_mode;
void *ir_data;
};
diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h
index bcfeb5e7c0ed..add8b7274cc2 100644
--- a/arch/x86/include/asm/svm.h
+++ b/arch/x86/include/asm/svm.h
@@ -259,11 +259,12 @@ struct __attribute__ ((__packed__)) vmcb_control_area {
#define AVIC_LOGICAL_ID_ENTRY_VALID_MASK (1 << 31)
/*
- * GA_LOG_INTR is a synthetic flag that's never propagated to hardware-visible
- * tables. GA_LOG_INTR is set if the vCPU needs device posted IRQs to generate
- * GA log interrupts to wake the vCPU (because it's blocking or about to block).
+ * WAKEUP_INTR is a synthetic flag that's never propagated to hardware-visible
+ * tables. WAKEUP_INTR is set if the vCPU needs device posted IRQs to generate
+ * GA log/GAPPI interrupts to wake the vCPU (because it's blocking or about to
+ * block).
*/
-#define AVIC_PHYSICAL_ID_ENTRY_GA_LOG_INTR BIT_ULL(61)
+#define AVIC_PHYSICAL_ID_ENTRY_WAKEUP_INTR BIT_ULL(61)
#define AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK GENMASK_ULL(11, 0)
#define AVIC_PHYSICAL_ID_ENTRY_BACKING_PAGE_MASK GENMASK_ULL(51, 12)
diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
index bccc5d7ed207..8e87a7f2f64f 100644
--- a/arch/x86/kvm/svm/avic.c
+++ b/arch/x86/kvm/svm/avic.c
@@ -952,7 +952,7 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
pi_data.apicid = entry & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK;
} else {
pi_data.apicid = -1;
- pi_data.ga_log_intr = entry & AVIC_PHYSICAL_ID_ENTRY_GA_LOG_INTR;
+ pi_data.wakeup_intr = entry & AVIC_PHYSICAL_ID_ENTRY_WAKEUP_INTR;
}
ret = irq_set_vcpu_affinity(host_irq, &pi_data);
@@ -991,15 +991,15 @@ enum avic_vcpu_action {
* No unique action is required to deal with a vCPU that stops/starts
* running. A vCPU that starts running by definition stops blocking as
* well, and a vCPU that stops running can't have been blocking, i.e.
- * doesn't need to toggle GALogIntr.
+ * doesn't need to toggle host wakeup notification.
*/
AVIC_START_RUNNING = 0,
AVIC_STOP_RUNNING = 0,
/*
- * When a vCPU starts blocking, KVM needs to set the GALogIntr flag
- * int all associated IRTEs so that KVM can wake the vCPU if an IRQ is
- * sent to the vCPU.
+ * When a vCPU starts blocking, KVM needs to request host wakeup
+ * notification in all associated IRTEs so that KVM can wake the vCPU
+ * if an IRQ is sent to the vCPU.
*/
AVIC_START_BLOCKING = BIT(1),
};
@@ -1007,7 +1007,7 @@ enum avic_vcpu_action {
static void avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int apicid,
enum avic_vcpu_action action)
{
- bool ga_log_intr = (action & AVIC_START_BLOCKING);
+ bool wakeup_intr = (action & AVIC_START_BLOCKING);
struct vcpu_svm *svm = to_svm(vcpu);
struct kvm_kernel_irqfd *irqfd;
@@ -1024,9 +1024,9 @@ static void avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int apicid,
void *data = irqfd->irq_bypass_data;
if (!(action & AVIC_TOGGLE_ON_OFF))
- WARN_ON_ONCE(amd_iommu_update_ga(data, apicid, ga_log_intr));
+ WARN_ON_ONCE(amd_iommu_update_ga(data, apicid, wakeup_intr));
else if (apicid >= 0)
- WARN_ON_ONCE(amd_iommu_activate_guest_mode(data, apicid, ga_log_intr));
+ WARN_ON_ONCE(amd_iommu_activate_guest_mode(data, apicid, wakeup_intr));
else
WARN_ON_ONCE(amd_iommu_deactivate_guest_mode(data));
}
@@ -1063,7 +1063,7 @@ static void __avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu,
WARN_ON_ONCE(entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK);
entry &= ~(AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK |
- AVIC_PHYSICAL_ID_ENTRY_GA_LOG_INTR);
+ AVIC_PHYSICAL_ID_ENTRY_WAKEUP_INTR);
entry |= (h_physical_id & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK);
entry |= AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK;
@@ -1125,7 +1125,7 @@ static void __avic_vcpu_put(struct kvm_vcpu *vcpu, enum avic_vcpu_action action)
avic_update_iommu_vcpu_affinity(vcpu, -1, action);
- WARN_ON_ONCE(entry & AVIC_PHYSICAL_ID_ENTRY_GA_LOG_INTR);
+ WARN_ON_ONCE(entry & AVIC_PHYSICAL_ID_ENTRY_WAKEUP_INTR);
/*
* Keep the previous APIC ID in the entry so that a rogue doorbell from
@@ -1137,11 +1137,11 @@ static void __avic_vcpu_put(struct kvm_vcpu *vcpu, enum avic_vcpu_action action)
WRITE_ONCE(kvm_svm->avic_physical_id_table[vcpu->vcpu_id], entry);
/*
- * Note! Don't set AVIC_PHYSICAL_ID_ENTRY_GA_LOG_INTR in the table as
+ * Note! Don't set AVIC_PHYSICAL_ID_ENTRY_WAKEUP_INTR in the table as
* it's a synthetic flag that usurps an unused should-be-zero bit.
*/
if (action & AVIC_START_BLOCKING)
- entry |= AVIC_PHYSICAL_ID_ENTRY_GA_LOG_INTR;
+ entry |= AVIC_PHYSICAL_ID_ENTRY_WAKEUP_INTR;
svm->avic_physical_id_entry = entry;
@@ -1173,7 +1173,7 @@ void avic_vcpu_put(struct kvm_vcpu *vcpu)
* The vCPU was preempted while blocking, ensure its IRTEs are
* configured to generate GA Log Interrupts.
*/
- if (!(WARN_ON_ONCE(!(entry & AVIC_PHYSICAL_ID_ENTRY_GA_LOG_INTR))))
+ if (!(WARN_ON_ONCE(!(entry & AVIC_PHYSICAL_ID_ENTRY_WAKEUP_INTR))))
return;
}
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index c0cf7799c56e..1284f37e44c7 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -3960,7 +3960,7 @@ static const struct irq_domain_ops amd_ir_domain_ops = {
};
static void __amd_iommu_update_ga(struct irte_ga *entry, int apicid,
- bool ga_log_intr)
+ bool wakeup_intr)
{
if (apicid >= 0) {
entry->lo.fields_vapic.destination =
@@ -3971,7 +3971,7 @@ static void __amd_iommu_update_ga(struct irte_ga *entry, int apicid,
entry->lo.fields_vapic.ga_log_intr = false;
} else {
entry->lo.fields_vapic.is_run = false;
- entry->lo.fields_vapic.ga_log_intr = ga_log_intr;
+ entry->lo.fields_vapic.ga_log_intr = wakeup_intr;
}
}
@@ -3982,7 +3982,7 @@ static void __amd_iommu_update_ga(struct irte_ga *entry, int apicid,
* If the vCPU is associated with a pCPU (@apicid >= 0), configure the
* Destination with the pCPU's APIC ID, set IsRun, and clear GALogIntr. If the
* vCPU isn't associated with a pCPU (@apicid < 0), clear IsRun and set/clear
- * GALogIntr based on input from the caller (e.g. KVM only requests GALogIntr
+ * GALogIntr based on input from the caller (e.g. KVM only requests wakeup_intr
* when the vCPU is blocking and requires a notification wake event). I.e.
* treat vCPUs that are associated with a pCPU as running. This API is
* intended to be used when a vCPU is scheduled in/out (or stops running for
@@ -3993,7 +3993,7 @@ static void __amd_iommu_update_ga(struct irte_ga *entry, int apicid,
* and thus don't require an invalidation to ensure the IOMMU consumes fresh
* information.
*/
-int amd_iommu_update_ga(void *data, int apicid, bool ga_log_intr)
+int amd_iommu_update_ga(void *data, int apicid, bool wakeup_intr)
{
struct amd_ir_data *ir_data = (struct amd_ir_data *)data;
struct irte_ga *entry = (struct irte_ga *) ir_data->entry;
@@ -4007,14 +4007,14 @@ int amd_iommu_update_ga(void *data, int apicid, bool ga_log_intr)
if (!ir_data->iommu)
return -ENODEV;
- __amd_iommu_update_ga(entry, apicid, ga_log_intr);
+ __amd_iommu_update_ga(entry, apicid, wakeup_intr);
return __modify_irte_ga(ir_data->iommu, ir_data->irq_2_irte.devid,
ir_data->irq_2_irte.index, entry);
}
EXPORT_SYMBOL(amd_iommu_update_ga);
-int amd_iommu_activate_guest_mode(void *data, int apicid, bool ga_log_intr)
+int amd_iommu_activate_guest_mode(void *data, int apicid, bool wakeup_intr)
{
struct amd_ir_data *ir_data = (struct amd_ir_data *)data;
struct irte_ga *entry = (struct irte_ga *) ir_data->entry;
@@ -4037,7 +4037,7 @@ int amd_iommu_activate_guest_mode(void *data, int apicid, bool ga_log_intr)
entry->hi.fields.vector = ir_data->ga_vector;
entry->lo.fields_vapic.ga_tag = ir_data->ga_tag;
- __amd_iommu_update_ga(entry, apicid, ga_log_intr);
+ __amd_iommu_update_ga(entry, apicid, wakeup_intr);
return modify_irte_ga(ir_data->iommu, ir_data->irq_2_irte.devid,
ir_data->irq_2_irte.index, entry);
@@ -4109,7 +4109,7 @@ static int amd_ir_set_vcpu_affinity(struct irq_data *data, void *info)
ir_data->ga_tag = pi_data->ga_tag;
if (pi_data->is_guest_mode)
ret = amd_iommu_activate_guest_mode(ir_data, pi_data->apicid,
- pi_data->ga_log_intr);
+ pi_data->wakeup_intr);
else
ret = amd_iommu_deactivate_guest_mode(ir_data);
} else {
diff --git a/include/linux/amd-iommu.h b/include/linux/amd-iommu.h
index 2c6232aefafa..e20c909edc56 100644
--- a/include/linux/amd-iommu.h
+++ b/include/linux/amd-iommu.h
@@ -30,8 +30,8 @@ static inline void amd_iommu_detect(void) { }
/* IOMMU AVIC Function */
extern int amd_iommu_register_ga_log_notifier(int (*notifier)(u32));
-extern int amd_iommu_update_ga(void *data, int apicid, bool ga_log_intr);
-extern int amd_iommu_activate_guest_mode(void *data, int apicid, bool ga_log_intr);
+extern int amd_iommu_update_ga(void *data, int apicid, bool wakeup_intr);
+extern int amd_iommu_activate_guest_mode(void *data, int apicid, bool wakeup_intr);
extern int amd_iommu_deactivate_guest_mode(void *data);
#else /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */
@@ -42,12 +42,12 @@ amd_iommu_register_ga_log_notifier(int (*notifier)(u32))
return 0;
}
-static inline int amd_iommu_update_ga(void *data, int apicid, bool ga_log_intr)
+static inline int amd_iommu_update_ga(void *data, int apicid, bool wakeup_intr)
{
return 0;
}
-static inline int amd_iommu_activate_guest_mode(void *data, int apicid, bool ga_log_intr)
+static inline int amd_iommu_activate_guest_mode(void *data, int apicid, bool wakeup_intr)
{
return 0;
}
--
2.34.1
^ permalink raw reply related
* [RFC PATCH v3 3/6] iommu/amd: KVM: SVM: Add explicit vCPU running state to IOMMU interface
From: Sairaj Kodilkar @ 2026-07-13 10:50 UTC (permalink / raw)
To: Borislav Petkov (AMD), H. Peter Anvin, Joerg Roedel (AMD),
Paul E. McKenney, Andrew Morton, Dapeng Mi, Dave Hansen,
Eric Biggers, Feng Tang, Ingo Molnar, Jakub Kicinski,
Jonathan Corbet, Li RongQing, Marco Elver, Paolo Bonzini,
Randy Dunlap, Robin Murphy, Sairaj Kodilkar, Sean Christopherson,
Shuah Khan, Suravee Suthikulpanit, Thomas Gleixner, Vasant Hegde,
Will Deacon, iommu, kvm, linux-doc, linux-kernel, x86
In-Reply-To: <20260713105033.15405-1-sarunkod@amd.com>
Guest APIC Physical Processor Interrupt (GAPPI) is an AMD IOMMU mechanism
for notifying the host when a device interrupt targets a non-running vCPU
(IRTE[IsRun] = 0). Unlike the GA log path, GAPPI delivers a physical APIC
interrupt directly to the host CPU described by IRTE[Destination], with
the vector carried in IRTE[GATag], while still posting the interrupt into
the guest virtual APIC backing page as usual.
In GAPPI mode, the IOMMU delivers the notification to the host CPU using
the physical APIC ID in IRTE[Destination] and the vector in IRTE[GATag].
KVM must therefore supply a valid apicid even when the vCPU is not running.
The prior interface inferred running state from apicid: apicid >= 0 meant
running and apicid == -1 meant not running. That encoding breaks once
apicid carries the GAPPI destination while the vCPU is not running; the
IOMMU driver can no longer derive vCPU running state from apicid alone
and needs an explicit indication from KVM.
Add an explicit is_running indication to the IOMMU interface so that
SVM can pass vCPU running state to the IOMMU.
No functional change is intended.
Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com>
---
arch/x86/include/asm/irq_remapping.h | 1 +
arch/x86/kvm/svm/avic.c | 10 +++++++---
drivers/iommu/amd/iommu.c | 26 +++++++++++++-------------
include/linux/amd-iommu.h | 12 ++++++++----
4 files changed, 29 insertions(+), 20 deletions(-)
diff --git a/arch/x86/include/asm/irq_remapping.h b/arch/x86/include/asm/irq_remapping.h
index 789e3e154600..af0cdfa32c44 100644
--- a/arch/x86/include/asm/irq_remapping.h
+++ b/arch/x86/include/asm/irq_remapping.h
@@ -37,6 +37,7 @@ struct amd_iommu_pi_data {
u32 vector; /* Guest vector of the interrupt */
int apicid;
bool wakeup_intr;
+ bool is_running;
bool is_guest_mode;
void *ir_data;
};
diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
index 8e87a7f2f64f..3b2d92a58709 100644
--- a/arch/x86/kvm/svm/avic.c
+++ b/arch/x86/kvm/svm/avic.c
@@ -950,9 +950,11 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
entry = svm->avic_physical_id_entry;
if (entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK) {
pi_data.apicid = entry & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK;
+ pi_data.is_running = true;
} else {
pi_data.apicid = -1;
pi_data.wakeup_intr = entry & AVIC_PHYSICAL_ID_ENTRY_WAKEUP_INTR;
+ pi_data.is_running = false;
}
ret = irq_set_vcpu_affinity(host_irq, &pi_data);
@@ -1008,6 +1010,7 @@ static void avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int apicid,
enum avic_vcpu_action action)
{
bool wakeup_intr = (action & AVIC_START_BLOCKING);
+ bool is_running = apicid >= 0;
struct vcpu_svm *svm = to_svm(vcpu);
struct kvm_kernel_irqfd *irqfd;
@@ -1024,9 +1027,10 @@ static void avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int apicid,
void *data = irqfd->irq_bypass_data;
if (!(action & AVIC_TOGGLE_ON_OFF))
- WARN_ON_ONCE(amd_iommu_update_ga(data, apicid, wakeup_intr));
- else if (apicid >= 0)
- WARN_ON_ONCE(amd_iommu_activate_guest_mode(data, apicid, wakeup_intr));
+ WARN_ON_ONCE(amd_iommu_update_ga(data, apicid, wakeup_intr, is_running));
+ else if (is_running)
+ WARN_ON_ONCE(amd_iommu_activate_guest_mode(data, apicid, wakeup_intr,
+ is_running));
else
WARN_ON_ONCE(amd_iommu_deactivate_guest_mode(data));
}
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 1284f37e44c7..91405e71b3c3 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -3960,9 +3960,9 @@ static const struct irq_domain_ops amd_ir_domain_ops = {
};
static void __amd_iommu_update_ga(struct irte_ga *entry, int apicid,
- bool wakeup_intr)
+ bool wakeup_intr, bool is_running)
{
- if (apicid >= 0) {
+ if (is_running) {
entry->lo.fields_vapic.destination =
APICID_TO_IRTE_DEST_LO(apicid);
entry->hi.fields.destination =
@@ -3979,12 +3979,11 @@ static void __amd_iommu_update_ga(struct irte_ga *entry, int apicid,
* Update the pCPU information for an IRTE that is configured to post IRQs to
* a vCPU, without issuing an IOMMU invalidation for the IRTE.
*
- * If the vCPU is associated with a pCPU (@apicid >= 0), configure the
- * Destination with the pCPU's APIC ID, set IsRun, and clear GALogIntr. If the
- * vCPU isn't associated with a pCPU (@apicid < 0), clear IsRun and set/clear
- * GALogIntr based on input from the caller (e.g. KVM only requests wakeup_intr
- * when the vCPU is blocking and requires a notification wake event). I.e.
- * treat vCPUs that are associated with a pCPU as running. This API is
+ * If the vCPU is scheduled to run on pCPU (@is_running = 1), configure the
+ * Destination with the pCPU's APIC ID, set IsRun, and clear GALogIntr. If the
+ * vCPU is scheduled out (@is_running = 0), clear IsRun and set/clear GALogIntr
+ * based on input from the caller (e.g. KVM only requests wakeup_intr when the
+ * vCPU is blocking and requires a notification wake event). This API is
* intended to be used when a vCPU is scheduled in/out (or stops running for
* any reason), to do a fast update of IsRun, GALogIntr, and (conditionally)
* Destination.
@@ -3993,7 +3992,7 @@ static void __amd_iommu_update_ga(struct irte_ga *entry, int apicid,
* and thus don't require an invalidation to ensure the IOMMU consumes fresh
* information.
*/
-int amd_iommu_update_ga(void *data, int apicid, bool wakeup_intr)
+int amd_iommu_update_ga(void *data, int apicid, bool wakeup_intr, bool is_running)
{
struct amd_ir_data *ir_data = (struct amd_ir_data *)data;
struct irte_ga *entry = (struct irte_ga *) ir_data->entry;
@@ -4007,14 +4006,14 @@ int amd_iommu_update_ga(void *data, int apicid, bool wakeup_intr)
if (!ir_data->iommu)
return -ENODEV;
- __amd_iommu_update_ga(entry, apicid, wakeup_intr);
+ __amd_iommu_update_ga(entry, apicid, wakeup_intr, is_running);
return __modify_irte_ga(ir_data->iommu, ir_data->irq_2_irte.devid,
ir_data->irq_2_irte.index, entry);
}
EXPORT_SYMBOL(amd_iommu_update_ga);
-int amd_iommu_activate_guest_mode(void *data, int apicid, bool wakeup_intr)
+int amd_iommu_activate_guest_mode(void *data, int apicid, bool wakeup_intr, bool is_running)
{
struct amd_ir_data *ir_data = (struct amd_ir_data *)data;
struct irte_ga *entry = (struct irte_ga *) ir_data->entry;
@@ -4037,7 +4036,7 @@ int amd_iommu_activate_guest_mode(void *data, int apicid, bool wakeup_intr)
entry->hi.fields.vector = ir_data->ga_vector;
entry->lo.fields_vapic.ga_tag = ir_data->ga_tag;
- __amd_iommu_update_ga(entry, apicid, wakeup_intr);
+ __amd_iommu_update_ga(entry, apicid, wakeup_intr, is_running);
return modify_irte_ga(ir_data->iommu, ir_data->irq_2_irte.devid,
ir_data->irq_2_irte.index, entry);
@@ -4109,7 +4108,8 @@ static int amd_ir_set_vcpu_affinity(struct irq_data *data, void *info)
ir_data->ga_tag = pi_data->ga_tag;
if (pi_data->is_guest_mode)
ret = amd_iommu_activate_guest_mode(ir_data, pi_data->apicid,
- pi_data->wakeup_intr);
+ pi_data->wakeup_intr,
+ pi_data->is_running);
else
ret = amd_iommu_deactivate_guest_mode(ir_data);
} else {
diff --git a/include/linux/amd-iommu.h b/include/linux/amd-iommu.h
index e20c909edc56..e962ad511d04 100644
--- a/include/linux/amd-iommu.h
+++ b/include/linux/amd-iommu.h
@@ -30,8 +30,10 @@ static inline void amd_iommu_detect(void) { }
/* IOMMU AVIC Function */
extern int amd_iommu_register_ga_log_notifier(int (*notifier)(u32));
-extern int amd_iommu_update_ga(void *data, int apicid, bool wakeup_intr);
-extern int amd_iommu_activate_guest_mode(void *data, int apicid, bool wakeup_intr);
+extern int amd_iommu_update_ga(void *data, int apicid, bool wakeup_intr,
+ bool is_running);
+extern int amd_iommu_activate_guest_mode(void *data, int apicid, bool wakeup_intr,
+ bool is_running);
extern int amd_iommu_deactivate_guest_mode(void *data);
#else /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */
@@ -42,12 +44,14 @@ amd_iommu_register_ga_log_notifier(int (*notifier)(u32))
return 0;
}
-static inline int amd_iommu_update_ga(void *data, int apicid, bool wakeup_intr)
+static inline int amd_iommu_update_ga(void *data, int apicid, bool wakeup_intr,
+ bool is_running)
{
return 0;
}
-static inline int amd_iommu_activate_guest_mode(void *data, int apicid, bool wakeup_intr)
+static inline int amd_iommu_activate_guest_mode(void *data, int apicid, bool wakeup_intr,
+ bool is_running)
{
return 0;
}
--
2.34.1
^ permalink raw reply related
* [RFC PATCH v3 4/6] iommu/amd: Program guest-mode IRTEs for GAPPI wakeup when IRTE[IsRun] = 0
From: Sairaj Kodilkar @ 2026-07-13 10:50 UTC (permalink / raw)
To: Borislav Petkov (AMD), H. Peter Anvin, Joerg Roedel (AMD),
Paul E. McKenney, Andrew Morton, Dapeng Mi, Dave Hansen,
Eric Biggers, Feng Tang, Ingo Molnar, Jakub Kicinski,
Jonathan Corbet, Li RongQing, Marco Elver, Paolo Bonzini,
Randy Dunlap, Robin Murphy, Sairaj Kodilkar, Sean Christopherson,
Shuah Khan, Suravee Suthikulpanit, Thomas Gleixner, Vasant Hegde,
Will Deacon, iommu, kvm, linux-doc, linux-kernel, x86
In-Reply-To: <20260713105033.15405-1-sarunkod@amd.com>
Guest APIC Physical Processor Interrupt (GAPPI) is an alternative to the
GA log for notifying the host when a device interrupt targets a
non-running vCPU (IRTE[IsRun] = 0). Per the AMD IOMMU specification [1]
(section 2.2.5.4), with GAPPI enabled the IOMMU delivers a physical APIC
interrupt to the CPU described by IRTE[Destination], using
IRTE[GATag][7:0] as the vector, while still updating the guest vAPIC
backing page IRR as usual.
The AMD IOMMU also allows suppressing GAPPI interrupts using the
IRTE[GAPPIDis] bit when the GAPPIDisSup feature is available in
extended feature register 2. The AMD IOMMU driver sets this bit when
the wakeup_intr flag is not set by KVM.
Note: amd_iommu_gappi is currently false; a later patch enables it via
the kernel command line.
[1] https://docs.amd.com/v/u/en-US/48882_3.11_IOMMU_PUB
Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com>
---
drivers/iommu/amd/amd_iommu.h | 1 +
drivers/iommu/amd/amd_iommu_types.h | 4 +++-
drivers/iommu/amd/init.c | 3 +++
drivers/iommu/amd/iommu.c | 30 +++++++++++++++++++----------
include/linux/amd-iommu.h | 1 +
5 files changed, 28 insertions(+), 11 deletions(-)
diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h
index 834d8fabfba3..044179cab12e 100644
--- a/drivers/iommu/amd/amd_iommu.h
+++ b/drivers/iommu/amd/amd_iommu.h
@@ -41,6 +41,7 @@ int amd_iommu_enable(void);
void amd_iommu_disable(void);
int amd_iommu_reenable(int mode);
int amd_iommu_enable_faulting(unsigned int cpu);
+extern bool amd_iommu_gappi;
extern int amd_iommu_guest_ir;
extern enum protection_domain_mode amd_iommu_pgtable;
extern int amd_iommu_gpt_level;
diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index f9f718087893..26d7a9796e64 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -113,6 +113,7 @@
/* Extended Feature 2 Bits */
#define FEATURE_SEVSNPIO_SUP BIT_ULL(1)
#define FEATURE_GCR3TRPMODE BIT_ULL(3)
+#define FEATURE_GAPPIDISSUP BIT_ULL(4)
#define FEATURE_SNPAVICSUP GENMASK_ULL(7, 5)
#define FEATURE_SNPAVICSUP_GAM(x) \
(FIELD_GET(FEATURE_SNPAVICSUP, x) == 0x1)
@@ -1004,7 +1005,8 @@ union irte_ga_lo {
no_fault : 1,
/* ------ */
ga_log_intr : 1,
- rsvd1 : 3,
+ rsvd1 : 2,
+ gappi_dis : 1,
is_run : 1,
/* ------ */
guest_mode : 1,
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index 3bdb380d23e9..2e1889f8a9e4 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -160,6 +160,9 @@ u8 amd_iommu_hpt_level;
/* Guest page table level */
int amd_iommu_gpt_level = PAGE_MODE_4_LEVEL;
+bool amd_iommu_gappi;
+EXPORT_SYMBOL(amd_iommu_gappi);
+
int amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_VAPIC;
static int amd_iommu_xt_mode = IRQ_REMAP_XAPIC_MODE;
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 91405e71b3c3..7eebf4745a67 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -3970,8 +3970,18 @@ static void __amd_iommu_update_ga(struct irte_ga *entry, int apicid,
entry->lo.fields_vapic.is_run = true;
entry->lo.fields_vapic.ga_log_intr = false;
} else {
- entry->lo.fields_vapic.is_run = false;
- entry->lo.fields_vapic.ga_log_intr = wakeup_intr;
+ if (amd_iommu_gappi) {
+ entry->lo.fields_vapic.gappi_dis = !wakeup_intr &&
+ check_feature2(FEATURE_GAPPIDISSUP);
+ entry->lo.fields_vapic.is_run = false;
+ entry->lo.fields_vapic.destination =
+ APICID_TO_IRTE_DEST_LO(apicid);
+ entry->hi.fields.destination =
+ APICID_TO_IRTE_DEST_HI(apicid);
+ } else {
+ entry->lo.fields_vapic.is_run = false;
+ entry->lo.fields_vapic.ga_log_intr = wakeup_intr;
+ }
}
}
@@ -3982,15 +3992,15 @@ static void __amd_iommu_update_ga(struct irte_ga *entry, int apicid,
* If the vCPU is scheduled to run on pCPU (@is_running = 1), configure the
* Destination with the pCPU's APIC ID, set IsRun, and clear GALogIntr. If the
* vCPU is scheduled out (@is_running = 0), clear IsRun and set/clear GALogIntr
- * based on input from the caller (e.g. KVM only requests wakeup_intr when the
- * vCPU is blocking and requires a notification wake event). This API is
- * intended to be used when a vCPU is scheduled in/out (or stops running for
- * any reason), to do a fast update of IsRun, GALogIntr, and (conditionally)
- * Destination.
+ * and GAPPIDis based on input from the caller (e.g. KVM only requests
+ * wakeup_intr when the vCPU is blocking and requires a notification wake
+ * event). This API is intended to be used when a vCPU is scheduled in/out (or
+ * stops running for any reason), to do a fast update of IsRun, GALogIntr,
+ * GAPPIDis and (conditionally) Destination.
*
- * Per the IOMMU spec, the Destination, IsRun, and GATag fields are not cached
- * and thus don't require an invalidation to ensure the IOMMU consumes fresh
- * information.
+ * Per the IOMMU spec, the Destination, IsRun, GATag and GAPPIDis fields are
+ * not cached and thus don't require an invalidation to ensure the IOMMU
+ * consumes fresh information.
*/
int amd_iommu_update_ga(void *data, int apicid, bool wakeup_intr, bool is_running)
{
diff --git a/include/linux/amd-iommu.h b/include/linux/amd-iommu.h
index e962ad511d04..729d82c4e09e 100644
--- a/include/linux/amd-iommu.h
+++ b/include/linux/amd-iommu.h
@@ -80,4 +80,5 @@ static inline int amd_iommu_snp_disable(void) { return 0; }
static inline bool amd_iommu_sev_tio_supported(void) { return false; }
#endif
+extern bool amd_iommu_gappi;
#endif /* _ASM_X86_AMD_IOMMU_H */
--
2.34.1
^ permalink raw reply related
* [RFC PATCH v3 5/6] KVM: SVM: Add support for AMD IOMMU Guest APIC Physical Processor Interrupt (GAPPI)
From: Sairaj Kodilkar @ 2026-07-13 10:50 UTC (permalink / raw)
To: Borislav Petkov (AMD), H. Peter Anvin, Joerg Roedel (AMD),
Paul E. McKenney, Andrew Morton, Dapeng Mi, Dave Hansen,
Eric Biggers, Feng Tang, Ingo Molnar, Jakub Kicinski,
Jonathan Corbet, Li RongQing, Marco Elver, Paolo Bonzini,
Randy Dunlap, Robin Murphy, Sairaj Kodilkar, Sean Christopherson,
Shuah Khan, Suravee Suthikulpanit, Thomas Gleixner, Vasant Hegde,
Will Deacon, iommu, kvm, linux-doc, linux-kernel, x86
In-Reply-To: <20260713105033.15405-1-sarunkod@amd.com>
With AVIC guest-mode interrupt remapping, device interrupts are posted into
the guest vAPIC backing page by the IOMMU. When the vCPU is not running
(IRTE[IsRun] = 0), KVM must still be notified to schedule it. The legacy
path uses the GA log.
GAPPI (Guest APIC Physical Processor Interrupt) is an alternative to the
GA log mechanism provided by the AMD IOMMU. With GAPPI enabled, the IOMMU
still updates the vAPIC backing page IRR, but the host wakeup notification
is delivered as a physical APIC interrupt to IRTE[Destination], using
IRTE[GATag][7:0] as the vector (POSTED_INTR_WAKEUP_VECTOR).
SVM follows the Intel posted-interrupt wakeup model. Each pCPU maintains
a list of blocked vCPUs that may be woken by a GAPPI delivery to that CPU.
When a vCPU blocks while waiting for an interrupt, SVM enqueues it on the
wakeup list of the pCPU on which it was previously running and passes that
same pCPU's physical APIC ID to the IOMMU to program IRTE[Destination].
The rationale is that the vCPU is likely to run again on the same pCPU,
which is common when vCPUs are pinned; targeting GAPPI notifications there
reduces unnecessary VMEXITs from GAPPI deliveries on other CPUs. SVM
registers the GAPPI handler via kvm_set_posted_intr_wakeup_handler(). On
delivery, it walks the local vCPU list and wakes vCPUs with a pending IRR.
All GAPPI logic is gated on amd_iommu_gappi. Without it, KVM and the IOMMU
falls back to the legacy GA log mechanism for vCPU wakeup.
Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com>
---
arch/x86/kvm/svm/avic.c | 135 +++++++++++++++++++++++++++++++++++-----
arch/x86/kvm/svm/svm.c | 2 +
arch/x86/kvm/svm/svm.h | 5 ++
3 files changed, 128 insertions(+), 14 deletions(-)
diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
index 3b2d92a58709..982a5988532f 100644
--- a/arch/x86/kvm/svm/avic.c
+++ b/arch/x86/kvm/svm/avic.c
@@ -63,6 +63,9 @@
ga_tag; \
})
+static DEFINE_PER_CPU(struct list_head, gappi_vcpu_wakeup_list);
+static DEFINE_PER_CPU(raw_spinlock_t, gappi_vcpu_wakeup_list_lock);
+
static_assert(__AVIC_GATAG(AVIC_VM_ID_MASK, AVIC_VCPU_IDX_MASK) == -1u);
#define AVIC_AUTO_MODE -1
@@ -874,6 +877,9 @@ int avic_init_vcpu(struct vcpu_svm *svm)
INIT_LIST_HEAD(&svm->ir_list);
raw_spin_lock_init(&svm->ir_list_lock);
+ INIT_LIST_HEAD(&svm->gappi_vcpu_wakeup_list);
+ svm->gappi_cpu = -1;
+
if (!enable_apicv || !irqchip_in_kernel(vcpu->kvm))
return 0;
@@ -886,6 +892,42 @@ int avic_init_vcpu(struct vcpu_svm *svm)
return ret;
}
+static void avic_add_vcpu_to_gappi_wakeup_list(struct vcpu_svm *svm, int cpu)
+{
+ struct list_head *wakeup_list;
+ raw_spinlock_t *spinlock;
+
+ if (WARN_ON(unlikely(cpu < 0)))
+ return;
+
+ wakeup_list = &per_cpu(gappi_vcpu_wakeup_list, cpu);
+ spinlock = &per_cpu(gappi_vcpu_wakeup_list_lock, cpu);
+ guard(raw_spinlock_irqsave)(spinlock);
+ if (list_empty(&svm->gappi_vcpu_wakeup_list))
+ list_add_tail(&svm->gappi_vcpu_wakeup_list, wakeup_list);
+}
+
+static void avic_remove_vcpu_from_gappi_wakeup_list(struct vcpu_svm *svm, int cpu)
+{
+ raw_spinlock_t *spinlock;
+
+ if (WARN_ON(unlikely(cpu < 0)))
+ return;
+
+ spinlock = &per_cpu(gappi_vcpu_wakeup_list_lock, cpu);
+ guard(raw_spinlock_irqsave)(spinlock);
+ if (!list_empty(&svm->gappi_vcpu_wakeup_list))
+ list_del_init(&svm->gappi_vcpu_wakeup_list);
+}
+
+void avic_destroy_vcpu(struct vcpu_svm *svm)
+{
+ if (svm->gappi_cpu != -1 && amd_iommu_gappi) {
+ avic_remove_vcpu_from_gappi_wakeup_list(svm, svm->gappi_cpu);
+ svm->gappi_cpu = -1;
+ }
+}
+
void avic_apicv_post_state_restore(struct kvm_vcpu *vcpu)
{
avic_handle_dfr_update(vcpu);
@@ -896,13 +938,18 @@ static void svm_ir_list_del(struct kvm_kernel_irqfd *irqfd)
{
struct kvm_vcpu *vcpu = irqfd->irq_bypass_vcpu;
unsigned long flags;
+ struct vcpu_svm *svm;
if (!vcpu)
return;
- raw_spin_lock_irqsave(&to_svm(vcpu)->ir_list_lock, flags);
+ svm = to_svm(vcpu);
+
+ raw_spin_lock_irqsave(&svm->ir_list_lock, flags);
list_del(&irqfd->vcpu_list);
- raw_spin_unlock_irqrestore(&to_svm(vcpu)->ir_list_lock, flags);
+ if (amd_iommu_gappi && list_empty(&svm->ir_list))
+ avic_remove_vcpu_from_gappi_wakeup_list(svm, svm->gappi_cpu);
+ raw_spin_unlock_irqrestore(&svm->ir_list_lock, flags);
}
int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
@@ -923,8 +970,6 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
* if AVIC is enabled/uninhibited in the future.
*/
struct amd_iommu_pi_data pi_data = {
- .ga_tag = AVIC_GATAG(to_kvm_svm(kvm)->avic_vm_id,
- vcpu->vcpu_idx),
.is_guest_mode = kvm_vcpu_apicv_active(vcpu),
.vapic_addr = avic_get_backing_page_address(to_svm(vcpu)),
.vector = vector,
@@ -932,6 +977,7 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
struct vcpu_svm *svm = to_svm(vcpu);
u64 entry;
int ret;
+ bool is_vcpu_waiting = false;
/*
* Prevent the vCPU from being scheduled out or migrated until
@@ -947,6 +993,12 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
* scheduled out, KVM will update the pCPU info when the vCPU
* is awakened and/or scheduled in. See also avic_vcpu_load().
*/
+ if (amd_iommu_gappi)
+ pi_data.ga_tag = POSTED_INTR_WAKEUP_VECTOR;
+ else
+ pi_data.ga_tag = AVIC_GATAG(to_kvm_svm(kvm)->avic_vm_id,
+ vcpu->vcpu_idx);
+
entry = svm->avic_physical_id_entry;
if (entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK) {
pi_data.apicid = entry & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK;
@@ -955,11 +1007,19 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
pi_data.apicid = -1;
pi_data.wakeup_intr = entry & AVIC_PHYSICAL_ID_ENTRY_WAKEUP_INTR;
pi_data.is_running = false;
+
+ if (amd_iommu_gappi) {
+ pi_data.apicid = kvm_cpu_get_apicid(svm->gappi_cpu);
+ if (list_empty(&svm->ir_list)) {
+ avic_add_vcpu_to_gappi_wakeup_list(svm, svm->gappi_cpu);
+ is_vcpu_waiting = true;
+ }
+ }
}
ret = irq_set_vcpu_affinity(host_irq, &pi_data);
if (ret)
- return ret;
+ goto gappi_err_out;
/*
* Revert to legacy mode if the IOMMU didn't provide metadata
@@ -968,12 +1028,17 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
*/
if (WARN_ON_ONCE(!pi_data.ir_data)) {
irq_set_vcpu_affinity(host_irq, NULL);
- return -EIO;
+ ret = -EIO;
+ goto gappi_err_out;
}
irqfd->irq_bypass_data = pi_data.ir_data;
list_add(&irqfd->vcpu_list, &svm->ir_list);
return 0;
+gappi_err_out:
+ if (is_vcpu_waiting)
+ avic_remove_vcpu_from_gappi_wakeup_list(svm, svm->gappi_cpu);
+ return ret;
}
return irq_set_vcpu_affinity(host_irq, NULL);
}
@@ -1007,7 +1072,7 @@ enum avic_vcpu_action {
};
static void avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int apicid,
- enum avic_vcpu_action action)
+ int cpu, enum avic_vcpu_action action)
{
bool wakeup_intr = (action & AVIC_START_BLOCKING);
bool is_running = apicid >= 0;
@@ -1018,10 +1083,27 @@ static void avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int apicid,
/*
* Here, we go through the per-vcpu ir_list to update all existing
- * interrupt remapping table entry targeting this vcpu.
+ * interrupt remapping table entries targeting this vcpu.
*/
- if (list_empty(&svm->ir_list))
+ if (list_empty(&svm->ir_list)) {
+ if (amd_iommu_gappi && cpu >= 0)
+ svm->gappi_cpu = cpu;
return;
+ }
+
+ if (is_running && amd_iommu_gappi) {
+ if (svm->gappi_cpu != -1)
+ /*
+ * Handle initial state when vCPU is loaded for the
+ * first time without any IRQ affinity.
+ */
+ avic_remove_vcpu_from_gappi_wakeup_list(svm, svm->gappi_cpu);
+
+ svm->gappi_cpu = cpu; /* Store cpu number as target for GAPPI */
+ } else if (amd_iommu_gappi) {
+ apicid = kvm_cpu_get_apicid(svm->gappi_cpu);
+ avic_add_vcpu_to_gappi_wakeup_list(svm, svm->gappi_cpu);
+ }
list_for_each_entry(irqfd, &svm->ir_list, vcpu_list) {
void *data = irqfd->irq_bypass_data;
@@ -1084,7 +1166,7 @@ static void __avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu,
WRITE_ONCE(kvm_svm->avic_physical_id_table[vcpu->vcpu_id], entry);
- avic_update_iommu_vcpu_affinity(vcpu, h_physical_id, action);
+ avic_update_iommu_vcpu_affinity(vcpu, h_physical_id, cpu, action);
raw_spin_unlock_irqrestore(&svm->ir_list_lock, flags);
}
@@ -1127,7 +1209,7 @@ static void __avic_vcpu_put(struct kvm_vcpu *vcpu, enum avic_vcpu_action action)
*/
raw_spin_lock_irqsave(&svm->ir_list_lock, flags);
- avic_update_iommu_vcpu_affinity(vcpu, -1, action);
+ avic_update_iommu_vcpu_affinity(vcpu, -1, -1, action);
WARN_ON_ONCE(entry & AVIC_PHYSICAL_ID_ENTRY_WAKEUP_INTR);
@@ -1175,7 +1257,7 @@ void avic_vcpu_put(struct kvm_vcpu *vcpu)
/*
* The vCPU was preempted while blocking, ensure its IRTEs are
- * configured to generate GA Log Interrupts.
+ * configured to request host wakeup notification.
*/
if (!(WARN_ON_ONCE(!(entry & AVIC_PHYSICAL_ID_ENTRY_WAKEUP_INTR))))
return;
@@ -1300,6 +1382,21 @@ static bool __init avic_want_avic_enabled(void)
return true;
}
+static void avic_gappi_wakeup_handler(void)
+{
+ int cpu = smp_processor_id();
+ struct list_head *vcpu_wakeup_list = &per_cpu(gappi_vcpu_wakeup_list, cpu);
+ raw_spinlock_t *spinlock = &per_cpu(gappi_vcpu_wakeup_list_lock, cpu);
+ struct vcpu_svm *svm;
+
+ raw_spin_lock(spinlock);
+ list_for_each_entry(svm, vcpu_wakeup_list, gappi_vcpu_wakeup_list) {
+ if (kvm_lapic_find_highest_irr(&svm->vcpu) >= 0)
+ kvm_vcpu_wake_up(&svm->vcpu);
+ }
+ raw_spin_unlock(spinlock);
+}
+
/*
* Note:
* - The module param avic enable both xAPIC and x2APIC mode.
@@ -1308,12 +1405,18 @@ static bool __init avic_want_avic_enabled(void)
*/
bool __init avic_hardware_setup(void)
{
+ int cpu;
avic = avic_want_avic_enabled();
if (!avic)
return false;
pr_info("AVIC enabled\n");
+ for_each_possible_cpu(cpu) {
+ INIT_LIST_HEAD(&per_cpu(gappi_vcpu_wakeup_list, cpu));
+ raw_spin_lock_init(&per_cpu(gappi_vcpu_wakeup_list_lock, cpu));
+ }
+
/* AVIC is a prerequisite for x2AVIC. */
x2avic_enabled = boot_cpu_has(X86_FEATURE_X2AVIC);
if (x2avic_enabled) {
@@ -1337,12 +1440,16 @@ bool __init avic_hardware_setup(void)
enable_ipiv = false;
amd_iommu_register_ga_log_notifier(&avic_ga_log_notifier);
+ kvm_set_posted_intr_wakeup_handler(&avic_gappi_wakeup_handler);
return true;
}
void avic_hardware_unsetup(void)
{
- if (avic)
- amd_iommu_register_ga_log_notifier(NULL);
+ if (!avic)
+ return;
+
+ amd_iommu_register_ga_log_notifier(NULL);
+ kvm_set_posted_intr_wakeup_handler(NULL);
}
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index e02a38da5296..b687133f8528 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -1356,6 +1356,8 @@ static void svm_vcpu_free(struct kvm_vcpu *vcpu)
WARN_ON_ONCE(!list_empty(&svm->ir_list));
+ avic_destroy_vcpu(svm);
+
svm_leave_nested(vcpu);
svm_free_nested(svm);
diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h
index 5137416be593..47d5bb5d7103 100644
--- a/arch/x86/kvm/svm/svm.h
+++ b/arch/x86/kvm/svm/svm.h
@@ -362,6 +362,10 @@ struct vcpu_svm {
/* Guest GIF value, used when vGIF is not enabled */
bool guest_gif;
+
+ /* GAPPI related fields */
+ struct list_head gappi_vcpu_wakeup_list;
+ int gappi_cpu;
};
struct svm_cpu_data {
@@ -909,6 +913,7 @@ void avic_init_vmcb(struct vcpu_svm *svm, struct vmcb *vmcb);
int avic_incomplete_ipi_interception(struct kvm_vcpu *vcpu);
int avic_unaccelerated_access_interception(struct kvm_vcpu *vcpu);
int avic_init_vcpu(struct vcpu_svm *svm);
+void avic_destroy_vcpu(struct vcpu_svm *svm);
void avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu);
void avic_vcpu_put(struct kvm_vcpu *vcpu);
void avic_apicv_post_state_restore(struct kvm_vcpu *vcpu);
--
2.34.1
^ permalink raw reply related
* [RFC PATCH v3 6/6] iommu/amd: Provide kernel command line option to enable GAPPI
From: Sairaj Kodilkar @ 2026-07-13 10:50 UTC (permalink / raw)
To: Borislav Petkov (AMD), H. Peter Anvin, Joerg Roedel (AMD),
Paul E. McKenney, Andrew Morton, Dapeng Mi, Dave Hansen,
Eric Biggers, Feng Tang, Ingo Molnar, Jakub Kicinski,
Jonathan Corbet, Li RongQing, Marco Elver, Paolo Bonzini,
Randy Dunlap, Robin Murphy, Sairaj Kodilkar, Sean Christopherson,
Shuah Khan, Suravee Suthikulpanit, Thomas Gleixner, Vasant Hegde,
Will Deacon, iommu, kvm, linux-doc, linux-kernel, x86
In-Reply-To: <20260713105033.15405-1-sarunkod@amd.com>
Enable GAPPI when the IOMMU GAPPISup extended feature bit is set and
the kernel is booted with the amd_iommu=gappi kernel parameter.
Document the option in Documentation/admin-guide/kernel-parameters.txt.
Co-developed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com>
---
.../admin-guide/kernel-parameters.txt | 3 +-
drivers/iommu/amd/amd_iommu_types.h | 2 ++
drivers/iommu/amd/init.c | 28 +++++++++++++++++--
3 files changed, 29 insertions(+), 4 deletions(-)
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 97007f4f69d4..d27f10cbb004 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -455,7 +455,8 @@ Kernel parameters
to 4 KiB.
v2_pgsizes_only - Limit page-sizes used for v1 page-tables
to 4KiB/2Mib/1GiB.
-
+ gappi - Use GAPPI instead of GALOG for vCPU
+ wakeup notification.
amd_iommu_dump= [HW,X86-64]
Enable AMD IOMMU driver option to dump the ACPI table
diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index 26d7a9796e64..de0b23306944 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -94,6 +94,7 @@
#define FEATURE_X2APIC BIT_ULL(2)
#define FEATURE_NX BIT_ULL(3)
#define FEATURE_GT BIT_ULL(4)
+#define FEATURE_GAPPI BIT_ULL(5)
#define FEATURE_IA BIT_ULL(6)
#define FEATURE_GA BIT_ULL(7)
#define FEATURE_HE BIT_ULL(8)
@@ -191,6 +192,7 @@
#define CONTROL_EPH_EN 45
#define CONTROL_XT_EN 50
#define CONTROL_INTCAPXT_EN 51
+#define CONTROL_GAPPI_EN 55
#define CONTROL_GCR3TRPMODE 58
#define CONTROL_IRTCACHEDIS 59
#define CONTROL_SNPAVIC_EN 61
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index 2e1889f8a9e4..7d2b1c24f6ec 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -465,6 +465,9 @@ static void iommu_disable(struct amd_iommu *iommu)
iommu_feature_disable(iommu, CONTROL_GALOG_EN);
iommu_feature_disable(iommu, CONTROL_GAINT_EN);
+ /* Disable IOMMU GAPPI */
+ iommu_feature_disable(iommu, CONTROL_GAPPI_EN);
+
/* Disable IOMMU PPR logging */
iommu_feature_disable(iommu, CONTROL_PPRLOG_EN);
iommu_feature_disable(iommu, CONTROL_PPRINT_EN);
@@ -2999,6 +3002,13 @@ static void enable_iommus_vapic(void)
struct amd_iommu *iommu;
for_each_iommu(iommu) {
+ /*
+ * Disable GAPPI, do not check amd_iommu_gappi as it may be
+ * false in new kexec kernel even though previous kernel has
+ * enabled it.
+ */
+ iommu_feature_disable(iommu, CONTROL_GAPPI_EN);
+
/*
* Disable GALog if already running. It could have been enabled
* in the previous boot before kdump.
@@ -3038,10 +3048,19 @@ static void enable_iommus_vapic(void)
return;
}
+ if (amd_iommu_gappi &&
+ !(check_feature(FEATURE_GAPPI) &&
+ AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir))) {
+ pr_warn("GAPPI is not supported.\n");
+ amd_iommu_gappi = false;
+ }
+
/* Enabling GAM and SNPAVIC support */
for_each_iommu(iommu) {
- if (iommu_init_ga_log(iommu) ||
- iommu_ga_log_enable(iommu))
+ if (amd_iommu_gappi)
+ iommu_feature_enable(iommu, CONTROL_GAPPI_EN);
+ else if (iommu_init_ga_log(iommu) ||
+ iommu_ga_log_enable(iommu))
return;
iommu_feature_enable(iommu, CONTROL_GAM_EN);
@@ -3050,7 +3069,8 @@ static void enable_iommus_vapic(void)
}
amd_iommu_irq_ops.capability |= (1 << IRQ_POSTING_CAP);
- pr_info("Virtual APIC enabled\n");
+ pr_info("Virtual APIC enabled with %s\n",
+ amd_iommu_gappi ? "GAPPI" : "GALOG");
#endif
}
@@ -3741,6 +3761,8 @@ static int __init parse_amd_iommu_options(char *str)
} else if (strncmp(str, "v2_pgsizes_only", 15) == 0) {
pr_info("Restricting V1 page-sizes to 4KiB/2MiB/1GiB");
amd_iommu_pgsize_bitmap = AMD_IOMMU_PGSIZES_V2;
+ } else if (strncmp(str, "gappi", 5) == 0) {
+ amd_iommu_gappi = true;
} else {
pr_notice("Unknown option - '%s'\n", str);
}
--
2.34.1
^ permalink raw reply related
* Re: [PATCH v4 4/4] slub: apply new pw_queue_on() interface
From: Vlastimil Babka (SUSE) @ 2026-07-13 10:55 UTC (permalink / raw)
To: Sebastian Andrzej Siewior, Leonardo Bras
Cc: Jonathan Corbet, Shuah Khan, Peter Zijlstra, Ingo Molnar,
Will Deacon, Boqun Feng, Waiman Long, Andrew Morton,
David Hildenbrand, Lorenzo Stoakes, Liam R. Howlett,
Mike Rapoport, Suren Baghdasaryan, Michal Hocko, Jann Horn,
Pedro Falcato, Brendan Jackman, Johannes Weiner, Zi Yan,
Harry Yoo, Hao Li, Christoph Lameter, David Rientjes,
Roman Gushchin, Chris Li, Kairui Song, Kemeng Shi, Nhat Pham,
Baoquan He, Barry Song, Youngjun Park, Qi Zheng, Shakeel Butt,
Axel Rasmussen, Yuanchu Xie, Wei Xu, Borislav Petkov (AMD),
Randy Dunlap, Feng Tang, Dapeng Mi, Kees Cook, Marco Elver,
Jakub Kicinski, Li RongQing, Eric Biggers, Paul E. McKenney,
Nathan Chancellor, Nicolas Schier, Miguel Ojeda,
Thomas Weißschuh, Thomas Gleixner, Douglas Anderson,
Gary Guo, Christian Brauner, Pasha Tatashin, Coiby Xu,
Masahiro Yamada, Frederic Weisbecker, linux-doc, linux-kernel,
linux-mm, linux-rt-devel, Marcelo Tosatti
In-Reply-To: <20260713073634.3Hrxpfcx@linutronix.de>
On 7/13/26 09:36, Sebastian Andrzej Siewior wrote:
> On 2026-07-12 19:35:28 [-0300], Leonardo Bras wrote:
>> On Wed, May 20, 2026 at 04:53:08PM +0200, Sebastian Andrzej Siewior wrote:
>> > On 2026-05-18 22:27:50 [-0300], Leonardo Bras wrote:
>> > > @@ -4733,121 +4735,121 @@ void *alloc_from_pcs(struct kmem_cache *s, gfp_t gfp, int node)
>> > >
>> > > /*
>> > > * We assume the percpu sheaves contain only local objects although it's
>> > > * not completely guaranteed, so we verify later.
>> > > */
>> > > if (unlikely(node_requested && node != numa_mem_id())) {
>> > > stat(s, ALLOC_NODE_MISMATCH);
>> > > return NULL;
>> > > }
>> > >
>> > > - if (!local_trylock(&s->cpu_sheaves->lock))
>> > > + if (!pw_trylock_local(&s->cpu_sheaves->lock))
>> > > return NULL;
>> >
>> > alloc_from_pcs() can be called from kmalloc_nolock()/ NMI context.
>> > I don't remember why exactly local_trylock_t was introduced here instead
>> > of a per-CPU spinlock_t.
>>
>> Probably to save the cost of using atomic operations on locking, and having
Yes. Also function call overhead as spinlocks are often not inlined.
>> about the same restrictions that would allow using local_locks
Indeed.
>> > But there should be nothing wrong with a
>> > trylock on it from NMI as you do here.
>>
>> Awesome!
>
> The problem is always the unlock which requires full locking and is
> usually the problem from NMI.
>
>> >
>> > One thing worth noting, on !PREEMPT_RT, spin_trylock() always succeeds
>> > on UP. kmalloc_nolock() checks for it, not sure about other callers.
>>
>>
>> Sorry, I did not sure I understand that part.
>> You mean we have since it always returns true, we may be in NMI context,
>> after it was interrupted holding this lock, and it will return true which
>> will use the protected area even though the lock should avoid it?
>
> from include/linux/spinlock_api_up.h:
> | static __always_inline int _raw_spin_trylock(raw_spinlock_t *lock)
> | __cond_acquires(true, lock)
> | {
> | __LOCK(lock);
> | return 1;
> | }
>
> on UP a spin_trylock() always succeeds.
Indeed. This was a problem in the page allocator, because there we don't
even disable irqs, so it wasn't just nmi, but an irq that could get a
false-positive spin_trylock(). See 038a102535eb ("mm/page_alloc: prevent pcp
corruption with SMP=n") which was a hot fix.
This was later cleaned up with 3 commits starting with a373f371166d
("mm/page_alloc: effectively disable pcp with CONFIG_SMP=n").
Since here you're also replacing local_trylock() (with no _irqsave) with
effectively spin_trylock(), the problem also won't be limited to NMIs and
thus the checks in kmalloc_nolock() won't help.
But I see in Patch 1:
+config PWLOCKS
+ bool "Per-CPU Work locks"
+ depends on SMP || COMPILE_TEST
So that's basically avoiding the problem in the same way as the page
allocator after the clean up.
Maybe just remove the COMPILE_TEST part? It's not clear to me what it
achieves. Just make it require SMP as there's no point for this on !SMP.
>> Humm, but if that scenario exist, then is it actually ok to return true on
>> trylock() in that scenario?
>>
>> Thanks!
>> Leo
>
> Sebastian
^ permalink raw reply
* [PATCH v6 3/3] iommu/arm-smmu-v3: Enable CFGI/TLBI-repeat workaround on Tegra264
From: Ashish Mhetre @ 2026-07-13 11:15 UTC (permalink / raw)
To: catalin.marinas, will, corbet, skhan, robin.murphy, joro,
nicolinc, jgg
Cc: linux-arm-kernel, linux-doc, linux-kernel, iommu, linux-tegra,
Ashish Mhetre
In-Reply-To: <20260713111543.1462161-1-amhetre@nvidia.com>
Nvidia Tegra264 SMMU is affected by an erratum where a TLB entry can
survive an invalidation that races with concurrent traffic targeting
the same entry. The hardware-recommended software workaround is to
issue every CFGI/TLBI command (each followed by CMD_SYNC) twice, and
that infrastructure is already in place behind
arm_smmu_erratum_repeat_tlbi_cfgi_key.
Neither IDR nor IIDR flags this Tegra264-specific bug, so hardware
detection is not possible. Tegra264 is device-tree-only (no ACPI/IORT
support) and already has a dedicated "nvidia,tegra264-smmu" compatible,
so DT-probe is the only viable detection path.
Enable the workaround on instances matching the existing
"nvidia,tegra264-smmu" compatible by calling static_branch_enable() on
arm_smmu_erratum_repeat_tlbi_cfgi_key. Document the erratum in
Documentation/arch/arm64/silicon-errata.rst.
Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
---
Documentation/arch/arm64/silicon-errata.rst | 2 ++
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 4 +++-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst
index 014aa1c215a1..076b3947d259 100644
--- a/Documentation/arch/arm64/silicon-errata.rst
+++ b/Documentation/arch/arm64/silicon-errata.rst
@@ -312,6 +312,8 @@ stable kernels.
| | | T241-MPAM-4, | |
| | | T241-MPAM-6 | |
+----------------+-----------------+-----------------+-----------------------------+
+| NVIDIA | T264 SMMU | T264-SMMU-3 | N/A |
++----------------+-----------------+-----------------+-----------------------------+
+----------------+-----------------+-----------------+-----------------------------+
| Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 |
+----------------+-----------------+-----------------+-----------------------------+
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index eb8374cfce2a..b97bbf7943ac 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -5353,8 +5353,10 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev,
if (of_dma_is_coherent(dev->of_node))
smmu->features |= ARM_SMMU_FEAT_COHERENCY;
- if (of_device_is_compatible(dev->of_node, "nvidia,tegra264-smmu"))
+ if (of_device_is_compatible(dev->of_node, "nvidia,tegra264-smmu")) {
tegra_cmdqv_dt_probe(dev->of_node, smmu);
+ static_branch_enable(&arm_smmu_erratum_repeat_tlbi_cfgi_key);
+ }
return ret;
}
--
2.50.1
^ permalink raw reply related
* [PATCH v6 1/3] iommu/arm-smmu-v3: Factor out CMDQ batch force-sync conditions
From: Ashish Mhetre @ 2026-07-13 11:15 UTC (permalink / raw)
To: catalin.marinas, will, corbet, skhan, robin.murphy, joro,
nicolinc, jgg
Cc: linux-arm-kernel, linux-doc, linux-kernel, iommu, linux-tegra,
Ashish Mhetre
In-Reply-To: <20260713111543.1462161-1-amhetre@nvidia.com>
From: Nicolin Chen <nicolinc@nvidia.com>
arm_smmu_cmdq_batch_add_cmd_p() carries two distinct reasons for
flushing the current batch with a CMD_SYNC before appending the
new command:
- The batch's pre-assigned cmdq does not support the new command.
- The Arm erratum 2812531 workaround (ARM_SMMU_OPT_CMDQ_FORCE_SYNC)
forces a SYNC at one entry before the batch is full.
Lift those checks into a new arm_smmu_cmdq_batch_force_sync() helper
so that adding another force-sync condition becomes a one-line
addition. No functional change.
Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 23 +++++++++++++++------
1 file changed, 17 insertions(+), 6 deletions(-)
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index 57b750ebcd3d..dd7475c50afc 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -847,16 +847,27 @@ static void arm_smmu_cmdq_batch_init_cmd(struct arm_smmu_device *smmu,
cmds->cmdq = arm_smmu_get_cmdq(smmu, cmd);
}
+static bool arm_smmu_cmdq_batch_force_sync(struct arm_smmu_device *smmu,
+ struct arm_smmu_cmdq_batch *cmds,
+ struct arm_smmu_cmd *cmd)
+{
+ /* The batch's pre-assigned cmdq doesn't support the new command */
+ if (!arm_smmu_cmdq_supports_cmd(cmds->cmdq, cmd))
+ return true;
+
+ /* Arm erratum 2812531 */
+ if (cmds->num == CMDQ_BATCH_ENTRIES - 1 &&
+ (smmu->options & ARM_SMMU_OPT_CMDQ_FORCE_SYNC))
+ return true;
+
+ return false;
+}
+
static void arm_smmu_cmdq_batch_add_cmd_p(struct arm_smmu_device *smmu,
struct arm_smmu_cmdq_batch *cmds,
struct arm_smmu_cmd *cmd)
{
- bool force_sync = (cmds->num == CMDQ_BATCH_ENTRIES - 1) &&
- (smmu->options & ARM_SMMU_OPT_CMDQ_FORCE_SYNC);
- bool unsupported_cmd;
-
- unsupported_cmd = !arm_smmu_cmdq_supports_cmd(cmds->cmdq, cmd);
- if (force_sync || unsupported_cmd) {
+ if (arm_smmu_cmdq_batch_force_sync(smmu, cmds, cmd)) {
arm_smmu_cmdq_issue_cmdlist(smmu, cmds->cmdq, cmds->cmds,
cmds->num, true);
arm_smmu_cmdq_batch_init_cmd(smmu, cmds, cmd);
--
2.50.1
^ permalink raw reply related
* [PATCH v6 2/3] iommu/arm-smmu-v3: Introduce CFGI/TLBI-repeat workaround infrastructure
From: Ashish Mhetre @ 2026-07-13 11:15 UTC (permalink / raw)
To: catalin.marinas, will, corbet, skhan, robin.murphy, joro,
nicolinc, jgg
Cc: linux-arm-kernel, linux-doc, linux-kernel, iommu, linux-tegra,
Ashish Mhetre
In-Reply-To: <20260713111543.1462161-1-amhetre@nvidia.com>
Tegra264 SMMU instances need every CFGI/TLBI command sequence issued
twice, with the second issue executing only after the first issue's
CMD_SYNC has completed:
TLBI/CFGI ... CMD_SYNC TLBI/CFGI ... CMD_SYNC
ATC_INV is not affected and must never be doubled.
Add arm_smmu_erratum_repeat_tlbi_cfgi_key and an
arm_smmu_erratum_cmd_needs_repeating() helper that gates on the static
key first and then range-checks the opcode (CFGI_STE .. ATC_INV), so
subsequent changes wiring the workaround into the CMDQ submission and
iommufd batching paths can share a single predicate.
Rename the existing arm_smmu_cmdq_issue_cmdlist() to
__arm_smmu_cmdq_issue_cmdlist() and add a thin wrapper that re-issues
the same cmdlist a second time when the predicate fires. Register the
new condition with arm_smmu_cmdq_batch_force_sync() and add
arm_vsmmu_can_batch_cmd() so iommufd batches split at every "needs
repeating" transition.
No callers enable the static key yet, so there is no functional change.
A subsequent change will enable the key on affected instances.
Suggested-by: Nicolin Chen <nicolinc@nvidia.com>
Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
---
.../arm/arm-smmu-v3/arm-smmu-v3-iommufd.c | 15 +++++-
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 53 +++++++++++++++++--
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 +
3 files changed, 64 insertions(+), 5 deletions(-)
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c
index 1e9f7d2de344..e8061c14c391 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c
@@ -350,6 +350,18 @@ static int arm_vsmmu_convert_user_cmd(struct arm_vsmmu *vsmmu,
return 0;
}
+static bool arm_vsmmu_can_batch_cmd(struct arm_smmu_device *smmu,
+ struct arm_vsmmu_invalidation_cmd *last,
+ struct arm_vsmmu_invalidation_cmd *next)
+{
+ struct arm_smmu_cmd next_cmd = {
+ .data[0] = le64_to_cpu(next->ucmd.cmd[0]),
+ };
+
+ return arm_smmu_erratum_cmd_needs_repeating(&last->cmd) ==
+ arm_smmu_erratum_cmd_needs_repeating(&next_cmd);
+}
+
int arm_vsmmu_cache_invalidate(struct iommufd_viommu *viommu,
struct iommu_user_data_array *array)
{
@@ -382,7 +394,8 @@ int arm_vsmmu_cache_invalidate(struct iommufd_viommu *viommu,
/* FIXME work in blocks of CMDQ_BATCH_ENTRIES and copy each block? */
cur++;
- if (cur != end && (cur - last) != CMDQ_BATCH_ENTRIES - 1)
+ if (cur != end && (cur - last) != CMDQ_BATCH_ENTRIES - 1 &&
+ arm_vsmmu_can_batch_cmd(smmu, last, cur))
continue;
/* FIXME always uses the main cmdq rather than trying to group by type */
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index dd7475c50afc..eb8374cfce2a 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -42,6 +42,14 @@ MODULE_PARM_DESC(disable_msipolling,
static const struct iommu_ops arm_smmu_ops;
static struct iommu_dirty_ops arm_smmu_dirty_ops;
+/*
+ * Repeat every {CFGI,TLBI};CMD_SYNC command sequence so that the second
+ * issue executes only after the first issue's CMD_SYNC has completed.
+ * Does not apply to ATC_INV. The key is global and is enabled from DT
+ * probe on affected hardware (currently Tegra264 only).
+ */
+static DEFINE_STATIC_KEY_FALSE(arm_smmu_erratum_repeat_tlbi_cfgi_key);
+
enum arm_smmu_msi_index {
EVTQ_MSI_INDEX,
GERROR_MSI_INDEX,
@@ -698,10 +706,10 @@ static void arm_smmu_cmdq_write_entries(struct arm_smmu_cmdq *cmdq,
* insert their own list of commands then all of the commands from one
* CPU will appear before any of the commands from the other CPU.
*/
-int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu,
- struct arm_smmu_cmdq *cmdq,
- struct arm_smmu_cmd *cmds, int n,
- bool sync)
+static int __arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu,
+ struct arm_smmu_cmdq *cmdq,
+ struct arm_smmu_cmd *cmds, int n,
+ bool sync)
{
struct arm_smmu_cmd cmd_sync;
u32 prod;
@@ -820,6 +828,38 @@ int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu,
return ret;
}
+bool arm_smmu_erratum_cmd_needs_repeating(struct arm_smmu_cmd *cmd)
+{
+ u8 opcode;
+
+ if (!static_branch_unlikely(&arm_smmu_erratum_repeat_tlbi_cfgi_key))
+ return false;
+
+ opcode = FIELD_GET(CMDQ_0_OP, cmd->data[0]);
+ return opcode >= CMDQ_OP_CFGI_STE && opcode < CMDQ_OP_ATC_INV;
+}
+
+int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu,
+ struct arm_smmu_cmdq *cmdq,
+ struct arm_smmu_cmd *cmds, int n,
+ bool sync)
+{
+ int ret = __arm_smmu_cmdq_issue_cmdlist(smmu, cmdq, cmds, n, sync);
+
+ /*
+ * A bare CMD_SYNC can be issued with n == 0 (e.g. an empty
+ * batch_submit()), in which case there is no cmds[0] to inspect
+ * and nothing to repeat.
+ */
+ if (!n || ret || !sync)
+ return ret;
+
+ if (arm_smmu_erratum_cmd_needs_repeating(&cmds[0]))
+ ret = __arm_smmu_cmdq_issue_cmdlist(smmu, cmdq, cmds, n, sync);
+
+ return ret;
+}
+
static int arm_smmu_cmdq_issue_cmd_p(struct arm_smmu_device *smmu,
struct arm_smmu_cmd *cmd, bool sync)
{
@@ -860,6 +900,11 @@ static bool arm_smmu_cmdq_batch_force_sync(struct arm_smmu_device *smmu,
(smmu->options & ARM_SMMU_OPT_CMDQ_FORCE_SYNC))
return true;
+ /* See the description at arm_smmu_erratum_repeat_tlbi_cfgi_key */
+ if (cmds->num == CMDQ_BATCH_ENTRIES &&
+ arm_smmu_erratum_cmd_needs_repeating(&cmds->cmds[0]))
+ return true;
+
return false;
}
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
index c909c9a88538..e175dedf7c77 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
@@ -1211,6 +1211,7 @@ int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu,
struct arm_smmu_cmdq *cmdq,
struct arm_smmu_cmd *cmds, int n,
bool sync);
+bool arm_smmu_erratum_cmd_needs_repeating(struct arm_smmu_cmd *cmd);
#ifdef CONFIG_ARM_SMMU_V3_SVA
bool arm_smmu_sva_supported(struct arm_smmu_device *smmu);
--
2.50.1
^ permalink raw reply related
* [PATCH v6 0/3] iommu/arm-smmu-v3: Tegra264 invalidation workaround
From: Ashish Mhetre @ 2026-07-13 11:15 UTC (permalink / raw)
To: catalin.marinas, will, corbet, skhan, robin.murphy, joro,
nicolinc, jgg
Cc: linux-arm-kernel, linux-doc, linux-kernel, iommu, linux-tegra,
Ashish Mhetre
Nvidia Tegra264 SMMUs are affected by an erratum where a TLB entry can
survive an invalidation that races with concurrent traffic targeting
the same entry. The hardware-recommended software workaround is to
issue every CFGI/TLBI command (each followed by CMD_SYNC) twice.
The second issue must execute only after the first issue's CMD_SYNC
has completed, giving the sequence:
TLBI/CFGI ... CMD_SYNC TLBI/CFGI ... CMD_SYNC
ATC_INV is not affected and must not be doubled.
The erratum is not flagged by any SMMUv3 IDR/IIDR register, so it
cannot be detected from hardware ID. Tegra264 is device-tree-only
(no ACPI/IORT support), so detection is purely by compatible string.
This series is structured as a small refactor + infrastructure + enable
sequence so that each step is reviewable in isolation:
1/3 Pure refactor (no functional change): lift the existing
force-sync conditions out of arm_smmu_cmdq_batch_add_cmd_p()
into a new arm_smmu_cmdq_batch_force_sync() helper, so that
adding another condition (in patch 2) is a one-line addition.
Authored by Nicolin Chen.
2/3 Add the workaround infrastructure without enabling it. Defines
the file-local arm_smmu_erratum_repeat_tlbi_cfgi_key static key
with an inline erratum description, the shared
arm_smmu_erratum_cmd_needs_repeating() predicate, the
arm_smmu_cmdq_issue_cmdlist() wrapper that can re-issue matching
cmdlists, the batch-helper force-sync condition, and the iommufd
batching split for mixed command classes.
3/3 Enable the workaround for the existing "nvidia,tegra264-smmu"
compatible and document the erratum in silicon-errata.rst.
The series applies cleanly on linux-next/master (base-commit below).
Changes since v5:
- Move arm_smmu_erratum_cmd_needs_repeating() into arm-smmu-v3.c
and leave a declaration-only stub in arm-smmu-v3.h. Make
arm_smmu_erratum_repeat_tlbi_cfgi_key file-local static and drop
jump_label.h from the header.
- Add an inline erratum/workaround description at the static key,
referenced from arm_smmu_cmdq_batch_force_sync().
- Drop the misleading !n comment above arm_smmu_cmdq_issue_cmdlist();
keep the defensive !n guard.
- Remove the unused smmu parameter from the predicate.
- Tweak 2/3 commit-message wording ("commit" vs "patch").
- Add Reviewed-by: Nicolin Chen on 3/3.
Changes since v4:
- Drop ARM_SMMU_OPT_REPEAT_TLBI_CFGI entirely: the option bit was
set and read on the exact same "nvidia,tegra264-smmu" compatible
as the static key, so it added no per-instance signal that the
static key did not already carry. The predicate now gates purely
on arm_smmu_erratum_repeat_tlbi_cfgi_key.
- Reorder the series so the compatible-string detection lands
last, once all the infrastructure exists:
1/3 factor out force_sync helper (unchanged)
2/3 add static key + WAR functions (no functional change)
3/3 enable the key on nvidia,tegra264-smmu + silicon-errata
Split the old v4 "Detect" and "Issue twice" patches accordingly.
- Update the /* See ARM_SMMU_OPT_REPEAT_TLBI_CFGI */ comment inside
arm_smmu_cmdq_batch_force_sync() to reference the static key
description instead.
Changes since v3:
- Drop the cmds->num == 0 early-return so the refactor is
truly "no functional change".
- Rename ARM_SMMU_OPT_TLBI_TWICE -> ARM_SMMU_OPT_REPEAT_TLBI_CFGI
and rephrase its kdoc to be hardware-agnostic.
- Rename arm_smmu_cmd_needs_tlbi_twice() ->
arm_smmu_erratum_cmd_needs_repeating() and drop the kdoc
above it.
- Replace the explicit opcode switch with a single range check
opcode >= CMDQ_OP_CFGI_STE && opcode < CMDQ_OP_ATC_INV.
- Introduce arm_smmu_erratum_repeat_tlbi_cfgi_key static key:
the predicate gates on it first so unaffected kernels pay
only a single static_branch_unlikely() check.
- Drop the verbose Tegra264-specific comments above
arm_vsmmu_can_batch_cmd() and inside the batch helper.
- Document the erratum in
Documentation/arch/arm64/silicon-errata.rst.
- Guard the repeat path in arm_smmu_cmdq_issue_cmdlist() with
an n > 0 check so cmds[0] is never inspected on an empty
cmdlist.
- Drop the carried Reviewed-by tags now that the patch
shape has changed; re-review appreciated.
Changes since v2:
- Split into a 3-patch series (refactor / detect / apply) to keep
each step small and bisectable.
- Move the classifier to arm-smmu-v3.h as static inline so the
iommufd file can share it.
- Add arm_vsmmu_can_batch_cmd() to split iommufd batches at
"needs repeating" transitions so the per-batch decision based
on the first command stays correct under mixed user input.
- Spell out in the commit message why detection is via DT and
not via IIDR/ACPI.
Changes since v1:
- Detect the erratum from the existing "nvidia,tegra264-smmu"
compatible instead of adding a new property.
- Centralise the doubling at the CMDQ submission layer and only
apply it to CFGI/TLBI (not ATC_INV).
- Drop the binding/dtsi patches accordingly.
Ashish Mhetre (2):
iommu/arm-smmu-v3: Introduce CFGI/TLBI-repeat workaround
infrastructure
iommu/arm-smmu-v3: Enable CFGI/TLBI-repeat workaround on Tegra264
Nicolin Chen (1):
iommu/arm-smmu-v3: Factor out CMDQ batch force-sync conditions
Documentation/arch/arm64/silicon-errata.rst | 2 +
.../arm/arm-smmu-v3/arm-smmu-v3-iommufd.c | 15 +++-
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 75 ++++++++++++++++---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 +
4 files changed, 81 insertions(+), 12 deletions(-)
base-commit: bee763d5f341b99cf472afeb508d4988f62a6ca1
--
2.50.1
^ permalink raw reply
* [PATCH 0/4] mm: kmemleak: reduce transient false positives by confirming leaks
From: Breno Leitao @ 2026-07-13 11:48 UTC (permalink / raw)
To: Catalin Marinas, Andrew Morton, Jonathan Corbet, Shuah Khan,
David Hildenbrand, Lorenzo Stoakes, Liam R. Howlett,
Vlastimil Babka, Mike Rapoport, Suren Baghdasaryan, Michal Hocko,
Shuah Khan
Cc: linux-mm, linux-kernel, workflows, linux-doc, linux-kselftest,
Breno Leitao, kernel-team
This series combines two kmemleak enhancements that were originally submitted
separately but both required rebasing after commit 79c37ae3733e9 ("mm/kmemleak:
fix checksum computation for per-cpu objects").
The first feature introduces a second scan to confirm suspected leaks:
https://lore.kernel.org/all/20260709173347.689607-1-catalin.marinas@arm.com/
The second feature adds a module parameter controlling the minimum number of
consecutive unreferenced scans before a leak is reported, as discussed in:
https://lore.kernel.org/all/20260626-kmemleak_twice-v1-0-ab28f7cc0971@debian.org/
Changes from v1:
Now that commit 79c37ae3733e9 is upstream, the selftest includes an additional
priming phase scan as requested by Catalin.
Additionally, I've factored out the leak-detection conditional into a helper
function to be more digestible for the reader's eye.
This 4-patch series resolves all outstanding kmemleak issues I've been
tracking.
Signed-off-by: Breno Leitao <leitao@debian.org>
---
Breno Leitao (3):
mm: kmemleak: report leaks only after N consecutive unreferenced scans
mm: kmemleak: factor leak confirmation into a helper
selftests: mm: test kmemleak's N-consecutive-scan leak confirmation
Catalin Marinas (1):
mm: kmemleak: confirm suspected leaks with a second scan
Documentation/dev-tools/kmemleak.rst | 8 ++
mm/kmemleak.c | 90 +++++++++++++-
tools/testing/selftests/mm/Makefile | 1 +
.../testing/selftests/mm/ksft_kmemleak_confirm.sh | 132 +++++++++++++++++++++
4 files changed, 225 insertions(+), 6 deletions(-)
---
base-commit: bee763d5f341b99cf472afeb508d4988f62a6ca1
change-id: 20260713-catalin_pto-dbacf66be3fa
Best regards,
--
Breno Leitao <leitao@debian.org>
^ permalink raw reply
* [PATCH 1/4] mm: kmemleak: confirm suspected leaks with a second scan
From: Breno Leitao @ 2026-07-13 11:48 UTC (permalink / raw)
To: Catalin Marinas, Andrew Morton, Jonathan Corbet, Shuah Khan,
David Hildenbrand, Lorenzo Stoakes, Liam R. Howlett,
Vlastimil Babka, Mike Rapoport, Suren Baghdasaryan, Michal Hocko,
Shuah Khan
Cc: linux-mm, linux-kernel, workflows, linux-doc, linux-kselftest,
Breno Leitao, kernel-team
In-Reply-To: <20260713-catalin_pto-v1-0-5b93b1131089@debian.org>
From: Catalin Marinas <catalin.marinas@arm.com>
The kmemleak marking phase is not atomic. While the object graph is
traversed, the kernel can modify pointers, free objects or allocate new
ones. If a reference to an object is moved from one location to another,
kmemleak scanning may miss it. We have explicit annotations like
kmemleak_transient_leak() but identifying and maintaining them is not
trivial.
Given that such transient leaks are short-lived, rather than just
reporting such objects as leaks, do another scan to confirm the
suspected objects. If no new leaks are found during the first scan, skip
the confirmation one.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Assisted-by: Claude:claude-opus-4-8
Signed-off-by: Breno Leitao <leitao@debian.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
---
mm/kmemleak.c | 57 ++++++++++++++++++++++++++++++++++++++++++++++++++++++---
1 file changed, 54 insertions(+), 3 deletions(-)
diff --git a/mm/kmemleak.c b/mm/kmemleak.c
index e96e9efd19b0d..ac77bab580688 100644
--- a/mm/kmemleak.c
+++ b/mm/kmemleak.c
@@ -175,6 +175,8 @@ struct kmemleak_object {
#define OBJECT_PHYS (1 << 4)
/* flag set for per-CPU pointers */
#define OBJECT_PERCPU (1 << 5)
+/* flag set on an object left unreferenced by the full scan, pending confirmation */
+#define OBJECT_SUSPECT (1 << 6)
/* set when __remove_object() called */
#define DELSTATE_REMOVED (1 << 0)
@@ -235,6 +237,8 @@ static unsigned long jiffies_min_age;
static unsigned long jiffies_last_scan;
/* delay between automatic memory scannings */
static unsigned long jiffies_scan_wait;
+/* number of objects flagged OBJECT_SUSPECT during the current scan */
+static int nr_suspects;
/* enables or disables the task stacks scanning */
static int kmemleak_stack_scan = 1;
/* protects the memory scanning, parameters and debug/kmemleak file access */
@@ -1440,6 +1444,11 @@ static void update_refs(struct kmemleak_object *object)
*/
object->count++;
if (color_gray(object)) {
+ /* referenced after all, no longer a suspect */
+ if (object->flags & OBJECT_SUSPECT) {
+ object->flags &= ~OBJECT_SUSPECT;
+ nr_suspects--;
+ }
/* put_object() called when removing from gray_list */
WARN_ON(!get_object(object));
list_add_tail(&object->gray_list, &gray_list);
@@ -1844,16 +1853,16 @@ static void dedup_flush(struct xarray *dedup)
* kernel's standard allocators. This function must be called with the
* scan_mutex held.
*/
-static void kmemleak_scan(void)
+static int __kmemleak_scan(bool full)
{
struct kmemleak_object *object;
struct zone *zone;
int __maybe_unused i;
- struct xarray dedup;
- int new_leaks = 0;
int stop = 0;
jiffies_last_scan = jiffies;
+ if (full)
+ nr_suspects = 0;
/* prepare the kmemleak_object's */
rcu_read_lock();
@@ -1883,6 +1892,8 @@ static void kmemleak_scan(void)
/* reset the reference count (whiten the object) */
object->count = 0;
+ if (full)
+ object->flags &= ~OBJECT_SUSPECT;
if (color_gray(object) && get_object(object))
list_add_tail(&object->gray_list, &gray_list);
@@ -1950,6 +1961,10 @@ static void kmemleak_scan(void)
scan_gray:
scan_gray_list();
+ /* a confirmation scan does not look for modified objects */
+ if (!full)
+ return nr_suspects;
+
/*
* Check for new or unreferenced objects modified since the previous
* scan and color them gray until the next scan.
@@ -1972,6 +1987,11 @@ static void kmemleak_scan(void)
/* color it gray temporarily */
object->count = object->min_count;
list_add_tail(&object->gray_list, &gray_list);
+ } else if (unreferenced_object(object) &&
+ !(object->flags & OBJECT_REPORTED)) {
+ /* flag the objects left unreferenced by this scan */
+ object->flags |= OBJECT_SUSPECT;
+ nr_suspects++;
}
raw_spin_unlock_irq(&object->lock);
}
@@ -1982,12 +2002,42 @@ static void kmemleak_scan(void)
*/
scan_gray_list();
+ return nr_suspects;
+}
+
+/*
+ * Scan the memory and report the unreferenced objects as leaks. Must be
+ * called with the scan_mutex held.
+ */
+static void kmemleak_scan(void)
+{
+ struct kmemleak_object *object;
+ struct xarray dedup;
+ int new_leaks = 0;
+
+ /*
+ * Full scan. Objects left unreferenced are flagged OBJECT_SUSPECT and
+ * counted in the return value; nothing to confirm or report otherwise.
+ */
+ if (!__kmemleak_scan(true))
+ return;
+
/*
* If scanning was stopped do not report any new unreferenced objects.
*/
if (scan_should_stop())
return;
+ /*
+ * A live object whose only reference is moved by, for example, a
+ * concurrent RCU update can be missed for one scan and reported as a
+ * transient false positive. Scan again and only report the objects
+ * left unreferenced (still flagged OBJECT_SUSPECT) by both scans.
+ */
+ __kmemleak_scan(false);
+ if (scan_should_stop())
+ return;
+
/*
* Scanning result reporting. When verbose printing is enabled, dedupe
* by stackdepot trace_handle so each unique backtrace is logged once
@@ -2015,6 +2065,7 @@ static void kmemleak_scan(void)
trace_handle = 0;
dedup_print = false;
if (unreferenced_object(object) &&
+ (object->flags & OBJECT_SUSPECT) &&
!(object->flags & OBJECT_REPORTED)) {
object->flags |= OBJECT_REPORTED;
if (kmemleak_verbose) {
--
2.53.0-Meta
^ permalink raw reply related
* [PATCH 2/4] mm: kmemleak: report leaks only after N consecutive unreferenced scans
From: Breno Leitao @ 2026-07-13 11:48 UTC (permalink / raw)
To: Catalin Marinas, Andrew Morton, Jonathan Corbet, Shuah Khan,
David Hildenbrand, Lorenzo Stoakes, Liam R. Howlett,
Vlastimil Babka, Mike Rapoport, Suren Baghdasaryan, Michal Hocko,
Shuah Khan
Cc: linux-mm, linux-kernel, workflows, linux-doc, linux-kselftest,
Breno Leitao, kernel-team
In-Reply-To: <20260713-catalin_pto-v1-0-5b93b1131089@debian.org>
kmemleak reports an object the first scan it is found unreferenced. Its
mark phase runs without stopping the rest of the kernel and without a
write barrier, so a live object whose only reference is briefly invisible
during a concurrent RCU update -- e.g. a VMA moved between maple tree
nodes, or a page-cache xa_node -- can be seen as unreferenced for that one
scan. Because an object is flagged as reported only once, such a transient
race turns into a permanent false positive.
Track how many consecutive scans each object has been seen unreferenced
and only report it once that reaches min_unref_scans, a new module
parameter. It defaults to 1, leaving the behaviour unchanged; setting it
higher (e.g. 2) still reports a genuine leak, one scan later, while an
object referenced again before the threshold restarts its run and is never
reported.
min_unref_scans can be set at boot with kmemleak.min_unref_scans=<n> or at
run-time via /sys/module/kmemleak/parameters/min_unref_scans.
Signed-off-by: Breno Leitao <leitao@debian.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
---
Documentation/dev-tools/kmemleak.rst | 8 ++++++++
mm/kmemleak.c | 13 ++++++++++++-
2 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/Documentation/dev-tools/kmemleak.rst b/Documentation/dev-tools/kmemleak.rst
index 7d784e03f3f9d..a8a83bc69ceb8 100644
--- a/Documentation/dev-tools/kmemleak.rst
+++ b/Documentation/dev-tools/kmemleak.rst
@@ -198,6 +198,14 @@ systems, because of pointers temporarily stored in CPU registers or
stacks. Kmemleak defines MSECS_MIN_AGE (defaulting to 1000) representing
the minimum age of an object to be reported as a memory leak.
+The ``min_unref_scans`` module parameter (default 1) requires an object to
+be seen unreferenced in that many consecutive scans before it is reported.
+Keeping it at 1 preserves the historical behaviour; higher values filter
+the transient false positives described above, at the cost of delaying
+genuine reports by up to that many scans. It can be set at boot with
+``kmemleak.min_unref_scans=<n>`` or at run-time via
+``/sys/module/kmemleak/parameters/min_unref_scans``.
+
Limitations and Drawbacks
-------------------------
diff --git a/mm/kmemleak.c b/mm/kmemleak.c
index ac77bab580688..2fff11637e490 100644
--- a/mm/kmemleak.c
+++ b/mm/kmemleak.c
@@ -151,6 +151,8 @@ struct kmemleak_object {
int min_count;
/* the total number of pointers found pointing to this object */
int count;
+ /* consecutive scans the object has been seen unreferenced */
+ unsigned int unref_scans;
/* checksum for detecting modified objects */
u32 checksum;
depot_stack_handle_t trace_handle;
@@ -234,6 +236,9 @@ static unsigned long max_percpu_addr;
static struct task_struct *scan_thread;
/* used to avoid reporting of recently allocated objects */
static unsigned long jiffies_min_age;
+/* consecutive scans an object must stay unreferenced before reporting */
+static unsigned int min_unref_scans = 1;
+module_param(min_unref_scans, uint, 0644);
static unsigned long jiffies_last_scan;
/* delay between automatic memory scannings */
static unsigned long jiffies_scan_wait;
@@ -692,6 +697,7 @@ static struct kmemleak_object *__alloc_object(gfp_t gfp)
object->excess_ref = 0;
object->count = 0; /* white color initially */
object->checksum = ~0;
+ object->unref_scans = 0;
object->del_state = 0;
/* task information */
@@ -1890,6 +1896,9 @@ static int __kmemleak_scan(bool full)
__paint_it(object, KMEMLEAK_BLACK);
}
+ /* referenced last scan: restart the unreferenced run */
+ if (!color_white(object))
+ object->unref_scans = 0;
/* reset the reference count (whiten the object) */
object->count = 0;
if (full)
@@ -2064,9 +2073,11 @@ static void kmemleak_scan(void)
raw_spin_lock_irq(&object->lock);
trace_handle = 0;
dedup_print = false;
+
if (unreferenced_object(object) &&
(object->flags & OBJECT_SUSPECT) &&
- !(object->flags & OBJECT_REPORTED)) {
+ !(object->flags & OBJECT_REPORTED) &&
+ ++object->unref_scans >= min_unref_scans) {
object->flags |= OBJECT_REPORTED;
if (kmemleak_verbose) {
trace_handle = object->trace_handle;
--
2.53.0-Meta
^ permalink raw reply related
* [PATCH 3/4] mm: kmemleak: factor leak confirmation into a helper
From: Breno Leitao @ 2026-07-13 11:48 UTC (permalink / raw)
To: Catalin Marinas, Andrew Morton, Jonathan Corbet, Shuah Khan,
David Hildenbrand, Lorenzo Stoakes, Liam R. Howlett,
Vlastimil Babka, Mike Rapoport, Suren Baghdasaryan, Michal Hocko,
Shuah Khan
Cc: linux-mm, linux-kernel, workflows, linux-doc, linux-kselftest,
Breno Leitao, kernel-team
In-Reply-To: <20260713-catalin_pto-v1-0-5b93b1131089@debian.org>
The reporting loop in kmemleak_scan() decided whether to tag an object as
a reported leak with a four-term compound condition whose last operand
also had a side effect (++object->unref_scans). Mixing the candidate
tests with the counter update made the check hard to read.
Move the state transition into confirm_leak(): it returns true when a
still-unreferenced suspect crosses min_unref_scans consecutive scans and
is newly flagged OBJECT_REPORTED, leaving only the reporting bookkeeping
in the caller. No functional change.
Signed-off-by: Breno Leitao <leitao@debian.org>
---
mm/kmemleak.c | 26 +++++++++++++++++++++-----
1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/mm/kmemleak.c b/mm/kmemleak.c
index 2fff11637e490..85f18b17e79c4 100644
--- a/mm/kmemleak.c
+++ b/mm/kmemleak.c
@@ -2014,6 +2014,26 @@ static int __kmemleak_scan(bool full)
return nr_suspects;
}
+/*
+ * Promote a suspected object to a reported leak once it has stayed
+ * unreferenced for min_unref_scans consecutive scans. Called with
+ * object->lock held; returns true when the object is newly reported.
+ */
+static bool confirm_leak(struct kmemleak_object *object)
+{
+ if (!unreferenced_object(object) ||
+ !(object->flags & OBJECT_SUSPECT) ||
+ (object->flags & OBJECT_REPORTED))
+ return false;
+
+ object->unref_scans += 1;
+ if (object->unref_scans < min_unref_scans)
+ return false;
+
+ object->flags |= OBJECT_REPORTED;
+ return true;
+}
+
/*
* Scan the memory and report the unreferenced objects as leaks. Must be
* called with the scan_mutex held.
@@ -2074,11 +2094,7 @@ static void kmemleak_scan(void)
trace_handle = 0;
dedup_print = false;
- if (unreferenced_object(object) &&
- (object->flags & OBJECT_SUSPECT) &&
- !(object->flags & OBJECT_REPORTED) &&
- ++object->unref_scans >= min_unref_scans) {
- object->flags |= OBJECT_REPORTED;
+ if (confirm_leak(object)) {
if (kmemleak_verbose) {
trace_handle = object->trace_handle;
dedup_print = true;
--
2.53.0-Meta
^ permalink raw reply related
* [PATCH 4/4] selftests: mm: test kmemleak's N-consecutive-scan leak confirmation
From: Breno Leitao @ 2026-07-13 11:48 UTC (permalink / raw)
To: Catalin Marinas, Andrew Morton, Jonathan Corbet, Shuah Khan,
David Hildenbrand, Lorenzo Stoakes, Liam R. Howlett,
Vlastimil Babka, Mike Rapoport, Suren Baghdasaryan, Michal Hocko,
Shuah Khan
Cc: linux-mm, linux-kernel, workflows, linux-doc, linux-kselftest,
Breno Leitao, kernel-team
In-Reply-To: <20260713-catalin_pto-v1-0-5b93b1131089@debian.org>
Add a functional test for the min_unref_scans kmemleak module parameter.
Using samples/kmemleak's helper module it checks that min_unref_scans=1
reports an orphan on the first scan, min_unref_scans=2 reports nothing on
the first scan but does on the second, and that the parameter reads back
what was written.
It counts only the helper module's own orphans (matched by their
[kmemleak_test] backtrace, with the module kept loaded so the symbols
resolve) so unrelated leaks already present on the system do not perturb
the result. The test skips when run as non-root, without
CONFIG_DEBUG_KMEMLEAK / CONFIG_SAMPLE_KMEMLEAK, on a kernel without the
parameter, or when the helper yields no detectable orphan.
Signed-off-by: Breno Leitao <leitao@debian.org>
---
tools/testing/selftests/mm/Makefile | 1 +
.../testing/selftests/mm/ksft_kmemleak_confirm.sh | 132 +++++++++++++++++++++
2 files changed, 133 insertions(+)
diff --git a/tools/testing/selftests/mm/Makefile b/tools/testing/selftests/mm/Makefile
index ed321ae709dac..786b1d73d93b0 100644
--- a/tools/testing/selftests/mm/Makefile
+++ b/tools/testing/selftests/mm/Makefile
@@ -150,6 +150,7 @@ TEST_PROGS += ksft_gup_test.sh
TEST_PROGS += ksft_hmm.sh
TEST_PROGS += ksft_hugetlb.sh
TEST_PROGS += ksft_hugevm.sh
+TEST_PROGS += ksft_kmemleak_confirm.sh
TEST_PROGS += ksft_kmemleak_dedup.sh
TEST_PROGS += ksft_ksm.sh
TEST_PROGS += ksft_ksm_numa.sh
diff --git a/tools/testing/selftests/mm/ksft_kmemleak_confirm.sh b/tools/testing/selftests/mm/ksft_kmemleak_confirm.sh
new file mode 100755
index 0000000000000..3a8576e835c8d
--- /dev/null
+++ b/tools/testing/selftests/mm/ksft_kmemleak_confirm.sh
@@ -0,0 +1,132 @@
+#!/bin/bash
+# SPDX-License-Identifier: GPL-2.0
+#
+# Functional test for kmemleak's N-consecutive-scan leak confirmation
+# (the min_unref_scans module parameter).
+#
+# kmemleak only reports an object once it has stayed unreferenced for
+# min_unref_scans consecutive scans. The default of 1 reports on the first
+# scan (historical behaviour); higher values filter transient false
+# positives where a live object's only reference is briefly invisible to a
+# single scan (e.g. an RCU tree update in flight while the scan runs). The
+# test loads samples/kmemleak's helper module to create orphan allocations
+# and, counting only those orphans (matched by their [kmemleak_test]
+# backtrace so unrelated leaks already present on the system are ignored),
+# checks that:
+# - a freshly allocated object is greyed on its first scan (its checksum
+# settles then), so nothing can be reported before that priming scan;
+# each case below primes once first,
+# - with the default threshold (min_unref_scans=1) one scan after priming
+# reports the orphans,
+# - raising the threshold to 2 needs two scans after priming: one is not
+# enough, the second reports,
+# - the parameter reads back what was written.
+#
+# The "one post-prime scan is not enough at min_unref_scans=2" check is the
+# core regression test: raising min_unref_scans must push the report
+# strictly later. Like ksft_kmemleak_dedup.sh, if the module yields no
+# detectable orphan at all in the running environment the test skips rather
+# than failing.
+#
+# Author: Breno Leitao <leitao@debian.org>
+
+# KTAP output helpers (ktap_skip_all, ktap_exit_fail_msg, ktap_test_pass, ...).
+DIR="$(dirname "$(readlink -f "$0")")"
+# shellcheck source=../kselftest/ktap_helpers.sh
+source "${DIR}"/../kselftest/ktap_helpers.sh
+
+KMEMLEAK=/sys/kernel/debug/kmemleak
+PARAM=/sys/module/kmemleak/parameters/min_unref_scans
+MODULE=kmemleak-test
+AGE=6 # seconds; must exceed kmemleak's 5s minimum object age
+
+ktap_print_header
+
+[ "$(id -u)" -eq 0 ] || { ktap_skip_all "must run as root"; exit "$KSFT_SKIP"; }
+[ -r "$KMEMLEAK" ] ||
+ { ktap_skip_all "no kmemleak debugfs (CONFIG_DEBUG_KMEMLEAK)"; exit "$KSFT_SKIP"; }
+[ -w "$PARAM" ] ||
+ { ktap_skip_all "min_unref_scans module parameter not present"; exit "$KSFT_SKIP"; }
+modinfo "$MODULE" >/dev/null 2>&1 ||
+ { ktap_skip_all "$MODULE not built (CONFIG_SAMPLE_KMEMLEAK)"; exit "$KSFT_SKIP"; }
+
+# kmemleak can be present but disabled at runtime (kmemleak=off boot arg,
+# or it self-disabled after an internal error); a "scan" then returns
+# EPERM. Probe once and skip if so.
+echo scan > "$KMEMLEAK" 2>/dev/null ||
+ { ktap_skip_all "kmemleak is disabled (check dmesg or kmemleak= boot arg)"; exit "$KSFT_SKIP"; }
+
+prev=$(cat "$PARAM")
+# shellcheck disable=SC2317 # invoked indirectly via trap
+cleanup() {
+ echo "$prev" > "$PARAM" 2>/dev/null # restore the parameter
+ echo scan=on > "$KMEMLEAK" 2>/dev/null # re-enable auto scan
+ rmmod "$MODULE" 2>/dev/null
+ echo clear > "$KMEMLEAK" 2>/dev/null
+}
+trap cleanup EXIT
+
+# Stop the automatic scan thread: only our manual scans should advance an
+# object's consecutive-unreferenced run. An auto scan landing between two
+# manual scans would change the result and make the test flaky.
+echo scan=off > "$KMEMLEAK" 2>/dev/null
+
+# Create a fresh, aged set of orphan objects from the helper module's init
+# path (its kmalloc/vmalloc/percpu allocations are dropped right away).
+# Pre-existing reported leaks are greyed first ("clear") so only our
+# orphans are counted. The module is left loaded on purpose: once it is
+# unloaded its symbols are gone, so the orphan backtraces no longer resolve
+# to [kmemleak_test] and could not be matched below.
+gen_orphans() {
+ rmmod "$MODULE" 2>/dev/null
+ echo clear > "$KMEMLEAK"
+ modprobe "$MODULE" ||
+ { ktap_skip_all "failed to load $MODULE"; exit "$KSFT_SKIP"; }
+ sleep "$AGE"
+}
+
+scan() { echo scan > "$KMEMLEAK"; }
+
+# Number of helper-module orphans currently reported by kmemleak. Matching
+# the module's own backtrace ([kmemleak_test]) keeps the count immune to
+# unrelated leaks on the running system. kmemleak only lists an object here
+# once it has been reported, so this reflects the confirmation gating.
+count_orphans() {
+ c=$(grep -c '\[kmemleak_test\]' "$KMEMLEAK" 2>/dev/null)
+ echo "${c:-0}"
+}
+
+# 0) the parameter reads back what was written.
+echo 3 > "$PARAM"
+[ "$(cat "$PARAM")" = "3" ] || ktap_exit_fail_msg "min_unref_scans did not read back as 3"
+
+# Priming scan: kmemleak greys a freshly allocated object on its first scan
+# (its checksum settles then), so nothing can be reported until a second
+# scan. Every case below runs this priming scan before counting.
+prime() { scan; }
+
+# 1) min_unref_scans=1 (default): one scan after priming reports the
+# orphans. This also establishes that the helper produces detectable
+# orphans here.
+echo 1 > "$PARAM"
+gen_orphans
+prime
+scan
+first=$(count_orphans)
+[ "$first" -gt 0 ] ||
+ { ktap_skip_all "$MODULE produced no detectable orphans (cannot test min_unref_scans)"; exit "$KSFT_SKIP"; }
+
+# 2) min_unref_scans=2: after priming, one scan is not enough (still
+# gated), the second reports. The gated-scan-zero check is the core
+# regression.
+echo 2 > "$PARAM"
+gen_orphans
+prime
+scan; s1=$(count_orphans)
+scan; s2=$(count_orphans)
+[ "$s1" -eq 0 ] || ktap_exit_fail_msg "min_unref_scans=2: $s1 orphan(s) after 1 post-prime scan (must be 0)"
+[ "$s2" -gt 0 ] || ktap_exit_fail_msg "min_unref_scans=2: no report after 2 post-prime scans (false negative)"
+
+ktap_set_plan 1
+ktap_test_pass "min_unref_scans=1 reported $first orphan(s) one scan after priming; =2 held them one scan longer ($s1 after one scan, $s2 after two); param read-back ok"
+ktap_finished
--
2.53.0-Meta
^ permalink raw reply related
* Re: [PATCH v2] arch: arm64: add early_param idle=<wfi|yield|nop>
From: Will Deacon @ 2026-07-13 11:59 UTC (permalink / raw)
To: Sudeep Holla
Cc: Yureka Lilian, Jonathan Corbet, Shuah Khan, Catalin Marinas,
Anshuman Khandual, linux-doc, linux-kernel, linux-arm-kernel
In-Reply-To: <20260713-bulky-thistle-leopard-c66a18@sudeepholla>
On Mon, Jul 13, 2026 at 10:57:38AM +0100, Sudeep Holla wrote:
> On Sat, Jul 11, 2026 at 09:35:25AM +0200, Yureka Lilian wrote:
> > Overriding the idle mechanism might be useful for debugging and performance
> > testing. Add a cmdline parameter for it, similar to the existing idle=
> > parameter already present for the x86 and ppc architectures.
> >
> > It is also useful on platforms where the WFI instruction misbehaves,
> > such as Apple Silicon SoCs. Generally, a misbehaving instruction should
> > be treated as an erratum and patched using the alternatives framework.
> > However, in the Apple Silicon case we need more flexibility because it is
> > difficult to detect whether the erratum applies. For example, Linux VMs
> > inside macOS have the same MIDR and may even seem like they're running
> > in EL2 in the case of NV, but should continue using WFI (it's trapped and
> > handled correctly by the hypervisor there). Thus, we prefer to
> > let the m1n1 bootloader add the idle=nop parameter[1].
> >
> > Link[1]: https://lore.kernel.org/all/99b69262-e54b-424e-baa2-96ef7013b87a@kernel.org/
> > Suggested-by: Will Deacon <will@kernel.org>
> > Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
> > ---
> > Changes in v2:
> > - Applied suggestions by Anshuman Khandual (Thanks!)
> > - Link to v1: https://patch.msgid.link/20260705-arm64-idle-param-v1-1-7454249f473f@cyberchaos.dev
> > ---
> > Documentation/admin-guide/kernel-parameters.txt | 23 +++++++++++++++++++
> > arch/arm64/kernel/idle.c | 30 +++++++++++++++++++++++--
> > arch/arm64/kernel/idle.h | 13 +++++++++++
> > arch/arm64/lib/delay.c | 5 ++++-
> > 4 files changed, 68 insertions(+), 3 deletions(-)
> >
> > diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
> > index b2d7d3540ded..d7f5471edf8f 100644
> > --- a/Documentation/admin-guide/kernel-parameters.txt
> > +++ b/Documentation/admin-guide/kernel-parameters.txt
> > @@ -2239,6 +2239,29 @@ Kernel parameters
> >
> > idle=nomwait: Disable mwait for CPU C-states
> >
> > + [ARM64,EARLY]
> > + Format: idle=wfi, idle=yield, idle=nop
> > +
> > + idle=wfi: Use the WFI (Wait For Interrupt) hint
> > + instruction in the idle loop. This is the default and
> > + allows the CPU to enter a low-power state until an
> > + interrupt arrives.
>
> Just curious as when and why one would need to use idle=wfi if that is the
> default behaviour. I am missing the need to have it.
It's probably useful to have so that you can override an idle= option
present earlier in the cmdline. e.g.
idle=nop idle=wfi
will give you the wfi behaviour, which is handy if the cmdline is
stitched topgether from different sources.
Will
^ permalink raw reply
* Re: [PATCH v7 03/12] sysfs: Add preferred CPU file
From: Shrikanth Hegde @ 2026-07-13 12:00 UTC (permalink / raw)
To: Yury Norov
Cc: linux-kernel, mingo, peterz, juri.lelli, vincent.guittot,
yury.norov, kprateek.nayak, iii, corbet, tglx, gregkh, pbonzini,
seanjc, vschneid, huschle, rostedt, dietmar.eggemann, maddy,
srikar, hdanton, chleroy, vineeth, frederic, arighi, pauld,
christian.loehle, tj, tommaso.cucinotta, maz, rafael, rdunlap,
kernellwp, linux-doc
In-Reply-To: <alF7r_dWfUHKEofx@yury>
Hi Yury,
On 7/11/26 4:39 AM, Yury Norov wrote:
>> Not needed no? It will print active CPUs.
>
> If I didn't enable preferred CPUs, I'll be pretty surprised having
> them in my statistics.
Ok. I didn;t think in that way. I guess issues mainly would happen w.r.t
to ABI interpretation or feature enablement in userspace right?
I will add ifdef gating for it. i.e (#ifdef CONFIG_PREFERRED_CPU)
PS: I had a dental procedure done today.
So there might be a delay in response to mails.
^ permalink raw reply
* Re: [PATCH v7 08/12] virt: Introduce steal monitor driver
From: Shrikanth Hegde @ 2026-07-13 12:06 UTC (permalink / raw)
To: Yury Norov
Cc: linux-kernel, mingo, peterz, juri.lelli, vincent.guittot,
yury.norov, kprateek.nayak, iii, corbet, tglx, gregkh, pbonzini,
seanjc, vschneid, huschle, rostedt, dietmar.eggemann, maddy,
srikar, hdanton, chleroy, vineeth, frederic, arighi, pauld,
christian.loehle, tj, tommaso.cucinotta, maz, rafael, rdunlap,
kernellwp, linux-doc
In-Reply-To: <alFb0PBu8P44DmXD@yury>
Hi Yury,
On 7/11/26 2:23 AM, Yury Norov wrote:
> On Fri, Jul 10, 2026 at 03:26:44AM +0530, Shrikanth Hegde wrote:
>> Introduce a new driver in virt named steal_monitor. This driver
>> will compute the steal time and drive the policy decisions of preferred
>> CPU state.
>>
[...]
>> +
>> STI AUDIO (ASoC) DRIVERS
>> M: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
>> L: linux-sound@vger.kernel.org
>> diff --git a/drivers/virt/Kconfig b/drivers/virt/Kconfig
>> index 52eb7e4ba71f..a52233b2502e 100644
>> --- a/drivers/virt/Kconfig
>> +++ b/drivers/virt/Kconfig
>> @@ -47,6 +47,8 @@ source "drivers/virt/nitro_enclaves/Kconfig"
>>
>> source "drivers/virt/acrn/Kconfig"
>>
>> +source "drivers/virt/steal_monitor/Kconfig"
>> +
>> endif
>>
>> source "drivers/virt/coco/Kconfig"
>> diff --git a/drivers/virt/Makefile b/drivers/virt/Makefile
>> index f29901bd7820..b67fd8968ec3 100644
>> --- a/drivers/virt/Makefile
>> +++ b/drivers/virt/Makefile
>> @@ -9,4 +9,5 @@ obj-y += vboxguest/
>>
>> obj-$(CONFIG_NITRO_ENCLAVES) += nitro_enclaves/
>> obj-$(CONFIG_ACRN_HSM) += acrn/
>> +obj-$(CONFIG_STEAL_MONITOR) += steal_monitor/
>> obj-y += coco/
>> diff --git a/drivers/virt/steal_monitor/Kconfig b/drivers/virt/steal_monitor/Kconfig
>> new file mode 100644
>> index 000000000000..c7d7599c30ce
>> --- /dev/null
>> +++ b/drivers/virt/steal_monitor/Kconfig
>> @@ -0,0 +1,18 @@
>> +# SPDX-License-Identifier: GPL-2.0-only
>> +config STEAL_MONITOR
>
> The config should go in the last patch of the series. Otherwise,
> in case of bisection, you'll have half-written driver enabled by
> default.
Ok. I will keep it a patch at the end.
>
>> + tristate "Dynamic vCPU management based on steal time"
>> + depends on PARAVIRT && SMP
>> + select PREFERRED_CPU
>> + default m
>> + help
>> + This driver helps to reduce the steal time in paravirtualised
>> + environment, thereby reducing vCPU preemption. Reducing vCPU
>> + preemption provides improved lock holder preemption and reduces
>> + cost of vCPU preemption in the host.
>> +
>> + By default preferred CPUs will be same as active CPUs. Depending
>> + on the steal time when steal_monitor driver is enabled,
>> + preferred CPUs could become subset of active CPUs.
>> +
>> + It is recommended to build it as module and load the module
>> + to enable it.
>> diff --git a/drivers/virt/steal_monitor/Makefile b/drivers/virt/steal_monitor/Makefile
>> new file mode 100644
>> index 000000000000..bd7d120a79b5
>> --- /dev/null
>> +++ b/drivers/virt/steal_monitor/Makefile
>> @@ -0,0 +1,6 @@
>> +# SPDX-License-Identifier: GPL-2.0-only
>> +#
>> +# Steal time monitor to alter preferred CPU state.
>> +obj-$(CONFIG_STEAL_MONITOR) += steal_monitor.o
>> +
>> +steal_monitor-y := sm_core.o
>> diff --git a/drivers/virt/steal_monitor/sm_core.c b/drivers/virt/steal_monitor/sm_core.c
>> new file mode 100644
>> index 000000000000..180db424846c
>> --- /dev/null
>> +++ b/drivers/virt/steal_monitor/sm_core.c
>> @@ -0,0 +1,38 @@
>> +// SPDX-License-Identifier: GPL-2.0-only
>> +/*
>> + * Steal time Monitor.
>> + *
>> + * Periodically compute steal time. Based on the thresholds either
>> + * reduce/increase the preferred CPUs which can be used
>> + * by the workload to avoid vCPU preemption to an extent possible.
>> + *
>> + * Available as module with CONFIG_STEAL_MONITOR=m
>> + *
>> + * Copyright (C) 2026 IBM
>> + * Author: Shrikanth Hegde <sshegde@linux.ibm.com>
>> + */
>> +
>> +#include "sm_core.h"
>> +
>> +struct steal_monitor sm_core_ctx;
>> +
>> +static int __init steal_monitor_init(void)
>> +{
>> + pr_info("steal_monitor is enabled\n");
>> + return 0;
>> +}
>> +
>> +static void __exit steal_monitor_exit(void)
>> +{
>> + guard(cpus_read_lock)();
>> + cpumask_copy(&__cpu_preferred_mask, cpu_active_mask);
>> +
>> + pr_info("steal_monitor is disabled\n");
>> +}
>> +
>> +module_init(steal_monitor_init);
>> +module_exit(steal_monitor_exit);
>> +
>> +MODULE_LICENSE("GPL");
>> +MODULE_AUTHOR("IBM Corporation");
>> +MODULE_DESCRIPTION("Virtualization Steal Time Monitor");
>> diff --git a/drivers/virt/steal_monitor/sm_core.h b/drivers/virt/steal_monitor/sm_core.h
>> new file mode 100644
>> index 000000000000..8bbb606add99
>> --- /dev/null
>> +++ b/drivers/virt/steal_monitor/sm_core.h
>> @@ -0,0 +1,27 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +#ifndef __VIRT_STEAL_CORE_H
>> +#define __VIRT_STEAL_CORE_H
>> +
>> +#include <linux/types.h>
>> +
>> +#include <linux/module.h>
>> +#include <linux/kernel.h>
>> +#include <linux/init.h>
>> +#include <linux/cpuhplock.h>
>> +#include <linux/cpumask.h>
>> +#include <linux/workqueue.h>
>> +#include <linux/ktime.h>
>> +
>> +struct steal_monitor {
>> + struct delayed_work work;
>> + u64 prev_steal;
>> + int prev_direction;
>
> Did you run pahole on it?
Ah my bad. Will do.
>
>> + unsigned int interval_ms;
>> + unsigned int high_threshold;
>> + unsigned int low_threshold;
>> + ktime_t prev_time;
>
> This 'prev_' prefix is useless and distracting. Just drop it.
>
>> +};
Ok. will keep it as time, steal. (prev_direction is being removed in v8)
>> +
>> +extern struct steal_monitor sm_core_ctx;
>> +
>> +#endif /* __VIRT_STEAL_CORE_H */
>> --
>> 2.47.3
^ permalink raw reply
* Re: [PATCH v12 00/29] KVM: arm64: Implement support for SME
From: Mark Brown @ 2026-07-13 12:07 UTC (permalink / raw)
To: Fuad Tabba
Cc: Marc Zyngier, Joey Gouly, Catalin Marinas, Suzuki K Poulose,
Will Deacon, Paolo Bonzini, Jonathan Corbet, Shuah Khan,
Oliver Upton, Dave Martin, Mark Rutland, Ben Horgan,
Jean-Philippe Brucker, linux-arm-kernel, kvmarm, linux-kernel,
kvm, linux-doc, linux-kselftest, Peter Maydell, Eric Auger
In-Reply-To: <CA+EHjTw4uz9UjezNdHynMV38P0jORwfcxSSv834nQ8Q1JqW0Jg@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 408 bytes --]
On Sun, Jul 12, 2026 at 03:03:59PM +0100, Fuad Tabba wrote:
> Unrelated: on the get-reg-list restructuring you mention deferring to
> a separate series: since ZA, ZT0 and SME_VLS are the
> migration-critical SME state, it'd be good if that series also covered
> a save/restore round-trip for them, not just get-reg-list enumeration.
Yes, better testing for the register interface in general would be good.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply
* Re: [PATCH v2] arch: arm64: add early_param idle=<wfi|yield|nop>
From: Anshuman Khandual @ 2026-07-13 12:24 UTC (permalink / raw)
To: Sudeep Holla, Yureka Lilian
Cc: Jonathan Corbet, Shuah Khan, Catalin Marinas, Will Deacon,
linux-doc, linux-kernel, linux-arm-kernel
In-Reply-To: <20260713-bulky-thistle-leopard-c66a18@sudeepholla>
On 13/07/26 3:27 PM, Sudeep Holla wrote:
> On Sat, Jul 11, 2026 at 09:35:25AM +0200, Yureka Lilian wrote:
>> Overriding the idle mechanism might be useful for debugging and performance
>> testing. Add a cmdline parameter for it, similar to the existing idle=
>> parameter already present for the x86 and ppc architectures.
>>
>> It is also useful on platforms where the WFI instruction misbehaves,
>> such as Apple Silicon SoCs. Generally, a misbehaving instruction should
>> be treated as an erratum and patched using the alternatives framework.
>> However, in the Apple Silicon case we need more flexibility because it is
>> difficult to detect whether the erratum applies. For example, Linux VMs
>> inside macOS have the same MIDR and may even seem like they're running
>> in EL2 in the case of NV, but should continue using WFI (it's trapped and
>> handled correctly by the hypervisor there). Thus, we prefer to
>> let the m1n1 bootloader add the idle=nop parameter[1].
>>
>> Link[1]: https://lore.kernel.org/all/99b69262-e54b-424e-baa2-96ef7013b87a@kernel.org/
>> Suggested-by: Will Deacon <will@kernel.org>
>> Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
>> ---
>> Changes in v2:
>> - Applied suggestions by Anshuman Khandual (Thanks!)
>> - Link to v1: https://patch.msgid.link/20260705-arm64-idle-param-v1-1-7454249f473f@cyberchaos.dev
>> ---
>> Documentation/admin-guide/kernel-parameters.txt | 23 +++++++++++++++++++
>> arch/arm64/kernel/idle.c | 30 +++++++++++++++++++++++--
>> arch/arm64/kernel/idle.h | 13 +++++++++++
>> arch/arm64/lib/delay.c | 5 ++++-
>> 4 files changed, 68 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
>> index b2d7d3540ded..d7f5471edf8f 100644
>> --- a/Documentation/admin-guide/kernel-parameters.txt
>> +++ b/Documentation/admin-guide/kernel-parameters.txt
>> @@ -2239,6 +2239,29 @@ Kernel parameters
>>
>> idle=nomwait: Disable mwait for CPU C-states
>>
>> + [ARM64,EARLY]
>> + Format: idle=wfi, idle=yield, idle=nop
>> +
>> + idle=wfi: Use the WFI (Wait For Interrupt) hint
>> + instruction in the idle loop. This is the default and
>> + allows the CPU to enter a low-power state until an
>> + interrupt arrives.
>
> Just curious as when and why one would need to use idle=wfi if that is the
> default behaviour. I am missing the need to have it.
I guess once there is a list to chose options from
in the command line, should not the default option
be listed there as well ?
^ permalink raw reply
* Re: [PATCH v7 06/12] sched/core: Push current task from non preferred CPU
From: Shrikanth Hegde @ 2026-07-13 12:35 UTC (permalink / raw)
To: Yury Norov
Cc: linux-kernel, mingo, peterz, juri.lelli, vincent.guittot,
yury.norov, kprateek.nayak, iii, corbet, tglx, gregkh, pbonzini,
seanjc, vschneid, huschle, rostedt, dietmar.eggemann, maddy,
srikar, hdanton, chleroy, vineeth, frederic, arighi, pauld,
christian.loehle, tj, tommaso.cucinotta, maz, rafael, rdunlap,
kernellwp, linux-doc
In-Reply-To: <alF6AqiSWZBlF_c2@yury>
On 7/11/26 4:32 AM, Yury Norov wrote:
> On Fri, Jul 10, 2026 at 03:26:42AM +0530, Shrikanth Hegde wrote:
>> Actively push out task running on a non-preferred CPU. Since the task is
>> running on the CPU, need to stop the cpu and push the task out.
>> However, if the task is pinned only to non-preferred CPUs, it will continue
>> running there. This will help in maintaining the userspace affinities
>> unlike CPU hotplug or isolated cpusets.
>>
>> Though code is similar to __balance_push_cpu_stop and quite close to
>> push_cpu_stop, it is being kept separate as it provides a cleaner
>> implementation with CONFIG_PREFERRED_CPU.
>>
>> Add push_task_work_done flag to protect work buffer.
>> Works only with FAIR class.
>>
>> For now, only current running task is pushed out. This keeps the code
>> simpler. In future optimization maybe done to move all the queued
>> task on the rq.
>>
>> Signed-off-by: Shrikanth Hegde <sshegde@linux.ibm.com>
>> ---
>> v6->v7:
>> - Moved is_migration_disabled
>> - removed fair class check
>>
>> kernel/sched/core.c | 78 ++++++++++++++++++++++++++++++++++++++++++++
>> kernel/sched/sched.h | 8 +++++
>> 2 files changed, 86 insertions(+)
>>
>> diff --git a/kernel/sched/core.c b/kernel/sched/core.c
>> index 9e8eec4451b6..74c93a88bf84 100644
>> --- a/kernel/sched/core.c
>> +++ b/kernel/sched/core.c
>> @@ -5774,6 +5774,9 @@ void sched_tick(void)
>> unsigned long hw_pressure;
>> u64 resched_latency;
>>
>> + if (!cpu_preferred(cpu))
>> + sched_push_current_non_preferred_cpu(rq);
>> +
>> if (housekeeping_cpu(cpu, HK_TYPE_KERNEL_NOISE))
>> arch_scale_freq_tick();
>>
>> @@ -11292,3 +11295,78 @@ void sched_change_end(struct sched_change_ctx *ctx)
>> p->sched_class->prio_changed(rq, p, ctx->prio);
>> }
>> }
>> +
>> +#ifdef CONFIG_PREFERRED_CPU
>> +static DEFINE_PER_CPU(struct cpu_stop_work, npc_push_task_work);
>> +
>> +static int sched_non_preferred_cpu_push_stop(void *arg)
>> +{
>> + struct task_struct *p = arg;
>> + struct rq *rq = this_rq();
>> + struct rq_flags rf;
>> + int cpu;
>> +
>> + /* sanity checks and clear */
>> + if (cpu_preferred(rq->cpu) || is_migration_disabled(p)) {
>> + scoped_guard(rq_lock, rq)
>> + rq->push_task_work_done = false;
>> + put_task_struct(p);
>> + return 0;
>> + }
>> +
>> + raw_spin_lock_irq(&p->pi_lock);
>> +
>> + /* This could take rq lock. So call it before rq lock is taken */
>> + cpu = select_fallback_rq(rq->cpu, p);
>> + rq_lock(rq, &rf);
>> + rq->push_task_work_done = false;
>> + update_rq_clock(rq);
>> +
>> + context_unsafe_alias(rq);
>> +
>> + if (task_rq(p) == rq && task_on_rq_queued(p))
>> + rq = __migrate_task(rq, &rf, p, cpu);
>> +
>> + rq_unlock(rq, &rf);
>> + raw_spin_unlock_irq(&p->pi_lock);
>> + put_task_struct(p);
>> +
>> + return 0;
>> +}
>> +
>> +/*
>> + * Push the current task running on non-preferred CPU(npc).
>> + * Using this non preferred CPU will lead to more vCPU preemptions
>> + * in the host. So it is better not to use this CPU.
>> + *
>> + * Since task is running, call a stopper to push the task out. This is
>> + * similar to how task moves during hotplug. In select_fallback_rq a
>> + * preferred CPU will be chosen and henceforth task shouldn't come back to
>> + * this CPU again.
>> + *
>> + * Works for FAIR class only
>> + *
>> + * If task is affined only non-preferred CPUs, it can't be moved out
>> + */
>> +void sched_push_current_non_preferred_cpu(struct rq *rq)
>> +{
>> + struct task_struct *push_task = rq->curr;
>> +
>> + /* Don't push the task if task's affinity doesn't allow */
>> + if (!task_can_sched_on_preferred(rq->cpu, push_task))
>> + return;
>
> Shouldn't you protect it with the rq lock against races with affinity or
> policy changes? The task_can_sched_on_preferred() checks p->sched_class
> and p->cpus_ptr.
>
Likely yes. I did below. It has survived light testing so far.
i.e.
- Moved checks under rq lock held.
- There was a tiny window where task could have migrated.
Moved it down further just before migrating.
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 6ed61182b19f..eda080ab3427 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -11311,7 +11311,7 @@ static int sched_non_preferred_cpu_push_stop(void *arg)
int cpu;
/* sanity checks and clear */
- if (cpu_preferred(rq->cpu) || is_migration_disabled(p)) {
+ if (cpu_preferred(rq->cpu)) {
scoped_guard(rq_lock, rq)
rq->push_task_work_done = false;
put_task_struct(p);
@@ -11328,7 +11328,8 @@ static int sched_non_preferred_cpu_push_stop(void *arg)
context_unsafe_alias(rq);
- if (task_rq(p) == rq && task_on_rq_queued(p)) {
+ if (task_rq(p) == rq && task_on_rq_queued(p)
+ && !is_migration_disabled(p)) {
struct rq *dest_rq;
dest_rq = __migrate_task(rq, &rf, p, cpu);
@@ -11362,19 +11363,20 @@ void sched_push_current_non_preferred_cpu(struct rq *rq)
{
struct task_struct *push_task = rq->curr;
- /* Don't push the task if task's affinity doesn't allow */
- if (!task_can_sched_on_preferred(rq->cpu, push_task))
- return;
+ scoped_guard(rq_lock, rq) {
+ /* Don't push the task if task's affinity doesn't allow */
+ if (!task_can_sched_on_preferred(rq->cpu, push_task))
+ return;
- /* There is already a stopper thread. Don't race with it. */
- if (rq->push_task_work_done)
- return;
+ /* There is already a stopper thread. Don't race with it. */
+ if (rq->push_task_work_done)
+ return;
- /* sched_tick runs with interrupts disabled. */
- get_task_struct(push_task);
+ /* sched_tick runs with interrupts disabled. */
+ get_task_struct(push_task);
- scoped_guard(rq_lock, rq)
rq->push_task_work_done = true;
+ }
stop_one_cpu_nowait(rq->cpu, sched_non_preferred_cpu_push_stop,
push_task, this_cpu_ptr(&npc_push_task_work));
>> +
>> + /* There is already a stopper thread. Don't race with it. */
>> + if (rq->push_task_work_done)
>> + return;
>> +
>> + /* sched_tick runs with interrupts disabled. */
>> + get_task_struct(push_task);
>> +
>> + scoped_guard(rq_lock, rq)
>> + rq->push_task_work_done = true;
>> +
>> + stop_one_cpu_nowait(rq->cpu, sched_non_preferred_cpu_push_stop,
>> + push_task, this_cpu_ptr(&npc_push_task_work));
>> +}
>> +#endif
>> diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h
>> index 6de6366f2faa..80c02e2c09eb 100644
>> --- a/kernel/sched/sched.h
>> +++ b/kernel/sched/sched.h
>> @@ -1277,6 +1277,8 @@ struct rq {
>>
>> struct list_head cfs_tasks;
>>
>> + bool push_task_work_done;
>> +
>> struct sched_avg avg_rt;
>> struct sched_avg avg_dl;
>> #ifdef CONFIG_HAVE_SCHED_AVG_IRQ
>> @@ -4242,4 +4244,10 @@ static inline bool task_can_sched_on_preferred(int cpu, struct task_struct *p)
>> return cpumask_intersects(p->cpus_ptr, cpu_preferred_mask);
>> }
>>
>> +#ifdef CONFIG_PREFERRED_CPU
>> +void sched_push_current_non_preferred_cpu(struct rq *rq);
>> +#else /* !CONFIG_PREFERRED_CPU */
>> +static inline void sched_push_current_non_preferred_cpu(struct rq *rq) { }
>> +#endif
>> +
>> #endif /* _KERNEL_SCHED_SCHED_H */
>> --
>> 2.47.3
^ permalink raw reply related
* Re: [PATCH 1/4] mm: kmemleak: confirm suspected leaks with a second scan
From: Geert Uytterhoeven @ 2026-07-13 12:36 UTC (permalink / raw)
To: Breno Leitao
Cc: Catalin Marinas, Andrew Morton, Jonathan Corbet, Shuah Khan,
David Hildenbrand, Lorenzo Stoakes, Liam R. Howlett,
Vlastimil Babka, Mike Rapoport, Suren Baghdasaryan, Michal Hocko,
Shuah Khan, linux-mm, linux-kernel, workflows, linux-doc,
linux-kselftest, kernel-team
In-Reply-To: <20260713-catalin_pto-v1-1-5b93b1131089@debian.org>
Hi Breno,
On Mon, 13 Jul 2026 at 13:48, Breno Leitao <leitao@debian.org> wrote:
> From: Catalin Marinas <catalin.marinas@arm.com>
>
> The kmemleak marking phase is not atomic. While the object graph is
> traversed, the kernel can modify pointers, free objects or allocate new
> ones. If a reference to an object is moved from one location to another,
> kmemleak scanning may miss it. We have explicit annotations like
> kmemleak_transient_leak() but identifying and maintaining them is not
> trivial.
>
> Given that such transient leaks are short-lived, rather than just
> reporting such objects as leaks, do another scan to confirm the
> suspected objects. If no new leaks are found during the first scan, skip
> the confirmation one.
>
> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
> Assisted-by: Claude:claude-opus-4-8
> Signed-off-by: Breno Leitao <leitao@debian.org>
> Cc: Andrew Morton <akpm@linux-foundation.org>
Thanks for your patch!
For how long does this postpone the reporting of a real leak?
I am asking, because I have a few known leaks in my local tree,
and it already takes a while before they are reported.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
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