* x86/mce: Save microcode revision in machine check records
@ 2018-03-01 23:34 Luck, Tony
0 siblings, 0 replies; 3+ messages in thread
From: Luck, Tony @ 2018-03-01 23:34 UTC (permalink / raw)
To: Borislav Petkov; +Cc: Tony Luck, Yazen Ghannam, linux-kernel, linux-edac
Updating microcode used to be relatively rare. Now that it has become
more common we should save the microcode version in a machine check
record to make sure that those people looking at the error have this
important information bundled with the rest of the logged information.
Signed-off-by: Tony Luck <tony.luck@intel.com>
---
arch/x86/include/uapi/asm/mce.h | 1 +
arch/x86/kernel/cpu/mcheck/mce.c | 5 +++++
2 files changed, 6 insertions(+)
diff --git a/arch/x86/include/uapi/asm/mce.h b/arch/x86/include/uapi/asm/mce.h
index 91723461dc1f..435db58a7bad 100644
--- a/arch/x86/include/uapi/asm/mce.h
+++ b/arch/x86/include/uapi/asm/mce.h
@@ -30,6 +30,7 @@ struct mce {
__u64 synd; /* MCA_SYND MSR: only valid on SMCA systems */
__u64 ipid; /* MCA_IPID MSR: only valid on SMCA systems */
__u64 ppin; /* Protected Processor Inventory Number */
+ __u32 microcode;/* Microcode revision */
};
#define MCE_GET_RECORD_LEN _IOR('M', 1, int)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 8ff94d1e2dce..b9403c446e05 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -118,6 +118,8 @@ BLOCKING_NOTIFIER_HEAD(x86_mce_decoder_chain);
/* Do initial initialization of a struct mce */
void mce_setup(struct mce *m)
{
+ struct cpuinfo_x86 *c;
+
memset(m, 0, sizeof(struct mce));
m->cpu = m->extcpu = smp_processor_id();
/* We hope get_seconds stays lockless */
@@ -130,6 +132,9 @@ void mce_setup(struct mce *m)
if (this_cpu_has(X86_FEATURE_INTEL_PPIN))
rdmsrl(MSR_PPIN, m->ppin);
+
+ c = &cpu_data(m->cpu);
+ m->microcode = c->microcode;
}
DEFINE_PER_CPU(struct mce, injectm);
^ permalink raw reply related [flat|nested] 3+ messages in thread
* x86/mce: Save microcode revision in machine check records
@ 2018-03-01 23:40 Luck, Tony
0 siblings, 0 replies; 3+ messages in thread
From: Luck, Tony @ 2018-03-01 23:40 UTC (permalink / raw)
To: Borislav Petkov
Cc: Yazen Ghannam, linux-kernel@vger.kernel.org,
linux-edac@vger.kernel.org
+ c = &cpu_data(m->cpu);
Bother. Breaks on systems with >255 cpus because "cpu" is __u8.
s/m->cpu/m->extcpu/
-Tony
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^ permalink raw reply [flat|nested] 3+ messages in thread
* x86/mce: Save microcode revision in machine check records
@ 2018-03-02 11:45 Borislav Petkov
0 siblings, 0 replies; 3+ messages in thread
From: Borislav Petkov @ 2018-03-02 11:45 UTC (permalink / raw)
To: Luck, Tony
Cc: Yazen Ghannam, linux-kernel@vger.kernel.org,
linux-edac@vger.kernel.org
On Thu, Mar 01, 2018 at 11:40:31PM +0000, Luck, Tony wrote:
> + c = &cpu_data(m->cpu);
>
> Bother. Breaks on systems with >255 cpus because "cpu" is __u8.
No worries, I committed an even better version:
---
From: Tony Luck <tony.luck@intel.com>
Date: Thu, 1 Mar 2018 15:34:49 -0800
Subject: [PATCH] x86/MCE: Save microcode revision in machine check records
Updating microcode used to be relatively rare. Now that it has become
more common we should save the microcode version in a machine check
record to make sure that those people looking at the error have this
important information bundled with the rest of the logged information.
Signed-off-by: Tony Luck <tony.luck@intel.com>
Cc: Yazen Ghannam <yazen.ghannam@amd.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: x86-ml <x86@kernel.org>
Link: http://lkml.kernel.org/r/20180301233449.24311-1-tony.luck@intel.com
[ Simplify a bit. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
---
arch/x86/include/uapi/asm/mce.h | 1 +
arch/x86/kernel/cpu/mcheck/mce.c | 4 +++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/uapi/asm/mce.h b/arch/x86/include/uapi/asm/mce.h
index 91723461dc1f..435db58a7bad 100644
--- a/arch/x86/include/uapi/asm/mce.h
+++ b/arch/x86/include/uapi/asm/mce.h
@@ -30,6 +30,7 @@ struct mce {
__u64 synd; /* MCA_SYND MSR: only valid on SMCA systems */
__u64 ipid; /* MCA_IPID MSR: only valid on SMCA systems */
__u64 ppin; /* Protected Processor Inventory Number */
+ __u32 microcode;/* Microcode revision */
};
#define MCE_GET_RECORD_LEN _IOR('M', 1, int)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 3c9a25b93538..181f6cf25895 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -130,6 +130,8 @@ void mce_setup(struct mce *m)
if (this_cpu_has(X86_FEATURE_INTEL_PPIN))
rdmsrl(MSR_PPIN, m->ppin);
+
+ m->microcode = boot_cpu_data.microcode;
}
DEFINE_PER_CPU(struct mce, injectm);
@@ -262,7 +264,7 @@ static void __print_mce(struct mce *m)
*/
pr_emerg(HW_ERR "PROCESSOR %u:%x TIME %llu SOCKET %u APIC %x microcode %x\n",
m->cpuvendor, m->cpuid, m->time, m->socketid, m->apicid,
- cpu_data(m->extcpu).microcode);
+ m->microcode);
}
static void print_mce(struct mce *m)
^ permalink raw reply related [flat|nested] 3+ messages in thread
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