[1/2] Revert "x86/mce/AMD: Collect error info even if valid bits are not set"

[1/2] Revert "x86/mce/AMD: Collect error info even if valid bits are not set"

[Yazen Ghannam]

From: Yazen Ghannam <yazen.ghannam@amd.com>

This reverts commit 4b1e84276a6172980c5bf39aa091ba13e90d6dad.

Software uses the valid bits to decide if the values can be used for
further processing or other actions. So setting the valid bits will have
software act on values that it shouldn't be acting on.

The recommendation to save all the register values does not mean that
the values are always valid.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
 arch/x86/kernel/cpu/mcheck/mce.c | 14 --------------
 1 file changed, 14 deletions(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 86079b90ebcf..42cf2880d0ed 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -446,20 +446,6 @@ static inline void mce_gather_info(struct mce *m, struct pt_regs *regs)
 		if (mca_cfg.rip_msr)
 			m->ip = mce_rdmsrl(mca_cfg.rip_msr);
 	}
-
-	/*
-	 * Error handlers should save the values in MCA_ADDR, MCA_MISC0, and
-	 * MCA_SYND even if MCA_STATUS[AddrV], MCA_STATUS[MiscV], and
-	 * MCA_STATUS[SyndV] are zero.
-	 */
-	if (m->cpuvendor == X86_VENDOR_AMD) {
-		u64 status = MCI_STATUS_ADDRV | MCI_STATUS_MISCV;
-
-		if (mce_flags.smca)
-			status |= MCI_STATUS_SYNDV;
-
-		m->status |= status;
-	}
 }
 
 int mce_available(struct cpuinfo_x86 *c)

[1/2] Revert "x86/mce/AMD: Collect error info even if valid bits are not set"

[Borislav Petkov]

On Mon, Mar 26, 2018 at 02:15:25PM -0500, Yazen Ghannam wrote:
> From: Yazen Ghannam <yazen.ghannam@amd.com>
> 
> This reverts commit 4b1e84276a6172980c5bf39aa091ba13e90d6dad.
> 
> Software uses the valid bits to decide if the values can be used for
> further processing or other actions. So setting the valid bits will have
> software act on values that it shouldn't be acting on.
> 
> The recommendation to save all the register values does not mean that
> the values are always valid.

So what does that

"Error handlers should save the values in MCA_ADDR, MCA_MISC0,
and MCA_SYND even if MCA_STATUS[AddrV], MCA_STATUS[MiscV], and
MCA_STATUS[SyndV] are zero."

*actually* mean then?

It is still in the PPR.

[1/2] Revert "x86/mce/AMD: Collect error info even if valid bits are not set"

[Yazen Ghannam]

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[1/2] Revert "x86/mce/AMD: Collect error info even if valid bits are not set"

[Borislav Petkov]

On Mon, Mar 26, 2018 at 07:58:51PM +0000, Ghannam, Yazen wrote:
> So at a minimum, we should always save and report as much as we can.

Only on Zen or all AMD families?

[1/2] Revert "x86/mce/AMD: Collect error info even if valid bits are not set"

[Yazen Ghannam]

> -----Original Message-----
> From: Borislav Petkov <bp@alien8.de>
> Sent: Monday, March 26, 2018 4:08 PM
> To: Ghannam, Yazen <Yazen.Ghannam@amd.com>
> Cc: linux-edac@vger.kernel.org; linux-kernel@vger.kernel.org;
> tony.luck@intel.com; x86@kernel.org
> Subject: Re: [PATCH 1/2] Revert "x86/mce/AMD: Collect error info even if
> valid bits are not set"
> 
> On Mon, Mar 26, 2018 at 07:58:51PM +0000, Ghannam, Yazen wrote:
> > So at a minimum, we should always save and report as much as we can.
> 
> Only on Zen or all AMD families?
> 

I'll confirm with the HW folks. I understand it as a change in philosophy
rather than a change in hardware.

Thanks,
Yazen

[1/2] Revert "x86/mce/AMD: Collect error info even if valid bits are not set"

[Yazen Ghannam]

> -----Original Message-----
> From: linux-edac-owner@vger.kernel.org <linux-edac-
> owner@vger.kernel.org> On Behalf Of Ghannam, Yazen
> Sent: Tuesday, March 27, 2018 10:02 AM
> To: Borislav Petkov <bp@alien8.de>
> Cc: linux-edac@vger.kernel.org; linux-kernel@vger.kernel.org;
> tony.luck@intel.com; x86@kernel.org
> Subject: RE: [PATCH 1/2] Revert "x86/mce/AMD: Collect error info even if
> valid bits are not set"
> 
> > -----Original Message-----
> > From: Borislav Petkov <bp@alien8.de>
> > Sent: Monday, March 26, 2018 4:08 PM
> > To: Ghannam, Yazen <Yazen.Ghannam@amd.com>
> > Cc: linux-edac@vger.kernel.org; linux-kernel@vger.kernel.org;
> > tony.luck@intel.com; x86@kernel.org
> > Subject: Re: [PATCH 1/2] Revert "x86/mce/AMD: Collect error info even if
> > valid bits are not set"
> >
> > On Mon, Mar 26, 2018 at 07:58:51PM +0000, Ghannam, Yazen wrote:
> > > So at a minimum, we should always save and report as much as we can.
> >
> > Only on Zen or all AMD families?
> >
> 
> I'll confirm with the HW folks. I understand it as a change in philosophy
> rather than a change in hardware.
> 

So this recommendation could apply to all families, but it's okay if we just
apply this behavior to SMCA systems. That way we don't need to worry
about changing things on legacy systems.

I'll write a new patch that abstracts the register reads and applies the
different behaviors.

In any case, this patch should be reverted since faking the valid bits will
cause the downstream code in the notifier blocks to process errors they
shouldn't.

Thanks,
Yazen

[1/2] Revert "x86/mce/AMD: Collect error info even if valid bits are not set"

[Borislav Petkov]

Reviving an old issue while cleaning my inbox.

On Tue, Mar 27, 2018 at 03:59:37PM +0000, Ghannam, Yazen wrote:
> > > On Mon, Mar 26, 2018 at 07:58:51PM +0000, Ghannam, Yazen wrote:
> > > > So at a minimum, we should always save and report as much as we can.
> > >
> > > Only on Zen or all AMD families?
> > >
> > 
> > I'll confirm with the HW folks. I understand it as a change in philosophy
> > rather than a change in hardware.
> > 
> 
> So this recommendation could apply to all families, but it's okay if we just

Ok, so I think we should do this, still, as it is exactly what the
recommendation says: read the MSRs even if the valid bits are not set and it
doesn't set any Valid bits to confuse error handling downstream.

This way we'll collect all possible info and then mce_amd.c should stop looking
at the valid bits too and dump whatever has been logged.

Ok?

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 4b767284b7f5..c14674025615 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -639,10 +639,12 @@ static struct notifier_block mce_default_nb = {
  */
 static void mce_read_aux(struct mce *m, int i)
 {
-	if (m->status & MCI_STATUS_MISCV)
+	bool is_amd = m->cpuvendor == X86_VENDOR_AMD;
+
+	if (m->status & MCI_STATUS_MISCV || is_amd)
 		m->misc = mce_rdmsrl(msr_ops.misc(i));
 
-	if (m->status & MCI_STATUS_ADDRV) {
+	if (m->status & MCI_STATUS_ADDRV || is_amd) {
 		m->addr = mce_rdmsrl(msr_ops.addr(i));
 
 		/*
@@ -668,7 +670,7 @@ static void mce_read_aux(struct mce *m, int i)
 	if (mce_flags.smca) {
 		m->ipid = mce_rdmsrl(MSR_AMD64_SMCA_MCx_IPID(i));
 
-		if (m->status & MCI_STATUS_SYNDV)
+		if (m->status & MCI_STATUS_SYNDV || is_amd)
 			m->synd = mce_rdmsrl(MSR_AMD64_SMCA_MCx_SYND(i));
 	}
 }

[1/2] Revert "x86/mce/AMD: Collect error info even if valid bits are not set"

[Yazen Ghannam]

> -----Original Message-----
> From: linux-edac-owner@vger.kernel.org <linux-edac-owner@vger.kernel.org>
> On Behalf Of Borislav Petkov
> Sent: Thursday, August 23, 2018 7:24 AM
> To: Ghannam, Yazen <Yazen.Ghannam@amd.com>
> Cc: linux-edac@vger.kernel.org; linux-kernel@vger.kernel.org;
> tony.luck@intel.com; x86@kernel.org
> Subject: Re: [PATCH 1/2] Revert "x86/mce/AMD: Collect error info even if valid
> bits are not set"
> 
> Reviving an old issue while cleaning my inbox.
> 
> On Tue, Mar 27, 2018 at 03:59:37PM +0000, Ghannam, Yazen wrote:
> > > > On Mon, Mar 26, 2018 at 07:58:51PM +0000, Ghannam, Yazen wrote:
> > > > > So at a minimum, we should always save and report as much as we can.
> > > >
> > > > Only on Zen or all AMD families?
> > > >
> > >
> > > I'll confirm with the HW folks. I understand it as a change in philosophy
> > > rather than a change in hardware.
> > >
> >
> > So this recommendation could apply to all families, but it's okay if we just
> 
> Ok, so I think we should do this, still, as it is exactly what the
> recommendation says: read the MSRs even if the valid bits are not set and it
> doesn't set any Valid bits to confuse error handling downstream.
> 
> This way we'll collect all possible info and then mce_amd.c should stop looking
> at the valid bits too and dump whatever has been logged.
> 
> Ok?
> 

Yes, this seems okay to me.

Thanks,
Yazen