* [1/5] EDAC/amd64: Add Fam17hMod30h PCI IDs
@ 2019-02-19 20:25 Yazen Ghannam
0 siblings, 0 replies; 3+ messages in thread
From: Yazen Ghannam @ 2019-02-19 20:25 UTC (permalink / raw)
To: linux-edac@vger.kernel.org
Cc: Ghannam, Yazen, linux-kernel@vger.kernel.org, bp@alien8.de
From: Yazen Ghannam <yazen.ghannam@amd.com>
Add the new Family 17h Model 30h PCI IDs to the AMD64 EDAC module.
This also fixes a probe failure that appeared when some other PCI IDs
for Fam17hMod30h were added to the AMD NB code.
Fixes: be3518a16ef2 (x86/amd_nb: Add PCI device IDs for family 17h, model 30h)
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
drivers/edac/amd64_edac.c | 15 ++++++++++++++-
drivers/edac/amd64_edac.h | 3 +++
2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 6ea98575a402..9947437d9574 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -2211,6 +2211,15 @@ static struct amd64_family_type family_types[] = {
.dbam_to_cs = f17_base_addr_to_cs_size,
}
},
+ [F17_M30H_CPUS] = {
+ .ctl_name = "F17h_M30h",
+ .f0_id = PCI_DEVICE_ID_AMD_17H_M30H_DF_F0,
+ .f6_id = PCI_DEVICE_ID_AMD_17H_M30H_DF_F6,
+ .ops = {
+ .early_channel_count = f17_early_channel_count,
+ .dbam_to_cs = f17_base_addr_to_cs_size,
+ }
+ },
};
/*
@@ -3199,7 +3208,11 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt)
break;
case 0x17:
- if (pvt->model >= 0x10 && pvt->model <= 0x2f) {
+ if (pvt->model >= 0x30 && pvt->model <= 0x3f) {
+ fam_type = &family_types[F17_M30H_CPUS];
+ pvt->ops = &family_types[F17_M30H_CPUS].ops;
+ break;
+ } else if (pvt->model >= 0x10 && pvt->model <= 0x2f) {
fam_type = &family_types[F17_M10H_CPUS];
pvt->ops = &family_types[F17_M10H_CPUS].ops;
break;
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index 4242f8e39c18..de8dbb0b42b5 100644
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -117,6 +117,8 @@
#define PCI_DEVICE_ID_AMD_17H_DF_F6 0x1466
#define PCI_DEVICE_ID_AMD_17H_M10H_DF_F0 0x15e8
#define PCI_DEVICE_ID_AMD_17H_M10H_DF_F6 0x15ee
+#define PCI_DEVICE_ID_AMD_17H_M30H_DF_F0 0x1490
+#define PCI_DEVICE_ID_AMD_17H_M30H_DF_F6 0x1496
/*
* Function 1 - Address Map
@@ -284,6 +286,7 @@ enum amd_families {
F16_M30H_CPUS,
F17_CPUS,
F17_M10H_CPUS,
+ F17_M30H_CPUS,
NUM_FAMILIES,
};
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [1/5] EDAC/amd64: Add Fam17hMod30h PCI IDs
@ 2019-02-26 10:41 Borislav Petkov
0 siblings, 0 replies; 3+ messages in thread
From: Borislav Petkov @ 2019-02-26 10:41 UTC (permalink / raw)
To: Ghannam, Yazen; +Cc: linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org
Just nitpicks:
On Tue, Feb 19, 2019 at 08:25:51PM +0000, Ghannam, Yazen wrote:
> Subject: Re: [PATCH 1/5] EDAC/amd64: Add Fam17hMod30h PCI IDs
Write that "Fam17hMod30h" in a human readable form pls. Especially in
the subject: "family 0x17, models 0x30..."
> From: Yazen Ghannam <yazen.ghannam@amd.com>
>
> Add the new Family 17h Model 30h PCI IDs to the AMD64 EDAC module.
>
> This also fixes a probe failure that appeared when some other PCI IDs
> for Fam17hMod30h were added to the AMD NB code.
>
> Fixes: be3518a16ef2 (x86/amd_nb: Add PCI device IDs for family 17h, model 30h)
> Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
> ---
> drivers/edac/amd64_edac.c | 15 ++++++++++++++-
> drivers/edac/amd64_edac.h | 3 +++
> 2 files changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
> index 6ea98575a402..9947437d9574 100644
> --- a/drivers/edac/amd64_edac.c
> +++ b/drivers/edac/amd64_edac.c
> @@ -2211,6 +2211,15 @@ static struct amd64_family_type family_types[] = {
> .dbam_to_cs = f17_base_addr_to_cs_size,
> }
> },
> + [F17_M30H_CPUS] = {
> + .ctl_name = "F17h_M30h",
> + .f0_id = PCI_DEVICE_ID_AMD_17H_M30H_DF_F0,
> + .f6_id = PCI_DEVICE_ID_AMD_17H_M30H_DF_F6,
> + .ops = {
> + .early_channel_count = f17_early_channel_count,
> + .dbam_to_cs = f17_base_addr_to_cs_size,
> + }
> + },
> };
>
> /*
> @@ -3199,7 +3208,11 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt)
> break;
>
> case 0x17:
> - if (pvt->model >= 0x10 && pvt->model <= 0x2f) {
> + if (pvt->model >= 0x30 && pvt->model <= 0x3f) {
> + fam_type = &family_types[F17_M30H_CPUS];
> + pvt->ops = &family_types[F17_M30H_CPUS].ops;
> + break;
> + } else if (pvt->model >= 0x10 && pvt->model <= 0x2f) {
Sort the checks in increasing models so that it is easier to follow.
^ permalink raw reply [flat|nested] 3+ messages in thread
* [1/5] EDAC/amd64: Add Fam17hMod30h PCI IDs
@ 2019-02-26 15:07 Yazen Ghannam
0 siblings, 0 replies; 3+ messages in thread
From: Yazen Ghannam @ 2019-02-26 15:07 UTC (permalink / raw)
To: Borislav Petkov; +Cc: linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org
> -----Original Message-----
> From: linux-edac-owner@vger.kernel.org <linux-edac-owner@vger.kernel.org> On Behalf Of Borislav Petkov
> Sent: Tuesday, February 26, 2019 4:41 AM
> To: Ghannam, Yazen <Yazen.Ghannam@amd.com>
> Cc: linux-edac@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH 1/5] EDAC/amd64: Add Fam17hMod30h PCI IDs
>
> Just nitpicks:
>
> On Tue, Feb 19, 2019 at 08:25:51PM +0000, Ghannam, Yazen wrote:
>
> > Subject: Re: [PATCH 1/5] EDAC/amd64: Add Fam17hMod30h PCI IDs
>
> Write that "Fam17hMod30h" in a human readable form pls. Especially in
> the subject: "family 0x17, models 0x30..."
>
Will do.
> > From: Yazen Ghannam <yazen.ghannam@amd.com>
> >
> > Add the new Family 17h Model 30h PCI IDs to the AMD64 EDAC module.
> >
> > This also fixes a probe failure that appeared when some other PCI IDs
> > for Fam17hMod30h were added to the AMD NB code.
> >
> > Fixes: be3518a16ef2 (x86/amd_nb: Add PCI device IDs for family 17h, model 30h)
> > Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
> > ---
> > drivers/edac/amd64_edac.c | 15 ++++++++++++++-
> > drivers/edac/amd64_edac.h | 3 +++
> > 2 files changed, 17 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
> > index 6ea98575a402..9947437d9574 100644
> > --- a/drivers/edac/amd64_edac.c
> > +++ b/drivers/edac/amd64_edac.c
> > @@ -2211,6 +2211,15 @@ static struct amd64_family_type family_types[] = {
> > .dbam_to_cs = f17_base_addr_to_cs_size,
> > }
> > },
> > + [F17_M30H_CPUS] = {
> > + .ctl_name = "F17h_M30h",
> > + .f0_id = PCI_DEVICE_ID_AMD_17H_M30H_DF_F0,
> > + .f6_id = PCI_DEVICE_ID_AMD_17H_M30H_DF_F6,
> > + .ops = {
> > + .early_channel_count = f17_early_channel_count,
> > + .dbam_to_cs = f17_base_addr_to_cs_size,
> > + }
> > + },
> > };
> >
> > /*
> > @@ -3199,7 +3208,11 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt)
> > break;
> >
> > case 0x17:
> > - if (pvt->model >= 0x10 && pvt->model <= 0x2f) {
> > + if (pvt->model >= 0x30 && pvt->model <= 0x3f) {
> > + fam_type = &family_types[F17_M30H_CPUS];
> > + pvt->ops = &family_types[F17_M30H_CPUS].ops;
> > + break;
> > + } else if (pvt->model >= 0x10 && pvt->model <= 0x2f) {
>
> Sort the checks in increasing models so that it is easier to follow.
>
Okay, will do.
Thanks,
Yazen
^ permalink raw reply [flat|nested] 3+ messages in thread
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