From: Borislav Petkov <bp@alien8.de>
To: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>
Cc: "Luck, Tony" <tony.luck@intel.com>,
"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"x86@kernel.org" <x86@kernel.org>
Subject: Re: [PATCH v3 5/6] x86/MCE: Save MCA control bits that get set in hardware
Date: Thu, 16 May 2019 19:21:17 +0200 [thread overview]
Message-ID: <20190516172117.GC21857@zn.tnic> (raw)
In-Reply-To: <SN6PR12MB26392B440ED735C26AA2C678F80A0@SN6PR12MB2639.namprd12.prod.outlook.com>
On Thu, May 16, 2019 at 05:09:11PM +0000, Ghannam, Yazen wrote:
> So that the sysfs files show the control values that are set in the
> hardware. It seemed like this would be more helpful than showing all
> 0xF's.
Yeah, but it has been like that since forever and it hasn't bugged
anybody. Probably because anybody doesn't even look at those files. As
Tony says:
"RAS is a lonely subsystem ... even EDAC gets more love."
:-)))
And adding yet another vendor check for this seemed just not worth it.
> Should I send out another version of this set?
I simply zapped 5/6. I still think your 6/6 makes sense though.
---
From: Yazen Ghannam <yazen.ghannam@amd.com>
Date: Tue, 30 Apr 2019 20:32:21 +0000
Subject: [PATCH] x86/MCE: Determine MCA banks' init state properly
The OS is expected to write all bits to MCA_CTL for each bank,
thus enabling error reporting in all banks. However, some banks
may be unused in which case the registers for such banks are
Read-as-Zero/Writes-Ignored. Also, the OS may avoid setting some control
bits because of quirks, etc.
A bank can be considered uninitialized if the MCA_CTL register returns
zero. This is because either the OS did not write anything or because
the hardware is enforcing RAZ/WI for the bank.
Set a bank's init value based on if the control bits are set or not in
hardware. Return an error code in the sysfs interface for uninitialized
banks.
[ bp: Massage a bit. ]
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: "x86@kernel.org" <x86@kernel.org>
Link: https://lkml.kernel.org/r/20190430203206.104163-7-Yazen.Ghannam@amd.com
---
arch/x86/kernel/cpu/mce/core.c | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 5bcecadcf4d9..c049689f3d73 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -1567,10 +1567,13 @@ static void __mcheck_cpu_init_clear_banks(void)
for (i = 0; i < this_cpu_read(mce_num_banks); i++) {
struct mce_bank *b = &mce_banks[i];
- if (!b->init)
- continue;
- wrmsrl(msr_ops.ctl(i), b->ctl);
- wrmsrl(msr_ops.status(i), 0);
+ if (b->init) {
+ wrmsrl(msr_ops.ctl(i), b->ctl);
+ wrmsrl(msr_ops.status(i), 0);
+ }
+
+ /* Bank is initialized if bits are set in hardware. */
+ b->init = !!b->ctl;
}
}
@@ -2095,6 +2098,9 @@ static ssize_t show_bank(struct device *s, struct device_attribute *attr,
b = &per_cpu(mce_banks_array, s->id)[bank];
+ if (!b->init)
+ return -ENODEV;
+
return sprintf(buf, "%llx\n", b->ctl);
}
@@ -2113,6 +2119,9 @@ static ssize_t set_bank(struct device *s, struct device_attribute *attr,
b = &per_cpu(mce_banks_array, s->id)[bank];
+ if (!b->init)
+ return -ENODEV;
+
b->ctl = new;
mce_restart();
--
2.21.0
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
next prev parent reply other threads:[~2019-05-16 17:21 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-30 20:32 [PATCH v3 0/6] Handle MCA banks in a per_cpu way Ghannam, Yazen
2019-04-30 20:32 ` [v3,1/6] x86/MCE: Make struct mce_banks[] static Yazen Ghannam
2019-04-30 20:32 ` [PATCH v3 1/6] " Ghannam, Yazen
2019-04-30 20:32 ` [v3,2/6] x86/MCE: Handle MCA controls in a per_cpu way Yazen Ghannam
2019-04-30 20:32 ` [PATCH v3 2/6] " Ghannam, Yazen
2019-04-30 20:32 ` [v3,3/6] x86/MCE/AMD: Don't cache block addresses on SMCA systems Yazen Ghannam
2019-04-30 20:32 ` [PATCH v3 3/6] " Ghannam, Yazen
2019-04-30 20:32 ` [v3,5/6] x86/MCE: Save MCA control bits that get set in hardware Yazen Ghannam
2019-04-30 20:32 ` [PATCH v3 5/6] " Ghannam, Yazen
2019-05-16 15:52 ` Luck, Tony
2019-05-16 16:14 ` Ghannam, Yazen
2019-05-16 16:56 ` Borislav Petkov
2019-05-16 17:09 ` Ghannam, Yazen
2019-05-16 17:21 ` Borislav Petkov [this message]
2019-05-16 20:20 ` Ghannam, Yazen
2019-05-16 20:34 ` Borislav Petkov
2019-05-16 20:59 ` Luck, Tony
2019-05-17 10:10 ` Borislav Petkov
2019-05-17 15:46 ` Ghannam, Yazen
2019-05-17 16:37 ` Borislav Petkov
2019-05-17 17:26 ` Luck, Tony
2019-05-17 17:48 ` Borislav Petkov
2019-05-17 18:06 ` Luck, Tony
2019-05-17 19:34 ` Borislav Petkov
2019-05-17 19:44 ` Luck, Tony
2019-05-17 19:50 ` Borislav Petkov
2019-05-17 19:49 ` Ghannam, Yazen
2019-05-17 20:02 ` Borislav Petkov
2019-05-23 20:00 ` Ghannam, Yazen
2019-05-27 23:28 ` Borislav Petkov
2019-06-07 14:49 ` Ghannam, Yazen
2019-06-07 16:37 ` Borislav Petkov
2019-06-07 16:44 ` Ghannam, Yazen
2019-06-07 16:59 ` Borislav Petkov
2019-06-07 17:08 ` Ghannam, Yazen
2019-06-07 17:20 ` Borislav Petkov
2019-06-11 5:13 ` Borislav Petkov
2019-04-30 20:32 ` [v3,4/6] x86/MCE: Make number of MCA banks per_cpu Yazen Ghannam
2019-04-30 20:32 ` [PATCH v3 4/6] " Ghannam, Yazen
2019-05-18 11:25 ` Borislav Petkov
2019-05-21 17:52 ` Ghannam, Yazen
2019-05-21 20:29 ` Borislav Petkov
2019-05-21 20:42 ` Luck, Tony
2019-05-21 23:09 ` Borislav Petkov
2019-05-22 14:01 ` Ghannam, Yazen
2019-04-30 20:32 ` [v3,6/6] x86/MCE: Treat MCE bank as initialized if control bits set in hardware Yazen Ghannam
2019-04-30 20:32 ` [PATCH v3 6/6] " Ghannam, Yazen
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