From: Borislav Petkov <bp@alien8.de>
To: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>
Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"tony.luck@intel.com" <tony.luck@intel.com>,
"x86@kernel.org" <x86@kernel.org>
Subject: Re: [PATCH v3 4/6] x86/MCE: Make number of MCA banks per_cpu
Date: Tue, 21 May 2019 22:29:02 +0200 [thread overview]
Message-ID: <20190521202902.GC7793@cz.tnic> (raw)
In-Reply-To: <SN6PR12MB2639571E33EBC7342A0607F8F8070@SN6PR12MB2639.namprd12.prod.outlook.com>
On Tue, May 21, 2019 at 05:52:42PM +0000, Ghannam, Yazen wrote:
> This message comes from ___might_sleep() which checks the
> system_state.
>
> On CPU0, system_state=SYSTEM_BOOTING.
>
> On every other CPU, system_state=SYSTEM_SCHEDULING, and that's the
> only system_state where the message is shown.
Right, the check in ___might_sleep().
> Changing GFP_KERNEL to GFP_ATOMIC seems to be a fix. Is this
> appropriate? Or do you think there's something else we could try?
From: Documentation/core-api/memory-allocation.rst
* If you think that accessing memory reserves is justified and the kernel
will be stressed unless allocation succeeds, you may use ``GFP_ATOMIC``.
I don't think the MCA banks representation justifies accessing memory
reserves.
Can we do instead:
-static DEFINE_PER_CPU_READ_MOSTLY(struct mce_bank *, mce_banks_array);
+static DEFINE_PER_CPU_READ_MOSTLY(struct mce_bank, mce_banks_array[MAX_NR_BANKS]);
which should be something like 9*32 = 288 bytes per CPU.
Unless you have a better idea...
Thx.
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply. Srsly.
next prev parent reply other threads:[~2019-05-21 20:28 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-30 20:32 [PATCH v3 0/6] Handle MCA banks in a per_cpu way Ghannam, Yazen
2019-04-30 20:32 ` [v3,1/6] x86/MCE: Make struct mce_banks[] static Yazen Ghannam
2019-04-30 20:32 ` [PATCH v3 1/6] " Ghannam, Yazen
2019-04-30 20:32 ` [v3,2/6] x86/MCE: Handle MCA controls in a per_cpu way Yazen Ghannam
2019-04-30 20:32 ` [PATCH v3 2/6] " Ghannam, Yazen
2019-04-30 20:32 ` [v3,3/6] x86/MCE/AMD: Don't cache block addresses on SMCA systems Yazen Ghannam
2019-04-30 20:32 ` [PATCH v3 3/6] " Ghannam, Yazen
2019-04-30 20:32 ` [v3,5/6] x86/MCE: Save MCA control bits that get set in hardware Yazen Ghannam
2019-04-30 20:32 ` [PATCH v3 5/6] " Ghannam, Yazen
2019-05-16 15:52 ` Luck, Tony
2019-05-16 16:14 ` Ghannam, Yazen
2019-05-16 16:56 ` Borislav Petkov
2019-05-16 17:09 ` Ghannam, Yazen
2019-05-16 17:21 ` Borislav Petkov
2019-05-16 20:20 ` Ghannam, Yazen
2019-05-16 20:34 ` Borislav Petkov
2019-05-16 20:59 ` Luck, Tony
2019-05-17 10:10 ` Borislav Petkov
2019-05-17 15:46 ` Ghannam, Yazen
2019-05-17 16:37 ` Borislav Petkov
2019-05-17 17:26 ` Luck, Tony
2019-05-17 17:48 ` Borislav Petkov
2019-05-17 18:06 ` Luck, Tony
2019-05-17 19:34 ` Borislav Petkov
2019-05-17 19:44 ` Luck, Tony
2019-05-17 19:50 ` Borislav Petkov
2019-05-17 19:49 ` Ghannam, Yazen
2019-05-17 20:02 ` Borislav Petkov
2019-05-23 20:00 ` Ghannam, Yazen
2019-05-27 23:28 ` Borislav Petkov
2019-06-07 14:49 ` Ghannam, Yazen
2019-06-07 16:37 ` Borislav Petkov
2019-06-07 16:44 ` Ghannam, Yazen
2019-06-07 16:59 ` Borislav Petkov
2019-06-07 17:08 ` Ghannam, Yazen
2019-06-07 17:20 ` Borislav Petkov
2019-06-11 5:13 ` Borislav Petkov
2019-04-30 20:32 ` [v3,4/6] x86/MCE: Make number of MCA banks per_cpu Yazen Ghannam
2019-04-30 20:32 ` [PATCH v3 4/6] " Ghannam, Yazen
2019-05-18 11:25 ` Borislav Petkov
2019-05-21 17:52 ` Ghannam, Yazen
2019-05-21 20:29 ` Borislav Petkov [this message]
2019-05-21 20:42 ` Luck, Tony
2019-05-21 23:09 ` Borislav Petkov
2019-05-22 14:01 ` Ghannam, Yazen
2019-04-30 20:32 ` [v3,6/6] x86/MCE: Treat MCE bank as initialized if control bits set in hardware Yazen Ghannam
2019-04-30 20:32 ` [PATCH v3 6/6] " Ghannam, Yazen
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