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From: Yazen Ghannam <yazen.ghannam@amd.com>
To: <x86@kernel.org>, Tony Luck <tony.luck@intel.com>
Cc: <linux-kernel@vger.kernel.org>, <linux-edac@vger.kernel.org>,
	<Smita.KoralahalliChannabasappa@amd.com>,
	Yazen Ghannam <yazen.ghannam@amd.com>
Subject: [PATCH v2 08/16] x86/mce: Define BSP-only SMCA init
Date: Thu, 13 Feb 2025 16:45:57 +0000	[thread overview]
Message-ID: <20250213-wip-mca-updates-v2-8-3636547fe05f@amd.com> (raw)
In-Reply-To: <20250213-wip-mca-updates-v2-0-3636547fe05f@amd.com>

Currently on AMD systems, MCA interrupt handler functions are set during
CPU init. However, the functions only need to be set once for the whole
system.

Assign the handlers only during BSP init. Do so only for SMCA systems to
maintain the old behavior for legacy systems.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---

Notes:
    Link:
    https://lore.kernel.org/r/20240604154635.GTZl8222q7WAEVSJKH@fat_crate.local
    
    v1->v2:
    * New in v2.

 arch/x86/kernel/cpu/mce/amd.c      | 6 ++++++
 arch/x86/kernel/cpu/mce/core.c     | 3 +++
 arch/x86/kernel/cpu/mce/internal.h | 2 ++
 3 files changed, 11 insertions(+)

diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c
index a4ef4ff1a7ff..bf2b1dc5aaa9 100644
--- a/arch/x86/kernel/cpu/mce/amd.c
+++ b/arch/x86/kernel/cpu/mce/amd.c
@@ -687,6 +687,12 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
 		deferred_error_interrupt_enable(c);
 }
 
+void mce_smca_cpu_init(void)
+{
+	mce_threshold_vector	  = amd_threshold_interrupt;
+	deferred_error_int_vector = amd_deferred_error_interrupt;
+}
+
 /*
  * DRAM ECC errors are reported in the Northbridge (bank 4) with
  * Extended Error Code 8.
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index f13d3f7ca56e..402d7993eb96 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -2243,6 +2243,9 @@ void cpu_mca_init(struct cpuinfo_x86 *c)
 	mce_flags.succor	 = cpu_feature_enabled(X86_FEATURE_SUCCOR);
 	mce_flags.smca		 = cpu_feature_enabled(X86_FEATURE_SMCA);
 
+	if (mce_flags.smca)
+		mce_smca_cpu_init();
+
 	rdmsrl(MSR_IA32_MCG_CAP, cap);
 
 	/* Use accurate RIP reporting if available. */
diff --git a/arch/x86/kernel/cpu/mce/internal.h b/arch/x86/kernel/cpu/mce/internal.h
index 231ba8ca4a3e..a4bae8c0cf4c 100644
--- a/arch/x86/kernel/cpu/mce/internal.h
+++ b/arch/x86/kernel/cpu/mce/internal.h
@@ -293,11 +293,13 @@ static __always_inline void smca_extract_err_addr(struct mce *m)
 	m->addr &= GENMASK_ULL(55, lsb);
 }
 
+void mce_smca_cpu_init(void);
 #else
 static inline void mce_threshold_create_device(unsigned int cpu)	{ }
 static inline bool amd_filter_mce(struct mce *m) { return false; }
 static inline bool amd_mce_usable_address(struct mce *m) { return false; }
 static inline void smca_extract_err_addr(struct mce *m) { }
+static inline void mce_smca_cpu_init(void) {}
 #endif
 
 #ifdef CONFIG_X86_ANCIENT_MCE

-- 
2.43.0


  parent reply	other threads:[~2025-02-13 16:46 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-13 16:45 [PATCH v2 00/16] AMD MCA interrupts rework Yazen Ghannam
2025-02-13 16:45 ` [PATCH v2 01/16] x86/mce: Don't remove sysfs if thresholding sysfs init fails Yazen Ghannam
2025-02-17  6:58   ` Zhuo, Qiuxu
2025-02-13 16:45 ` [PATCH v2 02/16] x86/mce/amd: Remove return value for mce_threshold_create_device() Yazen Ghannam
2025-02-17  7:11   ` Zhuo, Qiuxu
2025-02-17 14:09     ` Yazen Ghannam
2025-02-13 16:45 ` [PATCH v2 03/16] x86/mce/amd: Remove smca_banks_map Yazen Ghannam
2025-02-17  7:57   ` Zhuo, Qiuxu
2025-02-17 14:17     ` Yazen Ghannam
2025-02-13 16:45 ` [PATCH v2 04/16] x86/mce/amd: Put list_head in threshold_bank Yazen Ghannam
2025-02-18  1:28   ` Zhuo, Qiuxu
2025-02-13 16:45 ` [PATCH v2 05/16] x86/mce: Cleanup bank processing on init Yazen Ghannam
2025-02-13 22:32   ` Luck, Tony
2025-02-17 13:55     ` Yazen Ghannam
2025-02-18 16:40       ` Luck, Tony
2025-02-18  2:15   ` Zhuo, Qiuxu
2025-02-13 16:45 ` [PATCH v2 06/16] x86/mce: Remove __mcheck_cpu_init_early() Yazen Ghannam
2025-02-18  3:00   ` Zhuo, Qiuxu
2025-02-19 15:53     ` Yazen Ghannam
2025-02-27 15:25   ` Borislav Petkov
2025-02-27 16:31     ` Yazen Ghannam
2025-02-27 19:33       ` Borislav Petkov
2025-02-27 19:59         ` Yazen Ghannam
2025-02-27 20:48           ` Borislav Petkov
2025-02-28 14:29             ` Yazen Ghannam
2025-02-13 16:45 ` [PATCH v2 07/16] x86/mce: Define BSP-only init Yazen Ghannam
2025-02-18  3:16   ` Zhuo, Qiuxu
2025-02-19 15:57     ` Yazen Ghannam
2025-02-20  1:37       ` Zhuo, Qiuxu
2025-02-20 14:36         ` Yazen Ghannam
2025-02-24 13:28           ` Zhuo, Qiuxu
2025-02-13 16:45 ` Yazen Ghannam [this message]
2025-02-18  3:33   ` [PATCH v2 08/16] x86/mce: Define BSP-only SMCA init Zhuo, Qiuxu
2025-02-19 16:01     ` Yazen Ghannam
2025-02-13 16:45 ` [PATCH v2 09/16] x86/mce: Do 'UNKNOWN' vendor check early Yazen Ghannam
2025-02-18  5:31   ` Zhuo, Qiuxu
2025-02-13 16:45 ` [PATCH v2 10/16] x86/mce: Separate global and per-CPU quirks Yazen Ghannam
2025-02-18  6:03   ` Zhuo, Qiuxu
2025-02-19 16:06     ` Yazen Ghannam
2025-02-20  1:27       ` Zhuo, Qiuxu
2025-02-20 14:37         ` Yazen Ghannam
2025-02-13 16:46 ` [PATCH v2 11/16] x86/mce: Move machine_check_poll() status checks to helper functions Yazen Ghannam
2025-02-18  6:29   ` Zhuo, Qiuxu
2025-02-13 16:46 ` [PATCH v2 12/16] x86/mce: Unify AMD THR handler with MCA Polling Yazen Ghannam
2025-02-18  6:42   ` Zhuo, Qiuxu
2025-02-19 16:07     ` Yazen Ghannam
2025-02-13 16:46 ` [PATCH v2 13/16] x86/mce: Unify AMD DFR " Yazen Ghannam
2025-02-18  7:37   ` Zhuo, Qiuxu
2025-02-19 16:09     ` Yazen Ghannam
2025-02-20  1:41       ` Zhuo, Qiuxu
2025-02-20 14:41         ` Yazen Ghannam
2025-02-24 13:31           ` Zhuo, Qiuxu
2025-02-13 16:46 ` [PATCH v2 14/16] x86/mce/amd: Enable interrupt vectors once per-CPU on SMCA systems Yazen Ghannam
2025-02-18  8:23   ` Zhuo, Qiuxu
2025-02-19 16:16     ` Yazen Ghannam
2025-02-13 16:46 ` [PATCH v2 15/16] x86/mce/amd: Support SMCA Corrected Error Interrupt Yazen Ghannam
2025-02-13 22:34   ` Luck, Tony
2025-02-17 14:06     ` Yazen Ghannam
2025-02-18 13:27   ` Zhuo, Qiuxu
2025-02-19 16:19     ` Yazen Ghannam
2025-02-13 16:46 ` [PATCH v2 16/16] x86/mce: Handle AMD threshold interrupt storms Yazen Ghannam
2025-02-18 13:51   ` Zhuo, Qiuxu
2025-02-13 22:40 ` [PATCH v2 00/16] AMD MCA interrupts rework Luck, Tony

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