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* [PATCH 1/1] EDAC/ie31200: Add two more Intel Alder Lake-S SoCs for EDAC support
@ 2025-07-24  6:44 Kyle Manna
  2025-07-24 14:31 ` Zhuo, Qiuxu
  0 siblings, 1 reply; 6+ messages in thread
From: Kyle Manna @ 2025-07-24  6:44 UTC (permalink / raw)
  To: Tony Luck, Borislav Petkov, Jason Baron
  Cc: Qiuxu Zhuo, James Jernigan, James Morse, Mauro Carvalho Chehab,
	Robert Richter, Yi Lai, linux-edac, linux-kernel, Kyle Manna

Host Device IDs (DID0) correspond to:
* Intel Core i7-12700K
* Intel Core i5-12600K

See documentation:
* 12th Generation Intel® Core™ Processors Datasheet
    * Volume 1 of 2, Doc. No.: 655258, Rev.: 011
    * https://edc.intel.com/output/DownloadPdfDocument?id=8297 (PDF)

Signed-off-by: Kyle Manna <kyle@kylemanna.com>
---
 drivers/edac/ie31200_edac.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/edac/ie31200_edac.c b/drivers/edac/ie31200_edac.c
index a53612be4b2f..2078c12bbed2 100644
--- a/drivers/edac/ie31200_edac.c
+++ b/drivers/edac/ie31200_edac.c
@@ -94,6 +94,8 @@
 
 /* Alder Lake-S */
 #define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_1	0x4660
+#define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_2	0x4668
+#define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_3	0x4648
 
 #define IE31200_RANKS_PER_CHANNEL	8
 #define IE31200_DIMMS_PER_CHANNEL	2
@@ -741,6 +743,8 @@ static const struct pci_device_id ie31200_pci_tbl[] = {
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_RPL_S_3), (kernel_ulong_t)&rpl_s_cfg},
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_RPL_S_4), (kernel_ulong_t)&rpl_s_cfg},
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_ADL_S_1), (kernel_ulong_t)&rpl_s_cfg},
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_ADL_S_2), (kernel_ulong_t)&rpl_s_cfg},
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_ADL_S_3), (kernel_ulong_t)&rpl_s_cfg},
 	{ 0, } /* 0 terminated list. */
 };
 MODULE_DEVICE_TABLE(pci, ie31200_pci_tbl);
-- 
2.50.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* RE: [PATCH 1/1] EDAC/ie31200: Add two more Intel Alder Lake-S SoCs for EDAC support
  2025-07-24  6:44 [PATCH 1/1] EDAC/ie31200: Add two more Intel Alder Lake-S SoCs for EDAC support Kyle Manna
@ 2025-07-24 14:31 ` Zhuo, Qiuxu
  2025-07-25  2:23   ` Kyle Manna
  0 siblings, 1 reply; 6+ messages in thread
From: Zhuo, Qiuxu @ 2025-07-24 14:31 UTC (permalink / raw)
  To: Kyle Manna, Luck, Tony, Borislav Petkov, Jason Baron
  Cc: James Jernigan, James Morse, Mauro Carvalho Chehab,
	Robert Richter, Lai, Yi1, linux-edac@vger.kernel.org,
	linux-kernel@vger.kernel.org

Hi Kyle,

> From: Kyle Manna <kyle@kylemanna.com>
> Sent: Thursday, July 24, 2025 2:44 PM
> To: Luck, Tony <tony.luck@intel.com>; Borislav Petkov <bp@alien8.de>; Jason
> Baron <jbaron@akamai.com>
> Cc: Zhuo, Qiuxu <qiuxu.zhuo@intel.com>; James Jernigan
> <jameswestonjernigan@gmail.com>; James Morse
> <james.morse@arm.com>; Mauro Carvalho Chehab <mchehab@kernel.org>;
> Robert Richter <rric@kernel.org>; Lai, Yi1 <yi1.lai@intel.com>; linux-
> edac@vger.kernel.org; linux-kernel@vger.kernel.org; Kyle Manna
> <kyle@kylemanna.com>
> Subject: [PATCH 1/1] EDAC/ie31200: Add two more Intel Alder Lake-S SoCs for
> EDAC support
> 
> Host Device IDs (DID0) correspond to:
> * Intel Core i7-12700K
> * Intel Core i5-12600K
> 
> See documentation:
> * 12th Generation Intel® Core™ Processors Datasheet
>     * Volume 1 of 2, Doc. No.: 655258, Rev.: 011
>     * https://edc.intel.com/output/DownloadPdfDocument?id=8297 (PDF)
> 
> Signed-off-by: Kyle Manna <kyle@kylemanna.com>
> ---

Do you have access to these machines to load the ie31200_edac
driver with your patch? If yes, would you take dmesg logs?

>  drivers/edac/ie31200_edac.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/edac/ie31200_edac.c b/drivers/edac/ie31200_edac.c index
> a53612be4b2f..2078c12bbed2 100644
> --- a/drivers/edac/ie31200_edac.c
> +++ b/drivers/edac/ie31200_edac.c
> @@ -94,6 +94,8 @@
> 
>  /* Alder Lake-S */
>  #define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_1	0x4660
> +#define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_2	0x4668
> +#define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_3	0x4648
> 

I didn't find the place in your spec above that indicates these
two CPUs with these two DIDs have Out-Of-Band ECC capabilities.
Could you point it out to me?

Thanks!
-Qiuxu


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 1/1] EDAC/ie31200: Add two more Intel Alder Lake-S SoCs for EDAC support
  2025-07-24 14:31 ` Zhuo, Qiuxu
@ 2025-07-25  2:23   ` Kyle Manna
  2025-08-01 14:52     ` Kyle Manna
  2025-08-01 15:50     ` Zhuo, Qiuxu
  0 siblings, 2 replies; 6+ messages in thread
From: Kyle Manna @ 2025-07-25  2:23 UTC (permalink / raw)
  To: Zhuo, Qiuxu, Luck, Tony, Borislav Petkov, Jason Baron
  Cc: James Jernigan, James Morse, Mauro Carvalho Chehab,
	Robert Richter, Lai, Yi1, linux-edac@vger.kernel.org,
	linux-kernel@vger.kernel.org

Hi Qiuxu,

On Thu, Jul 24, 2025, at 07:31, Zhuo, Qiuxu wrote:
> Do you have access to these machines to load the ie31200_edac
> driver with your patch? If yes, would you take dmesg logs?

I have access to a i5-12600K, here are the logs that I observed:

$ dmesg | rg -i -e edac -e ecc -e ie31200 | rg -v systemd | rg edac
[   14.379905] caller ie31200_init_one+0x1b5/0x480 [ie31200_edac] mapping multiple BARs
[   14.382709] EDAC MC0: Giving out device to module ie31200_edac controller IE31200: DEV 0000:00:00.0 (INTERRUPT)
[   14.383042] EDAC MC1: Giving out device to module ie31200_edac controller IE31200_1: DEV 0000:00:00.0 (INTERRUPT)

I posted additional logs from sysfs and "ras-mc-ctl" here[0] after I learned that support was added for related processors as well as discussion with other users trying to get W680 + ECC working.

[0] https://forums.servethehome.com/index.php?threads/intel-w680-ddr5-and-ecc-reporting.42559/#post-470425


>> diff --git a/drivers/edac/ie31200_edac.c b/drivers/edac/ie31200_edac.c index
>> a53612be4b2f..2078c12bbed2 100644
>> --- a/drivers/edac/ie31200_edac.c
>> +++ b/drivers/edac/ie31200_edac.c
>> @@ -94,6 +94,8 @@
>> 
>>  /* Alder Lake-S */
>>  #define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_1	0x4660
>> +#define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_2	0x4668
>> +#define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_3	0x4648
>> 
>
> I didn't find the place in your spec above that indicates these
> two CPUs with these two DIDs have Out-Of-Band ECC capabilities.
> Could you point it out to me?

This Intel CPU page[1] lists ECC memory support and the same on the Intel W680 chipset page[2]. The datasheet was used to confirm the DIDs[3] were valid.

[1] https://www.intel.com/content/www/us/en/products/sku/134589/intel-core-i512600k-processor-20m-cache-up-to-4-90-ghz/specifications.html
[2] https://www.intel.com/content/www/us/en/products/sku/218834/intel-w680-chipset/specifications.html
[3] https://edc.intel.com/content/www/us/en/design/ipla/software-development-platforms/client/platforms/alder-lake-desktop/12th-generation-intel-core-processors-datasheet-volume-1-of-2/011/device-ids/

Given that you added the i9-12900k (0x4660) in 180f091224a00 and I've personally verified the i5-12600k (0x4648) is working (see dmesg logs above), I've added the i7-12700k (0x4668) to assist future users.

Thanks!
- Kyle

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 1/1] EDAC/ie31200: Add two more Intel Alder Lake-S SoCs for EDAC support
  2025-07-25  2:23   ` Kyle Manna
@ 2025-08-01 14:52     ` Kyle Manna
  2025-08-01 15:57       ` Zhuo, Qiuxu
  2025-08-01 15:50     ` Zhuo, Qiuxu
  1 sibling, 1 reply; 6+ messages in thread
From: Kyle Manna @ 2025-08-01 14:52 UTC (permalink / raw)
  To: Qiuxu Zhuo, Tony Luck, Borislav Petkov, Jason Baron
  Cc: James Jernigan, James Morse, Mauro Carvalho Chehab,
	Robert Richter, Yi1 Lai, linux-edac@vger.kernel.org,
	linux-kernel@vger.kernel.org

On Thu, Jul 24, 2025, at 19:23, Kyle Manna wrote:
> Hi Qiuxu,
>
> On Thu, Jul 24, 2025, at 07:31, Zhuo, Qiuxu wrote:
>> Do you have access to these machines to load the ie31200_edac
>> driver with your patch? If yes, would you take dmesg logs?
>
> I have access to a i5-12600K, here are the logs that I observed:
>
> $ dmesg | rg -i -e edac -e ecc -e ie31200 | rg -v systemd | rg edac
> [   14.379905] caller ie31200_init_one+0x1b5/0x480 [ie31200_edac] 
> mapping multiple BARs
> [   14.382709] EDAC MC0: Giving out device to module ie31200_edac 
> controller IE31200: DEV 0000:00:00.0 (INTERRUPT)
> [   14.383042] EDAC MC1: Giving out device to module ie31200_edac 
> controller IE31200_1: DEV 0000:00:00.0 (INTERRUPT)
>
> I posted additional logs from sysfs and "ras-mc-ctl" here[0] after I 
> learned that support was added for related processors as well as 
> discussion with other users trying to get W680 + ECC working.
>
> [0] 
> https://forums.servethehome.com/index.php?threads/intel-w680-ddr5-and-ecc-reporting.42559/#post-470425
>
>
>>> diff --git a/drivers/edac/ie31200_edac.c b/drivers/edac/ie31200_edac.c index
>>> a53612be4b2f..2078c12bbed2 100644
>>> --- a/drivers/edac/ie31200_edac.c
>>> +++ b/drivers/edac/ie31200_edac.c
>>> @@ -94,6 +94,8 @@
>>> 
>>>  /* Alder Lake-S */
>>>  #define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_1	0x4660
>>> +#define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_2	0x4668
>>> +#define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_3	0x4648
>>> 
>>
>> I didn't find the place in your spec above that indicates these
>> two CPUs with these two DIDs have Out-Of-Band ECC capabilities.
>> Could you point it out to me?
>
> This Intel CPU page[1] lists ECC memory support and the same on the 
> Intel W680 chipset page[2]. The datasheet was used to confirm the 
> DIDs[3] were valid.
>
> [1] 
> https://www.intel.com/content/www/us/en/products/sku/134589/intel-core-i512600k-processor-20m-cache-up-to-4-90-ghz/specifications.html
> [2] 
> https://www.intel.com/content/www/us/en/products/sku/218834/intel-w680-chipset/specifications.html
> [3] 
> https://edc.intel.com/content/www/us/en/design/ipla/software-development-platforms/client/platforms/alder-lake-desktop/12th-generation-intel-core-processors-datasheet-volume-1-of-2/011/device-ids/
>
> Given that you added the i9-12900k (0x4660) in 180f091224a00 and I've 
> personally verified the i5-12600k (0x4648) is working (see dmesg logs 
> above), I've added the i7-12700k (0x4668) to assist future users.

Hi Qiuxu and Borislav,

I saw a pull request[0] for a 14th gen version of the same chips and would love to get these 12th gen chips included as well.

Anything I can do to help this along?

[0] https://lore.kernel.org/lkml/20250728141521.GAaIeF-XYJVbfOQdT6@fat_crate.local/

Thanks!
 - Kyle

^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: [PATCH 1/1] EDAC/ie31200: Add two more Intel Alder Lake-S SoCs for EDAC support
  2025-07-25  2:23   ` Kyle Manna
  2025-08-01 14:52     ` Kyle Manna
@ 2025-08-01 15:50     ` Zhuo, Qiuxu
  1 sibling, 0 replies; 6+ messages in thread
From: Zhuo, Qiuxu @ 2025-08-01 15:50 UTC (permalink / raw)
  To: Kyle Manna, Luck, Tony, Borislav Petkov, Jason Baron
  Cc: James Jernigan, James Morse, Mauro Carvalho Chehab,
	Robert Richter, Lai, Yi1, linux-edac@vger.kernel.org,
	linux-kernel@vger.kernel.org

Hi Kyle,

> From: Kyle Manna <kyle@kylemanna.com>
>> [...] 
> Hi Qiuxu,
> 
> On Thu, Jul 24, 2025, at 07:31, Zhuo, Qiuxu wrote:
> > Do you have access to these machines to load the ie31200_edac driver
> > with your patch? If yes, would you take dmesg logs?
> 
> I have access to a i5-12600K, here are the logs that I observed:
> 
> $ dmesg | rg -i -e edac -e ecc -e ie31200 | rg -v systemd | rg edac
> [   14.379905] caller ie31200_init_one+0x1b5/0x480 [ie31200_edac] mapping
> multiple BARs
> [   14.382709] EDAC MC0: Giving out device to module ie31200_edac
> controller IE31200: DEV 0000:00:00.0 (INTERRUPT)
> [   14.383042] EDAC MC1: Giving out device to module ie31200_edac
> controller IE31200_1: DEV 0000:00:00.0 (INTERRUPT)
> 
> I posted additional logs from sysfs and "ras-mc-ctl" here[0] after I learned that
> support was added for related processors as well as discussion with other
> users trying to get W680 + ECC working.
> 
> [0] https://forums.servethehome.com/index.php?threads/intel-w680-ddr5-
> and-ecc-reporting.42559/#post-470425

Thanks for the logs. 
Successfully loading the driver indicated the i5-12600K is ECC capable. 
 
> 
> >> diff --git a/drivers/edac/ie31200_edac.c
> >> b/drivers/edac/ie31200_edac.c index
> >> a53612be4b2f..2078c12bbed2 100644
> >> --- a/drivers/edac/ie31200_edac.c
> >> +++ b/drivers/edac/ie31200_edac.c
> >> @@ -94,6 +94,8 @@
> >>
> >>  /* Alder Lake-S */
> >>  #define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_1	0x4660
> >> +#define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_2	0x4668

Add a small comment, please.

+#define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_2	0x4668 /* 6P+6E, e.g. i7-12700K */

> >> +#define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_3	0x4648

Ditto.
+#define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_3	0x4648 /* 6P+4E, e.g. i5-12600K */

> >>
> >
> > I didn't find the place in your spec above that indicates these two
> > CPUs with these two DIDs have Out-Of-Band ECC capabilities.
> > Could you point it out to me?
> 
> This Intel CPU page[1] lists ECC memory support and the same on the Intel
> W680 chipset page[2]. The datasheet was used to confirm the DIDs[3] were
> valid.
> 
> [1] https://www.intel.com/content/www/us/en/products/sku/134589/intel-
> core-i512600k-processor-20m-cache-up-to-4-90-ghz/specifications.html
> [2] https://www.intel.com/content/www/us/en/products/sku/218834/intel-
> w680-chipset/specifications.html
> [3] https://edc.intel.com/content/www/us/en/design/ipla/software-
> development-platforms/client/platforms/alder-lake-desktop/12th-generation-
> intel-core-processors-datasheet-volume-1-of-2/011/device-ids/
> 
> Given that you added the i9-12900k (0x4660) in 180f091224a00 and I've
> personally verified the i5-12600k (0x4648) is working (see dmesg logs above),
> I've added the i7-12700k (0x4668) to assist future users.

Thanks for the detailed specs and your verification.
Please add the comments after the new DIDs as mentioned above, other than that LGTM

    Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> 

^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: [PATCH 1/1] EDAC/ie31200: Add two more Intel Alder Lake-S SoCs for EDAC support
  2025-08-01 14:52     ` Kyle Manna
@ 2025-08-01 15:57       ` Zhuo, Qiuxu
  0 siblings, 0 replies; 6+ messages in thread
From: Zhuo, Qiuxu @ 2025-08-01 15:57 UTC (permalink / raw)
  To: Kyle Manna, Luck, Tony, Borislav Petkov, Jason Baron
  Cc: James Jernigan, James Morse, Mauro Carvalho Chehab,
	Robert Richter, Lai, Yi1, linux-edac@vger.kernel.org,
	linux-kernel@vger.kernel.org

Hi Kyle,

> From: Kyle Manna <kyle@kylemanna.com>
[...]
> I've added the i7-12700k (0x4668) to assist future users.
> 
> Hi Qiuxu and Borislav,
> 
> I saw a pull request[0] for a 14th gen version of the same chips and would
> love to get these 12th gen chips included as well.
> 
> Anything I can do to help this along?
> 
> [0] https://lore.kernel.org/lkml/20250728141521.GAaIeF-
> XYJVbfOQdT6@fat_crate.local/

I've replied to you in your last e-mail with minor comments and provided my "Reviewed-by" tag. 
Thanks for your detailed specs and verifications. 

-Qiuxu

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2025-08-01 15:57 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-07-24  6:44 [PATCH 1/1] EDAC/ie31200: Add two more Intel Alder Lake-S SoCs for EDAC support Kyle Manna
2025-07-24 14:31 ` Zhuo, Qiuxu
2025-07-25  2:23   ` Kyle Manna
2025-08-01 14:52     ` Kyle Manna
2025-08-01 15:57       ` Zhuo, Qiuxu
2025-08-01 15:50     ` Zhuo, Qiuxu

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