[PATCH v2] EDAC/amd64: Add support for family 19h, models 40h-4fh

[PATCH v2] EDAC/amd64: Add support for family 19h, models 40h-4fh

[Devang Vyas]

Enable AMD EDAC driver for AMD SoC family 19h with
models 40h-4fh to support Ryzen 6000 CPUs/APUs
("Rembrandt"), which provides kernel-level
infrastructure needed for RAS (Reliability, Availability
and Serviceability) features.

Added changes enhance the ability to detect and
report memory errors on systems that utilize AMD SoCs
from the specified family. There are 4 memory controllers
supported by Rembrandt which enables proper error reporting
and RAS testing on specified AMD SoCs.

AMD EDAC linux driver interfaces directly with the hardware-
error reporting mechanism present in AMD platform, otherwise
these errors would not be surfaced through the standard Linux
EDAC framework and RAS validation workflows would be
incomplete.

Co-developed-by: Ramesh Garidapuri <ramesh.garidapuri@amd.com>
Signed-off-by: Ramesh Garidapuri <ramesh.garidapuri@amd.com>
Signed-off-by: Devang Vyas <devangnayanbhai.vyas@amd.com>
---

Changes since v1:
- Addressed review comment related to commit message which
  adds detailed information on why AMD EDAC driver is essential
  to load on AMD SoC.

 drivers/edac/amd64_edac.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 2391f3469961..6cf0b6d7b5ec 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -3863,6 +3863,9 @@ static int per_family_init(struct amd64_pvt *pvt)
 				pvt->max_mcs		= 8;
 			}
 			break;
+		case 0x40 ... 0x4f:
+			pvt->max_mcs			= 4;
+			break;
 		case 0x60 ... 0x6f:
 			pvt->flags.zn_regs_v2		= 1;
 			break;
-- 
2.25.1

Re: [PATCH v2] EDAC/amd64: Add support for family 19h, models 40h-4fh

[Borislav Petkov]

On Sun, Nov 30, 2025 at 03:51:11PM +0530, Devang Vyas wrote:
> Enable AMD EDAC driver for AMD SoC family 19h with
> models 40h-4fh to support Ryzen 6000 CPUs/APUs
> ("Rembrandt"), which provides kernel-level
> infrastructure needed for RAS (Reliability, Availability
> and Serviceability) features.
> 
> Added changes enhance the ability to detect and
> report memory errors on systems that utilize AMD SoCs
> from the specified family. There are 4 memory controllers
> supported by Rembrandt which enables proper error reporting
> and RAS testing on specified AMD SoCs.
> 
> AMD EDAC linux driver interfaces directly with the hardware-
> error reporting mechanism present in AMD platform, otherwise
> these errors would not be surfaced through the standard Linux
> EDAC framework and RAS validation workflows would be
> incomplete.

Nope, this is reads like AI slop and too generic.

Lemme try again: we do not enable amd64_edac on client hw - only server. Why
does *this* *client* deserve an exception?

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette