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* [PATCH v3] EDAC/versalnet: Report PFN and page offset for DDR errors
@ 2026-05-11 10:35 Shubhrajyoti Datta
  2026-05-14 11:34 ` Borislav Petkov
  0 siblings, 1 reply; 2+ messages in thread
From: Shubhrajyoti Datta @ 2026-05-11 10:35 UTC (permalink / raw)
  To: linux-kernel, linux-edac
  Cc: git, shubhrajyoti.datta, Borislav Petkov, Tony Luck,
	Sai Krishna Potthuri, Shubhrajyoti Datta

Populate the EDAC location fields when reporting DDRMC CE/UE events.

Compute the physical address from the decoded error info and pass the
PFN along with the offset-within-page to edac_mc_handle_error(). This
allows user space (mc_event consumers) to correlate memory errors with
a real address.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
---

Changes in v3:
Update the comment for DDR address

Changes in v2:
Refactor the common code

 drivers/edac/versalnet_edac.c | 36 +++++++++++++++++------------------
 1 file changed, 17 insertions(+), 19 deletions(-)

diff --git a/drivers/edac/versalnet_edac.c b/drivers/edac/versalnet_edac.c
index ec1315582414..7a10c53c4768 100644
--- a/drivers/edac/versalnet_edac.c
+++ b/drivers/edac/versalnet_edac.c
@@ -265,7 +265,7 @@ static bool get_ddr_info(u32 *error_data, struct mc_priv *priv)
  * @controller:	Controller number of the MC5
  * @error_data:	the DDRMC5 ADEC address decoder register data
  *
- * Return: physical address of the DDR memory.
+ * Returns the system physical address corresponding to the reported DDR
  */
 static unsigned long convert_to_physical(struct mc_priv *priv,
 					 union ecc_error_info pinf,
@@ -429,6 +429,7 @@ static unsigned long convert_to_physical(struct mc_priv *priv,
 static void handle_error(struct mc_priv  *priv, struct ecc_status *stat,
 			 int ctl_num, int *error_data)
 {
+	enum hw_event_mc_err_type type;
 	union ecc_error_info pinf;
 	struct mem_ctl_info *mci;
 	unsigned long pa;
@@ -440,29 +441,26 @@ static void handle_error(struct mc_priv  *priv, struct ecc_status *stat,
 
 	mci = priv->mci[ctl_num];
 
-	if (stat->error_type == MC5_ERR_TYPE_CE) {
+	if (stat->error_type == MC5_ERR_TYPE_UE) {
+		pinf = stat->ueinfo[stat->channel];
+		type = HW_EVENT_ERR_UNCORRECTED;
+	} else {
 		pinf = stat->ceinfo[stat->channel];
-		snprintf(priv->message, sizeof(priv->message),
-			 "Error type:%s Controller %d Addr at %lx\n",
-			 "CE", ctl_num, convert_to_physical(priv, pinf, ctl_num, error_data));
-
-		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
-				     1, 0, 0, 0, 0, 0, -1,
-				     priv->message, "");
+		type = HW_EVENT_ERR_CORRECTED;
 	}
 
-	if (stat->error_type == MC5_ERR_TYPE_UE) {
-		pinf = stat->ueinfo[stat->channel];
-		snprintf(priv->message, sizeof(priv->message),
-			 "Error type:%s controller %d Addr at %lx\n",
-			 "UE", ctl_num, convert_to_physical(priv, pinf, ctl_num, error_data));
+	pa = convert_to_physical(priv, pinf, ctl_num, error_data);
+	pfn = PHYS_PFN(pa);
+	snprintf(priv->message, sizeof(priv->message),
+		 "Error type:%s Controller %d Addr at %lx\n",
+		 type == HW_EVENT_ERR_UNCORRECTED ? "UE" : "CE",
+		 ctl_num, pa);
 
-		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
-				     1, 0, 0, 0, 0, 0, -1,
-				     priv->message, "");
-		pa = convert_to_physical(priv, pinf, ctl_num, error_data);
-		pfn = PHYS_PFN(pa);
+	edac_mc_handle_error(type, mci,
+			     1, pfn, offset_in_page(pa), 0, 0, 0, -1,
+			     priv->message, "");
 
+	if (stat->error_type == MC5_ERR_TYPE_UE) {
 		if (IS_ENABLED(CONFIG_MEMORY_FAILURE)) {
 			err = memory_failure(pfn, MF_ACTION_REQUIRED);
 			if (err)
-- 
2.49.1


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH v3] EDAC/versalnet: Report PFN and page offset for DDR errors
  2026-05-11 10:35 [PATCH v3] EDAC/versalnet: Report PFN and page offset for DDR errors Shubhrajyoti Datta
@ 2026-05-14 11:34 ` Borislav Petkov
  0 siblings, 0 replies; 2+ messages in thread
From: Borislav Petkov @ 2026-05-14 11:34 UTC (permalink / raw)
  To: Shubhrajyoti Datta
  Cc: linux-kernel, linux-edac, git, shubhrajyoti.datta, Tony Luck,
	Sai Krishna Potthuri

On Mon, May 11, 2026 at 04:05:09PM +0530, Shubhrajyoti Datta wrote:
> Populate the EDAC location fields when reporting DDRMC CE/UE events.
> 
> Compute the physical address from the decoded error info and pass the
> PFN along with the offset-within-page to edac_mc_handle_error(). This
> allows user space (mc_event consumers) to correlate memory errors with
> a real address.
> 
> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
> Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
> ---
> 
> Changes in v3:
> Update the comment for DDR address
> 
> Changes in v2:
> Refactor the common code
> 
>  drivers/edac/versalnet_edac.c | 36 +++++++++++++++++------------------
>  1 file changed, 17 insertions(+), 19 deletions(-)

https://sashiko.dev/#/patchset/20260511103529.1853270-1-shubhrajyoti.datta%40amd.com

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

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