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From: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
To: Tony Luck <tony.luck@intel.com>, Borislav Petkov <bp@alien8.de>
Cc: Qiuxu Zhuo <qiuxu.zhuo@intel.com>, Yi Lai <yi1.lai@intel.com>,
	linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 3/8] EDAC/{skx_common,i10nm}: Rename rrl_mode to rrl_source_type
Date: Thu, 21 May 2026 15:31:07 +0800	[thread overview]
Message-ID: <20260521073112.3881223-4-qiuxu.zhuo@intel.com> (raw)
In-Reply-To: <20260521073112.3881223-1-qiuxu.zhuo@intel.com>

The RRL (Retry Read error Log) values describe where an error was logged
from (first/last read and scrub/demand), not an operating mode.

Rename rrl_mode to rrl_source_type and "modes" to "sources" to better
reflect their meaning and improve code readability.

No functional changes intended.

Tested-by: Yi Lai <yi1.lai@intel.com>
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
---
 drivers/edac/i10nm_base.c | 18 +++++++++---------
 drivers/edac/skx_common.h | 14 +++++++-------
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/drivers/edac/i10nm_base.c b/drivers/edac/i10nm_base.c
index c09790d5b95e..01cc86f697c8 100644
--- a/drivers/edac/i10nm_base.c
+++ b/drivers/edac/i10nm_base.c
@@ -78,7 +78,7 @@ static bool no_adxl;
 static struct reg_rrl icx_reg_rrl_ddr = {
 	.set_num = 2,
 	.reg_num = 6,
-	.modes = {LRE_SCRUB, LRE_DEMAND},
+	.sources = {RRL_SRC_LRE_SCRUB, RRL_SRC_LRE_DEMAND},
 	.offsets = {
 		{0x22c60, 0x22c54, 0x22c5c, 0x22c58, 0x22c28, 0x20ed8},
 		{0x22e54, 0x22e60, 0x22e64, 0x22e58, 0x22e5c, 0x20ee0},
@@ -99,7 +99,7 @@ static struct reg_rrl icx_reg_rrl_ddr = {
 static struct reg_rrl spr_reg_rrl_ddr = {
 	.set_num = 3,
 	.reg_num = 6,
-	.modes = {LRE_SCRUB, LRE_DEMAND, FRE_DEMAND},
+	.sources = {RRL_SRC_LRE_SCRUB, RRL_SRC_LRE_DEMAND, RRL_SRC_FRE_DEMAND},
 	.offsets = {
 		{0x22c60, 0x22c54, 0x22f08, 0x22c58, 0x22c28, 0x20ed8},
 		{0x22e54, 0x22e60, 0x22f10, 0x22e58, 0x22e5c, 0x20ee0},
@@ -121,7 +121,7 @@ static struct reg_rrl spr_reg_rrl_ddr = {
 static struct reg_rrl spr_reg_rrl_hbm_pch0 = {
 	.set_num = 2,
 	.reg_num = 6,
-	.modes = {LRE_SCRUB, LRE_DEMAND},
+	.sources = {RRL_SRC_LRE_SCRUB, RRL_SRC_LRE_DEMAND},
 	.offsets = {
 		{0x2860, 0x2854, 0x2b08, 0x2858, 0x2828, 0x0ed8},
 		{0x2a54, 0x2a60, 0x2b10, 0x2a58, 0x2a5c, 0x0ee0},
@@ -142,7 +142,7 @@ static struct reg_rrl spr_reg_rrl_hbm_pch0 = {
 static struct reg_rrl spr_reg_rrl_hbm_pch1 = {
 	.set_num = 2,
 	.reg_num = 6,
-	.modes = {LRE_SCRUB, LRE_DEMAND},
+	.sources = {RRL_SRC_LRE_SCRUB, RRL_SRC_LRE_DEMAND},
 	.offsets = {
 		{0x2c60, 0x2c54, 0x2f08, 0x2c58, 0x2c28, 0x0fa8},
 		{0x2e54, 0x2e60, 0x2f10, 0x2e58, 0x2e5c, 0x0fb0},
@@ -163,7 +163,7 @@ static struct reg_rrl spr_reg_rrl_hbm_pch1 = {
 static struct reg_rrl gnr_reg_rrl_ddr = {
 	.set_num = 4,
 	.reg_num = 6,
-	.modes = {FRE_SCRUB, FRE_DEMAND, LRE_SCRUB, LRE_DEMAND},
+	.sources = {RRL_SRC_FRE_SCRUB, RRL_SRC_FRE_DEMAND, RRL_SRC_LRE_SCRUB, RRL_SRC_LRE_DEMAND},
 	.offsets = {
 		{0x2f10, 0x2f20, 0x2f30, 0x2f50, 0x2f60, 0xba0},
 		{0x2f14, 0x2f24, 0x2f38, 0x2f54, 0x2f64, 0xba8},
@@ -186,15 +186,15 @@ static struct reg_rrl gnr_reg_rrl_ddr = {
 static void enable_rrl(struct skx_imc *imc, int chan, struct reg_rrl *rrl,
 		       int rrl_set, bool enable, u32 *rrl_ctl)
 {
-	enum rrl_mode mode = rrl->modes[rrl_set];
+	enum rrl_source_type source = rrl->sources[rrl_set];
 	u32 offset = rrl->offsets[rrl_set][0], v;
 	u8 width = rrl->widths[0];
 	bool first, scrub;
 
 	/* First or last read error. */
-	first = (mode == FRE_SCRUB || mode == FRE_DEMAND);
+	first = (source == RRL_SRC_FRE_SCRUB || source == RRL_SRC_FRE_DEMAND);
 	/* Patrol scrub or on-demand read error. */
-	scrub = (mode == FRE_SCRUB || mode == LRE_SCRUB);
+	scrub = (source == RRL_SRC_FRE_SCRUB || source == RRL_SRC_LRE_SCRUB);
 
 	v = skx_read_imc_reg(imc, chan, offset, width);
 
@@ -318,7 +318,7 @@ static void show_retry_rd_err_log(struct decoded_addr *res, char *msg,
 
 	n = scnprintf(msg, len, " retry_rd_err_log[");
 	for (i = 0; i < rrl->set_num; i++) {
-		scrub = (rrl->modes[i] == FRE_SCRUB || rrl->modes[i] == LRE_SCRUB);
+		scrub = (rrl->sources[i] == RRL_SRC_FRE_SCRUB || rrl->sources[i] == RRL_SRC_LRE_SCRUB);
 		if (scrub_err != scrub)
 			continue;
 
diff --git a/drivers/edac/skx_common.h b/drivers/edac/skx_common.h
index 5a08f219e46d..f7f016db122f 100644
--- a/drivers/edac/skx_common.h
+++ b/drivers/edac/skx_common.h
@@ -81,23 +81,23 @@
 /* Max correctable error count registers. */
 #define NUM_CECNT_REG		8
 
-/* Modes of RRL register set. */
-enum rrl_mode {
+/* Error source from which the RRL registers log errors. */
+enum rrl_source_type {
 	/* Last read error from patrol scrub. */
-	LRE_SCRUB,
+	RRL_SRC_LRE_SCRUB,
 	/* Last read error from demand. */
-	LRE_DEMAND,
+	RRL_SRC_LRE_DEMAND,
 	/* First read error from patrol scrub. */
-	FRE_SCRUB,
+	RRL_SRC_FRE_SCRUB,
 	/* First read error from demand. */
-	FRE_DEMAND,
+	RRL_SRC_FRE_DEMAND,
 };
 
 /* RRL registers per {,sub-,pseudo-}channel. */
 struct reg_rrl {
 	/* RRL register parts. */
 	int set_num, reg_num;
-	enum rrl_mode modes[NUM_RRL_SET];
+	enum rrl_source_type sources[NUM_RRL_SET];
 	u32 offsets[NUM_RRL_SET][NUM_RRL_REG];
 	/* RRL register widths in byte per set. */
 	u8 widths[NUM_RRL_REG];
-- 
2.43.0


  parent reply	other threads:[~2026-05-21  7:39 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-21  7:31 [PATCH 0/8] EDAC: Add RRL support for Intel Diamond Rapids servers Qiuxu Zhuo
2026-05-21  7:31 ` [PATCH 1/8] EDAC/{skx_common,i10nm,imh}: Move MC register access helpers to skx_common Qiuxu Zhuo
2026-06-15  2:26   ` Borislav Petkov
2026-06-16  2:02     ` Zhuo, Qiuxu
2026-05-21  7:31 ` [PATCH 2/8] EDAC/{skx_common,skx,i10nm}: Split skx_set_decode() Qiuxu Zhuo
2026-05-21  7:31 ` Qiuxu Zhuo [this message]
2026-05-21  7:31 ` [PATCH 4/8] EDAC/{skx_common,i10nm}: Introduce rrl_ctrl_mode Qiuxu Zhuo
2026-05-21  7:31 ` [PATCH 5/8] EDAC/{skx_common,i10nm}: Move RRL handling to common code Qiuxu Zhuo
2026-05-21  7:31 ` [PATCH 6/8] EDAC/skx_common: Add SubChannel support to ADXL decode Qiuxu Zhuo
2026-05-21  7:31 ` [PATCH 7/8] EDAC/{skx_common,i10nm}: Prepare RRL for sub-channel granularity Qiuxu Zhuo
2026-05-21  7:31 ` [PATCH 8/8] EDAC/imh: Add RRL support for Intel Diamond Rapids server Qiuxu Zhuo
2026-05-27 16:18 ` [PATCH 0/8] EDAC: Add RRL support for Intel Diamond Rapids servers Luck, Tony

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