* [PATCH 4/4] fbdev: sh_mobile_hdmi: add HDMI Control Register support
From: Kuninori Morimoto @ 2012-05-08 4:08 UTC (permalink / raw)
To: linux-fbdev
Latest SuperH HDMI uses not only HDMI Core Register (HTOP0)
but also HDMI Control Register (HTOP1).
This patch adds HDMI Control Register support.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
drivers/video/sh_mobile_hdmi.c | 152 +++++++++++++++++++++++++++++++++++++++-
include/video/sh_mobile_hdmi.h | 1 +
2 files changed, 152 insertions(+), 1 deletions(-)
diff --git a/drivers/video/sh_mobile_hdmi.c b/drivers/video/sh_mobile_hdmi.c
index 4d48a80..930e550 100644
--- a/drivers/video/sh_mobile_hdmi.c
+++ b/drivers/video/sh_mobile_hdmi.c
@@ -31,6 +31,7 @@
#include "sh_mobile_lcdcfb.h"
+/* HDMI Core Control Register (HTOP0) */
#define HDMI_SYSTEM_CTRL 0x00 /* System control */
#define HDMI_L_R_DATA_SWAP_CTRL_RPKT 0x01 /* L/R data swap control,
bits 19..16 of 20-bit N for Audio Clock Regeneration packet */
@@ -201,6 +202,68 @@
#define HDMI_REVISION_ID 0xF1 /* Revision ID */
#define HDMI_TEST_MODE 0xFE /* Test mode */
+/* HDMI Control Register (HTOP1) */
+#define HDMI_HTOP1_TEST_MODE 0x0000 /* Test mode */
+#define HDMI_HTOP1_VIDEO_INPUT 0x0008 /* VideoInput */
+#define HDMI_HTOP1_CORE_RSTN 0x000C /* CoreResetn */
+#define HDMI_HTOP1_PLLBW 0x0018 /* PLLBW */
+#define HDMI_HTOP1_CLK_TO_PHY 0x001C /* Clk to Phy */
+#define HDMI_HTOP1_VIDEO_INPUT2 0x0020 /* VideoInput2 */
+#define HDMI_HTOP1_TISEMP0_1 0x0024 /* tisemp0-1 */
+#define HDMI_HTOP1_TISEMP2_C 0x0028 /* tisemp2-c */
+#define HDMI_HTOP1_TISIDRV 0x002C /* tisidrv */
+#define HDMI_HTOP1_TISEN 0x0034 /* tisen */
+#define HDMI_HTOP1_TISDREN 0x0038 /* tisdren */
+#define HDMI_HTOP1_CISRANGE 0x003C /* cisrange */
+#define HDMI_HTOP1_ENABLE_SELECTOR 0x0040 /* Enable Selector */
+#define HDMI_HTOP1_MACRO_RESET 0x0044 /* Macro reset */
+#define HDMI_HTOP1_PLL_CALIBRATION 0x0048 /* PLL calibration */
+#define HDMI_HTOP1_RE_CALIBRATION 0x004C /* Re-calibration */
+#define HDMI_HTOP1_CURRENT 0x0050 /* Current */
+#define HDMI_HTOP1_PLL_LOCK_DETECT 0x0054 /* PLL lock detect */
+#define HDMI_HTOP1_PHY_TEST_MODE 0x0058 /* PHY Test Mode */
+#define HDMI_HTOP1_CLK_SET 0x0080 /* Clock Set */
+#define HDMI_HTOP1_DDC_FAIL_SAFE 0x0084 /* DDC fail safe */
+#define HDMI_HTOP1_PRBS 0x0088 /* PRBS */
+#define HDMI_HTOP1_EDID_AINC_CONTROL 0x008C /* EDID ainc Control */
+#define HDMI_HTOP1_HTOP_DCL_MODE 0x00FC /* Deep Coloer Mode */
+#define HDMI_HTOP1_HTOP_DCL_FRC_COEF0 0x0100 /* Deep Color:FRC COEF0 */
+#define HDMI_HTOP1_HTOP_DCL_FRC_COEF1 0x0104 /* Deep Color:FRC COEF1 */
+#define HDMI_HTOP1_HTOP_DCL_FRC_COEF2 0x0108 /* Deep Color:FRC COEF2 */
+#define HDMI_HTOP1_HTOP_DCL_FRC_COEF3 0x010C /* Deep Color:FRC COEF3 */
+#define HDMI_HTOP1_HTOP_DCL_FRC_COEF0_C 0x0110 /* Deep Color:FRC COEF0C */
+#define HDMI_HTOP1_HTOP_DCL_FRC_COEF1_C 0x0114 /* Deep Color:FRC COEF1C */
+#define HDMI_HTOP1_HTOP_DCL_FRC_COEF2_C 0x0118 /* Deep Color:FRC COEF2C */
+#define HDMI_HTOP1_HTOP_DCL_FRC_COEF3_C 0x011C /* Deep Color:FRC COEF3C */
+#define HDMI_HTOP1_HTOP_DCL_FRC_MODE 0x0120 /* Deep Color:FRC Mode */
+#define HDMI_HTOP1_HTOP_DCL_RECT_START1 0x0124 /* Deep Color:Rect Start1 */
+#define HDMI_HTOP1_HTOP_DCL_RECT_SIZE1 0x0128 /* Deep Color:Rect Size1 */
+#define HDMI_HTOP1_HTOP_DCL_RECT_START2 0x012C /* Deep Color:Rect Start2 */
+#define HDMI_HTOP1_HTOP_DCL_RECT_SIZE2 0x0130 /* Deep Color:Rect Size2 */
+#define HDMI_HTOP1_HTOP_DCL_RECT_START3 0x0134 /* Deep Color:Rect Start3 */
+#define HDMI_HTOP1_HTOP_DCL_RECT_SIZE3 0x0138 /* Deep Color:Rect Size3 */
+#define HDMI_HTOP1_HTOP_DCL_RECT_START4 0x013C /* Deep Color:Rect Start4 */
+#define HDMI_HTOP1_HTOP_DCL_RECT_SIZE4 0x0140 /* Deep Color:Rect Size4 */
+#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y1_1 0x0144 /* Deep Color:Fil Para Y1_1 */
+#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y1_2 0x0148 /* Deep Color:Fil Para Y1_2 */
+#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB1_1 0x014C /* Deep Color:Fil Para CB1_1 */
+#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB1_2 0x0150 /* Deep Color:Fil Para CB1_2 */
+#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR1_1 0x0154 /* Deep Color:Fil Para CR1_1 */
+#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR1_2 0x0158 /* Deep Color:Fil Para CR1_2 */
+#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y2_1 0x015C /* Deep Color:Fil Para Y2_1 */
+#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y2_2 0x0160 /* Deep Color:Fil Para Y2_2 */
+#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB2_1 0x0164 /* Deep Color:Fil Para CB2_1 */
+#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB2_2 0x0168 /* Deep Color:Fil Para CB2_2 */
+#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR2_1 0x016C /* Deep Color:Fil Para CR2_1 */
+#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR2_2 0x0170 /* Deep Color:Fil Para CR2_2 */
+#define HDMI_HTOP1_HTOP_DCL_COR_PARA_Y1 0x0174 /* Deep Color:Cor Para Y1 */
+#define HDMI_HTOP1_HTOP_DCL_COR_PARA_CB1 0x0178 /* Deep Color:Cor Para CB1 */
+#define HDMI_HTOP1_HTOP_DCL_COR_PARA_CR1 0x017C /* Deep Color:Cor Para CR1 */
+#define HDMI_HTOP1_HTOP_DCL_COR_PARA_Y2 0x0180 /* Deep Color:Cor Para Y2 */
+#define HDMI_HTOP1_HTOP_DCL_COR_PARA_CB2 0x0184 /* Deep Color:Cor Para CB2 */
+#define HDMI_HTOP1_HTOP_DCL_COR_PARA_CR2 0x0188 /* Deep Color:Cor Para CR2 */
+#define HDMI_HTOP1_EDID_DATA_READ 0x0200 /* EDID Data Read 128Byte:0x03FC */
+
enum hotplug_state {
HDMI_HOTPLUG_DISCONNECTED,
HDMI_HOTPLUG_CONNECTED,
@@ -211,6 +274,7 @@ struct sh_hdmi {
struct sh_mobile_lcdc_entity entity;
void __iomem *base;
+ void __iomem *htop1;
enum hotplug_state hp_state; /* hot-plug status */
u8 preprogrammed_vic; /* use a pre-programmed VIC or
the external mode */
@@ -271,6 +335,17 @@ static void hdmi_bit_set(struct sh_hdmi *hdmi, u8 mask, u8 data, u8 reg)
hdmi_write(hdmi, val, reg);
}
+static void hdmi_htop1_write(struct sh_hdmi *hdmi, u32 data, u32 reg)
+{
+ iowrite32(data, hdmi->htop1 + reg);
+ udelay(100);
+}
+
+static u32 hdmi_htop1_read(struct sh_hdmi *hdmi, u32 reg)
+{
+ return ioread32(hdmi->htop1 + reg);
+}
+
/*
* HDMI sound
*/
@@ -781,7 +856,9 @@ static int sh_hdmi_read_edid(struct sh_hdmi *hdmi, unsigned long *hdmi_rate,
/* Read EDID */
dev_dbg(hdmi->dev, "Read back EDID code:");
for (i = 0; i < 128; i++) {
- edid[i] = hdmi_read(hdmi, HDMI_EDID_KSV_FIFO_ACCESS_WINDOW);
+ edid[i] = (hdmi->htop1) ?
+ (u8)hdmi_htop1_read(hdmi, HDMI_HTOP1_EDID_DATA_READ + (i * 4)) :
+ hdmi_read(hdmi, HDMI_EDID_KSV_FIFO_ACCESS_WINDOW);
#ifdef DEBUG
if ((i % 16) = 0) {
printk(KERN_CONT "\n");
@@ -1145,10 +1222,58 @@ out:
dev_dbg(hdmi->dev, "%s(%p): end\n", __func__, hdmi);
}
+static void sh_hdmi_htop1_init(struct sh_hdmi *hdmi)
+{
+ hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_MODE);
+ hdmi_htop1_write(hdmi, 0x0000000b, 0x0010);
+ hdmi_htop1_write(hdmi, 0x00006710, HDMI_HTOP1_HTOP_DCL_FRC_MODE);
+ hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y1_1);
+ hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y1_2);
+ hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB1_1);
+ hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB1_2);
+ hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR1_1);
+ hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR1_2);
+ hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y2_1);
+ hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y2_2);
+ hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB2_1);
+ hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB2_2);
+ hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR2_1);
+ hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR2_2);
+ hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_Y1);
+ hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_CB1);
+ hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_CR1);
+ hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_Y2);
+ hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_CB2);
+ hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_CR2);
+ hdmi_htop1_write(hdmi, 0x00000008, HDMI_HTOP1_CURRENT);
+ hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_TISEMP0_1);
+ hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_TISEMP2_C);
+ hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_PHY_TEST_MODE);
+ hdmi_htop1_write(hdmi, 0x00000081, HDMI_HTOP1_TISIDRV);
+ hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_PLLBW);
+ hdmi_htop1_write(hdmi, 0x0000000f, HDMI_HTOP1_TISEN);
+ hdmi_htop1_write(hdmi, 0x0000000f, HDMI_HTOP1_TISDREN);
+ hdmi_htop1_write(hdmi, 0x00000003, HDMI_HTOP1_ENABLE_SELECTOR);
+ hdmi_htop1_write(hdmi, 0x00000001, HDMI_HTOP1_MACRO_RESET);
+ hdmi_htop1_write(hdmi, 0x00000016, HDMI_HTOP1_CISRANGE);
+ msleep(100);
+ hdmi_htop1_write(hdmi, 0x00000001, HDMI_HTOP1_ENABLE_SELECTOR);
+ msleep(100);
+ hdmi_htop1_write(hdmi, 0x00000003, HDMI_HTOP1_ENABLE_SELECTOR);
+ hdmi_htop1_write(hdmi, 0x00000001, HDMI_HTOP1_MACRO_RESET);
+ hdmi_htop1_write(hdmi, 0x0000000f, HDMI_HTOP1_TISEN);
+ hdmi_htop1_write(hdmi, 0x0000000f, HDMI_HTOP1_TISDREN);
+ hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_VIDEO_INPUT);
+ hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_CLK_TO_PHY);
+ hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_VIDEO_INPUT2);
+ hdmi_htop1_write(hdmi, 0x0000000a, HDMI_HTOP1_CLK_SET);
+}
+
static int __init sh_hdmi_probe(struct platform_device *pdev)
{
struct sh_mobile_hdmi_info *pdata = pdev->dev.platform_data;
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ struct resource *htop1_res;
int irq = platform_get_irq(pdev, 0), ret;
struct sh_hdmi *hdmi;
long rate;
@@ -1156,6 +1281,15 @@ static int __init sh_hdmi_probe(struct platform_device *pdev)
if (!res || !pdata || irq < 0)
return -ENODEV;
+ htop1_res = NULL;
+ if (pdata->flags & HDMI_HAS_HTOP1) {
+ htop1_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ if (!htop1_res) {
+ dev_err(&pdev->dev, "htop1 needs register base\n");
+ return -EINVAL;
+ }
+ }
+
hdmi = kzalloc(sizeof(*hdmi), GFP_KERNEL);
if (!hdmi) {
dev_err(&pdev->dev, "Cannot allocate device data\n");
@@ -1227,6 +1361,17 @@ static int __init sh_hdmi_probe(struct platform_device *pdev)
if (pdata->flags & HDMI_OUTPUT_POLARITY_HI)
hdmi_bit_set(hdmi, 0x01, 0x01, HDMI_SYSTEM_CTRL);
+ /* enable htop1 register if needed */
+ if (htop1_res) {
+ hdmi->htop1 = ioremap(htop1_res->start, resource_size(htop1_res));
+ if (!hdmi->htop1) {
+ dev_err(&pdev->dev, "control register region already claimed\n");
+ ret = -ENOMEM;
+ goto emap_htop1;
+ }
+ sh_hdmi_htop1_init(hdmi);
+ }
+
/* Product and revision IDs are 0 in sh-mobile version */
dev_info(&pdev->dev, "Detected HDMI controller 0x%x:0x%x\n",
hdmi_read(hdmi, HDMI_PRODUCT_ID), hdmi_read(hdmi, HDMI_REVISION_ID));
@@ -1250,6 +1395,9 @@ static int __init sh_hdmi_probe(struct platform_device *pdev)
ecodec:
free_irq(irq, hdmi);
ereqirq:
+ if (hdmi->htop1)
+ iounmap(hdmi->htop1);
+emap_htop1:
pm_runtime_put(&pdev->dev);
pm_runtime_disable(&pdev->dev);
iounmap(hdmi->base);
@@ -1281,6 +1429,8 @@ static int __exit sh_hdmi_remove(struct platform_device *pdev)
pm_runtime_disable(&pdev->dev);
clk_disable(hdmi->hdmi_clk);
clk_put(hdmi->hdmi_clk);
+ if (hdmi->htop1)
+ iounmap(hdmi->htop1);
iounmap(hdmi->base);
release_mem_region(res->start, resource_size(res));
kfree(hdmi);
diff --git a/include/video/sh_mobile_hdmi.h b/include/video/sh_mobile_hdmi.h
index ce8a540..63d20ef 100644
--- a/include/video/sh_mobile_hdmi.h
+++ b/include/video/sh_mobile_hdmi.h
@@ -38,6 +38,7 @@ struct clk;
/* Chip specific option */
#define HDMI_32BIT_REG (1 << 8)
+#define HDMI_HAS_HTOP1 (1 << 9)
struct sh_mobile_hdmi_info {
unsigned int flags;
--
1.7.5.4
^ permalink raw reply related
* [PATCH 3/4] fbdev: sh_mobile_hdmi: 32bit register access support
From: Kuninori Morimoto @ 2012-05-08 4:07 UTC (permalink / raw)
To: linux-fbdev
Latest SuperH HDMI allows 32bit access only.
But the data is 8bit. So, we can keep compatibility by switching 8/32 bit access.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
drivers/video/sh_mobile_hdmi.c | 38 ++++++++++++++++++++++++++++++++++++--
include/video/sh_mobile_hdmi.h | 5 ++++-
2 files changed, 40 insertions(+), 3 deletions(-)
diff --git a/drivers/video/sh_mobile_hdmi.c b/drivers/video/sh_mobile_hdmi.c
index 0bc39bc..4d48a80 100644
--- a/drivers/video/sh_mobile_hdmi.c
+++ b/drivers/video/sh_mobile_hdmi.c
@@ -222,20 +222,45 @@ struct sh_hdmi {
struct delayed_work edid_work;
struct fb_videomode mode;
struct fb_monspecs monspec;
+
+ /* register access functions */
+ void (*write)(struct sh_hdmi *hdmi, u8 data, u8 reg);
+ u8 (*read)(struct sh_hdmi *hdmi, u8 reg);
};
#define entity_to_sh_hdmi(e) container_of(e, struct sh_hdmi, entity)
-static void hdmi_write(struct sh_hdmi *hdmi, u8 data, u8 reg)
+static void __hdmi_write8(struct sh_hdmi *hdmi, u8 data, u8 reg)
{
iowrite8(data, hdmi->base + reg);
}
-static u8 hdmi_read(struct sh_hdmi *hdmi, u8 reg)
+static u8 __hdmi_read8(struct sh_hdmi *hdmi, u8 reg)
{
return ioread8(hdmi->base + reg);
}
+static void __hdmi_write32(struct sh_hdmi *hdmi, u8 data, u8 reg)
+{
+ iowrite32((u32)data, hdmi->base + (reg * 4));
+ udelay(100);
+}
+
+static u8 __hdmi_read32(struct sh_hdmi *hdmi, u8 reg)
+{
+ return (u8)ioread32(hdmi->base + (reg * 4));
+}
+
+static void hdmi_write(struct sh_hdmi *hdmi, u8 data, u8 reg)
+{
+ hdmi->write(hdmi, data, reg);
+}
+
+static u8 hdmi_read(struct sh_hdmi *hdmi, u8 reg)
+{
+ return hdmi->read(hdmi, reg);
+}
+
static void hdmi_bit_set(struct sh_hdmi *hdmi, u8 mask, u8 data, u8 reg)
{
u8 val = hdmi_read(hdmi, reg);
@@ -1148,6 +1173,15 @@ static int __init sh_hdmi_probe(struct platform_device *pdev)
goto egetclk;
}
+ /* select register access functions */
+ if (pdata->flags & HDMI_32BIT_REG) {
+ hdmi->write = __hdmi_write32;
+ hdmi->read = __hdmi_read32;
+ } else {
+ hdmi->write = __hdmi_write8;
+ hdmi->read = __hdmi_read8;
+ }
+
/* An arbitrary relaxed pixclock just to get things started: from standard 480p */
rate = clk_round_rate(hdmi->hdmi_clk, PICOS2KHZ(37037));
if (rate > 0)
diff --git a/include/video/sh_mobile_hdmi.h b/include/video/sh_mobile_hdmi.h
index 2699635..ce8a540 100644
--- a/include/video/sh_mobile_hdmi.h
+++ b/include/video/sh_mobile_hdmi.h
@@ -18,10 +18,11 @@ struct clk;
/*
* flags format
*
- * 0x000000BA
+ * 0x00000CBA
*
* A: Audio source select
* B: Int output option
+ * C: Chip specific option
*/
/* Audio source select */
@@ -35,6 +36,8 @@ struct clk;
#define HDMI_OUTPUT_PUSH_PULL (1 << 4) /* System control : output mode */
#define HDMI_OUTPUT_POLARITY_HI (1 << 5) /* System control : output polarity */
+/* Chip specific option */
+#define HDMI_32BIT_REG (1 << 8)
struct sh_mobile_hdmi_info {
unsigned int flags;
--
1.7.5.4
^ permalink raw reply related
* [PATCH 2/4] fbdev: sh_mobile_hdmi: add interrupt output option
From: Kuninori Morimoto @ 2012-05-08 4:07 UTC (permalink / raw)
To: linux-fbdev
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
drivers/video/sh_mobile_hdmi.c | 7 +++++++
include/video/sh_mobile_hdmi.h | 8 +++++++-
2 files changed, 14 insertions(+), 1 deletions(-)
diff --git a/drivers/video/sh_mobile_hdmi.c b/drivers/video/sh_mobile_hdmi.c
index e201d6f..0bc39bc 100644
--- a/drivers/video/sh_mobile_hdmi.c
+++ b/drivers/video/sh_mobile_hdmi.c
@@ -1186,6 +1186,13 @@ static int __init sh_hdmi_probe(struct platform_device *pdev)
pm_runtime_enable(&pdev->dev);
pm_runtime_get_sync(&pdev->dev);
+ /* init interrupt polarity */
+ if (pdata->flags & HDMI_OUTPUT_PUSH_PULL)
+ hdmi_bit_set(hdmi, 0x02, 0x02, HDMI_SYSTEM_CTRL);
+
+ if (pdata->flags & HDMI_OUTPUT_POLARITY_HI)
+ hdmi_bit_set(hdmi, 0x01, 0x01, HDMI_SYSTEM_CTRL);
+
/* Product and revision IDs are 0 in sh-mobile version */
dev_info(&pdev->dev, "Detected HDMI controller 0x%x:0x%x\n",
hdmi_read(hdmi, HDMI_PRODUCT_ID), hdmi_read(hdmi, HDMI_REVISION_ID));
diff --git a/include/video/sh_mobile_hdmi.h b/include/video/sh_mobile_hdmi.h
index 728f9de..2699635 100644
--- a/include/video/sh_mobile_hdmi.h
+++ b/include/video/sh_mobile_hdmi.h
@@ -18,9 +18,10 @@ struct clk;
/*
* flags format
*
- * 0x0000000A
+ * 0x000000BA
*
* A: Audio source select
+ * B: Int output option
*/
/* Audio source select */
@@ -30,6 +31,11 @@ struct clk;
#define HDMI_SND_SRC_DSD (2 << 0)
#define HDMI_SND_SRC_HBR (3 << 0)
+/* Int output option */
+#define HDMI_OUTPUT_PUSH_PULL (1 << 4) /* System control : output mode */
+#define HDMI_OUTPUT_POLARITY_HI (1 << 5) /* System control : output polarity */
+
+
struct sh_mobile_hdmi_info {
unsigned int flags;
long (*clk_optimize_parent)(unsigned long target, unsigned long *best_freq,
--
1.7.5.4
^ permalink raw reply related
* [PATCH 1/4] fbdev: sh_mobile_hdmi: add hdmi_bit_set() function
From: Kuninori Morimoto @ 2012-05-08 4:06 UTC (permalink / raw)
To: linux-fbdev
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
drivers/video/sh_mobile_hdmi.c | 22 ++++++++++++++++------
1 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/drivers/video/sh_mobile_hdmi.c b/drivers/video/sh_mobile_hdmi.c
index eafb19d..e201d6f 100644
--- a/drivers/video/sh_mobile_hdmi.c
+++ b/drivers/video/sh_mobile_hdmi.c
@@ -236,6 +236,16 @@ static u8 hdmi_read(struct sh_hdmi *hdmi, u8 reg)
return ioread8(hdmi->base + reg);
}
+static void hdmi_bit_set(struct sh_hdmi *hdmi, u8 mask, u8 data, u8 reg)
+{
+ u8 val = hdmi_read(hdmi, reg);
+
+ val &= ~mask;
+ val |= (data & mask);
+
+ hdmi_write(hdmi, val, reg);
+}
+
/*
* HDMI sound
*/
@@ -693,11 +703,11 @@ static void sh_hdmi_configure(struct sh_hdmi *hdmi)
msleep(10);
/* PS mode b->d, reset PLLA and PLLB */
- hdmi_write(hdmi, 0x4C, HDMI_SYSTEM_CTRL);
+ hdmi_bit_set(hdmi, 0xFC, 0x4C, HDMI_SYSTEM_CTRL);
udelay(10);
- hdmi_write(hdmi, 0x40, HDMI_SYSTEM_CTRL);
+ hdmi_bit_set(hdmi, 0xFC, 0x40, HDMI_SYSTEM_CTRL);
}
static unsigned long sh_hdmi_rate_error(struct sh_hdmi *hdmi,
@@ -917,13 +927,13 @@ static irqreturn_t sh_hdmi_hotplug(int irq, void *dev_id)
u8 status1, status2, mask1, mask2;
/* mode_b and PLLA and PLLB reset */
- hdmi_write(hdmi, 0x2C, HDMI_SYSTEM_CTRL);
+ hdmi_bit_set(hdmi, 0xFC, 0x2C, HDMI_SYSTEM_CTRL);
/* How long shall reset be held? */
udelay(10);
/* mode_b and PLLA and PLLB reset release */
- hdmi_write(hdmi, 0x20, HDMI_SYSTEM_CTRL);
+ hdmi_bit_set(hdmi, 0xFC, 0x20, HDMI_SYSTEM_CTRL);
status1 = hdmi_read(hdmi, HDMI_INTERRUPT_STATUS_1);
status2 = hdmi_read(hdmi, HDMI_INTERRUPT_STATUS_2);
@@ -1001,7 +1011,7 @@ static int sh_hdmi_display_on(struct sh_mobile_lcdc_entity *entity)
*/
if (hdmi->hp_state = HDMI_HOTPLUG_EDID_DONE) {
/* PS mode d->e. All functions are active */
- hdmi_write(hdmi, 0x80, HDMI_SYSTEM_CTRL);
+ hdmi_bit_set(hdmi, 0xFC, 0x80, HDMI_SYSTEM_CTRL);
dev_dbg(hdmi->dev, "HDMI running\n");
}
@@ -1016,7 +1026,7 @@ static void sh_hdmi_display_off(struct sh_mobile_lcdc_entity *entity)
dev_dbg(hdmi->dev, "%s(%p)\n", __func__, hdmi);
/* PS mode e->a */
- hdmi_write(hdmi, 0x10, HDMI_SYSTEM_CTRL);
+ hdmi_bit_set(hdmi, 0xFC, 0x10, HDMI_SYSTEM_CTRL);
}
static const struct sh_mobile_lcdc_entity_ops sh_hdmi_ops = {
--
1.7.5.4
^ permalink raw reply related
* [PATCH 0/4] fbdev: sh_mobile_hdmi: adds HDMI control register support
From: Kuninori Morimoto @ 2012-05-08 4:05 UTC (permalink / raw)
To: linux-fbdev
Hi Florian
Cc: Magnus, Guennadi, Simon
These are sh_mobile_hdmi update patches to supporting
HDMI control register on latest SuperH chip
Kuninori Morimoto (4):
fbdev: sh_mobile_hdmi: add hdmi_bit_set() function
fbdev: sh_mobile_hdmi: add interrupt output option
fbdev: sh_mobile_hdmi: 32bit register access support
fbdev: sh_mobile_hdmi: add HDMI Control Register support
These patches add 32bit access support, and init control registers.
These are tested on Armadillo800eva board
Best regards
---
Kuninori Morimoto
^ permalink raw reply
* Re: ASoC: wm9712: Microphone doesn't work, "Capture Volume" inverted
From: Christoph Fritz @ 2012-05-07 21:55 UTC (permalink / raw)
To: Mark Brown
Cc: alsa-devel, Hans J. Koch, Sascha Hauer, Liam Girdwood,
linux-fbdev
In-Reply-To: <20120504132845.GA24245@lovely.krouter>
On Fri, May 04, 2012 at 03:28:45PM +0200, Christoph Fritz wrote:
> On Fri, Apr 27, 2012 at 02:46:39PM +0100, Mark Brown wrote:
> > On Fri, Apr 27, 2012 at 10:00:02AM +0200, Christoph Fritz wrote:
> > > On Thu, 2012-04-26 at 22:37 +0100, Mark Brown wrote:
> >
> > > > The write will be suppresed if the register contents don't
> > > > change which looks like what you're seeing here -
> >
> > > Can you imagine why the registers don't change?
> >
> > I can't immediately think of any reason, no - I'd step through or
> > annotate the code and have a look.
>
> I'm still on.
>
> And while testing WM9712 its touchpad interface, connecting a 800x600
> display (instead of the default 640x480 one) results in a gone sound and
> input-device - pretty queer:
>
> WM9711/WM9712 SoC Audio Codec 0.4
> asoc: platform pcm constructor failed
> asoc: can't create pcm HiFi
> asoc: failed to instantiate card PhyCORE-ac97-audio: -12
>
> I have to admit that I used this time a 3.2 kernel. I'll test with
> current later these days.
Same behaviour with 3.4.0-rc6:
Framebuffer driver mx3fb configured for a 800x600 display:
soc-audio soc-audio: ASoC machine PhyCORE-ac97-audio should use snd_soc_register_card()
asoc: platform pcm constructor failed
asoc: can't create pcm HiFi :-12
asoc: failed to instantiate card PhyCORE-ac97-audio: -12
mx3fb configured for a 640x480 display:
soc-audio soc-audio: ASoC machine PhyCORE-ac97-audio should use
snd_soc_register_card()
asoc: wm9712-hifi <-> imx-ssi.0 mapping ok
Thanks,
-- Christoph
^ permalink raw reply
* Re: [PATCH 00/25] OMAPDSS: DT preparation patches v2
From: Tony Lindgren @ 2012-05-07 17:46 UTC (permalink / raw)
To: Tomi Valkeinen; +Cc: linux-omap, linux-fbdev, archit
In-Reply-To: <1336053481-25433-1-git-send-email-tomi.valkeinen@ti.com>
Hi,
* Tomi Valkeinen <tomi.valkeinen@ti.com> [120503 07:01]:
> Hi,
>
> I started cleaning up and restructuring omapdss for device tree, and here's the
> first set of patches from that ordeal. There's nothing DT specific in these
> patches, but they are mostly generic cleanups that make sense even without DT.
>
> This is the second version of these patches, the previous version can be found
> from: http://www.spinics.net/lists/linux-fbdev/msg05667.html
>
> The first 21 patches, which were in the previous version, have only gotten
> minor cleanups (and, of course, more testing). The last 4 patches are new. The
> most important of those patches is the DSI pin config patch, which makes it
> possible for the panel driver to configure the DSI pins it needs.
>
> This series can also be found from:
> git://gitorious.org/linux-omap-dss2/linux.git work/devtree-base
Nice clean up. Can you please put the first 12 arch/arm/*omap*/* touching
patches (and the drivers/video dependencies needed) into a separate branch
and send me a pull request. That is assuming those patches are now immutable.
Then I can pull it into cleanup-dss branch that we both can merge as
needed.
Regards,
Tony
^ permalink raw reply
* Re: [PATCH v2 4/4] OMAPDSS: APPLY: Remove display dependency from overlay and manager checks
From: Tomi Valkeinen @ 2012-05-07 15:03 UTC (permalink / raw)
To: Archit Taneja; +Cc: linux-omap, linux-fbdev
In-Reply-To: <1336028864-13895-5-git-send-email-archit@ti.com>
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On Thu, 2012-05-03 at 12:37 +0530, Archit Taneja wrote:
> In order to check the validity of overlay and manager info, there was a need to
> use the omap_dss_device struct to get the panel resolution. The manager's
> private data in APPLY now contains the manager timings. Hence, we don't need to
> rely on the display resolution any more.
>
> Create a function dss_mgr_get_timings() which returns the timings in manager's
> private data. Remove the need of passing omap_dss_device structs in the
> functions which check for overlay and managers.
>
> Have some initial values for manager timings in apply_init(), these would ensure
> that manager checks don't fail if an interface driver or a panel driver hasn't
> set the manager timings yet.
>
> Signed-off-by: Archit Taneja <archit@ti.com>
> +struct omap_video_timings *dss_mgr_get_timings(struct omap_overlay_manager *mgr)
> +{
> + struct mgr_priv_data *mp = get_mgr_priv(mgr);
> +
> + return &mp->timings;
> +}
This one returns a pointer into apply.c's internal data structures. The
safest way would be to return a copy, but as it's an omapdss internal
function, I think it's enough to return a pointer to a const struct.
Tomi
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^ permalink raw reply
* Re: [PATCH v2 1/4] OMAPDSS: APPLY: Add manager timings as extra_info in private data
From: Tomi Valkeinen @ 2012-05-07 14:47 UTC (permalink / raw)
To: Archit Taneja; +Cc: linux-omap, linux-fbdev
In-Reply-To: <1336028864-13895-2-git-send-email-archit@ti.com>
[-- Attachment #1: Type: text/plain, Size: 2723 bytes --]
Hi,
On Thu, 2012-05-03 at 12:37 +0530, Archit Taneja wrote:
> DISPC manager size and DISPC manager blanking parameters(for LCD managers)
> follow the shadow register programming model. Currently, they are programmed
> directly by the interface drivers.
>
> To configure manager timings using APPLY, there is a need to introduce extra
> info flags for managers, similar to what is done for overlays. This is needed
> because timings aren't a part of overlay_manager_info struct configured by a
> user of DSS, they are configured internally by the interface or panel drivers.
>
> Add dirty and shadow_dirty extra_info flags for managers, update these flags
> at the appropriate places. Rewrite the function extra_info_update_ongoing()
> slightly as checking for manager's extra_info flags can simplify the code a bit.
>
> Create function dss_mgr_set_timings() which applies the new manager timings to
> extra_info.
>
> Signed-off-by: Archit Taneja <archit@ti.com>
<snip>
> +static void dss_apply_mgr_timings(struct omap_overlay_manager *mgr,
> + struct omap_video_timings *timings)
> +{
> + struct mgr_priv_data *mp = get_mgr_priv(mgr);
> +
> + mp->timings = *timings;
> + mp->extra_info_dirty = true;
> +}
> +
> +void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
> + struct omap_video_timings *timings)
> +{
> + unsigned long flags;
> +
> + mutex_lock(&apply_lock);
> +
> + spin_lock_irqsave(&data_lock, flags);
> +
> + dss_apply_mgr_timings(mgr, timings);
> +
> + spin_unlock_irqrestore(&data_lock, flags);
> +
> + mutex_unlock(&apply_lock);
> +}
With this, dpi.c & others still need to use dispc_mgr_go(), which is
something that should be removed and done only from apply.c.
dss_<ovl|mgr>_<enable|disable> functions handle GO, so you could have a
look at them. However, setting the timings is a bit different, so I'm
not sure how it should be done.
I think we have a few different options:
- Separate omapdss internal function (in apply.c) that can be used to
set GO after set_timings
- set GO in dss_mgr_set_timings(), but don't block
- set GO in dss_mgr_set_timings(), and block until the changes are in HW
(this is more or less what the dss_<ovl|mgr>_<enable|disable> functions
do).
The first one would be good if the interface drivers would need to set
multiple configurations, and we don't want to block after each set call.
But we don't have anything like that, at least currently.
The second one avoids blocking, but could perhaps cause problems because
the timings are not actually used yet when the function returns.
I don't see any problem with the last option, so I'm slightly leaning
towards it.
Tomi
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^ permalink raw reply
* [PATCH 2/2] OMAPDSS: HDMI: define and dump CORE registers in correct order
From: Archit Taneja @ 2012-05-07 13:32 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, linux-fbdev, Archit Taneja
In-Reply-To: <1336396828-29311-1-git-send-email-archit@ti.com>
The HDMI core register offset macros aren't defined in ascending order of their
values, some of the offset macros are also redefined. The same issues occur when
these core registers are dumped.
Clean up the ordering of HDMI core registers and remove repeated registers in
the definition in ti_hdmi_4xxx_ip.h and in ti_hdmi_4xxx_core_dump().
Signed-off-by: Archit Taneja <archit@ti.com>
---
drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c | 65 +++++++++++++++--------------
drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h | 57 +++++++++++--------------
2 files changed, 59 insertions(+), 63 deletions(-)
diff --git a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
index e266b8e..8fc09d4 100644
--- a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
+++ b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
@@ -900,6 +900,13 @@ void ti_hdmi_4xxx_core_dump(struct hdmi_ip_data *ip_data, struct seq_file *s)
DUMPCORE(HDMI_CORE_SYS_SRST);
DUMPCORE(HDMI_CORE_CTRL1);
DUMPCORE(HDMI_CORE_SYS_SYS_STAT);
+ DUMPCORE(HDMI_CORE_SYS_DE_DLY);
+ DUMPCORE(HDMI_CORE_SYS_DE_CTRL);
+ DUMPCORE(HDMI_CORE_SYS_DE_TOP);
+ DUMPCORE(HDMI_CORE_SYS_DE_CNTL);
+ DUMPCORE(HDMI_CORE_SYS_DE_CNTH);
+ DUMPCORE(HDMI_CORE_SYS_DE_LINL);
+ DUMPCORE(HDMI_CORE_SYS_DE_LINH_1);
DUMPCORE(HDMI_CORE_SYS_VID_ACEN);
DUMPCORE(HDMI_CORE_SYS_VID_MODE);
DUMPCORE(HDMI_CORE_SYS_INTR_STATE);
@@ -909,49 +916,20 @@ void ti_hdmi_4xxx_core_dump(struct hdmi_ip_data *ip_data, struct seq_file *s)
DUMPCORE(HDMI_CORE_SYS_INTR4);
DUMPCORE(HDMI_CORE_SYS_UMASK1);
DUMPCORE(HDMI_CORE_SYS_TMDS_CTRL);
- DUMPCORE(HDMI_CORE_SYS_DE_DLY);
- DUMPCORE(HDMI_CORE_SYS_DE_CTRL);
- DUMPCORE(HDMI_CORE_SYS_DE_TOP);
- DUMPCORE(HDMI_CORE_SYS_DE_CNTL);
- DUMPCORE(HDMI_CORE_SYS_DE_CNTH);
- DUMPCORE(HDMI_CORE_SYS_DE_LINL);
- DUMPCORE(HDMI_CORE_SYS_DE_LINH_1);
- DUMPCORE(HDMI_CORE_DDC_CMD);
- DUMPCORE(HDMI_CORE_DDC_STATUS);
DUMPCORE(HDMI_CORE_DDC_ADDR);
+ DUMPCORE(HDMI_CORE_DDC_SEGM);
DUMPCORE(HDMI_CORE_DDC_OFFSET);
DUMPCORE(HDMI_CORE_DDC_COUNT1);
DUMPCORE(HDMI_CORE_DDC_COUNT2);
+ DUMPCORE(HDMI_CORE_DDC_STATUS);
+ DUMPCORE(HDMI_CORE_DDC_CMD);
DUMPCORE(HDMI_CORE_DDC_DATA);
- DUMPCORE(HDMI_CORE_DDC_SEGM);
- DUMPCOREAV(HDMI_CORE_AV_HDMI_CTRL);
- DUMPCOREAV(HDMI_CORE_AV_DPD);
- DUMPCOREAV(HDMI_CORE_AV_PB_CTRL1);
- DUMPCOREAV(HDMI_CORE_AV_PB_CTRL2);
- DUMPCOREAV(HDMI_CORE_AV_AVI_TYPE);
- DUMPCOREAV(HDMI_CORE_AV_AVI_VERS);
- DUMPCOREAV(HDMI_CORE_AV_AVI_LEN);
- DUMPCOREAV(HDMI_CORE_AV_AVI_CHSUM);
- for (i = 0; i < HDMI_CORE_AV_AVI_DBYTE_NELEMS; i++)
- DUMPCOREAV2(i, HDMI_CORE_AV_AVI_DBYTE);
- for (i = 0; i < HDMI_CORE_AV_SPD_DBYTE_NELEMS; i++)
- DUMPCOREAV2(i, HDMI_CORE_AV_SPD_DBYTE);
- for (i = 0; i < HDMI_CORE_AV_AUD_DBYTE_NELEMS; i++)
- DUMPCOREAV2(i, HDMI_CORE_AV_AUD_DBYTE);
-
- for (i = 0; i < HDMI_CORE_AV_MPEG_DBYTE_NELEMS; i++)
- DUMPCOREAV2(i, HDMI_CORE_AV_MPEG_DBYTE);
- for (i = 0; i < HDMI_CORE_AV_GEN_DBYTE_NELEMS; i++)
- DUMPCOREAV2(i, HDMI_CORE_AV_GEN_DBYTE);
-
- for (i = 0; i < HDMI_CORE_AV_GEN2_DBYTE_NELEMS; i++)
- DUMPCOREAV2(i, HDMI_CORE_AV_GEN2_DBYTE);
DUMPCOREAV(HDMI_CORE_AV_ACR_CTRL);
DUMPCOREAV(HDMI_CORE_AV_FREQ_SVAL);
@@ -991,19 +969,42 @@ void ti_hdmi_4xxx_core_dump(struct hdmi_ip_data *ip_data, struct seq_file *s)
DUMPCOREAV(HDMI_CORE_AV_AVI_VERS);
DUMPCOREAV(HDMI_CORE_AV_AVI_LEN);
DUMPCOREAV(HDMI_CORE_AV_AVI_CHSUM);
+
+ for (i = 0; i < HDMI_CORE_AV_AVI_DBYTE_NELEMS; i++)
+ DUMPCOREAV2(i, HDMI_CORE_AV_AVI_DBYTE);
+
DUMPCOREAV(HDMI_CORE_AV_SPD_TYPE);
DUMPCOREAV(HDMI_CORE_AV_SPD_VERS);
DUMPCOREAV(HDMI_CORE_AV_SPD_LEN);
DUMPCOREAV(HDMI_CORE_AV_SPD_CHSUM);
+
+ for (i = 0; i < HDMI_CORE_AV_SPD_DBYTE_NELEMS; i++)
+ DUMPCOREAV2(i, HDMI_CORE_AV_SPD_DBYTE);
+
DUMPCOREAV(HDMI_CORE_AV_AUDIO_TYPE);
DUMPCOREAV(HDMI_CORE_AV_AUDIO_VERS);
DUMPCOREAV(HDMI_CORE_AV_AUDIO_LEN);
DUMPCOREAV(HDMI_CORE_AV_AUDIO_CHSUM);
+
+ for (i = 0; i < HDMI_CORE_AV_AUD_DBYTE_NELEMS; i++)
+ DUMPCOREAV2(i, HDMI_CORE_AV_AUD_DBYTE);
+
DUMPCOREAV(HDMI_CORE_AV_MPEG_TYPE);
DUMPCOREAV(HDMI_CORE_AV_MPEG_VERS);
DUMPCOREAV(HDMI_CORE_AV_MPEG_LEN);
DUMPCOREAV(HDMI_CORE_AV_MPEG_CHSUM);
+
+ for (i = 0; i < HDMI_CORE_AV_MPEG_DBYTE_NELEMS; i++)
+ DUMPCOREAV2(i, HDMI_CORE_AV_MPEG_DBYTE);
+
+ for (i = 0; i < HDMI_CORE_AV_GEN_DBYTE_NELEMS; i++)
+ DUMPCOREAV2(i, HDMI_CORE_AV_GEN_DBYTE);
+
DUMPCOREAV(HDMI_CORE_AV_CP_BYTE1);
+
+ for (i = 0; i < HDMI_CORE_AV_GEN2_DBYTE_NELEMS; i++)
+ DUMPCOREAV2(i, HDMI_CORE_AV_GEN2_DBYTE);
+
DUMPCOREAV(HDMI_CORE_AV_CEC_ADDR_ID);
}
diff --git a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h
index a14d1a0..b724bc6 100644
--- a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h
+++ b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h
@@ -57,6 +57,13 @@
#define HDMI_CORE_SYS_SRST 0x14
#define HDMI_CORE_CTRL1 0x20
#define HDMI_CORE_SYS_SYS_STAT 0x24
+#define HDMI_CORE_SYS_DE_DLY 0xC8
+#define HDMI_CORE_SYS_DE_CTRL 0xCC
+#define HDMI_CORE_SYS_DE_TOP 0xD0
+#define HDMI_CORE_SYS_DE_CNTL 0xD8
+#define HDMI_CORE_SYS_DE_CNTH 0xDC
+#define HDMI_CORE_SYS_DE_LINL 0xE0
+#define HDMI_CORE_SYS_DE_LINH_1 0xE4
#define HDMI_CORE_SYS_VID_ACEN 0x124
#define HDMI_CORE_SYS_VID_MODE 0x128
#define HDMI_CORE_SYS_INTR_STATE 0x1C0
@@ -66,50 +73,24 @@
#define HDMI_CORE_SYS_INTR4 0x1D0
#define HDMI_CORE_SYS_UMASK1 0x1D4
#define HDMI_CORE_SYS_TMDS_CTRL 0x208
-#define HDMI_CORE_SYS_DE_DLY 0xC8
-#define HDMI_CORE_SYS_DE_CTRL 0xCC
-#define HDMI_CORE_SYS_DE_TOP 0xD0
-#define HDMI_CORE_SYS_DE_CNTL 0xD8
-#define HDMI_CORE_SYS_DE_CNTH 0xDC
-#define HDMI_CORE_SYS_DE_LINL 0xE0
-#define HDMI_CORE_SYS_DE_LINH_1 0xE4
+
#define HDMI_CORE_CTRL1_VEN_FOLLOWVSYNC 0x1
#define HDMI_CORE_CTRL1_HEN_FOLLOWHSYNC 0x1
-#define HDMI_CORE_CTRL1_BSEL_24BITBUS 0x1
+#define HDMI_CORE_CTRL1_BSEL_24BITBUS 0x1
#define HDMI_CORE_CTRL1_EDGE_RISINGEDGE 0x1
/* HDMI DDC E-DID */
-#define HDMI_CORE_DDC_CMD 0x3CC
-#define HDMI_CORE_DDC_STATUS 0x3C8
#define HDMI_CORE_DDC_ADDR 0x3B4
+#define HDMI_CORE_DDC_SEGM 0x3B8
#define HDMI_CORE_DDC_OFFSET 0x3BC
#define HDMI_CORE_DDC_COUNT1 0x3C0
#define HDMI_CORE_DDC_COUNT2 0x3C4
+#define HDMI_CORE_DDC_STATUS 0x3C8
+#define HDMI_CORE_DDC_CMD 0x3CC
#define HDMI_CORE_DDC_DATA 0x3D0
-#define HDMI_CORE_DDC_SEGM 0x3B8
/* HDMI IP Core Audio Video */
-#define HDMI_CORE_AV_HDMI_CTRL 0xBC
-#define HDMI_CORE_AV_DPD 0xF4
-#define HDMI_CORE_AV_PB_CTRL1 0xF8
-#define HDMI_CORE_AV_PB_CTRL2 0xFC
-#define HDMI_CORE_AV_AVI_TYPE 0x100
-#define HDMI_CORE_AV_AVI_VERS 0x104
-#define HDMI_CORE_AV_AVI_LEN 0x108
-#define HDMI_CORE_AV_AVI_CHSUM 0x10C
-#define HDMI_CORE_AV_AVI_DBYTE(n) (n * 4 + 0x110)
-#define HDMI_CORE_AV_AVI_DBYTE_NELEMS 15
-#define HDMI_CORE_AV_SPD_DBYTE(n) (n * 4 + 0x190)
-#define HDMI_CORE_AV_SPD_DBYTE_NELEMS 27
-#define HDMI_CORE_AV_AUD_DBYTE(n) (n * 4 + 0x210)
-#define HDMI_CORE_AV_AUD_DBYTE_NELEMS 10
-#define HDMI_CORE_AV_MPEG_DBYTE(n) (n * 4 + 0x290)
-#define HDMI_CORE_AV_MPEG_DBYTE_NELEMS 27
-#define HDMI_CORE_AV_GEN_DBYTE(n) (n * 4 + 0x300)
-#define HDMI_CORE_AV_GEN_DBYTE_NELEMS 31
-#define HDMI_CORE_AV_GEN2_DBYTE(n) (n * 4 + 0x380)
-#define HDMI_CORE_AV_GEN2_DBYTE_NELEMS 31
#define HDMI_CORE_AV_ACR_CTRL 0x4
#define HDMI_CORE_AV_FREQ_SVAL 0x8
#define HDMI_CORE_AV_N_SVAL1 0xC
@@ -148,25 +129,39 @@
#define HDMI_CORE_AV_AVI_VERS 0x104
#define HDMI_CORE_AV_AVI_LEN 0x108
#define HDMI_CORE_AV_AVI_CHSUM 0x10C
+#define HDMI_CORE_AV_AVI_DBYTE(n) (n * 4 + 0x110)
#define HDMI_CORE_AV_SPD_TYPE 0x180
#define HDMI_CORE_AV_SPD_VERS 0x184
#define HDMI_CORE_AV_SPD_LEN 0x188
#define HDMI_CORE_AV_SPD_CHSUM 0x18C
+#define HDMI_CORE_AV_SPD_DBYTE(n) (n * 4 + 0x190)
#define HDMI_CORE_AV_AUDIO_TYPE 0x200
#define HDMI_CORE_AV_AUDIO_VERS 0x204
#define HDMI_CORE_AV_AUDIO_LEN 0x208
#define HDMI_CORE_AV_AUDIO_CHSUM 0x20C
+#define HDMI_CORE_AV_AUD_DBYTE(n) (n * 4 + 0x210)
#define HDMI_CORE_AV_MPEG_TYPE 0x280
#define HDMI_CORE_AV_MPEG_VERS 0x284
#define HDMI_CORE_AV_MPEG_LEN 0x288
#define HDMI_CORE_AV_MPEG_CHSUM 0x28C
+#define HDMI_CORE_AV_MPEG_DBYTE(n) (n * 4 + 0x290)
+#define HDMI_CORE_AV_GEN_DBYTE(n) (n * 4 + 0x300)
#define HDMI_CORE_AV_CP_BYTE1 0x37C
+#define HDMI_CORE_AV_GEN2_DBYTE(n) (n * 4 + 0x380)
#define HDMI_CORE_AV_CEC_ADDR_ID 0x3FC
+
#define HDMI_CORE_AV_SPD_DBYTE_ELSIZE 0x4
#define HDMI_CORE_AV_GEN2_DBYTE_ELSIZE 0x4
#define HDMI_CORE_AV_MPEG_DBYTE_ELSIZE 0x4
#define HDMI_CORE_AV_GEN_DBYTE_ELSIZE 0x4
+#define HDMI_CORE_AV_AVI_DBYTE_NELEMS 15
+#define HDMI_CORE_AV_SPD_DBYTE_NELEMS 27
+#define HDMI_CORE_AV_AUD_DBYTE_NELEMS 10
+#define HDMI_CORE_AV_MPEG_DBYTE_NELEMS 27
+#define HDMI_CORE_AV_GEN_DBYTE_NELEMS 31
+#define HDMI_CORE_AV_GEN2_DBYTE_NELEMS 31
+
/* PLL */
#define PLLCTRL_PLL_CONTROL 0x0
--
1.7.5.4
^ permalink raw reply related
* [PATCH 1/2] OMAPDSS: HDMI: Fix ti_hdmi_4xxx_core_dump
From: Archit Taneja @ 2012-05-07 13:32 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, linux-fbdev, Archit Taneja
In-Reply-To: <1336396828-29311-1-git-send-email-archit@ti.com>
The function ti_hdmi_4xxx_core_dump has some bugs, the following mention the
bugs and the solutions:
- The macros DUMPCORE and DUMPCOREAV in ti_hdmi_4xxx_core_dump() use
hdmi_pll_base() for the offsets needed to calculate register addresses, use
functions hdmi_core_sys_base() amd hdmi_av_base() to calculate the correct
offsets for CORE_SYS and CORE_AV registers.
- Many of the CORE_AV registers use the DUMPCORE macro, and hence the register
addresses are calculated incorrectly. Rename the current DUMPCOREAV macro as
DUMPCOREAV2 as it takes 2 arguments to dump indexed CORE_AV registers, create
a new macro called DUMPCOREAV which is now used for dumping non-indexed
CORE_AV registers.
Thanks to Ancy Tom <ancytom@gmail.com> for pointing out the issues.
Signed-off-by: Archit Taneja <archit@ti.com>
---
drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c | 142 +++++++++++++++--------------
1 files changed, 72 insertions(+), 70 deletions(-)
diff --git a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
index bfe6fe6..e266b8e 100644
--- a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
+++ b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
@@ -886,10 +886,12 @@ void ti_hdmi_4xxx_core_dump(struct hdmi_ip_data *ip_data, struct seq_file *s)
#define CORE_REG(i, name) name(i)
#define DUMPCORE(r) seq_printf(s, "%-35s %08x\n", #r,\
- hdmi_read_reg(hdmi_pll_base(ip_data), r))
-#define DUMPCOREAV(i, r) seq_printf(s, "%s[%d]%*s %08x\n", #r, i, \
+ hdmi_read_reg(hdmi_core_sys_base(ip_data), r))
+#define DUMPCOREAV(r) seq_printf(s, "%-35s %08x\n", #r,\
+ hdmi_read_reg(hdmi_av_base(ip_data), r))
+#define DUMPCOREAV2(i, r) seq_printf(s, "%s[%d]%*s %08x\n", #r, i, \
(i < 10) ? 32 - strlen(#r) : 31 - strlen(#r), " ", \
- hdmi_read_reg(hdmi_pll_base(ip_data), CORE_REG(i, r)))
+ hdmi_read_reg(hdmi_av_base(ip_data), CORE_REG(i, r)))
DUMPCORE(HDMI_CORE_SYS_VND_IDL);
DUMPCORE(HDMI_CORE_SYS_DEV_IDL);
@@ -924,85 +926,85 @@ void ti_hdmi_4xxx_core_dump(struct hdmi_ip_data *ip_data, struct seq_file *s)
DUMPCORE(HDMI_CORE_DDC_DATA);
DUMPCORE(HDMI_CORE_DDC_SEGM);
- DUMPCORE(HDMI_CORE_AV_HDMI_CTRL);
- DUMPCORE(HDMI_CORE_AV_DPD);
- DUMPCORE(HDMI_CORE_AV_PB_CTRL1);
- DUMPCORE(HDMI_CORE_AV_PB_CTRL2);
- DUMPCORE(HDMI_CORE_AV_AVI_TYPE);
- DUMPCORE(HDMI_CORE_AV_AVI_VERS);
- DUMPCORE(HDMI_CORE_AV_AVI_LEN);
- DUMPCORE(HDMI_CORE_AV_AVI_CHSUM);
+ DUMPCOREAV(HDMI_CORE_AV_HDMI_CTRL);
+ DUMPCOREAV(HDMI_CORE_AV_DPD);
+ DUMPCOREAV(HDMI_CORE_AV_PB_CTRL1);
+ DUMPCOREAV(HDMI_CORE_AV_PB_CTRL2);
+ DUMPCOREAV(HDMI_CORE_AV_AVI_TYPE);
+ DUMPCOREAV(HDMI_CORE_AV_AVI_VERS);
+ DUMPCOREAV(HDMI_CORE_AV_AVI_LEN);
+ DUMPCOREAV(HDMI_CORE_AV_AVI_CHSUM);
for (i = 0; i < HDMI_CORE_AV_AVI_DBYTE_NELEMS; i++)
- DUMPCOREAV(i, HDMI_CORE_AV_AVI_DBYTE);
+ DUMPCOREAV2(i, HDMI_CORE_AV_AVI_DBYTE);
for (i = 0; i < HDMI_CORE_AV_SPD_DBYTE_NELEMS; i++)
- DUMPCOREAV(i, HDMI_CORE_AV_SPD_DBYTE);
+ DUMPCOREAV2(i, HDMI_CORE_AV_SPD_DBYTE);
for (i = 0; i < HDMI_CORE_AV_AUD_DBYTE_NELEMS; i++)
- DUMPCOREAV(i, HDMI_CORE_AV_AUD_DBYTE);
+ DUMPCOREAV2(i, HDMI_CORE_AV_AUD_DBYTE);
for (i = 0; i < HDMI_CORE_AV_MPEG_DBYTE_NELEMS; i++)
- DUMPCOREAV(i, HDMI_CORE_AV_MPEG_DBYTE);
+ DUMPCOREAV2(i, HDMI_CORE_AV_MPEG_DBYTE);
for (i = 0; i < HDMI_CORE_AV_GEN_DBYTE_NELEMS; i++)
- DUMPCOREAV(i, HDMI_CORE_AV_GEN_DBYTE);
+ DUMPCOREAV2(i, HDMI_CORE_AV_GEN_DBYTE);
for (i = 0; i < HDMI_CORE_AV_GEN2_DBYTE_NELEMS; i++)
- DUMPCOREAV(i, HDMI_CORE_AV_GEN2_DBYTE);
-
- DUMPCORE(HDMI_CORE_AV_ACR_CTRL);
- DUMPCORE(HDMI_CORE_AV_FREQ_SVAL);
- DUMPCORE(HDMI_CORE_AV_N_SVAL1);
- DUMPCORE(HDMI_CORE_AV_N_SVAL2);
- DUMPCORE(HDMI_CORE_AV_N_SVAL3);
- DUMPCORE(HDMI_CORE_AV_CTS_SVAL1);
- DUMPCORE(HDMI_CORE_AV_CTS_SVAL2);
- DUMPCORE(HDMI_CORE_AV_CTS_SVAL3);
- DUMPCORE(HDMI_CORE_AV_CTS_HVAL1);
- DUMPCORE(HDMI_CORE_AV_CTS_HVAL2);
- DUMPCORE(HDMI_CORE_AV_CTS_HVAL3);
- DUMPCORE(HDMI_CORE_AV_AUD_MODE);
- DUMPCORE(HDMI_CORE_AV_SPDIF_CTRL);
- DUMPCORE(HDMI_CORE_AV_HW_SPDIF_FS);
- DUMPCORE(HDMI_CORE_AV_SWAP_I2S);
- DUMPCORE(HDMI_CORE_AV_SPDIF_ERTH);
- DUMPCORE(HDMI_CORE_AV_I2S_IN_MAP);
- DUMPCORE(HDMI_CORE_AV_I2S_IN_CTRL);
- DUMPCORE(HDMI_CORE_AV_I2S_CHST0);
- DUMPCORE(HDMI_CORE_AV_I2S_CHST1);
- DUMPCORE(HDMI_CORE_AV_I2S_CHST2);
- DUMPCORE(HDMI_CORE_AV_I2S_CHST4);
- DUMPCORE(HDMI_CORE_AV_I2S_CHST5);
- DUMPCORE(HDMI_CORE_AV_ASRC);
- DUMPCORE(HDMI_CORE_AV_I2S_IN_LEN);
- DUMPCORE(HDMI_CORE_AV_HDMI_CTRL);
- DUMPCORE(HDMI_CORE_AV_AUDO_TXSTAT);
- DUMPCORE(HDMI_CORE_AV_AUD_PAR_BUSCLK_1);
- DUMPCORE(HDMI_CORE_AV_AUD_PAR_BUSCLK_2);
- DUMPCORE(HDMI_CORE_AV_AUD_PAR_BUSCLK_3);
- DUMPCORE(HDMI_CORE_AV_TEST_TXCTRL);
- DUMPCORE(HDMI_CORE_AV_DPD);
- DUMPCORE(HDMI_CORE_AV_PB_CTRL1);
- DUMPCORE(HDMI_CORE_AV_PB_CTRL2);
- DUMPCORE(HDMI_CORE_AV_AVI_TYPE);
- DUMPCORE(HDMI_CORE_AV_AVI_VERS);
- DUMPCORE(HDMI_CORE_AV_AVI_LEN);
- DUMPCORE(HDMI_CORE_AV_AVI_CHSUM);
- DUMPCORE(HDMI_CORE_AV_SPD_TYPE);
- DUMPCORE(HDMI_CORE_AV_SPD_VERS);
- DUMPCORE(HDMI_CORE_AV_SPD_LEN);
- DUMPCORE(HDMI_CORE_AV_SPD_CHSUM);
- DUMPCORE(HDMI_CORE_AV_AUDIO_TYPE);
- DUMPCORE(HDMI_CORE_AV_AUDIO_VERS);
- DUMPCORE(HDMI_CORE_AV_AUDIO_LEN);
- DUMPCORE(HDMI_CORE_AV_AUDIO_CHSUM);
- DUMPCORE(HDMI_CORE_AV_MPEG_TYPE);
- DUMPCORE(HDMI_CORE_AV_MPEG_VERS);
- DUMPCORE(HDMI_CORE_AV_MPEG_LEN);
- DUMPCORE(HDMI_CORE_AV_MPEG_CHSUM);
- DUMPCORE(HDMI_CORE_AV_CP_BYTE1);
- DUMPCORE(HDMI_CORE_AV_CEC_ADDR_ID);
+ DUMPCOREAV2(i, HDMI_CORE_AV_GEN2_DBYTE);
+
+ DUMPCOREAV(HDMI_CORE_AV_ACR_CTRL);
+ DUMPCOREAV(HDMI_CORE_AV_FREQ_SVAL);
+ DUMPCOREAV(HDMI_CORE_AV_N_SVAL1);
+ DUMPCOREAV(HDMI_CORE_AV_N_SVAL2);
+ DUMPCOREAV(HDMI_CORE_AV_N_SVAL3);
+ DUMPCOREAV(HDMI_CORE_AV_CTS_SVAL1);
+ DUMPCOREAV(HDMI_CORE_AV_CTS_SVAL2);
+ DUMPCOREAV(HDMI_CORE_AV_CTS_SVAL3);
+ DUMPCOREAV(HDMI_CORE_AV_CTS_HVAL1);
+ DUMPCOREAV(HDMI_CORE_AV_CTS_HVAL2);
+ DUMPCOREAV(HDMI_CORE_AV_CTS_HVAL3);
+ DUMPCOREAV(HDMI_CORE_AV_AUD_MODE);
+ DUMPCOREAV(HDMI_CORE_AV_SPDIF_CTRL);
+ DUMPCOREAV(HDMI_CORE_AV_HW_SPDIF_FS);
+ DUMPCOREAV(HDMI_CORE_AV_SWAP_I2S);
+ DUMPCOREAV(HDMI_CORE_AV_SPDIF_ERTH);
+ DUMPCOREAV(HDMI_CORE_AV_I2S_IN_MAP);
+ DUMPCOREAV(HDMI_CORE_AV_I2S_IN_CTRL);
+ DUMPCOREAV(HDMI_CORE_AV_I2S_CHST0);
+ DUMPCOREAV(HDMI_CORE_AV_I2S_CHST1);
+ DUMPCOREAV(HDMI_CORE_AV_I2S_CHST2);
+ DUMPCOREAV(HDMI_CORE_AV_I2S_CHST4);
+ DUMPCOREAV(HDMI_CORE_AV_I2S_CHST5);
+ DUMPCOREAV(HDMI_CORE_AV_ASRC);
+ DUMPCOREAV(HDMI_CORE_AV_I2S_IN_LEN);
+ DUMPCOREAV(HDMI_CORE_AV_HDMI_CTRL);
+ DUMPCOREAV(HDMI_CORE_AV_AUDO_TXSTAT);
+ DUMPCOREAV(HDMI_CORE_AV_AUD_PAR_BUSCLK_1);
+ DUMPCOREAV(HDMI_CORE_AV_AUD_PAR_BUSCLK_2);
+ DUMPCOREAV(HDMI_CORE_AV_AUD_PAR_BUSCLK_3);
+ DUMPCOREAV(HDMI_CORE_AV_TEST_TXCTRL);
+ DUMPCOREAV(HDMI_CORE_AV_DPD);
+ DUMPCOREAV(HDMI_CORE_AV_PB_CTRL1);
+ DUMPCOREAV(HDMI_CORE_AV_PB_CTRL2);
+ DUMPCOREAV(HDMI_CORE_AV_AVI_TYPE);
+ DUMPCOREAV(HDMI_CORE_AV_AVI_VERS);
+ DUMPCOREAV(HDMI_CORE_AV_AVI_LEN);
+ DUMPCOREAV(HDMI_CORE_AV_AVI_CHSUM);
+ DUMPCOREAV(HDMI_CORE_AV_SPD_TYPE);
+ DUMPCOREAV(HDMI_CORE_AV_SPD_VERS);
+ DUMPCOREAV(HDMI_CORE_AV_SPD_LEN);
+ DUMPCOREAV(HDMI_CORE_AV_SPD_CHSUM);
+ DUMPCOREAV(HDMI_CORE_AV_AUDIO_TYPE);
+ DUMPCOREAV(HDMI_CORE_AV_AUDIO_VERS);
+ DUMPCOREAV(HDMI_CORE_AV_AUDIO_LEN);
+ DUMPCOREAV(HDMI_CORE_AV_AUDIO_CHSUM);
+ DUMPCOREAV(HDMI_CORE_AV_MPEG_TYPE);
+ DUMPCOREAV(HDMI_CORE_AV_MPEG_VERS);
+ DUMPCOREAV(HDMI_CORE_AV_MPEG_LEN);
+ DUMPCOREAV(HDMI_CORE_AV_MPEG_CHSUM);
+ DUMPCOREAV(HDMI_CORE_AV_CP_BYTE1);
+ DUMPCOREAV(HDMI_CORE_AV_CEC_ADDR_ID);
}
void ti_hdmi_4xxx_phy_dump(struct hdmi_ip_data *ip_data, struct seq_file *s)
--
1.7.5.4
^ permalink raw reply related
* [PATCH 0/2] OMAPDSS: HDMI: Fix register dump of CORE registers
From: Archit Taneja @ 2012-05-07 13:32 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, linux-fbdev, Archit Taneja
The HDMI CORE registers are dumped incorrectly due to incorrect register offset
calculations. They are also dumped in a random order, with some of the registers
repeated. This series fixes these issues.
The patches apply over:
git://gitorious.org/linux-omap-dss2/linux.git dev
Tested on OMAP4 SDP.
Archit Taneja (2):
OMAPDSS: HDMI: Fix ti_hdmi_4xxx_core_dump
OMAPDSS: HDMI: define and dump CORE registers in correct order
drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c | 163 +++++++++++++++--------------
drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h | 57 +++++------
2 files changed, 109 insertions(+), 111 deletions(-)
--
1.7.5.4
^ permalink raw reply
* [PATCH 6/6] OMAPDSS: DISPC: Remove Fake VSYNC support
From: Archit Taneja @ 2012-05-07 11:33 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, linux-fbdev, Archit Taneja
In-Reply-To: <1336389696-21636-1-git-send-email-archit@ti.com>
Fake VSYNC support is a hack and has some bugs in it. It isn't used by any user
of DSS. Remove Fake VSYNC support. For DSI command mode and RFBI panels, a user
of DSS should wait for the completion of a frame by using the panel driver's
sync op.
Signed-off-by: Archit Taneja <archit@ti.com>
---
drivers/video/omap2/dss/Kconfig | 9 ---------
drivers/video/omap2/dss/dispc.c | 21 ---------------------
drivers/video/omap2/dss/dsi.c | 4 ----
drivers/video/omap2/dss/dss.h | 1 -
4 files changed, 0 insertions(+), 35 deletions(-)
diff --git a/drivers/video/omap2/dss/Kconfig b/drivers/video/omap2/dss/Kconfig
index 7be7c06..9aaf324 100644
--- a/drivers/video/omap2/dss/Kconfig
+++ b/drivers/video/omap2/dss/Kconfig
@@ -90,15 +90,6 @@ config OMAP2_DSS_DSI
See http://www.mipi.org/ for DSI spesifications.
-config OMAP2_DSS_FAKE_VSYNC
- bool "Fake VSYNC irq from manual update displays"
- default n
- help
- If this is selected, DSI will generate a fake DISPC VSYNC interrupt
- when DSI has sent a frame. This is only needed with DSI or RFBI
- displays using manual mode, and you want VSYNC to, for example,
- time animation.
-
config OMAP2_DSS_MIN_FCK_PER_PCK
int "Minimum FCK/PCK ratio (for scaling)"
range 0 32
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index ef131cd..89d54c5 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -3443,27 +3443,6 @@ int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
return 0;
}
-#ifdef CONFIG_OMAP2_DSS_FAKE_VSYNC
-void dispc_fake_vsync_irq(void)
-{
- u32 irqstatus = DISPC_IRQ_VSYNC;
- int i;
-
- WARN_ON(!in_interrupt());
-
- for (i = 0; i < DISPC_MAX_NR_ISRS; i++) {
- struct omap_dispc_isr_data *isr_data;
- isr_data = &dispc.registered_isr[i];
-
- if (!isr_data->isr)
- continue;
-
- if (isr_data->mask & irqstatus)
- isr_data->isr(isr_data->arg, irqstatus);
- }
-}
-#endif
-
static void _omap_dispc_initialize_irq(void)
{
unsigned long flags;
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index db73598..95bc996 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -4152,10 +4152,6 @@ static void dsi_framedone_irq_callback(void *data, u32 mask)
__cancel_delayed_work(&dsi->framedone_timeout_work);
dsi_handle_framedone(dsidev, 0);
-
-#ifdef CONFIG_OMAP2_DSS_FAKE_VSYNC
- dispc_fake_vsync_irq();
-#endif
}
int omap_dsi_update(struct omap_dss_device *dssdev, int channel,
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index f2a51c6..6699197 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -399,7 +399,6 @@ void dispc_dump_clocks(struct seq_file *s);
void dispc_dump_irqs(struct seq_file *s);
void dispc_dump_regs(struct seq_file *s);
void dispc_irq_handler(void);
-void dispc_fake_vsync_irq(void);
int dispc_runtime_get(void);
void dispc_runtime_put(void);
--
1.7.5.4
^ permalink raw reply related
* [PATCH 5/6] OMAPDSS: Fix DSI_FCLK clock source selection
From: Archit Taneja @ 2012-05-07 11:33 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, linux-fbdev, Archit Taneja
In-Reply-To: <1336389696-21636-1-git-send-email-archit@ti.com>
The wrong bit field was being updated in DSS_CTRL when trying to configure the
clock source of DSI2 functional clock. Use the correct bit field based on the
dsi module number.
Signed-off-by: Archit Taneja <archit@ti.com>
---
drivers/video/omap2/dss/dss.c | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c
index e731aa4..e212acb 100644
--- a/drivers/video/omap2/dss/dss.c
+++ b/drivers/video/omap2/dss/dss.c
@@ -335,7 +335,7 @@ void dss_select_dsi_clk_source(int dsi_module,
enum omap_dss_clk_source clk_src)
{
struct platform_device *dsidev;
- int b;
+ int b, pos;
switch (clk_src) {
case OMAP_DSS_CLK_SRC_FCK:
@@ -357,7 +357,8 @@ void dss_select_dsi_clk_source(int dsi_module,
BUG();
}
- REG_FLD_MOD(DSS_CONTROL, b, 1, 1); /* DSI_CLK_SWITCH */
+ pos = dsi_module = 0 ? 1 : 10;
+ REG_FLD_MOD(DSS_CONTROL, b, pos, pos); /* DSIx_CLK_SWITCH */
dss.dsi_clk_source[dsi_module] = clk_src;
}
--
1.7.5.4
^ permalink raw reply related
* [PATCH 4/6] OMAPDSS: DISPC: Remove usage of dispc_mgr_get_device()
From: Archit Taneja @ 2012-05-07 11:33 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, linux-fbdev, Archit Taneja
In-Reply-To: <1336389696-21636-1-git-send-email-archit@ti.com>
The functions calc_fclk_five_taps() and check_horiz_timing_omap3() use the
function dispc_mgr_get_device() to get the omap_dss_device pointer to which
the manager is connected, the width of the panel is derived from that.
Replace this by using dss_mgr_get_device() which returns the manager's timing
stored in it's private data in APPLY. This contains the latest timings applied
to the manager. Remove the function dispc_mgr_get_device() as it isn't used
any more.
Signed-off-by: Archit Taneja <archit@ti.com>
---
drivers/video/omap2/dss/dispc.c | 29 +++++++++++++++--------------
1 files changed, 15 insertions(+), 14 deletions(-)
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index c198cc8..ef131cd 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -413,14 +413,6 @@ static inline bool dispc_mgr_is_lcd(enum omap_channel channel)
return false;
}
-static struct omap_dss_device *dispc_mgr_get_device(enum omap_channel channel)
-{
- struct omap_overlay_manager *mgr - omap_dss_get_overlay_manager(channel);
-
- return mgr ? mgr->device : NULL;
-}
-
u32 dispc_mgr_get_vsync_irq(enum omap_channel channel)
{
switch (channel) {
@@ -1665,14 +1657,17 @@ static int check_horiz_timing_omap3(enum omap_channel channel, u16 pos_x,
u16 width, u16 height, u16 out_width, u16 out_height)
{
int DS = DIV_ROUND_UP(height, out_height);
- struct omap_dss_device *dssdev = dispc_mgr_get_device(channel);
- struct omap_video_timings t = dssdev->panel.timings;
+ struct omap_overlay_manager *mgr;
+ struct omap_video_timings *t;
unsigned long nonactive, lclk, pclk;
static const u8 limits[3] = { 8, 10, 20 };
u64 val, blank;
int i;
- nonactive = t.x_res + t.hfp + t.hsw + t.hbp - out_width;
+ mgr = omap_dss_get_overlay_manager(channel);
+ t = dss_mgr_get_timings(mgr);
+
+ nonactive = t->x_res + t->hfp + t->hsw + t->hbp - out_width;
pclk = dispc_mgr_pclk_rate(channel);
if (dispc_mgr_is_lcd(channel))
lclk = dispc_mgr_lclk_rate(channel);
@@ -1684,7 +1679,7 @@ static int check_horiz_timing_omap3(enum omap_channel channel, u16 pos_x,
i++;
if (out_width < width)
i++;
- blank = div_u64((u64)(t.hbp + t.hsw + t.hfp) * lclk, pclk);
+ blank = div_u64((u64)(t->hbp + t->hsw + t->hfp) * lclk, pclk);
DSSDBG("blanking period + ppl = %llu (limit = %u)\n", blank, limits[i]);
if (blank <= limits[i])
return -EINVAL;
@@ -1725,8 +1720,14 @@ static unsigned long calc_core_clk_five_taps(enum omap_channel channel,
return (unsigned long) pclk;
if (height > out_height) {
- struct omap_dss_device *dssdev = dispc_mgr_get_device(channel);
- unsigned int ppl = dssdev->panel.timings.x_res;
+ struct omap_overlay_manager *mgr;
+ struct omap_video_timings *mgr_timings;
+ unsigned int ppl;
+
+ mgr = omap_dss_get_overlay_manager(channel);
+ mgr_timings = dss_mgr_get_timings(mgr);
+
+ ppl = mgr_timings->x_res;
tmp = pclk * height * out_width;
do_div(tmp, 2 * out_height * ppl);
--
1.7.5.4
^ permalink raw reply related
* [PATCH 3/6] OMAPDSS: DISPC: Remove omap_dss_device pointer usage from dispc_mgr_pclk_rate()
From: Archit Taneja @ 2012-05-07 11:33 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, linux-fbdev, Archit Taneja
In-Reply-To: <1336389696-21636-1-git-send-email-archit@ti.com>
The pixel clock rate for the TV manager is calculated by checking the device
type connected to the manager, and then requesting the VENC/HDMI interface for
the pixel clock rate.
Remove the use of omap_dss_device pointer from here by checking which interface
generates the pixel clock by reading the DSS_CTRL.VENC_HDMI_SWITCH bit.
Signed-off-by: Archit Taneja <archit@ti.com>
---
drivers/video/omap2/dss/dispc.c | 11 ++++++-----
1 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 49015b8..c198cc8 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -2643,13 +2643,14 @@ unsigned long dispc_mgr_pclk_rate(enum omap_channel channel)
return r / pcd;
} else {
- struct omap_dss_device *dssdev - dispc_mgr_get_device(channel);
+ enum dss_hdmi_venc_clk_source_select source;
- switch (dssdev->type) {
- case OMAP_DISPLAY_TYPE_VENC:
+ source = dss_get_hdmi_venc_clk_source();
+
+ switch (source) {
+ case DSS_VENC_TV_CLK:
return venc_get_pixel_clock();
- case OMAP_DISPLAY_TYPE_HDMI:
+ case DSS_HDMI_M_PCLK:
return hdmi_get_pixel_clock();
default:
BUG();
--
1.7.5.4
^ permalink raw reply related
* [PATCH 2/6] OMAPDSS: APPLY: Remove an unnecessary omap_dss_device pointer
From: Archit Taneja @ 2012-05-07 11:33 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, linux-fbdev, Archit Taneja
In-Reply-To: <1336389696-21636-1-git-send-email-archit@ti.com>
The omap_dss_device pointer declared in dss_ovl_setup_fifo() isn't used. Remove
the pointer variable declaration and it's assignment.
Signed-off-by: Archit Taneja <archit@ti.com>
---
drivers/video/omap2/dss/apply.c | 3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/drivers/video/omap2/dss/apply.c b/drivers/video/omap2/dss/apply.c
index 052d9a2..756c31a 100644
--- a/drivers/video/omap2/dss/apply.c
+++ b/drivers/video/omap2/dss/apply.c
@@ -977,14 +977,11 @@ static void dss_ovl_setup_fifo(struct omap_overlay *ovl,
bool use_fifo_merge)
{
struct ovl_priv_data *op = get_ovl_priv(ovl);
- struct omap_dss_device *dssdev;
u32 fifo_low, fifo_high;
if (!op->enabled && !op->enabling)
return;
- dssdev = ovl->manager->device;
-
dispc_ovl_compute_fifo_thresholds(ovl->id, &fifo_low, &fifo_high,
use_fifo_merge);
--
1.7.5.4
^ permalink raw reply related
* [PATCH 1/6] OMAPDSS: DPI/HDMI: Apply manager timings even if panel is disabled
From: Archit Taneja @ 2012-05-07 11:33 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, linux-fbdev, Archit Taneja
In-Reply-To: <1336389696-21636-1-git-send-email-archit@ti.com>
The HDMI and DPI interfaces use their 'set_timing' functions to take in a new
set of timings. If the panel is disabled, they do not disable and re-enable
the interface. Currently, the manager timings are applied in hdmi_power_on()
and dpi_set_mode() respectively, these are not called by set_timings if the
panel is disabled.
When checking overlay and manager data, the DSS driver uses the last applied
manager timings, and not the timings stored in omap_dss_device struct. Hence,
there is a need to apply the new manager timings even if the panel is disabled.
Apply the manager timings if the panel is disabled. Eventually, there should be
one common place where the timings are applied independent of the state of the
panel.
Signed-off-by: Archit Taneja <archit@ti.com>
---
drivers/video/omap2/dss/dpi.c | 2 ++
drivers/video/omap2/dss/hdmi.c | 2 ++
2 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c
index 8127f46..1650050 100644
--- a/drivers/video/omap2/dss/dpi.c
+++ b/drivers/video/omap2/dss/dpi.c
@@ -298,6 +298,8 @@ void dpi_set_timings(struct omap_dss_device *dssdev,
dispc_runtime_put();
dss_runtime_put();
+ } else {
+ dss_mgr_set_timings(dssdev->manager, timings);
}
}
EXPORT_SYMBOL(dpi_set_timings);
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 8d4ff8c..32ad712 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -435,6 +435,8 @@ void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev)
r = hdmi_power_on(dssdev);
if (r)
DSSERR("failed to power on device\n");
+ } else {
+ dss_mgr_set_timings(dssdev->manager, &dssdev->panel.timings);
}
}
--
1.7.5.4
^ permalink raw reply related
* [PATCH 0/6] OMAPDSS: Misc fixes and cleanups
From: Archit Taneja @ 2012-05-07 11:33 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, linux-fbdev, Archit Taneja
The first patch in this series is a follow up on the previously posted series
'OMAPDSS: APPLY: Treat overlay manager timings as shadow registers'. It is
required for HDMI and DPI interfaces to work properly, it ensures manager
timings are applied in the set_timing() ops for these interfaces.
The next 3 patches remove some unnecessary usage of omap_dss_device pointer in
DISPC and APPLY.
The last 2 patches are miscellaneous fixes and are self explanatory.
Reference tree containing this series:
git://gitorious.org/~boddob/linux-omap-dss2/archit-dss2-clone.git mgr_timing_and_fixes
Tested on OMAP4 SDP.
Archit Taneja (6):
OMAPDSS: DPI/HDMI: Apply manager timings even if panel is disabled
OMAPDSS: APPLY: Remove an unnecessary omap_dss_device pointer
OMAPDSS: DISPC: Remove omap_dss_device pointer usage from
dispc_mgr_pclk_rate()
OMAPDSS: DISPC: Remove usage of dispc_mgr_get_device()
OMAPDSS: Fix DSI_FCLK clock source selection
OMAPDSS: DISPC: Remove Fake VSYNC support
drivers/video/omap2/dss/Kconfig | 9 ------
drivers/video/omap2/dss/apply.c | 3 --
drivers/video/omap2/dss/dispc.c | 61 +++++++++++++-------------------------
drivers/video/omap2/dss/dpi.c | 2 +
drivers/video/omap2/dss/dsi.c | 4 --
drivers/video/omap2/dss/dss.c | 5 ++-
drivers/video/omap2/dss/dss.h | 1 -
drivers/video/omap2/dss/hdmi.c | 2 +
8 files changed, 28 insertions(+), 59 deletions(-)
--
1.7.5.4
^ permalink raw reply
* fb: BUGs related to deferred IO
From: Sasha Levin @ 2012-05-07 9:42 UTC (permalink / raw)
To: FlorianSchandinat; +Cc: Dave Jones, linux-fbdev, linux-kernel@vger.kernel.org
Hi all,
During fuzzing using trinity inside a KVM guest, using latest -next kernel, I got the following BUG:
[ 601.263570] ------------[ cut here ]------------
[ 601.270562] WARNING: at lib/debugobjects.c:261 debug_print_object+0x8d/0xb0()
[ 601.298273] ODEBUG: assert_init not available (active state 0) object type: timer_list hint: stub_timer+0x0/0x20
[ 601.317051] Pid: 23084, comm: trinity Tainted: G W 3.4.0-rc6-next-20120507-sasha-00001-g33621a3-dirty #114
[ 601.353655] Call Trace:
[ 601.358430] [<ffffffff810b6ca7>] warn_slowpath_common+0x87/0xb0
[ 601.369400] [<ffffffff810b6d71>] warn_slowpath_fmt+0x41/0x50
[ 601.376112] [<ffffffff8189dafd>] debug_print_object+0x8d/0xb0
[ 601.382656] [<ffffffff810c5650>] ? usleep_range+0x40/0x40
[ 601.389210] [<ffffffff8189dcf0>] debug_object_assert_init+0xa0/0x110
[ 601.395856] [<ffffffff810c5e26>] del_timer+0x26/0xd0
[ 601.399472] [<ffffffff810d3c87>] __cancel_work_timer+0x27/0xa0
[ 601.403238] [<ffffffff810d3d0d>] cancel_delayed_work_sync+0xd/0x10
[ 601.406969] [<ffffffff819170d2>] fb_deferred_io_fsync+0x52/0x80
[ 601.410281] [<ffffffff811e1ff8>] ? fget_light+0x118/0x3e0
[ 601.413489] [<ffffffff8120cb48>] vfs_fsync_range+0x18/0x30
[ 601.416741] [<ffffffff8120cb77>] vfs_fsync+0x17/0x20
[ 601.419662] [<ffffffff8120cd74>] do_fsync+0x34/0x60
[ 601.422959] [<ffffffff8120cdae>] sys_fdatasync+0xe/0x20
[ 601.425721] [<ffffffff82d8b1f9>] system_call_fastpath+0x16/0x1b
[ 601.449718] ---[ end trace 44593438a59a9537 ]---
[ 601.452359] ------------[ cut here ]------------
[ 601.453315] kernel BUG at kernel/workqueue.c:564!
[ 601.453315] invalid opcode: 0000 [#1] PREEMPT SMP DEBUG_PAGEALLOC
[ 601.453315] CPU 1
[ 601.453315] Pid: 23084, comm: trinity Tainted: G W 3.4.0-rc6-next-20120507-sasha-00001-g33621a3-dirty #114
[ 601.453315] RIP: 0010:[<ffffffff810d1621>] [<ffffffff810d1621>] get_work_gcwq+0x41/0x80
[ 601.453315] RSP: 0018:ffff88000ed3fe58 EFLAGS: 00010213
[ 601.453315] RAX: 0000000000000000 RBX: ffff88007f310e58 RCX: 0000000000000006
[ 601.453315] RDX: 0035b5b5b5b5b5b5 RSI: ffff88000f9088e0 RDI: ffff88007f310e58
[ 602.339668] RBP: ffff88000ed3fe58 R08: 0000000000000001 R09: 0000000000000000
[ 602.339668] R10: 0000000000000001 R11: 0000000000000000 R12: ffff88007f310e58
[ 602.339668] R13: 09286401f3b0af98 R14: 13b8db52e413d33a R15: 02be775f01f67918
[ 602.339668] FS: 00007f65d4b65700(0000) GS:ffff88001b800000(0000) knlGS:0000000000000000
[ 602.339668] CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b
[ 602.339668] CR2: 0000000000f54800 CR3: 0000000016530000 CR4: 00000000000407e0
[ 602.339668] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
[ 602.339668] DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
[ 602.339668] Process trinity (pid: 23084, threadinfo ffff88000ed3e000, task ffff88000f908000)
[ 602.339668] Stack:
[ 602.339668] ffff88000ed3fe98 ffffffff810d23db 2222222222222222 2222222222222222
[ 602.339668] 2222222222222222 ffff88007f310e58 ffff88007f310ea8 09286401f3b0af98
[ 602.339668] ffff88000ed3fec8 ffffffff810d3ce0 13b8db52e413d33a ffff88001aeccb98
[ 602.339668] Call Trace:
[ 602.339668] [<ffffffff810d23db>] try_to_grab_pending+0x2b/0xe0
[ 602.339668] [<ffffffff810d3ce0>] __cancel_work_timer+0x80/0xa0
[ 602.339668] [<ffffffff810d3d0d>] cancel_delayed_work_sync+0xd/0x10
[ 602.339668] [<ffffffff819170d2>] fb_deferred_io_fsync+0x52/0x80
[ 602.339668] [<ffffffff811e1ff8>] ? fget_light+0x118/0x3e0
[ 602.339668] [<ffffffff8120cb48>] vfs_fsync_range+0x18/0x30
[ 602.339668] [<ffffffff8120cb77>] vfs_fsync+0x17/0x20
[ 602.339668] [<ffffffff8120cd74>] do_fsync+0x34/0x60
[ 602.339668] [<ffffffff8120cdae>] sys_fdatasync+0xe/0x20
[ 602.339668] [<ffffffff82d8b1f9>] system_call_fastpath+0x16/0x1b
[ 602.339668] Code: 66 2e 0f 1f 84 00 00 00 00 00 48 89 c2 31 c0 48 c1 ea 09 81 fa 01 10 00 00 74 3f 81 fa 00 10 00 00 74 27 39 15 89 ca f1 02 77 09 <0f> 0b 0f 1f 44 00 00 eb fe 48 c7 c0 80 f4 00 00 89 d2 48 03 04
[ 602.339668] RIP [<ffffffff810d1621>] get_work_gcwq+0x41/0x80
[ 602.339668] RSP <ffff88000ed3fe58>
[ 602.674604] ---[ end trace 44593438a59a9538 ]---
It would seem that this is the case of trying to use deferred IO on FBs that don't support it. I had a cirrus fbdev in the guest, which from what I can tell doesn't support deferred IO.
The first and the 2nd bug lead me to believe that 'fbdefio' was set to garbage.
^ permalink raw reply
* Re: [alsa-devel] [PATCH RESEND 0/9] Enable pinctrl support for mach-mxs
From: Dong Aisheng @ 2012-05-07 7:56 UTC (permalink / raw)
To: Shawn Guo
Cc: Dong Aisheng-B29396, linux-arm-kernel@lists.infradead.org,
linux-fbdev@vger.kernel.org, Chris Ball, Arnd Bergmann,
Florian Tobias Schandinat, Artem Bityutskiy, Mark Brown,
linux-mmc@vger.kernel.org, alsa-devel@alsa-project.org,
Wolfram Sang, linux-mtd@lists.infradead.org,
linux-i2c@vger.kernel.org, linux-serial@vger.kernel.org,
Greg Kroah-Hartman, Olof Johansson
In-Reply-To: <20120507074658.GH19389@S2101-09.ap.freescale.net>
On Mon, May 07, 2012 at 03:47:00PM +0800, Shawn Guo wrote:
> On Mon, May 07, 2012 at 03:14:00PM +0800, Dong Aisheng wrote:
> > As IMX, basically i'd prefer to add pinctrl states in dts file at the
> > same time within the patch or using a separate patch to add them before
> > this series to avoid breaking the exist platforms.
> >
> > However i noted that for mxs, most drivers here are still not dt capable,
> > so it may be ok to not add their pinctrl state at this time.
> >
> There no mxs driver on mainline that has been DT aware of. What I'm
> going to do is to ask Arnd abandon the mxs/dt branch I sent him before
> and send him an updated one with the whole mxs DT support based on
> mxs common clk and pinctrl series.
>
> > But for the patch "serial: amba-pl011: adopt pinctrl support" since it is
> > dt capable, so with this patch applied, the mx28 dt boot will fail.
> > Maybe we should at least add pinctrl states for amba-pl011 first.
> >
> The updated mxs/dt will have pinctrl defined in dts for each device
> that is converted to DT.
>
Well, i did not see amba-pl011 pinctrl states defined in this patch.
But it would be ok if you can get it done and applied before this patch.
> > > Shawn Guo (9):
> > > ARM: mxs: enable pinctrl dummy states
> > > serial: amba-pl011: adopt pinctrl support
> > BTW, will this one break other platforms using this driver?
> >
> If the platforms do not turn on CONFIG_PINCTRL, they are fine. If they
> turn on the support, they should provide pinctrl state either dummy or
> real one.
>
Regards
Dong Aisheng
^ permalink raw reply
* Re: [alsa-devel] [PATCH RESEND 0/9] Enable pinctrl support for mach-mxs
From: Shawn Guo @ 2012-05-07 7:47 UTC (permalink / raw)
To: Dong Aisheng
Cc: linux-arm-kernel, linux-fbdev, Chris Ball, Arnd Bergmann,
Florian Tobias Schandinat, Artem Bityutskiy, Mark Brown,
linux-mmc, alsa-devel, Wolfram Sang, linux-mtd, linux-i2c,
linux-serial, Greg Kroah-Hartman, Olof Johansson
In-Reply-To: <20120507071400.GB23607@shlinux2.ap.freescale.net>
On Mon, May 07, 2012 at 03:14:00PM +0800, Dong Aisheng wrote:
> As IMX, basically i'd prefer to add pinctrl states in dts file at the
> same time within the patch or using a separate patch to add them before
> this series to avoid breaking the exist platforms.
>
> However i noted that for mxs, most drivers here are still not dt capable,
> so it may be ok to not add their pinctrl state at this time.
>
There no mxs driver on mainline that has been DT aware of. What I'm
going to do is to ask Arnd abandon the mxs/dt branch I sent him before
and send him an updated one with the whole mxs DT support based on
mxs common clk and pinctrl series.
> But for the patch "serial: amba-pl011: adopt pinctrl support" since it is
> dt capable, so with this patch applied, the mx28 dt boot will fail.
> Maybe we should at least add pinctrl states for amba-pl011 first.
>
The updated mxs/dt will have pinctrl defined in dts for each device
that is converted to DT.
> > Shawn Guo (9):
> > ARM: mxs: enable pinctrl dummy states
> > serial: amba-pl011: adopt pinctrl support
> BTW, will this one break other platforms using this driver?
>
If the platforms do not turn on CONFIG_PINCTRL, they are fine. If they
turn on the support, they should provide pinctrl state either dummy or
real one.
--
Regards,
Shawn
^ permalink raw reply
* Re: [alsa-devel] [PATCH RESEND 0/9] Enable pinctrl support for mach-mxs
From: Dong Aisheng @ 2012-05-07 7:14 UTC (permalink / raw)
To: Shawn Guo
Cc: linux-arm-kernel, linux-fbdev, Chris Ball, Arnd Bergmann,
Florian Tobias Schandinat, Artem Bityutskiy, Mark Brown,
linux-mmc, alsa-devel, Wolfram Sang, linux-mtd, linux-i2c,
linux-serial, Greg Kroah-Hartman, Olof Johansson
In-Reply-To: <1336353374-28939-1-git-send-email-shawn.guo@linaro.org>
On Mon, May 07, 2012 at 09:16:05AM +0800, Shawn Guo wrote:
> [Resend to have subsystem lists Cc-ed]
>
> With pinctrl-mxs driver (DT only) applied on pinctrl tree, the mxs
> device tree conversion can start basing on that support. This series
> adopts pinctrl support for mxs device drivers with a dummy pinctrl
> state provided for non-DT boot, so that the pinctrl call in the device
> drivers will be bypassed for non-DT probe while it starts working for
> DT probe.
>
> To ease the merge process, I would like to ask Arnd and Olof to pull
> pinctrl tree as a dependency in arm-soc and have this series go through
> arm-soc.
>
As IMX, basically i'd prefer to add pinctrl states in dts file at the
same time within the patch or using a separate patch to add them before
this series to avoid breaking the exist platforms.
However i noted that for mxs, most drivers here are still not dt capable,
so it may be ok to not add their pinctrl state at this time.
But for the patch "serial: amba-pl011: adopt pinctrl support" since it is
dt capable, so with this patch applied, the mx28 dt boot will fail.
Maybe we should at least add pinctrl states for amba-pl011 first.
> Regards,
> Shawn
>
> Shawn Guo (9):
> ARM: mxs: enable pinctrl dummy states
> serial: amba-pl011: adopt pinctrl support
BTW, will this one break other platforms using this driver?
> serial: mxs-auart: adopt pinctrl support
> mmc: mxs-mmc: adopt pinctrl support
> mtd: nand: gpmi: adopt pinctrl support
> i2c: mxs: adopt pinctrl support
> ASoC: mxs-saif: adopt pinctrl support
> video: mxsfb: adopt pinctrl support
> ARM: mxs: enable pinctrl support
>
> arch/arm/Kconfig | 1 +
> arch/arm/mach-mxs/Kconfig | 2 ++
> arch/arm/mach-mxs/include/mach/common.h | 2 ++
> arch/arm/mach-mxs/mach-apx4devkit.c | 2 ++
> arch/arm/mach-mxs/mach-m28evk.c | 2 ++
> arch/arm/mach-mxs/mach-mx23evk.c | 2 ++
> arch/arm/mach-mxs/mach-mx28evk.c | 2 ++
> arch/arm/mach-mxs/mach-stmp378x_devb.c | 2 ++
> arch/arm/mach-mxs/mach-tx28.c | 2 ++
> arch/arm/mach-mxs/mm.c | 11 +++++++++++
> drivers/i2c/busses/i2c-mxs.c | 6 ++++++
> drivers/mmc/host/mxs-mmc.c | 8 ++++++++
> drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 9 +++++++++
> drivers/tty/serial/amba-pl011.c | 8 ++++++++
> drivers/tty/serial/mxs-auart.c | 8 ++++++++
> drivers/video/mxsfb.c | 9 +++++++++
> sound/soc/mxs/mxs-saif.c | 8 ++++++++
> 17 files changed, 84 insertions(+), 0 deletions(-)
>
> --
> 1.7.5.4
>
Regards
Dong Aisheng
^ permalink raw reply
* [PATCH RESEND 8/9] video: mxsfb: adopt pinctrl support
From: Shawn Guo @ 2012-05-07 1:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1336353374-28939-1-git-send-email-shawn.guo@linaro.org>
Cc: linux-fbdev@vger.kernel.org
Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
drivers/video/mxsfb.c | 9 +++++++++
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
index 4a89f88..6c6bc57 100644
--- a/drivers/video/mxsfb.c
+++ b/drivers/video/mxsfb.c
@@ -45,6 +45,7 @@
#include <linux/clk.h>
#include <linux/dma-mapping.h>
#include <linux/io.h>
+#include <linux/pinctrl/consumer.h>
#include <mach/mxsfb.h>
#define REG_SET 4
@@ -756,6 +757,7 @@ static int __devinit mxsfb_probe(struct platform_device *pdev)
struct mxsfb_info *host;
struct fb_info *fb_info;
struct fb_modelist *modelist;
+ struct pinctrl *pinctrl;
int i, ret;
if (!pdata) {
@@ -793,6 +795,12 @@ static int __devinit mxsfb_probe(struct platform_device *pdev)
host->devdata = &mxsfb_devdata[pdev->id_entry->driver_data];
+ pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
+ if (IS_ERR(pinctrl)) {
+ ret = PTR_ERR(pinctrl);
+ goto error_getpin;
+ }
+
host->clk = clk_get(&host->pdev->dev, NULL);
if (IS_ERR(host->clk)) {
ret = PTR_ERR(host->clk);
@@ -848,6 +856,7 @@ error_init_fb:
error_pseudo_pallette:
clk_put(host->clk);
error_getclock:
+error_getpin:
iounmap(host->base);
error_ioremap:
framebuffer_release(fb_info);
--
1.7.5.4
^ permalink raw reply related
* [PATCH RESEND 0/9] Enable pinctrl support for mach-mxs
From: Shawn Guo @ 2012-05-07 1:16 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Arnd Bergmann, Olof Johansson, Shawn Guo, linux-fbdev,
Florian Tobias Schandinat, alsa-devel, Mark Brown, linux-i2c,
Wolfram Sang, linux-mtd, Artem Bityutskiy, linux-mmc, Chris Ball,
linux-serial, Greg Kroah-Hartman
[Resend to have subsystem lists Cc-ed]
With pinctrl-mxs driver (DT only) applied on pinctrl tree, the mxs
device tree conversion can start basing on that support. This series
adopts pinctrl support for mxs device drivers with a dummy pinctrl
state provided for non-DT boot, so that the pinctrl call in the device
drivers will be bypassed for non-DT probe while it starts working for
DT probe.
To ease the merge process, I would like to ask Arnd and Olof to pull
pinctrl tree as a dependency in arm-soc and have this series go through
arm-soc.
Regards,
Shawn
Shawn Guo (9):
ARM: mxs: enable pinctrl dummy states
serial: amba-pl011: adopt pinctrl support
serial: mxs-auart: adopt pinctrl support
mmc: mxs-mmc: adopt pinctrl support
mtd: nand: gpmi: adopt pinctrl support
i2c: mxs: adopt pinctrl support
ASoC: mxs-saif: adopt pinctrl support
video: mxsfb: adopt pinctrl support
ARM: mxs: enable pinctrl support
arch/arm/Kconfig | 1 +
arch/arm/mach-mxs/Kconfig | 2 ++
arch/arm/mach-mxs/include/mach/common.h | 2 ++
arch/arm/mach-mxs/mach-apx4devkit.c | 2 ++
arch/arm/mach-mxs/mach-m28evk.c | 2 ++
arch/arm/mach-mxs/mach-mx23evk.c | 2 ++
arch/arm/mach-mxs/mach-mx28evk.c | 2 ++
arch/arm/mach-mxs/mach-stmp378x_devb.c | 2 ++
arch/arm/mach-mxs/mach-tx28.c | 2 ++
arch/arm/mach-mxs/mm.c | 11 +++++++++++
drivers/i2c/busses/i2c-mxs.c | 6 ++++++
drivers/mmc/host/mxs-mmc.c | 8 ++++++++
drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 9 +++++++++
drivers/tty/serial/amba-pl011.c | 8 ++++++++
drivers/tty/serial/mxs-auart.c | 8 ++++++++
drivers/video/mxsfb.c | 9 +++++++++
sound/soc/mxs/mxs-saif.c | 8 ++++++++
17 files changed, 84 insertions(+), 0 deletions(-)
--
1.7.5.4
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