From: Andrew Jeffery <andrew@aj.id.au>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Joel Stanley <joel@jms.id.au>,
Mark Rutland <mark.rutland@arm.com>,
Rob Herring <robh+dt@kernel.org>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
openbmc@lists.ozlabs.org
Subject: Re: [PATCH 6/8] pinctrl: aspeed-g4: Capture SuperIO pinmux dependency
Date: Fri, 21 Oct 2016 11:03:31 +1030 [thread overview]
Message-ID: <1477010011.8917.20.camel@aj.id.au> (raw)
In-Reply-To: <CACRpkdYLDesENtq2cQBrWQeL6NH+mO_N5Z=e9=gsoZSCE85Jag@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 988 bytes --]
Hi Linus,
On Thu, 2016-10-20 at 13:53 +0200, Linus Walleij wrote:
> On Tue, Sep 27, 2016 at 4:50 PM, Andrew Jeffery <andrew@aj.id.au>
> wrote:
>
> >
> > Two LPC-related signals in the AST2400 depend on state in the
> > SuperIO IP
> > block. Use the recently added infrastructure to capture this
> > relationship.
> >
> > Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> Patch applied for v4.10.
> (Tell me if I'm applying patches in wrong order or something, and
> I hope this doesn't clash with the fixes.)
Both this patch and 8/8 functionally depend on 5/8. I fetched the
pinctrl tree to poke around but this patch didn't appear in any of the
updated branches, so I'm not sure whether we have the right ordering.
Without it we should hit build failures from missing macro definitions.
Have you had a chance to look over patch 5/8? Joel wasn't keen on its
current form, so I would appreciate your input.
Cheers,
Andrew
>
> Yours,
> Linus Walleij
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next prev parent reply other threads:[~2016-10-21 0:33 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-27 14:50 [PATCH 0/8] pinctrl: aspeed: Fixes for core and g5, implement remaining pins Andrew Jeffery
2016-09-27 14:50 ` [PATCH 2/8] pinctrl: aspeed-g5: Fix names of GPID2 pins Andrew Jeffery
[not found] ` <69eda17c16684f4212a9f3e64d9587abfcc7ae74.1474986045.git-series.andrew-zrmu5oMJ5Fs@public.gmane.org>
2016-09-29 0:54 ` Joel Stanley
2016-10-10 7:56 ` Linus Walleij
2016-09-27 14:50 ` [PATCH 3/8] pinctrl: aspeed-g5: Fix GPIOE1 typo Andrew Jeffery
2016-09-29 0:54 ` Joel Stanley
2016-10-10 7:57 ` Linus Walleij
2016-09-27 14:50 ` [PATCH 5/8] pinctrl: aspeed: Enable capture of off-SCU pinmux state Andrew Jeffery
[not found] ` <a266046d34009e6e92c4c76699c550c2ba44bd5c.1474986045.git-series.andrew-zrmu5oMJ5Fs@public.gmane.org>
2016-09-29 6:45 ` Joel Stanley
2016-09-29 7:54 ` Andrew Jeffery
2016-10-23 22:20 ` Linus Walleij
2016-10-24 0:29 ` Andrew Jeffery
2016-09-27 14:50 ` [PATCH 6/8] pinctrl: aspeed-g4: Capture SuperIO pinmux dependency Andrew Jeffery
[not found] ` <b5f67ba76018314d08e240f95951751896687d37.1474986045.git-series.andrew-zrmu5oMJ5Fs@public.gmane.org>
2016-10-20 11:53 ` Linus Walleij
2016-10-21 0:33 ` Andrew Jeffery [this message]
[not found] ` <1477010011.8917.20.camel-zrmu5oMJ5Fs@public.gmane.org>
2016-10-23 22:09 ` Linus Walleij
[not found] ` <CACRpkdYZPcjGuRKVL6qwof1p7ZXT4EvwzAuz59oTgp9Z5Dzixw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-10-24 0:30 ` Andrew Jeffery
2016-09-27 14:50 ` [PATCH 7/8] pinctrl: aspeed-g4: Add mux configuration for all pins Andrew Jeffery
2016-09-29 0:54 ` Joel Stanley
[not found] ` <e0d8fa6cd444972e6f048f98da98f0439e6ca39b.1474986045.git-series.andrew-zrmu5oMJ5Fs@public.gmane.org>
2016-10-03 19:08 ` Rob Herring
2016-10-04 1:02 ` Andrew Jeffery
2016-09-27 14:50 ` [PATCH 8/8] pinctrl: aspeed-g5: " Andrew Jeffery
2016-09-29 0:54 ` Joel Stanley
2016-10-10 0:53 ` Rob Herring
[not found] ` <cover.115463f791b69859c5ce9dafd61a5755ea039f4b.1474986045.git-series.andrew-zrmu5oMJ5Fs@public.gmane.org>
2016-09-27 14:50 ` [PATCH 1/8] pinctrl: aspeed: "Not enabled" is a significant mux state Andrew Jeffery
2016-09-29 0:54 ` Joel Stanley
2016-10-10 7:55 ` Linus Walleij
2016-09-27 14:50 ` [PATCH 4/8] pinctrl: aspeed-g5: Fix pin association of SPI1 function Andrew Jeffery
[not found] ` <bdd34f8c4bfabbc1d3cd05a66ac8734da514b1e5.1474986045.git-series.andrew-zrmu5oMJ5Fs@public.gmane.org>
2016-09-29 0:54 ` Joel Stanley
2016-10-03 18:57 ` Rob Herring
2016-10-10 7:59 ` Linus Walleij
2016-10-10 7:59 ` [PATCH 0/8] pinctrl: aspeed: Fixes for core and g5, implement remaining pins Linus Walleij
2016-10-10 23:27 ` Andrew Jeffery
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