* [PATCH v2] gpio: tegra186: Fix tegra186_gpio_is_accessible() check [not found] <CACMJSeu+fUdYoxue-q=DxFdvtopgshQY+i2kpZMP-RGOTqMu_g@mail.gmail.com> @ 2024-04-23 12:00 ` Prathamesh Shete 2024-04-24 8:31 ` Bartosz Golaszewski 0 siblings, 1 reply; 4+ messages in thread From: Prathamesh Shete @ 2024-04-23 12:00 UTC (permalink / raw) To: linus.walleij, brgl, jonathanh, treding, sfr, linux-gpio, linux-tegra, linux-kernel Cc: mochs, csoto, pshete, jamien, smangipudi The controller has several register bits describing access control information for a given GPIO pin. When SCR_SEC_[R|W]EN is unset, it means we have full read/write access to all the registers for given GPIO pin. When SCR_SEC[R|W]EN is set, it means we need to further check the accompanying SCR_SEC_G1[R|W] bit to determine read/write access to all the registers for given GPIO pin. This check was previously declaring that a GPIO pin was accessible only if either of the following conditions were met: - SCR_SEC_REN + SCR_SEC_WEN both set or - SCR_SEC_REN + SCR_SEC_WEN both set and SCR_SEC_G1R + SCR_SEC_G1W both set Update the check to properly handle cases where only one of SCR_SEC_REN or SCR_SEC_WEN is set. Fixes: b2b56a163230 ("gpio: tegra186: Check GPIO pin permission before access.") Signed-off-by: Prathamesh Shete <pshete@nvidia.com> --- drivers/gpio/gpio-tegra186.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/gpio/gpio-tegra186.c b/drivers/gpio/gpio-tegra186.c index d87dd06db40d..9130c691a2dd 100644 --- a/drivers/gpio/gpio-tegra186.c +++ b/drivers/gpio/gpio-tegra186.c @@ -36,12 +36,6 @@ #define TEGRA186_GPIO_SCR_SEC_REN BIT(27) #define TEGRA186_GPIO_SCR_SEC_G1W BIT(9) #define TEGRA186_GPIO_SCR_SEC_G1R BIT(1) -#define TEGRA186_GPIO_FULL_ACCESS (TEGRA186_GPIO_SCR_SEC_WEN | \ - TEGRA186_GPIO_SCR_SEC_REN | \ - TEGRA186_GPIO_SCR_SEC_G1R | \ - TEGRA186_GPIO_SCR_SEC_G1W) -#define TEGRA186_GPIO_SCR_SEC_ENABLE (TEGRA186_GPIO_SCR_SEC_WEN | \ - TEGRA186_GPIO_SCR_SEC_REN) /* control registers */ #define TEGRA186_GPIO_ENABLE_CONFIG 0x00 @@ -177,10 +171,18 @@ static inline bool tegra186_gpio_is_accessible(struct tegra_gpio *gpio, unsigned value = __raw_readl(secure + TEGRA186_GPIO_SCR); - if ((value & TEGRA186_GPIO_SCR_SEC_ENABLE) == 0) - return true; + /* + * When SCR_SEC_[R|W]EN is unset, then we have full read/write access to all the + * registers for given GPIO pin. + * When SCR_SEC[R|W]EN is set, then there is need to further check the accompanying + * SCR_SEC_G1[R|W] bit to determine read/write access to all the registers for given + * GPIO pin. + */ - if ((value & TEGRA186_GPIO_FULL_ACCESS) == TEGRA186_GPIO_FULL_ACCESS) + if (((value & TEGRA186_GPIO_SCR_SEC_REN) == 0 || + ((value & TEGRA186_GPIO_SCR_SEC_REN) && (value & TEGRA186_GPIO_SCR_SEC_G1R))) && + ((value & TEGRA186_GPIO_SCR_SEC_WEN) == 0 || + ((value & TEGRA186_GPIO_SCR_SEC_WEN) && (value & TEGRA186_GPIO_SCR_SEC_G1W)))) return true; return false; -- 2.17.1 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v2] gpio: tegra186: Fix tegra186_gpio_is_accessible() check 2024-04-23 12:00 ` [PATCH v2] gpio: tegra186: Fix tegra186_gpio_is_accessible() check Prathamesh Shete @ 2024-04-24 8:31 ` Bartosz Golaszewski 2024-04-24 9:55 ` [PATCH v3] " Prathamesh Shete 0 siblings, 1 reply; 4+ messages in thread From: Bartosz Golaszewski @ 2024-04-24 8:31 UTC (permalink / raw) To: Prathamesh Shete Cc: linus.walleij, jonathanh, treding, sfr, linux-gpio, linux-tegra, linux-kernel, mochs, csoto, jamien, smangipudi On Tue, Apr 23, 2024 at 2:00 PM Prathamesh Shete <pshete@nvidia.com> wrote: > > The controller has several register bits describing access control > information for a given GPIO pin. When SCR_SEC_[R|W]EN is unset, it > means we have full read/write access to all the registers for given GPIO > pin. When SCR_SEC[R|W]EN is set, it means we need to further check the > accompanying SCR_SEC_G1[R|W] bit to determine read/write access to all > the registers for given GPIO pin. > > This check was previously declaring that a GPIO pin was accessible > only if either of the following conditions were met: > > - SCR_SEC_REN + SCR_SEC_WEN both set > > or > > - SCR_SEC_REN + SCR_SEC_WEN both set and > SCR_SEC_G1R + SCR_SEC_G1W both set > > Update the check to properly handle cases where only one of > SCR_SEC_REN or SCR_SEC_WEN is set. > > Fixes: b2b56a163230 ("gpio: tegra186: Check GPIO pin permission before access.") > Signed-off-by: Prathamesh Shete <pshete@nvidia.com> > --- No changelog since v1. No Thierry's tag. Please resend. Bart ^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v3] gpio: tegra186: Fix tegra186_gpio_is_accessible() check 2024-04-24 8:31 ` Bartosz Golaszewski @ 2024-04-24 9:55 ` Prathamesh Shete 2024-04-24 13:32 ` Bartosz Golaszewski 0 siblings, 1 reply; 4+ messages in thread From: Prathamesh Shete @ 2024-04-24 9:55 UTC (permalink / raw) To: linus.walleij, brgl, jonathanh, treding, sfr, linux-gpio, linux-tegra, linux-kernel Cc: mochs, csoto, pshete, jamien, smangipudi The controller has several register bits describing access control information for a given GPIO pin. When SCR_SEC_[R|W]EN is unset, it means we have full read/write access to all the registers for given GPIO pin. When SCR_SEC[R|W]EN is set, it means we need to further check the accompanying SCR_SEC_G1[R|W] bit to determine read/write access to all the registers for given GPIO pin. This check was previously declaring that a GPIO pin was accessible only if either of the following conditions were met: - SCR_SEC_REN + SCR_SEC_WEN both set or - SCR_SEC_REN + SCR_SEC_WEN both set and SCR_SEC_G1R + SCR_SEC_G1W both set Update the check to properly handle cases where only one of SCR_SEC_REN or SCR_SEC_WEN is set. Fixes: b2b56a163230 ("gpio: tegra186: Check GPIO pin permission before access.") Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> --- V2 -> V3: Retain Thierry's 'Acked-by' tag from V1 and add change log. V1 -> V2: Fix kernel test bot warning. drivers/gpio/gpio-tegra186.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/gpio/gpio-tegra186.c b/drivers/gpio/gpio-tegra186.c index d87dd06db40d..9130c691a2dd 100644 --- a/drivers/gpio/gpio-tegra186.c +++ b/drivers/gpio/gpio-tegra186.c @@ -36,12 +36,6 @@ #define TEGRA186_GPIO_SCR_SEC_REN BIT(27) #define TEGRA186_GPIO_SCR_SEC_G1W BIT(9) #define TEGRA186_GPIO_SCR_SEC_G1R BIT(1) -#define TEGRA186_GPIO_FULL_ACCESS (TEGRA186_GPIO_SCR_SEC_WEN | \ - TEGRA186_GPIO_SCR_SEC_REN | \ - TEGRA186_GPIO_SCR_SEC_G1R | \ - TEGRA186_GPIO_SCR_SEC_G1W) -#define TEGRA186_GPIO_SCR_SEC_ENABLE (TEGRA186_GPIO_SCR_SEC_WEN | \ - TEGRA186_GPIO_SCR_SEC_REN) /* control registers */ #define TEGRA186_GPIO_ENABLE_CONFIG 0x00 @@ -177,10 +171,18 @@ static inline bool tegra186_gpio_is_accessible(struct tegra_gpio *gpio, unsigned value = __raw_readl(secure + TEGRA186_GPIO_SCR); - if ((value & TEGRA186_GPIO_SCR_SEC_ENABLE) == 0) - return true; + /* + * When SCR_SEC_[R|W]EN is unset, then we have full read/write access to all the + * registers for given GPIO pin. + * When SCR_SEC[R|W]EN is set, then there is need to further check the accompanying + * SCR_SEC_G1[R|W] bit to determine read/write access to all the registers for given + * GPIO pin. + */ - if ((value & TEGRA186_GPIO_FULL_ACCESS) == TEGRA186_GPIO_FULL_ACCESS) + if (((value & TEGRA186_GPIO_SCR_SEC_REN) == 0 || + ((value & TEGRA186_GPIO_SCR_SEC_REN) && (value & TEGRA186_GPIO_SCR_SEC_G1R))) && + ((value & TEGRA186_GPIO_SCR_SEC_WEN) == 0 || + ((value & TEGRA186_GPIO_SCR_SEC_WEN) && (value & TEGRA186_GPIO_SCR_SEC_G1W)))) return true; return false; -- 2.17.1 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v3] gpio: tegra186: Fix tegra186_gpio_is_accessible() check 2024-04-24 9:55 ` [PATCH v3] " Prathamesh Shete @ 2024-04-24 13:32 ` Bartosz Golaszewski 0 siblings, 0 replies; 4+ messages in thread From: Bartosz Golaszewski @ 2024-04-24 13:32 UTC (permalink / raw) To: linus.walleij, brgl, jonathanh, treding, sfr, linux-gpio, linux-tegra, linux-kernel, Prathamesh Shete Cc: Bartosz Golaszewski, mochs, csoto, jamien, smangipudi From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> On Wed, 24 Apr 2024 15:25:14 +0530, Prathamesh Shete wrote: > The controller has several register bits describing access control > information for a given GPIO pin. When SCR_SEC_[R|W]EN is unset, it > means we have full read/write access to all the registers for given GPIO > pin. When SCR_SEC[R|W]EN is set, it means we need to further check the > accompanying SCR_SEC_G1[R|W] bit to determine read/write access to all > the registers for given GPIO pin. > > [...] Applied, thanks! [1/1] gpio: tegra186: Fix tegra186_gpio_is_accessible() check commit: d806f474a9a7993648a2c70642ee129316d8deff Best regards, -- Bartosz Golaszewski <bartosz.golaszewski@linaro.org> ^ permalink raw reply [flat|nested] 4+ messages in thread
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[not found] <CACMJSeu+fUdYoxue-q=DxFdvtopgshQY+i2kpZMP-RGOTqMu_g@mail.gmail.com>
2024-04-23 12:00 ` [PATCH v2] gpio: tegra186: Fix tegra186_gpio_is_accessible() check Prathamesh Shete
2024-04-24 8:31 ` Bartosz Golaszewski
2024-04-24 9:55 ` [PATCH v3] " Prathamesh Shete
2024-04-24 13:32 ` Bartosz Golaszewski
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