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* [PATCH] gpio: aspeed: fix AST2700 debounce selector bit definitions
@ 2026-04-15 10:24 Billy Tsai
  2026-04-20  9:15 ` Bartosz Golaszewski
  0 siblings, 1 reply; 2+ messages in thread
From: Billy Tsai @ 2026-04-15 10:24 UTC (permalink / raw)
  To: Linus Walleij, Bartosz Golaszewski, Joel Stanley, Andrew Jeffery
  Cc: linux-gpio, linux-arm-kernel, linux-aspeed, linux-kernel,
	Billy Tsai

The AST2700 datasheet defines reg_debounce_sel1 as the low bit and
reg_debounce_sel2 as the high bit. The current driver uses the AST2600
mapping instead, where sel1 is the high bit and sel2 is the low bit.

As a result, the debounce selector bits are programmed in reverse on
AST2700. Swap the G7 sel1/sel2 bit definitions so the driver matches the
hardware definition.

Fixes: b2e861bd1eaf ("gpio: aspeed: Support G7 Aspeed gpio controller")
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
---
 drivers/gpio/gpio-aspeed.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c
index 9115e56a1626..98b5bfbc04a3 100644
--- a/drivers/gpio/gpio-aspeed.c
+++ b/drivers/gpio/gpio-aspeed.c
@@ -42,8 +42,8 @@
 #define GPIO_G7_CTRL_IRQ_TYPE1 BIT(4)
 #define GPIO_G7_CTRL_IRQ_TYPE2 BIT(5)
 #define GPIO_G7_CTRL_RST_TOLERANCE BIT(6)
-#define GPIO_G7_CTRL_DEBOUNCE_SEL1 BIT(7)
-#define GPIO_G7_CTRL_DEBOUNCE_SEL2 BIT(8)
+#define GPIO_G7_CTRL_DEBOUNCE_SEL2 BIT(7)
+#define GPIO_G7_CTRL_DEBOUNCE_SEL1 BIT(8)
 #define GPIO_G7_CTRL_INPUT_MASK BIT(9)
 #define GPIO_G7_CTRL_IRQ_STS BIT(12)
 #define GPIO_G7_CTRL_IN_DATA BIT(13)

---
base-commit: 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f
change-id: 20260415-gpio-fix-1745583ecf06

Best regards,
-- 
Billy Tsai <billy_tsai@aspeedtech.com>


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] gpio: aspeed: fix AST2700 debounce selector bit definitions
  2026-04-15 10:24 [PATCH] gpio: aspeed: fix AST2700 debounce selector bit definitions Billy Tsai
@ 2026-04-20  9:15 ` Bartosz Golaszewski
  0 siblings, 0 replies; 2+ messages in thread
From: Bartosz Golaszewski @ 2026-04-20  9:15 UTC (permalink / raw)
  To: Linus Walleij, Bartosz Golaszewski, Joel Stanley, Andrew Jeffery,
	Billy Tsai
  Cc: Bartosz Golaszewski, linux-gpio, linux-arm-kernel, linux-aspeed,
	linux-kernel


On Wed, 15 Apr 2026 18:24:42 +0800, Billy Tsai wrote:
> The AST2700 datasheet defines reg_debounce_sel1 as the low bit and
> reg_debounce_sel2 as the high bit. The current driver uses the AST2600
> mapping instead, where sel1 is the high bit and sel2 is the low bit.
> 
> As a result, the debounce selector bits are programmed in reverse on
> AST2700. Swap the G7 sel1/sel2 bit definitions so the driver matches the
> hardware definition.
> 
> [...]

Applied, thanks!

[1/1] gpio: aspeed: fix AST2700 debounce selector bit definitions
      https://git.kernel.org/brgl/c/e31eee4a961077d60ef2362507240c6743c1c2ae

Best regards,
-- 
Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2026-04-20  9:16 UTC | newest]

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2026-04-15 10:24 [PATCH] gpio: aspeed: fix AST2700 debounce selector bit definitions Billy Tsai
2026-04-20  9:15 ` Bartosz Golaszewski

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