[PATCH 0/2] upboard pinctrl support for device id INTC1055

[PATCH 0/2] upboard pinctrl support for device id INTC1055

[GaryWang]

Add missing groups and functions in Tigerlake's pinctrl driver for INTC1055.
Add support "UP Xtreme i12", "UP Squared Pro 7000", "UP Squared i12", "UP 7000" boards.

Signed-off-by: GaryWang <is0124@gmail.com>
---
GaryWang (2):
      pinctrl: tigerlake: add some pin groups and functions for INTC1055
      pinctrl: upboard: add device id INTC1055 based UP boards support

 drivers/pinctrl/intel/pinctrl-tigerlake.c | 32 ++++++++++++++++++++++
 drivers/pinctrl/pinctrl-upboard.c         | 45 +++++++++++++++++++++++++++++++
 2 files changed, 77 insertions(+)
---
base-commit: e43ffb69e0438cddd72aaa30898b4dc446f664f8
change-id: 20260609-upboard-pinctrl-add-upboard-intc1055-support-bd1d81311b7a

Best regards,
-- 
GaryWang <is0124@gmail.com>

[PATCH 1/2] pinctrl: tigerlake: add some pin groups and functions for INTC1055

[GaryWang]

Add i2c0, i2c1, pwm0, uart1, ssp2 pin groups & functions in tgllp_soc_data
 for device id INTC1055.

Signed-off-by: GaryWang <is0124@gmail.com>
---
 drivers/pinctrl/intel/pinctrl-tigerlake.c | 32 +++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/drivers/pinctrl/intel/pinctrl-tigerlake.c b/drivers/pinctrl/intel/pinctrl-tigerlake.c
index ae231f7fba49..aeb031570536 100644
--- a/drivers/pinctrl/intel/pinctrl-tigerlake.c
+++ b/drivers/pinctrl/intel/pinctrl-tigerlake.c
@@ -330,6 +330,34 @@ static const struct pinctrl_pin_desc tgllp_pins[] = {
 	PINCTRL_PIN(276, "SPI0_CLK_LOOPBK"),
 };
 
+static const unsigned int tgllp_i2c0_pins[] = { 5, 6 };
+static const unsigned int tgllp_i2c1_pins[] = { 7, 8 };
+static const unsigned int tgllp_pwm0_pins[] = { 99 };
+static const unsigned int tgllp_uart1_pins[] = { 85, 86, 87, 88 };
+static const unsigned int tgllp_ssp2_pins[] = { 108, 109, 110, 111 };
+
+static const struct intel_pingroup tgllp_groups[] = {
+	PIN_GROUP("i2c0_grp", tgllp_i2c0_pins, 2),
+	PIN_GROUP("i2c1_grp", tgllp_i2c1_pins, 2),
+	PIN_GROUP("pwm0_grp", tgllp_pwm0_pins, 1),
+	PIN_GROUP("uart1_grp", tgllp_uart1_pins, 1),
+	PIN_GROUP("ssp2_grp", tgllp_ssp2_pins, 7),
+};
+
+static const char * const tgllp_i2c0_groups[] = { "i2c0_grp" };
+static const char * const tgllp_i2c1_groups[] = { "i2c1_grp" };
+static const char * const tgllp_pwm0_groups[] = { "pwm0_grp" };
+static const char * const tgllp_uart1_groups[] = { "uart1_grp" };
+static const char * const tgllp_ssp2_groups[] = { "ssp2_grp" };
+
+static const struct intel_function tgllp_functions[] = {
+	FUNCTION("i2c0", tgllp_i2c0_groups),
+	FUNCTION("i2c1", tgllp_i2c1_groups),
+	FUNCTION("pwm0", tgllp_pwm0_groups),
+	FUNCTION("uart1", tgllp_uart1_groups),
+	FUNCTION("ssp2", tgllp_ssp2_groups),
+};
+
 static const struct intel_padgroup tgllp_community0_gpps[] = {
 	INTEL_GPP(0, 0, 25, 0),				/* GPP_B */
 	INTEL_GPP(1, 26, 41, 32),			/* GPP_T */
@@ -367,6 +395,10 @@ static const struct intel_community tgllp_communities[] = {
 static const struct intel_pinctrl_soc_data tgllp_soc_data = {
 	.pins = tgllp_pins,
 	.npins = ARRAY_SIZE(tgllp_pins),
+	.groups = tgllp_groups,
+	.ngroups = ARRAY_SIZE(tgllp_groups),
+	.functions = tgllp_functions,
+	.nfunctions = ARRAY_SIZE(tgllp_functions),
 	.communities = tgllp_communities,
 	.ncommunities = ARRAY_SIZE(tgllp_communities),
 };

-- 
2.43.0

Re: [PATCH 1/2] pinctrl: tigerlake: add some pin groups and functions for INTC1055

[Mika Westerberg]

On Wed, Jun 10, 2026 at 04:34:23PM +0800, GaryWang wrote:
> Add i2c0, i2c1, pwm0, uart1, ssp2 pin groups & functions in tgllp_soc_data
>  for device id INTC1055.

Okay we can see that from the code but why? Can you explain it here too?

> 
> Signed-off-by: GaryWang <is0124@gmail.com>
> ---
>  drivers/pinctrl/intel/pinctrl-tigerlake.c | 32 +++++++++++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/drivers/pinctrl/intel/pinctrl-tigerlake.c b/drivers/pinctrl/intel/pinctrl-tigerlake.c
> index ae231f7fba49..aeb031570536 100644
> --- a/drivers/pinctrl/intel/pinctrl-tigerlake.c
> +++ b/drivers/pinctrl/intel/pinctrl-tigerlake.c
> @@ -330,6 +330,34 @@ static const struct pinctrl_pin_desc tgllp_pins[] = {
>  	PINCTRL_PIN(276, "SPI0_CLK_LOOPBK"),
>  };
>  
> +static const unsigned int tgllp_i2c0_pins[] = { 5, 6 };
> +static const unsigned int tgllp_i2c1_pins[] = { 7, 8 };
> +static const unsigned int tgllp_pwm0_pins[] = { 99 };
> +static const unsigned int tgllp_uart1_pins[] = { 85, 86, 87, 88 };
> +static const unsigned int tgllp_ssp2_pins[] = { 108, 109, 110, 111 };
> +
> +static const struct intel_pingroup tgllp_groups[] = {
> +	PIN_GROUP("i2c0_grp", tgllp_i2c0_pins, 2),
> +	PIN_GROUP("i2c1_grp", tgllp_i2c1_pins, 2),
> +	PIN_GROUP("pwm0_grp", tgllp_pwm0_pins, 1),
> +	PIN_GROUP("uart1_grp", tgllp_uart1_pins, 1),
> +	PIN_GROUP("ssp2_grp", tgllp_ssp2_pins, 7),
> +};
> +
> +static const char * const tgllp_i2c0_groups[] = { "i2c0_grp" };
> +static const char * const tgllp_i2c1_groups[] = { "i2c1_grp" };
> +static const char * const tgllp_pwm0_groups[] = { "pwm0_grp" };
> +static const char * const tgllp_uart1_groups[] = { "uart1_grp" };
> +static const char * const tgllp_ssp2_groups[] = { "ssp2_grp" };
> +
> +static const struct intel_function tgllp_functions[] = {
> +	FUNCTION("i2c0", tgllp_i2c0_groups),
> +	FUNCTION("i2c1", tgllp_i2c1_groups),
> +	FUNCTION("pwm0", tgllp_pwm0_groups),
> +	FUNCTION("uart1", tgllp_uart1_groups),
> +	FUNCTION("ssp2", tgllp_ssp2_groups),
> +};
> +
>  static const struct intel_padgroup tgllp_community0_gpps[] = {
>  	INTEL_GPP(0, 0, 25, 0),				/* GPP_B */
>  	INTEL_GPP(1, 26, 41, 32),			/* GPP_T */
> @@ -367,6 +395,10 @@ static const struct intel_community tgllp_communities[] = {
>  static const struct intel_pinctrl_soc_data tgllp_soc_data = {
>  	.pins = tgllp_pins,
>  	.npins = ARRAY_SIZE(tgllp_pins),
> +	.groups = tgllp_groups,
> +	.ngroups = ARRAY_SIZE(tgllp_groups),
> +	.functions = tgllp_functions,
> +	.nfunctions = ARRAY_SIZE(tgllp_functions),
>  	.communities = tgllp_communities,
>  	.ncommunities = ARRAY_SIZE(tgllp_communities),
>  };
> 
> -- 
> 2.43.0

Re: [PATCH 1/2] pinctrl: tigerlake: add some pin groups and functions for INTC1055

[Andy Shevchenko]

On Wed, Jun 10, 2026 at 04:24:09PM +0200, Mika Westerberg wrote:
> On Wed, Jun 10, 2026 at 04:34:23PM +0800, GaryWang wrote:
> > Add i2c0, i2c1, pwm0, uart1, ssp2 pin groups & functions in tgllp_soc_data
> >  for device id INTC1055.
> 
> Okay we can see that from the code but why? Can you explain it here too?

Yeah, good point. I know the why? because I reviewed the pinctrl-upboard
driver, but unprepared reader doesn't know all the details.

-- 
With Best Regards,
Andy Shevchenko

[PATCH 2/2] pinctrl: upboard: add device id INTC1055 based UP boards support

[GaryWang]

Add support "UP Xtreme i12", "UP Squared Pro 7000", "UP Squared i12",
 "UP 7000" boards and I2C/PWM/UART/SPI pins mapping data.

Signed-off-by: GaryWang <is0124@gmail.com>
---
 drivers/pinctrl/pinctrl-upboard.c | 45 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-upboard.c b/drivers/pinctrl/pinctrl-upboard.c
index f8c8b9d84990..09018b665ee3 100644
--- a/drivers/pinctrl/pinctrl-upboard.c
+++ b/drivers/pinctrl/pinctrl-upboard.c
@@ -912,6 +912,19 @@ static const struct upboard_pinctrl_map upboard_pinctrl_map_apl01 = {
 	.nmaps = ARRAY_SIZE(pinctrl_map_apl01),
 };
 
+static const struct pinctrl_map pinctrl_map_adl[] = {
+	PIN_MAP_MUX_GROUP_DEFAULT("upboard-pinctrl", "INTC1055:00", "i2c0_grp", "i2c0"),
+	PIN_MAP_MUX_GROUP_DEFAULT("upboard-pinctrl", "INTC1055:00", "i2c1_grp", "i2c1"),
+	PIN_MAP_MUX_GROUP_DEFAULT("upboard-pinctrl", "INTC1055:00", "pwm0_grp", "pwm0"),
+	PIN_MAP_MUX_GROUP_DEFAULT("upboard-pinctrl", "INTC1055:00", "uart1_grp", "uart1"),
+	PIN_MAP_MUX_GROUP_DEFAULT("upboard-pinctrl", "INTC1055:00", "ssp2_grp", "ssp2"),
+};
+
+static const struct upboard_pinctrl_map upboard_pinctrl_map_adl = {
+	.maps = &pinctrl_map_adl[0],
+	.nmaps = ARRAY_SIZE(pinctrl_map_adl),
+};
+
 static const struct dmi_system_id dmi_platform_info[] = {
 	{
 		/* UP Squared */
@@ -921,6 +934,38 @@ static const struct dmi_system_id dmi_platform_info[] = {
 		},
 		.driver_data = (void *)&upboard_pinctrl_map_apl01,
 	},
+	{
+		/* UP Xtreme i12 */
+		.matches = {
+			DMI_EXACT_MATCH(DMI_SYS_VENDOR, "AAEON"),
+			DMI_EXACT_MATCH(DMI_BOARD_NAME, "UPX-ADLP01"),
+		},
+		.driver_data = (void *)&upboard_pinctrl_map_adl,
+	},
+	{
+		/* UP Squared Pro 7000 */
+		.matches = {
+			DMI_EXACT_MATCH(DMI_SYS_VENDOR, "AAEON"),
+			DMI_EXACT_MATCH(DMI_BOARD_NAME, "UPN-ADLN01"),
+		},
+		.driver_data = (void *)&upboard_pinctrl_map_adl,
+	},
+	{
+		/* UP Squared i12 */
+		.matches = {
+			DMI_EXACT_MATCH(DMI_SYS_VENDOR, "AAEON"),
+			DMI_EXACT_MATCH(DMI_BOARD_NAME, "UPS-ADLP01"),
+		},
+		.driver_data = (void *)&upboard_pinctrl_map_adl,
+	},
+	{
+		/* UP 7000 */
+		.matches = {
+			DMI_EXACT_MATCH(DMI_SYS_VENDOR, "AAEON"),
+			DMI_EXACT_MATCH(DMI_BOARD_NAME, "UP-ADLN01"),
+		},
+		.driver_data = (void *)&upboard_pinctrl_map_adl,
+	},
 	{ }
 };
 

-- 
2.43.0

Re: [PATCH 0/2] upboard pinctrl support for device id INTC1055

[Andy Shevchenko]

On Wed, Jun 10, 2026 at 04:34:22PM +0800, GaryWang wrote:
> Add missing groups and functions in Tigerlake's pinctrl driver for INTC1055.
> Add support "UP Xtreme i12", "UP Squared Pro 7000", "UP Squared i12", "UP 7000" boards.

I can take both via Intel pin control tree, just waiting for Mika's and Linus' acks.
Then I can send PR to Linus to (try to) include this to v7.2-rc2 as it seems close
enough to the category of adding new HW support without breaking anything else.

-- 
With Best Regards,
Andy Shevchenko