Linux GPIO subsystem development
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From: Tomer Maimon <tmaimon77@gmail.com>
To: andrew@codeconstruct.com.au, linusw@kernel.org, brgl@kernel.org
Cc: openbmc@lists.ozlabs.org, linux-gpio@vger.kernel.org,
	linux-kernel@vger.kernel.org, avifishman70@gmail.com,
	tmaimon77@gmail.com, tali.perry1@gmail.com, venture@google.com,
	yuenn@google.com, benjaminfair@google.com
Subject: [PATCH v1 6/8] pinctrl: npcm8xx: move GPIO IRQ setup into request_resources
Date: Wed, 15 Jul 2026 15:29:21 +0300	[thread overview]
Message-ID: <20260715122923.1938327-7-tmaimon77@gmail.com> (raw)
In-Reply-To: <20260715122923.1938327-1-tmaimon77@gmail.com>

npcmgpio_irq_startup() calls pinctrl_gpio_direction_input(), which may
sleep while taking the pinctrl core mutex. That makes IRQ startup trip
lockdep when CONFIG_PROVE_LOCKING is enabled.

Move the direction change into irq_request_resources() and keep startup
limited to the ack and unmask operations that are safe in atomic
context.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
---
 drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 29 ++++++++++++++++++-----
 1 file changed, 23 insertions(+), 6 deletions(-)

diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
index 1c95d7cbd..e21ccdb5d 100644
--- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
+++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
@@ -297,17 +297,33 @@ static void npcmgpio_irq_unmask(struct irq_data *d)
 
 static unsigned int npcmgpio_irq_startup(struct irq_data *d)
 {
-	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
-	unsigned int gpio = irqd_to_hwirq(d);
-
-	/* active-high, input, clear interrupt, enable interrupt */
-	npcmgpio_direction_input(gc, gpio);
 	npcmgpio_irq_ack(d);
 	npcmgpio_irq_unmask(d);
 
 	return 0;
 }
 
+static int npcmgpio_irq_request_resources(struct irq_data *d)
+{
+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+	unsigned int gpio = irqd_to_hwirq(d);
+	int ret;
+
+	ret = npcmgpio_direction_input(gc, gpio);
+	if (ret)
+		return ret;
+
+	return gpiochip_reqres_irq(gc, gpio);
+}
+
+static void npcmgpio_irq_release_resources(struct irq_data *d)
+{
+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+	unsigned int gpio = irqd_to_hwirq(d);
+
+	gpiochip_relres_irq(gc, gpio);
+}
+
 static struct irq_chip npcmgpio_irqchip = {
 	.name = "NPCM8XX-GPIO-IRQ",
 	.irq_ack = npcmgpio_irq_ack,
@@ -315,8 +331,9 @@ static struct irq_chip npcmgpio_irqchip = {
 	.irq_mask = npcmgpio_irq_mask,
 	.irq_set_type = npcmgpio_set_irq_type,
 	.irq_startup = npcmgpio_irq_startup,
+	.irq_request_resources = npcmgpio_irq_request_resources,
+	.irq_release_resources = npcmgpio_irq_release_resources,
 	.flags =  IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE,
-	GPIOCHIP_IRQ_RESOURCE_HELPERS,
 };
 
 static const int gpi36_pins[] = { 36 };
-- 
2.34.1


  parent reply	other threads:[~2026-07-15 12:29 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-15 12:29 [PATCH v1 0/8] pinctrl: npcm8xx: fix pinmuxing and configuration handling Tomer Maimon
2026-07-15 12:29 ` [PATCH v1 1/8] pinctrl: npcm8xx: drop RTS/CTS pins from bmcuart1 Tomer Maimon
2026-07-15 12:29 ` [PATCH v1 2/8] pinctrl: npcm8xx: enable RMII outputs from RMII groups Tomer Maimon
2026-07-15 12:29 ` [PATCH v1 3/8] pinctrl: npcm8xx: support RG2 drive strength selection Tomer Maimon
2026-07-15 12:29 ` [PATCH v1 4/8] pinctrl: npcm8xx: clear pending GPIO events during init Tomer Maimon
2026-07-15 12:29 ` [PATCH v1 5/8] pinctrl: npcm8xx: rename GPIO7 IOX2 signal to DO Tomer Maimon
2026-07-15 12:29 ` Tomer Maimon [this message]
2026-07-15 12:29 ` [PATCH v1 7/8] pinctrl: npcm8xx: correct JM1 and SMB7 pin flags Tomer Maimon
2026-07-15 12:29 ` [PATCH v1 8/8] pinctrl: npcm8xx: fix debounce register selection Tomer Maimon

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