[PATCH v3 0/2] upboard pinctrl support for device id INTC1055

[PATCH v3 0/2] upboard pinctrl support for device id INTC1055

[GaryWang]

Add missing groups and functions in Tigerlake's pinctrl driver for INTC1055.
Add support "UP Xtreme i12" board.

The pinctrl-upboard is provide additional driving power & pin mux function
 through native SOC pins -> FPGA/CPLD -> hat  pins for flexable board level
 applications. it's probe from ACPI device id AANT0F01 & AANT0F04.

Signed-off-by: GaryWang <is0124@gmail.com>
---
Changes in v3:
- Correction pwm & uart pin mode in INTC1055.
- Remove unsupport up boards.
- Update cover letter.
- Link to v2: https://lore.kernel.org/r/20260612-upboard-pinctrl-add-upboard-intc1055-support-v2-0-4111b256c840@gmail.com

Changes in v2:
- Add brief introduction pinctrl-upboard architecture in cover content. 
- Add more detail explaining for pinctrl-tigerlake commit message.
- Link to v1: https://lore.kernel.org/r/20260610-upboard-pinctrl-add-upboard-intc1055-support-v1-0-8185d2abbfb1@gmail.com

---
GaryWang (2):
      pinctrl: tigerlake: add some pin groups and functions for INTC1055
      pinctrl: upboard: add device id INTC1055 based UP boards support

 drivers/pinctrl/intel/pinctrl-tigerlake.c | 32 +++++++++++++++++++++++++++++++
 drivers/pinctrl/pinctrl-upboard.c         | 21 ++++++++++++++++++++
 2 files changed, 53 insertions(+)
---
base-commit: dc59e4fea9d83f03bad6bddf3fa2e52491777482
change-id: 20260609-upboard-pinctrl-add-upboard-intc1055-support-bd1d81311b7a

Best regards,
-- 
GaryWang <is0124@gmail.com>

[PATCH v3 1/2] pinctrl: tigerlake: add some pin groups and functions for INTC1055

[GaryWang]

Add i2c0, i2c1, pwm0, uart1, ssp2 pin groups & functions in tgllp_soc_data
 for device id INTC1055.
The pinctrl-upboard driver set the correct pin function corresponding to
 these data.

Signed-off-by: GaryWang <is0124@gmail.com>
---
 drivers/pinctrl/intel/pinctrl-tigerlake.c | 32 +++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/drivers/pinctrl/intel/pinctrl-tigerlake.c b/drivers/pinctrl/intel/pinctrl-tigerlake.c
index ae231f7fba49..0a11b9dac3dd 100644
--- a/drivers/pinctrl/intel/pinctrl-tigerlake.c
+++ b/drivers/pinctrl/intel/pinctrl-tigerlake.c
@@ -330,6 +330,34 @@ static const struct pinctrl_pin_desc tgllp_pins[] = {
 	PINCTRL_PIN(276, "SPI0_CLK_LOOPBK"),
 };
 
+static const unsigned int tgllp_i2c0_pins[] = { 5, 6 };
+static const unsigned int tgllp_i2c1_pins[] = { 7, 8 };
+static const unsigned int tgllp_pwm0_pins[] = { 99 };
+static const unsigned int tgllp_uart1_pins[] = { 85, 86, 87, 88 };
+static const unsigned int tgllp_ssp2_pins[] = { 108, 109, 110, 111 };
+
+static const struct intel_pingroup tgllp_groups[] = {
+	PIN_GROUP("i2c0_grp", tgllp_i2c0_pins, 2),
+	PIN_GROUP("i2c1_grp", tgllp_i2c1_pins, 2),
+	PIN_GROUP("pwm0_grp", tgllp_pwm0_pins, 2),
+	PIN_GROUP("uart1_grp", tgllp_uart1_pins, 2),
+	PIN_GROUP("ssp2_grp", tgllp_ssp2_pins, 7),
+};
+
+static const char * const tgllp_i2c0_groups[] = { "i2c0_grp" };
+static const char * const tgllp_i2c1_groups[] = { "i2c1_grp" };
+static const char * const tgllp_pwm0_groups[] = { "pwm0_grp" };
+static const char * const tgllp_uart1_groups[] = { "uart1_grp" };
+static const char * const tgllp_ssp2_groups[] = { "ssp2_grp" };
+
+static const struct intel_function tgllp_functions[] = {
+	FUNCTION("i2c0", tgllp_i2c0_groups),
+	FUNCTION("i2c1", tgllp_i2c1_groups),
+	FUNCTION("pwm0", tgllp_pwm0_groups),
+	FUNCTION("uart1", tgllp_uart1_groups),
+	FUNCTION("ssp2", tgllp_ssp2_groups),
+};
+
 static const struct intel_padgroup tgllp_community0_gpps[] = {
 	INTEL_GPP(0, 0, 25, 0),				/* GPP_B */
 	INTEL_GPP(1, 26, 41, 32),			/* GPP_T */
@@ -367,6 +395,10 @@ static const struct intel_community tgllp_communities[] = {
 static const struct intel_pinctrl_soc_data tgllp_soc_data = {
 	.pins = tgllp_pins,
 	.npins = ARRAY_SIZE(tgllp_pins),
+	.groups = tgllp_groups,
+	.ngroups = ARRAY_SIZE(tgllp_groups),
+	.functions = tgllp_functions,
+	.nfunctions = ARRAY_SIZE(tgllp_functions),
 	.communities = tgllp_communities,
 	.ncommunities = ARRAY_SIZE(tgllp_communities),
 };

-- 
2.43.0

[PATCH v3 2/2] pinctrl: upboard: add device id INTC1055 based UP boards support

[GaryWang]

Add support "UP Xtreme i12" and I2C/PWM/UART/SPI pins mapping data.

Signed-off-by: GaryWang <is0124@gmail.com>
---
 drivers/pinctrl/pinctrl-upboard.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-upboard.c b/drivers/pinctrl/pinctrl-upboard.c
index f8c8b9d84990..de1920a3387d 100644
--- a/drivers/pinctrl/pinctrl-upboard.c
+++ b/drivers/pinctrl/pinctrl-upboard.c
@@ -912,6 +912,19 @@ static const struct upboard_pinctrl_map upboard_pinctrl_map_apl01 = {
 	.nmaps = ARRAY_SIZE(pinctrl_map_apl01),
 };
 
+static const struct pinctrl_map pinctrl_map_adl[] = {
+	PIN_MAP_MUX_GROUP_DEFAULT("upboard-pinctrl", "INTC1055:00", "i2c0_grp", "i2c0"),
+	PIN_MAP_MUX_GROUP_DEFAULT("upboard-pinctrl", "INTC1055:00", "i2c1_grp", "i2c1"),
+	PIN_MAP_MUX_GROUP_DEFAULT("upboard-pinctrl", "INTC1055:00", "pwm0_grp", "pwm0"),
+	PIN_MAP_MUX_GROUP_DEFAULT("upboard-pinctrl", "INTC1055:00", "uart1_grp", "uart1"),
+	PIN_MAP_MUX_GROUP_DEFAULT("upboard-pinctrl", "INTC1055:00", "ssp2_grp", "ssp2"),
+};
+
+static const struct upboard_pinctrl_map upboard_pinctrl_map_adl = {
+	.maps = &pinctrl_map_adl[0],
+	.nmaps = ARRAY_SIZE(pinctrl_map_adl),
+};
+
 static const struct dmi_system_id dmi_platform_info[] = {
 	{
 		/* UP Squared */
@@ -921,6 +934,14 @@ static const struct dmi_system_id dmi_platform_info[] = {
 		},
 		.driver_data = (void *)&upboard_pinctrl_map_apl01,
 	},
+	{
+		/* UP Xtreme i12 */
+		.matches = {
+			DMI_EXACT_MATCH(DMI_SYS_VENDOR, "AAEON"),
+			DMI_EXACT_MATCH(DMI_BOARD_NAME, "UPX-ADLP01"),
+		},
+		.driver_data = (void *)&upboard_pinctrl_map_adl,
+	},
 	{ }
 };
 

-- 
2.43.0

Re: [PATCH v3 0/2] upboard pinctrl support for device id INTC1055

[Andy Shevchenko]

On Thu, Jul 02, 2026 at 03:10:37PM +0800, GaryWang wrote:
> Add missing groups and functions in Tigerlake's pinctrl driver for INTC1055.
> Add support "UP Xtreme i12" board.
> 
> The pinctrl-upboard is provide additional driving power & pin mux function
>  through native SOC pins -> FPGA/CPLD -> hat  pins for flexable board level
>  applications. it's probe from ACPI device id AANT0F01 & AANT0F04.

I don't see neither Linus' nor Mika's tags. Can you explain why you dropped them?

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v3 0/2] upboard pinctrl support for device id INTC1055

[Andy Shevchenko]

On Thu, Jul 02, 2026 at 11:46:53AM +0300, Andy Shevchenko wrote:
> On Thu, Jul 02, 2026 at 03:10:37PM +0800, GaryWang wrote:
> > Add missing groups and functions in Tigerlake's pinctrl driver for INTC1055.
> > Add support "UP Xtreme i12" board.
> > 
> > The pinctrl-upboard is provide additional driving power & pin mux function
> >  through native SOC pins -> FPGA/CPLD -> hat  pins for flexable board level
> >  applications. it's probe from ACPI device id AANT0F01 & AANT0F04.
> 
> I don't see neither Linus' nor Mika's tags. Can you explain why you dropped them?

While at it, also fix your Real Name in SoB and From headers. I believe your name
should be "Gary Wang" (mind the space).

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v3 1/2] pinctrl: tigerlake: add some pin groups and functions for INTC1055

[Andy Shevchenko]

On Thu, Jul 02, 2026 at 03:10:38PM +0800, GaryWang wrote:
> Add i2c0, i2c1, pwm0, uart1, ssp2 pin groups & functions in tgllp_soc_data
>  for device id INTC1055.
> The pinctrl-upboard driver set the correct pin function corresponding to
>  these data.

Please, fix the indentation and wrapping issues here. For example, you can
use the following version.

Add i2c0, i2c1, pwm0, uart1, ssp2 pin groups & functions in tgllp_soc_data
for device id INTC1055. The pinctrl-upboard driver set the correct pin
function corresponding to these data.

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v3 0/2] upboard pinctrl support for device id INTC1055

[GaryWang]

On Thu, Jul 2, 2026 at 4:53 PM Andy Shevchenko
<andriy.shevchenko@intel.com> wrote:
>
> On Thu, Jul 02, 2026 at 11:46:53AM +0300, Andy Shevchenko wrote:
> > On Thu, Jul 02, 2026 at 03:10:37PM +0800, GaryWang wrote:
> > > Add missing groups and functions in Tigerlake's pinctrl driver for INTC1055.
> > > Add support "UP Xtreme i12" board.
> > >
> > > The pinctrl-upboard is provide additional driving power & pin mux function
> > >  through native SOC pins -> FPGA/CPLD -> hat  pins for flexable board level
> > >  applications. it's probe from ACPI device id AANT0F01 & AANT0F04.
> >
> > I don't see neither Linus' nor Mika's tags. Can you explain why you dropped them?
>
> While at it, also fix your Real Name in SoB and From headers. I believe your name
> should be "Gary Wang" (mind the space).
>
Okay, I'll check tag problem and change My Name.
> --
> With Best Regards,
> Andy Shevchenko
>
>

Re: [PATCH v3 1/2] pinctrl: tigerlake: add some pin groups and functions for INTC1055

[GaryWang]

On Thu, Jul 2, 2026 at 4:55 PM Andy Shevchenko
<andriy.shevchenko@intel.com> wrote:
>
> On Thu, Jul 02, 2026 at 03:10:38PM +0800, GaryWang wrote:
> > Add i2c0, i2c1, pwm0, uart1, ssp2 pin groups & functions in tgllp_soc_data
> >  for device id INTC1055.
> > The pinctrl-upboard driver set the correct pin function corresponding to
> >  these data.
>
> Please, fix the indentation and wrapping issues here. For example, you can
> use the following version.
>
> Add i2c0, i2c1, pwm0, uart1, ssp2 pin groups & functions in tgllp_soc_data
> for device id INTC1055. The pinctrl-upboard driver set the correct pin
> function corresponding to these data.

no problem.

>
> --
> With Best Regards,
> Andy Shevchenko
>
>