* [GIT PULL] gpio updates for v7.1-rc1
From: Bartosz Golaszewski @ 2026-04-10 8:39 UTC (permalink / raw)
To: Linus Torvalds
Cc: Linus Walleij, linux-gpio, linux-kernel, brgl,
Bartosz Golaszewski
Linus,
I'll be OoO next week and disconnected so I'm sending an early PR for the
next cycle.
For this merge window we have two new drivers: support for GPIO-signalled
ACPI events on Intel platforms and a generic GPIO-over-pinctrl driver using
the ARM SCMI protocol for controlling pins.
Several things have been reworked in GPIO core: we unduplicated GPIO hog
handling, reduced the number of SRCU locks and dereferences, improved
support for software-node-based lookup and removed more legacy code after
converting remaining users to modern alternatives.
There's also a number of driver reworks and refactoring, documentation
updates, some bug-fixes and new tests.
The merges in this PR are as follows: immutable branch provided to the
net tree with driver changes prerequisite to legacy code removal, pinctrl
changes pulled ahead of adding the SCMI GPIO driver and an immutable branch
with a high-risk GPIO core fix that was then pulled into the for-current
branch and sent for v7.0 after spending some time in linux-next with no
regressions.
Details are in the signed tag. Please consider pulling for v7.1-rc1.
Thanks,
Bartosz
The following changes since commit 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f:
Linux 7.0-rc1 (2026-02-22 13:18:59 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git tags/gpio-updates-for-v7.1-rc1
for you to fetch changes up to ca13ab654064fee86d6e7c9e87d0af7789561509:
gpio: swnode: defer probe on references to unregistered software nodes (2026-04-09 15:59:30 +0200)
----------------------------------------------------------------
gpio updates for v7.1-rc1
GPIO core:
- defer probe on software node lookups when the remote software node
exists but has not been registered as a firmware node yet
- unify GPIO hog handling by moving code duplicated in OF and ACPI
modules into GPIO core and allow setting up hogs with software nodes
- allow matching GPIO controllers by secondary firmware node if matching
by primary does not succeed
- demote deferral warnings to debug level as they are quite normal when
using software nodes which don't support fw_devlink yet
- disable the legacy GPIO character device uAPI v1 supprt in Kconfig by
default
- rework several core functions in preparation for the upcoming Revocable
helper library for protecting resources against sudden removal, this
reduces the number of SRCU dereferences in GPIO core
- simplify file descriptor logic in GPIO character device code by using
FD_PREPARE()
- introduce a header defining symbols used by both GPIO consumers and
providers to avoid having to include provider-specific headers from
drivers which only consume GPIOs
- replace snprintf() with strscpy() where formatting is not required
New drivers:
- add the gpio-by-pinctrl generic driver using the ARM SCMI protocol to
control GPIOs (along with SCMI changes pulled from the pinctrl tree)
- add a driver providing support for handling of platform events via
GPIO-signalled ACPI events (used on Intel Nova Lake and later platforms)
Driver changes:
- extend the gpio-kempld driver with support for more recent models,
interrupts and setting/getting multiple values at once
- improve interrupt handling in gpio-brcmstb
- add support for multi-SoC systems in gpio-tegra186
- make sure we return correct values from the .get() callbacks in several
GPIO drivers by normalizing any values other than 0, 1 or negative error
numbers
- use flexible arrays in several drivers to reduce the number of required
memory allocations
- simplify synchronous waiting for virtual drivers to probe and remove the
dedicated, a bit overengineered helper library dev-sync-probe
- remove unneeded Kconfig dependencies on OF_GPIO in several drivers and
subsystems
- convert the two remaining users of of_get_named_gpio() to using GPIO
descriptors and remove the (no longer used) function along with the
header that declares it
- add missing includes in gpio-mmio
- shrink and simplify code in gpio-max732x by using guard(mutex)
- remove duplicated code handling the 'ngpios' property from gpio-ts4800,
it's already handled in GPIO core
- use correct variable type in gpio-aspeed
- add support for a new model in gpio-realtek-otto
- allow to specify the active-low setting of simulated hogs over the
configfs interface (in addition to existing devicetree support) in
gpio-sim
Bug fixes:
- clear the OF_POPULATED flag on hog nodes in GPIO chip remove path on
OF systems
- fix resource leaks in error path in gpiochip_add_data_with_key()
- drop redundant device reference in gpio-mpsse
Tests:
- add selftests for use-after-free cases in GPIO character device code
DT bindings:
- add a DT binding document for SCMI based, gpio-over-pinctrl devices
- fix interrupt description in microchip,mpfs-gpio
- add new compatible for gpio-realtek-otto
- describe the resets of the mpfs-gpio controller
- fix maintainer's email in gpio-delay bindings
- remove the binding document for cavium,thunder-8890 as the corresponding
device is bound over PCI and not firmware nodes
Documentation:
- update the recommended way of converting legacy boards to using software
nodes for GPIO description
- describe GPIO line value semantics
- misc updates to kerneldocs
Misc:
- convert OMAP1 ams-delta board to using GPIO hogs described with software
nodes
----------------------------------------------------------------
AKASHI Takahiro (3):
pinctrl: introduce pinctrl_gpio_get_config()
gpio: dt-bindings: Add GPIO on top of generic pin control
gpio: gpio-by-pinctrl: add pinctrl based generic GPIO driver
Alan Borzeszkowski (1):
gpio: Add Intel Nova Lake ACPI GPIO events driver
Alban Bedel (4):
gpio: kempld: Simplify the bit level register accesses
gpio: kempld: Add support for PLD version >= 2.8
gpio: kempld: Add support for get/set multiple
gpio: kempld: Implement the interrupt controller
Andy Shevchenko (2):
gpio: ts4800: Remove duplicate code to handle 'ngpios' property
gpio: generic: Don't use 'proxy' headers
Arnd Bergmann (1):
gpio: fix up CONFIG_OF dependencies
Bartosz Golaszewski (22):
gpio: introduce a header for symbols shared by suppliers and consumers
gpiolib: match secondary fwnode too in gpio_device_find_by_fwnode()
Merge branch 'gpio/dev-init-rework' into gpio/for-next
Merge tag 'ib-gpio-remove-of-gpio-h-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git into gpio/for-next
arc: axs10x: drop unneeded dependency on OF_GPIO
powerpc: drop unneeded dependency on OF_GPIO
regulator: drop unneeded dependencies on OF_GPIO
gpio: of: clear OF_POPULATED on hog nodes in remove path
gpio: move hogs into GPIO core
gpio: sim: use fwnode-based GPIO hogs
ARM: omap1: ams-delta: convert GPIO hogs to using firmware nodes
gpio: remove machine hogs
gpio: sim: allow to define the active-low setting of a simulated hog
gpio: drop unneeded Kconfig dependencies on OF_GPIO
Merge branch 'ib-scmi-pinctrl-gpio' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl into gpio/for-next
gpiolib: fix hogs with multiple lines
gpio: sim: stop using dev-sync-probe
gpio: aggregator: stop using dev-sync-probe
gpio: virtuser: stop using dev-sync-probe
gpio: remove dev-sync-probe
Documentation: gpio: update the preferred method for using software node lookup
gpio: swnode: defer probe on references to unregistered software nodes
Chen Jung Ku (1):
gpio: aspeed: fix unsigned long int declaration
Conor Dooley (2):
dt-bindings: gpio: mpfs-gpio: permit resets
dt-bindings: gpio: fix microchip,mpfs-gpio interrupt documentation
Dan Carpenter (4):
pinctrl: scmi: Add SCMI_PIN_INPUT_VALUE
pinctrl: scmi: Delete PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS support
pinctrl: scmi: ignore PIN_CONFIG_PERSIST_STATE
firmware: arm_scmi: Allow PINCTRL_REQUEST to return EOPNOTSUPP
Dmitry Torokhov (7):
gpio: bd9571mwv: normalize return value of gpio_get
gpio: cgbc: normalize return value of gpio_get
gpio: da9055: normalize return value of gpio_get
gpio: lp873x: normalize return value of gpio_get
gpio: stp-xway: normalize return value of gpio_get
gpio: tps65086: normalize return value of gpio_get
gpio: viperboard: normalize return value of gpio_get
Doug Berger (2):
gpio: brcmstb: implement .irq_mask_ack()
gpio: brcmstb: allow parent_irq to wake
Florian Fainelli (1):
gpio: brcmstb: Utilize irqd_to_hwirq(d) instead of d->hwirq
Geert Uytterhoeven (1):
gpio: gpio-by-pinctrl: s/used to do/is used to do/
Jialu Xu (3):
nfc: s3fwrn5: convert to gpio descriptors
nfc: nfcmrvl: convert to gpio descriptors
gpio: remove of_get_named_gpio() and <linux/of_gpio.h>
Johan Hovold (1):
gpio: mpsse: drop redundant device reference
Jon Hunter (1):
gpiolib: Make deferral warnings debug messages
Kent Gibson (1):
gpio: cdev: convert lineevent_create() and linereq_create() to FD_PREPARE()
Krzysztof Kozlowski (1):
dt-bindings: gpio: gpio-delay: Use Alexander's email
Linus Walleij (3):
gpio: Document line value semantics
gpiolib: Update gpiochip_find_base_unlocked() kerneldoc
Do not enable the v1 uAPI by default
Prathamesh Shete (2):
gpio: tegra186: Simplify GPIO line name prefix handling
gpio: tegra186: Support multi-socket devices
Richard Lyu (1):
gpio: max732x: use guard(mutex) to simplify locking
Rosen Penev (5):
gpio: bcm-kona: reduce the number of memory allocations
gpio: htc-egpio: allocate irq with the main struct
gpio: tegra186: allocate irqs with the main struct
gpio: cs5535: use dynamically allocated priv struct
gpio: dwapb: reduce allocation to single kzalloc
Rustam Adilov (2):
dt-bindings: gpio: realtek-otto: add rtl9607 compatible
gpio: realtek-otto: add rtl9607 support
Shawn Lin (1):
gpio: rockchip: convert to dynamic GPIO base allocation
Shi Hao (1):
dt-bindings: gpio: cavium,thunder-8890: Remove DT binding
Thorsten Blum (1):
gpiolib: replace snprintf("%s") with strscpy
Tzung-Bi Shih (9):
gpio: Fix resource leaks on errors in gpiochip_add_data_with_key()
gpio: Access `gpio_bus_type` in gpiochip_setup_dev()
gpio: Remove redundant check for struct gpio_chip
gpio: sysfs: Remove redundant check for struct gpio_chip
gpio: Ensure struct gpio_chip for gpiochip_setup_dev()
gpio: cdev: Don't check struct gpio_chip in gpio_chrdev_open()
selftests: gpio: Add gpio-cdev-uaf tests
gpio: Fix lockdep warnings in gpiolib_{cdev,sysfs}_register()
Revert "gpio: Access `gpio_bus_type` in gpiochip_setup_dev()"
.../devicetree/bindings/gpio/gpio-delay.yaml | 2 +-
.../devicetree/bindings/gpio/gpio-thunderx.txt | 27 --
.../bindings/gpio/microchip,mpfs-gpio.yaml | 27 +-
.../devicetree/bindings/gpio/pin-control-gpio.yaml | 59 ++++
.../bindings/gpio/realtek,otto-gpio.yaml | 1 +
Documentation/driver-api/gpio/board.rst | 39 ++-
Documentation/driver-api/gpio/driver.rst | 27 ++
Documentation/driver-api/gpio/legacy-boards.rst | 36 ++-
MAINTAINERS | 8 +-
arch/arc/plat-axs10x/Kconfig | 1 -
arch/arm/mach-omap1/board-ams-delta.c | 32 +-
arch/powerpc/platforms/85xx/Kconfig | 1 -
drivers/firmware/arm_scmi/pinctrl.c | 2 +
drivers/gpio/Kconfig | 108 ++++---
drivers/gpio/Makefile | 5 +-
drivers/gpio/TODO | 28 --
drivers/gpio/dev-sync-probe.c | 97 -------
drivers/gpio/dev-sync-probe.h | 25 --
drivers/gpio/gpio-aggregator.c | 38 +--
drivers/gpio/gpio-aspeed.c | 2 +-
drivers/gpio/gpio-bcm-kona.c | 37 +--
drivers/gpio/gpio-bd9571mwv.c | 2 +-
drivers/gpio/gpio-brcmstb.c | 125 +++++---
drivers/gpio/gpio-by-pinctrl.c | 101 +++++++
drivers/gpio/gpio-cgbc.c | 4 +-
drivers/gpio/gpio-cs5535.c | 48 ++-
drivers/gpio/gpio-da9055.c | 2 +-
drivers/gpio/gpio-dwapb.c | 19 +-
drivers/gpio/gpio-htc-egpio.c | 13 +-
drivers/gpio/gpio-kempld.c | 289 +++++++++++++++++-
drivers/gpio/gpio-lp873x.c | 2 +-
drivers/gpio/gpio-max732x.c | 24 +-
drivers/gpio/gpio-mmio.c | 4 +-
drivers/gpio/gpio-mpsse.c | 13 +-
drivers/gpio/gpio-novalake-events.c | 323 +++++++++++++++++++++
drivers/gpio/gpio-realtek-otto.c | 4 +
drivers/gpio/gpio-rockchip.c | 2 +-
drivers/gpio/gpio-sim.c | 241 ++++++++-------
drivers/gpio/gpio-stp-xway.c | 2 +-
drivers/gpio/gpio-tegra186.c | 45 +--
drivers/gpio/gpio-tps65086.c | 2 +-
drivers/gpio/gpio-ts4800.c | 10 -
drivers/gpio/gpio-viperboard.c | 2 +-
drivers/gpio/gpio-virtuser.c | 30 +-
drivers/gpio/gpiolib-acpi-core.c | 70 -----
drivers/gpio/gpiolib-cdev.c | 159 +++-------
drivers/gpio/gpiolib-cdev.h | 2 +-
drivers/gpio/gpiolib-of.c | 183 ++----------
drivers/gpio/gpiolib-of.h | 10 +
drivers/gpio/gpiolib-swnode.c | 8 +
drivers/gpio/gpiolib-sysfs.c | 30 +-
drivers/gpio/gpiolib-sysfs.h | 8 +-
drivers/gpio/gpiolib.c | 323 ++++++++++++---------
drivers/gpio/gpiolib.h | 6 +-
drivers/nfc/nfcmrvl/main.c | 47 +--
drivers/nfc/nfcmrvl/nfcmrvl.h | 4 +-
drivers/nfc/nfcmrvl/uart.c | 23 +-
drivers/nfc/nfcmrvl/usb.c | 2 +-
drivers/nfc/s3fwrn5/i2c.c | 54 +---
drivers/nfc/s3fwrn5/phy_common.c | 11 +-
drivers/nfc/s3fwrn5/phy_common.h | 5 +-
drivers/nfc/s3fwrn5/uart.c | 43 +--
drivers/pinctrl/core.c | 31 ++
drivers/pinctrl/pinconf.h | 6 +
drivers/pinctrl/pinctrl-scmi.c | 46 ++-
drivers/regulator/Kconfig | 2 -
include/linux/gpio/consumer.h | 2 +
include/linux/gpio/defs.h | 9 +
include/linux/gpio/driver.h | 15 +-
include/linux/gpio/generic.h | 8 +-
include/linux/gpio/machine.h | 33 ---
include/linux/mfd/kempld.h | 1 +
include/linux/of_gpio.h | 38 ---
include/linux/pinctrl/consumer.h | 9 +
tools/testing/selftests/gpio/Makefile | 5 +-
tools/testing/selftests/gpio/gpio-cdev-uaf.c | 292 +++++++++++++++++++
tools/testing/selftests/gpio/gpio-cdev-uaf.sh | 63 ++++
77 files changed, 2126 insertions(+), 1331 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/gpio/gpio-thunderx.txt
create mode 100644 Documentation/devicetree/bindings/gpio/pin-control-gpio.yaml
delete mode 100644 drivers/gpio/dev-sync-probe.c
delete mode 100644 drivers/gpio/dev-sync-probe.h
create mode 100644 drivers/gpio/gpio-by-pinctrl.c
create mode 100644 drivers/gpio/gpio-novalake-events.c
create mode 100644 include/linux/gpio/defs.h
delete mode 100644 include/linux/of_gpio.h
create mode 100644 tools/testing/selftests/gpio/gpio-cdev-uaf.c
create mode 100755 tools/testing/selftests/gpio/gpio-cdev-uaf.sh
^ permalink raw reply
* Re: [PATCH 6/6] arm64: defconfig: make Tegra238 and Tegra264 Pinctrl a loadable module
From: Jon Hunter @ 2026-04-10 8:25 UTC (permalink / raw)
To: Krzysztof Kozlowski, pshete, linux-gpio, devicetree, linux-tegra,
linux-kernel, arnd, bjorn.andersson, conor+dt, dmitry.baryshkov,
ebiggers, geert, krzk+dt, kuninori.morimoto.gx, linusw,
luca.weiss, michal.simek, prabhakar.mahadev-lad.rj, robh, rosenp,
sven, thierry.reding, webgeek1234
In-Reply-To: <9408f231-7a12-425c-b8de-2990d3162bb3@kernel.org>
On 10/04/2026 07:37, Krzysztof Kozlowski wrote:
> On 09/04/2026 15:13, pshete@nvidia.com wrote:
>> From: Prathamesh Shete <pshete@nvidia.com>
>>
>> Building the Pinctrl driver into the kernel image increases its size.
>
> That's obvious.
>
>> These drivers are not required during early boot, build them as a loadable
>> module instead to reduce the kernel image size.
>
> So you replace built-in into module?
>>
>> Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
>> ---
>> arch/arm64/configs/defconfig | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
>> index dd1ac01ee29b..f525670d3b84 100644
>> --- a/arch/arm64/configs/defconfig
>> +++ b/arch/arm64/configs/defconfig
>> @@ -711,6 +711,8 @@ CONFIG_PINCTRL_SC8280XP_LPASS_LPI=m
>> CONFIG_PINCTRL_SM8550_LPASS_LPI=m
>> CONFIG_PINCTRL_SM8650_LPASS_LPI=m
>> CONFIG_PINCTRL_SOPHGO_SG2000=y
>> +CONFIG_PINCTRL_TEGRA238=m
>> +CONFIG_PINCTRL_TEGRA264=m
>
> No, you just added as module. Why do we want them in upstream defconfig?
>
> Standard question, already asked Nvidia more than once.
Yes :-)
Prathamesh, what we need to do is ...
1. Add a patch to populate the pinctrl DT nodes for Tegra264 device.
2. In this patch, only enable pinctrl for Tegra264 because we are
lacking an upstream board for Tegra238 for that moment. In the commit
message we should add a comment to indicate with Tegra264 platform is
using this.
We can still merge the DT binding-doc changes and driver for Tegra238,
but no point to enable in the defconfig yet.
Jon
--
nvpublic
^ permalink raw reply
* [PATCH 1/2] gpio: usbio: Add ACPI device-id for NVL platforms
From: Arun T @ 2026-04-10 8:02 UTC (permalink / raw)
To: israel.a.cepeda.lopez, hansg, linusw, brgl
Cc: sakari.ailus, linux-gpio, linux-kernel, arun.t, miguel.vadillo
Add device IDs of Nova Lake into gpio-usbio support list
Signed-off-by: Arun T <arun.t@intel.com>
Reviewed-by: Vadillo Miguel <miguel.vadillo@intel.com>
---
drivers/gpio/gpio-usbio.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpio/gpio-usbio.c b/drivers/gpio/gpio-usbio.c
index 34d42c743d5b..489c8ac6299e 100644
--- a/drivers/gpio/gpio-usbio.c
+++ b/drivers/gpio/gpio-usbio.c
@@ -31,6 +31,7 @@ static const struct acpi_device_id usbio_gpio_acpi_hids[] = {
{ "INTC10B5" }, /* LNL */
{ "INTC10D1" }, /* MTL-CVF */
{ "INTC10E2" }, /* PTL */
+ { "INTC1116" }, /* NVL */
{ }
};
--
2.43.0
^ permalink raw reply related
* Re: [RFC PATCH 0/5] gpio: add PMIO support to gpio-mmio
From: Jose Javier Rodriguez Barbarin @ 2026-04-10 7:44 UTC (permalink / raw)
To: Linus Walleij; +Cc: William Breathitt Gray, brgl, linux-gpio, linux-kernel
In-Reply-To: <CAD++jLnCKuAzcTjy-iXpLK6MWA0t8L_gw-KokryKbjhnzAwKrQ@mail.gmail.com>
On Thu, Apr 09, 2026 at 10:14:17AM +0200, Linus Walleij wrote:
> Hi Jose,
>
> thanks for your proposal!!
You are welcome :)
>
> I'm very happy to see some traction on this. I add WBG to CC because he
> wrote so many port-mapped drivers that I think he'll be thrilled to make
> use of this as well.
I was a bit worried about if my approach was correct or not, so I'm really
glad to hear such positive feedback.
>
> On Tue, Apr 7, 2026 at 8:49 PM Jose Javier Rodriguez Barbarin
> <dev-josejavier.rodriguez@duagon.com> wrote:
>
> > This series is an RFC for adding port-mapped I/O (PMIO) support to
> > gpio-mmio.
> (...)
> > In particular, feedback would be appreciated on:
> > - whether extending gpio_generic_chip_config is the right direction;
>
> Pointed out on the patch that you can just create a
> gpio_generic_port_chip_config
> or something like that, it's only used at config time (usually locally
> in probe()) resulting in a transient stack allocation anyway.
>
> Also that makes it easier to see what's going on.
Seems interesting.
As you pointed out, creating the new gpio_generic_port_chip_config would
need more refactoring to adapt the new structure. I'm OK with that so I'm
working on it. I will include those changes on v2.
>
> > - whether introducing a common MMIO/PMIO register descriptor is
> > acceptable;
> > - whether PMIO support should instead be implemented differently in
> > gpio-mmio.
>
> The main feedback I have is to use a union between port and
> MMIO address instead of a struct with both.
>
> It makes it clear that we only ever use one of them and saves
> some memory, especially since we use several instances of
> it per generic chip later in the code.
>
Annotated. I will include the union on v2.
> Yours,
> Linus Walleij
Thanks for your review and for your comments/suggestions. I really
appreciate that.
Regards,
Javier R.
^ permalink raw reply
* Re: [PATCH] pinctrl: mediatek: moore: implement gpio_chip::get_direction()
From: Linus Walleij @ 2026-04-10 7:37 UTC (permalink / raw)
To: Bartosz Golaszewski
Cc: Frank Wunderlich, Sean Wang, Matthias Brugger,
AngeloGioacchino Del Regno, Bartosz Golaszewski, linux-mediatek,
linux-gpio, linux-kernel, linux-arm-kernel
In-Reply-To: <20260410070935.9540-1-bartosz.golaszewski@oss.qualcomm.com>
On Fri, Apr 10, 2026 at 9:09 AM Bartosz Golaszewski
<bartosz.golaszewski@oss.qualcomm.com> wrote:
> If the gpio_chip::get_direction() callback is not implemented by the GPIO
> controller driver, GPIOLIB emits a warning.
>
> Implement get_direction() for the GPIO part of pinctrl-moore.
>
> Fixes: 471e998c0e31 ("gpiolib: remove redundant callback check")
> Fixes: e623c4303ed1 ("gpiolib: sanitize the return value of gpio_chip::get_direction()")
> Reported-by: Frank Wunderlich <linux@fw-web.de>
> Closes: https://lore.kernel.org/all/20260409132724.126258-1-linux@fw-web.de/
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
LGTM, but it would have to go into v7.1-rc1 right now due to timing,
then from there to stable.
Yours,
Linus Walleij
^ permalink raw reply
* [GIT PULL] pin control fixes for v7.0
From: Linus Walleij @ 2026-04-10 7:11 UTC (permalink / raw)
To: Linus Torvalds; +Cc: Linux pin control, LKML
Hi Linus,
some late pin control fixes. I'm not happy to have bugs so late in
the kernel cycle, but they are all driver specifics so I guess it's
how it is.
Details in the signed tag.
Please pull it in!
Yours,
Linus Walleij
The following changes since commit 7aaa8047eafd0bd628065b15757d9b48c5f9c07d:
Linux 7.0-rc6 (2026-03-29 15:40:00 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git
tags/pinctrl-v7.0-4
for you to fetch changes up to db5b8cecbdf479ad13156af750377e5b43853fab:
pinctrl: mcp23s08: Disable all pin interrupts during probe
(2026-04-07 11:29:57 +0200)
----------------------------------------------------------------
Pin control fixes for the v7.0 series:
- Three fixes for the Intel pin control driver fixing the feature
set for the new silicon.
- One fix for an IRQ storm in the MCP23S08 pin controller/GPIO
expander.
----------------------------------------------------------------
Andy Shevchenko (3):
pinctrl: intel: Improve capability support
pinctrl: intel: Fix the revision for new features (1kOhm PD, HW debouncer)
pinctrl: intel: Enable 3-bit PAD_OWN feature
Francesco Lavra (1):
pinctrl: mcp23s08: Disable all pin interrupts during probe
Linus Walleij (1):
Merge tag 'intel-pinctrl-v7.0-2' of
git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into fixes
drivers/pinctrl/intel/pinctrl-intel.c | 36 +++++++++++++++++++++++++----------
drivers/pinctrl/intel/pinctrl-intel.h | 1 +
drivers/pinctrl/pinctrl-mcp23s08.c | 9 +++++++++
3 files changed, 36 insertions(+), 10 deletions(-)
^ permalink raw reply
* Re: [RFC PATCH 4/5] gpio: mmio: convert accessors to generic register descriptors
From: Jose Javier Rodriguez Barbarin @ 2026-04-10 7:10 UTC (permalink / raw)
To: Linus Walleij; +Cc: brgl, linux-gpio, linux-kernel
In-Reply-To: <CAD++jLmeCMAGmLjpSok7ouX080tQtGH9_jystGgh7RASTSrzEQ@mail.gmail.com>
On Thu, Apr 09, 2026 at 10:07:24AM +0200, Linus Walleij wrote:
> Hi Jose,
>
> thanks for your patch!
>
Hi Linus,
Thanks for your answer
> On Tue, Apr 7, 2026 at 8:49 PM Jose Javier Rodriguez Barbarin
> <dev-josejavier.rodriguez@duagon.com> wrote:
>
> > Convert the gpio-mmio accessors to use struct gpio_chip_reg instead of
> > the previous MMIO-only register type.
> >
> > This allows the same accessors to operate on both MMIO and PMIO
> > registers and aligns gpio-mmio with the updated gpio_generic_chip API.
> >
> > Signed-off-by: Jose Javier Rodriguez Barbarin <dev-josejavier.rodriguez@duagon.com>
>
> This should work the same fine with a union as described per
> patch 1, and this is where that will start saving a bunch of memory.
>
> Possibly squash patch 1 into this patch? The new struct/union
> isn't used until here.
Yes, I can squash both patches. I sent them separated to make a quick
introduction of the new structure in first patch but as you pointed
out, it is better to squash them.
>
> Yours,
> Linus Walleij
Regards,
Javier R.
^ permalink raw reply
* [PATCH] pinctrl: mediatek: moore: implement gpio_chip::get_direction()
From: Bartosz Golaszewski @ 2026-04-10 7:09 UTC (permalink / raw)
To: Frank Wunderlich, Sean Wang, Linus Walleij, Matthias Brugger,
AngeloGioacchino Del Regno, Bartosz Golaszewski
Cc: linux-mediatek, linux-gpio, linux-kernel, linux-arm-kernel,
Bartosz Golaszewski
If the gpio_chip::get_direction() callback is not implemented by the GPIO
controller driver, GPIOLIB emits a warning.
Implement get_direction() for the GPIO part of pinctrl-moore.
Fixes: 471e998c0e31 ("gpiolib: remove redundant callback check")
Fixes: e623c4303ed1 ("gpiolib: sanitize the return value of gpio_chip::get_direction()")
Reported-by: Frank Wunderlich <linux@fw-web.de>
Closes: https://lore.kernel.org/all/20260409132724.126258-1-linux@fw-web.de/
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
---
drivers/pinctrl/mediatek/pinctrl-moore.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/drivers/pinctrl/mediatek/pinctrl-moore.c b/drivers/pinctrl/mediatek/pinctrl-moore.c
index 70f608347a5f6..071ba849e5322 100644
--- a/drivers/pinctrl/mediatek/pinctrl-moore.c
+++ b/drivers/pinctrl/mediatek/pinctrl-moore.c
@@ -520,6 +520,23 @@ static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio,
return pinctrl_gpio_direction_output(chip, gpio);
}
+static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
+{
+ struct mtk_pinctrl *hw = gpiochip_get_data(chip);
+ const struct mtk_pin_desc *desc;
+ int ret, dir;
+
+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
+ if (!desc->name)
+ return -ENOTSUPP;
+
+ ret = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &dir);
+ if (ret)
+ return ret;
+
+ return dir ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;
+}
+
static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
{
struct mtk_pinctrl *hw = gpiochip_get_data(chip);
@@ -566,6 +583,7 @@ static int mtk_build_gpiochip(struct mtk_pinctrl *hw)
chip->parent = hw->dev;
chip->request = gpiochip_generic_request;
chip->free = gpiochip_generic_free;
+ chip->get_direction = mtk_gpio_get_direction;
chip->direction_input = pinctrl_gpio_direction_input;
chip->direction_output = mtk_gpio_direction_output;
chip->get = mtk_gpio_get;
--
2.47.3
^ permalink raw reply related
* Re: [PATCH] gpio: tegra: return -ENOMEM on allocation failure in probe
From: Bartosz Golaszewski @ 2026-04-10 7:01 UTC (permalink / raw)
To: linusw, brgl, thierry.reding, jonathanh, Samasth Norway Ananda
Cc: Bartosz Golaszewski, linux-gpio, linux-tegra, linux-kernel
In-Reply-To: <20260409185853.2163034-1-samasth.norway.ananda@oracle.com>
On Thu, 09 Apr 2026 11:58:53 -0700, Samasth Norway Ananda wrote:
> devm_kzalloc() failure in tegra_gpio_probe() returns -ENODEV, which
> indicates "no such device". The correct error code for a memory
> allocation failure is -ENOMEM.
>
>
Applied, thanks!
[1/1] gpio: tegra: return -ENOMEM on allocation failure in probe
https://git.kernel.org/brgl/c/57df6923ca53b524d06d2347b896d9de74b3bc86
Best regards,
--
Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
^ permalink raw reply
* Re: [PATCH 6/6] arm64: defconfig: make Tegra238 and Tegra264 Pinctrl a loadable module
From: Krzysztof Kozlowski @ 2026-04-10 6:37 UTC (permalink / raw)
To: pshete, linux-gpio, devicetree, linux-tegra, linux-kernel, arnd,
bjorn.andersson, conor+dt, dmitry.baryshkov, ebiggers, geert,
jonathanh, krzk+dt, kuninori.morimoto.gx, linusw, luca.weiss,
michal.simek, prabhakar.mahadev-lad.rj, robh, rosenp, sven,
thierry.reding, webgeek1234
In-Reply-To: <20260409131340.168556-7-pshete@nvidia.com>
On 09/04/2026 15:13, pshete@nvidia.com wrote:
> From: Prathamesh Shete <pshete@nvidia.com>
>
> Building the Pinctrl driver into the kernel image increases its size.
That's obvious.
> These drivers are not required during early boot, build them as a loadable
> module instead to reduce the kernel image size.
So you replace built-in into module?
>
> Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
> ---
> arch/arm64/configs/defconfig | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index dd1ac01ee29b..f525670d3b84 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -711,6 +711,8 @@ CONFIG_PINCTRL_SC8280XP_LPASS_LPI=m
> CONFIG_PINCTRL_SM8550_LPASS_LPI=m
> CONFIG_PINCTRL_SM8650_LPASS_LPI=m
> CONFIG_PINCTRL_SOPHGO_SG2000=y
> +CONFIG_PINCTRL_TEGRA238=m
> +CONFIG_PINCTRL_TEGRA264=m
No, you just added as module. Why do we want them in upstream defconfig?
Standard question, already asked Nvidia more than once.
Best regards,
Krzysztof
^ permalink raw reply
* [brgl:gpio/for-current] BUILD SUCCESS 828ec7f803f41588a120e6d804297e74a482ab9d
From: kernel test robot @ 2026-04-10 5:22 UTC (permalink / raw)
To: Bartosz Golaszewski; +Cc: linux-gpio
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git gpio/for-current
branch HEAD: 828ec7f803f41588a120e6d804297e74a482ab9d gpio: bd72720: handle missing regmap
elapsed time: 2735m
configs tested: 149
configs skipped: 17
The following configs have been built successfully.
More configs may be tested in the coming days.
tested configs:
alpha allnoconfig gcc-15.2.0
alpha allyesconfig gcc-15.2.0
alpha defconfig gcc-15.2.0
arc allmodconfig clang-16
arc allmodconfig gcc-15.2.0
arc allnoconfig gcc-15.2.0
arc allyesconfig clang-19
arc defconfig gcc-15.2.0
arc randconfig-001-20260408 gcc-8.5.0
arc randconfig-002-20260408 gcc-8.5.0
arm allnoconfig clang-23
arm allyesconfig clang-16
arm allyesconfig gcc-15.2.0
arm lpc18xx_defconfig clang-23
arm randconfig-001-20260408 gcc-8.5.0
arm64 allmodconfig clang-19
arm64 allnoconfig gcc-15.2.0
arm64 defconfig gcc-15.2.0
arm64 randconfig-001-20260408 gcc-14.3.0
arm64 randconfig-002-20260408 gcc-14.3.0
arm64 randconfig-003-20260408 gcc-14.3.0
arm64 randconfig-004-20260408 gcc-14.3.0
csky allmodconfig gcc-15.2.0
csky allnoconfig gcc-15.2.0
csky defconfig gcc-15.2.0
csky randconfig-001-20260408 gcc-14.3.0
csky randconfig-002-20260408 gcc-14.3.0
hexagon allmodconfig clang-17
hexagon allmodconfig gcc-15.2.0
hexagon allnoconfig clang-23
i386 allmodconfig clang-20
i386 allnoconfig gcc-14
i386 allyesconfig clang-20
i386 defconfig gcc-15.2.0
i386 randconfig-001-20260408 clang-20
i386 randconfig-002-20260408 clang-20
i386 randconfig-003-20260408 clang-20
i386 randconfig-004-20260408 clang-20
i386 randconfig-005-20260408 clang-20
i386 randconfig-006-20260408 clang-20
i386 randconfig-007-20260408 clang-20
i386 randconfig-011-20260408 gcc-14
i386 randconfig-012-20260408 gcc-14
i386 randconfig-013-20260408 gcc-14
i386 randconfig-014-20260408 gcc-14
i386 randconfig-015-20260408 gcc-14
i386 randconfig-016-20260408 gcc-14
i386 randconfig-017-20260408 gcc-14
loongarch allmodconfig clang-19
loongarch allnoconfig clang-23
loongarch defconfig clang-19
m68k allmodconfig gcc-15.2.0
m68k allnoconfig gcc-15.2.0
m68k allyesconfig clang-16
m68k allyesconfig gcc-15.2.0
m68k defconfig clang-19
microblaze allnoconfig gcc-15.2.0
microblaze allyesconfig gcc-15.2.0
microblaze defconfig clang-19
mips allmodconfig gcc-15.2.0
mips allnoconfig gcc-15.2.0
mips allyesconfig gcc-15.2.0
nios2 allmodconfig gcc-11.5.0
nios2 allnoconfig clang-23
nios2 defconfig clang-19
openrisc allmodconfig gcc-11.5.0
openrisc allmodconfig gcc-15.2.0
openrisc allnoconfig clang-23
openrisc defconfig gcc-15.2.0
parisc allmodconfig gcc-15.2.0
parisc allnoconfig clang-23
parisc allyesconfig clang-19
parisc allyesconfig gcc-15.2.0
parisc defconfig gcc-15.2.0
parisc randconfig-001-20260408 gcc-8.5.0
parisc randconfig-002-20260408 gcc-8.5.0
parisc64 defconfig clang-19
powerpc allmodconfig gcc-15.2.0
powerpc allnoconfig clang-23
powerpc randconfig-001-20260408 gcc-8.5.0
powerpc randconfig-002-20260408 gcc-8.5.0
powerpc64 randconfig-002-20260408 gcc-8.5.0
riscv allnoconfig clang-23
riscv allyesconfig clang-16
riscv randconfig-001-20260408 gcc-15.2.0
riscv randconfig-002-20260408 gcc-15.2.0
s390 allmodconfig clang-18
s390 allmodconfig clang-19
s390 allnoconfig clang-23
s390 allyesconfig gcc-15.2.0
sh allmodconfig gcc-15.2.0
sh allnoconfig clang-23
sh allyesconfig clang-19
sh allyesconfig gcc-15.2.0
sh defconfig gcc-14
sh randconfig-001-20260408 gcc-15.2.0
sh randconfig-002-20260408 gcc-15.2.0
sparc allnoconfig clang-23
sparc defconfig gcc-15.2.0
sparc64 defconfig gcc-14
um allmodconfig clang-19
um allnoconfig clang-23
um allyesconfig gcc-14
um allyesconfig gcc-15.2.0
um defconfig gcc-14
um i386_defconfig gcc-14
x86_64 allmodconfig clang-20
x86_64 allnoconfig clang-23
x86_64 allyesconfig clang-20
x86_64 buildonly-randconfig-001-20260408 clang-20
x86_64 buildonly-randconfig-002-20260408 clang-20
x86_64 buildonly-randconfig-003-20260408 clang-20
x86_64 buildonly-randconfig-004-20260408 clang-20
x86_64 buildonly-randconfig-005-20260408 clang-20
x86_64 buildonly-randconfig-006-20260408 clang-20
x86_64 defconfig gcc-14
x86_64 kexec clang-20
x86_64 randconfig-001-20260408 gcc-12
x86_64 randconfig-001-20260408 gcc-14
x86_64 randconfig-002-20260408 gcc-12
x86_64 randconfig-002-20260408 gcc-14
x86_64 randconfig-003-20260408 gcc-12
x86_64 randconfig-003-20260408 gcc-14
x86_64 randconfig-004-20260408 gcc-12
x86_64 randconfig-004-20260408 gcc-14
x86_64 randconfig-005-20260408 gcc-12
x86_64 randconfig-005-20260408 gcc-14
x86_64 randconfig-006-20260408 gcc-12
x86_64 randconfig-011-20260408 clang-20
x86_64 randconfig-012-20260408 clang-20
x86_64 randconfig-013-20260408 clang-20
x86_64 randconfig-014-20260408 clang-20
x86_64 randconfig-015-20260408 clang-20
x86_64 randconfig-016-20260408 clang-20
x86_64 randconfig-071-20260408 clang-20
x86_64 randconfig-072-20260408 clang-20
x86_64 randconfig-073-20260408 clang-20
x86_64 randconfig-074-20260408 clang-20
x86_64 randconfig-075-20260408 clang-20
x86_64 randconfig-076-20260408 clang-20
x86_64 rhel-9.4 clang-20
x86_64 rhel-9.4-bpf gcc-14
x86_64 rhel-9.4-func clang-20
x86_64 rhel-9.4-kselftests clang-20
x86_64 rhel-9.4-kunit gcc-14
x86_64 rhel-9.4-ltp gcc-14
x86_64 rhel-9.4-rust clang-20
xtensa allnoconfig clang-23
xtensa allyesconfig gcc-11.5.0
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply
* [linusw-pinctrl:ib-mux-pinctrl] BUILD SUCCESS 62f97854fd4bf56e5eb15970787aa4125ea912cd
From: kernel test robot @ 2026-04-10 5:09 UTC (permalink / raw)
To: Linus Walleij; +Cc: linux-gpio
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git ib-mux-pinctrl
branch HEAD: 62f97854fd4bf56e5eb15970787aa4125ea912cd pinctrl: add generic board-level pinctrl driver using mux framework
elapsed time: 2700m
configs tested: 142
configs skipped: 15
The following configs have been built successfully.
More configs may be tested in the coming days.
tested configs:
alpha allnoconfig gcc-15.2.0
alpha allyesconfig gcc-15.2.0
alpha defconfig gcc-15.2.0
arc allmodconfig clang-16
arc allnoconfig gcc-15.2.0
arc allyesconfig clang-19
arc defconfig gcc-15.2.0
arc randconfig-001-20260408 gcc-8.5.0
arc randconfig-002-20260408 gcc-8.5.0
arm allnoconfig clang-23
arm allyesconfig clang-16
arm lpc18xx_defconfig clang-23
arm randconfig-001-20260408 gcc-8.5.0
arm64 allmodconfig clang-19
arm64 allnoconfig gcc-15.2.0
arm64 defconfig gcc-15.2.0
arm64 randconfig-001-20260408 gcc-14.3.0
arm64 randconfig-002-20260408 gcc-14.3.0
arm64 randconfig-003-20260408 gcc-14.3.0
arm64 randconfig-004-20260408 gcc-14.3.0
csky allmodconfig gcc-15.2.0
csky allnoconfig gcc-15.2.0
csky defconfig gcc-15.2.0
csky randconfig-001-20260408 gcc-14.3.0
csky randconfig-002-20260408 gcc-14.3.0
hexagon allmodconfig clang-17
hexagon allmodconfig gcc-15.2.0
hexagon allnoconfig clang-23
i386 allmodconfig clang-20
i386 allnoconfig gcc-14
i386 allyesconfig clang-20
i386 defconfig gcc-15.2.0
i386 randconfig-001-20260408 clang-20
i386 randconfig-002-20260408 clang-20
i386 randconfig-003-20260408 clang-20
i386 randconfig-004-20260408 clang-20
i386 randconfig-005-20260408 clang-20
i386 randconfig-006-20260408 clang-20
i386 randconfig-007-20260408 clang-20
i386 randconfig-011-20260408 gcc-14
i386 randconfig-012-20260408 gcc-14
i386 randconfig-013-20260408 gcc-14
i386 randconfig-014-20260408 gcc-14
i386 randconfig-015-20260408 gcc-14
i386 randconfig-016-20260408 gcc-14
i386 randconfig-017-20260408 gcc-14
loongarch allmodconfig clang-19
loongarch allnoconfig clang-23
loongarch defconfig clang-19
m68k allmodconfig gcc-15.2.0
m68k allnoconfig gcc-15.2.0
m68k allyesconfig clang-16
m68k defconfig clang-19
microblaze allnoconfig gcc-15.2.0
microblaze allyesconfig gcc-15.2.0
microblaze defconfig clang-19
mips allmodconfig gcc-15.2.0
mips allnoconfig gcc-15.2.0
mips allyesconfig gcc-15.2.0
nios2 allmodconfig gcc-11.5.0
nios2 allnoconfig clang-23
nios2 defconfig clang-19
openrisc allmodconfig gcc-11.5.0
openrisc allnoconfig clang-23
openrisc defconfig gcc-15.2.0
parisc allmodconfig gcc-15.2.0
parisc allnoconfig clang-23
parisc allyesconfig clang-19
parisc defconfig gcc-15.2.0
parisc randconfig-001-20260408 gcc-8.5.0
parisc randconfig-002-20260408 gcc-8.5.0
parisc64 defconfig clang-19
powerpc allmodconfig gcc-15.2.0
powerpc allnoconfig clang-23
powerpc randconfig-001-20260408 gcc-8.5.0
powerpc randconfig-002-20260408 gcc-8.5.0
powerpc64 randconfig-002-20260408 gcc-8.5.0
riscv allnoconfig clang-23
riscv allyesconfig clang-16
riscv randconfig-001-20260408 gcc-15.2.0
riscv randconfig-002-20260408 gcc-15.2.0
s390 allmodconfig clang-19
s390 allnoconfig clang-23
s390 allyesconfig gcc-15.2.0
sh allmodconfig gcc-15.2.0
sh allnoconfig clang-23
sh allyesconfig clang-19
sh defconfig gcc-14
sh randconfig-001-20260408 gcc-15.2.0
sh randconfig-002-20260408 gcc-15.2.0
sparc allnoconfig clang-23
sparc defconfig gcc-15.2.0
sparc64 defconfig gcc-14
um allmodconfig clang-19
um allnoconfig clang-23
um allyesconfig gcc-14
um allyesconfig gcc-15.2.0
um defconfig gcc-14
um i386_defconfig gcc-14
x86_64 allmodconfig clang-20
x86_64 allnoconfig clang-23
x86_64 allyesconfig clang-20
x86_64 buildonly-randconfig-001-20260408 clang-20
x86_64 buildonly-randconfig-002-20260408 clang-20
x86_64 buildonly-randconfig-003-20260408 clang-20
x86_64 buildonly-randconfig-004-20260408 clang-20
x86_64 buildonly-randconfig-005-20260408 clang-20
x86_64 buildonly-randconfig-006-20260408 clang-20
x86_64 defconfig gcc-14
x86_64 kexec clang-20
x86_64 randconfig-001-20260408 gcc-12
x86_64 randconfig-001-20260408 gcc-14
x86_64 randconfig-002-20260408 gcc-12
x86_64 randconfig-002-20260408 gcc-14
x86_64 randconfig-003-20260408 gcc-12
x86_64 randconfig-003-20260408 gcc-14
x86_64 randconfig-004-20260408 gcc-12
x86_64 randconfig-004-20260408 gcc-14
x86_64 randconfig-005-20260408 gcc-12
x86_64 randconfig-005-20260408 gcc-14
x86_64 randconfig-006-20260408 gcc-12
x86_64 randconfig-011-20260408 clang-20
x86_64 randconfig-012-20260408 clang-20
x86_64 randconfig-013-20260408 clang-20
x86_64 randconfig-014-20260408 clang-20
x86_64 randconfig-015-20260408 clang-20
x86_64 randconfig-016-20260408 clang-20
x86_64 randconfig-071-20260408 clang-20
x86_64 randconfig-072-20260408 clang-20
x86_64 randconfig-073-20260408 clang-20
x86_64 randconfig-074-20260408 clang-20
x86_64 randconfig-075-20260408 clang-20
x86_64 randconfig-076-20260408 clang-20
x86_64 rhel-9.4 clang-20
x86_64 rhel-9.4-bpf gcc-14
x86_64 rhel-9.4-func clang-20
x86_64 rhel-9.4-kselftests clang-20
x86_64 rhel-9.4-kunit gcc-14
x86_64 rhel-9.4-ltp gcc-14
x86_64 rhel-9.4-rust clang-20
xtensa allnoconfig clang-23
xtensa allyesconfig gcc-11.5.0
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply
* Re: [PATCH v5 2/3] dt-bindings: mfd: aspeed,ast2x00-scu: Describe AST2700 SCU0
From: Billy Tsai @ 2026-04-10 2:00 UTC (permalink / raw)
To: Rob Herring
Cc: Krzysztof Kozlowski, Lee Jones, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery, Linus Walleij, Bartosz Golaszewski,
Ryan Chen, Andrew Jeffery, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org,
openbmc@lists.ozlabs.org, linux-gpio@vger.kernel.org,
linux-clk@vger.kernel.org
In-Reply-To: <20260408133114.GA1938858-robh@kernel.org>
> > > > AST2700 consists of two interconnected SoC instances, each with its own
> > > > System Control Unit (SCU). The SCU0 provides pin control, interrupt
> > > > controllers, clocks, resets, and address-space mappings for the
> > > > Secondary and Tertiary Service Processors (SSP and TSP).
> > > >
> > > > Describe the SSP/TSP address mappings using the standard
> > > > memory-region and memory-region-names properties.
> > > >
> > > > Disallow legacy child nodes that are not present on AST2700, including
> > > > p2a-control and smp-memram. The latter is unnecessary as software can
> > > > access the scratch registers via the SCU syscon.
> > > >
> > > > Also allow the AST2700 SoC0 pin controller to be described as a child
> > > > node of the SCU0, and add an example illustrating the SCU0 layout,
> > > > including reserved-memory, interrupt controllers, and pinctrl.
> > > >
> > > > Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
> > > > ---
> > > > .../bindings/mfd/aspeed,ast2x00-scu.yaml | 117 +++++++++++++++++++++
> > > > 1 file changed, 117 insertions(+)
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
> > > > index a87f31fce019..86d51389689c 100644
> > > > --- a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
> > > > +++ b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
> > > > @@ -46,6 +46,9 @@ properties:
> > > > '#reset-cells':
> > > > const: 1
> > > >
> > > > + memory-region: true
> > > > + memory-region-names: true
> >
> > > Missing constraints. From where did you take such syntax (so I can fix
> > > it)?
> >
> > The intention was to constrain these properties conditionally for
> > AST2700 SCU0 as done further down in the patch.
> >
> > I can update the binding so that memory-region and memory-region-names
> > have baseline constraints (e.g. minItems and maxItems), and then refine them in the
> > conditional branches for AST2700SCU0, AST2700SCU1 and others
> >
> > memory-region:
> > minItems: 2
> > maxItems: 3
> > memory-region-names:
> > minItems: 2
> > maxItems: 3
> As of this patch, you don't need that. You can just define the regions
> and names at the top-level. And the conditional schema only needs to
> disallow them for the appropriate case.
Based on your suggestion, I will simplify the schema and define
memory-region and memory-region-names at the top-level without item
constraints, and only disallow them for the non-AST2700 cases.
The updated structure would look like:
memory-region:
description:
Reserved memory regions used by AST2700 SCU to configure
coprocessor address mapping windows.
memory-region-names:
description:
Names corresponding to the AST2700 coprocessor mapping windows
listed in memory-region.
...
- if:
properties:
compatible:
contains:
anyOf:
- const: aspeed,ast2700-scu0
- const: aspeed,ast2700-scu1
then:
patternProperties:
'^p2a-control@[0-9a-f]+$': false
'^smp-memram@[0-9a-f]+$': false
else:
properties:
memory-region: false
memory-region-names: false
Does this match what you had in mind?
Thanks
Billy Tsai
^ permalink raw reply
* Re: [PATCH] mfd: si476x: Modernize GPIO handling
From: Linus Walleij @ 2026-04-09 22:31 UTC (permalink / raw)
To: Lee Jones; +Cc: Andrey Smirnov, Bartosz Golaszewski, linux-kernel, linux-gpio
In-Reply-To: <20260409145823.GG3290953@google.com>
On Thu, Apr 9, 2026 at 4:58 PM Lee Jones <lee@kernel.org> wrote:
> On Fri, 27 Mar 2026, Linus Walleij wrote:
> Doesn't seem to want to apply:
>
> diff a/include/linux/mfd/si476x-core.h b/include/linux/mfd/si476x-core.h (rejected hunks)
OK I'll rebase on v7.1-rc1 and resend, definitely no hurry with this
stuff.
Thanks Lee!
Linus
^ permalink raw reply
* Re: [PATCH] gpio: rockchip: convert to dynamic GPIO base allocation
From: Linus Walleij @ 2026-04-09 22:25 UTC (permalink / raw)
To: Jonas Karlman
Cc: Shawn Lin, Bartosz Golaszewski, Heiko Stuebner, linux-gpio,
linux-rockchip, ye.zhang
In-Reply-To: <384b25a0-d55d-4415-82fb-dcf2e6ad1232@kwiboo.se>
On Thu, Apr 9, 2026 at 9:09 PM Jonas Karlman <jonas@kwiboo.se> wrote:
> This patch is causing boot issues on my Rock Pi 4 (RK3399) board using
> next-20260409 kernel where this patch has been applied as c8079f83e0bf.
>
> [ 0.082771] rockchip-gpio ff720000.gpio: probed /pinctrl/gpio@ff720000
> [ 0.083531] rockchip-gpio ff730000.gpio: probed /pinctrl/gpio@ff730000
> [ 0.084110] rockchip-gpio ff780000.gpio: probed /pinctrl/gpio@ff780000
> [ 0.084746] rockchip-gpio ff788000.gpio: probed /pinctrl/gpio@ff788000
> [ 0.085389] rockchip-gpio ff790000.gpio: probed /pinctrl/gpio@ff790000
> --
> [ 0.212208] rockchip-pinctrl pinctrl: pin 637 is not registered so it cannot be requested
> [ 0.212271] rockchip-pinctrl pinctrl: error -EINVAL: pin-637 (gpio3:637)
> [ 0.212344] leds-gpio leds: error -EINVAL: Failed to get GPIO '/leds/led-0'
> [ 0.212389] leds-gpio leds: probe with driver leds-gpio failed with error -22
I think this may be because the rk3399 is missing gpio-ranges despite it is a
new platform and should have had its gpio-ranges defined in
arch/arm64/boot/dts/rockchip/rk3399-base.dtsi ...
A bunch of these rockchips seem to have this problem despite the
code in pinctrl-rockchip.c that says:
/*
* For DeviceTree-supported systems, the gpio core checks the
* pinctrl's device node for the "gpio-ranges" property.
* If it is present, it takes care of adding the pin ranges
* for the driver. In this case the driver can skip ahead.
*
* In order to remain compatible with older, existing DeviceTree
* files which don't set the "gpio-ranges" property or systems that
* utilize ACPI the driver has to call gpiochip_add_pin_range().
*/
if (!of_property_present(bank->of_node, "gpio-ranges")) {
struct device_node *pctlnp = of_get_parent(bank->of_node);
struct pinctrl_dev *pctldev = NULL;
if (!pctlnp)
return -ENODATA;
pctldev = of_pinctrl_get(pctlnp);
of_node_put(pctlnp);
if (!pctldev)
return -ENODEV;
ret = gpiochip_add_pin_range(gc, dev_name(pctldev->dev), 0,
gc->base, gc->ngpio);
if (ret) {
dev_err(bank->dev, "Failed to add pin range\n");
goto fail;
}
}
Notice dereference of gpiolib internal gc-base here.
ret = gpiochip_add_pin_range(gc, dev_name(pctldev->dev), 0,
gc->base, gc->ngpio);
arguments are gpipchip, pinctontrol device name,
gpio offset, pin offset, number of pins.
GPIO offset always 0?? Passing GPIO offset as pin offset??
This is probably just working because of luck that 0,0 is passed.
This should probably rather be something like:
ret = gpiochip_add_pin_range(gc, dev_name(pctldev->dev), gc->base,
bank->bank_num * bank->nr_pins, gc->ngpio);
Here we put the assigned (by gpiolib) gc->base in the right place, then
bank->bank_num should be 0,1,2... and bank->nr_pins always 32 (I think).
Jonas can you test this oneliner change? I can send a proper patch
if it helps.
If this works the DTS files can (SHOULD) be fixed with proper ranges later.
It would be nice if we could augment the rockchip pinctrl DT schema to
make gpio-ranges mandatory on new SoCs.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH v3] ASoC: uda1380: Modernize the driver
From: Linus Walleij @ 2026-04-09 21:39 UTC (permalink / raw)
To: Philipp Zabel, Jaroslav Kysela, Takashi Iwai, Liam Girdwood,
Mark Brown, Bartosz Golaszewski
Cc: linux-sound, linux-gpio, Linus Walleij
This codec driver depended on the legacy GPIO API, and nothing
in the kernel is defining the platform data, so get rid of this.
Two in-kernel device trees are defining this codec using
undocumented device tree properties, so support these for now.
The same properties can be defined using software nodes if board
files are desired. The device tree use the "-gpio" rather than
"-gpios" suffix but the GPIO DT parser will deal with that.
Since there may be out of tree users, migrate to GPIO descriptors,
drop the platform data that is unused, and assign the dac_clk the
value that was used in all platforms found in a historical dig,
and support setting the clock to the PLL using the undocumented
device tree property.
Add some menuconfig so the codec can be selected and tested.
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
This makes the driver usable on contemporary Linux, maybe it will
even work, I can't test it.
---
Changes in v3:
- Drop dereference of platform data and check for its
presence from probe()
- Scratch my head wondering why that compiled despite I had
deleted the platform data struct in the same commit... I guess
C thinks it's fine since it was just treating it as
"some anonymous pointer" without even a forward-declaration.
- Link to v2: https://lore.kernel.org/r/20260409-asoc-uda1380-v2-1-42d02079ecd5@kernel.org
Changes in v2:
- Update commit message referencing existing device trees.
- Make sure the (undocumented) DT properties will work.
- Add clk source handling for the undocumented DT property as
well while we're at it.
- Mention LPC32xx in the Kconfig.
- Link to v1: https://lore.kernel.org/r/20260327-asoc-uda1380-v1-1-f6f91be9b7f8@kernel.org
---
include/sound/uda1380.h | 19 --------------
sound/soc/codecs/Kconfig | 6 +++--
sound/soc/codecs/uda1380.c | 65 ++++++++++++++++++++++++----------------------
3 files changed, 38 insertions(+), 52 deletions(-)
diff --git a/include/sound/uda1380.h b/include/sound/uda1380.h
deleted file mode 100644
index 2e42ea2d0cfd..000000000000
--- a/include/sound/uda1380.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * UDA1380 ALSA SoC Codec driver
- *
- * Copyright 2009 Philipp Zabel
- */
-
-#ifndef __UDA1380_H
-#define __UDA1380_H
-
-struct uda1380_platform_data {
- int gpio_power;
- int gpio_reset;
- int dac_clk;
-#define UDA1380_DAC_CLK_SYSCLK 0
-#define UDA1380_DAC_CLK_WSPLL 1
-};
-
-#endif /* __UDA1380_H */
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index adb3fb923be3..71fd4e219604 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -2364,9 +2364,11 @@ config SND_SOC_UDA1342
mic inputs), stereo audio DAC, with basic audio processing.
config SND_SOC_UDA1380
- tristate
+ tristate "Philips UDA1380 CODEC"
depends on I2C
- depends on GPIOLIB_LEGACY
+ help
+ The UDA1380 codec is used in the HTC Magician and on a number of
+ Samsung reference boards, as well as the LPC32xx series.
config SND_SOC_WCD_CLASSH
tristate
diff --git a/sound/soc/codecs/uda1380.c b/sound/soc/codecs/uda1380.c
index 9e9c540a45ca..d8a23a84b9e6 100644
--- a/sound/soc/codecs/uda1380.c
+++ b/sound/soc/codecs/uda1380.c
@@ -16,16 +16,19 @@
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/errno.h>
-#include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
#include <linux/delay.h>
#include <linux/i2c.h>
+#include <linux/property.h>
#include <linux/workqueue.h>
#include <sound/core.h>
#include <sound/control.h>
#include <sound/initval.h>
#include <sound/soc.h>
#include <sound/tlv.h>
-#include <sound/uda1380.h>
+
+#define UDA1380_DAC_CLK_SYSCLK 0
+#define UDA1380_DAC_CLK_WSPLL 1
#include "uda1380.h"
@@ -36,6 +39,8 @@ struct uda1380_priv {
struct work_struct work;
struct i2c_client *i2c;
u16 *reg_cache;
+ struct gpio_desc *power;
+ struct gpio_desc *reset;
};
/*
@@ -150,13 +155,12 @@ static void uda1380_sync_cache(struct snd_soc_component *component)
static int uda1380_reset(struct snd_soc_component *component)
{
- struct uda1380_platform_data *pdata = component->dev->platform_data;
struct uda1380_priv *uda1380 = snd_soc_component_get_drvdata(component);
- if (gpio_is_valid(pdata->gpio_reset)) {
- gpio_set_value(pdata->gpio_reset, 1);
+ if (uda1380->reset) {
+ gpiod_set_value(uda1380->reset, 1);
mdelay(1);
- gpio_set_value(pdata->gpio_reset, 0);
+ gpiod_set_value(uda1380->reset, 0);
} else {
u8 data[3];
@@ -589,9 +593,9 @@ static int uda1380_set_bias_level(struct snd_soc_component *component,
enum snd_soc_bias_level level)
{
struct snd_soc_dapm_context *dapm = snd_soc_component_to_dapm(component);
+ struct uda1380_priv *uda1380 = snd_soc_component_get_drvdata(component);
int pm = uda1380_read_reg_cache(component, UDA1380_PM);
int reg;
- struct uda1380_platform_data *pdata = component->dev->platform_data;
switch (level) {
case SND_SOC_BIAS_ON:
@@ -601,8 +605,8 @@ static int uda1380_set_bias_level(struct snd_soc_component *component,
break;
case SND_SOC_BIAS_STANDBY:
if (snd_soc_dapm_get_bias_level(dapm) == SND_SOC_BIAS_OFF) {
- if (gpio_is_valid(pdata->gpio_power)) {
- gpio_set_value(pdata->gpio_power, 1);
+ if (uda1380->power) {
+ gpiod_set_value(uda1380->power, 1);
mdelay(1);
uda1380_reset(component);
}
@@ -612,10 +616,10 @@ static int uda1380_set_bias_level(struct snd_soc_component *component,
uda1380_write(component, UDA1380_PM, 0x0);
break;
case SND_SOC_BIAS_OFF:
- if (!gpio_is_valid(pdata->gpio_power))
+ if (!uda1380->power)
break;
- gpio_set_value(pdata->gpio_power, 0);
+ gpiod_set_value(uda1380->power, 0);
/* Mark mixer regs cache dirty to sync them with
* codec regs on power on.
@@ -694,13 +698,12 @@ static struct snd_soc_dai_driver uda1380_dai[] = {
static int uda1380_probe(struct snd_soc_component *component)
{
- struct uda1380_platform_data *pdata =component->dev->platform_data;
struct uda1380_priv *uda1380 = snd_soc_component_get_drvdata(component);
int ret;
uda1380->component = component;
- if (!gpio_is_valid(pdata->gpio_power)) {
+ if (!uda1380->power) {
ret = uda1380_reset(component);
if (ret)
return ret;
@@ -709,7 +712,7 @@ static int uda1380_probe(struct snd_soc_component *component)
INIT_WORK(&uda1380->work, uda1380_flush_work);
/* set clock input */
- switch (pdata->dac_clk) {
+ switch (uda1380->dac_clk) {
case UDA1380_DAC_CLK_SYSCLK:
uda1380_write_reg_cache(component, UDA1380_CLK, 0);
break;
@@ -741,31 +744,31 @@ static const struct snd_soc_component_driver soc_component_dev_uda1380 = {
static int uda1380_i2c_probe(struct i2c_client *i2c)
{
- struct uda1380_platform_data *pdata = i2c->dev.platform_data;
+ struct device *dev = &i2c->dev;
struct uda1380_priv *uda1380;
int ret;
- if (!pdata)
- return -EINVAL;
-
uda1380 = devm_kzalloc(&i2c->dev, sizeof(struct uda1380_priv),
GFP_KERNEL);
if (uda1380 == NULL)
return -ENOMEM;
- if (gpio_is_valid(pdata->gpio_reset)) {
- ret = devm_gpio_request_one(&i2c->dev, pdata->gpio_reset,
- GPIOF_OUT_INIT_LOW, "uda1380 reset");
- if (ret)
- return ret;
- }
-
- if (gpio_is_valid(pdata->gpio_power)) {
- ret = devm_gpio_request_one(&i2c->dev, pdata->gpio_power,
- GPIOF_OUT_INIT_LOW, "uda1380 power");
- if (ret)
- return ret;
- }
+ uda1380->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
+ if (IS_ERR(uda1380->reset))
+ return dev_err_probe(dev, PTR_ERR(uda1380->reset),
+ "error obtaining reset GPIO\n");
+ gpiod_set_consumer_name(uda1380->reset, "uda1380 reset");
+
+ uda1380->power = devm_gpiod_get_optional(dev, "power", GPIOD_OUT_LOW);
+ if (IS_ERR(uda1380->power))
+ return dev_err_probe(dev, PTR_ERR(uda1380->power),
+ "error obtaining power GPIO\n");
+ gpiod_set_consumer_name(uda1380->power, "uda1380 power");
+
+ /* This is just some default */
+ uda1380->dac_clk = UDA1380_DAC_CLK_SYSCLK;
+ if (device_property_match_string(dev, "dac-clk", "wspll") >= 0)
+ uda1380->dac_clk = UDA1380_DAC_CLK_WSPLL;
uda1380->reg_cache = devm_kmemdup_array(&i2c->dev, uda1380_reg, ARRAY_SIZE(uda1380_reg),
sizeof(uda1380_reg[0]), GFP_KERNEL);
---
base-commit: 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f
change-id: 20260327-asoc-uda1380-3fc67773249a
Best regards,
--
Linus Walleij <linusw@kernel.org>
^ permalink raw reply related
* Aw: Re: [PATCH v1] gpiolib: fix trace on missing gpiochip->get_direction callback
From: Frank Wunderlich @ 2026-04-09 20:42 UTC (permalink / raw)
To: brgl, linux; +Cc: linux-gpio, linux-kernel, daniel, linusw, brgl
In-Reply-To: <CAMRc=Mdh=P8ABX2kO-j9hp0oy=1-9rJZUYwZR4APNz1qK9FVcQ@mail.gmail.com>
Hi
> Gesendet: Donnerstag, 9. April 2026 um 16:23
> Von: "Bartosz Golaszewski" <brgl@kernel.org>
>
> I prefer GPIO drivers to just implement get_direction(). Looking at the code
> it should be pretty straightforward for this driver.
>
> Can you test if the following works for you?
>
> diff --git a/drivers/pinctrl/mediatek/pinctrl-moore.c
> b/drivers/pinctrl/mediatek/pinctrl-moore.c
> index 70f608347a5f6..071ba849e5322 100644
> --- a/drivers/pinctrl/mediatek/pinctrl-moore.c
> +++ b/drivers/pinctrl/mediatek/pinctrl-moore.c
> @@ -520,6 +520,23 @@ static int mtk_gpio_direction_output(struct
> gpio_chip *chip, unsigned int gpio,
> return pinctrl_gpio_direction_output(chip, gpio);
> }
>
> +static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
> +{
> + struct mtk_pinctrl *hw = gpiochip_get_data(chip);
> + const struct mtk_pin_desc *desc;
> + int ret, dir;
> +
> + desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
> + if (!desc->name)
> + return -ENOTSUPP;
> +
> + ret = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &dir);
> + if (ret)
> + return ret;
> +
> + return dir ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;
> +}
> +
> static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
> {
> struct mtk_pinctrl *hw = gpiochip_get_data(chip);
> @@ -566,6 +583,7 @@ static int mtk_build_gpiochip(struct mtk_pinctrl *hw)
> chip->parent = hw->dev;
> chip->request = gpiochip_generic_request;
> chip->free = gpiochip_generic_free;
> + chip->get_direction = mtk_gpio_get_direction;
> chip->direction_input = pinctrl_gpio_direction_input;
> chip->direction_output = mtk_gpio_direction_output;
> chip->get = mtk_gpio_get;
it looks good on a quick test, just reverted my patch and applied yours and got no trace
root@bpi-r4:~# cat /sys/kernel/debug/gpio
gpiochip0: 84 GPIOs, parent: platform/1001f000.pinctrl, pinctrl_moore:
gpio-0 ( |tx-disable ) in lo
gpio-1 ( |mod-def0 ) in hi IRQ ACTIVE LOW
gpio-2 ( |los ) in hi IRQ
gpio-12 ( |cd ) in lo IRQ ACTIVE LOW
gpio-13 ( |reset ) in hi IRQ ACTIVE LOW
gpio-14 ( |WPS ) in hi IRQ ACTIVE LOW
gpio-21 ( |tx-disable ) out hi
gpio-69 ( |mod-def0 ) in lo IRQ ACTIVE LOW
gpio-70 ( |los ) in hi IRQ
gpiochip1: 16 GPIOs, parent: i2c/3-0020, 3-0020, can sleep:
gpio-14 ( |blue:activity ) out lo
gpio-15 ( |red:fault ) out lo
output seems correct.
regards Frank
> Thanks,
> Bart
^ permalink raw reply
* Re: [PATCH v2] ASoC: uda1380: Modernize the driver
From: Mark Brown @ 2026-04-09 19:32 UTC (permalink / raw)
To: Linus Walleij
Cc: Philipp Zabel, Jaroslav Kysela, Takashi Iwai, Liam Girdwood,
Bartosz Golaszewski, linux-sound, linux-gpio
In-Reply-To: <20260409-asoc-uda1380-v2-1-42d02079ecd5@kernel.org>
[-- Attachment #1: Type: text/plain, Size: 792 bytes --]
On Thu, Apr 09, 2026 at 09:17:14PM +0200, Linus Walleij wrote:
> This makes the driver usable on contemporary Linux, maybe it will
> even work, I can't test it.
Don't think so...
> @@ -742,6 +745,7 @@ static const struct snd_soc_component_driver soc_component_dev_uda1380 = {
> static int uda1380_i2c_probe(struct i2c_client *i2c)
> {
> struct uda1380_platform_data *pdata = i2c->dev.platform_data;
> + struct device *dev = &i2c->dev;
> struct uda1380_priv *uda1380;
> int ret;
We still have the platform data above, and just below this we have:
if (!pdata)
return -EINVAL;
so I'm not sure how the driver is going to instantiate, there's
mandatory platform data still. Not that the driver would've
instantiated before either with anyhing in mainline...
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply
* [PATCH v2] ASoC: uda1380: Modernize the driver
From: Linus Walleij @ 2026-04-09 19:17 UTC (permalink / raw)
To: Philipp Zabel, Jaroslav Kysela, Takashi Iwai, Liam Girdwood,
Mark Brown, Bartosz Golaszewski
Cc: linux-sound, linux-gpio, Linus Walleij
This codec driver depended on the legacy GPIO API, and nothing
in the kernel is defining the platform data, so get rid of this.
Two in-kernel device trees are defining this codec using
undocumented device tree properties, so support these for now.
The same properties can be defined using software nodes if board
files are desired. The device tree use the "-gpio" rather than
"-gpios" suffix but the GPIO DT parser will deal with that.
Since there may be out of tree users, migrate to GPIO descriptors,
drop the platform data that is unused, and assign the dac_clk the
value that was used in all platforms found in a historical dig,
and support setting the clock to the PLL using the undocumented
device tree property.
Add some menuconfig so the codec can be selected and tested.
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
This makes the driver usable on contemporary Linux, maybe it will
even work, I can't test it.
---
Changes in v2:
- Update commit message referencing existing device trees.
- Make sure the (undocumented) DT properties will work.
- Add clk source handling for the undocumented DT property as
well while we're at it.
- Mention LPC32xx in the Kconfig.
- Link to v1: https://lore.kernel.org/r/20260327-asoc-uda1380-v1-1-f6f91be9b7f8@kernel.org
---
include/sound/uda1380.h | 19 ---------------
sound/soc/codecs/Kconfig | 6 +++--
sound/soc/codecs/uda1380.c | 61 ++++++++++++++++++++++++++--------------------
3 files changed, 38 insertions(+), 48 deletions(-)
diff --git a/include/sound/uda1380.h b/include/sound/uda1380.h
deleted file mode 100644
index 2e42ea2d0cfd..000000000000
--- a/include/sound/uda1380.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * UDA1380 ALSA SoC Codec driver
- *
- * Copyright 2009 Philipp Zabel
- */
-
-#ifndef __UDA1380_H
-#define __UDA1380_H
-
-struct uda1380_platform_data {
- int gpio_power;
- int gpio_reset;
- int dac_clk;
-#define UDA1380_DAC_CLK_SYSCLK 0
-#define UDA1380_DAC_CLK_WSPLL 1
-};
-
-#endif /* __UDA1380_H */
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index adb3fb923be3..71fd4e219604 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -2364,9 +2364,11 @@ config SND_SOC_UDA1342
mic inputs), stereo audio DAC, with basic audio processing.
config SND_SOC_UDA1380
- tristate
+ tristate "Philips UDA1380 CODEC"
depends on I2C
- depends on GPIOLIB_LEGACY
+ help
+ The UDA1380 codec is used in the HTC Magician and on a number of
+ Samsung reference boards, as well as the LPC32xx series.
config SND_SOC_WCD_CLASSH
tristate
diff --git a/sound/soc/codecs/uda1380.c b/sound/soc/codecs/uda1380.c
index 9e9c540a45ca..01523ab81114 100644
--- a/sound/soc/codecs/uda1380.c
+++ b/sound/soc/codecs/uda1380.c
@@ -16,16 +16,19 @@
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/errno.h>
-#include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
#include <linux/delay.h>
#include <linux/i2c.h>
+#include <linux/property.h>
#include <linux/workqueue.h>
#include <sound/core.h>
#include <sound/control.h>
#include <sound/initval.h>
#include <sound/soc.h>
#include <sound/tlv.h>
-#include <sound/uda1380.h>
+
+#define UDA1380_DAC_CLK_SYSCLK 0
+#define UDA1380_DAC_CLK_WSPLL 1
#include "uda1380.h"
@@ -36,6 +39,8 @@ struct uda1380_priv {
struct work_struct work;
struct i2c_client *i2c;
u16 *reg_cache;
+ struct gpio_desc *power;
+ struct gpio_desc *reset;
};
/*
@@ -150,13 +155,12 @@ static void uda1380_sync_cache(struct snd_soc_component *component)
static int uda1380_reset(struct snd_soc_component *component)
{
- struct uda1380_platform_data *pdata = component->dev->platform_data;
struct uda1380_priv *uda1380 = snd_soc_component_get_drvdata(component);
- if (gpio_is_valid(pdata->gpio_reset)) {
- gpio_set_value(pdata->gpio_reset, 1);
+ if (uda1380->reset) {
+ gpiod_set_value(uda1380->reset, 1);
mdelay(1);
- gpio_set_value(pdata->gpio_reset, 0);
+ gpiod_set_value(uda1380->reset, 0);
} else {
u8 data[3];
@@ -589,9 +593,9 @@ static int uda1380_set_bias_level(struct snd_soc_component *component,
enum snd_soc_bias_level level)
{
struct snd_soc_dapm_context *dapm = snd_soc_component_to_dapm(component);
+ struct uda1380_priv *uda1380 = snd_soc_component_get_drvdata(component);
int pm = uda1380_read_reg_cache(component, UDA1380_PM);
int reg;
- struct uda1380_platform_data *pdata = component->dev->platform_data;
switch (level) {
case SND_SOC_BIAS_ON:
@@ -601,8 +605,8 @@ static int uda1380_set_bias_level(struct snd_soc_component *component,
break;
case SND_SOC_BIAS_STANDBY:
if (snd_soc_dapm_get_bias_level(dapm) == SND_SOC_BIAS_OFF) {
- if (gpio_is_valid(pdata->gpio_power)) {
- gpio_set_value(pdata->gpio_power, 1);
+ if (uda1380->power) {
+ gpiod_set_value(uda1380->power, 1);
mdelay(1);
uda1380_reset(component);
}
@@ -612,10 +616,10 @@ static int uda1380_set_bias_level(struct snd_soc_component *component,
uda1380_write(component, UDA1380_PM, 0x0);
break;
case SND_SOC_BIAS_OFF:
- if (!gpio_is_valid(pdata->gpio_power))
+ if (!uda1380->power)
break;
- gpio_set_value(pdata->gpio_power, 0);
+ gpiod_set_value(uda1380->power, 0);
/* Mark mixer regs cache dirty to sync them with
* codec regs on power on.
@@ -694,13 +698,12 @@ static struct snd_soc_dai_driver uda1380_dai[] = {
static int uda1380_probe(struct snd_soc_component *component)
{
- struct uda1380_platform_data *pdata =component->dev->platform_data;
struct uda1380_priv *uda1380 = snd_soc_component_get_drvdata(component);
int ret;
uda1380->component = component;
- if (!gpio_is_valid(pdata->gpio_power)) {
+ if (!uda1380->power) {
ret = uda1380_reset(component);
if (ret)
return ret;
@@ -709,7 +712,7 @@ static int uda1380_probe(struct snd_soc_component *component)
INIT_WORK(&uda1380->work, uda1380_flush_work);
/* set clock input */
- switch (pdata->dac_clk) {
+ switch (uda1380->dac_clk) {
case UDA1380_DAC_CLK_SYSCLK:
uda1380_write_reg_cache(component, UDA1380_CLK, 0);
break;
@@ -742,6 +745,7 @@ static const struct snd_soc_component_driver soc_component_dev_uda1380 = {
static int uda1380_i2c_probe(struct i2c_client *i2c)
{
struct uda1380_platform_data *pdata = i2c->dev.platform_data;
+ struct device *dev = &i2c->dev;
struct uda1380_priv *uda1380;
int ret;
@@ -753,19 +757,22 @@ static int uda1380_i2c_probe(struct i2c_client *i2c)
if (uda1380 == NULL)
return -ENOMEM;
- if (gpio_is_valid(pdata->gpio_reset)) {
- ret = devm_gpio_request_one(&i2c->dev, pdata->gpio_reset,
- GPIOF_OUT_INIT_LOW, "uda1380 reset");
- if (ret)
- return ret;
- }
-
- if (gpio_is_valid(pdata->gpio_power)) {
- ret = devm_gpio_request_one(&i2c->dev, pdata->gpio_power,
- GPIOF_OUT_INIT_LOW, "uda1380 power");
- if (ret)
- return ret;
- }
+ uda1380->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
+ if (IS_ERR(uda1380->reset))
+ return dev_err_probe(dev, PTR_ERR(uda1380->reset),
+ "error obtaining reset GPIO\n");
+ gpiod_set_consumer_name(uda1380->reset, "uda1380 reset");
+
+ uda1380->power = devm_gpiod_get_optional(dev, "power", GPIOD_OUT_LOW);
+ if (IS_ERR(uda1380->power))
+ return dev_err_probe(dev, PTR_ERR(uda1380->power),
+ "error obtaining power GPIO\n");
+ gpiod_set_consumer_name(uda1380->power, "uda1380 power");
+
+ /* This is just some default */
+ uda1380->dac_clk = UDA1380_DAC_CLK_SYSCLK;
+ if (device_property_match_string(dev, "dac-clk", "wspll") >= 0)
+ uda1380->dac_clk = UDA1380_DAC_CLK_WSPLL;
uda1380->reg_cache = devm_kmemdup_array(&i2c->dev, uda1380_reg, ARRAY_SIZE(uda1380_reg),
sizeof(uda1380_reg[0]), GFP_KERNEL);
---
base-commit: 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f
change-id: 20260327-asoc-uda1380-3fc67773249a
Best regards,
--
Linus Walleij <linusw@kernel.org>
^ permalink raw reply related
* Re: [PATCH] gpio: rockchip: convert to dynamic GPIO base allocation
From: Jonas Karlman @ 2026-04-09 19:09 UTC (permalink / raw)
To: Shawn Lin, Bartosz Golaszewski
Cc: Linus Walleij, Heiko Stuebner, linux-gpio, linux-rockchip,
ye.zhang
In-Reply-To: <73130e47-dbd7-c0d0-eba1-8bafba9f91e5@rock-chips.com>
Hi,
On 4/7/2026 11:59 AM, Shawn Lin wrote:
> Hi Bartosz,
>
> 在 2026/03/31 星期二 16:05, Bartosz Golaszewski 写道:
>> On Mon, Mar 30, 2026 at 11:53 AM Shawn Lin <shawn.lin@rock-chips.com> wrote:
>>>
>>> This driver is used on device tree based platform. Use dynamic
>>> GPIO numberspace base to suppress the warning:
>>>
>>> gpio gpiochip0: Static allocation of GPIO base is deprecated, use dynamic allocation.
>>> gpio gpiochip1: Static allocation of GPIO base is deprecated, use dynamic allocation.
>>> gpio gpiochip2: Static allocation of GPIO base is deprecated, use dynamic allocation.
>>> gpio gpiochip3: Static allocation of GPIO base is deprecated, use dynamic allocation.
>>> gpio gpiochip4: Static allocation of GPIO base is deprecated, use dynamic allocation.
>>>
>>> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
>>> ---
>>>
>>> drivers/gpio/gpio-rockchip.c | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c
>>> index ac1b939..08ea644 100644
>>> --- a/drivers/gpio/gpio-rockchip.c
>>> +++ b/drivers/gpio/gpio-rockchip.c
>>> @@ -582,7 +582,7 @@ static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank)
>>> bank->gpio_chip = rockchip_gpiolib_chip;
>>>
>>> gc = &bank->gpio_chip;
>>> - gc->base = bank->pin_base;
>>> + gc->base = -1;
>>> gc->ngpio = bank->nr_pins;
>>> gc->label = bank->name;
>>> gc->parent = bank->dev;
>>> --
>>> 2.7.4
>>>
>>
>> I take it you know first-hand that nobody depends on the predefined
>> GPIO numbering for this driver? If so, I can queue it for v7.1.
>>
>
> I have confirmed internally that nobody depends on the pre-defined
> GPIO numbering.
This patch is causing boot issues on my Rock Pi 4 (RK3399) board using
next-20260409 kernel where this patch has been applied as c8079f83e0bf.
[ 0.082771] rockchip-gpio ff720000.gpio: probed /pinctrl/gpio@ff720000
[ 0.083531] rockchip-gpio ff730000.gpio: probed /pinctrl/gpio@ff730000
[ 0.084110] rockchip-gpio ff780000.gpio: probed /pinctrl/gpio@ff780000
[ 0.084746] rockchip-gpio ff788000.gpio: probed /pinctrl/gpio@ff788000
[ 0.085389] rockchip-gpio ff790000.gpio: probed /pinctrl/gpio@ff790000
--
[ 0.212208] rockchip-pinctrl pinctrl: pin 637 is not registered so it cannot be requested
[ 0.212271] rockchip-pinctrl pinctrl: error -EINVAL: pin-637 (gpio3:637)
[ 0.212344] leds-gpio leds: error -EINVAL: Failed to get GPIO '/leds/led-0'
[ 0.212389] leds-gpio leds: probe with driver leds-gpio failed with error -22
--
[ 0.607545] rockchip-pinctrl pinctrl: pin 519 is not registered so it cannot be requested
[ 0.608775] rockchip-pinctrl pinctrl: error -EINVAL: pin-519 (gpio0:519)
[ 0.610003] dwmmc_rockchip fe320000.mmc: probe with driver dwmmc_rockchip failed with error -22
--
[ 0.805882] rockchip-pinctrl pinctrl: pin 547 is not registered so it cannot be requested
[ 0.806672] rockchip-pinctrl pinctrl: error -EINVAL: pin-547 (gpio1:547)
[ 0.807301] reg-fixed-voltage regulator-vbus-typec: error -EINVAL: can't get GPIO
[ 0.807307] rockchip-pinctrl pinctrl: pin 602 is not registered so it cannot be requested
[ 0.807970] reg-fixed-voltage regulator-vbus-typec: probe with driver reg-fixed-voltage failed with error -22
[ 0.808692] rockchip-pinctrl pinctrl: error -EINVAL: pin-602 (gpio2:602)
[ 0.810279] reg-fixed-voltage regulator-vcc3v3-pcie: error -EINVAL: can't get GPIO
[ 0.810284] rockchip-pinctrl pinctrl: pin 665 is not registered so it cannot be requested
[ 0.810299] rockchip-pinctrl pinctrl: error -EINVAL: pin-665 (gpio4:665)
[ 0.810960] reg-fixed-voltage regulator-vcc3v3-pcie: probe with driver reg-fixed-voltage failed with error -22
[ 0.811679] reg-fixed-voltage regulator-vcc5v0-host: error -EINVAL: can't get GPIO
[ 0.813943] reg-fixed-voltage regulator-vcc5v0-host: probe with driver reg-fixed-voltage failed with error -22
--
[ 0.867788] rockchip-pinctrl pinctrl: pin 522 is not registered so it cannot be requested
[ 0.868537] rockchip-pinctrl pinctrl: error -EINVAL: pin-522 (gpio0:522)
[ 0.869166] pwrseq_simple sdio-pwrseq: error -EINVAL: reset GPIOs not ready
[ 0.869798] pwrseq_simple sdio-pwrseq: probe with driver pwrseq_simple failed with error -22
--
[ 0.940365] rockchip-pinctrl pinctrl: pin 623 is not registered so it cannot be requested
[ 0.941084] rockchip-pinctrl pinctrl: error -EINVAL: pin-623 (gpio3:623)
[ 0.941823] rk_gmac-dwmac fe300000.ethernet: error -EINVAL: Cannot register the MDIO bus
[ 0.942542] rk_gmac-dwmac fe300000.ethernet: error -EINVAL: MDIO bus (id: 0) registration failed
[ 0.943772] rk_gmac-dwmac fe300000.ethernet: probe with driver rk_gmac-dwmac failed with error -22
With c8079f83e0bf ("gpio: rockchip: convert to dynamic GPIO base
allocation") reverted everything goes back to normal and gpio/pinctrl
and all devices depending on gpio works again.
Regards,
Jonas
>
> Thanks.
>
>> Bart
>>
^ permalink raw reply
* [PATCH] gpio: tegra: return -ENOMEM on allocation failure in probe
From: Samasth Norway Ananda @ 2026-04-09 18:58 UTC (permalink / raw)
To: linusw, brgl, thierry.reding, jonathanh
Cc: linux-gpio, linux-tegra, linux-kernel, samasth.norway.ananda
devm_kzalloc() failure in tegra_gpio_probe() returns -ENODEV, which
indicates "no such device". The correct error code for a memory
allocation failure is -ENOMEM.
Signed-off-by: Samasth Norway Ananda <samasth.norway.ananda@oracle.com>
---
drivers/gpio/gpio-tegra.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
index b14052fe64ac..df06b56a2ade 100644
--- a/drivers/gpio/gpio-tegra.c
+++ b/drivers/gpio/gpio-tegra.c
@@ -698,7 +698,7 @@ static int tegra_gpio_probe(struct platform_device *pdev)
tgi = devm_kzalloc(&pdev->dev, sizeof(*tgi), GFP_KERNEL);
if (!tgi)
- return -ENODEV;
+ return -ENOMEM;
tgi->soc = of_device_get_match_data(&pdev->dev);
tgi->dev = &pdev->dev;
--
2.50.1
^ permalink raw reply related
* Re: [PATCH 00/61] treewide: Use IS_ERR_OR_NULL over manual NULL check - refactor
From: Al Viro @ 2026-04-09 18:16 UTC (permalink / raw)
To: Philipp Hahn
Cc: amd-gfx, apparmor, bpf, ceph-devel, cocci, dm-devel, dri-devel,
gfs2, intel-gfx, intel-wired-lan, iommu, kvm, linux-arm-kernel,
linux-block, linux-bluetooth, linux-btrfs, linux-cifs, linux-clk,
linux-erofs, linux-ext4, linux-fsdevel, linux-gpio, linux-hyperv,
linux-input, linux-kernel, linux-leds, linux-media, linux-mips,
linux-mm, linux-modules, linux-mtd, linux-nfs, linux-omap,
linux-phy, linux-pm, linux-rockchip, linux-s390, linux-scsi,
linux-sctp, linux-security-module, linux-sh, linux-sound,
linux-stm32, linux-trace-kernel, linux-usb, linux-wireless,
netdev, ntfs3, samba-technical, sched-ext, target-devel,
tipc-discussion, v9fs, Julia Lawall, Nicolas Palix, Chris Mason,
David Sterba, Ilya Dryomov, Alex Markuze, Viacheslav Dubeyko,
Theodore Ts'o, Andreas Dilger, Steve French, Paulo Alcantara,
Ronnie Sahlberg, Shyam Prasad N, Tom Talpey, Bharath SM,
Eric Van Hensbergen, Latchesar Ionkov, Dominique Martinet,
Christian Schoenebeck, Gao Xiang, Chao Yu, Yue Hu, Jeffle Xu,
Sandeep Dhavale, Hongbo Li, Chunhai Guo, Miklos Szeredi,
Konstantin Komarov, Andreas Gruenbacher, Kees Cook, Tony Luck,
Guilherme G. Piccoli, Jan Kara, Phillip Lougher,
Christian Brauner, Jan Kara, Steven Rostedt, Masami Hiramatsu,
Mathieu Desnoyers, Tejun Heo, David Vernet, Andrea Righi,
Changwoo Min, Ingo Molnar, Peter Zijlstra, Juri Lelli,
Vincent Guittot, Dietmar Eggemann, Ben Segall, Mel Gorman,
Valentin Schneider, Luis Chamberlain, Petr Pavlu, Daniel Gomez,
Sami Tolvanen, Aaron Tomlin, Sylwester Nawrocki, Liam Girdwood,
Mark Brown, Jaroslav Kysela, Takashi Iwai, Max Filippov,
Paolo Bonzini, John Johansen, Paul Moore, James Morris,
Serge E. Hallyn, Andrew Morton, Alasdair Kergon, Mike Snitzer,
Mikulas Patocka, Benjamin Marzinski, David S. Miller, David Ahern,
Eric Dumazet, Jakub Kicinski, Paolo Abeni, Simon Horman,
Marcel Holtmann, Johan Hedberg, Luiz Augusto von Dentz,
Alexei Starovoitov, Daniel Borkmann, Jesper Dangaard Brouer,
John Fastabend, Stanislav Fomichev, Jamal Hadi Salim, Jiri Pirko,
Marcelo Ricardo Leitner, Xin Long, Trond Myklebust,
Anna Schumaker, Chuck Lever, Jeff Layton, NeilBrown,
Olga Kornievskaia, Dai Ngo, Jon Maloy, Johannes Berg,
Catalin Marinas, Russell King, John Crispin, Thomas Bogendoerfer,
Yoshinori Sato, Rich Felker, John Paul Adrian Glaubitz,
Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart,
Jonas Karlman, Jernej Skrabec, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Simona Vetter, Zhenyu Wang,
Zhi Wang, Jani Nikula, Joonas Lahtinen, Rodrigo Vivi,
Tvrtko Ursulin, Alex Deucher, Christian König, Sandy Huang,
Heiko Stübner, Andy Yan, Igor Russkikh, Andrew Lunn,
Pavan Chebbi, Michael Chan, Potnuri Bharat Teja, Tony Nguyen,
Przemek Kitszel, Taras Chornyi, Maxime Coquelin, Alexandre Torgue,
Iyappan Subramanian, Keyur Chudgar, Quan Nguyen, Heiner Kallweit,
Marc Zyngier, Thomas Gleixner, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth, Vinod Koul, Linus Walleij, Ulf Hansson,
Heiko Carstens, Vasily Gorbik, Alexander Gordeev,
Christian Borntraeger, Sven Schnelle, Martin K. Petersen,
Eduardo Valentin, Keerthy, Rafael J. Wysocki, Daniel Lezcano,
Zhang Rui, Lukasz Luba, Alex Williamson, Mark Greer,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
Shuah Khan, Kieran Bingham, Mauro Carvalho Chehab, Joerg Roedel,
Will Deacon, Robin Murphy, Lee Jones, Pavel Machek, Dave Penkler,
K. Y. Srinivasan, Haiyang Zhang, Wei Liu, Dexuan Cui, Long Li,
Justin Sanders, Jens Axboe, Georgi Djakov, Michael Turquette,
Stephen Boyd, Philipp Zabel, Borislav Petkov, Dave Hansen, x86,
H. Peter Anvin, Pali Rohár, Dmitry Torokhov
In-Reply-To: <20260310-b4-is_err_or_null-v1-0-bd63b656022d@avm.de>
On Tue, Mar 10, 2026 at 12:48:26PM +0100, Philipp Hahn wrote:
> While doing some static code analysis I stumbled over a common pattern,
> where IS_ERR() is combined with a NULL check. For that there is
> IS_ERR_OR_NULL().
... and valid uses of IS_ERR_OR_NULL are rare as hen teeth.
Most of those are "I'm not sure how this function returns an
error, let's use that just in case".
Please, do not introduce more of that crap.
^ permalink raw reply
* Re: [PATCH v2 0/2] pinctrl: qcom: Introduce Pinctrl for Hawi SoC
From: Trilok Soni @ 2026-04-09 17:59 UTC (permalink / raw)
To: Linus Walleij, Mukesh Ojha
Cc: Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-msm, linux-gpio, devicetree, linux-kernel,
Konrad Dybcio
In-Reply-To: <CAD++jLkVHZOBk3bgdqk0dX2q4v=+CD8jC+1vu2gi8CK9BLfX2w@mail.gmail.com>
On 4/9/2026 1:53 AM, Linus Walleij wrote:
> On Wed, Apr 8, 2026 at 4:16 PM Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> wrote:
>
>> Introduce Top Level Mode Multiplexer dt-binding and driver for upcoming
>> Qualcomm Hawi SoC.
>
> All was reviewed quickly so patches applied for kernel v7.1,
> because why not.
Thank you Linus.
---Trilok Soni
^ permalink raw reply
* [PATCH] pinctrl: renesas: rzg2l: Add SR register cache for PM suspend/resume
From: Prabhakar @ 2026-04-09 16:37 UTC (permalink / raw)
To: Geert Uytterhoeven, Linus Walleij
Cc: linux-renesas-soc, linux-gpio, linux-kernel, Prabhakar, Biju Das,
Fabrizio Castro, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Include the SR (Slew Rate) register in the PM suspend/resume register
cache.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/pinctrl/renesas/pinctrl-rzg2l.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index 561e6018fd89..347926dad0c9 100644
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -322,6 +322,7 @@ struct rzg2l_pinctrl_pin_settings {
* @pupd: PUPD registers cache
* @ien: IEN registers cache
* @smt: SMT registers cache
+ * @sr: SR registers cache
* @sd_ch: SD_CH registers cache
* @eth_poc: ET_POC registers cache
* @oen: Output Enable register cache
@@ -336,6 +337,7 @@ struct rzg2l_pinctrl_reg_cache {
u32 *ien[2];
u32 *pupd[2];
u32 *smt;
+ u32 *sr;
u8 sd_ch[2];
u8 eth_poc[2];
u8 oen;
@@ -2741,6 +2743,10 @@ static int rzg2l_pinctrl_reg_cache_alloc(struct rzg2l_pinctrl *pctrl)
if (!cache->smt)
return -ENOMEM;
+ cache->sr = devm_kcalloc(pctrl->dev, nports, sizeof(*cache->sr), GFP_KERNEL);
+ if (!cache->sr)
+ return -ENOMEM;
+
for (u8 i = 0; i < 2; i++) {
u32 n_dedicated_pins = pctrl->data->n_dedicated_pins;
@@ -3002,7 +3008,7 @@ static void rzg2l_pinctrl_pm_setup_regs(struct rzg2l_pinctrl *pctrl, bool suspen
struct rzg2l_pinctrl_reg_cache *cache = pctrl->cache;
for (u32 port = 0; port < nports; port++) {
- bool has_iolh, has_ien, has_pupd, has_smt;
+ bool has_iolh, has_ien, has_pupd, has_smt, has_sr;
u32 off, caps;
u8 pincnt;
u64 cfg;
@@ -3023,6 +3029,7 @@ static void rzg2l_pinctrl_pm_setup_regs(struct rzg2l_pinctrl *pctrl, bool suspen
has_ien = !!(caps & PIN_CFG_IEN);
has_pupd = !!(caps & PIN_CFG_PUPD);
has_smt = !!(caps & PIN_CFG_SMT);
+ has_sr = !!(caps & PIN_CFG_SR);
if (suspend)
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + PFC(off), cache->pfc[port]);
@@ -3068,6 +3075,9 @@ static void rzg2l_pinctrl_pm_setup_regs(struct rzg2l_pinctrl *pctrl, bool suspen
if (has_smt)
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + SMT(off), cache->smt[port]);
+
+ if (has_sr)
+ RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + SR(off), cache->sr[port]);
}
}
--
2.53.0
^ permalink raw reply related
* Re: [PATCH v7 1/6] dt-bindings: iio: adc: add AD4691 family
From: Conor Dooley @ 2026-04-09 15:57 UTC (permalink / raw)
To: radu.sabau
Cc: Lars-Peter Clausen, Michael Hennerich, Jonathan Cameron,
David Lechner, Nuno Sá, Andy Shevchenko, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Uwe Kleine-König,
Liam Girdwood, Mark Brown, Linus Walleij, Bartosz Golaszewski,
Philipp Zabel, Jonathan Corbet, Shuah Khan, linux-iio, devicetree,
linux-kernel, linux-pwm, linux-gpio, linux-doc
In-Reply-To: <20260409-ad4692-multichannel-sar-adc-driver-v7-1-be375d4df2c5@analog.com>
[-- Attachment #1: Type: text/plain, Size: 3184 bytes --]
On Thu, Apr 09, 2026 at 06:28:22PM +0300, Radu Sabau via B4 Relay wrote:
> From: Radu Sabau <radu.sabau@analog.com>
>
> Add DT bindings for the Analog Devices AD4691 family of multichannel
> SAR ADCs (AD4691, AD4692, AD4693, AD4694).
>
> The binding describes the hardware connections:
>
> - Power domains: avdd-supply (required), vio-supply, ref-supply or
> refin-supply (external reference; the REFIN path enables the
> internal reference buffer), and an optional ldo-in-supply, that if
> absent, means the on-chip internal LDO will be used.
>
> - Optional PWM on the CNV pin selects CNV Burst Mode; when absent,
> Manual Mode is assumed with CNV tied to SPI CS.
>
> - An optional reset GPIO (reset-gpios) for hardware reset.
>
> - Up to four GP pins (gp0..gp3) usable as interrupt sources,
> identified in firmware via interrupt-names "gp0".."gp3".
>
> - gpio-controller with #gpio-cells = <2> for GP pin GPIO usage.
>
> - #trigger-source-cells = <1>: one cell selecting the GP pin number
> (0-3) used as the SPI offload trigger source.
>
> Two binding examples are provided: CNV Burst Mode with SPI offload
> (DMA data acquisition driven by DATA_READY on a GP pin), and Manual
> Mode for CPU-driven triggered-buffer or single-shot capture.
>
> Signed-off-by: Radu Sabau <radu.sabau@analog.com>
> ---
> .../devicetree/bindings/iio/adc/adi,ad4691.yaml | 162 +++++++++++++++++++++
> MAINTAINERS | 7 +
> 2 files changed, 169 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4691.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4691.yaml
> new file mode 100644
> index 000000000000..81d2ca4e0e22
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4691.yaml
> @@ -0,0 +1,162 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/adc/adi,ad4691.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Analog Devices AD4691 Family Multichannel SAR ADCs
> +
> +maintainers:
> + - Radu Sabau <radu.sabau@analog.com>
> +
> +description: |
> + The AD4691 family are high-speed, low-power, multichannel successive
> + approximation register (SAR) analog-to-digital converters (ADCs) with
> + an SPI-compatible serial interface. The ADC supports CNV Burst Mode,
> + where an external PWM drives the CNV pin, and Manual Mode, where CNV
> + is directly tied to the SPI chip-select.
> +
> + Datasheets:
> + * https://www.analog.com/en/products/ad4691.html
> + * https://www.analog.com/en/products/ad4692.html
> + * https://www.analog.com/en/products/ad4693.html
> + * https://www.analog.com/en/products/ad4694.html
> +
> +$ref: /schemas/spi/spi-peripheral-props.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - adi,ad4691
> + - adi,ad4692
> + - adi,ad4693
> + - adi,ad4694
Please add a note to the commit message about why these devices are not
compatible. With that,
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
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